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255 lines
8.0 KiB
255 lines
8.0 KiB
//
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// Created by MightyPork on 2018/01/14.
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//
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#include <stm32f0xx_ll_dma.h>
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#include <stm32f072xb.h>
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#include <platform/irq_dispatcher.h>
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#include "platform.h"
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#include "unit_base.h"
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#define UUSART_INTERNAL
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#include "_internal.h"
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static void UUSART_DMA_RxHandler(void *arg);
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static void UUSART_DMA_TxHandler(void *arg);
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error_t UUSART_ClaimDMAs(Unit *unit)
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{
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error_t rv;
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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priv->dma = DMA1;
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switch (priv->periph_num) {
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/* USART1 */
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case 1:
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// TX
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rv = rsc_claim(unit, R_DMA1_2);
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if (rv == E_SUCCESS) {
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LL_SYSCFG_SetRemapDMA_USART(LL_SYSCFG_USART1TX_RMP_DMA1CH2);
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priv->dma_tx = DMA1_Channel2;
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priv->dma_tx_chnum = 2;
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} else {
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// try the remap
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TRY(rsc_claim(unit, R_DMA1_4));
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LL_SYSCFG_SetRemapDMA_USART(LL_SYSCFG_USART1TX_RMP_DMA1CH4);
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priv->dma_tx = DMA1_Channel4;
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priv->dma_tx_chnum = 4;
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}
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// RX
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rv = rsc_claim(unit, R_DMA1_3);
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if (rv == E_SUCCESS) {
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LL_SYSCFG_SetRemapDMA_USART(LL_SYSCFG_USART1RX_RMP_DMA1CH3);
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priv->dma_rx = DMA1_Channel3;
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priv->dma_rx_chnum = 3;
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} else {
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// try the remap
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TRY(rsc_claim(unit, R_DMA1_5));
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LL_SYSCFG_SetRemapDMA_USART(LL_SYSCFG_USART1RX_RMP_DMA1CH5);
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priv->dma_rx = DMA1_Channel5;
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priv->dma_rx_chnum = 5;
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}
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break;
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/* USART2 */
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case 2:
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// RX,TX
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rv = rsc_claim_range(unit, R_DMA1_4, R_DMA1_5);
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if (rv == E_SUCCESS) {
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LL_SYSCFG_SetRemapDMA_USART(LL_SYSCFG_USART2_RMP_DMA1CH54);
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priv->dma_tx = DMA1_Channel4;
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priv->dma_rx = DMA1_Channel5;
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priv->dma_tx_chnum = 4;
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priv->dma_rx_chnum = 5;
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} else {
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// try the remap
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TRY(rsc_claim_range(unit, R_DMA1_6, R_DMA1_7));
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LL_SYSCFG_SetRemapDMA_USART(LL_SYSCFG_USART2_RMP_DMA1CH67);
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priv->dma_tx = DMA1_Channel7;
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priv->dma_rx = DMA1_Channel6;
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priv->dma_tx_chnum = 7;
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priv->dma_rx_chnum = 6;
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}
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break;
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/* USART3 */
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case 3:
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// RX,TX
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rv = rsc_claim_range(unit, R_DMA1_6, R_DMA1_7);
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if (rv == E_SUCCESS) {
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LL_SYSCFG_SetRemapDMA_USART(LL_SYSCFG_USART3_RMP_DMA1CH67);
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priv->dma_tx = DMA1_Channel7;
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priv->dma_rx = DMA1_Channel6;
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priv->dma_tx_chnum = 7;
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priv->dma_rx_chnum = 6;
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} else {
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// try the remap
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TRY(rsc_claim_range(unit, R_DMA1_2, R_DMA1_3));
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LL_SYSCFG_SetRemapDMA_USART(LL_SYSCFG_USART3_RMP_DMA1CH32);
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priv->dma_tx = DMA1_Channel2;
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priv->dma_rx = DMA1_Channel3;
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priv->dma_tx_chnum = 2;
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priv->dma_rx_chnum = 3;
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}
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break;
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/* USART4 */
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case 4:
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// RX,TX
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TRY(rsc_claim_range(unit, R_DMA1_6, R_DMA1_7));
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priv->dma_tx = DMA1_Channel7;
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priv->dma_rx = DMA1_Channel6;
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priv->dma_tx_chnum = 7;
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priv->dma_rx_chnum = 6;
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break;
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default:
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trap("Missing DMA mapping for USART%d", (int)priv->periph_num);
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}
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dbg("USART %d - selected DMA ch Tx(%d), Rx(%d)", priv->periph_num, priv->dma_tx_chnum, priv->dma_rx_chnum);
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return E_SUCCESS;
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}
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error_t UUSART_SetupDMAs(Unit *unit)
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{
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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priv->rx_buffer = malloc_ck(UUSART_RXBUF_LEN);
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if (NULL == priv->rx_buffer) return E_OUT_OF_MEM;
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priv->tx_buffer = malloc_ck(UUSART_TXBUF_LEN);
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if (NULL == priv->tx_buffer) return E_OUT_OF_MEM;
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priv->rx_buf_readpos = 0;
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LL_DMA_InitTypeDef init;
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// Transmit buffer
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{
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LL_DMA_StructInit(&init);
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init.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
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init.Mode = LL_DMA_MODE_CIRCULAR;
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init.PeriphOrM2MSrcAddress = (uint32_t) &priv->periph->TDR;
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init.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
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init.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
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init.MemoryOrM2MDstAddress = (uint32_t) priv->tx_buffer;
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init.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
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init.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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assert_param(SUCCESS == LL_DMA_Init(priv->dma, priv->dma_tx_chnum, &init));
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irqd_attach(priv->dma_tx, UUSART_DMA_TxHandler, unit);
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// Interrupt on transfer complete
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LL_DMA_EnableIT_TC(priv->dma, priv->dma_tx_chnum);
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}
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// Receive buffer
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{
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LL_DMA_StructInit(&init);
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init.Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
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init.Mode = LL_DMA_MODE_CIRCULAR;
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init.NbData = UUSART_RXBUF_LEN;
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init.PeriphOrM2MSrcAddress = (uint32_t) &priv->periph->RDR;
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init.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE;
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init.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
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init.MemoryOrM2MDstAddress = (uint32_t) priv->rx_buffer;
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init.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE;
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init.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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assert_param(SUCCESS == LL_DMA_Init(priv->dma, priv->dma_rx_chnum, &init));
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irqd_attach(priv->dma_rx, UUSART_DMA_RxHandler, unit);
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// Interrupt on transfer 1/2 and complete
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// We will capture the first and second half and send it while the other half is being filled.
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LL_DMA_EnableIT_HT(priv->dma, priv->dma_rx_chnum);
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LL_DMA_EnableIT_TC(priv->dma, priv->dma_rx_chnum);
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}
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LL_DMA_EnableChannel(priv->dma, priv->dma_rx_chnum);
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LL_DMA_EnableChannel(priv->dma, priv->dma_tx_chnum);
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// TODO also set up usart timeout interrupt that grabs whatever is in the DMA buffer and sends it
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return E_SUCCESS;
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}
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static void UUSART_DMA_RxHandler(void *arg)
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{
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Unit *unit = arg;
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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uint32_t isrsnapshot = priv->dma->ISR;
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if (LL_DMA_IsActiveFlag_G(isrsnapshot, priv->dma_rx_chnum)) {
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bool tc = LL_DMA_IsActiveFlag_TC(isrsnapshot, priv->dma_rx_chnum);
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bool ht = LL_DMA_IsActiveFlag_HT(isrsnapshot, priv->dma_rx_chnum);
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uint16_t end = (uint16_t) (ht ? UUSART_RXBUF_LEN / 2 : UUSART_RXBUF_LEN);
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uint16_t toRead = (uint16_t) (end - priv->rx_buf_readpos);
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PUTS(">");
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PUTSN((char *) priv->rx_buffer+priv->rx_buf_readpos, toRead);
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PUTS("<\r\n");
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// Prepare position for next read
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if (ht) priv->rx_buf_readpos = (uint16_t) (end);
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else priv->rx_buf_readpos = 0;
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if (ht) LL_DMA_ClearFlag_HT(priv->dma, priv->dma_rx_chnum);
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if (tc) LL_DMA_ClearFlag_TC(priv->dma, priv->dma_rx_chnum);
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if (LL_DMA_IsActiveFlag_TE(isrsnapshot, priv->dma_rx_chnum)) {
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dbg("Rx TE"); // this shouldn't happen
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LL_DMA_ClearFlag_TE(priv->dma, priv->dma_rx_chnum);
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}
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}
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}
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static void UUSART_DMA_TxHandler(void *arg)
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{
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Unit *unit = arg;
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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uint32_t isrsnapshot = priv->dma->ISR;
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if (LL_DMA_IsActiveFlag_G(isrsnapshot, priv->dma_tx_chnum)) {
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if (LL_DMA_IsActiveFlag_TC(isrsnapshot, priv->dma_tx_chnum)) {
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dbg("Tx TC");
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}
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LL_DMA_ClearFlags(priv->dma, priv->dma_tx_chnum);
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}
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}
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void UUSART_DeInitDMAs(Unit *unit)
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{
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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irqd_detach(priv->dma_tx, UUSART_DMA_RxHandler);
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irqd_detach(priv->dma_rx, UUSART_DMA_TxHandler);
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LL_DMA_DeInit(priv->dma, priv->dma_rx_chnum);
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LL_DMA_DeInit(priv->dma, priv->dma_tx_chnum);
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free_ck(priv->rx_buffer);
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free_ck(priv->tx_buffer);
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}
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