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318 lines
10 KiB
318 lines
10 KiB
//
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// Created by MightyPork on 2018/02/04.
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//
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#include "platform.h"
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#include "unit_base.h"
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#define ADC_INTERNAL
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#include "_adc_internal.h"
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void UADC_ReportEndOfStream(Unit *unit)
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{
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dbg("~~End Of Stream msg~~");
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}
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void UADC_DMA_Handler(void *arg)
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{
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Unit *unit = arg;
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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const uint32_t isrsnapshot = priv->DMAx->ISR;
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if (LL_DMA_IsActiveFlag_G(isrsnapshot, priv->dma_chnum)) {
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const bool tc = LL_DMA_IsActiveFlag_TC(isrsnapshot, priv->dma_chnum);
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const bool ht = LL_DMA_IsActiveFlag_HT(isrsnapshot, priv->dma_chnum);
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const bool te = LL_DMA_IsActiveFlag_TE(isrsnapshot, priv->dma_chnum);
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// check what mode we're in
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const bool m_trig = priv->opmode == ADC_OPMODE_TRIGD;
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const bool m_stream = priv->opmode == ADC_OPMODE_STREAM;
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const bool m_fixcpt = priv->opmode == ADC_OPMODE_FIXCAPT;
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if (m_trig || m_stream || m_fixcpt) {
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if (ht || tc) {
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const uint16_t start = priv->stream_startpos;
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uint16_t end;
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if (ht) {
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dbg("HT");
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end = (uint16_t) (priv->dma_buffer_itemcount / 2);
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LL_DMA_ClearFlag_HT(priv->DMAx, priv->dma_chnum);
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}
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else {
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dbg("TC");
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end = (uint16_t) priv->dma_buffer_itemcount;
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LL_DMA_ClearFlag_TC(priv->DMAx, priv->dma_chnum);
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}
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assert_param(start < end);
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uint32_t sgcount = (end - start) / priv->nb_channels;
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if (m_trig || m_fixcpt) {
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sgcount = MIN(priv->trig_stream_remain, sgcount);
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priv->trig_stream_remain -= sgcount;
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}
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dbg("Would send %d groups (u16 offset %d -> %d)", (int)sgcount, (int)start, (int)(start+sgcount*priv->nb_channels));
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// TODO send the data together with remaining count (used to detect end of transmission)
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if (m_trig || m_fixcpt) {
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if (priv->trig_stream_remain == 0) {
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dbg("End of capture");
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UADC_ReportEndOfStream(unit);
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UADC_SwitchMode(unit, (priv->auto_rearm && m_trig) ? ADC_OPMODE_ARMED : ADC_OPMODE_IDLE);
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}
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}
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if (end == priv->dma_buffer_itemcount) {
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priv->stream_startpos = 0;
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}
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else {
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priv->stream_startpos = end;
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}
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}
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} else {
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// This shouldn't happen, the interrupt should be disabled in this opmode
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dbg("(!) not streaming, DMA IT should be disabled");
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if (ht) {
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LL_DMA_ClearFlag_HT(priv->DMAx, priv->dma_chnum);
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}
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else {
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LL_DMA_ClearFlag_TC(priv->DMAx, priv->dma_chnum);
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}
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}
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if (te) {
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// this shouldn't happen - error
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dbg("ADC DMA TE!");
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LL_DMA_ClearFlag_TE(priv->DMAx, priv->dma_chnum);
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}
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}
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}
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void UADC_ADC_EOS_Handler(void *arg)
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{
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uint64_t timestamp = PTIM_GetMicrotime();
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Unit *unit = arg;
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dbg("ADC EOS ISR hit");
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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// Wait for the DMA to complete copying the last sample
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while (priv->DMA_CHx->CNDTR % priv->nb_channels != 0);
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uint32_t sample_pos;
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if (priv->DMA_CHx->CNDTR == 0) {
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sample_pos = (uint32_t) (priv->dma_buffer_itemcount - 1);
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} else {
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sample_pos = priv->DMA_CHx->CNDTR;
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}
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sample_pos -= priv->nb_channels;
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dbg("Sample pos %d", (int)sample_pos);
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for (uint32_t i = 0; i < 18; i++) {
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if (priv->extended_channels_mask & (1 << i)) {
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uint16_t val = priv->dma_buffer[sample_pos];
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dbg("Trig line level %d", (int)val);
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priv->averaging_bins[i] =
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priv->averaging_bins[i] * (1.0f - priv->avg_factor_as_float) +
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((float) val) * priv->avg_factor_as_float;
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priv->last_samples[i] = val;
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if (priv->opmode == ADC_OPMODE_ARMED) {
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if (i == priv->trigger_source) {
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bool trigd = false;
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uint8_t edge_type = 0;
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if (priv->trig_prev_level < priv->trig_level && val >= priv->trig_level) {
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dbg("******** Rising edge");
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// Rising edge
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trigd = (bool) (priv->trig_edge & 0b01);
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edge_type = 1;
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}
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else if (priv->trig_prev_level > priv->trig_level && val <= priv->trig_level) {
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dbg("******** Falling edge");
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// Falling edge
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trigd = (bool) (priv->trig_edge & 0b10);
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edge_type = 2;
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}
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if (trigd) {
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UADC_HandleTrigger(unit, edge_type, timestamp);
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}
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priv->trig_prev_level = val;
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}
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}
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}
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}
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dbg(" EOS ISR end.");
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}
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void UADC_HandleTrigger(Unit *unit, uint8_t edge_type, uint64_t timestamp)
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{
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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if (priv->trig_holdoff != 0 && priv->trig_holdoff_remain > 0) {
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dbg("Trig discarded due to holdoff.");
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return;
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}
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if (priv->trig_holdoff > 0) {
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priv->trig_holdoff_remain = priv->trig_holdoff;
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// Start the tick
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unit->tick_interval = 1;
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unit->_tick_cnt = 0;
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}
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dbg("Trigger condition hit, edge=%d", edge_type);
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// TODO Send pre-trigger
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priv->stream_startpos = (uint16_t) priv->DMA_CHx->CNDTR;
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priv->trig_stream_remain = priv->trig_len;
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UADC_SwitchMode(unit, ADC_OPMODE_TRIGD);
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}
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void UADC_StartBlockCapture(Unit *unit, uint32_t len, TF_ID frame_id)
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{
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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priv->stream_frame_id = frame_id;
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priv->stream_startpos = (uint16_t) priv->DMA_CHx->CNDTR;
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priv->trig_stream_remain = len;
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UADC_SwitchMode(unit, ADC_OPMODE_FIXCAPT);
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}
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/** Start stream */
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void UADC_StartStream(Unit *unit, TF_ID frame_id)
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{
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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priv->stream_frame_id = frame_id;
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priv->stream_startpos = (uint16_t) priv->DMA_CHx->CNDTR;
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dbg("Start streaming.");
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UADC_SwitchMode(unit, ADC_OPMODE_STREAM);
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}
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/** End stream */
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void UADC_StopStream(Unit *unit)
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{
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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dbg("Stop stream.");
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UADC_ReportEndOfStream(unit);
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UADC_SwitchMode(unit, ADC_OPMODE_IDLE);
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}
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/** Handle unit update tick - expire the trigger hold-off */
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void UADC_updateTick(Unit *unit)
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{
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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if (priv->trig_holdoff_remain > 0) {
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priv->trig_holdoff_remain--;
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if (priv->trig_holdoff_remain == 0) {
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unit->tick_interval = 0;
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unit->_tick_cnt = 0;
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}
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}
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}
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void UADC_SwitchMode(Unit *unit, enum uadc_opmode new_mode)
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{
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv);
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if (new_mode == priv->opmode) return; // nothing to do
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// if un-itied, can go only to IDLE
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assert_param((priv->opmode != ADC_OPMODE_UNINIT) || (new_mode == ADC_OPMODE_IDLE));
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if (new_mode == ADC_OPMODE_UNINIT) {
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dbg("ADC switch -> UNINIT");
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// Stop the DMA, timer and disable ADC - this is called before tearing down the unit
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LL_TIM_DisableCounter(priv->TIMx);
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// Switch off the ADC
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if (LL_ADC_IsEnabled(priv->ADCx)) {
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// Cancel ongoing conversion
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if (LL_ADC_REG_IsConversionOngoing(priv->ADCx)) {
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dbg("Stopping ADC conv");
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LL_ADC_REG_StopConversion(priv->ADCx);
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hw_wait_while(LL_ADC_REG_IsStopConversionOngoing(priv->ADCx), 100);
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}
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LL_ADC_Disable(priv->ADCx);
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dbg("Disabling ADC");
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hw_wait_while(LL_ADC_IsDisableOngoing(priv->ADCx), 100);
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}
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dbg("Disabling DMA");
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LL_DMA_DisableChannel(priv->DMAx, priv->dma_chnum);
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LL_DMA_DisableIT_HT(priv->DMAx, priv->dma_chnum);
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LL_DMA_DisableIT_TC(priv->DMAx, priv->dma_chnum);
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}
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else if (new_mode == ADC_OPMODE_IDLE) {
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dbg("ADC switch -> IDLE");
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// IDLE and ARMED are identical with the exception that the trigger condition is not checked
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// ARMED can be only entered from IDLE, thus we do the init only here.
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// In IDLE, we don't need the DMA interrupts
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LL_DMA_DisableIT_HT(priv->DMAx, priv->dma_chnum);
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LL_DMA_DisableIT_TC(priv->DMAx, priv->dma_chnum);
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// Use End Of Sequence to recover results for averaging from the DMA buffer and DR
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LL_ADC_EnableIT_EOS(priv->ADCx);
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if (priv->opmode == ADC_OPMODE_UNINIT) {
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// Nothing is started yet - this is the only way to leave UNINIT
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LL_ADC_Enable(priv->ADCx);
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LL_DMA_EnableChannel(priv->DMAx, priv->dma_chnum);
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LL_TIM_EnableCounter(priv->TIMx);
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}
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}
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else if (new_mode == ADC_OPMODE_ARMED) {
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dbg("ADC switch -> ARMED");
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assert_param(priv->opmode == ADC_OPMODE_IDLE);
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// there's nothing else to do here
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}
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else if (new_mode == ADC_OPMODE_TRIGD ||
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new_mode == ADC_OPMODE_STREAM ||
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new_mode == ADC_OPMODE_FIXCAPT) {
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dbg("ADC switch -> TRIG'D / STREAM / BLOCK");
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assert_param(priv->opmode == ADC_OPMODE_ARMED || priv->opmode == ADC_OPMODE_IDLE);
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// during the capture, we disallow direct readout and averaging to reduce overhead
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LL_ADC_DisableIT_EOS(priv->ADCx);
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// Enable the DMA buffer interrupts
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LL_DMA_EnableIT_HT(priv->DMAx, priv->dma_chnum);
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LL_DMA_EnableIT_TC(priv->DMAx, priv->dma_chnum);
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}
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// the actual switch
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priv->opmode = new_mode;
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}
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