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390 lines
9.0 KiB
390 lines
9.0 KiB
//
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// Created by MightyPork on 2018/01/29.
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//
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#include "comm/messages.h"
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#include "unit_base.h"
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#include "utils/avrlibc.h"
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#include "unit_1wire.h"
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// 1WIRE master
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/** Private data structure */
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struct priv {
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char port_name;
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uint8_t pin_number;
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GPIO_TypeDef *port;
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uint32_t ll_pin;
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};
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// ------------------------------------------------------------------------
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/** Load from a binary buffer stored in Flash */
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static void U1WIRE_loadBinary(Unit *unit, PayloadParser *pp)
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{
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struct priv *priv = unit->data;
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uint8_t version = pp_u8(pp);
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(void)version;
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priv->port_name = pp_char(pp);
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priv->pin_number = pp_u8(pp);
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}
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/** Write to a binary buffer for storing in Flash */
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static void U1WIRE_writeBinary(Unit *unit, PayloadBuilder *pb)
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{
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struct priv *priv = unit->data;
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pb_u8(pb, 0); // version
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pb_char(pb, priv->port_name);
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pb_u8(pb, priv->pin_number);
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}
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// ------------------------------------------------------------------------
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/** Parse a key-value pair from the INI file */
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static error_t U1WIRE_loadIni(Unit *unit, const char *key, const char *value)
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{
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bool suc = true;
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struct priv *priv = unit->data;
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if (streq(key, "pin")) {
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suc = parse_pin(value, &priv->port_name, &priv->pin_number);
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}
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else {
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return E_BAD_KEY;
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}
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if (!suc) return E_BAD_VALUE;
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return E_SUCCESS;
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}
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/** Generate INI file section for the unit */
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static void U1WIRE_writeIni(Unit *unit, IniWriter *iw)
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{
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struct priv *priv = unit->data;
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iw_comment(iw, "Data pin");
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iw_entry(iw, "pin", "%c%d", priv->port_name, priv->pin_number);
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}
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// ------------------------------------------------------------------------
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/** Allocate data structure and set defaults */
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static error_t U1WIRE_preInit(Unit *unit)
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{
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struct priv *priv = unit->data = calloc_ck(1, sizeof(struct priv));
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if (priv == NULL) return E_OUT_OF_MEM;
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// some defaults
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priv->pin_number = 0;
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priv->port_name = 'A';
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return E_SUCCESS;
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}
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/** Finalize unit set-up */
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static error_t U1WIRE_init(Unit *unit)
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{
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bool suc = true;
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struct priv *priv = unit->data;
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// --- Parse config ---
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priv->ll_pin = hw_pin2ll(priv->pin_number, &suc);
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priv->port = hw_port2periph(priv->port_name, &suc);
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Resource rsc = hw_pin2resource(priv->port_name, priv->pin_number, &suc);
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if (!suc) return E_BAD_CONFIG;
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// --- Claim resources ---
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TRY(rsc_claim(unit, rsc));
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// --- Init hardware ---
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LL_GPIO_SetPinMode(priv->port, priv->ll_pin, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinOutputType(priv->port, priv->ll_pin, LL_GPIO_OUTPUT_PUSHPULL);
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LL_GPIO_SetPinSpeed(priv->port, priv->ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
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LL_GPIO_SetPinPull(priv->port, priv->ll_pin, LL_GPIO_PULL_UP); // pull-up for OD state
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return E_SUCCESS;
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}
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/** Tear down the unit */
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static void U1WIRE_deInit(Unit *unit)
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{
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struct priv *priv = unit->data;
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// Release all resources
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rsc_teardown(unit);
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// Free memory
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free_ck(unit->data);
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}
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// ------------------------------------------------------------------------
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static inline void ow_pull_high(Unit *unit)
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{
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struct priv *priv = unit->data;
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LL_GPIO_SetOutputPin(priv->port, priv->ll_pin);
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LL_GPIO_SetPinMode(priv->port, priv->ll_pin, LL_GPIO_MODE_OUTPUT);
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}
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static inline void ow_pull_low(Unit *unit)
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{
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struct priv *priv = unit->data;
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LL_GPIO_ResetOutputPin(priv->port, priv->ll_pin);
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LL_GPIO_SetPinMode(priv->port, priv->ll_pin, LL_GPIO_MODE_OUTPUT);
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}
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static inline void ow_release_line(Unit *unit)
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{
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struct priv *priv = unit->data;
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LL_GPIO_SetPinMode(priv->port, priv->ll_pin, LL_GPIO_MODE_INPUT);
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}
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static inline bool ow_sample_line(Unit *unit)
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{
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struct priv *priv = unit->data;
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return (bool) LL_GPIO_IsInputPinSet(priv->port, priv->ll_pin);
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}
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/**
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* Reset the 1-wire bus
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*/
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static bool ow_reset(Unit *unit)
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{
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ow_pull_low(unit);
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PTIM_MicroDelay(500);
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bool presence;
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vPortEnterCritical();
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{
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// Strong pull-up (for parasitive power)
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ow_pull_high(unit);
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PTIM_MicroDelay(2);
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// switch to open-drain
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ow_release_line(unit);
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PTIM_MicroDelay(118);
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presence = ow_sample_line(unit);
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}
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vPortExitCritical();
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PTIM_MicroDelay(130);
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return presence;
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}
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/**
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* Write a bit to the 1-wire bus
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*/
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static void ow_write(Unit *unit, bool bit)
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{
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vPortEnterCritical();
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{
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// start mark
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ow_pull_low(unit);
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PTIM_MicroDelay(2);
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if (bit) ow_pull_high(unit);
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PTIM_MicroDelay(70);
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// Strong pull-up (for parasitive power)
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ow_pull_high(unit);
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}
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vPortExitCritical();
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PTIM_MicroDelay(2);
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}
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/**
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* Read a bit from the 1-wire bus
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*/
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static bool ow_read(Unit *unit)
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{
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bool bit;
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vPortEnterCritical();
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{
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// start mark
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ow_pull_low(unit);
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PTIM_MicroDelay(2);
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ow_release_line(unit);
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PTIM_MicroDelay(20);
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bit = ow_sample_line(unit);
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}
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vPortExitCritical();
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PTIM_MicroDelay(40);
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return bit;
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}
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/**
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* Write a byte to the 1-wire bus
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*/
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static void ow_write_u8(Unit *unit, uint8_t byte)
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{
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for (int i = 0; i < 8; i++) {
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ow_write(unit, 0 != (byte & (1 << i)));
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}
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}
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/**
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* Write a halfword to the 1-wire bus
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*/
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static void ow_write_u16(Unit *unit, uint16_t halfword)
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{
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ow_write_u8(unit, (uint8_t) (halfword & 0xFF));
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ow_write_u8(unit, (uint8_t) ((halfword >> 8) & 0xFF));
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}
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/**
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* Write a word to the 1-wire bus
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*/
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static void ow_write_u32(Unit *unit, uint32_t word)
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{
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ow_write_u16(unit, (uint16_t) (word));
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ow_write_u16(unit, (uint16_t) (word >> 16));
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}
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/**
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* Write a doubleword to the 1-wire bus
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*/
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static void ow_write_u64(Unit *unit, uint64_t dword)
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{
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ow_write_u32(unit, (uint32_t) (dword));
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ow_write_u32(unit, (uint32_t) (dword >> 32));
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}
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/**
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* Read a byte form the 1-wire bus
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*/
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static uint8_t ow_read_u8(Unit *unit)
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{
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uint8_t buf = 0;
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for (int i = 0; i < 8; i++) {
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buf <<= 1;
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buf |= 1 & ow_read(unit);
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}
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return buf;
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}
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/**
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* Read a halfword form the 1-wire bus
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*/
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static uint16_t ow_read_u16(Unit *unit)
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{
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uint16_t acu = 0;
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acu |= ow_read_u8(unit);
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acu |= ow_read_u8(unit) << 8;
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return acu;
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}
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/**
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* Read a word form the 1-wire bus
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*/
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static uint32_t ow_read_u32(Unit *unit)
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{
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uint32_t acu = 0;
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acu |= ow_read_u16(unit);
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acu |= (uint32_t)ow_read_u16(unit) << 16;
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return acu;
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}
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/**
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* Read a doubleword form the 1-wire bus
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*/
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static uint64_t ow_read_u64(Unit *unit)
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{
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uint64_t acu = 0;
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acu |= ow_read_u32(unit);
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acu |= (uint64_t)ow_read_u32(unit) << 32;
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return acu;
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}
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// ------------------------------------------------------------------------
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#define OW_ROM_SEARCH 0xF0
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#define OW_ROM_READ 0x33
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#define OW_ROM_MATCH 0x55
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#define OW_ROM_SKIP 0xCC
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#define OW_ROM_ALM_SEARCH 0xEC
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#define OW_DS1820_CONVERT_T 0x44
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#define OW_DS1820_WRITE_SCRATCH 0x4E
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#define OW_DS1820_READ_SCRATCH 0xBE
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#define OW_DS1820_COPY_SCRATCH 0x48
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#define OW_DS1820_RECALL_E2 0xB8
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#define OW_DS1820_READ_SUPPLY 0xB4
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enum PinCmd_ {
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CMD_TEST = 0,
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};
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/** Handle a request message */
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static error_t U1WIRE_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, PayloadParser *pp)
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{
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switch (command) {
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/** Write byte(s) - addr:u16, byte(s) */
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case CMD_TEST:;
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bool presence = ow_reset(unit);
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if (!presence) return E_HW_TIMEOUT;
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ow_write_u8(unit, OW_ROM_SKIP);
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ow_write_u8(unit, OW_DS1820_CONVERT_T);
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ow_pull_high(unit);
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osDelay(750);
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// TODO this will be done with an async timer
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// If parasitive power is not used, we could poll and check the status bit
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presence = ow_reset(unit);
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if (!presence) return E_HW_TIMEOUT;
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ow_write_u8(unit, OW_ROM_SKIP);
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ow_write_u8(unit, OW_DS1820_READ_SCRATCH);
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uint16_t temp = ow_read_u16(unit);
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uint16_t threg = ow_read_u16(unit);
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uint16_t reserved = ow_read_u16(unit);
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uint8_t cnt_remain = ow_read_u8(unit);
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uint8_t cnt_per_c = ow_read_u8(unit);
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uint8_t crc = ow_read_u8(unit);
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// TODO check CRC
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PayloadBuilder pb = pb_start(unit_tmp512, UNIT_TMP_LEN, NULL);
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pb_u16(&pb, temp);
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pb_u8(&pb, cnt_remain);
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pb_u8(&pb, cnt_per_c);
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com_respond_buf(frame_id, MSG_SUCCESS, pb.start, pb_length(&pb));
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return E_SUCCESS;
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default:
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return E_UNKNOWN_COMMAND;
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}
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}
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// ------------------------------------------------------------------------
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/** Unit template */
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const UnitDriver UNIT_1WIRE = {
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.name = "1WIRE",
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.description = "1-Wire master",
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// Settings
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.preInit = U1WIRE_preInit,
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.cfgLoadBinary = U1WIRE_loadBinary,
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.cfgWriteBinary = U1WIRE_writeBinary,
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.cfgLoadIni = U1WIRE_loadIni,
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.cfgWriteIni = U1WIRE_writeIni,
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// Init
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.init = U1WIRE_init,
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.deInit = U1WIRE_deInit,
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// Function
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.handleRequest = U1WIRE_handleRequest,
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};
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