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work towards f303 compat, usb not working but it runs

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sipo
Ondřej Hruška 6 years ago
parent b19b85e7eb
commit f15b907f5d
Signed by: MightyPork
GPG Key ID: 2C5FD5035250423D
8 changed files with 151 additions and 40 deletions
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  1. 11
      FreeRTOSConfig.h
  2. 3
      USB/usb_device.c
  3. 18
      USB/usbd_conf.c
  4. 5
      framework/resources.h
  5. 5
      gex_hooks.c
  6. 3
      platform/debug_uart.c
  7. 48
      platform/plat_compat.h
  8. 98
      platform/platform.c

11
FreeRTOSConfig.h
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@ -108,7 +108,6 @@
#define configQUEUE_REGISTRY_SIZE 0
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configENABLE_BACKWARD_COMPATIBILITY 0
#define configUSE_PORT_OPTIMISED_TASK_SELECTION (__CORTEX_M >= 3) // this fails on CM0+
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
@ -127,7 +126,7 @@ to exclude the API function. */
///* Cortex-M specific definitions. */
#if (__CORTEX_M>=3)
#if defined(GEX_PLAT_F103_BLUEPILL) || defined(GEX_PLAT_F303_DISCOVERY)
// This is for F103+
/* The lowest interrupt priority that can be used in a call to a "set priority"
@ -141,12 +140,18 @@ to exclude the API function. */
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
#else
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#elif defined(GEX_PLAT_F072_DISCOVERY)
// This is for F072
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 3
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 3
#define configPRIO_BITS 2
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#else
#error "BAD PLATFORM!!"
#endif
/* Interrupt priorities used by the kernel port layer itself. These are generic

3
USB/usb_device.c
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@ -93,6 +93,9 @@ void MX_USB_DEVICE_Init(void)
// Function from F103
void USB_LP_CAN1_RX0_IRQHandler(void) __attribute__((alias("USB_IRQHandler")));
// Function for F303
void USB_LP_CAN_RX0_IRQHandler(void) __attribute__((alias("USB_IRQHandler")));
/**
* @brief This function handles USB global interrupt / USB wake-up interrupt through EXTI line 18.
*/

18
USB/usbd_conf.c
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@ -88,6 +88,20 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
#elif defined(GEX_PLAT_F072_DISCOVERY)
HAL_NVIC_SetPriority(USB_IRQn, 3, 0);
HAL_NVIC_EnableIRQ(USB_IRQn);
#elif defined(GEX_PLAT_F303_DISCOVERY)
// Pins need to be configured here
/**USB GPIO Configuration
PA11 ------> USB_DM
PA12 ------> USB_DP
*/
__HAL_RCC_GPIOA_CLK_ENABLE();
LL_GPIO_SetAFPin_8_15(GPIOA, LL_GPIO_PIN_11, LL_GPIO_AF_14);
LL_GPIO_SetAFPin_8_15(GPIOA, LL_GPIO_PIN_12, LL_GPIO_AF_14);
HAL_NVIC_SetPriority(USB_LP_CAN_RX0_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USB_LP_CAN_RX0_IRQn);
#else
#error "BAD PLATFORM"
#endif
/* USER CODE BEGIN USB_MspInit 1 */
@ -110,6 +124,10 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle)
HAL_NVIC_DisableIRQ(USB_LP_CAN1_RX0_IRQn);
#elif defined(GEX_PLAT_F072_DISCOVERY)
HAL_NVIC_DisableIRQ(USB_IRQn);
#elif defined(GEX_PLAT_F303_DISCOVERY)
HAL_NVIC_DisableIRQ(USB_LP_CAN_RX0_IRQn);
#else
#error "BAD PLATFORM"
#endif
/* USER CODE BEGIN USB_MspDeInit 1 */

5
framework/resources.h
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@ -29,9 +29,12 @@
X(I2C1) X(I2C2) X(I2C3) \
X(I2S1) X(I2S2) X(I2S3) \
X(ADC1) X(ADC2) X(ADC3) X(ADC4) \
X(OPAMP1) X(OPAMP2) X(OPAMP3) X(OPAMP4) \
X(DAC1) X(DAC2) \
X(CAN) \
X(COMP1) X(COMP2) X(HDMI_CEC) \
X(TSC) \
X(COMP1) X(COMP2) X(COMP3) X(COMP4) X(COMP5) X(COMP6) X(COMP7) \
X(HDMI_CEC) \
X(USART1) X(USART2) X(USART3) X(USART4) X(USART5) X(USART6) \
X(TIM1) X(TIM2) X(TIM3) X(TIM4) X(TIM5) \
X(TIM6) X(TIM7) X(TIM8) X(TIM9) X(TIM10) X(TIM11) X(TIM12) X(TIM13) X(TIM14) \

5
gex_hooks.c
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@ -35,11 +35,6 @@ void GEX_PreInit(void)
__HAL_RCC_GPIOF_CLK_ENABLE();
#endif
// TODO remove this
LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_7, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinOutputType(GPIOC, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_PUSHPULL);
LL_GPIO_SetPinSpeed(GPIOC, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_LOW);
StatusLed_PreInit();
DebugUart_PreInit();

3
platform/debug_uart.c
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@ -42,6 +42,9 @@ void DebugUart_PreInit(void)
LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_1);
#elif GEX_PLAT_F103_BLUEPILL
LL_USART_SetBaudRate(USART2, SystemCoreClock/2, 115200); // This is not great, let's hope it's like this on all platforms...
#elif GEX_PLAT_F303_DISCOVERY
LL_USART_SetBaudRate(USART2, SystemCoreClock/2, LL_USART_OVERSAMPLING_16, 115200); // FIXME better way to determine frequency?
LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_7); // uart2 is AF7 here
#else
#error "BAD PLATFORM!"
#endif

48
platform/plat_compat.h
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@ -97,6 +97,54 @@
// Status LED config
#define STATUS_LED_PORT 'C'
#define STATUS_LED_PIN 6 // RED LED "UP"
#elif defined(GEX_PLAT_F303_DISCOVERY)
// platform name for the version string
#define GEX_PLATFORM "STM32F303-Discovery"
#include <stm32f3xx.h>
#include <stm32f3xx_hal.h>
#include <stm32f3xx_ll_adc.h>
#include <stm32f3xx_ll_bus.h>
#include <stm32f3xx_ll_comp.h>
#include <stm32f3xx_ll_cortex.h>
#include <stm32f3xx_ll_crc.h>
#include <stm32f3xx_ll_dac.h>
#include <stm32f3xx_ll_dma.h>
#include <stm32f3xx_ll_exti.h>
#include <stm32f3xx_ll_fmc.h>
#include <stm32f3xx_ll_gpio.h>
#include <stm32f3xx_ll_hrtim.h>
#include <stm32f3xx_ll_i2c.h>
#include <stm32f3xx_ll_iwdg.h>
#include <stm32f3xx_ll_opamp.h>
#include <stm32f3xx_ll_pwr.h>
#include <stm32f3xx_ll_rcc.h>
#include <stm32f3xx_ll_rtc.h>
#include <stm32f3xx_ll_spi.h>
#include <stm32f3xx_ll_system.h>
#include <stm32f3xx_ll_tim.h>
#include <stm32f3xx_ll_usart.h>
#include <stm32f3xx_ll_utils.h>
#include <stm32f3xx_ll_wwdg.h>
// size, determines position of the flash storage
#define FLASH_SIZE (256*1024)
#define SETTINGS_BLOCK_SIZE (1024*2) // this must be a multiple of FLASH pages
#define SETTINGS_FLASH_ADDR (0x08000000 + FLASH_SIZE - SETTINGS_BLOCK_SIZE)
// Number of GPIO ports A,B,C...
#define PORTS_COUNT 6
// Lock jumper config
#define LOCK_JUMPER_PORT 'F'
#define LOCK_JUMPER_PIN 1 // OSC OUT, not used in BYPASS mode (receiving clock from the ST-Link MCO)
// Status LED config
#define STATUS_LED_PORT 'E'
#define STATUS_LED_PIN 13
#else
#error "BAD PLATFORM! Please select GEX platform using a -DGEX_PLAT_* compile flag"
#endif

98
platform/platform.c
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@ -38,19 +38,11 @@ void plat_init_resources(void)
// Platform F103C8T6 - free all present resources
{
rsc_free(NULL, R_ADC1);
rsc_free(NULL, R_ADC2);
rsc_free(NULL, R_I2C1);
rsc_free(NULL, R_I2C2);
rsc_free(NULL, R_SPI1);
rsc_free(NULL, R_SPI2);
rsc_free(NULL, R_TIM1);
rsc_free(NULL, R_TIM2);
rsc_free(NULL, R_TIM3);
rsc_free(NULL, R_TIM4);
rsc_free(NULL, R_USART1);
rsc_free(NULL, R_USART2);
rsc_free(NULL, R_USART3);
rsc_free_range(NULL, R_ADC1, R_ADC2);
rsc_free_range(NULL, R_I2C1, R_I2C2);
rsc_free_range(NULL, R_SPI1, R_SPI2);
rsc_free_range(NULL, R_TIM1, R_TIM4);
rsc_free_range(NULL, R_USART1, R_USART3);
rsc_free_range(NULL, R_PA0, R_PA15);
rsc_free_range(NULL, R_PB0, R_PB15);
rsc_free_range(NULL, R_PC13, R_PC15);
@ -84,29 +76,22 @@ void plat_init_resources(void)
{
rsc_free(NULL, R_ADC1);
rsc_free(NULL, R_CAN);
rsc_free(NULL, R_COMP1);
rsc_free(NULL, R_COMP2);
rsc_free_range(NULL, R_COMP1, R_COMP2);
rsc_free(NULL, R_DAC1);
rsc_free(NULL, R_HDMI_CEC);
rsc_free(NULL, R_I2C1);
rsc_free(NULL, R_I2C2);
rsc_free(NULL, R_I2S1);
rsc_free(NULL, R_I2S2);
rsc_free(NULL, R_SPI1);
rsc_free(NULL, R_SPI2);
rsc_free(NULL, R_TIM1);
rsc_free(NULL, R_TIM2);
rsc_free(NULL, R_TIM3);
rsc_free(NULL, R_TIM6);
rsc_free(NULL, R_TIM7);
rsc_free(NULL, R_TSC);
rsc_free_range(NULL, R_I2C1, R_I2C2);
rsc_free_range(NULL, R_I2S1, R_I2S2);
rsc_free_range(NULL, R_SPI1, R_SPI2);
rsc_free_range(NULL, R_TIM1, R_TIM3);
rsc_free_range(NULL, R_TIM6, R_TIM7);
rsc_free_range(NULL, R_TIM14, R_TIM17);
rsc_free(NULL, R_USART1);
rsc_free(NULL, R_USART2);
rsc_free(NULL, R_USART3);
rsc_free(NULL, R_USART4);
rsc_free_range(NULL, R_USART1, R_USART4);
rsc_free_range(NULL, R_PA0, R_PA15);
rsc_free_range(NULL, R_PB0, R_PB15);
rsc_free_range(NULL, R_PC0, R_PC15);
rsc_free(NULL, R_PD2);
rsc_free_range(NULL, R_PF0, R_PF1);
}
@ -118,7 +103,58 @@ void plat_init_resources(void)
ok &= rsc_claim(&UNIT_SYSTEM, R_TIM1);
// HSE crystal
ok &= rsc_claim(&UNIT_SYSTEM, R_PF0);
//ok &= rsc_claim(&UNIT_SYSTEM, R_PD1); // - not used in BYPASS mode
//ok &= rsc_claim(&UNIT_SYSTEM, R_PF1); // - not used in BYPASS mode
// SWD
ok &= rsc_claim(&UNIT_SYSTEM, R_PA13);
ok &= rsc_claim(&UNIT_SYSTEM, R_PA14);
// USB
ok &= rsc_claim(&UNIT_SYSTEM, R_PA11);
ok &= rsc_claim(&UNIT_SYSTEM, R_PA12);
// BOOT pin(s)
ok &= rsc_claim(&UNIT_SYSTEM, R_PB2); // BOOT1
assert_param(ok);
}
#elif defined(GEX_PLAT_F303_DISCOVERY)
__HAL_RCC_GPIOF_CLK_ENABLE();
// Platform F303VCT - free all present resources
{
rsc_free_range(NULL, R_ADC1, R_ADC4);
rsc_free(NULL, R_CAN);
rsc_free_range(NULL, R_COMP1, R_COMP7);
rsc_free(NULL, R_HDMI_CEC);
rsc_free(NULL, R_DAC1);
rsc_free_range(NULL, R_I2C1, R_I2C2);
rsc_free_range(NULL, R_I2S2, R_I2S3);
rsc_free_range(NULL, R_OPAMP1, R_OPAMP4);
rsc_free_range(NULL, R_SPI1, R_SPI3);
rsc_free_range(NULL, R_TIM1, R_TIM4);
rsc_free_range(NULL, R_TIM6, R_TIM8);
rsc_free_range(NULL, R_TIM15, R_TIM17);
rsc_free(NULL, R_TSC);
rsc_free_range(NULL, R_USART1, R_USART5);
rsc_free_range(NULL, R_PA0, R_PA15);
rsc_free_range(NULL, R_PB0, R_PB15);
rsc_free_range(NULL, R_PC0, R_PC15);
rsc_free_range(NULL, R_PD0, R_PD15);
rsc_free_range(NULL, R_PE0, R_PE15);
rsc_free_range(NULL, R_PF0, R_PF2);
rsc_free(NULL, R_PF4);
rsc_free_range(NULL, R_PF9, R_PF10);
}
// Claim resources not available due to board layout or internal usage
{
bool ok = true;
// HAL timebase
ok &= rsc_claim(&UNIT_SYSTEM, R_TIM1);
// HSE crystal
ok &= rsc_claim(&UNIT_SYSTEM, R_PF0);
//ok &= rsc_claim(&UNIT_SYSTEM, R_PF1); // - not used in BYPASS mode
// SWD
ok &= rsc_claim(&UNIT_SYSTEM, R_PA13);
ok &= rsc_claim(&UNIT_SYSTEM, R_PA14);

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