From d49081b190029938d513b6984abf8d0a05038ef1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ond=C5=99ej=20Hru=C5=A1ka?= Date: Sat, 13 Jan 2018 19:49:12 +0100 Subject: [PATCH] basic work on uart --- cortex_handlers.c | 5 + framework/resources.c | 10 +- framework/resources.h | 2 + framework/rsc_enum.h | 3 +- platform/debug_uart.c | 113 ++++++++---- platform/pin_utils.c | 2 +- platform/pin_utils.h | 7 + platform/plat_compat.h | 16 +- platform/platform.c | 23 +-- units/i2c/unit_i2c.c | 12 ++ units/spi/unit_spi.c | 12 ++ units/usart/{unit_uart.c => unit_usart.c} | 210 +++++++++++++--------- units/usart/{unit_uart.h => unit_usart.h} | 0 13 files changed, 275 insertions(+), 140 deletions(-) rename units/usart/{unit_uart.c => unit_usart.c} (82%) rename units/usart/{unit_uart.h => unit_usart.h} (100%) diff --git a/cortex_handlers.c b/cortex_handlers.c index 8599f03..fc7eb42 100644 --- a/cortex_handlers.c +++ b/cortex_handlers.c @@ -159,6 +159,11 @@ of this function. */ #endif Indicator_Effect(STATUS_FAULT); + + // throw in the canary dump, just in case +#if USE_STACK_MONITOR + stackmon_dump(); +#endif while (1); } #endif diff --git a/framework/resources.c b/framework/resources.c index cc29001..20519fe 100644 --- a/framework/resources.c +++ b/framework/resources.c @@ -73,7 +73,7 @@ error_t rsc_claim(Unit *unit, Resource rsc) assert_param(rsc < RESOURCE_COUNT); assert_param(unit != NULL); -// dbg("%s claims %s", unit->name, rsc_get_name(rsc)); + rsc_dbg("%s claims %s", unit->name, rsc_get_name(rsc)); if (RSC_IS_HELD(global_rscmap, rsc)) { // this whole branch is just reporting the error @@ -81,11 +81,13 @@ error_t rsc_claim(Unit *unit, Resource rsc) Unit *holder = ureg_get_rsc_owner(rsc); assert_param(holder != NULL); - dbg("ERROR!! Unit %s failed to claim resource %s, already held by %s!", + dbg("ERROR!! Unit %s failed to claim rsc %s, already held by %s!", unit->name, rsc_get_name(rsc), holder->name); + if (holder == unit) dbg("DOUBLE CLAIM, This is probably a bug!"); + unit->failed_rsc = rsc; return E_RESOURCE_NOT_AVAILABLE; @@ -156,7 +158,7 @@ void rsc_free(Unit *unit, Resource rsc) assert_param(rsc_initialized); assert_param(rsc < RESOURCE_COUNT); -// dbg("Free resource %s", rsc_get_name(rsc)); + rsc_dbg("Free resource %s", rsc_get_name(rsc)); if (RSC_IS_FREE(global_rscmap, rsc)) return; @@ -211,7 +213,7 @@ void rsc_teardown(Unit *unit) assert_param(rsc_initialized); assert_param(unit != NULL); -// dbg("Tearing down unit %s", unit->name); + rsc_dbg("Tearing down unit %s", unit->name); deinit_unit_pins(unit); for (uint32_t i = 0; i < RSCMAP_LEN; i++) { diff --git a/framework/resources.h b/framework/resources.h index 7b51e26..f2b91c9 100644 --- a/framework/resources.h +++ b/framework/resources.h @@ -9,6 +9,8 @@ #include "unit.h" #include "rsc_enum.h" +#define rsc_dbg(fmt, ...) dbg("[RSC] "fmt, ##__VA_ARGS__) + #define CHECK_SUC() do { if (!suc) return false; } while (0) void rsc_init_registry(void); diff --git a/framework/rsc_enum.h b/framework/rsc_enum.h index 8344de4..b0a96b3 100644 --- a/framework/rsc_enum.h +++ b/framework/rsc_enum.h @@ -15,7 +15,8 @@ X(TIM1) X(TIM2) X(TIM3) X(TIM4) X(TIM5) \ X(TIM6) X(TIM7) X(TIM8) X(TIM9) X(TIM10) X(TIM11) X(TIM12) X(TIM13) X(TIM14) \ X(TIM15) X(TIM16) X(TIM17) \ - X(DMA1) X(DMA2) + X(DMA1_1) X(DMA1_2) X(DMA1_3) X(DMA1_4) X(DMA1_5) X(DMA1_6) X(DMA1_7) X(DMA1_8) \ + X(DMA2_1) X(DMA2_2) X(DMA2_3) X(DMA2_4) X(DMA2_5) X(DMA2_6) X(DMA2_7) X(DMA2_8) // Resources not used anywhere: // X(I2S1) X(I2S2) X(I2S3) diff --git a/platform/debug_uart.c b/platform/debug_uart.c index 6b57eab..6759286 100644 --- a/platform/debug_uart.c +++ b/platform/debug_uart.c @@ -6,26 +6,94 @@ #include "framework/resources.h" #include "debug_uart.h" #include "plat_compat.h" +#include "pin_utils.h" #if USE_DEBUG_UART +#define DEBUG_USART_BAUD 115200 + +#if GEX_PLAT_F072_DISCOVERY + + #define DEBUG_USART USART1 + #define DEBUG_USART_RSC R_USART1 + #define DEBUG_USART_PORT 'A' + #define DEBUG_USART_PIN 9 + #define DEBUG_USART_AF 1 + #define DEBUG_USART_PCLK PLAT_APB1_HZ + +#elif GEX_PLAT_F103_BLUEPILL + + #define DEBUG_USART USART2 + #define DEBUG_USART_RSC R_USART2 + #define DEBUG_USART_PORT 'A' + #define DEBUG_USART_PIN 2 + #define DEBUG_USART_PCLK PLAT_APB1_HZ + +#elif GEX_PLAT_F303_DISCOVERY + + #define DEBUG_USART USART3 + #define DEBUG_USART_RSC R_USART3 + #define DEBUG_USART_PORT 'D' + #define DEBUG_USART_PIN 8 + #define DEBUG_USART_AF 7 + #define DEBUG_USART_PCLK PLAT_APB1_HZ + +#elif GEX_PLAT_F407_DISCOVERY + + #define DEBUG_USART USART2 + #define DEBUG_USART_RSC R_USART2 + #define DEBUG_USART_PORT 'A' + #define DEBUG_USART_PIN 2 + #define DEBUG_USART_AF 7 + #define DEBUG_USART_PCLK PLAT_APB1_HZ + +#else + #error "BAD PLATFORM!" +#endif + + + /** Init the submodule. */ void DebugUart_Init(void) { + bool suc = true; // Debug UART - assert_param(E_SUCCESS == rsc_claim(&UNIT_SYSTEM, R_USART2)); - assert_param(E_SUCCESS == rsc_claim(&UNIT_SYSTEM, R_PA2)); + assert_param(E_SUCCESS == rsc_claim(&UNIT_SYSTEM, DEBUG_USART_RSC)); + assert_param(E_SUCCESS == rsc_claim(&UNIT_SYSTEM, pin2resource(DEBUG_USART_PORT, DEBUG_USART_PIN, &suc))); + assert_param(suc); } /** Init the hardware peripheral - this is called early in the boot process */ void DebugUart_PreInit(void) { - __HAL_RCC_USART2_CLK_ENABLE(); - __HAL_RCC_GPIOA_CLK_ENABLE(); + // configure AF only if platform uses AF numbers +#if !PLAT_NO_AFNUM + configure_gpio_alternate(DEBUG_USART_PORT, DEBUG_USART_PIN, DEBUG_USART_AF); +#endif + + if (DEBUG_USART == USART1) { + __HAL_RCC_USART1_CLK_ENABLE(); + } + else if (DEBUG_USART == USART2) { + __HAL_RCC_USART2_CLK_ENABLE(); + } + else if (DEBUG_USART == USART3) { + __HAL_RCC_USART3_CLK_ENABLE(); + } +#ifdef USART4 + else if (DEBUG_USART == USART4) { + __HAL_RCC_USART4_CLK_ENABLE(); + } +#endif +#ifdef USART5 + else if (DEBUG_USART == USART5) { + __HAL_RCC_USART5_CLK_ENABLE(); + } +#endif - LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_2, LL_GPIO_MODE_ALTERNATE); - LL_GPIO_SetPinOutputType(GPIOA, LL_GPIO_PIN_2, LL_GPIO_OUTPUT_PUSHPULL); - LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_2, LL_GPIO_SPEED_FREQ_HIGH); +// LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_2, LL_GPIO_MODE_ALTERNATE); +// LL_GPIO_SetPinOutputType(GPIOA, LL_GPIO_PIN_2, LL_GPIO_OUTPUT_PUSHPULL); +// LL_GPIO_SetPinSpeed(GPIOA, LL_GPIO_PIN_2, LL_GPIO_SPEED_FREQ_HIGH); // commented out default values // LL_USART_ConfigAsyncMode(USART2); @@ -33,30 +101,9 @@ void DebugUart_PreInit(void) // LL_USART_SetParity(USART2, LL_USART_PARITY_NONE); // LL_USART_SetStopBitsLength(USART2, LL_USART_STOPBITS_1); // LL_USART_SetHWFlowCtrl(USART2, LL_USART_HWCONTROL_NONE); - LL_USART_EnableDirectionTx(USART2); - -#if GEX_PLAT_F072_DISCOVERY - LL_USART_SetBaudRate(USART2, SystemCoreClock, LL_USART_OVERSAMPLING_16, 115200); // This is not great, let's hope it's like this on all platforms... - LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_1); -#elif GEX_PLAT_F103_BLUEPILL - LL_USART_SetBaudRate(USART2, SystemCoreClock/2, 115200); // This is not great, let's hope it's like this on all platforms... -#elif GEX_PLAT_F303_DISCOVERY - LL_USART_SetBaudRate(USART2, - LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE), - LL_USART_OVERSAMPLING_16, - 115200); - LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_7); // uart2 is AF7 here -#elif GEX_PLAT_F407_DISCOVERY - LL_USART_SetBaudRate(USART2, - SystemCoreClock/4, // if core is at 168 MHz, this is 48 MHz - LL_USART_OVERSAMPLING_16, - 115200); - LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_7); // uart2 is AF7 here (same like 303) -#else - #error "BAD PLATFORM!" -#endif - - LL_USART_Enable(USART2); + LL_USART_EnableDirectionTx(DEBUG_USART); + LL_USART_SetBaudRate(DEBUG_USART, DEBUG_USART_PCLK, LL_USART_OVERSAMPLING_16, DEBUG_USART_BAUD); + LL_USART_Enable(DEBUG_USART); } /** Debug print, used by debug / newlib */ @@ -67,8 +114,8 @@ ssize_t _write_r(struct _reent *rptr, int fd, const void *buf, size_t len) uint8_t *buff = buf; for (uint32_t i = 0; i < len; i++) { - while (!LL_USART_IsActiveFlag_TC(USART2)); - LL_USART_TransmitData8(USART2, *buff++); + while (!LL_USART_IsActiveFlag_TC(DEBUG_USART)); + LL_USART_TransmitData8(DEBUG_USART, *buff++); } return len; diff --git a/platform/pin_utils.c b/platform/pin_utils.c index 3df83c7..ef9fc79 100644 --- a/platform/pin_utils.c +++ b/platform/pin_utils.c @@ -266,7 +266,7 @@ void deinit_unit_pins(Unit *unit) { for (uint32_t rsc = R_PA0; rsc <= R_PF15; rsc++) { if (RSC_IS_HELD(unit->resources, rsc)) { -// dbg("Freeing pin %s", rsc_get_name((Resource)rsc)); + rsc_dbg("Freeing pin %s", rsc_get_name((Resource)rsc)); GPIO_TypeDef *port = port_periphs[(rsc-R_PA0) / 16]; uint32_t ll_pin = ll_pins[(rsc-R_PA0)%16]; LL_GPIO_SetPinMode(port, ll_pin, LL_GPIO_MODE_ANALOG); diff --git a/platform/pin_utils.h b/platform/pin_utils.h index 0b2413a..5c7f21e 100644 --- a/platform/pin_utils.h +++ b/platform/pin_utils.h @@ -126,4 +126,11 @@ error_t configure_gpio_alternate(char port_name, uint8_t pin_num, uint32_t ll_af */ error_t configure_sparse_pins(char port_name, uint16_t mask, GPIO_TypeDef **port_dest, uint32_t ll_mode, uint32_t ll_otype); +/** Helper struct for defining alternate mappings */ +struct PinAF { + char port; + uint8_t pin; + uint8_t af; +}; + #endif //GEX_PIN_UTILS_H diff --git a/platform/plat_compat.h b/platform/plat_compat.h index cd6345e..598e53c 100644 --- a/platform/plat_compat.h +++ b/platform/plat_compat.h @@ -12,13 +12,13 @@ #if DISABLE_MSC #define TSK_STACK_MAIN 100 // without MSC the stack usage is significantly lower #else - #define TSK_STACK_MAIN 160 + #define TSK_STACK_MAIN 170 #endif #define TSK_STACK_MSG 220 // TF message handler task stack size (all unit commands run on this thread) #define BULK_READ_BUF_LEN 256 // Buffer for TF bulk reads -#define UNIT_TMP_LEN 512 // Buffer for bulk read and varions internal unit operations +#define UNIT_TMP_LEN 512 // Buffer for bulk read and various internal unit operations #define FLASH_SAVE_BUF_LEN 128 // Static buffer for saving to flash @@ -57,16 +57,19 @@ // PLAT_USB_OTGFS - uses the USB OTG IP, needs different config code // PLAT_LOCK_BTN - use a lock button instead of a lock jumper (push to toggle) // PLAT_LOCK_1CLOSED - lock jumper is active (closed / button pressed) in logical 1 +// PLAT_NO_AFNUM - legacy platform without numbered AF alternatives #if defined(GEX_PLAT_F103_BLUEPILL) // platform name for the version string #define GEX_PLATFORM "STM32F103-Bluepill" #define PLAT_AHB_MHZ 72 + #define PLAT_APB1_MHZ 36 // feature flags #define PLAT_FLASHBANKS 1 #define PLAT_NO_FLOATING_INPUTS 1 + #define PLAT_NO_AFNUM 1 #include #include @@ -114,6 +117,7 @@ // platform name for the version string #define GEX_PLATFORM "STM32F072-Discovery" #define PLAT_AHB_MHZ 48 + #define PLAT_APB1_MHZ 48 #include #include @@ -161,6 +165,8 @@ // platform name for the version string #define GEX_PLATFORM "STM32F303-Discovery" #define PLAT_AHB_MHZ 72 + #define PLAT_APB1_MHZ 36 + #define PLAT_APB2_MHZ 72 #include #include @@ -211,6 +217,8 @@ // platform name for the version string #define GEX_PLATFORM "STM32F407-Discovery" #define PLAT_AHB_MHZ 168 + #define PLAT_APB1_MHZ 48 + #define PLAT_APB2_MHZ 96 #define PLAT_USB_PHYCLOCK 1 #define PLAT_USB_OTGFS 1 @@ -263,4 +271,8 @@ #error "BAD PLATFORM! Please select GEX platform using a -DGEX_PLAT_* compile flag" #endif +#define PLAT_AHB_HZ (PLAT_AHB_MHZ*1000000) +#define PLAT_APB1_HZ (PLAT_APB1_MHZ*1000000) +#define PLAT_APB2_HZ (PLAT_APB2_MHZ*1000000) + #endif //GEX_PLAT_COMPAT_H diff --git a/platform/platform.c b/platform/platform.c index d0387e8..b885b41 100644 --- a/platform/platform.c +++ b/platform/platform.c @@ -14,23 +14,23 @@ #include "units/neopixel/unit_neopixel.h" #include "units/i2c/unit_i2c.h" #include "units/test/unit_test.h" -#include "units/usart/unit_uart.h" +#include "units/usart/unit_usart.h" #include "units/spi/unit_spi.h" void plat_init_resources(void) { uint32_t rv = 0; - // switch everything ON (we should not write reserved bits, but nothing bad seems to happen) - RCC->APB1ENR = 0xFFFFFFFF; - RCC->APB2ENR = 0xFFFFFFFF; - RCC->AHBENR = 0xFFFFFFFF; // GPIOs are here - -// __HAL_RCC_GPIOA_CLK_ENABLE(); -// __HAL_RCC_GPIOB_CLK_ENABLE(); -// __HAL_RCC_GPIOC_CLK_ENABLE(); -// __HAL_RCC_GPIOD_CLK_ENABLE(); -// __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); +#ifdef GPIOE + __HAL_RCC_GPIOE_CLK_ENABLE(); +#endif +#ifdef GPIOF + __HAL_RCC_GPIOF_CLK_ENABLE(); +#endif // --- Common unit drivers --- @@ -103,6 +103,7 @@ void plat_init_resources(void) rsc_free_range(NULL, R_TIM6, R_TIM7); rsc_free_range(NULL, R_TIM14, R_TIM17); rsc_free_range(NULL, R_USART1, R_USART4); + rsc_free_range(NULL, R_DMA1_1, R_DMA1_7); rsc_free_range(NULL, R_PA0, R_PA15); rsc_free_range(NULL, R_PB0, R_PB15); diff --git a/units/i2c/unit_i2c.c b/units/i2c/unit_i2c.c index 5804a6b..19b9da4 100644 --- a/units/i2c/unit_i2c.c +++ b/units/i2c/unit_i2c.c @@ -239,6 +239,12 @@ static error_t UI2C_init(Unit *unit) configure_gpio_alternate(portname, pin_sda, af_i2c); configure_gpio_alternate(portname, pin_scl, af_i2c); + if (priv->periph_num == 1) { + __HAL_RCC_I2C1_CLK_ENABLE(); + } else { + __HAL_RCC_I2C2_CLK_ENABLE(); + } + /* Disable the selected I2Cx Peripheral */ LL_I2C_Disable(priv->periph); LL_I2C_ConfigFilters(priv->periph, @@ -264,6 +270,12 @@ static void UI2C_deInit(Unit *unit) if (unit->status == E_SUCCESS) { assert_param(priv->periph); LL_I2C_DeInit(priv->periph); + + if (priv->periph_num == 1) { + __HAL_RCC_I2C1_CLK_DISABLE(); + } else { + __HAL_RCC_I2C2_CLK_DISABLE(); + } } // Release all resources diff --git a/units/spi/unit_spi.c b/units/spi/unit_spi.c index 28f595e..405e154 100644 --- a/units/spi/unit_spi.c +++ b/units/spi/unit_spi.c @@ -306,6 +306,12 @@ static error_t USPI_init(Unit *unit) priv->ssn_port->BSRR = priv->ssn_pins; } + if (priv->periph_num == 1) { + __HAL_RCC_SPI1_CLK_ENABLE(); + } else { + __HAL_RCC_SPI2_CLK_ENABLE(); + } + // Configure SPI - must be configured under reset LL_SPI_Disable(priv->periph); { @@ -341,6 +347,12 @@ static void USPI_deInit(Unit *unit) if (unit->status == E_SUCCESS) { assert_param(priv->periph); LL_SPI_DeInit(priv->periph); + + if (priv->periph_num == 1) { + __HAL_RCC_SPI1_CLK_DISABLE(); + } else { + __HAL_RCC_SPI2_CLK_DISABLE(); + } } // Release all resources diff --git a/units/usart/unit_uart.c b/units/usart/unit_usart.c similarity index 82% rename from units/usart/unit_uart.c rename to units/usart/unit_usart.c index 995d8cf..728e739 100644 --- a/units/usart/unit_uart.c +++ b/units/usart/unit_usart.c @@ -2,12 +2,11 @@ // Created by MightyPork on 2018/01/02. // -#include #include "platform.h" #include "comm/messages.h" #include "unit_base.h" #include "utils/avrlibc.h" -#include "unit_uart.h" +#include "unit_usart.h" // SPI master @@ -229,12 +228,11 @@ static void UUSART_writeIni(Unit *unit, IniWriter *iw) iw_comment(iw, "Peripheral number (UARTx 1-4)"); iw_entry(iw, "device", "%d", (int)priv->periph_num); - iw_comment(iw, "Pin mappings (TX,RX,CK,CTS,RTS)"); + iw_comment(iw, "Pin mappings (TX,RX,CK,CTS,RTS/DE)"); #if GEX_PLAT_F072_DISCOVERY - // TODO iw_comment(iw, " USART1: (0) A9,A10,A8,A11,A12 (1) B6,B7,A8,A11,A12"); - iw_comment(iw, " USART2: (0) A2,A3,A4,A0,A1 (1) D5,D6,D7,D3,D4"); - iw_comment(iw, " USART3: (0) B10,B11,B12,B13,B14 (1) D8,D9,D10,D11,D12"); + iw_comment(iw, " USART2: (0) A2,A3,A4,A0,A1 (1) A14,A15,A4,A0,A1"); + iw_comment(iw, " USART3: (0) B10,B11,B12,B13,B14"); iw_comment(iw, " USART4: (0) A0,A1,C12,B7,A15 (1) C10,C11,C12,B7,A15"); #elif GEX_PLAT_F103_BLUEPILL #error "NO IMPL" @@ -306,19 +304,12 @@ static void UUSART_writeIni(Unit *unit, IniWriter *iw) // ------------------------------------------------------------------------ -struct paf { - char port; - uint8_t pin; - uint8_t af; -}; - -/** Finalize unit set-up */ -static error_t UUSART_init(Unit *unit) +/** Claim the peripheral and assign priv->periph */ +static error_t UUSART_ClaimPeripheral(Unit *unit) { - bool suc = true; struct priv *priv = unit->data; - if (!(priv->periph_num >= 1 && priv->periph_num <= 4)) { + if (!(priv->periph_num >= 1 && priv->periph_num <= 5)) { dbg("!! Bad USART periph"); return E_BAD_CONFIG; } @@ -328,52 +319,78 @@ static error_t UUSART_init(Unit *unit) TRY(rsc_claim(unit, R_USART1)); priv->periph = USART1; } -#if defined(USART2) else if (priv->periph_num == 2) { TRY(rsc_claim(unit, R_USART2)); priv->periph = USART2; } -#endif -#if defined(USART3) else if (priv->periph_num == 3) { TRY(rsc_claim(unit, R_USART3)); priv->periph = USART3; } -#endif #if defined(USART4) else if (priv->periph_num == 4) { TRY(rsc_claim(unit, R_USART4)); priv->periph = USART4; } +#endif +#if defined(USART5) + else if (priv->periph_num == 5) { + TRY(rsc_claim(unit, R_USART5)); + priv->periph = USART5; + } #endif else return E_BAD_CONFIG; + return E_SUCCESS; +} +/** Claim and configure GPIOs used */ +static error_t UUSART_ConfigurePins(Unit *unit) +{ + struct priv *priv = unit->data; // This is written for F072, other platforms will need adjustments // Configure UART pins (AF) - const struct paf *mappings = NULL; +#define want_ck_pin(priv) ((priv)->clock_output) +#define want_tx_pin(priv) (bool)((priv)->direction & 2) +#define want_rx_pin(priv) (bool)((priv)->direction & 1) +#define want_cts_pin(priv) ((priv)->hw_flow_control==2 || (priv)->hw_flow_control==3) +#define want_rts_pin(priv) ((priv)->de_output || (priv)->hw_flow_control==1 || (priv)->hw_flow_control==3) + + /* List of required pins based on the user config */ + bool pins_wanted[5] = { + want_ck_pin(priv), + want_tx_pin(priv), + want_rx_pin(priv), + want_cts_pin(priv), + want_rts_pin(priv) + }; - // TODO #if GEX_PLAT_F072_DISCOVERY - const struct paf mapping_1_0[5] = { + + const struct PinAF *mappings = NULL; + + // TODO adjust this, possibly remove / split to individual pin config for .. + // the final board + + const struct PinAF mapping_1_0[5] = { {'A', 8, LL_GPIO_AF_1}, // CK {'A', 9, LL_GPIO_AF_1}, // TX {'A', 10, LL_GPIO_AF_1}, // RX - {'A', 11, LL_GPIO_AF_1}, // CTS - {'A', 12, LL_GPIO_AF_1}, // RTS + {'A', 11, LL_GPIO_AF_1}, // CTS - collides with USB + {'A', 12, LL_GPIO_AF_1}, // RTS - collides with USB }; - const struct paf mapping_1_1[5] = { - {'A', 8, LL_GPIO_AF_1}, // CK + const struct PinAF mapping_1_1[5] = { + {'A', 8, LL_GPIO_AF_1}, // CK* {'B', 6, LL_GPIO_AF_1}, // TX {'B', 7, LL_GPIO_AF_1}, // RX - {'A', 11, LL_GPIO_AF_1}, // CTS - {'A', 12, LL_GPIO_AF_1}, // RTS + {'A', 11, LL_GPIO_AF_1}, // CTS* - collides with USB + {'A', 12, LL_GPIO_AF_1}, // RTS* - collides with USB }; - const struct paf mapping_2_0[5] = { + const struct PinAF mapping_2_0[5] = { {'A', 4, LL_GPIO_AF_1}, // CK {'A', 2, LL_GPIO_AF_1}, // TX {'A', 3, LL_GPIO_AF_1}, // RX @@ -381,15 +398,15 @@ static error_t UUSART_init(Unit *unit) {'A', 1, LL_GPIO_AF_1}, // RTS }; - const struct paf mapping_2_1[5] = { - {'D', 7, LL_GPIO_AF_0}, // CK - {'D', 5, LL_GPIO_AF_0}, // TX - {'D', 6, LL_GPIO_AF_0}, // RX - {'D', 3, LL_GPIO_AF_0}, // CTS - {'D', 4, LL_GPIO_AF_0}, // RTS + const struct PinAF mapping_2_1[5] = { + {'A', 4, LL_GPIO_AF_1}, // CK* + {'A', 14, LL_GPIO_AF_1}, // TX + {'A', 15, LL_GPIO_AF_1}, // RX + {'A', 0, LL_GPIO_AF_1}, // CTS* + {'A', 1, LL_GPIO_AF_1}, // RTS* }; - const struct paf mapping_3_0[5] = { + const struct PinAF mapping_3_0[5] = { {'B', 12, LL_GPIO_AF_4}, // CK {'B', 10, LL_GPIO_AF_4}, // TX {'B', 11, LL_GPIO_AF_4}, // RX @@ -397,15 +414,7 @@ static error_t UUSART_init(Unit *unit) {'B', 14, LL_GPIO_AF_4}, // RTS }; - const struct paf mapping_3_1[5] = { - {'D', 10, LL_GPIO_AF_0}, // CK - {'D', 8, LL_GPIO_AF_0}, // TX - {'D', 9, LL_GPIO_AF_0}, // RX - {'D', 11, LL_GPIO_AF_0}, // CTS - {'D', 12, LL_GPIO_AF_0}, // RTS - }; - - const struct paf mapping_4_0[5] = { + const struct PinAF mapping_4_0[5] = { {'C', 12, LL_GPIO_AF_0}, // CK {'A', 0, LL_GPIO_AF_4}, // TX {'A', 1, LL_GPIO_AF_4}, // RX @@ -413,12 +422,12 @@ static error_t UUSART_init(Unit *unit) {'A', 15, LL_GPIO_AF_4}, // RTS }; - const struct paf mapping_4_1[5] = { - {'C', 12, LL_GPIO_AF_0}, // CK + const struct PinAF mapping_4_1[5] = { + {'C', 12, LL_GPIO_AF_0}, // CK* {'C', 10, LL_GPIO_AF_0}, // TX {'C', 11, LL_GPIO_AF_0}, // RX - {'B', 7, LL_GPIO_AF_4}, // CTS - {'A', 15, LL_GPIO_AF_4}, // RTS + {'B', 7, LL_GPIO_AF_4}, // CTS* + {'A', 15, LL_GPIO_AF_4}, // RTS* }; if (priv->periph_num == 1) { @@ -436,7 +445,6 @@ static error_t UUSART_init(Unit *unit) else if (priv->periph_num == 3) { // USART3 if (priv->remap == 0) mappings = &mapping_3_0[0]; - else if (priv->remap == 1) mappings = &mapping_3_1[0]; else return E_BAD_CONFIG; } else if (priv->periph_num == 4) { @@ -446,7 +454,15 @@ static error_t UUSART_init(Unit *unit) else return E_BAD_CONFIG; } else return E_BAD_CONFIG; - // TODO other periphs + + // Apply mappings based on the 'wanted' table + for (int i = 0; i < 5; i++) { + if (pins_wanted[i]) { + if (mappings[i].port == 0) return E_BAD_CONFIG; + TRY(rsc_claim_pin(unit, mappings[i].port, mappings[i].pin)); + configure_gpio_alternate(mappings[i].port, mappings[i].pin, mappings[i].af); + } + } #elif GEX_PLAT_F103_BLUEPILL #error "NO IMPL" @@ -458,39 +474,45 @@ static error_t UUSART_init(Unit *unit) #error "BAD PLATFORM!" #endif - // CK - if (priv->clock_output) { - TRY(rsc_claim_pin(unit, mappings[0].port, mappings[0].pin)); - configure_gpio_alternate( mappings[0].port, mappings[0].pin, mappings[0].af); + return E_SUCCESS; +} + +/** Finalize unit set-up */ +static error_t UUSART_init(Unit *unit) +{ + bool suc = true; + struct priv *priv = unit->data; + + TRY(UUSART_ClaimPeripheral(unit)); + TRY(UUSART_ConfigurePins(unit)); + + // --- Configure the peripheral --- + + // Enable clock for the peripheral used + if (priv->periph_num == 1) { + __HAL_RCC_USART1_CLK_ENABLE(); } - // TX - if (priv->direction & 2) { - TRY(rsc_claim_pin(unit, mappings[1].port, mappings[1].pin)); - configure_gpio_alternate( mappings[1].port, mappings[1].pin, mappings[1].af); + else if (priv->periph_num == 2) { + __HAL_RCC_USART2_CLK_ENABLE(); } - // RX - if (priv->direction & 1) { - TRY(rsc_claim_pin(unit, mappings[2].port, mappings[2].pin)); - configure_gpio_alternate( mappings[2].port, mappings[2].pin, mappings[2].af); + else if (priv->periph_num == 3) { + __HAL_RCC_USART3_CLK_ENABLE(); } - // CTS - if (priv->hw_flow_control==2 || priv->hw_flow_control==3) { - TRY(rsc_claim_pin(unit, mappings[4].port, mappings[4].pin)); - configure_gpio_alternate( mappings[4].port, mappings[4].pin, mappings[4].af); +#ifdef USART4 + else if (priv->periph_num == 4) { + __HAL_RCC_USART4_CLK_ENABLE(); } - // RTS - if (priv->de_output || priv->hw_flow_control==1 || priv->hw_flow_control==3) { - TRY(rsc_claim_pin(unit, mappings[5].port, mappings[5].pin)); - configure_gpio_alternate( mappings[5].port, mappings[5].pin, mappings[5].af); +#endif +#ifdef USART5 + else if (priv->periph_num == 5) { + __HAL_RCC_USART5_CLK_ENABLE(); } +#endif LL_USART_Disable(priv->periph); { LL_USART_DeInit(priv->periph); - LL_USART_SetBaudRate(priv->periph, - PLAT_AHB_MHZ*1000000,//FIXME this isn't great ... - LL_USART_OVERSAMPLING_16, - priv->baudrate); + LL_USART_SetBaudRate(priv->periph, PLAT_APB1_HZ, LL_USART_OVERSAMPLING_16, priv->baudrate); LL_USART_SetParity(priv->periph, priv->parity == 0 ? LL_USART_PARITY_NONE : @@ -515,10 +537,8 @@ static error_t UUSART_init(Unit *unit) : LL_USART_HWCONTROL_RTS_CTS); LL_USART_ConfigClock(priv->periph, - priv->cpha ? LL_USART_PHASE_2EDGE - : LL_USART_PHASE_1EDGE, - priv->cpol ? LL_USART_POLARITY_HIGH - : LL_USART_POLARITY_LOW, + priv->cpha ? LL_USART_PHASE_2EDGE : LL_USART_PHASE_1EDGE, + priv->cpol ? LL_USART_POLARITY_HIGH : LL_USART_POLARITY_LOW, true); // clock on last bit - TODO configurable? if (priv->clock_output) @@ -571,6 +591,27 @@ static void UUSART_deInit(Unit *unit) if (unit->status == E_SUCCESS) { assert_param(priv->periph); LL_USART_DeInit(priv->periph); + + // Disable clock + if (priv->periph_num == 1) { + __HAL_RCC_USART1_CLK_DISABLE(); + } + else if (priv->periph_num == 2) { + __HAL_RCC_USART2_CLK_DISABLE(); + } + else if (priv->periph_num == 3) { + __HAL_RCC_USART3_CLK_DISABLE(); + } +#ifdef USART4 + else if (priv->periph_num == 4) { + __HAL_RCC_USART4_CLK_DISABLE(); + } +#endif +#ifdef USART5 + else if (priv->periph_num == 5) { + __HAL_RCC_USART5_CLK_DISABLE(); + } +#endif } // Release all resources @@ -588,7 +629,6 @@ static error_t usart_wait_until_flag(struct priv *priv, uint32_t flag, bool stop uint32_t t_start = HAL_GetTick(); while (((priv->periph->ISR & flag) != 0) != stop_state) { if (HAL_GetTick() - t_start > 10) { - dbg("ERR waiting for ISR flag 0x%p = %d", (void*)flag, (int)stop_state); return E_HW_TIMEOUT; } } @@ -617,13 +657,7 @@ static error_t UUSART_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, struct priv *priv = unit->data; switch (command) { - case CMD_WRITE: - dbg("Tx req. CR1 0x%p, CR2 0x%p, CR3 0x%p, BRR 0x%p", - (void*)priv->periph->CR1, - (void*)priv->periph->CR2, - (void*)priv->periph->CR3, - (void*)priv->periph->BRR); - + case CMD_WRITE:; uint32_t len; const uint8_t *pld = pp_tail(pp, &len); diff --git a/units/usart/unit_uart.h b/units/usart/unit_usart.h similarity index 100% rename from units/usart/unit_uart.h rename to units/usart/unit_usart.h