untested new onewire commands (all except search algos)
This commit is contained in:
@@ -19,7 +19,11 @@ struct priv {
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GPIO_TypeDef *port;
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uint32_t ll_pin;
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TimerHandle_t busyWaitTimer; // timer used to wait for ds1820 measurement completion
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bool busy; // flag used when the timer is running
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uint32_t busyStart;
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TF_ID busyRequestId;
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};
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// Prototypes
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+218
-35
@@ -78,7 +78,37 @@ static void U1WIRE_writeIni(Unit *unit, IniWriter *iw)
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static void U1WIRE_TimerCb(TimerHandle_t xTimer)
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{
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Unit *unit = pvTimerGetTimerID(xTimer);
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assert_param(unit);
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struct priv *priv = unit->data;
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assert_param(priv->busy);
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if (priv->parasitic) {
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// this is the end of the 750ms measurement time
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goto halt_ok;
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} else {
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bool ready = ow_read_bit(unit);
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if (ready) {
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goto halt_ok;
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}
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uint32_t time = PTIM_GetTime();
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if (time - priv->busyStart > 1000) {
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dbg("Timeout 1s not ready. Stopping polling timer.");
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xTimerStop(xTimer, 100);
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com_respond_error(priv->busyRequestId, E_HW_TIMEOUT);
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priv->busy = false;
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dbg("Done, timer stopped.");
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}
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}
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return;
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halt_ok:
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dbg("End of measurement, stopping timer");
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xTimerStop(xTimer, 100);
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com_respond_ok(priv->busyRequestId);
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priv->busy = false;
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dbg("Done, timer stopped.");
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}
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/** Allocate data structure and set defaults */
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@@ -88,7 +118,12 @@ static error_t U1WIRE_preInit(Unit *unit)
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if (priv == NULL) return E_OUT_OF_MEM;
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// the timer is not started until needed
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priv->busyWaitTimer = xTimerCreate("1w_tim", 750, false, unit, U1WIRE_TimerCb);
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priv->busyWaitTimer = xTimerCreate("1w_tim", // name
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750, // interval (will be changed when starting it)
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true, // periodic (we use this only for the polling variant, the one-shot will stop the timer in the CB)
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unit, // user data
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U1WIRE_TimerCb); // callback
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if (priv->busyWaitTimer == NULL) return E_OUT_OF_MEM;
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// some defaults
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@@ -141,52 +176,200 @@ static void U1WIRE_deInit(Unit *unit)
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// ------------------------------------------------------------------------
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enum PinCmd_ {
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CMD_TEST = 0,
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CMD_CHECK_PRESENCE = 0, // simply tests that any devices are attached
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CMD_SEARCH_ADDR = 1, // perform a scan of the bus, retrieving all found device ROMs
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CMD_SEARCH_ALARM = 2, // like normal scan, but retrieve only devices with alarm
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CMD_READ_ADDR = 3, // read the ROM code from a single device (for single-device bus)
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CMD_SKIP_WRITE = 10, // write multiple bytes using the SKIP_ROM command
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CMD_SKIP_READ = 11, // write and read multiple bytes using the SKIP_ROM command
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CMD_MATCH_WRITE = 12, // write multiple bytes using a ROM address
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CMD_MATCH_READ = 13, // write and read multiple bytes using a ROM address
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CMD_POLL_FOR_1 = 20,
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CMD_TEST = 100,
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};
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/** send the match-rom with address from a payload parser, or skip-rom */
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static void cmd_match_skip(Unit *unit, uint8_t command, PayloadParser *pp)
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{
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uint64_t addr;
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if (command == CMD_MATCH_WRITE || command == CMD_MATCH_READ) {
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addr = pp_u64(pp);
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ow_write_u8(unit, OW_ROM_MATCH);
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ow_write_u64(unit, addr);
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}
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else {
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ow_write_u8(unit, OW_ROM_SKIP);
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}
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}
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/** Handle a request message */
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static error_t U1WIRE_handleRequest(Unit *unit, TF_ID frame_id, uint8_t command, PayloadParser *pp)
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{
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struct priv *priv = unit->data;
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bool presence;
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uint64_t addr;
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int remain;
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if (priv->busy) return E_BUSY;
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switch (command) {
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/** Write byte(s) - addr:u16, byte(s) */
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case CMD_TEST:;
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bool presence = ow_reset(unit);
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if (!presence) return E_HW_TIMEOUT;
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ow_write_u8(unit, OW_ROM_SKIP);
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ow_write_u8(unit, OW_DS1820_CONVERT_T);
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while (!ow_read_bit(unit));
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// TODO use knowledge of the use/non-use of parasitic mode to pick the optimal strategy (non-parasitic allows polling)
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// osDelay(750);
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// TODO this will be done with an async timer
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// If parasitive power is not used, we could poll and check the status bit
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/** Simply check presence of any devices on the bus. Responds with SUCCESS or HW_TIMEOUT */
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case CMD_CHECK_PRESENCE:
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dbg("Test presence");
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// reset
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presence = ow_reset(unit);
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if (!presence) return E_HW_TIMEOUT;
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ow_write_u8(unit, OW_ROM_SKIP);
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ow_write_u8(unit, OW_DS1820_READ_SCRATCH);
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uint16_t temp = ow_read_u16(unit);
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uint16_t threg = ow_read_u16(unit);
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uint16_t reserved = ow_read_u16(unit);
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uint8_t cnt_remain = ow_read_u8(unit);
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uint8_t cnt_per_c = ow_read_u8(unit);
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uint8_t crc = ow_read_u8(unit);
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// TODO check CRC
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PayloadBuilder pb = pb_start(unit_tmp512, UNIT_TMP_LEN, NULL);
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pb_u16(&pb, temp);
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pb_u8(&pb, cnt_remain);
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pb_u8(&pb, cnt_per_c);
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dbg("respond ...");
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com_respond_buf(frame_id, MSG_SUCCESS, pb.start, pb_length(&pb));
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// build response
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com_respond_ok(frame_id);
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return E_SUCCESS;
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/** Read address of the single device on the bus - returns u64 */
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case CMD_READ_ADDR:
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dbg("Write ADDR");
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// reset
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presence = ow_reset(unit);
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if (!presence) return E_HW_TIMEOUT;
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// command
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ow_write_u8(unit, OW_ROM_READ);
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// read the ROM code
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addr = ow_read_u64(unit);
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// build response
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PayloadBuilder pb = pb_start(unit_tmp512, UNIT_TMP_LEN, NULL);
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pb_u64(&pb, addr);
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com_respond_pb(frame_id, MSG_SUCCESS, &pb);
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return E_SUCCESS;
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/**
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* Write payload to the bus, no confirmation (unless requested).
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*
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* Payload:
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* - Match variant: addr:u64, rest:write_data
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* - Skip variant: all:write_data
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*/
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case CMD_MATCH_WRITE:
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case CMD_SKIP_WRITE:
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dbg("Write cmd");
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// reset
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presence = ow_reset(unit);
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if (!presence) return E_HW_TIMEOUT;
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// MATCH_ROM+addr, or SKIP_ROM
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cmd_match_skip(unit, command, pp);
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// write the rest of the payload
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remain = pp_length(pp);
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for (int i = 0; i < remain; i++) {
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ow_write_u8(unit, pp_u8(pp));
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}
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return E_SUCCESS;
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/**
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* Write and read.
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*
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* Payload:
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* - Match variant: addr:u64, read_len:u16, rest:write_data
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* - Skip variant: read_len:u16, rest:write_data
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*/
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case CMD_MATCH_READ:
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case CMD_SKIP_READ:;
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dbg("Read cmd");
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// reset
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presence = ow_reset(unit);
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if (!presence) return E_HW_TIMEOUT;
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// MATCH_ROM+addr, or SKIP_ROM
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cmd_match_skip(unit, command, pp);
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// paylod prefix - number of bytes to read
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uint16_t rcount = pp_u16(pp);
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// write the rest of the payload
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remain = pp_length(pp);
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for (int i = 0; i < remain; i++) {
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ow_write_u8(unit, pp_u8(pp));
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}
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// read the requested number of bytes
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for (int i = 0; i < rcount; i++) {
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unit_tmp512[i] = ow_read_u8(unit);
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}
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// build response
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com_respond_buf(frame_id, MSG_SUCCESS, (const uint8_t *) unit_tmp512, rcount);
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return E_SUCCESS;
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/**
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* This is the delay function for DS1820 measurements.
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*
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* Parasitic: Returns success after the required 750ms
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* Non-parasitic: Returns SUCCESS after device responds '1', HW_TIMEOUT after 1s
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*/
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case CMD_POLL_FOR_1:
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dbg("Poll for 1 - start");
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if (priv->parasitic) {
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assert_param(pdPASS == xTimerChangePeriod(priv->busyWaitTimer, 750, 100));
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}
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else {
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// every 10 ticks
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assert_param(pdPASS == xTimerChangePeriod(priv->busyWaitTimer, 10, 100));
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}
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assert_param(pdPASS == xTimerReset(priv->busyWaitTimer, 100));
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priv->busy = true;
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priv->busyStart = PTIM_GetTime();
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priv->busyRequestId = frame_id;
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dbg("Timer dispatched");
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return E_SUCCESS; // We will respond when the timer expires
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//
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// case CMD_TEST:;
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// bool presence = ow_reset(unit);
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// if (!presence) return E_HW_TIMEOUT;
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//
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// ow_write_u8(unit, OW_ROM_SKIP);
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//
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// ow_write_u8(unit, OW_DS1820_CONVERT_T);
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// while (!ow_read_bit(unit));
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//
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// // TODO use knowledge of the use/non-use of parasitic mode to pick the optimal strategy (non-parasitic allows polling)
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//
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// // osDelay(750);
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// // TODO this will be done with an async timer
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// // If parasitive power is not used, we could poll and check the status bit
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//
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// presence = ow_reset(unit);
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// if (!presence) return E_HW_TIMEOUT;
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// ow_write_u8(unit, OW_ROM_SKIP);
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//
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// ow_write_u8(unit, OW_DS1820_READ_SCRATCH);
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//
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// uint16_t temp = ow_read_u16(unit);
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// uint16_t threg = ow_read_u16(unit);
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// uint16_t reserved = ow_read_u16(unit);
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// uint8_t cnt_remain = ow_read_u8(unit);
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// uint8_t cnt_per_c = ow_read_u8(unit);
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// uint8_t crc = ow_read_u8(unit);
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// // TODO check CRC
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//
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// pb = pb_start(unit_tmp512, UNIT_TMP_LEN, NULL);
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// pb_u16(&pb, temp);
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// pb_u8(&pb, cnt_remain);
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// pb_u8(&pb, cnt_per_c);
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//
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// dbg("respond ...");
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// com_respond_buf(frame_id, MSG_SUCCESS, pb.start, pb_length(&pb));
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// return E_SUCCESS;
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default:
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return E_UNKNOWN_COMMAND;
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}
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