gex/gex-core
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

fixes and start of ADC. Not really working yet

Browse Source
This commit is contained in:
MightyPork
2018-02-03 22:06:31 +01:00
parent 538a4876b2
commit 3ebc19fc2d
37 changed files with 503 additions and 74 deletions
Download Patch File Download Diff File Expand all files Collapse all files
platform/debug_uart.c
+4 -1
View File
@@ -66,7 +66,10 @@ void DebugUart_PreInit(void)
{
// configure AF only if platform uses AF numbers
#if !PLAT_NO_AFNUM
hw_configure_gpio_af(DEBUG_USART_PORT, DEBUG_USART_PIN, DEBUG_USART_AF);
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wunused-result"
(void) hw_configure_gpio_af(DEBUG_USART_PORT, DEBUG_USART_PIN, DEBUG_USART_AF);
#pragma GCC diagnostic pop
#endif
hw_periph_clock_enable(DEBUG_USART);
platform/hw_utils.c
+83 -4
View File
@@ -4,6 +4,7 @@
#include "platform.h"
#include <utils/avrlibc.h>
#include <math.h>
#include "hw_utils.h"
#include "macro.h"
@@ -263,16 +264,64 @@ char * pinmask2str(uint16_t pins, char *buffer)
if (!first) {
b += SPRINTF(b, ", ");
}
if (start == (uint32_t)(i+1)) {
b += SPRINTF(b, "%"PRIu32, start);
}
// else if (start == (uint32_t)(i+2)) {
// // exception for 2-long ranges - don't show as range
// b += SPRINTF(b, "%"PRIu32",%"PRIu32, start, i + 1);
// }
else {
b += SPRINTF(b, "%"PRIu32"-%"PRIu32, start, i + 1);
}
first = false;
on = false;
}
}
}
return buffer;
}
char * pinmask2str_up(uint16_t pins, char *buffer)
{
char *b = buffer;
uint32_t start = 0;
bool on = false;
bool first = true;
// shortcut if none are set
if (pins == 0) {
buffer[0] = 0;
return buffer;
}
for (int32_t i = 0; i <= 16; i++) {
bool bit;
if (i == 16) {
bit = false;
} else {
bit = 0 != (pins & 1);
pins >>= 1;
}
if (bit) {
if (!on) {
start = (uint32_t) i;
on = true;
}
} else {
if (on) {
if (!first) {
b += SPRINTF(b, ", ");
}
if (start == (uint32_t)(i-1)) {
b += SPRINTF(b, "%"PRIu32, start);
}
else {
b += SPRINTF(b, "%"PRIu32"-%"PRIu32, start, i - 1);
}
first = false;
on = false;
}
@@ -387,6 +436,36 @@ error_t hw_configure_sparse_pins(char port_name, uint16_t mask, GPIO_TypeDef **p
return E_SUCCESS;
}
/** Solve a timer/counter's count and prescaller value */
bool solve_timer(uint32_t base_freq, uint32_t required_freq, bool is16bit,
uint16_t *presc, uint32_t *count, float *real_freq)
{
if (required_freq == 0) return false;
const float fPresc = base_freq / required_freq;
uint32_t wCount = (uint32_t) lrintf(fPresc);
const uint32_t ceil = is16bit ? UINT16_MAX : UINT32_MAX;
uint32_t wPresc = 1;
while (wCount > ceil) {
wPresc <<= 1;
wCount >>= 1;
}
if (wPresc > ceil || count == 0) {
return false;
}
*count = wCount;
*presc = (uint16_t) wPresc;
if (wPresc * wCount == 0) return false;
*real_freq = (base_freq / (wPresc * wCount));
return true;
}
void hw_periph_clock_enable(void *periph)
{
// GPIOs are enabled by default on start-up
platform/hw_utils.h
+29 -2
View File
@@ -78,6 +78,7 @@ uint16_t parse_pinmask(const char *value, bool *suc);
/**
* Convert a pin bitmap to the ASCII format understood by str_parse_pinmask()
* This is the downto variant (15..0)
*
* @param pins - sparse pin map
* @param buffer - output string buffer
@@ -85,6 +86,16 @@ uint16_t parse_pinmask(const char *value, bool *suc);
*/
char * pinmask2str(uint16_t pins, char *buffer);
/**
* Convert a pin bitmap to the ASCII format understood by str_parse_pinmask()
* This is the ascending variant (0..15)
*
* @param pins - sparse pin map
* @param buffer - output string buffer
* @return the output buffer
*/
char * pinmask2str_up(uint16_t pins, char *buffer);
/**
* Spread packed port pins using a mask
*
@@ -126,7 +137,7 @@ void hw_deinit_unit_pins(Unit *unit);
* @param ll_af - LL alternate function constant
* @return success
*/
error_t hw_configure_gpio_af(char port_name, uint8_t pin_num, uint32_t ll_af);
error_t hw_configure_gpio_af(char port_name, uint8_t pin_num, uint32_t ll_af) __attribute__((warn_unused_result));
/**
* Configure multiple pins using the bitmap pattern
@@ -140,7 +151,7 @@ error_t hw_configure_gpio_af(char port_name, uint8_t pin_num, uint32_t ll_af);
*/
error_t hw_configure_sparse_pins(char port_name,
uint16_t mask, GPIO_TypeDef **port_dest,
uint32_t ll_mode, uint32_t ll_otype);
uint32_t ll_mode, uint32_t ll_otype) __attribute__((warn_unused_result));
/** Helper struct for defining alternate mappings */
struct PinAF {
@@ -161,6 +172,22 @@ void hw_periph_clock_enable(void *periph);
*/
void hw_periph_clock_disable(void *periph);
/**
* Solve a timer/counter's count and prescaller value to meet the desired
* overflow frequency. The resulting values are the dividing factors;
* subtract 1 before writing them into the peripheral registers.
*
* @param[in] base_freq - the counter's input clock frequency in Hz
* @param[in] required_freq - desired overflow frequency
* @param[in] is16bit - limit counter to 16 bits (prescaller is always 16-bit)
* @param[out] presc - field for storing the computed prescaller value
* @param[out] count - field for storing the computed counter value
* @param[out] real_freq - field for storing the computed real frequency
* @return true on success
*/
bool solve_timer(uint32_t base_freq, uint32_t required_freq, bool is16bit,
uint16_t *presc, uint32_t *count, float *real_freq);
// ---------- LL extras ------------
static inline bool LL_DMA_IsActiveFlag_G(uint32_t isr_snapshot, uint8_t channel)
platform/irq_dispatcher.c
+59 -10
View File
@@ -61,6 +61,10 @@ static struct callbacks_ {
struct cbslot dma2_7;
struct cbslot dma2_8;
struct cbslot tim6;
struct cbslot tim7;
struct cbslot tim15;
// XXX add more callbacks here when needed
} callbacks;
@@ -68,41 +72,62 @@ void irqd_init(void)
{
memset(&callbacks, 0, sizeof(callbacks));
// TODO move the priorities to some define
// NVIC_EnableIRQ(WWDG_IRQn); /*!< Window WatchDog Interrupt */
// NVIC_EnableIRQ(PVD_VDDIO2_IRQn); /*!< PVD & VDDIO2 Interrupt through EXTI Lines 16 and 31 */
// NVIC_EnableIRQ(RTC_IRQn); /*!< RTC Interrupt through EXTI Lines 17, 19 and 20 */
// NVIC_EnableIRQ(FLASH_IRQn); /*!< FLASH global Interrupt */
// NVIC_EnableIRQ(RCC_CRS_IRQn); /*!< RCC & CRS global Interrupt */
NVIC_EnableIRQ(EXTI0_1_IRQn); /*!< EXTI Line 0 and 1 Interrupt */
NVIC_EnableIRQ(EXTI2_3_IRQn); /*!< EXTI Line 2 and 3 Interrupt */
NVIC_EnableIRQ(EXTI4_15_IRQn); /*!< EXTI Line 4 to 15 Interrupt */
HAL_NVIC_SetPriority(EXTI0_1_IRQn, 2, 0);
HAL_NVIC_SetPriority(EXTI2_3_IRQn, 2, 0);
HAL_NVIC_SetPriority(EXTI4_15_IRQn, 2, 0);
// NVIC_EnableIRQ(TSC_IRQn); /*!< Touch Sensing Controller Interrupts */
NVIC_EnableIRQ(DMA1_Channel1_IRQn); /*!< DMA1 Channel 1 Interrupt */
NVIC_EnableIRQ(DMA1_Channel2_3_IRQn); /*!< DMA1 Channel 2 and Channel 3 Interrupt */
NVIC_EnableIRQ(DMA1_Channel4_5_6_7_IRQn); /*!< DMA1 Channel 4 to Channel 7 Interrupt */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 3, 0);
HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 3, 0);
HAL_NVIC_SetPriority(DMA1_Channel4_5_6_7_IRQn, 3, 0);
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 2, 0);
HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 2, 0);
HAL_NVIC_SetPriority(DMA1_Channel4_5_6_7_IRQn, 2, 0);
// NVIC_EnableIRQ(ADC1_COMP_IRQn); /*!< ADC1 and COMP interrupts (ADC interrupt combined with EXTI Lines 21 and 22 */
// NVIC_EnableIRQ(TIM1_IRQn); /*!< TIM1 global Interrupt */
// NVIC_EnableIRQ(TIM2_IRQn); /*!< TIM2 global Interrupt */
// NVIC_EnableIRQ(TIM3_IRQn); /*!< TIM3 global Interrupt */
// NVIC_EnableIRQ(TIM6_DAC_IRQn); /*!< TIM6 global and DAC channel underrun error Interrupt */
// NVIC_EnableIRQ(TIM7_IRQn); /*!< TIM7 global Interrupt */
// --used internally-- NVIC_EnableIRQ(TIM14_IRQn); /*!< TIM14 global Interrupt */
// NVIC_EnableIRQ(TIM15_IRQn); /*!< TIM15 global Interrupt */
NVIC_EnableIRQ(TIM6_DAC_IRQn); /*!< TIM6 global and DAC channel underrun error Interrupt */
HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0); // Used for DAC timing
NVIC_EnableIRQ(TIM7_IRQn); /*!< TIM7 global Interrupt */
HAL_NVIC_SetPriority(TIM7_IRQn, 2, 0);
/* Tim14 is used for HAL timebase, because SysTick is used to time FreeRTOS and has the lowest priority. */
/* Tim14's priority is set to 0 in the init routine, which runs early in the startup sequence */
// NVIC_EnableIRQ(TIM14_IRQn); /*!< TIM14 global Interrupt */
NVIC_EnableIRQ(TIM15_IRQn); /*!< TIM15 global Interrupt */
HAL_NVIC_SetPriority(TIM15_IRQn, 2, 0);
// NVIC_EnableIRQ(TIM16_IRQn); /*!< TIM16 global Interrupt */
// NVIC_EnableIRQ(TIM17_IRQn); /*!< TIM17 global Interrupt */
// NVIC_EnableIRQ(I2C1_IRQn); /*!< I2C1 Event Interrupt & EXTI Line23 Interrupt (I2C1 wakeup) */
// NVIC_EnableIRQ(I2C2_IRQn); /*!< I2C2 Event Interrupt */
// NVIC_EnableIRQ(SPI1_IRQn); /*!< SPI1 global Interrupt */
// NVIC_EnableIRQ(SPI2_IRQn); /*!< SPI2 global Interrupt */
NVIC_EnableIRQ(USART1_IRQn); /*!< USART1 global Interrupt & EXTI Line25 Interrupt (USART1 wakeup) */
NVIC_EnableIRQ(USART2_IRQn); /*!< USART2 global Interrupt & EXTI Line26 Interrupt (USART2 wakeup) */
NVIC_EnableIRQ(USART3_4_IRQn); /*!< USART3 and USART4 global Interrupt */
HAL_NVIC_SetPriority(USART1_IRQn, 3, 0);
HAL_NVIC_SetPriority(USART2_IRQn, 3, 0);
HAL_NVIC_SetPriority(USART3_4_IRQn, 3, 0);
HAL_NVIC_SetPriority(USART1_IRQn, 2, 0);
HAL_NVIC_SetPriority(USART2_IRQn, 2, 0);
HAL_NVIC_SetPriority(USART3_4_IRQn, 2, 0);
// NVIC_EnableIRQ(CEC_CAN_IRQn); /*!< CEC and CAN global Interrupts & EXTI Line27 Interrupt */
// NVIC_EnableIRQ(TIM1_BRK_UP_TRG_COM_IRQn); /*!< TIM1 Break, Update, Trigger and Commutation Interrupt */ // - handled by hal msp init
@@ -130,6 +155,10 @@ static struct cbslot *get_slot_for_periph(void *periph)
else if (periph == USART5) slot = &callbacks.usart5;
#endif
else if (periph == TIM6) slot = &callbacks.tim6;
else if (periph == TIM7) slot = &callbacks.tim7;
else if (periph == TIM15) slot = &callbacks.tim15;
else if (periph >= EXTIS[0] && periph <= EXTIS[15]) {
slot = &callbacks.exti[periph - EXTIS[0]];
}
@@ -265,6 +294,26 @@ void EXTI4_15_IRQHandler(void)
}
// ------------ INTERRUPTS -------------
// TIM14 is used to generate HAL timebase and its handler is in the file "timebase.c"
void TIM6_DAC_IRQHandler(void)
{
CALL_IRQ_HANDLER(callbacks.tim6);
}
void TIM7_IRQHandler(void)
{
CALL_IRQ_HANDLER(callbacks.tim7);
}
void TIM15_IRQHandler(void)
{
CALL_IRQ_HANDLER(callbacks.tim15);
}
// other ISRs...
#if 0
platform/platform.c
+2
View File
@@ -13,6 +13,7 @@
#include "units/neopixel/unit_neopixel.h"
#include "units/i2c/unit_i2c.h"
#include "units/1wire/unit_1wire.h"
#include "units/adc/unit_adc.h"
#include "units/test/unit_test.h"
#include "units/usart/unit_usart.h"
#include "units/spi/unit_spi.h"
@@ -84,6 +85,7 @@ void plat_init_resources(void)
ureg_add_type(&UNIT_SPI);
ureg_add_type(&UNIT_USART);
ureg_add_type(&UNIT_1WIRE);
ureg_add_type(&UNIT_ADC);
// Free all present resources
{
platform/platform.h
+1
View File
@@ -13,6 +13,7 @@
#include <stddef.h>
#include <string.h>
#include <malloc.h>
#include <math.h>
// FreeRTOS includes
#include <cmsis_os.h>
platform/timebase.c
+2
View File
@@ -15,6 +15,8 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
// This makes it a good choice for the timebase generation. We set it to generate
// an interrupt every 1 ms
assert_param(TickPriority == 0); // any other setting can lead to crashes
// - TIM14 is always up-counting
// - using APB1 clock
__HAL_RCC_TIM14_CLK_ENABLE();