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compat with 072hub

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This commit is contained in:
MightyPork
2018-03-07 22:03:41 +01:00
parent 76d1cd3a24
commit 274f2be6e0
11 changed files with 73 additions and 48 deletions
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units/spi/_spi_init.c
+17 -17
View File
@@ -63,7 +63,7 @@ error_t USPI_init(Unit *unit)
uint32_t af_spi;
// TODO
#if GEX_PLAT_F072_DISCOVERY
#if STM32F072xB
// SPI1 - many options
// sck, miso, mosi, af
@@ -83,14 +83,14 @@ error_t USPI_init(Unit *unit)
pin_miso = 4;
pin_mosi = 5;
}
else if (priv->remap == 2) {
// large packages only
spi_portname = 'E';
af_spi = LL_GPIO_AF_1;
pin_sck = 13;
pin_miso = 14;
pin_mosi = 15;
}
// else if (priv->remap == 2) {
// // large packages only
// spi_portname = 'E';
// af_spi = LL_GPIO_AF_1;
// pin_sck = 13;
// pin_miso = 14;
// pin_mosi = 15;
// }
else {
return E_BAD_CONFIG;
}
@@ -104,14 +104,14 @@ error_t USPI_init(Unit *unit)
pin_miso = 14;
pin_mosi = 15;
}
else if (priv->remap == 1) {
// NOTE: the's also a incomplete remap in PB and PC
spi_portname = 'D';
af_spi = LL_GPIO_AF_0;
pin_sck = 1;
pin_miso = 3;
pin_mosi = 4;
}
// else if (priv->remap == 1) {
// // NOTE: there's also an incomplete remap in PB and PC
// spi_portname = 'D';
// af_spi = LL_GPIO_AF_0;
// pin_sck = 1;
// pin_miso = 3;
// pin_mosi = 4;
// }
else {
return E_BAD_CONFIG;
}
units/spi/_spi_settings.c
+3 -3
View File
@@ -102,9 +102,9 @@ void USPI_writeIni(Unit *unit, IniWriter *iw)
// TODO show a legend for peripherals and remaps
iw_comment(iw, "Pin mappings (SCK,MISO,MOSI)");
#if GEX_PLAT_F072_DISCOVERY
iw_comment(iw, " SPI1: (0) A5,A6,A7 (1) B3,B4,B5 (2) E13,E14,E15");
iw_comment(iw, " SPI2: (0) B13,B14,B15 (1) D1,D3,D4");
#if STM32F072xB
iw_comment(iw, " SPI1: (0) A5,A6,A7 (1) B3,B4,B5"); // (2) E13,E14,E15
iw_comment(iw, " SPI2: (0) B13,B14,B15"); // (1) D1,D3,D4
#elif GEX_PLAT_F103_BLUEPILL
#error "NO IMPL"
#elif GEX_PLAT_F303_DISCOVERY