builds with f407

platform/debug_uart.c

@@ -48,6 +48,12 @@ void DebugUart_PreInit(void)
                          LL_USART_OVERSAMPLING_16,
                          115200);
     LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_7); // uart2 is AF7 here
+#elif GEX_PLAT_F407_DISCOVERY
+    LL_USART_SetBaudRate(USART2,
+                         SystemCoreClock/4, // if core is at 168 MHz, this is 48 MHz
+                         LL_USART_OVERSAMPLING_16,
+                         115200);
+    LL_GPIO_SetAFPin_0_7(GPIOA, LL_GPIO_PIN_2, LL_GPIO_AF_7); // uart2 is AF7 here (same like 303)
 #else
     #error "BAD PLATFORM!"
 #endif
@@ -74,6 +80,8 @@ ssize_t _write_r(struct _reent *rptr, int fd, const void *buf, size_t len)
 
 // No-uart variant
 void DebugUart_Init(void) {}
-ssize_t _write_r(struct _reent *rptr, int fd, const void *buf, size_t len) {}
+ssize_t _write_r(struct _reent *rptr, int fd, const void *buf, size_t len) {
+    return len;
+}
 
 #endif //USE_DEBUG_UART

platform/plat_compat.h

@@ -150,6 +150,9 @@
 // platform name for the version string
     #define GEX_PLATFORM "STM32F407-Discovery"
 
+    #define PLAT_USB_PHYCLOCK 1
+    #define PLAT_USB_OTGFS 1
+
     #include <stm32f4xx.h>
     #include <stm32f4xx_hal.h>
     #include <stm32f4xx_ll_adc.h>
@@ -175,9 +178,11 @@
     #include <stm32f4xx_ll_utils.h>
 
     // size, determines position of the flash storage
-    #define FLASH_SIZE (1024*1024)
-    #define SETTINGS_BLOCK_SIZE (1024*2) // this must be a multiple of FLASH pages
-    #define SETTINGS_FLASH_ADDR (0x08000000 + FLASH_SIZE - SETTINGS_BLOCK_SIZE)
+
+    // we use the first 128kB sector. Unfortunately the whole sector must be erased before writing.
+    #define SETTINGS_FLASH_SECTOR 6
+    #define SETTINGS_BLOCK_SIZE (1024*2)
+    #define SETTINGS_FLASH_ADDR (0x08000000 + (16*4+64)*1024)
 
     // Number of GPIO ports A,B,C...
     #define PORTS_COUNT 6

platform/platform.c

@@ -75,7 +75,7 @@ void plat_init_resources(void)
     // Platform F073RBT - free all present resources
     {
         rsc_free(NULL, R_ADC1);
-        rsc_free(NULL, R_CAN);
+        rsc_free(NULL, R_CAN1);
         rsc_free_range(NULL, R_COMP1, R_COMP2);
         rsc_free(NULL, R_DAC1);
         rsc_free(NULL, R_HDMI_CEC);
@@ -121,7 +121,7 @@ void plat_init_resources(void)
     // Platform F303VCT - free all present resources
     {
         rsc_free_range(NULL, R_ADC1, R_ADC4);
-        rsc_free(NULL, R_CAN);
+        rsc_free(NULL, R_CAN1);
         rsc_free_range(NULL, R_COMP1, R_COMP7);
         rsc_free(NULL, R_HDMI_CEC);
         rsc_free(NULL, R_DAC1);
@@ -164,6 +164,55 @@ void plat_init_resources(void)
         // BOOT pin(s)
         ok &= rsc_claim(&UNIT_SYSTEM, R_PB2); // BOOT1
 
+        assert_param(ok);
+    }
+#elif defined(GEX_PLAT_F407_DISCOVERY)
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+
+    // Platform F407VGT - free all present resources
+    {
+        rsc_free_range(NULL, R_ADC1, R_ADC3);
+        rsc_free_range(NULL, R_CAN1, R_CAN2);
+        rsc_free_range(NULL, R_COMP1, R_COMP7);
+        rsc_free(NULL, R_DAC1);
+        rsc_free(NULL, R_DCMI);
+        rsc_free(NULL, R_ETH);
+        rsc_free(NULL, R_FSMC);
+        rsc_free_range(NULL, R_I2C1, R_I2C3);
+        rsc_free_range(NULL, R_I2S2, R_I2S3);
+        rsc_free(NULL, R_SDIO);
+        rsc_free_range(NULL, R_SPI1, R_SPI3);
+        rsc_free_range(NULL, R_TIM1, R_TIM14);
+        rsc_free_range(NULL, R_USART1, R_USART3);
+        rsc_free(NULL, R_USART6);
+
+        rsc_free_range(NULL, R_PA0, R_PA15);
+        rsc_free_range(NULL, R_PB0, R_PB15);
+        rsc_free_range(NULL, R_PC0, R_PC15);
+        rsc_free_range(NULL, R_PD0, R_PD15);
+        rsc_free_range(NULL, R_PE0, R_PE15);
+        // also has 2 PH pins
+
+        // F407 appears to have fewer GPIOs than F303?
+    }
+
+    // Claim resources not available due to board layout or internal usage
+    {
+        bool ok = true;
+
+        // HAL timebase
+        ok &= rsc_claim(&UNIT_SYSTEM, R_TIM1);
+        // HSE crystal
+        // H0 and H1
+        // SWD
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PA13);
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PA14);
+        // USB
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PA11);
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PA12);
+        // BOOT pin(s)
+        ok &= rsc_claim(&UNIT_SYSTEM, R_PB2); // BOOT1
+
         assert_param(ok);
     }
 #else
@@ -179,10 +228,10 @@ void plat_init_resources(void)
  */
 void plat_usb_reconnect(void)
 {
-#ifdef GEX_PLAT_F103_BLUEPILL
+    // TODO add better reset methods available on different chips
+
     // F103 doesn't have pull-up control, this is probably the best we can do
     // This does not seem to trigger descriptors reload.
     USBD_LL_Reset(&hUsbDeviceFS);
-#endif
 }