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//
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// Created by MightyPork on 2018/01/14.
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//
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#include "platform.h"
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#include "unit_base.h"
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#include "unit_usart.h"
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#define UUSART_INTERNAL
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#include "_usart_internal.h"
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/** Load from a binary buffer stored in Flash */
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void UUSART_loadBinary(Unit *unit, PayloadParser *pp)
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{
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struct priv *priv = unit->data;
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uint8_t version = pp_u8(pp);
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(void)version;
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priv->periph_num = pp_u8(pp);
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priv->remap = pp_u8(pp);
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priv->baudrate = pp_u32(pp);
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priv->parity = pp_u8(pp);
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priv->stopbits = pp_u8(pp);
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priv->direction = pp_u8(pp);
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priv->hw_flow_control = pp_u8(pp);
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priv->clock_output = pp_bool(pp);
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priv->cpol = pp_bool(pp);
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priv->cpha = pp_bool(pp);
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priv->lsb_first = pp_bool(pp);
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priv->width = pp_u8(pp);
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priv->data_inv = pp_bool(pp);
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priv->rx_inv = pp_bool(pp);
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priv->tx_inv = pp_bool(pp);
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priv->de_output = pp_bool(pp);
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priv->de_polarity = pp_bool(pp);
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priv->de_assert_time = pp_u8(pp);
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priv->de_clear_time = pp_u8(pp);
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}
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/** Write to a binary buffer for storing in Flash */
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void UUSART_writeBinary(Unit *unit, PayloadBuilder *pb)
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{
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struct priv *priv = unit->data;
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pb_u8(pb, 0); // version
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pb_u8(pb, priv->periph_num);
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pb_u8(pb, priv->remap);
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pb_u32(pb, priv->baudrate);
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pb_u8(pb, priv->parity);
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pb_u8(pb, priv->stopbits);
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pb_u8(pb, priv->direction);
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pb_u8(pb, priv->hw_flow_control);
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pb_bool(pb, priv->clock_output);
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pb_bool(pb, priv->cpol);
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pb_bool(pb, priv->cpha);
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pb_bool(pb, priv->lsb_first);
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pb_u8(pb, priv->width);
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pb_bool(pb, priv->data_inv);
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pb_bool(pb, priv->rx_inv);
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pb_bool(pb, priv->tx_inv);
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pb_bool(pb, priv->de_output);
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pb_bool(pb, priv->de_polarity);
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pb_u8(pb, priv->de_assert_time);
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pb_u8(pb, priv->de_clear_time);
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}
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/** Parse a key-value pair from the INI file */
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error_t UUSART_loadIni(Unit *unit, const char *key, const char *value)
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{
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bool suc = true;
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struct priv *priv = unit->data;
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if (streq(key, "device")) {
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priv->periph_num = cfg_u8_parse(value, &suc);
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}
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else if (streq(key, "remap")) {
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priv->remap = cfg_u8_parse(value, &suc);
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}
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else if (streq(key, "baud-rate")) {
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priv->baudrate = cfg_u32_parse(value, &suc);
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}
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else if (streq(key, "parity")) {
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priv->parity = (uint8_t) cfg_enum3_parse(value,
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"NONE", 0,
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"ODD", 1,
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"EVEN", 2, &suc);
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}
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else if (streq(key, "stop-bits")) {
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priv->stopbits = (uint8_t) cfg_enum4_parse(value,
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"0.5", 0,
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"1", 1,
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"1.5", 2,
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"2", 3, &suc);
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}
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else if (streq(key, "direction")) {
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priv->direction = (uint8_t) cfg_enum3_parse(value,
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"RX", UUSART_DIRECTION_RX,
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"TX", UUSART_DIRECTION_TX,
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"RXTX", UUSART_DIRECTION_RXTX, &suc);
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}
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else if (streq(key, "hw-flow-control")) {
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priv->hw_flow_control = (uint8_t) cfg_enum4_parse(value,
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"NONE", 0,
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"RTS", 1,
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"CTS", 2,
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"FULL", 3, &suc);
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}
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else if (streq(key, "word-width")) {
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priv->width = cfg_u8_parse(value, &suc);
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}
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else if (streq(key, "first-bit")) {
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priv->lsb_first = (bool) cfg_enum2_parse(value, "MSB", 0, "LSB", 1, &suc);
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}
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else if (streq(key, "clock-output")) {
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priv->clock_output = cfg_bool_parse(value, &suc);
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}
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else if (streq(key, "cpol")) {
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priv->cpol = cfg_bool_parse(value, &suc);
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}
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else if (streq(key, "cpha")) {
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priv->cpha = cfg_bool_parse(value, &suc);
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}
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else if (streq(key, "de-output")) {
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priv->de_output = cfg_bool_parse(value, &suc);
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}
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else if (streq(key, "de-polarity")) {
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priv->de_polarity = cfg_bool_parse(value, &suc);
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}
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else if (streq(key, "de-assert-time")) {
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priv->de_assert_time = cfg_u8_parse(value, &suc);
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}
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else if (streq(key, "de-clear-time")) {
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priv->de_clear_time = cfg_u8_parse(value, &suc);
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}
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else {
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return E_BAD_KEY;
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}
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if (!suc) return E_BAD_VALUE;
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return E_SUCCESS;
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}
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/** Generate INI file section for the unit */
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void UUSART_writeIni(Unit *unit, IniWriter *iw)
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{
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struct priv *priv = unit->data;
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iw_comment(iw, "Peripheral number (UARTx 1-4)");
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iw_entry(iw, "device", "%d", (int)priv->periph_num);
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iw_comment(iw, "Pin mappings (TX,RX,CK,CTS,RTS/DE)");
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#if GEX_PLAT_F072_DISCOVERY
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iw_comment(iw, " USART1: (0) A9,A10,A8,A11,A12 (1) B6,B7,A8,A11,A12");
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iw_comment(iw, " USART2: (0) A2,A3,A4,A0,A1 (1) A14,A15,A4,A0,A1");
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iw_comment(iw, " USART3: (0) B10,B11,B12,B13,B14");
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iw_comment(iw, " USART4: (0) A0,A1,C12,B7,A15 (1) C10,C11,C12,B7,A15");
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#elif GEX_PLAT_F103_BLUEPILL
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#error "NO IMPL"
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#elif GEX_PLAT_F303_DISCOVERY
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#error "NO IMPL"
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#elif GEX_PLAT_F407_DISCOVERY
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#error "NO IMPL"
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#else
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#error "BAD PLATFORM!"
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#endif
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iw_entry(iw, "remap", "%d", (int)priv->remap);
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iw_cmt_newline(iw);
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iw_comment(iw, "Baud rate in bps (eg. 9600, 115200)"); // TODO examples/range
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iw_entry(iw, "baud-rate", "%d", (int)priv->baudrate);
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iw_comment(iw, "Parity type (NONE, ODD, EVEN)");
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iw_entry(iw, "parity", cfg_enum3_encode(priv->parity,
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0, "NONE",
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1, "ODD",
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2, "EVEN"));
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iw_comment(iw, "Number of stop bits (0.5, 1, 1.5, 2)");
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iw_entry(iw, "stop-bits", cfg_enum4_encode(priv->stopbits,
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0, "0.5",
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1, "1",
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2, "1.5",
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3, "2"));
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iw_comment(iw, "Bit order (LSB or MSB first)");
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iw_entry(iw, "first-bit", cfg_enum2_encode((uint32_t) priv->lsb_first,
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0, "MSB",
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1, "LSB"));
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iw_comment(iw, "Word width (7,8,9) - including parity bit if used");
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iw_entry(iw, "word-width", "%d", (int)priv->width);
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iw_comment(iw, "Enabled lines (RX,TX,RXTX)");
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iw_entry(iw, "direction", cfg_enum3_encode(priv->direction,
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1, "RX",
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2, "TX",
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3, "RXTX"));
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iw_comment(iw, "Hardware flow control (NONE, RTS, CTS, FULL)");
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iw_entry(iw, "hw-flow-control", cfg_enum4_encode(priv->hw_flow_control,
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0, "NONE",
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1, "RTS",
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2, "CTS",
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3, "FULL"));
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iw_cmt_newline(iw);
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iw_comment(iw, "Generate serial clock (Y,N)");
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iw_entry(iw, "clock-output", str_yn(priv->clock_output));
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iw_comment(iw, "Output clock polarity: 0,1 (clock idle level)");
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iw_entry(iw, "cpol", "%d", (int)priv->cpol);
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iw_comment(iw, "Output clock phase: 0,1 (active edge, 0-first, 1-second)");
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iw_entry(iw, "cpha", "%d", (int)priv->cpha);
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iw_cmt_newline(iw);
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iw_comment(iw, "Generate RS485 Driver Enable signal (Y,N) - uses RTS pin");
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iw_entry(iw, "de-output", str_yn(priv->de_output));
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iw_comment(iw, "DE active level: 0,1");
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iw_entry(iw, "de-polarity", "%d", (int)(priv->de_polarity));
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iw_comment(iw, "DE assert time (0-31)");
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iw_entry(iw, "de-assert-time", "%d", (int)(priv->de_assert_time));
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iw_comment(iw, "DE clear time (0-31)");
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iw_entry(iw, "de-clear-time", "%d", (int)(priv->de_clear_time));
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}
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