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//
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// Created by MightyPork on 2017/11/26.
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//
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#include "platform.h"
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#include "utils/avrlibc.h"
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#include "hw_utils.h"
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/** Convert pin number to LL bitfield */
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uint32_t hw_pin2ll(uint8_t pin_number, bool *suc)
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{
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assert_param(suc != NULL);
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if(pin_number > 15) {
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dbg("Bad pin: %d", pin_number);
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// TODO proper report
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*suc = false;
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return 0;
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}
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return LL_GPIO_PINS[pin_number];
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}
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/** Convert port name (A,B,C...) to peripheral struct pointer */
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GPIO_TypeDef *hw_port2periph(char port_name, bool *suc)
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{
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assert_param(suc != NULL);
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if(port_name < 'A' || port_name >= ('A'+PORTS_COUNT)) {
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dbg("Bad port: %c", port_name); // TODO proper report
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*suc = false;
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return NULL;
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}
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uint8_t num = (uint8_t) (port_name - 'A');
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return GPIO_PERIPHS[num];
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}
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/** Convert a pin resource to it's LL lib values */
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bool hw_pinrsc2ll(Resource rsc, GPIO_TypeDef **port, uint32_t *llpin)
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{
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if (rsc > R_PF15) return false;
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uint32_t index = rsc - R_PA0;
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uint32_t pname = (index/16);
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uint8_t pnum = (uint8_t) (index % 16);
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if (pname >= PORTS_COUNT) return false;
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*port = GPIO_PERIPHS[pname];
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*llpin = LL_GPIO_PINS[pnum];
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return true;
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}
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#pragma GCC push_options
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#pragma GCC optimize ("O2")
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/** spread a packed pinfield using a mask */
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uint32_t pinmask_spread_32(uint32_t packed, uint32_t mask)
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{
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uint32_t result = 0;
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uint32_t poke = 1;
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if(packed == 0) return 0;
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for (int i = 0; i < 32; i++) {
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if (mask & 1) {
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if (packed & poke) {
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result |= 1<<i;
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packed ^= poke;
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if (packed == 0) break;
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}
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poke <<= 1;
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}
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mask >>= 1;
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// if (mask == 0) break;
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}
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return result;
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}
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/** Pack spread port pins using a mask */
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uint32_t pinmask_pack_32(uint32_t spread, uint32_t mask)
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{
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uint32_t result = 0;
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uint32_t poke = 1;
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for (int i = 0; i<32; i++) {
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if (mask & 1) {
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if (spread & (1<<i)) {
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result |= poke;
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spread ^= (1<<i);
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if (spread == 0) break;
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}
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poke <<= 1;
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}
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mask >>= 1;
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// if (mask == 0) break;
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}
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return result;
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}
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#pragma GCC pop_options
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/** Configure unit pins as analog (part of unit teardown) */
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void hw_deinit_unit_pins(Unit *unit)
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{
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for (uint32_t rsc = R_PA0; rsc <= R_PF15; rsc++) {
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if (RSC_IS_HELD(unit->resources, (Resource)rsc)) {
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rsc_dbg("Freeing pin %s", rsc_get_name((Resource)rsc));
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GPIO_TypeDef *port = GPIO_PERIPHS[(rsc-R_PA0) / 16];
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uint32_t ll_pin = LL_GPIO_PINS[(rsc-R_PA0)%16];
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LL_GPIO_SetPinMode(port, ll_pin, LL_GPIO_MODE_ANALOG);
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}
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}
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}
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/** Configure a pin to alternate function */
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error_t hw_configure_gpio_af(char port_name, uint8_t pin_num, uint32_t ll_af)
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{
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#if PLAT_NO_AFNUM
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trap("Illegal call to hw_configure_gpio_af() on this platform");
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#else
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bool suc = true;
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GPIO_TypeDef *port = hw_port2periph(port_name, &suc);
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uint32_t ll_pin = hw_pin2ll(pin_num, &suc);
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if (!suc) return E_BAD_CONFIG;
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if (pin_num < 8)
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LL_GPIO_SetAFPin_0_7(port, ll_pin, ll_af);
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else
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LL_GPIO_SetAFPin_8_15(port, ll_pin, ll_af);
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LL_GPIO_SetPinMode(port, ll_pin, LL_GPIO_MODE_ALTERNATE);
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#endif
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return E_SUCCESS;
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}
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/** Configure pins using sparse map */
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error_t hw_configure_sparse_pins(char port_name, uint16_t mask, GPIO_TypeDef **port_dest,
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uint32_t ll_mode, uint32_t ll_otype)
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{
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bool suc = true;
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GPIO_TypeDef *port = hw_port2periph(port_name, &suc);
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if (!suc) return E_BAD_CONFIG;
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for (int i = 0; i < 16; i++) {
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if (mask & (1<<i)) {
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uint32_t ll_pin = hw_pin2ll((uint8_t) i, &suc);
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LL_GPIO_SetPinMode(port, ll_pin, ll_mode);
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LL_GPIO_SetPinOutputType(port, ll_pin, ll_otype);
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LL_GPIO_SetPinSpeed(port, ll_pin, LL_GPIO_SPEED_FREQ_HIGH);
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}
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}
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if (port_dest != NULL) {
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*port_dest = port;
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}
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return E_SUCCESS;
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}
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/** Solve a timer/counter's count and prescaller value */
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bool hw_solve_timer(uint32_t base_freq, uint32_t required_freq, bool is16bit,
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uint16_t *presc, uint32_t *count, float *real_freq)
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{
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if (required_freq == 0) return false;
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// XXX consider using the LL macros __LL_TIM_CALC_PSC and __LL_TIM_CALC_ARR
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const float fPresc = base_freq / required_freq;
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uint32_t wCount = (uint32_t) lrintf(fPresc);
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const uint32_t ceil = is16bit ? UINT16_MAX : UINT32_MAX;
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uint32_t wPresc = 1;
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while (wCount > ceil) {
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wPresc <<= 1;
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wCount >>= 1;
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}
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if (wPresc > ceil || count == 0) {
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return false;
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}
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*count = wCount;
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*presc = (uint16_t) wPresc;
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if (wPresc * wCount == 0) return false;
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if (real_freq != NULL) {
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*real_freq = (base_freq / (wPresc * wCount));
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}
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return true;
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}
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void hw_periph_clock_enable(void *periph)
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{
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// GPIOs are enabled by default on start-up
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// --- USART ---
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if (periph == USART1) __HAL_RCC_USART1_CLK_ENABLE();
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else if (periph == USART2) __HAL_RCC_USART2_CLK_ENABLE();
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#ifdef USART3
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else if (periph == USART3) __HAL_RCC_USART3_CLK_ENABLE();
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#endif
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#ifdef USART4
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else if (periph == USART4) __HAL_RCC_USART4_CLK_ENABLE();
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#endif
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#ifdef USART5
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else if (periph == USART5) __HAL_RCC_USART5_CLK_ENABLE();
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#endif
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// --- SPI ---
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else if (periph == SPI1) __HAL_RCC_SPI1_CLK_ENABLE();
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#ifdef SPI2
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else if (periph == SPI2) __HAL_RCC_SPI2_CLK_ENABLE();
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#endif
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#ifdef SPI3
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else if (periph == SPI3) __HAL_RCC_SPI3_CLK_ENABLE();
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#endif
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// --- I2C ---
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else if (periph == I2C1) __HAL_RCC_I2C1_CLK_ENABLE();
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else if (periph == I2C2) __HAL_RCC_I2C2_CLK_ENABLE();
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#ifdef I2C3
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else if (periph == I2C3) __HAL_RCC_I2C3_CLK_ENABLE();
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#endif
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// --- DMA ---
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else if (periph == DMA1) __HAL_RCC_DMA1_CLK_ENABLE();
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#ifdef DMA2
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else if (periph == DMA2) __HAL_RCC_DMA2_CLK_ENABLE();
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#endif
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// --- TIM ---
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else if (periph == TIM1) __HAL_RCC_TIM1_CLK_ENABLE();
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else if (periph == TIM2) __HAL_RCC_TIM2_CLK_ENABLE();
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else if (periph == TIM3) __HAL_RCC_TIM3_CLK_ENABLE();
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#ifdef TIM4
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else if (periph == TIM4) __HAL_RCC_TIM4_CLK_ENABLE();
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#endif
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#ifdef TIM5
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else if (periph == TIM5) __HAL_RCC_TIM5_CLK_ENABLE();
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#endif
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#ifdef TIM6
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else if (periph == TIM6) __HAL_RCC_TIM7_CLK_ENABLE();
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#endif
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#ifdef TIM7
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else if (periph == TIM7) __HAL_RCC_TIM7_CLK_ENABLE();
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#endif
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#ifdef TIM8
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else if (periph == TIM8) __HAL_RCC_TIM8_CLK_ENABLE();
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#endif
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#ifdef TIM9
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else if (periph == TIM9) __HAL_RCC_TIM9_CLK_ENABLE();
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#endif
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#ifdef TIM11
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else if (periph == TIM11) __HAL_RCC_TIM11_CLK_ENABLE();
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#endif
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#ifdef TIM12
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else if (periph == TIM12) __HAL_RCC_TIM12_CLK_ENABLE();
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#endif
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#ifdef TIM13
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else if (periph == TIM13) __HAL_RCC_TIM13_CLK_ENABLE();
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#endif
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#ifdef TIM14
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else if (periph == TIM14) __HAL_RCC_TIM14_CLK_ENABLE();
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#endif
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#ifdef TIM15
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else if (periph == TIM15) __HAL_RCC_TIM15_CLK_ENABLE();
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#endif
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#ifdef TIM16
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else if (periph == TIM16) __HAL_RCC_TIM15_CLK_ENABLE();
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#endif
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#ifdef TIM17
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else if (periph == TIM17) __HAL_RCC_TIM17_CLK_ENABLE();
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#endif
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// --- ADC ---
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#ifdef ADC1
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else if (periph == ADC1) __HAL_RCC_ADC1_CLK_ENABLE();
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#endif
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#ifdef ADC2
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else if (periph == ADC2) __HAL_RCC_ADC2_CLK_ENABLE();
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#endif
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// --- DAC ---
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#ifdef DAC1
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else if (periph == DAC1) __HAL_RCC_DAC1_CLK_ENABLE();
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#endif
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#ifdef DAC2
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else if (periph == DAC2) __HAL_RCC_DAC2_CLK_ENABLE();
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#endif
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else {
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dbg("Periph 0x%p missing in hw clock enable func", periph);
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trap("BUG");
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}
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}
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void hw_periph_clock_disable(void *periph)
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{
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// GPIOs are enabled by default on start-up
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// --- USART ---
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if (periph == USART1) __HAL_RCC_USART1_CLK_DISABLE();
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else if (periph == USART2) __HAL_RCC_USART2_CLK_DISABLE();
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#ifdef USART3
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else if (periph == USART3) __HAL_RCC_USART3_CLK_DISABLE();
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#endif
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#ifdef USART4
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else if (periph == USART4) __HAL_RCC_USART4_CLK_DISABLE();
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#endif
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#ifdef USART5
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else if (periph == USART5) __HAL_RCC_USART5_CLK_DISABLE();
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#endif
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// --- SPI ---
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else if (periph == SPI1) __HAL_RCC_SPI1_CLK_DISABLE();
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#ifdef SPI2
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else if (periph == SPI2) __HAL_RCC_SPI2_CLK_DISABLE();
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#endif
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#ifdef SPI3
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else if (periph == SPI3) __HAL_RCC_SPI3_CLK_DISABLE();
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#endif
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// --- I2C ---
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else if (periph == I2C1) __HAL_RCC_I2C1_CLK_DISABLE();
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else if (periph == I2C2) __HAL_RCC_I2C2_CLK_DISABLE();
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#ifdef I2C3
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else if (periph == I2C3) __HAL_RCC_I2C3_CLK_DISABLE();
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#endif
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// --- DMA ---
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else if (periph == DMA1) __HAL_RCC_DMA1_CLK_DISABLE();
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#ifdef DMA2
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else if (periph == DMA2) __HAL_RCC_DMA2_CLK_DISABLE();
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#endif
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// --- TIM ---
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else if (periph == TIM1) __HAL_RCC_TIM1_CLK_DISABLE();
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else if (periph == TIM2) __HAL_RCC_TIM2_CLK_DISABLE();
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else if (periph == TIM3) __HAL_RCC_TIM3_CLK_DISABLE();
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#ifdef TIM4
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else if (periph == TIM4) __HAL_RCC_TIM4_CLK_DISABLE();
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#endif
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#ifdef TIM5
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else if (periph == TIM5) __HAL_RCC_TIM5_CLK_DISABLE();
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#endif
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#ifdef TIM6
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else if (periph == TIM6) __HAL_RCC_TIM7_CLK_DISABLE();
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#endif
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#ifdef TIM7
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else if (periph == TIM7) __HAL_RCC_TIM7_CLK_DISABLE();
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#endif
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#ifdef TIM8
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else if (periph == TIM8) __HAL_RCC_TIM8_CLK_DISABLE();
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#endif
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#ifdef TIM9
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else if (periph == TIM9) __HAL_RCC_TIM9_CLK_DISABLE();
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#endif
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#ifdef TIM11
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else if (periph == TIM11) __HAL_RCC_TIM11_CLK_DISABLE();
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#endif
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#ifdef TIM12
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else if (periph == TIM12) __HAL_RCC_TIM12_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#ifdef TIM13
|
|
|
|
else if (periph == TIM13) __HAL_RCC_TIM13_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#ifdef TIM14
|
|
|
|
else if (periph == TIM14) __HAL_RCC_TIM14_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#ifdef TIM15
|
|
|
|
else if (periph == TIM15) __HAL_RCC_TIM15_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#ifdef TIM16
|
|
|
|
else if (periph == TIM16) __HAL_RCC_TIM15_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#ifdef TIM17
|
|
|
|
else if (periph == TIM17) __HAL_RCC_TIM17_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
|
|
|
|
// --- ADC ---
|
|
|
|
#ifdef ADC1
|
|
|
|
else if (periph == ADC1) __HAL_RCC_ADC1_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#ifdef ADC2
|
|
|
|
else if (periph == ADC2) __HAL_RCC_ADC2_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
|
|
|
|
// --- DAC ---
|
|
|
|
#ifdef DAC1
|
|
|
|
else if (periph == DAC1) __HAL_RCC_DAC1_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
#ifdef DAC2
|
|
|
|
else if (periph == DAC2) __HAL_RCC_DAC2_CLK_DISABLE();
|
|
|
|
#endif
|
|
|
|
else {
|
|
|
|
dbg("Periph 0x%p missing in hw clock disable func", periph);
|
|
|
|
trap("BUG");
|
|
|
|
}
|
|
|
|
}
|