parent
13564727d9
commit
fd5c8f3a6b
@ -1,11 +0,0 @@ |
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English version: |
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|
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SDK Development Guide @ http://bbs.espressif.com/viewtopic.php?f=51&t=1024 |
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AT Commands User Guide @ http://bbs.espressif.com/viewtopic.php?f=51&t=1022 |
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All documentations @ http://bbs.espressif.com/viewforum.php?f=51 |
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|
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中文文档: |
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|
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SDK 编程手册 @ http://bbs.espressif.com/viewtopic.php?f=51&t=1023 |
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AT 指令集 @ http://bbs.espressif.com/viewtopic.php?f=51&t=732 |
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全部开发文档 @ http://bbs.espressif.com/viewforum.php?f=51 |
@ -1,126 +0,0 @@ |
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#############################################################
|
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# Required variables for each makefile
|
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# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of object file images to be generated ()
|
||||
# GEN_BINS - list of binaries to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
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# subdir/lib to be extracted and rolled up into
|
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# a generated lib/image xxx.a ()
|
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#
|
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TARGET = eagle
|
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#FLAVOR = release
|
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FLAVOR = debug
|
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|
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#EXTRA_CCFLAGS += -u
|
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|
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ifndef PDIR # {
|
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GEN_IMAGES= eagle.app.v6.out
|
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GEN_BINS= eagle.app.v6.bin
|
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SPECIAL_MKTARGETS=$(APP_MKTARGETS)
|
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SUBDIRS= \
|
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user \
|
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driver
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|
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endif # } PDIR
|
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|
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APPDIR = .
|
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LDDIR = ../ld
|
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|
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CCFLAGS += -Os
|
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|
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TARGET_LDFLAGS = \
|
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-nostdlib \
|
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-Wl,-EL \
|
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--longcalls \
|
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--text-section-literals
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|
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ifeq ($(FLAVOR),debug) |
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TARGET_LDFLAGS += -g -O2
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endif |
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|
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ifeq ($(FLAVOR),release) |
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TARGET_LDFLAGS += -g -O0
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endif |
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|
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COMPONENTS_eagle.app.v6 = \
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user/libuser.a \
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driver/libdriver.a
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|
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LINKFLAGS_eagle.app.v6 = \
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-L../lib \
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-nostdlib \
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-T$(LD_FILE) \
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-Wl,--no-check-sections \
|
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-u call_user_start \
|
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-Wl,-static \
|
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-Wl,--start-group \
|
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-lc \
|
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-lgcc \
|
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-lhal \
|
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-lphy \
|
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-lpp \
|
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-lnet80211 \
|
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-llwip \
|
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-lwpa \
|
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-lcrypto \
|
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-lmain \
|
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-ljson \
|
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-lupgrade\
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-lssl \
|
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-lpwm \
|
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-lsmartconfig \
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$(DEP_LIBS_eagle.app.v6) \
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-Wl,--end-group
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|
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DEPENDS_eagle.app.v6 = \
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$(LD_FILE) \
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$(LDDIR)/eagle.rom.addr.v6.ld
|
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|
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#############################################################
|
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# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
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# for a subtree within the makefile rooted therein
|
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#
|
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|
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#UNIVERSAL_TARGET_DEFINES = \
|
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|
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# Other potential configuration flags include:
|
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# -DTXRX_TXBUF_DEBUG
|
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# -DTXRX_RXBUF_DEBUG
|
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# -DWLAN_CONFIG_CCX
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CONFIGURATION_DEFINES = -DICACHE_FLASH
|
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|
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DEFINES += \
|
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$(UNIVERSAL_TARGET_DEFINES) \
|
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$(CONFIGURATION_DEFINES)
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|
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DDEFINES += \
|
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$(UNIVERSAL_TARGET_DEFINES) \
|
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$(CONFIGURATION_DEFINES)
|
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|
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|
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#############################################################
|
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# Recursion Magic - Don't touch this!!
|
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#
|
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# Each subtree potentially has an include directory
|
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# corresponding to the common APIs applicable to modules
|
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# rooted at that subtree. Accordingly, the INCLUDE PATH
|
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# of a module can only contain the include directories up
|
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# its parent path, and not its siblings
|
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#
|
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# Required for each makefile to inherit from the parent
|
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#
|
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|
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INCLUDES := $(INCLUDES) -I $(PDIR)include
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PDIR := ../$(PDIR)
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sinclude $(PDIR)Makefile |
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|
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.PHONY: FORCE |
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FORCE: |
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|
@ -1,44 +0,0 @@ |
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|
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#############################################################
|
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# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of images to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
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ifndef PDIR |
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GEN_LIBS = libdriver.a
|
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endif |
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|
||||
|
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#############################################################
|
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# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
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# for a subtree within the makefile rooted therein
|
||||
#
|
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#DEFINES +=
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
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INCLUDES := $(INCLUDES) -I $(PDIR)include
|
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INCLUDES += -I ./
|
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PDIR := ../$(PDIR)
|
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sinclude $(PDIR)Makefile |
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|
@ -1,316 +0,0 @@ |
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/******************************************************************************
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* Copyright 2013-2014 Espressif Systems (Wuxi) |
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* |
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* FileName: i2c_master.c |
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* |
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* Description: i2c master API |
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* |
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* Modification history: |
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* 2014/3/12, v1.0 create this file. |
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*******************************************************************************/ |
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#include "ets_sys.h" |
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#include "osapi.h" |
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#include "gpio.h" |
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#include "driver/i2c_master.h" |
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|
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LOCAL uint8 m_nLastSDA; |
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LOCAL uint8 m_nLastSCL; |
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|
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/******************************************************************************
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* FunctionName : i2c_master_setDC |
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* Description : Internal used function - |
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* set i2c SDA and SCL bit value for half clk cycle |
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* Parameters : uint8 SDA |
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* uint8 SCL |
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* Returns : NONE |
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*******************************************************************************/ |
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LOCAL void ICACHE_FLASH_ATTR |
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i2c_master_setDC(uint8 SDA, uint8 SCL) |
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{ |
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SDA &= 0x01; |
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SCL &= 0x01; |
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m_nLastSDA = SDA; |
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m_nLastSCL = SCL; |
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|
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if ((0 == SDA) && (0 == SCL)) { |
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I2C_MASTER_SDA_LOW_SCL_LOW(); |
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} else if ((0 == SDA) && (1 == SCL)) { |
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I2C_MASTER_SDA_LOW_SCL_HIGH(); |
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} else if ((1 == SDA) && (0 == SCL)) { |
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I2C_MASTER_SDA_HIGH_SCL_LOW(); |
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} else { |
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I2C_MASTER_SDA_HIGH_SCL_HIGH(); |
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} |
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} |
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|
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/******************************************************************************
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* FunctionName : i2c_master_getDC |
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* Description : Internal used function - |
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* get i2c SDA bit value |
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* Parameters : NONE |
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* Returns : uint8 - SDA bit value |
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*******************************************************************************/ |
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LOCAL uint8 ICACHE_FLASH_ATTR |
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i2c_master_getDC(void) |
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{ |
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uint8 sda_out; |
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sda_out = GPIO_INPUT_GET(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO)); |
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return sda_out; |
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} |
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|
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/******************************************************************************
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* FunctionName : i2c_master_init |
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* Description : initilize I2C bus to enable i2c operations |
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* Parameters : NONE |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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i2c_master_init(void) |
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{ |
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uint8 i; |
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i2c_master_setDC(1, 0); |
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i2c_master_wait(5); |
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// when SCL = 0, toggle SDA to clear up
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i2c_master_setDC(0, 0) ; |
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i2c_master_wait(5); |
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i2c_master_setDC(1, 0) ; |
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i2c_master_wait(5); |
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// set data_cnt to max value
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for (i = 0; i < 28; i++) { |
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i2c_master_setDC(1, 0); |
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i2c_master_wait(5); // sda 1, scl 0
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i2c_master_setDC(1, 1); |
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i2c_master_wait(5); // sda 1, scl 1
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} |
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// reset all
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i2c_master_stop(); |
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return; |
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} |
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|
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/******************************************************************************
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* FunctionName : i2c_master_gpio_init |
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* Description : config SDA and SCL gpio to open-drain output mode, |
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* mux and gpio num defined in i2c_master.h |
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* Parameters : NONE |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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i2c_master_gpio_init(void) |
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{ |
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ETS_GPIO_INTR_DISABLE() ; |
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// ETS_INTR_LOCK();
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PIN_FUNC_SELECT(I2C_MASTER_SDA_MUX, I2C_MASTER_SDA_FUNC); |
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PIN_FUNC_SELECT(I2C_MASTER_SCL_MUX, I2C_MASTER_SCL_FUNC); |
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|
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GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain;
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GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SDA_GPIO)); |
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GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain;
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GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SCL_GPIO)); |
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I2C_MASTER_SDA_HIGH_SCL_HIGH(); |
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ETS_GPIO_INTR_ENABLE() ; |
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// ETS_INTR_UNLOCK();
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i2c_master_init(); |
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} |
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/******************************************************************************
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* FunctionName : i2c_master_start |
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* Description : set i2c to send state |
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* Parameters : NONE |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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i2c_master_start(void) |
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{ |
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i2c_master_setDC(1, m_nLastSCL); |
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i2c_master_wait(5); |
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i2c_master_setDC(1, 1); |
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i2c_master_wait(5); // sda 1, scl 1
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i2c_master_setDC(0, 1); |
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i2c_master_wait(5); // sda 0, scl 1
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} |
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|
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/******************************************************************************
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* FunctionName : i2c_master_stop |
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* Description : set i2c to stop sending state |
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* Parameters : NONE |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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i2c_master_stop(void) |
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{ |
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i2c_master_wait(5); |
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i2c_master_setDC(0, m_nLastSCL); |
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i2c_master_wait(5); // sda 0
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i2c_master_setDC(0, 1); |
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i2c_master_wait(5); // sda 0, scl 1
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i2c_master_setDC(1, 1); |
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i2c_master_wait(5); // sda 1, scl 1
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} |
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|
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/******************************************************************************
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* FunctionName : i2c_master_setAck |
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* Description : set ack to i2c bus as level value |
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* Parameters : uint8 level - 0 or 1 |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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i2c_master_setAck(uint8 level) |
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{ |
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i2c_master_setDC(m_nLastSDA, 0); |
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i2c_master_wait(5); |
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i2c_master_setDC(level, 0); |
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i2c_master_wait(5); // sda level, scl 0
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i2c_master_setDC(level, 1); |
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i2c_master_wait(8); // sda level, scl 1
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i2c_master_setDC(level, 0); |
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i2c_master_wait(5); // sda level, scl 0
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i2c_master_setDC(1, 0); |
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i2c_master_wait(5); |
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} |
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|
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/******************************************************************************
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* FunctionName : i2c_master_getAck |
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* Description : confirm if peer send ack |
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* Parameters : NONE |
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* Returns : uint8 - ack value, 0 or 1 |
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*******************************************************************************/ |
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uint8 ICACHE_FLASH_ATTR |
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i2c_master_getAck(void) |
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{ |
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uint8 retVal; |
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i2c_master_setDC(m_nLastSDA, 0); |
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i2c_master_wait(5); |
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i2c_master_setDC(1, 0); |
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i2c_master_wait(5); |
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i2c_master_setDC(1, 1); |
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i2c_master_wait(5); |
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retVal = i2c_master_getDC(); |
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i2c_master_wait(5); |
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i2c_master_setDC(1, 0); |
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i2c_master_wait(5); |
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return retVal; |
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} |
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|
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/******************************************************************************
|
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* FunctionName : i2c_master_checkAck |
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* Description : get dev response |
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* Parameters : NONE |
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* Returns : true : get ack ; false : get nack |
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*******************************************************************************/ |
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bool ICACHE_FLASH_ATTR |
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i2c_master_checkAck(void) |
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{ |
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if(i2c_master_getAck()){ |
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return FALSE; |
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}else{ |
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return TRUE; |
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} |
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} |
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|
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/******************************************************************************
|
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* FunctionName : i2c_master_send_ack |
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* Description : response ack |
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* Parameters : NONE |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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i2c_master_send_ack(void) |
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{ |
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i2c_master_setAck(0x0); |
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} |
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/******************************************************************************
|
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* FunctionName : i2c_master_send_nack |
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* Description : response nack |
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* Parameters : NONE |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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i2c_master_send_nack(void) |
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{ |
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i2c_master_setAck(0x1); |
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} |
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|
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/******************************************************************************
|
||||
* FunctionName : i2c_master_readByte |
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* Description : read Byte from i2c bus |
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* Parameters : NONE |
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* Returns : uint8 - readed value |
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*******************************************************************************/ |
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uint8 ICACHE_FLASH_ATTR |
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i2c_master_readByte(void) |
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{ |
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uint8 retVal = 0; |
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uint8 k, i; |
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|
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i2c_master_wait(5); |
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i2c_master_setDC(m_nLastSDA, 0); |
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i2c_master_wait(5); // sda 1, scl 0
|
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|
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for (i = 0; i < 8; i++) { |
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i2c_master_wait(5); |
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i2c_master_setDC(1, 0); |
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i2c_master_wait(5); // sda 1, scl 0
|
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i2c_master_setDC(1, 1); |
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i2c_master_wait(5); // sda 1, scl 1
|
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|
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k = i2c_master_getDC(); |
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i2c_master_wait(5); |
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|
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if (i == 7) { |
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i2c_master_wait(3); ////
|
||||
} |
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|
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k <<= (7 - i); |
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retVal |= k; |
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} |
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|
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i2c_master_setDC(1, 0); |
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i2c_master_wait(5); // sda 1, scl 0
|
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|
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return retVal; |
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} |
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|
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/******************************************************************************
|
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* FunctionName : i2c_master_writeByte |
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* Description : write wrdata value(one byte) into i2c |
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* Parameters : uint8 wrdata - write value |
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* Returns : NONE |
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*******************************************************************************/ |
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void ICACHE_FLASH_ATTR |
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i2c_master_writeByte(uint8 wrdata) |
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{ |
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uint8 dat; |
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sint8 i; |
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|
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i2c_master_wait(5); |
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|
||||
i2c_master_setDC(m_nLastSDA, 0); |
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i2c_master_wait(5); |
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|
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for (i = 7; i >= 0; i--) { |
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dat = wrdata >> i; |
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i2c_master_setDC(dat, 0); |
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i2c_master_wait(5); |
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i2c_master_setDC(dat, 1); |
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i2c_master_wait(5); |
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|
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if (i == 0) { |
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i2c_master_wait(3); ////
|
||||
} |
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|
||||
i2c_master_setDC(dat, 0); |
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i2c_master_wait(5); |
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} |
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} |
@ -1,162 +0,0 @@ |
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/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
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* |
||||
* FileName: key.c |
||||
* |
||||
* Description: key driver, now can use different gpio and install different function |
||||
* |
||||
* Modification history: |
||||
* 2014/5/1, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
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#include "os_type.h" |
||||
#include "osapi.h" |
||||
#include "mem.h" |
||||
#include "gpio.h" |
||||
#include "user_interface.h" |
||||
|
||||
#include "driver/key.h" |
||||
|
||||
LOCAL void key_intr_handler(struct keys_param *keys); |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_init_single |
||||
* Description : init single key's gpio and register function |
||||
* Parameters : uint8 gpio_id - which gpio to use |
||||
* uint32 gpio_name - gpio mux name |
||||
* uint32 gpio_func - gpio function |
||||
* key_function long_press - long press function, needed to install |
||||
* key_function short_press - short press function, needed to install |
||||
* Returns : single_key_param - single key parameter, needed by key init |
||||
*******************************************************************************/ |
||||
struct single_key_param *ICACHE_FLASH_ATTR |
||||
key_init_single(uint8 gpio_id, uint32 gpio_name, uint8 gpio_func, key_function long_press, key_function short_press) |
||||
{ |
||||
struct single_key_param *single_key = (struct single_key_param *)os_zalloc(sizeof(struct single_key_param)); |
||||
|
||||
single_key->gpio_id = gpio_id; |
||||
single_key->gpio_name = gpio_name; |
||||
single_key->gpio_func = gpio_func; |
||||
single_key->long_press = long_press; |
||||
single_key->short_press = short_press; |
||||
|
||||
return single_key; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_init |
||||
* Description : init keys |
||||
* Parameters : key_param *keys - keys parameter, which inited by key_init_single |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
key_init(struct keys_param *keys) |
||||
{ |
||||
uint8 i; |
||||
|
||||
ETS_GPIO_INTR_ATTACH(key_intr_handler, keys); |
||||
|
||||
ETS_GPIO_INTR_DISABLE(); |
||||
|
||||
for (i = 0; i < keys->key_num; i++) { |
||||
keys->single_key[i]->key_level = 1; |
||||
|
||||
PIN_FUNC_SELECT(keys->single_key[i]->gpio_name, keys->single_key[i]->gpio_func); |
||||
|
||||
gpio_output_set(0, 0, 0, GPIO_ID_PIN(keys->single_key[i]->gpio_id)); |
||||
|
||||
gpio_register_set(GPIO_PIN_ADDR(keys->single_key[i]->gpio_id), GPIO_PIN_INT_TYPE_SET(GPIO_PIN_INTR_DISABLE) |
||||
| GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_DISABLE) |
||||
| GPIO_PIN_SOURCE_SET(GPIO_AS_PIN_SOURCE)); |
||||
|
||||
//clear gpio14 status
|
||||
GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, BIT(keys->single_key[i]->gpio_id)); |
||||
|
||||
//enable interrupt
|
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_NEGEDGE); |
||||
} |
||||
|
||||
ETS_GPIO_INTR_ENABLE(); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_5s_cb |
||||
* Description : long press 5s timer callback |
||||
* Parameters : single_key_param *single_key - single key parameter |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
key_5s_cb(struct single_key_param *single_key) |
||||
{ |
||||
os_timer_disarm(&single_key->key_5s); |
||||
|
||||
// low, then restart
|
||||
if (0 == GPIO_INPUT_GET(GPIO_ID_PIN(single_key->gpio_id))) { |
||||
if (single_key->long_press) { |
||||
single_key->long_press(); |
||||
} |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_50ms_cb |
||||
* Description : 50ms timer callback to check it's a real key push |
||||
* Parameters : single_key_param *single_key - single key parameter |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
key_50ms_cb(struct single_key_param *single_key) |
||||
{ |
||||
os_timer_disarm(&single_key->key_50ms); |
||||
|
||||
// high, then key is up
|
||||
if (1 == GPIO_INPUT_GET(GPIO_ID_PIN(single_key->gpio_id))) { |
||||
os_timer_disarm(&single_key->key_5s); |
||||
single_key->key_level = 1; |
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(single_key->gpio_id), GPIO_PIN_INTR_NEGEDGE); |
||||
|
||||
if (single_key->short_press) { |
||||
single_key->short_press(); |
||||
} |
||||
} else { |
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(single_key->gpio_id), GPIO_PIN_INTR_POSEDGE); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_intr_handler |
||||
* Description : key interrupt handler |
||||
* Parameters : key_param *keys - keys parameter, which inited by key_init_single |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void |
||||
key_intr_handler(struct keys_param *keys) |
||||
{ |
||||
uint8 i; |
||||
uint32 gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS); |
||||
|
||||
for (i = 0; i < keys->key_num; i++) { |
||||
if (gpio_status & BIT(keys->single_key[i]->gpio_id)) { |
||||
//disable interrupt
|
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_DISABLE); |
||||
|
||||
//clear interrupt status
|
||||
GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status & BIT(keys->single_key[i]->gpio_id)); |
||||
|
||||
if (keys->single_key[i]->key_level == 1) { |
||||
// 5s, restart & enter softap mode
|
||||
os_timer_disarm(&keys->single_key[i]->key_5s); |
||||
os_timer_setfn(&keys->single_key[i]->key_5s, (os_timer_func_t *)key_5s_cb, keys->single_key[i]); |
||||
os_timer_arm(&keys->single_key[i]->key_5s, 5000, 0); |
||||
keys->single_key[i]->key_level = 0; |
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_POSEDGE); |
||||
} else { |
||||
// 50ms, check if this is a real key up
|
||||
os_timer_disarm(&keys->single_key[i]->key_50ms); |
||||
os_timer_setfn(&keys->single_key[i]->key_50ms, (os_timer_func_t *)key_50ms_cb, keys->single_key[i]); |
||||
os_timer_arm(&keys->single_key[i]->key_50ms, 50, 0); |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
@ -1,147 +0,0 @@ |
||||
@echo off |
||||
|
||||
echo gen_misc.bat version 20150511 |
||||
echo . |
||||
|
||||
echo Please follow below steps(1-5) to generate specific bin(s): |
||||
echo STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none) |
||||
set input=default |
||||
set /p input=enter(0/1/2, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set boot=old |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set boot=new |
||||
) else ( |
||||
set boot=none |
||||
) |
||||
) |
||||
|
||||
echo boot mode: %boot% |
||||
echo. |
||||
|
||||
echo STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin) |
||||
set input=default |
||||
set /p input=enter (0/1/2, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=1 |
||||
echo generate bin: user1.bin |
||||
) |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=2 |
||||
echo generate bin: user2.bin |
||||
) |
||||
) else ( |
||||
if %boot% neq none ( |
||||
set boot=none |
||||
echo ignore boot |
||||
) |
||||
set app=0 |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
)) |
||||
|
||||
echo. |
||||
|
||||
echo STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set spi_speed=20 |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set spi_speed=26.7 |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_speed=80 |
||||
) else ( |
||||
set spi_speed=40 |
||||
))) |
||||
|
||||
echo spi speed: %spi_speed% MHz |
||||
echo. |
||||
|
||||
echo STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
set spi_mode=QOUT |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
set spi_mode=DIO |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_mode=DOUT |
||||
) else ( |
||||
set spi_mode=QIO |
||||
))) |
||||
|
||||
echo spi mode: %spi_mode% |
||||
echo. |
||||
|
||||
echo STEP 5: choose flash size and map |
||||
echo 0= 512KB( 256KB+ 256KB) |
||||
echo 2=1024KB( 512KB+ 512KB) |
||||
echo 3=2048KB( 512KB+ 512KB) |
||||
echo 4=4096KB( 512KB+ 512KB) |
||||
echo 5=2048KB(1024KB+1024KB) |
||||
echo 6=4096KB(1024KB+1024KB) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3/4/5/6, default 0): |
||||
|
||||
if %input% equ 2 ( |
||||
set spi_size_map=2 |
||||
echo spi size: 1024KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_size_map=3 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 4 ( |
||||
set spi_size_map=4 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 5 ( |
||||
set spi_size_map=5 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
if %input% equ 6 ( |
||||
set spi_size_map=6 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
set spi_size_map=0 |
||||
echo spi size: 512KB |
||||
echo spi ota map: 256KB + 256KB |
||||
) |
||||
) |
||||
) |
||||
) |
||||
) |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo. |
||||
echo start... |
||||
echo. |
||||
|
||||
make BOOT=%boot% APP=%app% SPI_SPEED=%spi_speed% SPI_MODE=%spi_mode% SPI_SIZE=%spi_size_map% |
||||
|
@ -1,150 +0,0 @@ |
||||
#!/bin/bash |
||||
|
||||
echo "gen_misc.sh version 20150511" |
||||
echo "" |
||||
|
||||
echo "Please follow below steps(1-5) to generate specific bin(s):" |
||||
echo "STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none)" |
||||
echo "enter(0/1/2, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
boot=none |
||||
elif [ $input == 0 ]; then |
||||
boot=old |
||||
elif [ $input == 1 ]; then |
||||
boot=new |
||||
else |
||||
boot=none |
||||
fi |
||||
|
||||
echo "boot mode: $boot" |
||||
echo "" |
||||
|
||||
echo "STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin)" |
||||
echo "enter (0/1/2, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
elif [ $input == 1 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=1 |
||||
echo "generate bin: user1.bin" |
||||
fi |
||||
elif [ $input == 2 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=2 |
||||
echo "generate bin: user2.bin" |
||||
fi |
||||
else |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
echo "STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz)" |
||||
echo "enter (0/1/2/3, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_speed=40 |
||||
elif [ $input == 0 ]; then |
||||
spi_speed=20 |
||||
elif [ $input == 1 ]; then |
||||
spi_speed=26.7 |
||||
elif [ $input == 3 ]; then |
||||
spi_speed=80 |
||||
else |
||||
spi_speed=40 |
||||
fi |
||||
|
||||
echo "spi speed: $spi_speed MHz" |
||||
echo "" |
||||
|
||||
echo "STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT)" |
||||
echo "enter (0/1/2/3, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_mode=QIO |
||||
elif [ $input == 1 ]; then |
||||
spi_mode=QOUT |
||||
elif [ $input == 2 ]; then |
||||
spi_mode=DIO |
||||
elif [ $input == 3 ]; then |
||||
spi_mode=DOUT |
||||
else |
||||
spi_mode=QIO |
||||
fi |
||||
|
||||
echo "spi mode: $spi_mode" |
||||
echo "" |
||||
|
||||
echo "STEP 5: choose spi size and map" |
||||
echo " 0= 512KB( 256KB+ 256KB)" |
||||
echo " 2=1024KB( 512KB+ 512KB)" |
||||
echo " 3=2048KB( 512KB+ 512KB)" |
||||
echo " 4=4096KB( 512KB+ 512KB)" |
||||
echo " 5=2048KB(1024KB+1024KB)" |
||||
echo " 6=4096KB(1024KB+1024KB)" |
||||
echo "enter (0/2/3/4/5/6, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
elif [ $input == 2 ]; then |
||||
spi_size_map=2 |
||||
echo "spi size: 1024KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 3 ]; then |
||||
spi_size_map=3 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 4 ]; then |
||||
spi_size_map=4 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 5 ]; then |
||||
spi_size_map=5 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
elif [ $input == 6 ]; then |
||||
spi_size_map=6 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
else |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo "" |
||||
echo "start..." |
||||
echo "" |
||||
|
||||
make COMPILE=gcc BOOT=$boot APP=$app SPI_SPEED=$spi_speed SPI_MODE=$spi_mode SPI_SIZE_MAP=$spi_size_map |
@ -1,57 +0,0 @@ |
||||
#ifndef __I2C_MASTER_H__ |
||||
#define __I2C_MASTER_H__ |
||||
|
||||
#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U |
||||
#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_MTMS_U |
||||
#define I2C_MASTER_SDA_GPIO 2 |
||||
#define I2C_MASTER_SCL_GPIO 14 |
||||
#define I2C_MASTER_SDA_FUNC FUNC_GPIO2 |
||||
#define I2C_MASTER_SCL_FUNC FUNC_GPIO14 |
||||
|
||||
//#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U
|
||||
//#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_GPIO0_U
|
||||
//#define I2C_MASTER_SDA_GPIO 2
|
||||
//#define I2C_MASTER_SCL_GPIO 0
|
||||
//#define I2C_MASTER_SDA_FUNC FUNC_GPIO2
|
||||
//#define I2C_MASTER_SCL_FUNC FUNC_GPIO0
|
||||
|
||||
#if 0 |
||||
#define I2C_MASTER_GPIO_SET(pin) \ |
||||
gpio_output_set(1<<pin,0,1<<pin,0) |
||||
|
||||
#define I2C_MASTER_GPIO_CLR(pin) \ |
||||
gpio_output_set(0,1<<pin,1<<pin,0) |
||||
|
||||
#define I2C_MASTER_GPIO_OUT(pin,val) \ |
||||
if(val) I2C_MASTER_GPIO_SET(pin);\
|
||||
else I2C_MASTER_GPIO_CLR(pin) |
||||
#endif |
||||
|
||||
#define I2C_MASTER_SDA_HIGH_SCL_HIGH() \ |
||||
gpio_output_set(1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0) |
||||
|
||||
#define I2C_MASTER_SDA_HIGH_SCL_LOW() \ |
||||
gpio_output_set(1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0) |
||||
|
||||
#define I2C_MASTER_SDA_LOW_SCL_HIGH() \ |
||||
gpio_output_set(1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0) |
||||
|
||||
#define I2C_MASTER_SDA_LOW_SCL_LOW() \ |
||||
gpio_output_set(0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0) |
||||
|
||||
void i2c_master_gpio_init(void); |
||||
void i2c_master_init(void); |
||||
|
||||
#define i2c_master_wait os_delay_us |
||||
void i2c_master_stop(void); |
||||
void i2c_master_start(void); |
||||
void i2c_master_setAck(uint8 level); |
||||
uint8 i2c_master_getAck(void); |
||||
uint8 i2c_master_readByte(void); |
||||
void i2c_master_writeByte(uint8 wrdata); |
||||
|
||||
bool i2c_master_checkAck(void); |
||||
void i2c_master_send_ack(void); |
||||
void i2c_master_send_nack(void); |
||||
|
||||
#endif |
@ -1,27 +0,0 @@ |
||||
#ifndef __KEY_H__ |
||||
#define __KEY_H__ |
||||
|
||||
#include "gpio.h" |
||||
|
||||
typedef void (* key_function)(void); |
||||
|
||||
struct single_key_param { |
||||
uint8 key_level; |
||||
uint8 gpio_id; |
||||
uint8 gpio_func; |
||||
uint32 gpio_name; |
||||
os_timer_t key_5s; |
||||
os_timer_t key_50ms; |
||||
key_function short_press; |
||||
key_function long_press; |
||||
}; |
||||
|
||||
struct keys_param { |
||||
uint8 key_num; |
||||
struct single_key_param **single_key; |
||||
}; |
||||
|
||||
struct single_key_param *key_init_single(uint8 gpio_id, uint32 gpio_name, uint8 gpio_func, key_function long_press, key_function short_press); |
||||
void key_init(struct keys_param *key); |
||||
|
||||
#endif |
@ -1,36 +0,0 @@ |
||||
unsigned char default_certificate[] = { |
||||
0x30, 0x82, 0x01, 0x82, 0x30, 0x81, 0xec, 0x02, 0x09, 0x00, 0x88, 0xf2, |
||||
0x5f, 0x46, 0x12, 0x2e, 0x3d, 0x3a, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, |
||||
0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x30, 0x1c, 0x31, |
||||
0x1a, 0x30, 0x18, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x13, 0x11, 0x77, 0x77, |
||||
0x77, 0x2e, 0x65, 0x73, 0x70, 0x72, 0x65, 0x73, 0x73, 0x69, 0x66, 0x2e, |
||||
0x63, 0x6f, 0x6d, 0x30, 0x1e, 0x17, 0x0d, 0x31, 0x34, 0x30, 0x36, 0x32, |
||||
0x34, 0x31, 0x30, 0x32, 0x32, 0x33, 0x33, 0x5a, 0x17, 0x0d, 0x32, 0x38, |
||||
0x30, 0x33, 0x30, 0x32, 0x31, 0x30, 0x32, 0x32, 0x33, 0x33, 0x5a, 0x30, |
||||
0x34, 0x31, 0x12, 0x30, 0x10, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x13, 0x09, |
||||
0x65, 0x73, 0x70, 0x72, 0x65, 0x73, 0x73, 0x69, 0x66, 0x31, 0x1e, 0x30, |
||||
0x1c, 0x06, 0x03, 0x55, 0x04, 0x03, 0x13, 0x15, 0x65, 0x73, 0x70, 0x72, |
||||
0x65, 0x73, 0x73, 0x69, 0x66, 0x20, 0x49, 0x6f, 0x54, 0x20, 0x70, 0x72, |
||||
0x6f, 0x6a, 0x65, 0x63, 0x74, 0x30, 0x5c, 0x30, 0x0d, 0x06, 0x09, 0x2a, |
||||
0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00, 0x03, 0x4b, |
||||
0x00, 0x30, 0x48, 0x02, 0x41, 0x00, 0xb9, 0x83, 0x30, 0xca, 0xfb, 0xec, |
||||
0x11, 0x9e, 0x94, 0xb7, 0x89, 0xf2, 0x84, 0x2c, 0xda, 0xe1, 0x9a, 0x53, |
||||
0x3a, 0x1b, 0x6e, 0xc9, 0x85, 0x81, 0xf9, 0xa3, 0x41, 0xdb, 0xe2, 0x82, |
||||
0x3b, 0xfa, 0x80, 0x22, 0x3b, 0x81, 0x6d, 0x25, 0x73, 0x7e, 0xf6, 0x49, |
||||
0xcc, 0x69, 0x3c, 0x6c, 0xd8, 0x05, 0xfb, 0x92, 0x02, 0xcf, 0x19, 0x2a, |
||||
0x10, 0x7d, 0x69, 0x7a, 0xd8, 0x9d, 0xd3, 0xcf, 0x6c, 0xef, 0x02, 0x03, |
||||
0x01, 0x00, 0x01, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, |
||||
0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x03, 0x81, 0x81, 0x00, 0x2d, 0x63, |
||||
0x58, 0x21, 0xe3, 0x8b, 0x37, 0x0d, 0x28, 0x68, 0x11, 0x0e, 0x4d, 0xdd, |
||||
0xf3, 0xea, 0xdb, 0xec, 0xd7, 0x09, 0x47, 0x2c, 0xa1, 0xd8, 0xd1, 0x71, |
||||
0x83, 0x11, 0xb4, 0x17, 0xbc, 0x83, 0xea, 0x5a, 0xd6, 0x73, 0x02, 0x25, |
||||
0x87, 0x01, 0x76, 0xfc, 0x59, 0x1a, 0xcf, 0xd9, 0x49, 0xc9, 0xf9, 0x1f, |
||||
0x5c, 0x3b, 0x24, 0x6a, 0x5c, 0xa5, 0xca, 0xe6, 0x5d, 0x34, 0x5b, 0x5f, |
||||
0xcf, 0x56, 0x9c, 0x71, 0xd2, 0x6b, 0xdd, 0x1f, 0x15, 0xae, 0x4d, 0xf1, |
||||
0xca, 0x35, 0xc8, 0xdd, 0x93, 0x1b, 0x58, 0x1e, 0x94, 0x08, 0xcf, 0xa0, |
||||
0x20, 0xb9, 0x75, 0xa5, 0x4c, 0x77, 0xf5, 0x7f, 0xed, 0xd5, 0xcd, 0x53, |
||||
0xaa, 0x87, 0xa6, 0x3c, 0xf5, 0x72, 0xd8, 0xd2, 0xb0, 0xf7, 0x11, 0xb0, |
||||
0x0e, 0xe9, 0x41, 0xd6, 0x8e, 0xd9, 0x07, 0xf8, 0xed, 0xf8, 0x67, 0x7f, |
||||
0x28, 0x18, 0xf0, 0x1b, 0x29, 0x11 |
||||
}; |
||||
unsigned int default_certificate_len = 390; |
@ -1,30 +0,0 @@ |
||||
unsigned char default_private_key[] = { |
||||
0x30, 0x82, 0x01, 0x3a, 0x02, 0x01, 0x00, 0x02, 0x41, 0x00, 0xb9, 0x83, |
||||
0x30, 0xca, 0xfb, 0xec, 0x11, 0x9e, 0x94, 0xb7, 0x89, 0xf2, 0x84, 0x2c, |
||||
0xda, 0xe1, 0x9a, 0x53, 0x3a, 0x1b, 0x6e, 0xc9, 0x85, 0x81, 0xf9, 0xa3, |
||||
0x41, 0xdb, 0xe2, 0x82, 0x3b, 0xfa, 0x80, 0x22, 0x3b, 0x81, 0x6d, 0x25, |
||||
0x73, 0x7e, 0xf6, 0x49, 0xcc, 0x69, 0x3c, 0x6c, 0xd8, 0x05, 0xfb, 0x92, |
||||
0x02, 0xcf, 0x19, 0x2a, 0x10, 0x7d, 0x69, 0x7a, 0xd8, 0x9d, 0xd3, 0xcf, |
||||
0x6c, 0xef, 0x02, 0x03, 0x01, 0x00, 0x01, 0x02, 0x40, 0x1d, 0x13, 0x92, |
||||
0xf2, 0x3d, 0xca, 0x22, 0x78, 0xd8, 0x96, 0x6b, 0xe8, 0xb7, 0x0e, 0xd0, |
||||
0xbf, 0xcb, 0x90, 0x7f, 0xeb, 0x0c, 0xd2, 0x49, 0x3a, 0xb6, 0x06, 0x00, |
||||
0xac, 0x96, 0x34, 0x13, 0x72, 0x4b, 0x8c, 0xd2, 0xb9, 0x35, 0xf5, 0x64, |
||||
0x18, 0xb2, 0x47, 0x5b, 0x9f, 0xbb, 0xf2, 0x5b, 0x2f, 0x66, 0x78, 0x2d, |
||||
0x0a, 0x76, 0x44, 0xc5, 0x4f, 0xdb, 0x7d, 0x13, 0xcf, 0xa5, 0x08, 0xdc, |
||||
0x01, 0x02, 0x21, 0x00, 0xdf, 0x9a, 0x89, 0xd0, 0xef, 0x23, 0xcf, 0x12, |
||||
0xac, 0x8a, 0x63, 0x1a, 0x8c, 0xc0, 0x3f, 0xf4, 0x38, 0x52, 0x3c, 0x9f, |
||||
0x19, 0x0a, 0x37, 0xd2, 0xcb, 0x5d, 0xeb, 0xb6, 0x2a, 0x33, 0xb0, 0x91, |
||||
0x02, 0x21, 0x00, 0xd4, 0x63, 0xd9, 0x6a, 0x18, 0x5b, 0xe8, 0xa8, 0x57, |
||||
0x4d, 0xd1, 0x9a, 0xa8, 0xd7, 0xe1, 0x65, 0x75, 0xb3, 0xb9, 0x5c, 0x94, |
||||
0x14, 0xca, 0x98, 0x41, 0x47, 0x9c, 0x0a, 0x22, 0x38, 0x05, 0x7f, 0x02, |
||||
0x20, 0x6a, 0xce, 0xfd, 0xef, 0xe0, 0x9b, 0x61, 0x49, 0x91, 0x43, 0x95, |
||||
0x6d, 0x54, 0x38, 0x6d, 0x14, 0x32, 0x67, 0x0d, 0xf0, 0x0d, 0x5c, 0xf5, |
||||
0x27, 0x6a, 0xdf, 0x55, 0x3d, 0xb1, 0xd0, 0xf9, 0x11, 0x02, 0x21, 0x00, |
||||
0xba, 0x94, 0xa0, 0xf9, 0xb0, 0x3e, 0x85, 0x8b, 0xe5, 0x6e, 0x4a, 0x95, |
||||
0x88, 0x80, 0x65, 0xd5, 0x00, 0xea, 0x8b, 0x0b, 0x46, 0x57, 0x61, 0x87, |
||||
0x11, 0xc9, 0xfb, 0xcd, 0x77, 0x34, 0x29, 0xb7, 0x02, 0x20, 0x06, 0x8d, |
||||
0x41, 0x11, 0x47, 0x93, 0xcb, 0xad, 0xda, 0x5d, 0xe1, 0x9d, 0x49, 0x8d, |
||||
0xe0, 0xab, 0x48, 0xe6, 0x18, 0x28, 0x4a, 0x94, 0xae, 0xf9, 0xad, 0xc5, |
||||
0x5b, 0x0b, 0x15, 0xc6, 0x73, 0x17 |
||||
}; |
||||
unsigned int default_private_key_len = 318; |
@ -1,64 +0,0 @@ |
||||
#ifndef __USER_CONFIG_H__ |
||||
#define __USER_CONFIG_H__ |
||||
|
||||
#define ESP_PLATFORM 1 |
||||
#define LEWEI_PLATFORM 0 |
||||
|
||||
#define USE_OPTIMIZE_PRINTF |
||||
|
||||
#if ESP_PLATFORM |
||||
#define PLUG_DEVICE 0 |
||||
#define LIGHT_DEVICE 1 |
||||
#define SENSOR_DEVICE 0 |
||||
|
||||
#if SENSOR_DEVICE |
||||
#define HUMITURE_SUB_DEVICE 1 |
||||
#define FLAMMABLE_GAS_SUB_DEVICE 0 |
||||
#endif |
||||
|
||||
//#define SERVER_SSL_ENABLE
|
||||
//#define CLIENT_SSL_ENABLE
|
||||
//#define UPGRADE_SSL_ENABLE
|
||||
|
||||
#define USE_DNS |
||||
|
||||
#ifdef USE_DNS |
||||
#define ESP_DOMAIN "iot.espressif.cn" |
||||
#endif |
||||
|
||||
//#define SOFTAP_ENCRYPT
|
||||
|
||||
#ifdef SOFTAP_ENCRYPT |
||||
#define PASSWORD "v*%W>L<@i&Nxe!" |
||||
#endif |
||||
|
||||
#if SENSOR_DEVICE |
||||
#define SENSOR_DEEP_SLEEP |
||||
|
||||
#if HUMITURE_SUB_DEVICE |
||||
#define SENSOR_DEEP_SLEEP_TIME 30000000 |
||||
#elif FLAMMABLE_GAS_SUB_DEVICE |
||||
#define SENSOR_DEEP_SLEEP_TIME 60000000 |
||||
#endif |
||||
#endif |
||||
|
||||
#if LIGHT_DEVICE |
||||
#define USE_US_TIMER |
||||
#endif |
||||
|
||||
#if PLUG_DEVICE || LIGHT_DEVICE |
||||
#define BEACON_TIMEOUT 150000000 |
||||
#define BEACON_TIME 50000 |
||||
#endif |
||||
|
||||
#define AP_CACHE 1 |
||||
|
||||
#if AP_CACHE |
||||
#define AP_CACHE_NUMBER 5 |
||||
#endif |
||||
|
||||
#elif LEWEI_PLATFORM |
||||
#endif |
||||
|
||||
#endif |
||||
|
@ -1,6 +0,0 @@ |
||||
#ifndef __USER_DEVICEFIND_H__ |
||||
#define __USER_DEVICEFIND_H__ |
||||
|
||||
void user_devicefind_init(void); |
||||
|
||||
#endif |
@ -1,33 +0,0 @@ |
||||
#ifndef __USER_DEVICE_H__ |
||||
#define __USER_DEVICE_H__ |
||||
|
||||
/* NOTICE---this is for 512KB spi flash.
|
||||
* you can change to other sector if you use other size spi flash. */ |
||||
#define ESP_PARAM_START_SEC 0x3D |
||||
|
||||
#define packet_size (2 * 1024) |
||||
|
||||
#define token_size 41 |
||||
|
||||
struct esp_platform_saved_param { |
||||
uint8 devkey[40]; |
||||
uint8 token[40]; |
||||
uint8 activeflag; |
||||
uint8 pad[3]; |
||||
}; |
||||
|
||||
enum { |
||||
DEVICE_CONNECTING = 40, |
||||
DEVICE_ACTIVE_DONE, |
||||
DEVICE_ACTIVE_FAIL, |
||||
DEVICE_CONNECT_SERVER_FAIL |
||||
}; |
||||
|
||||
struct dhcp_client_info { |
||||
ip_addr_t ip_addr; |
||||
ip_addr_t netmask; |
||||
ip_addr_t gw; |
||||
uint8 flag; |
||||
uint8 pad[3]; |
||||
}; |
||||
#endif |
@ -1,6 +0,0 @@ |
||||
#ifndef __USER_DEVICEFIND_H__ |
||||
#define __USER_DEVICEFIND_H__ |
||||
|
||||
void user_platform_timer_start(char* pbuffer, struct espconn *pespconn); |
||||
|
||||
#endif |
@ -1,43 +0,0 @@ |
||||
#ifndef __USER_IOT_VERSION_H__ |
||||
#define __USER_IOT_VERSION_H__ |
||||
|
||||
#include "user_config.h" |
||||
|
||||
#define IOT_VERSION_MAJOR 1U |
||||
#define IOT_VERSION_MINOR 0U |
||||
#define IOT_VERSION_REVISION 5U |
||||
|
||||
#define VERSION_NUM (IOT_VERSION_MAJOR * 1000 + IOT_VERSION_MINOR * 100 + IOT_VERSION_REVISION) |
||||
|
||||
//#define VERSION_TYPE "b"
|
||||
#define VERSION_TYPE "v" |
||||
|
||||
#if LIGHT_DEVICE |
||||
#define device_type 45772 |
||||
#elif PLUG_DEVICE |
||||
#define device_type 23701 |
||||
#elif SENSOR_DEVICE |
||||
#define device_type 12335 |
||||
#endif |
||||
|
||||
|
||||
#define ONLINE_UPGRADE 0 |
||||
#define LOCAL_UPGRADE 0 |
||||
#define ALL_UPGRADE 1 |
||||
#define NONE_UPGRADE 0 |
||||
|
||||
#if ONLINE_UPGRADE |
||||
#define UPGRADE_FALG "O" |
||||
#elif LOCAL_UPGRADE |
||||
#define UPGRADE_FALG "l" |
||||
#elif ALL_UPGRADE |
||||
#define UPGRADE_FALG "a" |
||||
#elif NONE_UPGRADE |
||||
#define UPGRADE_FALG "n" |
||||
#endif |
||||
|
||||
#define IOT_VERSION |
||||
|
||||
|
||||
#endif |
||||
|
@ -1,17 +0,0 @@ |
||||
#ifndef __USER_JSON_H__ |
||||
#define __USER_JSON_H__ |
||||
|
||||
#include "json/jsonparse.h" |
||||
#include "json/jsontree.h" |
||||
|
||||
#define jsonSize 2*1024 |
||||
|
||||
void json_parse(struct jsontree_context *json, char *ptrJSONMessage); |
||||
|
||||
void json_ws_send(struct jsontree_value *tree, const char *path, char *pbuf); |
||||
|
||||
int json_putchar(int c); |
||||
|
||||
struct jsontree_value *find_json_path(struct jsontree_context *json, const char *path); |
||||
|
||||
#endif |
@ -1,64 +0,0 @@ |
||||
#ifndef __USER_LIGHT_H__ |
||||
#define __USER_LIGHT_H__ |
||||
/*pwm.h: function and macro definition of PWM API , driver level */ |
||||
/*user_light.h: user interface for light API, user level*/ |
||||
/*user_light_adj: API for color changing and lighting effects, user level*/ |
||||
|
||||
|
||||
#include "pwm.h" |
||||
|
||||
|
||||
/* NOTICE !!! ---this is for 512KB spi flash.*/ |
||||
/* You can change to other sector if you use other size spi flash. */ |
||||
/* Refer to the documentation about OTA support and flash mapping*/ |
||||
#define PRIV_PARAM_START_SEC 0x3C |
||||
#define PRIV_PARAM_SAVE 0 |
||||
|
||||
|
||||
|
||||
/*Define the channel number of PWM*/ |
||||
/*In this demo, we can set 3 for 3 PWM channels: RED, GREEN, BLUE*/ |
||||
/*Or , we can choose 5 channels : RED,GREEN,BLUE,COLD-WHITE,WARM-WHITE*/ |
||||
#define PWM_CHANNEL 5 // 5:5channel ; 3:3channel
|
||||
|
||||
#define LIGHT_RED 0 |
||||
#define LIGHT_GREEN 1 |
||||
#define LIGHT_BLUE 2 |
||||
#define LIGHT_COLD_WHITE 3 |
||||
#define LIGHT_WARM_WHITE 4 |
||||
|
||||
|
||||
/*Definition of GPIO PIN params, for GPIO initialization*/ |
||||
#define PWM_0_OUT_IO_MUX PERIPHS_IO_MUX_MTDI_U |
||||
#define PWM_0_OUT_IO_NUM 12 |
||||
#define PWM_0_OUT_IO_FUNC FUNC_GPIO12 |
||||
|
||||
#define PWM_1_OUT_IO_MUX PERIPHS_IO_MUX_MTDO_U |
||||
#define PWM_1_OUT_IO_NUM 15 |
||||
#define PWM_1_OUT_IO_FUNC FUNC_GPIO15 |
||||
|
||||
#define PWM_2_OUT_IO_MUX PERIPHS_IO_MUX_MTCK_U |
||||
#define PWM_2_OUT_IO_NUM 13 |
||||
#define PWM_2_OUT_IO_FUNC FUNC_GPIO13 |
||||
|
||||
#define PWM_3_OUT_IO_MUX PERIPHS_IO_MUX_MTMS_U |
||||
#define PWM_3_OUT_IO_NUM 14 |
||||
#define PWM_3_OUT_IO_FUNC FUNC_GPIO14 |
||||
|
||||
#define PWM_4_OUT_IO_MUX PERIPHS_IO_MUX_GPIO5_U |
||||
#define PWM_4_OUT_IO_NUM 5 |
||||
#define PWM_4_OUT_IO_FUNC FUNC_GPIO5 |
||||
|
||||
struct light_saved_param { |
||||
uint32 pwm_period; |
||||
uint32 pwm_duty[PWM_CHANNEL]; |
||||
}; |
||||
|
||||
void user_light_init(void); |
||||
uint32 user_light_get_duty(uint8 channel); |
||||
void user_light_set_duty(uint32 duty, uint8 channel); |
||||
uint32 user_light_get_period(void); |
||||
void user_light_set_period(uint32 period); |
||||
|
||||
#endif |
||||
|
@ -1,33 +0,0 @@ |
||||
#ifndef __USER_LIGHT_ADJ_H__ |
||||
#define __USER_LIGHT_ADJ_H__ |
||||
/*pwm.h: function and macro definition of PWM API , driver level */ |
||||
/*user_light.h: user interface for light setting, user level*/ |
||||
/*user_light_adj: API for color changing and lighting effects, user level*/ |
||||
|
||||
|
||||
|
||||
|
||||
/*save RGB params to flash when calling light_set_aim*/ |
||||
#define SAVE_LIGHT_PARAM 0 //set to 0: do not save color params
|
||||
|
||||
/*check current consumption and limit the total current for LED driver IC*/ |
||||
/*NOTE: YOU SHOULD REPLACE WIHT THE LIMIT CURRENT OF YOUR OWN APPLICATION*/ |
||||
#define LIGHT_CURRENT_LIMIT 0 //set to 0: do not limit total current
|
||||
#if LIGHT_CURRENT_LIMIT |
||||
#define LIGHT_TOTAL_CURRENT_MAX (450*1000) //450000/1000 MA AT MOST
|
||||
#define LIGHT_CURRENT_MARGIN (80*1000) //80000/1000 MA CURRENT RAISES WHILE TEMPERATURE INCREASING
|
||||
#define LIGHT_CURRENT_MARGIN_L2 (110*1000) //110000/1000 MA
|
||||
#define LIGHT_CURRENT_MARGIN_L3 (140*1000) //140000/1000 MA
|
||||
#endif |
||||
|
||||
|
||||
/*set target duty for PWM channels, change each channel duty gradually */ |
||||
void light_set_aim(uint32 r,uint32 g,uint32 b,uint32 cw,uint32 ww,uint32 period);//'white' channel is not used in default demo
|
||||
void light_set_aim_r(uint32 r); |
||||
void light_set_aim_g(uint32 g); |
||||
void light_set_aim_b(uint32 b); |
||||
void light_set_aim_cw(uint32 cw); |
||||
void light_set_aim_ww(uint32 ww); |
||||
|
||||
#endif |
||||
|
@ -1,43 +0,0 @@ |
||||
#ifndef __USER_ESPSWITCH_H__ |
||||
#define __USER_ESPSWITCH_H__ |
||||
|
||||
#include "driver/key.h" |
||||
|
||||
/* NOTICE---this is for 512KB spi flash.
|
||||
* you can change to other sector if you use other size spi flash. */ |
||||
#define PRIV_PARAM_START_SEC 0x3C |
||||
|
||||
#define PRIV_PARAM_SAVE 0 |
||||
|
||||
#define PLUG_KEY_NUM 1 |
||||
|
||||
#define PLUG_KEY_0_IO_MUX PERIPHS_IO_MUX_MTCK_U |
||||
#define PLUG_KEY_0_IO_NUM 13 |
||||
#define PLUG_KEY_0_IO_FUNC FUNC_GPIO13 |
||||
|
||||
#define PLUG_WIFI_LED_IO_MUX PERIPHS_IO_MUX_GPIO0_U |
||||
#define PLUG_WIFI_LED_IO_NUM 0 |
||||
#define PLUG_WIFI_LED_IO_FUNC FUNC_GPIO0 |
||||
|
||||
#define PLUG_LINK_LED_IO_MUX PERIPHS_IO_MUX_MTDI_U |
||||
#define PLUG_LINK_LED_IO_NUM 12 |
||||
#define PLUG_LINK_LED_IO_FUNC FUNC_GPIO12 |
||||
|
||||
#define PLUG_RELAY_LED_IO_MUX PERIPHS_IO_MUX_MTDO_U |
||||
#define PLUG_RELAY_LED_IO_NUM 15 |
||||
#define PLUG_RELAY_LED_IO_FUNC FUNC_GPIO15 |
||||
|
||||
#define PLUG_STATUS_OUTPUT(pin, on) GPIO_OUTPUT_SET(pin, on) |
||||
|
||||
struct plug_saved_param { |
||||
uint8_t status; |
||||
uint8_t pad[3]; |
||||
}; |
||||
|
||||
void user_plug_init(void); |
||||
uint8 user_plug_get_status(void); |
||||
void user_plug_set_status(bool status); |
||||
|
||||
|
||||
#endif |
||||
|
@ -1,32 +0,0 @@ |
||||
#ifndef __USER_SENSOR_H__ |
||||
#define __USER_SENSOR_H__ |
||||
|
||||
#include "user_config.h" |
||||
#include "driver/key.h" |
||||
|
||||
#define SENSOR_KEY_NUM 1 |
||||
|
||||
#define SENSOR_KEY_IO_MUX PERIPHS_IO_MUX_MTCK_U |
||||
#define SENSOR_KEY_IO_NUM 13 |
||||
#define SENSOR_KEY_IO_FUNC FUNC_GPIO13 |
||||
|
||||
#define SENSOR_WIFI_LED_IO_MUX PERIPHS_IO_MUX_GPIO0_U |
||||
#define SENSOR_WIFI_LED_IO_NUM 0 |
||||
#define SENSOR_WIFI_LED_IO_FUNC FUNC_GPIO0 |
||||
|
||||
#define SENSOR_LINK_LED_IO_MUX PERIPHS_IO_MUX_MTDI_U |
||||
#define SENSOR_LINK_LED_IO_NUM 12 |
||||
#define SENSOR_LINK_LED_IO_FUNC FUNC_GPIO12 |
||||
|
||||
#define SENSOR_UNUSED_LED_IO_MUX PERIPHS_IO_MUX_MTDO_U |
||||
#define SENSOR_UNUSED_LED_IO_NUM 15 |
||||
#define SENSOR_UNUSED_LED_IO_FUNC FUNC_GPIO15 |
||||
|
||||
#if HUMITURE_SUB_DEVICE |
||||
bool user_mvh3004_read_th(uint8 *data); |
||||
void user_mvh3004_init(void); |
||||
#endif |
||||
|
||||
void user_sensor_init(uint8 active); |
||||
|
||||
#endif |
@ -1,45 +0,0 @@ |
||||
#ifndef __USER_WEBSERVER_H__ |
||||
#define __USER_WEBSERVER_H__ |
||||
|
||||
#define SERVER_PORT 80 |
||||
#define SERVER_SSL_PORT 443 |
||||
|
||||
#define URLSize 10 |
||||
|
||||
typedef enum Result_Resp { |
||||
RespFail = 0, |
||||
RespSuc, |
||||
} Result_Resp; |
||||
|
||||
typedef enum ProtocolType { |
||||
GET = 0, |
||||
POST, |
||||
} ProtocolType; |
||||
|
||||
typedef enum _ParmType { |
||||
SWITCH_STATUS = 0, |
||||
INFOMATION, |
||||
WIFI, |
||||
SCAN, |
||||
REBOOT, |
||||
DEEP_SLEEP, |
||||
LIGHT_STATUS, |
||||
CONNECT_STATUS, |
||||
USER_BIN |
||||
} ParmType; |
||||
|
||||
typedef struct URL_Frame { |
||||
enum ProtocolType Type; |
||||
char pSelect[URLSize]; |
||||
char pCommand[URLSize]; |
||||
char pFilename[URLSize]; |
||||
} URL_Frame; |
||||
|
||||
typedef struct _rst_parm { |
||||
ParmType parmtype; |
||||
struct espconn *pespconn; |
||||
} rst_parm; |
||||
|
||||
void user_webserver_init(uint32 port); |
||||
|
||||
#endif |
@ -1,45 +0,0 @@ |
||||
|
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of images to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
ifndef PDIR |
||||
GEN_LIBS = libuser.a
|
||||
endif |
||||
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
#DEFINES +=
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
INCLUDES += -I ./
|
||||
INCLUDES += -I ../../include/ets
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
@ -1,120 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_devicefind.c |
||||
* |
||||
* Description: Find your hardware's information while working any mode. |
||||
* |
||||
* Modification history: |
||||
* 2014/3/12, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "os_type.h" |
||||
#include "osapi.h" |
||||
#include "mem.h" |
||||
#include "user_interface.h" |
||||
|
||||
#include "espconn.h" |
||||
#include "user_json.h" |
||||
#include "user_devicefind.h" |
||||
|
||||
const char *device_find_request = "Are You Espressif IOT Smart Device?"; |
||||
#if PLUG_DEVICE |
||||
const char *device_find_response_ok = "I'm Plug."; |
||||
#elif LIGHT_DEVICE |
||||
const char *device_find_response_ok = "I'm Light."; |
||||
#elif SENSOR_DEVICE |
||||
#if HUMITURE_SUB_DEVICE |
||||
const char *device_find_response_ok = "I'm Humiture."; |
||||
#elif FLAMMABLE_GAS_SUB_DEVICE |
||||
const char *device_find_response_ok = "I'm Flammable Gas."; |
||||
#endif |
||||
#endif |
||||
|
||||
/*---------------------------------------------------------------------------*/ |
||||
LOCAL struct espconn ptrespconn; |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_devicefind_recv |
||||
* Description : Processing the received data from the host |
||||
* Parameters : arg -- Additional argument to pass to the callback function |
||||
* pusrdata -- The received data (or NULL when the connection has been closed!) |
||||
* length -- The length of received data |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_devicefind_recv(void *arg, char *pusrdata, unsigned short length) |
||||
{ |
||||
char DeviceBuffer[40] = {0}; |
||||
char Device_mac_buffer[60] = {0}; |
||||
char hwaddr[6]; |
||||
remot_info *premot = NULL; |
||||
struct ip_info ipconfig; |
||||
|
||||
if (wifi_get_opmode() != STATION_MODE) { |
||||
wifi_get_ip_info(SOFTAP_IF, &ipconfig); |
||||
wifi_get_macaddr(SOFTAP_IF, hwaddr); |
||||
|
||||
if (!ip_addr_netcmp((struct ip_addr *)ptrespconn.proto.udp->remote_ip, &ipconfig.ip, &ipconfig.netmask)) { |
||||
wifi_get_ip_info(STATION_IF, &ipconfig); |
||||
wifi_get_macaddr(STATION_IF, hwaddr); |
||||
} |
||||
} else { |
||||
wifi_get_ip_info(STATION_IF, &ipconfig); |
||||
wifi_get_macaddr(STATION_IF, hwaddr); |
||||
} |
||||
|
||||
if (pusrdata == NULL) { |
||||
return; |
||||
} |
||||
|
||||
if (length == os_strlen(device_find_request) && |
||||
os_strncmp(pusrdata, device_find_request, os_strlen(device_find_request)) == 0) { |
||||
os_sprintf(DeviceBuffer, "%s" MACSTR " " IPSTR, device_find_response_ok, |
||||
MAC2STR(hwaddr), IP2STR(&ipconfig.ip)); |
||||
|
||||
os_printf("%s\n", DeviceBuffer); |
||||
length = os_strlen(DeviceBuffer); |
||||
if (espconn_get_connection_info(&ptrespconn, &premot, 0) != ESPCONN_OK) |
||||
return; |
||||
os_memcpy(ptrespconn.proto.udp->remote_ip, premot->remote_ip, 4); |
||||
ptrespconn.proto.udp->remote_port = premot->remote_port; |
||||
espconn_sent(&ptrespconn, DeviceBuffer, length); |
||||
} else if (length == (os_strlen(device_find_request) + 18)) { |
||||
os_sprintf(Device_mac_buffer, "%s " MACSTR , device_find_request, MAC2STR(hwaddr)); |
||||
os_printf("%s", Device_mac_buffer); |
||||
|
||||
if (os_strncmp(Device_mac_buffer, pusrdata, os_strlen(device_find_request) + 18) == 0) { |
||||
//os_printf("%s\n", Device_mac_buffer);
|
||||
length = os_strlen(DeviceBuffer); |
||||
os_sprintf(DeviceBuffer, "%s" MACSTR " " IPSTR, device_find_response_ok, |
||||
MAC2STR(hwaddr), IP2STR(&ipconfig.ip)); |
||||
|
||||
os_printf("%s\n", DeviceBuffer); |
||||
length = os_strlen(DeviceBuffer); |
||||
if (espconn_get_connection_info(&ptrespconn, &premot, 0) != ESPCONN_OK) |
||||
return; |
||||
os_memcpy(ptrespconn.proto.udp->remote_ip, premot->remote_ip, 4); |
||||
ptrespconn.proto.udp->remote_port = premot->remote_port; |
||||
espconn_sent(&ptrespconn, DeviceBuffer, length); |
||||
} else { |
||||
return; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_devicefind_init |
||||
* Description : the espconn struct parame init |
||||
* Parameters : none |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_devicefind_init(void) |
||||
{ |
||||
ptrespconn.type = ESPCONN_UDP; |
||||
ptrespconn.proto.udp = (esp_udp *)os_zalloc(sizeof(esp_udp)); |
||||
ptrespconn.proto.udp->local_port = 1025; |
||||
espconn_regist_recvcb(&ptrespconn, user_devicefind_recv); |
||||
espconn_create(&ptrespconn); |
||||
} |
File diff suppressed because it is too large
Load Diff
@ -1,344 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: esp_platform_user_timer.c |
||||
* |
||||
* Description: |
||||
* |
||||
* Modification history: |
||||
* 2014/5/09, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "os_type.h" |
||||
#include "mem.h" |
||||
#include "osapi.h" |
||||
#include "user_interface.h" |
||||
|
||||
#include "espconn.h" |
||||
#include "user_esp_platform.h" |
||||
|
||||
#define ESP_DEBUG |
||||
|
||||
#ifdef ESP_DEBUG |
||||
#define ESP_DBG os_printf |
||||
#else |
||||
#define ESP_DBG |
||||
#endif |
||||
|
||||
LOCAL os_timer_t device_timer; |
||||
uint32 min_wait_second; |
||||
char timestamp_str[11]; |
||||
int timestamp = 0; |
||||
char *timer_splits[20] = {NULL}; |
||||
|
||||
struct esp_platform_wait_timer_param { |
||||
uint8 wait_time_param[11]; |
||||
uint8 wait_action[15]; |
||||
int wait_time_second; |
||||
}; |
||||
|
||||
struct wait_param { |
||||
uint8 action[20][15]; |
||||
uint16 action_number; |
||||
uint16 count; |
||||
uint32 min_time_backup; |
||||
}; |
||||
|
||||
void esp_platform_timer_action(struct esp_platform_wait_timer_param *timer_wait_param, uint16 count); |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : split |
||||
* Description : split string p1 according to sting p2 and save the splits |
||||
* Parameters : p1 , p2 ,splits[] |
||||
* Returns : the number of splits |
||||
*******************************************************************************/ |
||||
uint16 ICACHE_FLASH_ATTR |
||||
split(char *p1, char *p2, char *splits[]) |
||||
{ |
||||
int i = 0; |
||||
int j = 0; |
||||
|
||||
while (i != -1) { |
||||
int start = i; |
||||
int end = indexof(p1, p2, start); |
||||
|
||||
if (end == -1) { |
||||
end = os_strlen(p1); |
||||
} |
||||
|
||||
char *p = (char *) os_zalloc(100); |
||||
os_memcpy(p, p1 + start, end - start); |
||||
p[end - start] = '\0'; |
||||
splits[j] = p; |
||||
j++; |
||||
i = end + 1; |
||||
|
||||
if (i > os_strlen(p1)) { |
||||
break; |
||||
} |
||||
} |
||||
|
||||
return j; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : indexof |
||||
* Description : calculate the offset of p2 relate to start of p1 |
||||
* Parameters : p1,p1,start |
||||
* Returns : the offset of p2 relate to the start |
||||
*******************************************************************************/ |
||||
int ICACHE_FLASH_ATTR |
||||
indexof(char *p1, char *p2, int start) |
||||
{ |
||||
char *find = (char *)os_strstr(p1 + start, p2); |
||||
|
||||
if (find != NULL) { |
||||
return (find - p1); |
||||
} |
||||
|
||||
return -1; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : esp_platform_find_min_time |
||||
* Description : find the minimum wait second in timer list |
||||
* Parameters : timer_wait_param -- param of timer action and wait time param |
||||
* count -- The number of timers given by server |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
esp_platform_find_min_time(struct esp_platform_wait_timer_param *timer_wait_param , uint16 count) |
||||
{ |
||||
uint16 i = 0; |
||||
min_wait_second = 0xFFFFFFF; |
||||
|
||||
for (i = 0; i < count ; i++) { |
||||
if (timer_wait_param[i].wait_time_second < min_wait_second && timer_wait_param[i].wait_time_second >= 0) { |
||||
min_wait_second = timer_wait_param[i].wait_time_second; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_platform_timer_first_start |
||||
* Description : calculate the wait time of each timer |
||||
* Parameters : count -- The number of timers given by server |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_platform_timer_first_start(uint16 count) |
||||
{ |
||||
int i = 0; |
||||
struct esp_platform_wait_timer_param timer_wait_param[100] = {0}; |
||||
|
||||
ESP_DBG("current timestamp= %ds\n", timestamp); |
||||
|
||||
timestamp = timestamp + min_wait_second; |
||||
|
||||
for (i = 0 ; i < count ; i++) { |
||||
char *str = timer_splits[i]; |
||||
|
||||
if (indexof(str, "f", 0) == 0) { |
||||
char *fixed_wait[2]; |
||||
|
||||
ESP_DBG("timer is fixed mode\n"); |
||||
|
||||
split(str, "=", fixed_wait); |
||||
os_memcpy(timer_wait_param[i].wait_time_param, fixed_wait[0] + 1, os_strlen(fixed_wait[0]) - 1); |
||||
os_memcpy(timer_wait_param[i].wait_action, fixed_wait[1], os_strlen(fixed_wait[1])); |
||||
timer_wait_param[i].wait_time_second = atoi(timer_wait_param[i].wait_time_param) - timestamp; |
||||
os_free(fixed_wait[0]); |
||||
os_free(fixed_wait[1]); |
||||
} |
||||
|
||||
else if (indexof(str, "l", 0) == 0) { |
||||
char *loop_wait[2]; |
||||
|
||||
ESP_DBG("timer is loop mode\n"); |
||||
|
||||
split(str, "=", loop_wait); |
||||
os_memcpy(timer_wait_param[i].wait_time_param, loop_wait[0] + 1, os_strlen(loop_wait[0]) - 1); |
||||
os_memcpy(timer_wait_param[i].wait_action, loop_wait[1], os_strlen(loop_wait[1])); |
||||
timer_wait_param[i].wait_time_second = atoi(timer_wait_param[i].wait_time_param) - (timestamp % atoi(timer_wait_param[i].wait_time_param)); |
||||
os_free(loop_wait[0]); |
||||
os_free(loop_wait[1]); |
||||
} else if (indexof(str, "w", 0) == 0) { |
||||
char *week_wait[2]; |
||||
int monday_wait_time = 0; |
||||
|
||||
ESP_DBG("timer is weekend mode\n"); |
||||
|
||||
split(str, "=", week_wait); |
||||
os_memcpy(timer_wait_param[i].wait_time_param, week_wait[0] + 1, os_strlen(week_wait[0]) - 1); |
||||
os_memcpy(timer_wait_param[i].wait_action, week_wait[1], os_strlen(week_wait[1])); |
||||
monday_wait_time = (timestamp - 1388937600) % (7 * 24 * 3600); |
||||
|
||||
ESP_DBG("monday_wait_time == %d", monday_wait_time); |
||||
|
||||
if (atoi(timer_wait_param[i].wait_time_param) > monday_wait_time) { |
||||
timer_wait_param[i].wait_time_second = atoi(timer_wait_param[i].wait_time_param) - monday_wait_time; |
||||
} else { |
||||
timer_wait_param[i].wait_time_second = 7 * 24 * 3600 - monday_wait_time + atoi(timer_wait_param[i].wait_time_param); |
||||
} |
||||
|
||||
os_free(week_wait[0]); |
||||
os_free(week_wait[1]); |
||||
} |
||||
} |
||||
|
||||
esp_platform_find_min_time(timer_wait_param, count); |
||||
if(min_wait_second == 0) { |
||||
return; |
||||
} |
||||
|
||||
esp_platform_timer_action(timer_wait_param, count); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_esp_platform_device_action |
||||
* Description : Execute the actions of minimum wait time |
||||
* Parameters : pwait_action -- point the list of actions which need execute |
||||
* |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_esp_platform_device_action(struct wait_param *pwait_action) |
||||
{ |
||||
uint8 i = 0; |
||||
uint16 count = pwait_action->count; |
||||
uint16 action_number = pwait_action->action_number; |
||||
|
||||
ESP_DBG("there is %d action at the same time\n", pwait_action->action_number); |
||||
|
||||
#if PLUG_DEVICE |
||||
for (i = 0; i < action_number && pwait_action->action[i][0] != '0'; i++) { |
||||
ESP_DBG("%s\n",pwait_action->action[i]); |
||||
|
||||
if (os_strcmp(pwait_action->action[i], "on_switch", 9) == 0) { |
||||
user_plug_set_status(0x01); |
||||
} else if (os_strcmp(pwait_action->action[i], "off_switch", 10) == 0) { |
||||
user_plug_set_status(0x00); |
||||
} else if (os_strcmp(pwait_action->action[i], "on_off_switch", 13) == 0) { |
||||
if (user_plug_get_status() == 0) { |
||||
user_plug_set_status(0x01); |
||||
} else { |
||||
user_plug_set_status(0x00); |
||||
} |
||||
} else { |
||||
return; |
||||
} |
||||
} |
||||
user_platform_timer_first_start(count); |
||||
#endif |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_platform_timer_start |
||||
* Description : Processing the message about timer from the server |
||||
* Parameters : timer_wait_param -- The received data from the server |
||||
* count -- the espconn used to connetion with the host |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_esp_platform_wait_time_overflow_check(struct wait_param *pwait_action) |
||||
{ |
||||
ESP_DBG("min_wait_second = %d", min_wait_second); |
||||
|
||||
if (pwait_action->min_time_backup >= 3600) { |
||||
os_timer_disarm(&device_timer); |
||||
os_timer_setfn(&device_timer, (os_timer_func_t *)user_esp_platform_wait_time_overflow_check, pwait_action); |
||||
os_timer_arm(&device_timer, 3600000, 0); |
||||
ESP_DBG("min_wait_second is extended\n"); |
||||
} else { |
||||
os_timer_disarm(&device_timer); |
||||
os_timer_setfn(&device_timer, (os_timer_func_t *)user_esp_platform_device_action, pwait_action); |
||||
os_timer_arm(&device_timer, pwait_action->min_time_backup * 1000, 0); |
||||
ESP_DBG("min_wait_second is = %dms\n", pwait_action->min_time_backup * 1000); |
||||
} |
||||
|
||||
pwait_action->min_time_backup -= 3600; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_platform_timer_start |
||||
* Description : Processing the message about timer from the server |
||||
* Parameters : timer_wait_param -- The received data from the server |
||||
* count -- the espconn used to connetion with the host |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
esp_platform_timer_action(struct esp_platform_wait_timer_param *timer_wait_param, uint16 count) |
||||
{ |
||||
uint16 i = 0; |
||||
uint16 action_number; |
||||
struct wait_param pwait_action = {0}; |
||||
|
||||
pwait_action.count = count; |
||||
action_number = 0; |
||||
|
||||
for (i = 0; i < count ; i++) { |
||||
if (timer_wait_param[i].wait_time_second == min_wait_second) { |
||||
os_memcpy(pwait_action.action[action_number], timer_wait_param[i].wait_action, os_strlen(timer_wait_param[i].wait_action)); |
||||
ESP_DBG("*****%s*****\n", timer_wait_param[i].wait_action); |
||||
action_number++; |
||||
} |
||||
} |
||||
|
||||
pwait_action.action_number = action_number; |
||||
pwait_action.min_time_backup = min_wait_second; |
||||
user_esp_platform_wait_time_overflow_check(&pwait_action); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_platform_timer_start |
||||
* Description : Processing the message about timer from the server |
||||
* Parameters : pbuffer -- The received data from the server |
||||
|
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_platform_timer_start(char *pbuffer) |
||||
{ |
||||
int str_begin = 0; |
||||
int str_end = 0; |
||||
uint8 i = 0; |
||||
char *pstr_start = NULL; |
||||
char *pstr_end = NULL; |
||||
struct esp_platform_wait_timer_param timer_wait_param[20]; |
||||
char *pstr = NULL; |
||||
|
||||
min_wait_second = 0; |
||||
|
||||
if ((pstr = (char *)os_strstr(pbuffer, "\"timestamp\":")) != NULL) { |
||||
pstr_start = pstr + 13; |
||||
pstr_end = (char *)os_strstr(pstr_start, ","); |
||||
|
||||
if (pstr != NULL) { |
||||
os_memcpy(timestamp_str, pstr_start, pstr_end - pstr_start); |
||||
timestamp = atoi(timestamp_str); |
||||
} |
||||
} |
||||
|
||||
for (i = 0 ; i < 20 ; i++) { |
||||
if (timer_splits[i] != NULL) { |
||||
os_free(timer_splits[i]); |
||||
timer_splits[i] = NULL; |
||||
} |
||||
} |
||||
|
||||
if ((pstr_start = (char *)os_strstr(pbuffer, "\"timers\": \"")) != NULL) { |
||||
str_begin = 11; |
||||
str_end = indexof(pstr_start, "\"", str_begin); |
||||
|
||||
if (str_begin == str_end) { |
||||
os_timer_disarm(&device_timer); |
||||
return; |
||||
} |
||||
|
||||
char *split_buffer = (char *)os_zalloc(str_end - str_begin + 1); |
||||
os_memcpy(split_buffer, pstr_start + str_begin, str_end - str_begin); |
||||
uint16 count = split(split_buffer , ";" , timer_splits); |
||||
os_free(split_buffer); |
||||
user_platform_timer_first_start(count); |
||||
} |
||||
} |
@ -1,164 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_json.c |
||||
* |
||||
* Description: JSON format set up and parse. |
||||
* Check your hardware transmation while use this data format. |
||||
* |
||||
* Modification history: |
||||
* 2014/5/09, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "os_type.h" |
||||
#include "mem.h" |
||||
|
||||
#include "user_json.h" |
||||
|
||||
LOCAL char *json_buf; |
||||
LOCAL int pos; |
||||
LOCAL int size; |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : find_json_path |
||||
* Description : find the JSON format tree's path |
||||
* Parameters : json -- A pointer to a JSON set up |
||||
* path -- A pointer to the JSON format tree's path |
||||
* Returns : A pointer to the JSON format tree |
||||
*******************************************************************************/ |
||||
struct jsontree_value *ICACHE_FLASH_ATTR |
||||
find_json_path(struct jsontree_context *json, const char *path) |
||||
{ |
||||
struct jsontree_value *v; |
||||
const char *start; |
||||
const char *end; |
||||
int len; |
||||
|
||||
v = json->values[0]; |
||||
start = path; |
||||
|
||||
do { |
||||
end = (const char *)os_strstr(start, "/"); |
||||
|
||||
if (end == start) { |
||||
break; |
||||
} |
||||
|
||||
if (end != NULL) { |
||||
len = end - start; |
||||
end++; |
||||
} else { |
||||
len = os_strlen(start); |
||||
} |
||||
|
||||
if (v->type != JSON_TYPE_OBJECT) { |
||||
v = NULL; |
||||
} else { |
||||
struct jsontree_object *o; |
||||
int i; |
||||
|
||||
o = (struct jsontree_object *)v; |
||||
v = NULL; |
||||
|
||||
for (i = 0; i < o->count; i++) { |
||||
if (os_strncmp(start, o->pairs[i].name, len) == 0) { |
||||
v = o->pairs[i].value; |
||||
json->index[json->depth] = i; |
||||
json->depth++; |
||||
json->values[json->depth] = v; |
||||
json->index[json->depth] = 0; |
||||
break; |
||||
} |
||||
} |
||||
} |
||||
|
||||
start = end; |
||||
} while (end != NULL && *end != '\0' && v != NULL); |
||||
|
||||
json->callback_state = 0; |
||||
return v; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : json_putchar |
||||
* Description : write the value to the JSON format tree |
||||
* Parameters : c -- the value which write the JSON format tree |
||||
* Returns : result |
||||
*******************************************************************************/ |
||||
int ICACHE_FLASH_ATTR |
||||
json_putchar(int c) |
||||
{ |
||||
if (json_buf != NULL && pos <= size) { |
||||
json_buf[pos++] = c; |
||||
return c; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : json_ws_send |
||||
* Description : set up the JSON format tree for string |
||||
* Parameters : tree -- A pointer to the JSON format tree |
||||
* path -- A pointer to the JSON format tree's path |
||||
* pbuf -- A pointer for the data sent |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
json_ws_send(struct jsontree_value *tree, const char *path, char *pbuf) |
||||
{ |
||||
struct jsontree_context json; |
||||
/* maxsize = 128 bytes */ |
||||
json_buf = (char *)os_malloc(jsonSize); |
||||
|
||||
/* reset state and set max-size */ |
||||
/* NOTE: packet will be truncated at 512 bytes */ |
||||
pos = 0; |
||||
size = jsonSize; |
||||
|
||||
json.values[0] = (struct jsontree_value *)tree; |
||||
jsontree_reset(&json); |
||||
find_json_path(&json, path); |
||||
json.path = json.depth; |
||||
json.putchar = json_putchar; |
||||
|
||||
while (jsontree_print_next(&json) && json.path <= json.depth); |
||||
|
||||
json_buf[pos] = 0; |
||||
os_memcpy(pbuf, json_buf, pos); |
||||
os_free(json_buf); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : json_parse |
||||
* Description : parse the data as a JSON format |
||||
* Parameters : js_ctx -- A pointer to a JSON set up |
||||
* ptrJSONMessage -- A pointer to the data |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
json_parse(struct jsontree_context *json, char *ptrJSONMessage) |
||||
{ |
||||
/* Set value */ |
||||
struct jsontree_value *v; |
||||
struct jsontree_callback *c; |
||||
struct jsontree_callback *c_bak = NULL; |
||||
|
||||
while ((v = jsontree_find_next(json, JSON_TYPE_CALLBACK)) != NULL) { |
||||
c = (struct jsontree_callback *)v; |
||||
|
||||
if (c == c_bak) { |
||||
continue; |
||||
} |
||||
|
||||
c_bak = c; |
||||
|
||||
if (c->set != NULL) { |
||||
struct jsonparse_state js; |
||||
|
||||
jsonparse_setup(&js, ptrJSONMessage, os_strlen(ptrJSONMessage)); |
||||
c->set(json, &js); |
||||
} |
||||
} |
||||
} |
@ -1,141 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_light.c |
||||
* |
||||
* Description: light demo's function realization |
||||
* |
||||
* Modification history: |
||||
* 2014/5/1, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "os_type.h" |
||||
#include "mem.h" |
||||
#include "user_interface.h" |
||||
|
||||
#include "user_light.h" |
||||
#include "pwm.h" |
||||
|
||||
#if LIGHT_DEVICE |
||||
|
||||
struct light_saved_param light_param; |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_light_get_duty |
||||
* Description : get duty of each channel |
||||
* Parameters : uint8 channel : LIGHT_RED/LIGHT_GREEN/LIGHT_BLUE |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
uint32 ICACHE_FLASH_ATTR |
||||
user_light_get_duty(uint8 channel) |
||||
{ |
||||
return light_param.pwm_duty[channel]; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_light_set_duty |
||||
* Description : set each channel's duty params |
||||
* Parameters : uint8 duty : 0 ~ PWM_DEPTH |
||||
* uint8 channel : LIGHT_RED/LIGHT_GREEN/LIGHT_BLUE |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_light_set_duty(uint32 duty, uint8 channel) |
||||
{ |
||||
if (duty != light_param.pwm_duty[channel]) { |
||||
pwm_set_duty(duty, channel); |
||||
|
||||
light_param.pwm_duty[channel] = pwm_get_duty(channel); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_light_get_period |
||||
* Description : get pwm period |
||||
* Parameters : NONE |
||||
* Returns : uint32 : pwm period |
||||
*******************************************************************************/ |
||||
uint32 ICACHE_FLASH_ATTR |
||||
user_light_get_period(void) |
||||
{ |
||||
return light_param.pwm_period; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_light_set_duty |
||||
* Description : set pwm frequency |
||||
* Parameters : uint16 freq : 100hz typically |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_light_set_period(uint32 period) |
||||
{ |
||||
if (period != light_param.pwm_period) { |
||||
pwm_set_period(period); |
||||
|
||||
light_param.pwm_period = pwm_get_period(); |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_light_restart(void) |
||||
{ |
||||
spi_flash_erase_sector(PRIV_PARAM_START_SEC + PRIV_PARAM_SAVE); |
||||
spi_flash_write((PRIV_PARAM_START_SEC + PRIV_PARAM_SAVE) * SPI_FLASH_SEC_SIZE, |
||||
(uint32 *)&light_param, sizeof(struct light_saved_param)); |
||||
|
||||
pwm_start(); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_light_init |
||||
* Description : light demo init, mainy init pwm |
||||
* Parameters : none |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_light_init(void) |
||||
{ |
||||
spi_flash_read((PRIV_PARAM_START_SEC + PRIV_PARAM_SAVE) * SPI_FLASH_SEC_SIZE, |
||||
(uint32 *)&light_param, sizeof(struct light_saved_param)); |
||||
if(light_param.pwm_period>10000 || light_param.pwm_period <1000){ |
||||
light_param.pwm_period = 1000; |
||||
} |
||||
|
||||
uint32 io_info[][3] = { {PWM_0_OUT_IO_MUX,PWM_0_OUT_IO_FUNC,PWM_0_OUT_IO_NUM}, |
||||
{PWM_1_OUT_IO_MUX,PWM_1_OUT_IO_FUNC,PWM_1_OUT_IO_NUM}, |
||||
{PWM_2_OUT_IO_MUX,PWM_2_OUT_IO_FUNC,PWM_2_OUT_IO_NUM}, |
||||
{PWM_3_OUT_IO_MUX,PWM_3_OUT_IO_FUNC,PWM_3_OUT_IO_NUM}, |
||||
{PWM_4_OUT_IO_MUX,PWM_4_OUT_IO_FUNC,PWM_4_OUT_IO_NUM}, |
||||
}; |
||||
|
||||
uint32 pwm_duty_init[PWM_CHANNEL] = {0}; |
||||
|
||||
/*PIN FUNCTION INIT FOR PWM OUTPUT*/ |
||||
pwm_init(light_param.pwm_period, pwm_duty_init ,PWM_CHANNEL,io_info); |
||||
|
||||
os_printf("LIGHT PARAM: R: %d \r\n",light_param.pwm_duty[LIGHT_RED]); |
||||
os_printf("LIGHT PARAM: G: %d \r\n",light_param.pwm_duty[LIGHT_GREEN]); |
||||
os_printf("LIGHT PARAM: B: %d \r\n",light_param.pwm_duty[LIGHT_BLUE]); |
||||
if(PWM_CHANNEL>LIGHT_COLD_WHITE){ |
||||
os_printf("LIGHT PARAM: CW: %d \r\n",light_param.pwm_duty[LIGHT_COLD_WHITE]); |
||||
os_printf("LIGHT PARAM: WW: %d \r\n",light_param.pwm_duty[LIGHT_WARM_WHITE]); |
||||
} |
||||
os_printf("LIGHT PARAM: P: %d \r\n",light_param.pwm_period); |
||||
|
||||
uint32 light_init_target[8]={0}; |
||||
os_memcpy(light_init_target,light_param.pwm_duty,sizeof(light_param.pwm_duty)); |
||||
|
||||
light_set_aim(
|
||||
light_init_target[LIGHT_RED], |
||||
light_init_target[LIGHT_GREEN], |
||||
light_init_target[LIGHT_BLUE],
|
||||
light_init_target[LIGHT_COLD_WHITE], |
||||
light_init_target[LIGHT_WARM_WHITE], |
||||
light_param.pwm_period); |
||||
set_pwm_debug_en(0);//disable debug print in pwm driver
|
||||
os_printf("PWM version : %08x \r\n",get_pwm_version()); |
||||
} |
||||
#endif |
||||
|
@ -1,334 +0,0 @@ |
||||
|
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "os_type.h" |
||||
#include "mem.h" |
||||
#include "user_interface.h" |
||||
|
||||
#include "user_light.h" |
||||
#include "user_light_adj.h" |
||||
#include "pwm.h" |
||||
|
||||
#define ABS_MINUS(x,y) (x<y?(y-x):(x-y)) |
||||
uint8 light_sleep_flg = 0; |
||||
|
||||
uint16 min_ms = 15; |
||||
uint32 current_duty[PWM_CHANNEL] = {0}; |
||||
|
||||
bool change_finish=true; |
||||
os_timer_t timer_pwm_adj; |
||||
|
||||
static u32 duty_now[PWM_CHANNEL] = {0}; |
||||
|
||||
|
||||
|
||||
|
||||
//-----------------------------------Light para storage---------------------------
|
||||
#define LIGHT_EVT_QNUM (40) |
||||
|
||||
static struct pwm_param LightEvtArr[LIGHT_EVT_QNUM]; |
||||
|
||||
static u8 CurFreeLightEvtIdx = 0; |
||||
static u8 TotalUsedLightEvtNum = 0; |
||||
static u8 CurEvtIdxToBeUse = 0; |
||||
|
||||
static struct pwm_param *LightEvtMalloc(void) |
||||
{ |
||||
struct pwm_param *tmp = NULL; |
||||
TotalUsedLightEvtNum++; |
||||
if(TotalUsedLightEvtNum > LIGHT_EVT_QNUM ){ |
||||
TotalUsedLightEvtNum--; |
||||
} |
||||
else{ |
||||
tmp = &(LightEvtArr[CurFreeLightEvtIdx]); |
||||
CurFreeLightEvtIdx++; |
||||
if( CurFreeLightEvtIdx > (LIGHT_EVT_QNUM-1) ) |
||||
CurFreeLightEvtIdx = 0; |
||||
} |
||||
os_printf("malloc:%u\n",TotalUsedLightEvtNum); |
||||
return tmp; |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR LightEvtFree(void) |
||||
{ |
||||
TotalUsedLightEvtNum--; |
||||
os_printf("free:%u\n",TotalUsedLightEvtNum); |
||||
} |
||||
//------------------------------------------------------------------------------------
|
||||
|
||||
static void ICACHE_FLASH_ATTR light_pwm_smooth_adj_proc(void); |
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
light_save_target_duty() |
||||
{ |
||||
extern struct light_saved_param light_param; |
||||
|
||||
os_memcpy(light_param.pwm_duty,current_duty,sizeof(light_param.pwm_duty)); |
||||
light_param.pwm_period = pwm_get_period(); |
||||
|
||||
#if SAVE_LIGHT_PARAM |
||||
spi_flash_erase_sector(PRIV_PARAM_START_SEC + PRIV_PARAM_SAVE); |
||||
spi_flash_write((PRIV_PARAM_START_SEC + PRIV_PARAM_SAVE) * SPI_FLASH_SEC_SIZE, |
||||
(uint32 *)&light_param, sizeof(struct light_saved_param)); |
||||
#endif |
||||
|
||||
} |
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
light_set_aim_r(uint32 r) |
||||
{ |
||||
current_duty[LIGHT_RED]=r; |
||||
light_pwm_smooth_adj_proc(); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
light_set_aim_g(uint32 g) |
||||
{ |
||||
current_duty[LIGHT_GREEN]=g; |
||||
light_pwm_smooth_adj_proc(); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
light_set_aim_b(uint32 b) |
||||
{ |
||||
current_duty[LIGHT_BLUE]=b; |
||||
light_pwm_smooth_adj_proc(); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
light_set_aim_cw(uint32 cw) |
||||
{ |
||||
current_duty[LIGHT_COLD_WHITE]=cw; |
||||
light_pwm_smooth_adj_proc(); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
light_set_aim_ww(uint32 ww) |
||||
{ |
||||
current_duty[LIGHT_WARM_WHITE]=ww; |
||||
light_pwm_smooth_adj_proc(); |
||||
} |
||||
|
||||
LOCAL bool ICACHE_FLASH_ATTR |
||||
check_pwm_current_duty_diff() |
||||
{ |
||||
int i; |
||||
|
||||
for(i=0;i<PWM_CHANNEL;i++){ |
||||
if(pwm_get_duty(i) != current_duty[i]){ |
||||
return true; |
||||
} |
||||
} |
||||
return false; |
||||
|
||||
} |
||||
|
||||
|
||||
void light_dh_pwm_adj_proc(void *Targ) |
||||
{ |
||||
uint8 i; |
||||
for(i=0;i<PWM_CHANNEL;i++){
|
||||
duty_now[i] = (duty_now[i]*15 + current_duty[i])>>4; |
||||
if( ABS_MINUS(duty_now[i],current_duty[i])<20 ) |
||||
duty_now[i] = current_duty[i]; |
||||
user_light_set_duty(duty_now[i],i); |
||||
} |
||||
|
||||
//os_printf("duty:%u,%u,%u\r\n", pwm.duty[0],pwm.duty[1],pwm.duty[2] );
|
||||
pwm_start();
|
||||
|
||||
if(check_pwm_current_duty_diff()){ |
||||
change_finish = 0;
|
||||
os_timer_disarm(&timer_pwm_adj); |
||||
os_timer_setfn(&timer_pwm_adj, (os_timer_func_t *)light_dh_pwm_adj_proc, NULL); |
||||
os_timer_arm(&timer_pwm_adj, min_ms, 0);
|
||||
} |
||||
else{ |
||||
os_printf("finish\n"); |
||||
change_finish = 1;
|
||||
//light_save_target_duty();
|
||||
os_timer_disarm(&timer_pwm_adj); |
||||
light_pwm_smooth_adj_proc(); |
||||
} |
||||
|
||||
} |
||||
|
||||
LOCAL bool ICACHE_FLASH_ATTR |
||||
check_pwm_duty_zero() |
||||
{ |
||||
int i; |
||||
for(i=0;i<PWM_CHANNEL;i++){ |
||||
if(pwm_get_duty(i) != 0){ |
||||
return false; |
||||
} |
||||
} |
||||
return true; |
||||
} |
||||
|
||||
|
||||
static void ICACHE_FLASH_ATTR light_pwm_smooth_adj_proc(void) |
||||
{ |
||||
if( TotalUsedLightEvtNum>0 ){ |
||||
user_light_set_period( LightEvtArr[CurEvtIdxToBeUse].period ); |
||||
|
||||
os_memcpy(current_duty,LightEvtArr[CurEvtIdxToBeUse].duty,sizeof(current_duty)); |
||||
CurEvtIdxToBeUse++; |
||||
if(CurEvtIdxToBeUse > (LIGHT_EVT_QNUM-1) ){ |
||||
CurEvtIdxToBeUse = 0; |
||||
} |
||||
LightEvtFree(); |
||||
|
||||
if(change_finish){ |
||||
light_dh_pwm_adj_proc(NULL); |
||||
} |
||||
} |
||||
|
||||
if(change_finish){ |
||||
light_save_target_duty(); |
||||
if(check_pwm_duty_zero()){ |
||||
if(light_sleep_flg==0){ |
||||
os_printf("light sleep en\r\n"); |
||||
wifi_set_sleep_type(LIGHT_SLEEP_T); |
||||
light_sleep_flg = 1; |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
#if LIGHT_CURRENT_LIMIT |
||||
uint32 light_get_cur(uint32 duty , uint8 channel, uint32 period) |
||||
{ |
||||
uint32 duty_max_limit = (period*1000/45); |
||||
uint32 duty_mapped = duty*22727/duty_max_limit; |
||||
switch(channel){ |
||||
|
||||
case LIGHT_RED :
|
||||
if(duty_mapped>=0 && duty_mapped<23000){ |
||||
return (duty_mapped*151000/22727); |
||||
} |
||||
|
||||
break; |
||||
|
||||
case LIGHT_GREEN: |
||||
if(duty_mapped>=0 && duty_mapped<23000){ |
||||
return (duty_mapped*82000/22727); |
||||
} |
||||
break; |
||||
|
||||
case LIGHT_BLUE: |
||||
if(duty_mapped>=0 && duty_mapped<23000){ |
||||
return (duty_mapped*70000/22727); |
||||
} |
||||
break; |
||||
|
||||
case LIGHT_COLD_WHITE: |
||||
case LIGHT_WARM_WHITE: |
||||
if(duty_mapped>=0 && duty_mapped<23000){ |
||||
return (duty_mapped*115000/22727); |
||||
} |
||||
break; |
||||
|
||||
default: |
||||
os_printf("CHANNEL ERROR IN GET_CUR\r\n"); |
||||
break; |
||||
|
||||
|
||||
|
||||
} |
||||
|
||||
} |
||||
|
||||
#endif |
||||
|
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
light_set_aim(uint32 r,uint32 g,uint32 b,uint32 cw,uint32 ww,uint32 period) |
||||
{ |
||||
struct pwm_param *tmp = LightEvtMalloc();
|
||||
if(tmp != NULL){ |
||||
tmp->period = (period<10000?period:10000); |
||||
uint32 duty_max_limit = (period*1000/45); |
||||
|
||||
tmp->duty[LIGHT_RED] = (r<duty_max_limit?r:duty_max_limit); |
||||
tmp->duty[LIGHT_GREEN] = (g<duty_max_limit?g:duty_max_limit); |
||||
tmp->duty[LIGHT_BLUE] = (b<duty_max_limit?b:duty_max_limit); |
||||
tmp->duty[LIGHT_COLD_WHITE] = (cw<duty_max_limit?cw:duty_max_limit); |
||||
tmp->duty[LIGHT_WARM_WHITE] = (ww<duty_max_limit?ww:duty_max_limit);//chg
|
||||
|
||||
#if LIGHT_CURRENT_LIMIT |
||||
uint32 cur_r,cur_g,cur_b,cur_rgb; |
||||
|
||||
//if(cw>0 || ww>0){
|
||||
cur_r = light_get_cur(tmp->duty[LIGHT_RED] , LIGHT_RED, tmp->period); |
||||
|
||||
cur_g = light_get_cur(tmp->duty[LIGHT_GREEN] , LIGHT_GREEN, tmp->period); |
||||
cur_b = light_get_cur(tmp->duty[LIGHT_BLUE] , LIGHT_BLUE, tmp->period); |
||||
cur_rgb = (cur_r+cur_g+cur_b); |
||||
//}
|
||||
uint32 cur_cw = light_get_cur( tmp->duty[LIGHT_COLD_WHITE],LIGHT_COLD_WHITE, tmp->period); |
||||
uint32 cur_ww = light_get_cur( tmp->duty[LIGHT_WARM_WHITE],LIGHT_WARM_WHITE, tmp->period); |
||||
uint32 cur_remain,cur_mar; |
||||
cur_remain = (LIGHT_TOTAL_CURRENT_MAX - cur_rgb -LIGHT_CURRENT_MARGIN); |
||||
cur_mar = LIGHT_CURRENT_MARGIN; |
||||
|
||||
/*
|
||||
if((cur_cw < 50000) || (cur_ww < 50000)){ |
||||
cur_remain = (LIGHT_TOTAL_CURRENT_MAX - cur_rgb -LIGHT_CURRENT_MARGIN); |
||||
cur_mar = LIGHT_CURRENT_MARGIN; |
||||
}else if((cur_cw < 99000) || (cur_ww < 99000)){ |
||||
cur_remain = (LIGHT_TOTAL_CURRENT_MAX - cur_rgb -LIGHT_CURRENT_MARGIN_L2); |
||||
cur_mar = LIGHT_CURRENT_MARGIN_L2; |
||||
}else{ |
||||
cur_remain = (LIGHT_TOTAL_CURRENT_MAX - cur_rgb -LIGHT_CURRENT_MARGIN_L3); |
||||
cur_mar = LIGHT_CURRENT_MARGIN_L2; |
||||
} |
||||
|
||||
*/ |
||||
|
||||
/*
|
||||
if((LIGHT_TOTAL_CURRENT_MAX-cur_rgb)>120){ |
||||
cur_remain = (LIGHT_TOTAL_CURRENT_MAX - cur_rgb -LIGHT_CURRENT_MARGIN); |
||||
cur_mar = LIGHT_CURRENT_MARGIN; |
||||
}else if((LIGHT_TOTAL_CURRENT_MAX-cur_rgb)>100){ |
||||
cur_remain = (LIGHT_TOTAL_CURRENT_MAX - cur_rgb -LIGHT_CURRENT_MARGIN_L2); |
||||
cur_mar = LIGHT_CURRENT_MARGIN_L2; |
||||
}else{ |
||||
cur_remain = (LIGHT_TOTAL_CURRENT_MAX - cur_rgb -LIGHT_CURRENT_MARGIN_L3); |
||||
cur_mar = LIGHT_CURRENT_MARGIN_L2; |
||||
} |
||||
*/ |
||||
|
||||
|
||||
|
||||
os_printf("cur_remain: %d \r\n",cur_remain); |
||||
while((cur_cw+cur_ww) > cur_remain){ |
||||
tmp->duty[LIGHT_COLD_WHITE] = tmp->duty[LIGHT_COLD_WHITE] * 9 / 10; |
||||
tmp->duty[LIGHT_WARM_WHITE] = tmp->duty[LIGHT_WARM_WHITE] * 9 / 10; |
||||
cur_cw = light_get_cur( tmp->duty[LIGHT_COLD_WHITE],LIGHT_COLD_WHITE, tmp->period); |
||||
cur_ww = light_get_cur( tmp->duty[LIGHT_WARM_WHITE],LIGHT_WARM_WHITE, tmp->period); |
||||
}
|
||||
os_printf("debug : %d %d %d %d %d\r\n",cur_r/1000,cur_g/1000,cur_b/1000,cur_cw/1000,cur_ww/1000); |
||||
|
||||
os_printf("debug:total current after adj : %d + %d mA \r\n",(cur_cw+cur_ww+cur_r+cur_g+cur_b)/1000,cur_mar/1000); |
||||
#endif |
||||
|
||||
|
||||
|
||||
|
||||
os_printf("prd:%u r : %u g: %u b: %u cw: %u ww: %u \r\n",period, |
||||
tmp->duty[0],tmp->duty[1],tmp->duty[2],tmp->duty[3],tmp->duty[4]); |
||||
light_pwm_smooth_adj_proc(); |
||||
} |
||||
else{ |
||||
os_printf("light para full\n"); |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
|
@ -1,59 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_main.c |
||||
* |
||||
* Description: entry file of user application |
||||
* |
||||
* Modification history: |
||||
* 2014/1/1, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
|
||||
#include "user_interface.h" |
||||
|
||||
#include "user_devicefind.h" |
||||
#include "user_webserver.h" |
||||
|
||||
#if ESP_PLATFORM |
||||
#include "user_esp_platform.h" |
||||
#endif |
||||
|
||||
void user_rf_pre_init(void) |
||||
{ |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_init |
||||
* Description : entry of user application, init user function here |
||||
* Parameters : none |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void user_init(void) |
||||
{ |
||||
os_printf("SDK version:%s\n", system_get_sdk_version()); |
||||
|
||||
#if ESP_PLATFORM |
||||
/*Initialization of the peripheral drivers*/ |
||||
/*For light demo , it is user_light_init();*/ |
||||
/* Also check whether assigned ip addr by the router.If so, connect to ESP-server */ |
||||
user_esp_platform_init(); |
||||
#endif |
||||
/*Establish a udp socket to receive local device detect info.*/ |
||||
/*Listen to the port 1025, as well as udp broadcast.
|
||||
/*If receive a string of device_find_request, it rely its IP address and MAC.*/ |
||||
user_devicefind_init(); |
||||
|
||||
/*Establish a TCP server for http(with JSON) POST or GET command to communicate with the device.*/ |
||||
/*You can find the command in "2B-SDK-Espressif IoT Demo.pdf" to see the details.*/ |
||||
/*the JSON command for curl is like:*/ |
||||
/*3 Channel mode: curl -X POST -H "Content-Type:application/json" -d "{\"period\":1000,\"rgb\":{\"red\":16000,\"green\":16000,\"blue\":16000}}" http://192.168.4.1/config?command=light */ |
||||
/*5 Channel mode: curl -X POST -H "Content-Type:application/json" -d "{\"period\":1000,\"rgb\":{\"red\":16000,\"green\":16000,\"blue\":16000,\"cwhite\":3000,\"wwhite\",3000}}" http://192.168.4.1/config?command=light */ |
||||
#ifdef SERVER_SSL_ENABLE |
||||
user_webserver_init(SERVER_SSL_PORT); |
||||
#else |
||||
user_webserver_init(SERVER_PORT); |
||||
#endif |
||||
} |
||||
|
@ -1,159 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_plug.c |
||||
* |
||||
* Description: plug demo's function realization |
||||
* |
||||
* Modification history: |
||||
* 2014/5/1, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "os_type.h" |
||||
#include "mem.h" |
||||
#include "user_interface.h" |
||||
|
||||
#include "user_plug.h" |
||||
|
||||
#if PLUG_DEVICE |
||||
|
||||
LOCAL struct plug_saved_param plug_param; |
||||
LOCAL struct keys_param keys; |
||||
LOCAL struct single_key_param *single_key[PLUG_KEY_NUM]; |
||||
LOCAL os_timer_t link_led_timer; |
||||
LOCAL uint8 link_led_level = 0; |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_plug_get_status |
||||
* Description : get plug's status, 0x00 or 0x01 |
||||
* Parameters : none |
||||
* Returns : uint8 - plug's status |
||||
*******************************************************************************/ |
||||
uint8 ICACHE_FLASH_ATTR |
||||
user_plug_get_status(void) |
||||
{ |
||||
return plug_param.status; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_plug_set_status |
||||
* Description : set plug's status, 0x00 or 0x01 |
||||
* Parameters : uint8 - status |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_plug_set_status(bool status) |
||||
{ |
||||
if (status != plug_param.status) { |
||||
if (status > 1) { |
||||
os_printf("error status input!\n"); |
||||
return; |
||||
} |
||||
|
||||
plug_param.status = status; |
||||
PLUG_STATUS_OUTPUT(PLUG_RELAY_LED_IO_NUM, status); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_plug_short_press |
||||
* Description : key's short press function, needed to be installed |
||||
* Parameters : none |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_plug_short_press(void) |
||||
{ |
||||
user_plug_set_status((~plug_param.status) & 0x01); |
||||
|
||||
spi_flash_erase_sector(PRIV_PARAM_START_SEC + PRIV_PARAM_SAVE); |
||||
spi_flash_write((PRIV_PARAM_START_SEC + PRIV_PARAM_SAVE) * SPI_FLASH_SEC_SIZE, |
||||
(uint32 *)&plug_param, sizeof(struct plug_saved_param)); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_plug_long_press |
||||
* Description : key's long press function, needed to be installed |
||||
* Parameters : none |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_plug_long_press(void) |
||||
{ |
||||
user_esp_platform_set_active(0); |
||||
system_restore(); |
||||
system_restart(); |
||||
} |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_link_led_init(void) |
||||
{ |
||||
PIN_FUNC_SELECT(PLUG_LINK_LED_IO_MUX, PLUG_LINK_LED_IO_FUNC); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_link_led_output(uint8 level) |
||||
{ |
||||
GPIO_OUTPUT_SET(GPIO_ID_PIN(PLUG_LINK_LED_IO_NUM), level); |
||||
} |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_link_led_timer_cb(void) |
||||
{ |
||||
link_led_level = (~link_led_level) & 0x01; |
||||
GPIO_OUTPUT_SET(GPIO_ID_PIN(PLUG_LINK_LED_IO_NUM), link_led_level); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_link_led_timer_init(void) |
||||
{ |
||||
os_timer_disarm(&link_led_timer); |
||||
os_timer_setfn(&link_led_timer, (os_timer_func_t *)user_link_led_timer_cb, NULL); |
||||
os_timer_arm(&link_led_timer, 50, 1); |
||||
link_led_level = 0; |
||||
GPIO_OUTPUT_SET(GPIO_ID_PIN(PLUG_LINK_LED_IO_NUM), link_led_level); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_link_led_timer_done(void) |
||||
{ |
||||
os_timer_disarm(&link_led_timer); |
||||
GPIO_OUTPUT_SET(GPIO_ID_PIN(PLUG_LINK_LED_IO_NUM), 0); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_plug_init |
||||
* Description : init plug's key function and relay output |
||||
* Parameters : none |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_plug_init(void) |
||||
{ |
||||
user_link_led_init(); |
||||
|
||||
wifi_status_led_install(PLUG_WIFI_LED_IO_NUM, PLUG_WIFI_LED_IO_MUX, PLUG_WIFI_LED_IO_FUNC); |
||||
|
||||
single_key[0] = key_init_single(PLUG_KEY_0_IO_NUM, PLUG_KEY_0_IO_MUX, PLUG_KEY_0_IO_FUNC, |
||||
user_plug_long_press, user_plug_short_press); |
||||
|
||||
keys.key_num = PLUG_KEY_NUM; |
||||
keys.single_key = single_key; |
||||
|
||||
key_init(&keys); |
||||
|
||||
spi_flash_read((PRIV_PARAM_START_SEC + PRIV_PARAM_SAVE) * SPI_FLASH_SEC_SIZE, |
||||
(uint32 *)&plug_param, sizeof(struct plug_saved_param)); |
||||
|
||||
PIN_FUNC_SELECT(PLUG_RELAY_LED_IO_MUX, PLUG_RELAY_LED_IO_FUNC); |
||||
|
||||
// no used SPI Flash
|
||||
if (plug_param.status == 0xff) { |
||||
plug_param.status = 1; |
||||
} |
||||
|
||||
PLUG_STATUS_OUTPUT(PLUG_RELAY_LED_IO_NUM, plug_param.status); |
||||
} |
||||
#endif |
||||
|
@ -1,230 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_humiture.c |
||||
* |
||||
* Description: humiture demo's function realization |
||||
* |
||||
* Modification history: |
||||
* 2014/5/1, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "os_type.h" |
||||
#include "user_interface.h" |
||||
|
||||
#if SENSOR_DEVICE |
||||
#include "user_sensor.h" |
||||
|
||||
LOCAL struct keys_param keys; |
||||
LOCAL struct single_key_param *single_key[SENSOR_KEY_NUM]; |
||||
LOCAL os_timer_t sensor_sleep_timer; |
||||
LOCAL os_timer_t link_led_timer; |
||||
LOCAL uint8 link_led_level = 0; |
||||
LOCAL uint32 link_start_time; |
||||
|
||||
#if HUMITURE_SUB_DEVICE |
||||
#include "driver/i2c_master.h" |
||||
|
||||
#define MVH3004_Addr 0x88 |
||||
|
||||
LOCAL uint8 humiture_data[4]; |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_mvh3004_burst_read |
||||
* Description : burst read mvh3004's internal data |
||||
* Parameters : uint8 addr - mvh3004's address |
||||
* uint8 *pData - data point to put read data |
||||
* uint16 len - read length |
||||
* Returns : bool - true or false |
||||
*******************************************************************************/ |
||||
LOCAL bool ICACHE_FLASH_ATTR |
||||
user_mvh3004_burst_read(uint8 addr, uint8 *pData, uint16 len) |
||||
{ |
||||
uint8 ack; |
||||
uint16 i; |
||||
|
||||
i2c_master_start(); |
||||
i2c_master_writeByte(addr); |
||||
ack = i2c_master_getAck(); |
||||
|
||||
if (ack) { |
||||
os_printf("addr not ack when tx write cmd \n"); |
||||
i2c_master_stop(); |
||||
return false; |
||||
} |
||||
|
||||
i2c_master_stop(); |
||||
i2c_master_wait(40000); |
||||
|
||||
i2c_master_start(); |
||||
i2c_master_writeByte(addr + 1); |
||||
ack = i2c_master_getAck(); |
||||
|
||||
if (ack) { |
||||
os_printf("addr not ack when tx write cmd \n"); |
||||
i2c_master_stop(); |
||||
return false; |
||||
} |
||||
|
||||
for (i = 0; i < len; i++) { |
||||
pData[i] = i2c_master_readByte(); |
||||
|
||||
i2c_master_setAck((i == (len - 1)) ? 1 : 0); |
||||
} |
||||
|
||||
i2c_master_stop(); |
||||
|
||||
return true; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_mvh3004_read_th |
||||
* Description : read mvh3004's humiture data |
||||
* Parameters : uint8 *data - where data to put |
||||
* Returns : bool - ture or false |
||||
*******************************************************************************/ |
||||
bool ICACHE_FLASH_ATTR |
||||
user_mvh3004_read_th(uint8 *data) |
||||
{ |
||||
return user_mvh3004_burst_read(MVH3004_Addr, data, 4); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_mvh3004_init |
||||
* Description : init mvh3004, mainly i2c master gpio |
||||
* Parameters : none |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_mvh3004_init(void) |
||||
{ |
||||
i2c_master_gpio_init(); |
||||
} |
||||
|
||||
uint8 *ICACHE_FLASH_ATTR |
||||
user_mvh3004_get_poweron_th(void) |
||||
{ |
||||
return humiture_data; |
||||
} |
||||
#endif |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_humiture_long_press |
||||
* Description : humiture key's function, needed to be installed |
||||
* Parameters : none |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_sensor_long_press(void) |
||||
{ |
||||
user_esp_platform_set_active(0); |
||||
system_restore(); |
||||
system_restart(); |
||||
} |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_link_led_init(void) |
||||
{ |
||||
PIN_FUNC_SELECT(SENSOR_LINK_LED_IO_MUX, SENSOR_LINK_LED_IO_FUNC); |
||||
PIN_FUNC_SELECT(SENSOR_UNUSED_LED_IO_MUX, SENSOR_UNUSED_LED_IO_FUNC); |
||||
GPIO_OUTPUT_SET(GPIO_ID_PIN(SENSOR_UNUSED_LED_IO_NUM), 0); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_link_led_output(uint8 level) |
||||
{ |
||||
GPIO_OUTPUT_SET(GPIO_ID_PIN(SENSOR_LINK_LED_IO_NUM), level); |
||||
} |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_link_led_timer_cb(void) |
||||
{ |
||||
link_led_level = (~link_led_level) & 0x01; |
||||
GPIO_OUTPUT_SET(GPIO_ID_PIN(SENSOR_LINK_LED_IO_NUM), link_led_level); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_link_led_timer_init(void) |
||||
{ |
||||
link_start_time = system_get_time(); |
||||
|
||||
os_timer_disarm(&link_led_timer); |
||||
os_timer_setfn(&link_led_timer, (os_timer_func_t *)user_link_led_timer_cb, NULL); |
||||
os_timer_arm(&link_led_timer, 50, 1); |
||||
link_led_level = 0; |
||||
GPIO_OUTPUT_SET(GPIO_ID_PIN(SENSOR_LINK_LED_IO_NUM), link_led_level); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_link_led_timer_done(void) |
||||
{ |
||||
os_timer_disarm(&link_led_timer); |
||||
GPIO_OUTPUT_SET(GPIO_ID_PIN(SENSOR_LINK_LED_IO_NUM), 0); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_sensor_deep_sleep_enter(void) |
||||
{ |
||||
system_deep_sleep(SENSOR_DEEP_SLEEP_TIME > link_start_time \
|
||||
? SENSOR_DEEP_SLEEP_TIME - link_start_time : 30000000); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_sensor_deep_sleep_disable(void) |
||||
{ |
||||
os_timer_disarm(&sensor_sleep_timer); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_sensor_deep_sleep_init(uint32 time) |
||||
{ |
||||
os_timer_disarm(&sensor_sleep_timer); |
||||
os_timer_setfn(&sensor_sleep_timer, (os_timer_func_t *)user_sensor_deep_sleep_enter, NULL); |
||||
os_timer_arm(&sensor_sleep_timer, time, 0); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_humiture_init |
||||
* Description : init humiture function, include key and mvh3004 |
||||
* Parameters : none |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
user_sensor_init(uint8 active) |
||||
{ |
||||
user_link_led_init(); |
||||
|
||||
wifi_status_led_install(SENSOR_WIFI_LED_IO_NUM, SENSOR_WIFI_LED_IO_MUX, SENSOR_WIFI_LED_IO_FUNC); |
||||
|
||||
if (wifi_get_opmode() != SOFTAP_MODE) { |
||||
single_key[0] = key_init_single(SENSOR_KEY_IO_NUM, SENSOR_KEY_IO_MUX, SENSOR_KEY_IO_FUNC, |
||||
user_sensor_long_press, NULL); |
||||
|
||||
keys.key_num = SENSOR_KEY_NUM; |
||||
keys.single_key = single_key; |
||||
|
||||
key_init(&keys); |
||||
|
||||
if (GPIO_INPUT_GET(GPIO_ID_PIN(SENSOR_KEY_IO_NUM)) == 0) { |
||||
user_sensor_long_press(); |
||||
} |
||||
} |
||||
|
||||
#if HUMITURE_SUB_DEVICE |
||||
user_mvh3004_init(); |
||||
user_mvh3004_read_th(humiture_data); |
||||
#endif |
||||
|
||||
#ifdef SENSOR_DEEP_SLEEP |
||||
if (wifi_get_opmode() != STATIONAP_MODE) { |
||||
if (active == 1) { |
||||
user_sensor_deep_sleep_init(SENSOR_DEEP_SLEEP_TIME / 1000 ); |
||||
} else { |
||||
user_sensor_deep_sleep_init(SENSOR_DEEP_SLEEP_TIME / 1000 / 3 * 2); |
||||
} |
||||
} |
||||
#endif |
||||
} |
||||
#endif |
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,42 +0,0 @@ |
||||
Notice: AT added some functions so it's larger than before, if you want to compile it, please compile it as 1024KB or larger flash in compilation STEP 5. |
||||
|
||||
1¡¢compile options |
||||
|
||||
(1) COMPILE |
||||
Possible value: gcc |
||||
Default value: |
||||
If not set, use xt-xcc by default. |
||||
|
||||
(2) BOOT |
||||
Possible value: none/old/new |
||||
none: no need boot |
||||
old: use boot_v1.1 |
||||
new: use boot_v1.2+ |
||||
Default value: none |
||||
|
||||
(3) APP |
||||
Possible value: 0/1/2 |
||||
0: original mode, generate eagle.app.v6.flash.bin and eagle.app.v6.irom0text.bin |
||||
1: generate user1 |
||||
2: generate user2 |
||||
Default value: 0 |
||||
|
||||
(3) SPI_SPEED |
||||
Possible value: 20/26.7/40/80 |
||||
Default value: 40 |
||||
|
||||
(4) SPI_MODE |
||||
Possible value: QIO/QOUT/DIO/DOUT |
||||
Default value: QIO |
||||
|
||||
(4) SPI_SIZE |
||||
Possible value: 0/2/3/4/5/6 |
||||
Default value: 0 |
||||
|
||||
For example: |
||||
make COMPILE=gcc BOOT=new APP=1 SPI_SPEED=40 SPI_MODE=QIO SPI_SIZE_MAP=0 |
||||
|
||||
2¡¢You can also use gen_misc to make and generate specific bin you needed. |
||||
Linux: ./gen_misc.sh |
||||
Windows: gen_misc.bat |
||||
Follow the tips and steps. |
@ -1,149 +0,0 @@ |
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of object file images to be generated ()
|
||||
# GEN_BINS - list of binaries to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
TARGET = eagle
|
||||
#FLAVOR = release
|
||||
FLAVOR = debug
|
||||
|
||||
#EXTRA_CCFLAGS += -u
|
||||
|
||||
ifndef PDIR # {
|
||||
GEN_IMAGES= eagle.app.v6.out
|
||||
GEN_BINS= eagle.app.v6.bin
|
||||
SPECIAL_MKTARGETS=$(APP_MKTARGETS)
|
||||
SUBDIRS= \
|
||||
user
|
||||
ifdef AT_OPEN_SRC |
||||
SUBDIRS += \
|
||||
at
|
||||
endif |
||||
endif # } PDIR
|
||||
|
||||
APPDIR = .
|
||||
LDDIR = ../ld
|
||||
|
||||
CCFLAGS += -Os
|
||||
|
||||
TARGET_LDFLAGS = \
|
||||
-nostdlib \
|
||||
-Wl,-EL \
|
||||
--longcalls \
|
||||
--text-section-literals
|
||||
|
||||
ifeq ($(FLAVOR),debug) |
||||
TARGET_LDFLAGS += -g -O2
|
||||
endif |
||||
|
||||
ifeq ($(FLAVOR),release) |
||||
TARGET_LDFLAGS += -g -O0
|
||||
endif |
||||
|
||||
COMPONENTS_eagle.app.v6 = \
|
||||
user/libuser.a
|
||||
|
||||
ifdef AT_OPEN_SRC |
||||
COMPONENTS_eagle.app.v6 += \
|
||||
at/libat.a
|
||||
endif |
||||
|
||||
LINKFLAGS_eagle.app.v6 = \
|
||||
-L../lib \
|
||||
-nostdlib \
|
||||
-T$(LD_FILE) \
|
||||
-Wl,--no-check-sections \
|
||||
-u call_user_start \
|
||||
-Wl,-static \
|
||||
-Wl,--start-group \
|
||||
-lc \
|
||||
-lgcc \
|
||||
-lhal \
|
||||
-lphy \
|
||||
-lpp \
|
||||
-lnet80211 \
|
||||
-llwip \
|
||||
-lwpa \
|
||||
-lcrypto \
|
||||
-lmain \
|
||||
-ljson \
|
||||
-lupgrade \
|
||||
-lssl \
|
||||
-lwps \
|
||||
-lsmartconfig \
|
||||
-lairkiss \
|
||||
$(DEP_LIBS_eagle.app.v6)
|
||||
|
||||
ifndef AT_OPEN_SRC |
||||
LINKFLAGS_eagle.app.v6 += \
|
||||
-lat
|
||||
endif |
||||
|
||||
LINKFLAGS_eagle.app.v6 += \
|
||||
-Wl,--end-group
|
||||
DEPENDS_eagle.app.v6 = \
|
||||
$(LD_FILE) \
|
||||
$(LDDIR)/eagle.rom.addr.v6.ld
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
|
||||
#UNIVERSAL_TARGET_DEFINES = \
|
||||
|
||||
# Other potential configuration flags include:
|
||||
# -DTXRX_TXBUF_DEBUG
|
||||
# -DTXRX_RXBUF_DEBUG
|
||||
# -DWLAN_CONFIG_CCX
|
||||
CONFIGURATION_DEFINES = -DICACHE_FLASH
|
||||
ifdef AT_OPEN_SRC |
||||
CONFIGURATION_DEFINES += \
|
||||
-DAT_OPEN_SRC
|
||||
endif |
||||
|
||||
ifeq ($(APP),0) |
||||
else |
||||
CONFIGURATION_DEFINES += \
|
||||
-DAT_UPGRADE_SUPPORT
|
||||
endif |
||||
|
||||
DEFINES += \
|
||||
$(UNIVERSAL_TARGET_DEFINES) \
|
||||
$(CONFIGURATION_DEFINES)
|
||||
|
||||
DDEFINES += \
|
||||
$(UNIVERSAL_TARGET_DEFINES) \
|
||||
$(CONFIGURATION_DEFINES)
|
||||
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
||||
.PHONY: FORCE |
||||
FORCE: |
||||
|
@ -1,147 +0,0 @@ |
||||
@echo off |
||||
|
||||
echo gen_misc.bat version 20150511 |
||||
echo . |
||||
|
||||
echo Please follow below steps(1-5) to generate specific bin(s): |
||||
echo STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none) |
||||
set input=default |
||||
set /p input=enter(0/1/2, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set boot=old |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set boot=new |
||||
) else ( |
||||
set boot=none |
||||
) |
||||
) |
||||
|
||||
echo boot mode: %boot% |
||||
echo. |
||||
|
||||
echo STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin) |
||||
set input=default |
||||
set /p input=enter (0/1/2, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=1 |
||||
echo generate bin: user1.bin |
||||
) |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=2 |
||||
echo generate bin: user2.bin |
||||
) |
||||
) else ( |
||||
if %boot% neq none ( |
||||
set boot=none |
||||
echo ignore boot |
||||
) |
||||
set app=0 |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
)) |
||||
|
||||
echo. |
||||
|
||||
echo STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set spi_speed=20 |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set spi_speed=26.7 |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_speed=80 |
||||
) else ( |
||||
set spi_speed=40 |
||||
))) |
||||
|
||||
echo spi speed: %spi_speed% MHz |
||||
echo. |
||||
|
||||
echo STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
set spi_mode=QOUT |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
set spi_mode=DIO |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_mode=DOUT |
||||
) else ( |
||||
set spi_mode=QIO |
||||
))) |
||||
|
||||
echo spi mode: %spi_mode% |
||||
echo. |
||||
|
||||
echo STEP 5: choose flash size and map |
||||
echo 0= 512KB( 256KB+ 256KB) |
||||
echo 2=1024KB( 512KB+ 512KB) |
||||
echo 3=2048KB( 512KB+ 512KB) |
||||
echo 4=4096KB( 512KB+ 512KB) |
||||
echo 5=2048KB(1024KB+1024KB) |
||||
echo 6=4096KB(1024KB+1024KB) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3/4/5/6, default 0): |
||||
|
||||
if %input% equ 2 ( |
||||
set spi_size_map=2 |
||||
echo spi size: 1024KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_size_map=3 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 4 ( |
||||
set spi_size_map=4 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 5 ( |
||||
set spi_size_map=5 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
if %input% equ 6 ( |
||||
set spi_size_map=6 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
set spi_size_map=0 |
||||
echo spi size: 512KB |
||||
echo spi ota map: 256KB + 256KB |
||||
) |
||||
) |
||||
) |
||||
) |
||||
) |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo. |
||||
echo start... |
||||
echo. |
||||
|
||||
make BOOT=%boot% APP=%app% SPI_SPEED=%spi_speed% SPI_MODE=%spi_mode% SPI_SIZE=%spi_size_map% |
||||
|
@ -1,150 +0,0 @@ |
||||
#!/bin/bash |
||||
|
||||
echo "gen_misc.sh version 20150511" |
||||
echo "" |
||||
|
||||
echo "Please follow below steps(1-5) to generate specific bin(s):" |
||||
echo "STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none)" |
||||
echo "enter(0/1/2, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
boot=none |
||||
elif [ $input == 0 ]; then |
||||
boot=old |
||||
elif [ $input == 1 ]; then |
||||
boot=new |
||||
else |
||||
boot=none |
||||
fi |
||||
|
||||
echo "boot mode: $boot" |
||||
echo "" |
||||
|
||||
echo "STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin)" |
||||
echo "enter (0/1/2, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
elif [ $input == 1 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=1 |
||||
echo "generate bin: user1.bin" |
||||
fi |
||||
elif [ $input == 2 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=2 |
||||
echo "generate bin: user2.bin" |
||||
fi |
||||
else |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
echo "STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz)" |
||||
echo "enter (0/1/2/3, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_speed=40 |
||||
elif [ $input == 0 ]; then |
||||
spi_speed=20 |
||||
elif [ $input == 1 ]; then |
||||
spi_speed=26.7 |
||||
elif [ $input == 3 ]; then |
||||
spi_speed=80 |
||||
else |
||||
spi_speed=40 |
||||
fi |
||||
|
||||
echo "spi speed: $spi_speed MHz" |
||||
echo "" |
||||
|
||||
echo "STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT)" |
||||
echo "enter (0/1/2/3, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_mode=QIO |
||||
elif [ $input == 1 ]; then |
||||
spi_mode=QOUT |
||||
elif [ $input == 2 ]; then |
||||
spi_mode=DIO |
||||
elif [ $input == 3 ]; then |
||||
spi_mode=DOUT |
||||
else |
||||
spi_mode=QIO |
||||
fi |
||||
|
||||
echo "spi mode: $spi_mode" |
||||
echo "" |
||||
|
||||
echo "STEP 5: choose spi size and map" |
||||
echo " 0= 512KB( 256KB+ 256KB)" |
||||
echo " 2=1024KB( 512KB+ 512KB)" |
||||
echo " 3=2048KB( 512KB+ 512KB)" |
||||
echo " 4=4096KB( 512KB+ 512KB)" |
||||
echo " 5=2048KB(1024KB+1024KB)" |
||||
echo " 6=4096KB(1024KB+1024KB)" |
||||
echo "enter (0/2/3/4/5/6, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
elif [ $input == 2 ]; then |
||||
spi_size_map=2 |
||||
echo "spi size: 1024KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 3 ]; then |
||||
spi_size_map=3 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 4 ]; then |
||||
spi_size_map=4 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 5 ]; then |
||||
spi_size_map=5 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
elif [ $input == 6 ]; then |
||||
spi_size_map=6 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
else |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo "" |
||||
echo "start..." |
||||
echo "" |
||||
|
||||
make COMPILE=gcc BOOT=$boot APP=$app SPI_SPEED=$spi_speed SPI_MODE=$spi_mode SPI_SIZE_MAP=$spi_size_map |
@ -1,12 +0,0 @@ |
||||
#ifndef __USER_CONFIG_H__ |
||||
#define __USER_CONFIG_H__ |
||||
|
||||
#define AT_CUSTOM_UPGRADE |
||||
|
||||
#ifdef AT_CUSTOM_UPGRADE |
||||
#ifndef AT_UPGRADE_SUPPORT |
||||
#error "upgrade is not supported when eagle.flash.bin+eagle.irom0text.bin!!!" |
||||
#endif |
||||
#endif |
||||
|
||||
#endif |
@ -1,45 +0,0 @@ |
||||
|
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of images to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
ifndef PDIR |
||||
GEN_LIBS = libuser.a
|
||||
endif |
||||
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
#DEFINES +=
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
INCLUDES += -I ./
|
||||
INCLUDES += -I ../../include/ets
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
@ -1,290 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2015-2018 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_main.c |
||||
* |
||||
* Description: entry file of user application |
||||
* |
||||
* Modification history: |
||||
* 2015/3/06, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "c_types.h" |
||||
#include "user_interface.h" |
||||
#include "espconn.h" |
||||
#include "mem.h" |
||||
#include "osapi.h" |
||||
#include "upgrade.h" |
||||
|
||||
#ifdef AT_UPGRADE_SUPPORT |
||||
#ifdef AT_CUSTOM_UPGRADE |
||||
|
||||
#define UPGRADE_FRAME "{\"path\": \"/v1/messages/\", \"method\": \"POST\", \"meta\": {\"Authorization\": \"token %s\"},\ |
||||
\"get\":{\"action\":\"%s\"},\"body\":{\"pre_rom_version\":\"%s\",\"rom_version\":\"%s\"}}\n" |
||||
|
||||
#define pheadbuffer "Connection: keep-alive\r\n\ |
||||
Cache-Control: no-cache\r\n\
|
||||
User-Agent: Mozilla/5.0 (Windows NT 5.1) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/30.0.1599.101 Safari/537.36 \r\n\
|
||||
Accept: */*\r\n\
|
||||
Accept-Encoding: gzip,deflate\r\n\
|
||||
Accept-Language: zh-CN,eb-US;q=0.8\r\n\r\n" |
||||
|
||||
/**/ |
||||
|
||||
|
||||
struct espconn *pespconn = NULL; |
||||
struct upgrade_server_info *upServer = NULL; |
||||
|
||||
static os_timer_t at_delay_check; |
||||
static struct espconn *pTcpServer = NULL; |
||||
static ip_addr_t host_ip; |
||||
/******************************************************************************
|
||||
* FunctionName : user_esp_platform_upgrade_cb |
||||
* Description : Processing the downloaded data from the server |
||||
* Parameters : pespconn -- the espconn used to connetion with the host |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
at_upDate_rsp(void *arg) |
||||
{ |
||||
struct upgrade_server_info *server = arg; |
||||
|
||||
|
||||
if(server->upgrade_flag == true) |
||||
{ |
||||
os_printf("device_upgrade_success\r\n"); |
||||
at_response_ok(); |
||||
system_upgrade_reboot(); |
||||
} |
||||
else |
||||
{ |
||||
os_printf("device_upgrade_failed\r\n"); |
||||
at_response_error(); |
||||
} |
||||
|
||||
os_free(server->url); |
||||
server->url = NULL; |
||||
os_free(server); |
||||
server = NULL; |
||||
} |
||||
/**
|
||||
* @brief Tcp client disconnect success callback function. |
||||
* @param arg: contain the ip link information |
||||
* @retval None |
||||
*/ |
||||
static void ICACHE_FLASH_ATTR |
||||
at_upDate_discon_cb(void *arg) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *)arg; |
||||
uint8_t idTemp = 0; |
||||
|
||||
if(pespconn->proto.tcp != NULL) |
||||
{ |
||||
os_free(pespconn->proto.tcp); |
||||
} |
||||
if(pespconn != NULL) |
||||
{ |
||||
os_free(pespconn); |
||||
} |
||||
|
||||
os_printf("disconnect\r\n"); |
||||
|
||||
if(system_upgrade_start(upServer) == false) |
||||
{ |
||||
at_response_error(); |
||||
} |
||||
else |
||||
{ |
||||
at_port_print("+CIPUPDATE:4\r\n"); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Udp server receive data callback function. |
||||
* @param arg: contain the ip link information |
||||
* @retval None |
||||
*/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
at_upDate_recv(void *arg, char *pusrdata, unsigned short len) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *)arg; |
||||
char temp[32] = {0}; |
||||
uint8_t user_bin[12] = {0}; |
||||
uint8_t i = 0; |
||||
|
||||
os_timer_disarm(&at_delay_check); |
||||
at_port_print("+CIPUPDATE:3\r\n"); |
||||
|
||||
upServer = (struct upgrade_server_info *)os_zalloc(sizeof(struct upgrade_server_info)); |
||||
|
||||
upServer->upgrade_version[5] = '\0'; |
||||
|
||||
upServer->pespconn = pespconn; |
||||
|
||||
os_memcpy(upServer->ip, pespconn->proto.tcp->remote_ip, 4); |
||||
|
||||
upServer->port = pespconn->proto.tcp->remote_port; |
||||
|
||||
upServer->check_cb = at_upDate_rsp; |
||||
upServer->check_times = 60000; |
||||
|
||||
if(upServer->url == NULL) |
||||
{ |
||||
upServer->url = (uint8 *) os_zalloc(1024); |
||||
} |
||||
|
||||
if(system_upgrade_userbin_check() == UPGRADE_FW_BIN1) |
||||
{ |
||||
os_memcpy(user_bin, "user2.bin", 10); |
||||
} |
||||
else if(system_upgrade_userbin_check() == UPGRADE_FW_BIN2) |
||||
{ |
||||
os_memcpy(user_bin, "user1.bin", 10); |
||||
} |
||||
|
||||
os_sprintf(upServer->url, |
||||
"GET /%s HTTP/1.1\r\nHost: "IPSTR"\r\n"pheadbuffer"", |
||||
user_bin, IP2STR(upServer->ip)); |
||||
} |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
at_upDate_wait(void *arg) |
||||
{ |
||||
struct espconn *pespconn = arg; |
||||
os_timer_disarm(&at_delay_check); |
||||
if(pespconn != NULL) |
||||
{ |
||||
espconn_disconnect(pespconn); |
||||
} |
||||
else |
||||
{ |
||||
at_response_error(); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_esp_platform_sent_cb |
||||
* Description : Data has been sent successfully and acknowledged by the remote host. |
||||
* Parameters : arg -- Additional argument to pass to the callback function |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
at_upDate_sent_cb(void *arg) |
||||
{ |
||||
struct espconn *pespconn = arg; |
||||
os_timer_disarm(&at_delay_check); |
||||
os_timer_setfn(&at_delay_check, (os_timer_func_t *)at_upDate_wait, pespconn); |
||||
os_timer_arm(&at_delay_check, 5000, 0); |
||||
os_printf("at_upDate_sent_cb\r\n"); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Tcp client connect success callback function. |
||||
* @param arg: contain the ip link information |
||||
* @retval None |
||||
*/ |
||||
static void ICACHE_FLASH_ATTR |
||||
at_upDate_connect_cb(void *arg) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *)arg; |
||||
uint8_t user_bin[9] = {0}; |
||||
char *temp = NULL; |
||||
|
||||
at_port_print("+CIPUPDATE:2\r\n"); |
||||
|
||||
|
||||
espconn_regist_disconcb(pespconn, at_upDate_discon_cb); |
||||
espconn_regist_recvcb(pespconn, at_upDate_recv);////////
|
||||
espconn_regist_sentcb(pespconn, at_upDate_sent_cb); |
||||
|
||||
temp = (uint8 *) os_zalloc(512); |
||||
|
||||
os_sprintf(temp,"GET /v1/device/rom/?is_format_simple=true HTTP/1.0\r\nHost: "IPSTR"\r\n"pheadbuffer"", |
||||
IP2STR(pespconn->proto.tcp->remote_ip)); |
||||
|
||||
espconn_sent(pespconn, temp, os_strlen(temp)); |
||||
os_free(temp); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Tcp client connect repeat callback function. |
||||
* @param arg: contain the ip link information |
||||
* @retval None |
||||
*/ |
||||
static void ICACHE_FLASH_ATTR |
||||
at_upDate_recon_cb(void *arg, sint8 errType) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *)arg; |
||||
|
||||
at_response_error(); |
||||
if(pespconn->proto.tcp != NULL) |
||||
{ |
||||
os_free(pespconn->proto.tcp); |
||||
} |
||||
os_free(pespconn); |
||||
os_printf("disconnect\r\n"); |
||||
|
||||
if(upServer != NULL) |
||||
{ |
||||
os_free(upServer); |
||||
upServer = NULL; |
||||
} |
||||
at_response_error(); |
||||
|
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : upServer_dns_found |
||||
* Description : dns found callback |
||||
* Parameters : name -- pointer to the name that was looked up. |
||||
* ipaddr -- pointer to an ip_addr_t containing the IP address of |
||||
* the hostname, or NULL if the name could not be found (or on any |
||||
* other error). |
||||
* callback_arg -- a user-specified callback argument passed to |
||||
* dns_gethostbyname |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
upServer_dns_found(const char *name, ip_addr_t *ipaddr, void *arg) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *) arg; |
||||
// char temp[32];
|
||||
|
||||
if(ipaddr == NULL) |
||||
{ |
||||
at_response_error(); |
||||
return; |
||||
} |
||||
at_port_print("+CIPUPDATE:1\r\n"); |
||||
|
||||
|
||||
if(host_ip.addr == 0 && ipaddr->addr != 0) |
||||
{ |
||||
if(pespconn->type == ESPCONN_TCP) |
||||
{ |
||||
os_memcpy(pespconn->proto.tcp->remote_ip, &ipaddr->addr, 4); |
||||
espconn_regist_connectcb(pespconn, at_upDate_connect_cb); |
||||
espconn_regist_reconcb(pespconn, at_upDate_recon_cb); |
||||
espconn_connect(pespconn); |
||||
} |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
at_exeCmdCiupdate(uint8_t id) |
||||
{ |
||||
pespconn = (struct espconn *)os_zalloc(sizeof(struct espconn)); |
||||
pespconn->type = ESPCONN_TCP; |
||||
pespconn->state = ESPCONN_NONE; |
||||
pespconn->proto.tcp = (esp_tcp *)os_zalloc(sizeof(esp_tcp)); |
||||
pespconn->proto.tcp->local_port = espconn_port(); |
||||
pespconn->proto.tcp->remote_port = 80; |
||||
|
||||
host_ip.addr = ipaddr_addr("192.168.10.9"); |
||||
at_port_print("+CIPUPDATE:1\r\n"); |
||||
os_memcpy(pespconn->proto.tcp->remote_ip, &host_ip.addr, 4); |
||||
espconn_regist_connectcb(pespconn, at_upDate_connect_cb); |
||||
espconn_regist_reconcb(pespconn, at_upDate_recon_cb); |
||||
espconn_connect(pespconn); |
||||
} |
||||
#endif |
||||
#endif |
@ -1,119 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_main.c |
||||
* |
||||
* Description: entry file of user application |
||||
* |
||||
* Modification history: |
||||
* 2015/1/23, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
|
||||
#include "osapi.h" |
||||
#include "at_custom.h" |
||||
#include "user_interface.h" |
||||
|
||||
// test :AT+TEST=1,"abc"<,3>
|
||||
void ICACHE_FLASH_ATTR |
||||
at_setupCmdTest(uint8_t id, char *pPara) |
||||
{ |
||||
int result = 0, err = 0, flag = 0; |
||||
uint8 buffer[32] = {0}; |
||||
pPara++; // skip '='
|
||||
|
||||
//get the first parameter
|
||||
// digit
|
||||
flag = at_get_next_int_dec(&pPara, &result, &err); |
||||
|
||||
// flag must be ture because there are more parameter
|
||||
if (flag == FALSE) { |
||||
at_response_error(); |
||||
return; |
||||
} |
||||
|
||||
if (*pPara++ != ',') { // skip ','
|
||||
at_response_error(); |
||||
return; |
||||
} |
||||
|
||||
os_sprintf(buffer, "the first parameter:%d\r\n", result); |
||||
at_port_print(buffer); |
||||
|
||||
//get the second parameter
|
||||
// string
|
||||
at_data_str_copy(buffer, &pPara, 10); |
||||
at_port_print("the second parameter:"); |
||||
at_port_print(buffer); |
||||
at_port_print("\r\n"); |
||||
|
||||
if (*pPara == ',') { |
||||
pPara++; // skip ','
|
||||
result = 0; |
||||
//there is the third parameter
|
||||
// digit
|
||||
flag = at_get_next_int_dec(&pPara, &result, &err); |
||||
// we donot care of flag
|
||||
os_sprintf(buffer, "the third parameter:%d\r\n", result); |
||||
at_port_print(buffer); |
||||
} |
||||
|
||||
if (*pPara != '\r') { |
||||
at_response_error(); |
||||
return; |
||||
} |
||||
|
||||
at_response_ok(); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
at_testCmdTest(uint8_t id) |
||||
{ |
||||
uint8 buffer[32] = {0}; |
||||
|
||||
os_sprintf(buffer, "%s\r\n", "at_testCmdTest"); |
||||
at_port_print(buffer); |
||||
at_response_ok(); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
at_queryCmdTest(uint8_t id) |
||||
{ |
||||
uint8 buffer[32] = {0}; |
||||
|
||||
os_sprintf(buffer, "%s\r\n", "at_queryCmdTest"); |
||||
at_port_print(buffer); |
||||
at_response_ok(); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
at_exeCmdTest(uint8_t id) |
||||
{ |
||||
uint8 buffer[32] = {0}; |
||||
|
||||
os_sprintf(buffer, "%s\r\n", "at_exeCmdTest"); |
||||
at_port_print(buffer); |
||||
at_response_ok(); |
||||
} |
||||
|
||||
extern void at_exeCmdCiupdate(uint8_t id); |
||||
at_funcationType at_custom_cmd[] = { |
||||
{"+TEST", 5, at_testCmdTest, at_queryCmdTest, at_setupCmdTest, at_exeCmdTest}, |
||||
#ifdef AT_UPGRADE_SUPPORT |
||||
{"+CIUPDATE", 9, NULL, NULL, NULL, at_exeCmdCiupdate} |
||||
#endif |
||||
}; |
||||
|
||||
void user_rf_pre_init(void) |
||||
{ |
||||
} |
||||
|
||||
void user_init(void) |
||||
{ |
||||
char buf[64] = {0}; |
||||
at_customLinkMax = 5; |
||||
at_init(); |
||||
os_sprintf(buf,"compile time:%s %s",__DATE__,__TIME__); |
||||
at_set_custom_info(buf); |
||||
at_port_print("\r\nready\r\n"); |
||||
at_cmd_array_regist(&at_custom_cmd[0], sizeof(at_custom_cmd)/sizeof(at_custom_cmd[0])); |
||||
} |
@ -1,42 +0,0 @@ |
||||
Notice: AT added some functions so it's larger than before, if you want to compile it, please compile it as 1024KB or larger flash in compilation STEP 5. |
||||
|
||||
1¡¢compile options |
||||
|
||||
(1) COMPILE |
||||
Possible value: gcc |
||||
Default value: |
||||
If not set, use xt-xcc by default. |
||||
|
||||
(2) BOOT |
||||
Possible value: none/old/new |
||||
none: no need boot |
||||
old: use boot_v1.1 |
||||
new: use boot_v1.2+ |
||||
Default value: none |
||||
|
||||
(3) APP |
||||
Possible value: 0/1/2 |
||||
0: original mode, generate eagle.app.v6.flash.bin and eagle.app.v6.irom0text.bin |
||||
1: generate user1 |
||||
2: generate user2 |
||||
Default value: 0 |
||||
|
||||
(3) SPI_SPEED |
||||
Possible value: 20/26.7/40/80 |
||||
Default value: 40 |
||||
|
||||
(4) SPI_MODE |
||||
Possible value: QIO/QOUT/DIO/DOUT |
||||
Default value: QIO |
||||
|
||||
(4) SPI_SIZE |
||||
Possible value: 0/2/3/4/5/6 |
||||
Default value: 0 |
||||
|
||||
For example: |
||||
make COMPILE=gcc BOOT=new APP=1 SPI_SPEED=40 SPI_MODE=QIO SPI_SIZE_MAP=0 |
||||
|
||||
2¡¢You can also use gen_misc to make and generate specific bin you needed. |
||||
Linux: ./gen_misc.sh |
||||
Windows: gen_misc.bat |
||||
Follow the tips and steps. |
@ -1,149 +0,0 @@ |
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of object file images to be generated ()
|
||||
# GEN_BINS - list of binaries to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
TARGET = eagle
|
||||
#FLAVOR = release
|
||||
FLAVOR = debug
|
||||
|
||||
#EXTRA_CCFLAGS += -u
|
||||
|
||||
ifndef PDIR # {
|
||||
GEN_IMAGES= eagle.app.v6.out
|
||||
GEN_BINS= eagle.app.v6.bin
|
||||
SPECIAL_MKTARGETS=$(APP_MKTARGETS)
|
||||
SUBDIRS= \
|
||||
user
|
||||
ifdef AT_OPEN_SRC |
||||
SUBDIRS += \
|
||||
at
|
||||
endif |
||||
endif # } PDIR
|
||||
|
||||
APPDIR = .
|
||||
LDDIR = ../ld
|
||||
|
||||
CCFLAGS += -Os
|
||||
|
||||
TARGET_LDFLAGS = \
|
||||
-nostdlib \
|
||||
-Wl,-EL \
|
||||
--longcalls \
|
||||
--text-section-literals
|
||||
|
||||
ifeq ($(FLAVOR),debug) |
||||
TARGET_LDFLAGS += -g -O2
|
||||
endif |
||||
|
||||
ifeq ($(FLAVOR),release) |
||||
TARGET_LDFLAGS += -g -O0
|
||||
endif |
||||
|
||||
COMPONENTS_eagle.app.v6 = \
|
||||
user/libuser.a
|
||||
|
||||
ifdef AT_OPEN_SRC |
||||
COMPONENTS_eagle.app.v6 += \
|
||||
at/libat.a
|
||||
endif |
||||
|
||||
LINKFLAGS_eagle.app.v6 = \
|
||||
-L../lib \
|
||||
-nostdlib \
|
||||
-T$(LD_FILE) \
|
||||
-Wl,--no-check-sections \
|
||||
-u call_user_start \
|
||||
-Wl,-static \
|
||||
-Wl,--start-group \
|
||||
-lc \
|
||||
-lgcc \
|
||||
-lhal \
|
||||
-lphy \
|
||||
-lpp \
|
||||
-lnet80211 \
|
||||
-llwip \
|
||||
-lwpa \
|
||||
-lcrypto \
|
||||
-lmain \
|
||||
-ljson \
|
||||
-lupgrade \
|
||||
-lssl \
|
||||
-lwps \
|
||||
-lsmartconfig \
|
||||
-lairkiss \
|
||||
$(DEP_LIBS_eagle.app.v6)
|
||||
|
||||
ifndef AT_OPEN_SRC |
||||
LINKFLAGS_eagle.app.v6 += \
|
||||
-lat
|
||||
endif |
||||
|
||||
LINKFLAGS_eagle.app.v6 += \
|
||||
-Wl,--end-group
|
||||
DEPENDS_eagle.app.v6 = \
|
||||
$(LD_FILE) \
|
||||
$(LDDIR)/eagle.rom.addr.v6.ld
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
|
||||
#UNIVERSAL_TARGET_DEFINES = \
|
||||
|
||||
# Other potential configuration flags include:
|
||||
# -DTXRX_TXBUF_DEBUG
|
||||
# -DTXRX_RXBUF_DEBUG
|
||||
# -DWLAN_CONFIG_CCX
|
||||
CONFIGURATION_DEFINES = -DICACHE_FLASH
|
||||
ifdef AT_OPEN_SRC |
||||
CONFIGURATION_DEFINES += \
|
||||
-DAT_OPEN_SRC
|
||||
endif |
||||
|
||||
ifeq ($(APP),0) |
||||
else |
||||
CONFIGURATION_DEFINES += \
|
||||
-DAT_UPGRADE_SUPPORT
|
||||
endif |
||||
|
||||
DEFINES += \
|
||||
$(UNIVERSAL_TARGET_DEFINES) \
|
||||
$(CONFIGURATION_DEFINES)
|
||||
|
||||
DDEFINES += \
|
||||
$(UNIVERSAL_TARGET_DEFINES) \
|
||||
$(CONFIGURATION_DEFINES)
|
||||
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
||||
.PHONY: FORCE |
||||
FORCE: |
||||
|
@ -1,147 +0,0 @@ |
||||
@echo off |
||||
|
||||
echo gen_misc.bat version 20150511 |
||||
echo . |
||||
|
||||
echo Please follow below steps(1-5) to generate specific bin(s): |
||||
echo STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none) |
||||
set input=default |
||||
set /p input=enter(0/1/2, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set boot=old |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set boot=new |
||||
) else ( |
||||
set boot=none |
||||
) |
||||
) |
||||
|
||||
echo boot mode: %boot% |
||||
echo. |
||||
|
||||
echo STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin) |
||||
set input=default |
||||
set /p input=enter (0/1/2, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=1 |
||||
echo generate bin: user1.bin |
||||
) |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=2 |
||||
echo generate bin: user2.bin |
||||
) |
||||
) else ( |
||||
if %boot% neq none ( |
||||
set boot=none |
||||
echo ignore boot |
||||
) |
||||
set app=0 |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
)) |
||||
|
||||
echo. |
||||
|
||||
echo STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set spi_speed=20 |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set spi_speed=26.7 |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_speed=80 |
||||
) else ( |
||||
set spi_speed=40 |
||||
))) |
||||
|
||||
echo spi speed: %spi_speed% MHz |
||||
echo. |
||||
|
||||
echo STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
set spi_mode=QOUT |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
set spi_mode=DIO |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_mode=DOUT |
||||
) else ( |
||||
set spi_mode=QIO |
||||
))) |
||||
|
||||
echo spi mode: %spi_mode% |
||||
echo. |
||||
|
||||
echo STEP 5: choose flash size and map |
||||
echo 0= 512KB( 256KB+ 256KB) |
||||
echo 2=1024KB( 512KB+ 512KB) |
||||
echo 3=2048KB( 512KB+ 512KB) |
||||
echo 4=4096KB( 512KB+ 512KB) |
||||
echo 5=2048KB(1024KB+1024KB) |
||||
echo 6=4096KB(1024KB+1024KB) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3/4/5/6, default 0): |
||||
|
||||
if %input% equ 2 ( |
||||
set spi_size_map=2 |
||||
echo spi size: 1024KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_size_map=3 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 4 ( |
||||
set spi_size_map=4 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 5 ( |
||||
set spi_size_map=5 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
if %input% equ 6 ( |
||||
set spi_size_map=6 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
set spi_size_map=0 |
||||
echo spi size: 512KB |
||||
echo spi ota map: 256KB + 256KB |
||||
) |
||||
) |
||||
) |
||||
) |
||||
) |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo. |
||||
echo start... |
||||
echo. |
||||
|
||||
make BOOT=%boot% APP=%app% SPI_SPEED=%spi_speed% SPI_MODE=%spi_mode% SPI_SIZE=%spi_size_map% |
||||
|
@ -1,150 +0,0 @@ |
||||
#!/bin/bash |
||||
|
||||
echo "gen_misc.sh version 20150511" |
||||
echo "" |
||||
|
||||
echo "Please follow below steps(1-5) to generate specific bin(s):" |
||||
echo "STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none)" |
||||
echo "enter(0/1/2, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
boot=none |
||||
elif [ $input == 0 ]; then |
||||
boot=old |
||||
elif [ $input == 1 ]; then |
||||
boot=new |
||||
else |
||||
boot=none |
||||
fi |
||||
|
||||
echo "boot mode: $boot" |
||||
echo "" |
||||
|
||||
echo "STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin)" |
||||
echo "enter (0/1/2, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
elif [ $input == 1 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=1 |
||||
echo "generate bin: user1.bin" |
||||
fi |
||||
elif [ $input == 2 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=2 |
||||
echo "generate bin: user2.bin" |
||||
fi |
||||
else |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
echo "STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz)" |
||||
echo "enter (0/1/2/3, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_speed=40 |
||||
elif [ $input == 0 ]; then |
||||
spi_speed=20 |
||||
elif [ $input == 1 ]; then |
||||
spi_speed=26.7 |
||||
elif [ $input == 3 ]; then |
||||
spi_speed=80 |
||||
else |
||||
spi_speed=40 |
||||
fi |
||||
|
||||
echo "spi speed: $spi_speed MHz" |
||||
echo "" |
||||
|
||||
echo "STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT)" |
||||
echo "enter (0/1/2/3, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_mode=QIO |
||||
elif [ $input == 1 ]; then |
||||
spi_mode=QOUT |
||||
elif [ $input == 2 ]; then |
||||
spi_mode=DIO |
||||
elif [ $input == 3 ]; then |
||||
spi_mode=DOUT |
||||
else |
||||
spi_mode=QIO |
||||
fi |
||||
|
||||
echo "spi mode: $spi_mode" |
||||
echo "" |
||||
|
||||
echo "STEP 5: choose spi size and map" |
||||
echo " 0= 512KB( 256KB+ 256KB)" |
||||
echo " 2=1024KB( 512KB+ 512KB)" |
||||
echo " 3=2048KB( 512KB+ 512KB)" |
||||
echo " 4=4096KB( 512KB+ 512KB)" |
||||
echo " 5=2048KB(1024KB+1024KB)" |
||||
echo " 6=4096KB(1024KB+1024KB)" |
||||
echo "enter (0/2/3/4/5/6, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
elif [ $input == 2 ]; then |
||||
spi_size_map=2 |
||||
echo "spi size: 1024KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 3 ]; then |
||||
spi_size_map=3 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 4 ]; then |
||||
spi_size_map=4 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 5 ]; then |
||||
spi_size_map=5 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
elif [ $input == 6 ]; then |
||||
spi_size_map=6 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
else |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo "" |
||||
echo "start..." |
||||
echo "" |
||||
|
||||
make COMPILE=gcc BOOT=$boot APP=$app SPI_SPEED=$spi_speed SPI_MODE=$spi_mode SPI_SIZE_MAP=$spi_size_map |
@ -1,12 +0,0 @@ |
||||
#ifndef __USER_CONFIG_H__ |
||||
#define __USER_CONFIG_H__ |
||||
|
||||
#define AT_CUSTOM_UPGRADE |
||||
|
||||
#ifdef AT_CUSTOM_UPGRADE |
||||
#ifndef AT_UPGRADE_SUPPORT |
||||
#error "upgrade is not supported when eagle.flash.bin+eagle.irom0text.bin!!!" |
||||
#endif |
||||
#endif |
||||
|
||||
#endif |
@ -1,45 +0,0 @@ |
||||
|
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of images to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
ifndef PDIR |
||||
GEN_LIBS = libuser.a
|
||||
endif |
||||
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
#DEFINES +=
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
INCLUDES += -I ./
|
||||
INCLUDES += -I ../../include/ets
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
@ -1,290 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2015-2018 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_main.c |
||||
* |
||||
* Description: entry file of user application |
||||
* |
||||
* Modification history: |
||||
* 2015/3/06, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "c_types.h" |
||||
#include "user_interface.h" |
||||
#include "espconn.h" |
||||
#include "mem.h" |
||||
#include "osapi.h" |
||||
#include "upgrade.h" |
||||
|
||||
#ifdef AT_UPGRADE_SUPPORT |
||||
#ifdef AT_CUSTOM_UPGRADE |
||||
|
||||
#define UPGRADE_FRAME "{\"path\": \"/v1/messages/\", \"method\": \"POST\", \"meta\": {\"Authorization\": \"token %s\"},\ |
||||
\"get\":{\"action\":\"%s\"},\"body\":{\"pre_rom_version\":\"%s\",\"rom_version\":\"%s\"}}\n" |
||||
|
||||
#define pheadbuffer "Connection: keep-alive\r\n\ |
||||
Cache-Control: no-cache\r\n\
|
||||
User-Agent: Mozilla/5.0 (Windows NT 5.1) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/30.0.1599.101 Safari/537.36 \r\n\
|
||||
Accept: */*\r\n\
|
||||
Accept-Encoding: gzip,deflate\r\n\
|
||||
Accept-Language: zh-CN,eb-US;q=0.8\r\n\r\n" |
||||
|
||||
/**/ |
||||
|
||||
|
||||
struct espconn *pespconn = NULL; |
||||
struct upgrade_server_info *upServer = NULL; |
||||
|
||||
static os_timer_t at_delay_check; |
||||
static struct espconn *pTcpServer = NULL; |
||||
static ip_addr_t host_ip; |
||||
/******************************************************************************
|
||||
* FunctionName : user_esp_platform_upgrade_cb |
||||
* Description : Processing the downloaded data from the server |
||||
* Parameters : pespconn -- the espconn used to connetion with the host |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
at_upDate_rsp(void *arg) |
||||
{ |
||||
struct upgrade_server_info *server = arg; |
||||
|
||||
|
||||
if(server->upgrade_flag == true) |
||||
{ |
||||
os_printf("device_upgrade_success\r\n"); |
||||
at_response_ok(); |
||||
system_upgrade_reboot(); |
||||
} |
||||
else |
||||
{ |
||||
os_printf("device_upgrade_failed\r\n"); |
||||
at_response_error(); |
||||
} |
||||
|
||||
os_free(server->url); |
||||
server->url = NULL; |
||||
os_free(server); |
||||
server = NULL; |
||||
} |
||||
/**
|
||||
* @brief Tcp client disconnect success callback function. |
||||
* @param arg: contain the ip link information |
||||
* @retval None |
||||
*/ |
||||
static void ICACHE_FLASH_ATTR |
||||
at_upDate_discon_cb(void *arg) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *)arg; |
||||
uint8_t idTemp = 0; |
||||
|
||||
if(pespconn->proto.tcp != NULL) |
||||
{ |
||||
os_free(pespconn->proto.tcp); |
||||
} |
||||
if(pespconn != NULL) |
||||
{ |
||||
os_free(pespconn); |
||||
} |
||||
|
||||
os_printf("disconnect\r\n"); |
||||
|
||||
if(system_upgrade_start(upServer) == false) |
||||
{ |
||||
at_response_error(); |
||||
} |
||||
else |
||||
{ |
||||
at_port_print("+CIPUPDATE:4\r\n"); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Udp server receive data callback function. |
||||
* @param arg: contain the ip link information |
||||
* @retval None |
||||
*/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
at_upDate_recv(void *arg, char *pusrdata, unsigned short len) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *)arg; |
||||
char temp[32] = {0}; |
||||
uint8_t user_bin[12] = {0}; |
||||
uint8_t i = 0; |
||||
|
||||
os_timer_disarm(&at_delay_check); |
||||
at_port_print("+CIPUPDATE:3\r\n"); |
||||
|
||||
upServer = (struct upgrade_server_info *)os_zalloc(sizeof(struct upgrade_server_info)); |
||||
|
||||
upServer->upgrade_version[5] = '\0'; |
||||
|
||||
upServer->pespconn = pespconn; |
||||
|
||||
os_memcpy(upServer->ip, pespconn->proto.tcp->remote_ip, 4); |
||||
|
||||
upServer->port = pespconn->proto.tcp->remote_port; |
||||
|
||||
upServer->check_cb = at_upDate_rsp; |
||||
upServer->check_times = 60000; |
||||
|
||||
if(upServer->url == NULL) |
||||
{ |
||||
upServer->url = (uint8 *) os_zalloc(1024); |
||||
} |
||||
|
||||
if(system_upgrade_userbin_check() == UPGRADE_FW_BIN1) |
||||
{ |
||||
os_memcpy(user_bin, "user2.bin", 10); |
||||
} |
||||
else if(system_upgrade_userbin_check() == UPGRADE_FW_BIN2) |
||||
{ |
||||
os_memcpy(user_bin, "user1.bin", 10); |
||||
} |
||||
|
||||
os_sprintf(upServer->url, |
||||
"GET /%s HTTP/1.1\r\nHost: "IPSTR"\r\n"pheadbuffer"", |
||||
user_bin, IP2STR(upServer->ip)); |
||||
} |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
at_upDate_wait(void *arg) |
||||
{ |
||||
struct espconn *pespconn = arg; |
||||
os_timer_disarm(&at_delay_check); |
||||
if(pespconn != NULL) |
||||
{ |
||||
espconn_disconnect(pespconn); |
||||
} |
||||
else |
||||
{ |
||||
at_response_error(); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : user_esp_platform_sent_cb |
||||
* Description : Data has been sent successfully and acknowledged by the remote host. |
||||
* Parameters : arg -- Additional argument to pass to the callback function |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
at_upDate_sent_cb(void *arg) |
||||
{ |
||||
struct espconn *pespconn = arg; |
||||
os_timer_disarm(&at_delay_check); |
||||
os_timer_setfn(&at_delay_check, (os_timer_func_t *)at_upDate_wait, pespconn); |
||||
os_timer_arm(&at_delay_check, 5000, 0); |
||||
os_printf("at_upDate_sent_cb\r\n"); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Tcp client connect success callback function. |
||||
* @param arg: contain the ip link information |
||||
* @retval None |
||||
*/ |
||||
static void ICACHE_FLASH_ATTR |
||||
at_upDate_connect_cb(void *arg) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *)arg; |
||||
uint8_t user_bin[9] = {0}; |
||||
char *temp = NULL; |
||||
|
||||
at_port_print("+CIPUPDATE:2\r\n"); |
||||
|
||||
|
||||
espconn_regist_disconcb(pespconn, at_upDate_discon_cb); |
||||
espconn_regist_recvcb(pespconn, at_upDate_recv);////////
|
||||
espconn_regist_sentcb(pespconn, at_upDate_sent_cb); |
||||
|
||||
temp = (uint8 *) os_zalloc(512); |
||||
|
||||
os_sprintf(temp,"GET /v1/device/rom/?is_format_simple=true HTTP/1.0\r\nHost: "IPSTR"\r\n"pheadbuffer"", |
||||
IP2STR(pespconn->proto.tcp->remote_ip)); |
||||
|
||||
espconn_sent(pespconn, temp, os_strlen(temp)); |
||||
os_free(temp); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Tcp client connect repeat callback function. |
||||
* @param arg: contain the ip link information |
||||
* @retval None |
||||
*/ |
||||
static void ICACHE_FLASH_ATTR |
||||
at_upDate_recon_cb(void *arg, sint8 errType) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *)arg; |
||||
|
||||
at_response_error(); |
||||
if(pespconn->proto.tcp != NULL) |
||||
{ |
||||
os_free(pespconn->proto.tcp); |
||||
} |
||||
os_free(pespconn); |
||||
os_printf("disconnect\r\n"); |
||||
|
||||
if(upServer != NULL) |
||||
{ |
||||
os_free(upServer); |
||||
upServer = NULL; |
||||
} |
||||
at_response_error(); |
||||
|
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : upServer_dns_found |
||||
* Description : dns found callback |
||||
* Parameters : name -- pointer to the name that was looked up. |
||||
* ipaddr -- pointer to an ip_addr_t containing the IP address of |
||||
* the hostname, or NULL if the name could not be found (or on any |
||||
* other error). |
||||
* callback_arg -- a user-specified callback argument passed to |
||||
* dns_gethostbyname |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
upServer_dns_found(const char *name, ip_addr_t *ipaddr, void *arg) |
||||
{ |
||||
struct espconn *pespconn = (struct espconn *) arg; |
||||
// char temp[32];
|
||||
|
||||
if(ipaddr == NULL) |
||||
{ |
||||
at_response_error(); |
||||
return; |
||||
} |
||||
at_port_print("+CIPUPDATE:1\r\n"); |
||||
|
||||
|
||||
if(host_ip.addr == 0 && ipaddr->addr != 0) |
||||
{ |
||||
if(pespconn->type == ESPCONN_TCP) |
||||
{ |
||||
os_memcpy(pespconn->proto.tcp->remote_ip, &ipaddr->addr, 4); |
||||
espconn_regist_connectcb(pespconn, at_upDate_connect_cb); |
||||
espconn_regist_reconcb(pespconn, at_upDate_recon_cb); |
||||
espconn_connect(pespconn); |
||||
} |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
at_exeCmdCiupdate(uint8_t id) |
||||
{ |
||||
pespconn = (struct espconn *)os_zalloc(sizeof(struct espconn)); |
||||
pespconn->type = ESPCONN_TCP; |
||||
pespconn->state = ESPCONN_NONE; |
||||
pespconn->proto.tcp = (esp_tcp *)os_zalloc(sizeof(esp_tcp)); |
||||
pespconn->proto.tcp->local_port = espconn_port(); |
||||
pespconn->proto.tcp->remote_port = 80; |
||||
|
||||
host_ip.addr = ipaddr_addr("192.168.10.9"); |
||||
at_port_print("+CIPUPDATE:1\r\n"); |
||||
os_memcpy(pespconn->proto.tcp->remote_ip, &host_ip.addr, 4); |
||||
espconn_regist_connectcb(pespconn, at_upDate_connect_cb); |
||||
espconn_regist_reconcb(pespconn, at_upDate_recon_cb); |
||||
espconn_connect(pespconn); |
||||
} |
||||
#endif |
||||
#endif |
@ -1,145 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_main.c |
||||
* |
||||
* Description: entry file of user application |
||||
* |
||||
* Modification history: |
||||
* 2015/1/23, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
|
||||
#include "osapi.h" |
||||
#include "at_custom.h" |
||||
#include "user_interface.h" |
||||
#include "mem.h" |
||||
#include "espconn.h" |
||||
|
||||
|
||||
static struct espconn *at_espconn_demo_espconn_ptr = NULL; |
||||
|
||||
#define AT_ESPCONN_DEMO_BUFFER_SIZE (2920) |
||||
static uint8 at_espconn_demo_buffer[AT_ESPCONN_DEMO_BUFFER_SIZE]; |
||||
static uint32 at_espconn_demo_data_len = 0; |
||||
static bool at_espconn_demo_flag = FALSE; |
||||
|
||||
static void ICACHE_FLASH_ATTR |
||||
at_espconn_demo_recon_cb(void *arg, sint8 errType) |
||||
{ |
||||
struct espconn *espconn_ptr = (struct espconn *)arg; |
||||
|
||||
os_printf("at demo espconn reconnect\r\n"); |
||||
at_espconn_demo_flag = FALSE; |
||||
espconn_connect(espconn_ptr); |
||||
} |
||||
|
||||
|
||||
// notify at module that espconn has received data
|
||||
static void ICACHE_FLASH_ATTR |
||||
at_espconn_demo_recv(void *arg, char *pusrdata, unsigned short len) |
||||
{ |
||||
at_fake_uart_rx(pusrdata,len); |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR |
||||
at_espconn_demo_send_cb(void *arg) |
||||
{ |
||||
at_espconn_demo_flag = TRUE; |
||||
if(at_espconn_demo_data_len) { |
||||
espconn_send(at_espconn_demo_espconn_ptr,at_espconn_demo_buffer,at_espconn_demo_data_len); |
||||
at_espconn_demo_data_len = 0; |
||||
} |
||||
} |
||||
static void ICACHE_FLASH_ATTR |
||||
at_espconn_demo_discon_cb(void *arg) |
||||
{ |
||||
struct espconn *espconn_ptr = (struct espconn *)arg; |
||||
|
||||
os_printf("at demo espconn disconnected\r\n"); |
||||
at_espconn_demo_flag = FALSE; |
||||
espconn_connect(espconn_ptr); |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR |
||||
at_espconn_demo_connect_cb(void *arg) |
||||
{ |
||||
os_printf("at demo espconn connected\r\n"); |
||||
espconn_set_opt((struct espconn*)arg,ESPCONN_COPY); |
||||
at_espconn_demo_flag = TRUE; |
||||
at_espconn_demo_data_len = 0; |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR at_espconn_demo_response(const uint8*data,uint32 length) |
||||
{ |
||||
if((data == NULL) || (length == 0)) { |
||||
return; |
||||
} |
||||
|
||||
if(at_espconn_demo_flag) { |
||||
espconn_send(at_espconn_demo_espconn_ptr,(uint8*)data,length); |
||||
at_espconn_demo_flag = FALSE; |
||||
} else { |
||||
if(length <= (AT_ESPCONN_DEMO_BUFFER_SIZE - at_espconn_demo_data_len)) { |
||||
os_memcpy(at_espconn_demo_buffer + at_espconn_demo_data_len,data,length); |
||||
at_espconn_demo_data_len += length; |
||||
} else { |
||||
os_printf("at espconn buffer full\r\n"); |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
static void ICACHE_FLASH_ATTR at_espconn_demo_init(void) |
||||
{ |
||||
uint32 ip = 0; |
||||
at_espconn_demo_espconn_ptr = (struct espconn *)os_zalloc(sizeof(struct espconn)); |
||||
at_espconn_demo_espconn_ptr->type = ESPCONN_TCP; |
||||
at_espconn_demo_espconn_ptr->state = ESPCONN_NONE; |
||||
at_espconn_demo_espconn_ptr->proto.tcp = (esp_tcp *)os_zalloc(sizeof(esp_tcp)); |
||||
at_espconn_demo_espconn_ptr->proto.tcp->local_port = espconn_port(); |
||||
at_espconn_demo_espconn_ptr->proto.tcp->remote_port = 8999; |
||||
|
||||
ip = ipaddr_addr("192.168.1.120"); |
||||
os_memcpy(at_espconn_demo_espconn_ptr->proto.tcp->remote_ip,&ip,sizeof(ip)); |
||||
espconn_regist_connectcb(at_espconn_demo_espconn_ptr, at_espconn_demo_connect_cb); |
||||
espconn_regist_reconcb(at_espconn_demo_espconn_ptr, at_espconn_demo_recon_cb); |
||||
espconn_regist_disconcb(at_espconn_demo_espconn_ptr, at_espconn_demo_discon_cb); |
||||
espconn_regist_recvcb(at_espconn_demo_espconn_ptr, at_espconn_demo_recv); |
||||
espconn_regist_sentcb(at_espconn_demo_espconn_ptr, at_espconn_demo_send_cb); |
||||
|
||||
espconn_connect(at_espconn_demo_espconn_ptr); |
||||
|
||||
at_fake_uart_enable(TRUE,at_espconn_demo_response); |
||||
} |
||||
|
||||
static void ICACHE_FLASH_ATTR |
||||
at_exeCmdTest(uint8_t id) |
||||
{ |
||||
at_response_ok(); |
||||
at_espconn_demo_init(); |
||||
} |
||||
|
||||
extern void at_exeCmdCiupdate(uint8_t id); |
||||
at_funcationType at_custom_cmd[] = { |
||||
{"+TEST", 5, NULL, NULL, NULL, at_exeCmdTest}, |
||||
#ifdef AT_UPGRADE_SUPPORT |
||||
{"+CIUPDATE", 9, NULL, NULL, NULL, at_exeCmdCiupdate} |
||||
#endif |
||||
}; |
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR user_init(void) |
||||
{ |
||||
char buf[64] = {0}; |
||||
at_customLinkMax = 5; |
||||
at_init(); |
||||
os_sprintf(buf,"compile time:%s %s",__DATE__,__TIME__); |
||||
at_set_custom_info(buf); |
||||
at_port_print("\r\nready\r\n"); |
||||
at_cmd_array_regist(&at_custom_cmd[0], sizeof(at_custom_cmd)/sizeof(at_custom_cmd[0])); |
||||
at_port_print("\r\n***==================================***"); |
||||
at_port_print("\r\n*** Welcome to at espconn demo!!! ***"); |
||||
at_port_print("\r\n*** Please create a TCP Server on PC,***"); |
||||
at_port_print("\r\n*** then enter command AT+TEST. ***"); |
||||
at_port_print("\r\n***==================================***\r\n"); |
||||
} |
@ -1,44 +0,0 @@ |
||||
|
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of images to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
ifndef PDIR |
||||
GEN_LIBS = libdriver.a
|
||||
endif |
||||
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
#DEFINES +=
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
INCLUDES += -I ./
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
@ -1,42 +0,0 @@ |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "driver/gpio16.h" |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
gpio16_output_conf(void) |
||||
{ |
||||
WRITE_PERI_REG(PAD_XPD_DCDC_CONF, |
||||
(READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32)0x1); // mux configuration for XPD_DCDC to output rtc_gpio0
|
||||
|
||||
WRITE_PERI_REG(RTC_GPIO_CONF, |
||||
(READ_PERI_REG(RTC_GPIO_CONF) & (uint32)0xfffffffe) | (uint32)0x0); //mux configuration for out enable
|
||||
|
||||
WRITE_PERI_REG(RTC_GPIO_ENABLE, |
||||
(READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32)0xfffffffe) | (uint32)0x1); //out enable
|
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
gpio16_output_set(uint8 value) |
||||
{ |
||||
WRITE_PERI_REG(RTC_GPIO_OUT, |
||||
(READ_PERI_REG(RTC_GPIO_OUT) & (uint32)0xfffffffe) | (uint32)(value & 1)); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
gpio16_input_conf(void) |
||||
{ |
||||
WRITE_PERI_REG(PAD_XPD_DCDC_CONF, |
||||
(READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32)0x1); // mux configuration for XPD_DCDC and rtc_gpio0 connection
|
||||
|
||||
WRITE_PERI_REG(RTC_GPIO_CONF, |
||||
(READ_PERI_REG(RTC_GPIO_CONF) & (uint32)0xfffffffe) | (uint32)0x0); //mux configuration for out enable
|
||||
|
||||
WRITE_PERI_REG(RTC_GPIO_ENABLE, |
||||
READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32)0xfffffffe); //out disable
|
||||
} |
||||
|
||||
uint8 ICACHE_FLASH_ATTR |
||||
gpio16_input_get(void) |
||||
{ |
||||
return (uint8)(READ_PERI_REG(RTC_GPIO_IN_DATA) & 1); |
||||
} |
@ -1,141 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: hw_timer.c |
||||
* |
||||
* Description: hw_timer driver |
||||
* |
||||
* Modification history: |
||||
* 2014/5/1, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "os_type.h" |
||||
#include "osapi.h" |
||||
|
||||
#define US_TO_RTC_TIMER_TICKS(t) \ |
||||
((t) ? \
|
||||
(((t) > 0x35A) ? \
|
||||
(((t)>>2) * ((APB_CLK_FREQ>>4)/250000) + ((t)&0x3) * ((APB_CLK_FREQ>>4)/1000000)) : \
|
||||
(((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \
|
||||
0) |
||||
|
||||
#define FRC1_ENABLE_TIMER BIT7 |
||||
#define FRC1_AUTO_LOAD BIT6 |
||||
|
||||
//TIMER PREDIVED MODE
|
||||
typedef enum { |
||||
DIVDED_BY_1 = 0, //timer clock
|
||||
DIVDED_BY_16 = 4, //divided by 16
|
||||
DIVDED_BY_256 = 8, //divided by 256
|
||||
} TIMER_PREDIVED_MODE; |
||||
|
||||
typedef enum { //timer interrupt mode
|
||||
TM_LEVEL_INT = 1, // level interrupt
|
||||
TM_EDGE_INT = 0, //edge interrupt
|
||||
} TIMER_INT_MODE; |
||||
|
||||
typedef enum { |
||||
FRC1_SOURCE = 0, |
||||
NMI_SOURCE = 1, |
||||
} FRC1_TIMER_SOURCE_TYPE; |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : hw_timer_arm |
||||
* Description : set a trigger timer delay for this timer. |
||||
* Parameters : uint32 val : |
||||
in autoload mode |
||||
50 ~ 0x7fffff; for FRC1 source. |
||||
100 ~ 0x7fffff; for NMI source. |
||||
in non autoload mode: |
||||
10 ~ 0x7fffff; |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void hw_timer_arm(u32 val) |
||||
{ |
||||
RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(val)); |
||||
} |
||||
|
||||
static void (* user_hw_timer_cb)(void) = NULL; |
||||
/******************************************************************************
|
||||
* FunctionName : hw_timer_set_func |
||||
* Description : set the func, when trigger timer is up. |
||||
* Parameters : void (* user_hw_timer_cb_set)(void): |
||||
timer callback function, |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void hw_timer_set_func(void (* user_hw_timer_cb_set)(void)) |
||||
{ |
||||
user_hw_timer_cb = user_hw_timer_cb_set; |
||||
} |
||||
|
||||
static void hw_timer_isr_cb(void) |
||||
{ |
||||
if (user_hw_timer_cb != NULL) { |
||||
(*(user_hw_timer_cb))(); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : hw_timer_init |
||||
* Description : initilize the hardware isr timer |
||||
* Parameters : |
||||
FRC1_TIMER_SOURCE_TYPE source_type: |
||||
FRC1_SOURCE, timer use frc1 isr as isr source. |
||||
NMI_SOURCE, timer use nmi isr as isr source. |
||||
u8 req: |
||||
0, not autoload, |
||||
1, autoload mode, |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR hw_timer_init(FRC1_TIMER_SOURCE_TYPE source_type, u8 req) |
||||
{ |
||||
if (req == 1) { |
||||
RTC_REG_WRITE(FRC1_CTRL_ADDRESS, |
||||
FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); |
||||
} else { |
||||
RTC_REG_WRITE(FRC1_CTRL_ADDRESS, |
||||
DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); |
||||
} |
||||
|
||||
if (source_type == NMI_SOURCE) { |
||||
ETS_FRC_TIMER1_NMI_INTR_ATTACH(hw_timer_isr_cb); |
||||
} else { |
||||
ETS_FRC_TIMER1_INTR_ATTACH(hw_timer_isr_cb, NULL); |
||||
} |
||||
|
||||
TM1_EDGE_INT_ENABLE(); |
||||
ETS_FRC1_INTR_ENABLE(); |
||||
} |
||||
|
||||
//-------------------------------Test Code Below--------------------------------------
|
||||
#if 0 |
||||
void hw_test_timer_cb(void) |
||||
{ |
||||
static uint16 j = 0; |
||||
j++; |
||||
|
||||
if ((WDEV_NOW() - tick_now2) >= 1000000) { |
||||
static u32 idx = 1; |
||||
tick_now2 = WDEV_NOW(); |
||||
os_printf("b%u:%d\n", idx++, j); |
||||
j = 0; |
||||
} |
||||
|
||||
//hw_timer_arm(50);
|
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR user_init(void) |
||||
{ |
||||
hw_timer_init(FRC1_SOURCE, 1); |
||||
hw_timer_set_func(hw_test_timer_cb); |
||||
hw_timer_arm(100); |
||||
} |
||||
#endif |
||||
/*
|
||||
NOTE: |
||||
1 if use nmi source, for autoload timer , the timer setting val can't be less than 100. |
||||
2 if use nmi source, this timer has highest priority, can interrupt other isr. |
||||
3 if use frc1 source, this timer can't interrupt other isr. |
||||
|
||||
*/ |
||||
|
@ -1,316 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: i2c_master.c |
||||
* |
||||
* Description: i2c master API |
||||
* |
||||
* Modification history: |
||||
* 2014/3/12, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "gpio.h" |
||||
|
||||
#include "driver/i2c_master.h" |
||||
|
||||
LOCAL uint8 m_nLastSDA; |
||||
LOCAL uint8 m_nLastSCL; |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_setDC |
||||
* Description : Internal used function - |
||||
* set i2c SDA and SCL bit value for half clk cycle |
||||
* Parameters : uint8 SDA |
||||
* uint8 SCL |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
i2c_master_setDC(uint8 SDA, uint8 SCL) |
||||
{ |
||||
SDA &= 0x01; |
||||
SCL &= 0x01; |
||||
m_nLastSDA = SDA; |
||||
m_nLastSCL = SCL; |
||||
|
||||
if ((0 == SDA) && (0 == SCL)) { |
||||
I2C_MASTER_SDA_LOW_SCL_LOW(); |
||||
} else if ((0 == SDA) && (1 == SCL)) { |
||||
I2C_MASTER_SDA_LOW_SCL_HIGH(); |
||||
} else if ((1 == SDA) && (0 == SCL)) { |
||||
I2C_MASTER_SDA_HIGH_SCL_LOW(); |
||||
} else { |
||||
I2C_MASTER_SDA_HIGH_SCL_HIGH(); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_getDC |
||||
* Description : Internal used function - |
||||
* get i2c SDA bit value |
||||
* Parameters : NONE |
||||
* Returns : uint8 - SDA bit value |
||||
*******************************************************************************/ |
||||
LOCAL uint8 ICACHE_FLASH_ATTR |
||||
i2c_master_getDC(void) |
||||
{ |
||||
uint8 sda_out; |
||||
sda_out = GPIO_INPUT_GET(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO)); |
||||
return sda_out; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_init |
||||
* Description : initilize I2C bus to enable i2c operations |
||||
* Parameters : NONE |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
i2c_master_init(void) |
||||
{ |
||||
uint8 i; |
||||
|
||||
i2c_master_setDC(1, 0); |
||||
i2c_master_wait(5); |
||||
|
||||
// when SCL = 0, toggle SDA to clear up
|
||||
i2c_master_setDC(0, 0) ; |
||||
i2c_master_wait(5); |
||||
i2c_master_setDC(1, 0) ; |
||||
i2c_master_wait(5); |
||||
|
||||
// set data_cnt to max value
|
||||
for (i = 0; i < 28; i++) { |
||||
i2c_master_setDC(1, 0); |
||||
i2c_master_wait(5); // sda 1, scl 0
|
||||
i2c_master_setDC(1, 1); |
||||
i2c_master_wait(5); // sda 1, scl 1
|
||||
} |
||||
|
||||
// reset all
|
||||
i2c_master_stop(); |
||||
return; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_gpio_init |
||||
* Description : config SDA and SCL gpio to open-drain output mode, |
||||
* mux and gpio num defined in i2c_master.h |
||||
* Parameters : NONE |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
i2c_master_gpio_init(void) |
||||
{ |
||||
ETS_GPIO_INTR_DISABLE() ; |
||||
// ETS_INTR_LOCK();
|
||||
|
||||
PIN_FUNC_SELECT(I2C_MASTER_SDA_MUX, I2C_MASTER_SDA_FUNC); |
||||
PIN_FUNC_SELECT(I2C_MASTER_SCL_MUX, I2C_MASTER_SCL_FUNC); |
||||
|
||||
GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SDA_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain;
|
||||
GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SDA_GPIO)); |
||||
GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO)), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(I2C_MASTER_SCL_GPIO))) | GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE)); //open drain;
|
||||
GPIO_REG_WRITE(GPIO_ENABLE_ADDRESS, GPIO_REG_READ(GPIO_ENABLE_ADDRESS) | (1 << I2C_MASTER_SCL_GPIO)); |
||||
|
||||
I2C_MASTER_SDA_HIGH_SCL_HIGH(); |
||||
|
||||
ETS_GPIO_INTR_ENABLE() ; |
||||
// ETS_INTR_UNLOCK();
|
||||
|
||||
i2c_master_init(); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_start |
||||
* Description : set i2c to send state |
||||
* Parameters : NONE |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
i2c_master_start(void) |
||||
{ |
||||
i2c_master_setDC(1, m_nLastSCL); |
||||
i2c_master_wait(5); |
||||
i2c_master_setDC(1, 1); |
||||
i2c_master_wait(5); // sda 1, scl 1
|
||||
i2c_master_setDC(0, 1); |
||||
i2c_master_wait(5); // sda 0, scl 1
|
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_stop |
||||
* Description : set i2c to stop sending state |
||||
* Parameters : NONE |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
i2c_master_stop(void) |
||||
{ |
||||
i2c_master_wait(5); |
||||
|
||||
i2c_master_setDC(0, m_nLastSCL); |
||||
i2c_master_wait(5); // sda 0
|
||||
i2c_master_setDC(0, 1); |
||||
i2c_master_wait(5); // sda 0, scl 1
|
||||
i2c_master_setDC(1, 1); |
||||
i2c_master_wait(5); // sda 1, scl 1
|
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_setAck |
||||
* Description : set ack to i2c bus as level value |
||||
* Parameters : uint8 level - 0 or 1 |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
i2c_master_setAck(uint8 level) |
||||
{ |
||||
i2c_master_setDC(m_nLastSDA, 0); |
||||
i2c_master_wait(5); |
||||
i2c_master_setDC(level, 0); |
||||
i2c_master_wait(5); // sda level, scl 0
|
||||
i2c_master_setDC(level, 1); |
||||
i2c_master_wait(8); // sda level, scl 1
|
||||
i2c_master_setDC(level, 0); |
||||
i2c_master_wait(5); // sda level, scl 0
|
||||
i2c_master_setDC(1, 0); |
||||
i2c_master_wait(5); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_getAck |
||||
* Description : confirm if peer send ack |
||||
* Parameters : NONE |
||||
* Returns : uint8 - ack value, 0 or 1 |
||||
*******************************************************************************/ |
||||
uint8 ICACHE_FLASH_ATTR |
||||
i2c_master_getAck(void) |
||||
{ |
||||
uint8 retVal; |
||||
i2c_master_setDC(m_nLastSDA, 0); |
||||
i2c_master_wait(5); |
||||
i2c_master_setDC(1, 0); |
||||
i2c_master_wait(5); |
||||
i2c_master_setDC(1, 1); |
||||
i2c_master_wait(5); |
||||
|
||||
retVal = i2c_master_getDC(); |
||||
i2c_master_wait(5); |
||||
i2c_master_setDC(1, 0); |
||||
i2c_master_wait(5); |
||||
|
||||
return retVal; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_checkAck |
||||
* Description : get dev response |
||||
* Parameters : NONE |
||||
* Returns : true : get ack ; false : get nack |
||||
*******************************************************************************/ |
||||
bool ICACHE_FLASH_ATTR |
||||
i2c_master_checkAck(void) |
||||
{ |
||||
if(i2c_master_getAck()){ |
||||
return FALSE; |
||||
}else{ |
||||
return TRUE; |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_send_ack |
||||
* Description : response ack |
||||
* Parameters : NONE |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
i2c_master_send_ack(void) |
||||
{ |
||||
i2c_master_setAck(0x0); |
||||
} |
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_send_nack |
||||
* Description : response nack |
||||
* Parameters : NONE |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
i2c_master_send_nack(void) |
||||
{ |
||||
i2c_master_setAck(0x1); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_readByte |
||||
* Description : read Byte from i2c bus |
||||
* Parameters : NONE |
||||
* Returns : uint8 - readed value |
||||
*******************************************************************************/ |
||||
uint8 ICACHE_FLASH_ATTR |
||||
i2c_master_readByte(void) |
||||
{ |
||||
uint8 retVal = 0; |
||||
uint8 k, i; |
||||
|
||||
i2c_master_wait(5); |
||||
i2c_master_setDC(m_nLastSDA, 0); |
||||
i2c_master_wait(5); // sda 1, scl 0
|
||||
|
||||
for (i = 0; i < 8; i++) { |
||||
i2c_master_wait(5); |
||||
i2c_master_setDC(1, 0); |
||||
i2c_master_wait(5); // sda 1, scl 0
|
||||
i2c_master_setDC(1, 1); |
||||
i2c_master_wait(5); // sda 1, scl 1
|
||||
|
||||
k = i2c_master_getDC(); |
||||
i2c_master_wait(5); |
||||
|
||||
if (i == 7) { |
||||
i2c_master_wait(3); ////
|
||||
} |
||||
|
||||
k <<= (7 - i); |
||||
retVal |= k; |
||||
} |
||||
|
||||
i2c_master_setDC(1, 0); |
||||
i2c_master_wait(5); // sda 1, scl 0
|
||||
|
||||
return retVal; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : i2c_master_writeByte |
||||
* Description : write wrdata value(one byte) into i2c |
||||
* Parameters : uint8 wrdata - write value |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
i2c_master_writeByte(uint8 wrdata) |
||||
{ |
||||
uint8 dat; |
||||
sint8 i; |
||||
|
||||
i2c_master_wait(5); |
||||
|
||||
i2c_master_setDC(m_nLastSDA, 0); |
||||
i2c_master_wait(5); |
||||
|
||||
for (i = 7; i >= 0; i--) { |
||||
dat = wrdata >> i; |
||||
i2c_master_setDC(dat, 0); |
||||
i2c_master_wait(5); |
||||
i2c_master_setDC(dat, 1); |
||||
i2c_master_wait(5); |
||||
|
||||
if (i == 0) { |
||||
i2c_master_wait(3); ////
|
||||
} |
||||
|
||||
i2c_master_setDC(dat, 0); |
||||
i2c_master_wait(5); |
||||
} |
||||
} |
@ -1,162 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: key.c |
||||
* |
||||
* Description: key driver, now can use different gpio and install different function |
||||
* |
||||
* Modification history: |
||||
* 2014/5/1, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "os_type.h" |
||||
#include "osapi.h" |
||||
#include "mem.h" |
||||
#include "gpio.h" |
||||
#include "user_interface.h" |
||||
|
||||
#include "driver/key.h" |
||||
|
||||
LOCAL void key_intr_handler(struct keys_param *keys); |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_init_single |
||||
* Description : init single key's gpio and register function |
||||
* Parameters : uint8 gpio_id - which gpio to use |
||||
* uint32 gpio_name - gpio mux name |
||||
* uint32 gpio_func - gpio function |
||||
* key_function long_press - long press function, needed to install |
||||
* key_function short_press - short press function, needed to install |
||||
* Returns : single_key_param - single key parameter, needed by key init |
||||
*******************************************************************************/ |
||||
struct single_key_param *ICACHE_FLASH_ATTR |
||||
key_init_single(uint8 gpio_id, uint32 gpio_name, uint8 gpio_func, key_function long_press, key_function short_press) |
||||
{ |
||||
struct single_key_param *single_key = (struct single_key_param *)os_zalloc(sizeof(struct single_key_param)); |
||||
|
||||
single_key->gpio_id = gpio_id; |
||||
single_key->gpio_name = gpio_name; |
||||
single_key->gpio_func = gpio_func; |
||||
single_key->long_press = long_press; |
||||
single_key->short_press = short_press; |
||||
|
||||
return single_key; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_init |
||||
* Description : init keys |
||||
* Parameters : key_param *keys - keys parameter, which inited by key_init_single |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
key_init(struct keys_param *keys) |
||||
{ |
||||
uint8 i; |
||||
|
||||
ETS_GPIO_INTR_ATTACH(key_intr_handler, keys); |
||||
|
||||
ETS_GPIO_INTR_DISABLE(); |
||||
|
||||
for (i = 0; i < keys->key_num; i++) { |
||||
keys->single_key[i]->key_level = 1; |
||||
|
||||
PIN_FUNC_SELECT(keys->single_key[i]->gpio_name, keys->single_key[i]->gpio_func); |
||||
|
||||
gpio_output_set(0, 0, 0, GPIO_ID_PIN(keys->single_key[i]->gpio_id)); |
||||
|
||||
gpio_register_set(GPIO_PIN_ADDR(keys->single_key[i]->gpio_id), GPIO_PIN_INT_TYPE_SET(GPIO_PIN_INTR_DISABLE) |
||||
| GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_DISABLE) |
||||
| GPIO_PIN_SOURCE_SET(GPIO_AS_PIN_SOURCE)); |
||||
|
||||
//clear gpio14 status
|
||||
GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, BIT(keys->single_key[i]->gpio_id)); |
||||
|
||||
//enable interrupt
|
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_NEGEDGE); |
||||
} |
||||
|
||||
ETS_GPIO_INTR_ENABLE(); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_5s_cb |
||||
* Description : long press 5s timer callback |
||||
* Parameters : single_key_param *single_key - single key parameter |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
key_5s_cb(struct single_key_param *single_key) |
||||
{ |
||||
os_timer_disarm(&single_key->key_5s); |
||||
|
||||
// low, then restart
|
||||
if (0 == GPIO_INPUT_GET(GPIO_ID_PIN(single_key->gpio_id))) { |
||||
if (single_key->long_press) { |
||||
single_key->long_press(); |
||||
} |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_50ms_cb |
||||
* Description : 50ms timer callback to check it's a real key push |
||||
* Parameters : single_key_param *single_key - single key parameter |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
key_50ms_cb(struct single_key_param *single_key) |
||||
{ |
||||
os_timer_disarm(&single_key->key_50ms); |
||||
|
||||
// high, then key is up
|
||||
if (1 == GPIO_INPUT_GET(GPIO_ID_PIN(single_key->gpio_id))) { |
||||
os_timer_disarm(&single_key->key_5s); |
||||
single_key->key_level = 1; |
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(single_key->gpio_id), GPIO_PIN_INTR_NEGEDGE); |
||||
|
||||
if (single_key->short_press) { |
||||
single_key->short_press(); |
||||
} |
||||
} else { |
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(single_key->gpio_id), GPIO_PIN_INTR_POSEDGE); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_intr_handler |
||||
* Description : key interrupt handler |
||||
* Parameters : key_param *keys - keys parameter, which inited by key_init_single |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void |
||||
key_intr_handler(struct keys_param *keys) |
||||
{ |
||||
uint8 i; |
||||
uint32 gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS); |
||||
|
||||
for (i = 0; i < keys->key_num; i++) { |
||||
if (gpio_status & BIT(keys->single_key[i]->gpio_id)) { |
||||
//disable interrupt
|
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_DISABLE); |
||||
|
||||
//clear interrupt status
|
||||
GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status & BIT(keys->single_key[i]->gpio_id)); |
||||
|
||||
if (keys->single_key[i]->key_level == 1) { |
||||
// 5s, restart & enter softap mode
|
||||
os_timer_disarm(&keys->single_key[i]->key_5s); |
||||
os_timer_setfn(&keys->single_key[i]->key_5s, (os_timer_func_t *)key_5s_cb, keys->single_key[i]); |
||||
os_timer_arm(&keys->single_key[i]->key_5s, 5000, 0); |
||||
keys->single_key[i]->key_level = 0; |
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_POSEDGE); |
||||
} else { |
||||
// 50ms, check if this is a real key up
|
||||
os_timer_disarm(&keys->single_key[i]->key_50ms); |
||||
os_timer_setfn(&keys->single_key[i]->key_50ms, (os_timer_func_t *)key_50ms_cb, keys->single_key[i]); |
||||
os_timer_arm(&keys->single_key[i]->key_50ms, 50, 0); |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
@ -1,433 +0,0 @@ |
||||
#include "driver/slc_register.h" |
||||
#include "driver/sdio_slv.h" |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "os_type.h" |
||||
//#include "gpio.h"
|
||||
#include "user_interface.h" |
||||
#include "mem.h" |
||||
|
||||
#define SDIO_TOKEN_SIZE 0//4
|
||||
#define RX_BUFFER_SIZE 512 |
||||
#define RX_BUFFER_NUM 4 |
||||
|
||||
#define TX_BUFFER_SIZE 512 |
||||
#define SLC_INTEREST_EVENT (SLC_TX_EOF_INT_ENA | SLC_RX_EOF_INT_ENA | SLC_RX_UDF_INT_ENA | SLC_TX_DSCR_ERR_INT_ENA) |
||||
#define TRIG_TOHOST_INT() SET_PERI_REG_MASK(SLC_INTVEC_TOHOST , BIT0);\ |
||||
//CLEAR_PERI_REG_MASK(SLC_INTVEC_TOHOST , BIT0)
|
||||
struct sdio_queue |
||||
{ |
||||
uint32 blocksize:12; |
||||
uint32 datalen:12; |
||||
uint32 unused:5; |
||||
uint32 sub_sof:1; |
||||
uint32 eof:1; |
||||
uint32 owner:1; |
||||
|
||||
uint32 buf_ptr; |
||||
uint32 next_link_ptr; |
||||
}; |
||||
|
||||
struct sdio_slave_status_element |
||||
{ |
||||
uint32 wr_busy:1; |
||||
uint32 rd_empty :1; |
||||
uint32 comm_cnt :3; |
||||
uint32 intr_no :3; |
||||
uint32 rx_length:16; |
||||
uint32 res:8; |
||||
}; |
||||
|
||||
union sdio_slave_status |
||||
{ |
||||
struct sdio_slave_status_element elm_value; |
||||
uint32 word_value; |
||||
}; |
||||
|
||||
//uint8 rx_buffer[RX_BUFFER_NUM][RX_BUFFER_SIZE],tx_buffer[1024];
|
||||
uint8 tx_buffer[TX_BUFFER_SIZE]; |
||||
|
||||
uint32 data_len = 0; |
||||
|
||||
struct sdio_list { |
||||
uint8 buffer[RX_BUFFER_SIZE + SDIO_TOKEN_SIZE]; |
||||
uint8* tail; |
||||
struct sdio_list* next; |
||||
}; |
||||
|
||||
static sdio_recv_data_callback_t sdio_recv_data_callback_ptr = NULL; |
||||
struct sdio_list* pHead_ToSend; |
||||
struct sdio_list* pTail_ToSend; |
||||
struct sdio_list* pHead_Sended; |
||||
struct sdio_list* pTail_Sended; |
||||
|
||||
|
||||
|
||||
os_event_t * sdioQueue; |
||||
struct sdio_queue rx_que,tx_que; |
||||
|
||||
static bool has_read = 0; |
||||
|
||||
static void sdio_slave_isr(void *para); |
||||
static void tx_buff_handle_done(void); |
||||
static void rx_buff_read_done(void); |
||||
static void tx_buff_write_done(void); |
||||
|
||||
static void sdio_try_to_load(void); |
||||
static void sdio_read_done_process(void); |
||||
|
||||
void sdio_slave_init(void) |
||||
{ |
||||
uint32 regval = 0; |
||||
union sdio_slave_status sdio_sta; |
||||
ETS_SDIO_INTR_DISABLE(); |
||||
////reset orginal link
|
||||
SET_PERI_REG_MASK(SLC_CONF0, SLC_RXLINK_RST|SLC_TXLINK_RST); |
||||
CLEAR_PERI_REG_MASK(SLC_CONF0, SLC_RXLINK_RST|SLC_TXLINK_RST); |
||||
|
||||
os_printf("RX&TX link reset!\n"); |
||||
|
||||
//set sdio mode
|
||||
SET_PERI_REG_MASK(SLC_RX_DSCR_CONF, SLC_RX_EOF_MODE | SLC_RX_FILL_MODE); |
||||
//clear to host interrupt io signal for preventing from random initial signal.
|
||||
WRITE_PERI_REG(SLC_HOST_INTR_CLR, 0xffffffff); |
||||
//enable 2 events to trigger the to host intr io
|
||||
SET_PERI_REG_MASK(SLC_HOST_INTR_ENA , SLC_HOST_TOHOST_BIT0_INT_ENA); |
||||
////initialize rx queue information
|
||||
|
||||
has_read = TRUE; |
||||
pHead_ToSend = NULL; |
||||
|
||||
int loop = RX_BUFFER_NUM; |
||||
struct sdio_list* p = NULL; |
||||
while(loop--) { |
||||
if(pHead_Sended == NULL) { |
||||
pHead_Sended = (struct sdio_list*)os_malloc(sizeof(struct sdio_list)); |
||||
p = pHead_Sended; |
||||
} else { |
||||
p->next = (struct sdio_list*)os_malloc(sizeof(struct sdio_list)); |
||||
p = p->next; |
||||
} |
||||
//os_printf("p:0x%08x\r\n",p);
|
||||
p->tail = p->buffer + SDIO_TOKEN_SIZE; |
||||
p->next = NULL; |
||||
} |
||||
pTail_Sended = p; |
||||
|
||||
rx_que.blocksize = RX_BUFFER_SIZE; |
||||
rx_que.datalen=0; |
||||
rx_que.eof=1; |
||||
rx_que.owner=1; |
||||
rx_que.sub_sof=0; |
||||
rx_que.unused=0; |
||||
rx_que.buf_ptr=(uint32)pHead_Sended->buffer; |
||||
rx_que.next_link_ptr=0; |
||||
|
||||
|
||||
////initialize tx queue information
|
||||
tx_que.blocksize=TX_BUFFER_SIZE; |
||||
tx_que.datalen=0; |
||||
tx_que.eof=0; |
||||
tx_que.owner=1; |
||||
tx_que.sub_sof=0; |
||||
tx_que.unused=0; |
||||
tx_que.buf_ptr=(uint32)tx_buffer; |
||||
tx_que.next_link_ptr=0; |
||||
|
||||
///////link tx&rx queue information address to sdio hardware
|
||||
CLEAR_PERI_REG_MASK(SLC_RX_LINK,SLC_RXLINK_DESCADDR_MASK); |
||||
regval= ((uint32)&rx_que); |
||||
SET_PERI_REG_MASK(SLC_RX_LINK, regval&SLC_RXLINK_DESCADDR_MASK); |
||||
CLEAR_PERI_REG_MASK(SLC_TX_LINK,SLC_TXLINK_DESCADDR_MASK); |
||||
regval= ((uint32)&tx_que); |
||||
SET_PERI_REG_MASK(SLC_TX_LINK, regval&SLC_TXLINK_DESCADDR_MASK); |
||||
|
||||
#if (SDIO_TOKEN_SIZE == 0) |
||||
SET_PERI_REG_MASK(SLC_RX_DSCR_CONF, SLC_TOKEN_NO_REPLACE); |
||||
#endif |
||||
|
||||
/////config sdio_status reg
|
||||
sdio_sta.elm_value.comm_cnt=7; |
||||
sdio_sta.elm_value.intr_no=INIT_STAGE; |
||||
sdio_sta.elm_value.wr_busy=0; |
||||
sdio_sta.elm_value.rd_empty=1; |
||||
sdio_sta.elm_value.rx_length=0; |
||||
sdio_sta.elm_value.res=0; |
||||
SET_PERI_REG_MASK(SLC_TX_LINK, SLC_TXLINK_START); |
||||
WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); |
||||
|
||||
|
||||
/////attach isr func to sdio interrupt
|
||||
ETS_SDIO_INTR_ATTACH(sdio_slave_isr, NULL); |
||||
/////enable sdio operation intr
|
||||
WRITE_PERI_REG(SLC_INT_ENA, SLC_INTEREST_EVENT); |
||||
/////clear sdio initial random active intr signal
|
||||
WRITE_PERI_REG(SLC_INT_CLR, 0xffffffff); |
||||
/////enable sdio intr in cpu
|
||||
ETS_SDIO_INTR_ENABLE(); |
||||
} |
||||
|
||||
static void sdio_slave_isr(void *para) |
||||
{ |
||||
uint32 slc_intr_status,postval; |
||||
static uint8 state =0; |
||||
uint16 rx_len,i; |
||||
uint32* pword; |
||||
union sdio_slave_status sdio_sta; |
||||
|
||||
slc_intr_status = READ_PERI_REG(SLC_INT_STATUS); |
||||
|
||||
if (slc_intr_status == 0) |
||||
{ |
||||
/* No interested interrupts pending */ |
||||
return; |
||||
} |
||||
//clear all intrs
|
||||
WRITE_PERI_REG(SLC_INT_CLR, slc_intr_status); |
||||
//os_printf("slc_intr_status:0x%08x\r\n",slc_intr_status);
|
||||
//process every intr
|
||||
|
||||
//TO HOST DONE
|
||||
if (slc_intr_status & SLC_RX_EOF_INT_ENA) |
||||
{ |
||||
//following code must be called after a data pack has been read
|
||||
rx_buff_read_done(); |
||||
//TRIG_TOHOST_INT();
|
||||
//system_os_post(2, 1, 0);
|
||||
sdio_read_done_process(); |
||||
} |
||||
|
||||
//FROM HOST DONE
|
||||
if (slc_intr_status & SLC_TX_EOF_INT_ENA) |
||||
{ |
||||
//call the following function after host cpu data transmission finished
|
||||
tx_buff_write_done(); |
||||
|
||||
//system_os_post(USER_TASK_PRIO_1,SDIO_DATA_ERROR,0);
|
||||
//os_printf("%d,%s\r\n",tx_que.datalen,tx_que.buf_ptr);
|
||||
//at_fake_uart_rx((uint8*)tx_que.buf_ptr,tx_que.datalen);
|
||||
if(sdio_recv_data_callback_ptr) { |
||||
sdio_recv_data_callback_ptr((uint8*)tx_que.buf_ptr,tx_que.datalen); |
||||
} |
||||
tx_buff_handle_done(); |
||||
TRIG_TOHOST_INT(); |
||||
//system_os_post(2, 3, 0);
|
||||
} |
||||
|
||||
//TO HOST underflow
|
||||
if(slc_intr_status & SLC_RX_UDF_INT_ENA) |
||||
{ |
||||
} |
||||
|
||||
//FROM HOST overflow
|
||||
if(slc_intr_status & SLC_TX_DSCR_ERR_INT_ENA) |
||||
{ |
||||
} |
||||
|
||||
slc_intr_status = READ_PERI_REG(SLC_INT_STATUS); |
||||
if(slc_intr_status) |
||||
{ |
||||
WRITE_PERI_REG(SLC_INT_CLR, slc_intr_status); |
||||
os_printf("slc_intr_status:0x%08x\r\n",slc_intr_status); |
||||
} |
||||
|
||||
} |
||||
|
||||
static void rx_buff_read_done(void) |
||||
{ |
||||
union sdio_slave_status sdio_sta; |
||||
/////modify sdio status reg
|
||||
sdio_sta.word_value=READ_PERI_REG(SLC_HOST_CONF_W2); |
||||
sdio_sta.elm_value.comm_cnt++; |
||||
sdio_sta.elm_value.rd_empty=1; |
||||
sdio_sta.elm_value.rx_length=0; |
||||
sdio_sta.elm_value.intr_no &= (~RX_AVAILIBLE); |
||||
WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); //update sdio status register
|
||||
//os_printf("rx_buff_read_done\r\n");
|
||||
} |
||||
|
||||
static void tx_buff_write_done(void) |
||||
{ |
||||
union sdio_slave_status sdio_sta; |
||||
/////modify sdio status reg
|
||||
sdio_sta.word_value=READ_PERI_REG(SLC_HOST_CONF_W2); |
||||
sdio_sta.elm_value.comm_cnt++; |
||||
sdio_sta.elm_value.wr_busy=1; |
||||
sdio_sta.elm_value.intr_no &= (~TX_AVAILIBLE); |
||||
WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); //update sdio status register
|
||||
} |
||||
|
||||
static void tx_buff_handle_done(void) |
||||
{ |
||||
union sdio_slave_status sdio_sta; |
||||
|
||||
/////config tx queue information
|
||||
tx_que.blocksize=TX_BUFFER_SIZE; |
||||
tx_que.datalen=0; |
||||
tx_que.eof=0; |
||||
tx_que.owner=1; |
||||
|
||||
/////modify sdio status reg
|
||||
sdio_sta.word_value=READ_PERI_REG(SLC_HOST_CONF_W2); |
||||
sdio_sta.elm_value.wr_busy=0; |
||||
sdio_sta.elm_value.intr_no |= TX_AVAILIBLE; |
||||
|
||||
SET_PERI_REG_MASK(SLC_TX_LINK, SLC_TXLINK_START); //tx buffer is ready for being written
|
||||
WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); //update sdio status register
|
||||
//*******************************************************************//
|
||||
|
||||
} |
||||
static int32 rx_buff_load_done(uint16 rx_len) |
||||
{ |
||||
union sdio_slave_status sdio_sta; |
||||
|
||||
if(rx_len == 0) { |
||||
return 0; |
||||
} |
||||
if(rx_len > rx_que.blocksize) |
||||
{ |
||||
rx_len = rx_que.blocksize; |
||||
} |
||||
|
||||
//os_memcpy(rx_que.buf_ptr,data,rx_len);
|
||||
/////config rx queue information
|
||||
rx_que.blocksize=RX_BUFFER_SIZE; |
||||
rx_que.datalen=rx_len + SDIO_TOKEN_SIZE; |
||||
rx_que.eof=1; |
||||
rx_que.owner=1; |
||||
|
||||
//ETS_SDIO_INTR_DISABLE();
|
||||
//available_buffer_amount--;
|
||||
|
||||
/////modify sdio status reg
|
||||
sdio_sta.word_value=READ_PERI_REG(SLC_HOST_CONF_W2); |
||||
sdio_sta.elm_value.rd_empty=0; |
||||
sdio_sta.elm_value.intr_no |= RX_AVAILIBLE; |
||||
sdio_sta.elm_value.rx_length=rx_len; |
||||
|
||||
SET_PERI_REG_MASK(SLC_RX_LINK, SLC_RXLINK_START); //rx buffer is ready for being read
|
||||
WRITE_PERI_REG(SLC_HOST_CONF_W2, sdio_sta.word_value); //update sdio status register
|
||||
//ETS_SDIO_INTR_ENABLE();
|
||||
//os_printf("rx_buff_load_done(%d,0x%08x):%s\r\n",rx_len,rx_que.buf_ptr,rx_que.buf_ptr);
|
||||
//os_printf("rx_buff_load_done:%d\r\n",rx_len);
|
||||
return rx_len; |
||||
} |
||||
|
||||
int32 ICACHE_FLASH_ATTR sdio_load_data(const uint8* data,uint32 len) |
||||
{ |
||||
int32 data_len = 0; |
||||
|
||||
if (pHead_Sended == NULL) { |
||||
os_printf("no buf\r\n"); |
||||
return 0; |
||||
} |
||||
int32 left_len = 0; |
||||
|
||||
while(len) |
||||
{ |
||||
left_len = RX_BUFFER_SIZE + SDIO_TOKEN_SIZE - (uint32)(pHead_Sended->tail - pHead_Sended->buffer); |
||||
if(len < left_len) |
||||
{ |
||||
os_memcpy(pHead_Sended->tail,data,len); |
||||
pHead_Sended->tail += len; |
||||
len = 0; |
||||
data_len += len; |
||||
//os_printf(">555:0x%08x,0x%08x\r\n",pHead_Sended->buffer,pHead_Sended->tail);
|
||||
} |
||||
else |
||||
{ |
||||
os_memcpy(pHead_Sended->tail,data,left_len); |
||||
pHead_Sended->tail += left_len; |
||||
len -= left_len; |
||||
data += left_len; |
||||
data_len += left_len; |
||||
if(pHead_ToSend == NULL) { |
||||
pTail_ToSend = pHead_Sended; |
||||
pHead_ToSend = pTail_ToSend; |
||||
} else { |
||||
pTail_ToSend->next = pHead_Sended; |
||||
pTail_ToSend = pTail_ToSend->next; |
||||
} |
||||
pHead_Sended = pHead_Sended->next; |
||||
|
||||
pTail_ToSend->next = NULL; |
||||
if(pHead_Sended == NULL) |
||||
{ |
||||
os_printf("buf full\r\n"); |
||||
break; |
||||
} |
||||
//os_printf(">666\r\n");
|
||||
} |
||||
} |
||||
|
||||
//os_printf(">>pHead_ToSend:0x%08x\r\n",pHead_ToSend);
|
||||
|
||||
if(pHead_ToSend == NULL) { |
||||
pTail_ToSend = pHead_Sended; |
||||
pHead_ToSend = pTail_ToSend; |
||||
|
||||
pHead_Sended = pHead_Sended->next; |
||||
pTail_ToSend->next = NULL; |
||||
//system_os_post(2, 2, 0);
|
||||
sdio_try_to_load(); |
||||
} |
||||
return data_len; |
||||
} |
||||
|
||||
static void sdio_try_to_load(void) |
||||
{ |
||||
if((has_read == TRUE) && (pHead_ToSend != NULL)) |
||||
{ |
||||
rx_que.buf_ptr = (uint32)pHead_ToSend->buffer; |
||||
rx_buff_load_done(pHead_ToSend->tail- pHead_ToSend->buffer - SDIO_TOKEN_SIZE); |
||||
//pHead_ToSend = pHead_ToSend->next;
|
||||
has_read = FALSE; |
||||
//os_printf("SLC_INT_STATUS:0x%08x\r\n",READ_PERI_REG(SLC_INT_STATUS));
|
||||
TRIG_TOHOST_INT(); |
||||
} |
||||
} |
||||
|
||||
static void sdio_read_done_process(void) |
||||
{ |
||||
has_read = TRUE; |
||||
|
||||
pHead_ToSend->tail = pHead_ToSend->buffer + SDIO_TOKEN_SIZE; |
||||
if(pHead_Sended) { |
||||
pTail_Sended->next = pHead_ToSend; |
||||
pTail_Sended = pTail_Sended->next; |
||||
}else { |
||||
pTail_Sended = pHead_ToSend; |
||||
pHead_Sended = pTail_Sended; |
||||
} |
||||
pHead_ToSend = pHead_ToSend->next; |
||||
pTail_Sended->next = NULL; |
||||
//os_printf(">>pHead_ToSend:0x%08x,pHead_Sended:0x%08x,0x%08x,0x%08x\r\n",pHead_ToSend,pHead_Sended,pHead_Sended->buffer,pHead_Sended->tail);
|
||||
if(pHead_ToSend) { |
||||
rx_que.buf_ptr = (uint32)pHead_ToSend->buffer; |
||||
rx_buff_load_done(pHead_ToSend->tail - pHead_ToSend->buffer - SDIO_TOKEN_SIZE); |
||||
has_read = FALSE; |
||||
//os_printf("intr trig\r\n");
|
||||
//TRIG_TOHOST_INT();
|
||||
} else if ((pHead_Sended != NULL) && (pHead_Sended->buffer != (pHead_Sended->tail- SDIO_TOKEN_SIZE))) { |
||||
pHead_ToSend = pHead_Sended; |
||||
pTail_ToSend = pHead_ToSend; |
||||
pHead_Sended = pHead_Sended->next; |
||||
pTail_ToSend->next = NULL; |
||||
|
||||
rx_que.buf_ptr = (uint32)pHead_ToSend->buffer;
|
||||
rx_buff_load_done(pHead_ToSend->tail- pHead_ToSend->buffer - SDIO_TOKEN_SIZE); |
||||
has_read = FALSE; |
||||
//os_printf("intr trig\r\n");
|
||||
//TRIG_TOHOST_INT();
|
||||
} |
||||
|
||||
TRIG_TOHOST_INT(); |
||||
} |
||||
|
||||
bool sdio_register_recv_cb(sdio_recv_data_callback_t cb) |
||||
{ |
||||
sdio_recv_data_callback_ptr = cb; |
||||
|
||||
return TRUE; |
||||
} |
||||
|
@ -1,464 +0,0 @@ |
||||
|
||||
#include "driver/spi.h" |
||||
#include "driver/spi_overlap.h" |
||||
|
||||
#define CACHE_FLASH_CTRL_REG 0x3ff0000C |
||||
#define CACHE_FLUSH_START_BIT BIT0 |
||||
#define CACHE_EMPTY_FLAG_BIT BIT1 |
||||
/******************************************************************************
|
||||
* FunctionName : cache_flush |
||||
* Description : clear all the cpu cache data for stability test. |
||||
*******************************************************************************/ |
||||
void cache_flush(void) |
||||
{ |
||||
while(READ_PERI_REG(CACHE_FLASH_CTRL_REG)&CACHE_EMPTY_FLAG_BIT) { |
||||
CLEAR_PERI_REG_MASK(CACHE_FLASH_CTRL_REG, CACHE_FLUSH_START_BIT); |
||||
SET_PERI_REG_MASK(CACHE_FLASH_CTRL_REG, CACHE_FLUSH_START_BIT); |
||||
} |
||||
while(!(READ_PERI_REG(CACHE_FLASH_CTRL_REG)&CACHE_EMPTY_FLAG_BIT)); |
||||
|
||||
CLEAR_PERI_REG_MASK(CACHE_FLASH_CTRL_REG, CACHE_FLUSH_START_BIT); |
||||
} |
||||
/******************************************************************************
|
||||
* FunctionName : spi_master_init |
||||
* Description : SPI master initial function for common byte units transmission |
||||
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
spi_master_init(uint8 spi_no) |
||||
{ |
||||
uint32 regvalue;
|
||||
|
||||
if(spi_no>1) return; //handle invalid input number
|
||||
|
||||
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CS_SETUP|SPI_CS_HOLD|SPI_USR_COMMAND); |
||||
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_FLASH_MODE); |
||||
|
||||
WRITE_PERI_REG(SPI_CLOCK(spi_no),
|
||||
((3&SPI_CLKCNT_N)<<SPI_CLKCNT_N_S)| |
||||
((1&SPI_CLKCNT_H)<<SPI_CLKCNT_H_S)| |
||||
((3&SPI_CLKCNT_L)<<SPI_CLKCNT_L_S)); //clear bit 31,set SPI clock div
|
||||
} |
||||
/******************************************************************************
|
||||
* FunctionName : spi_lcd_9bit_write |
||||
* Description : SPI 9bits transmission function for driving LCD TM035PDZV36 |
||||
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid |
||||
* uint8 high_bit - first high bit of the data, 0 is for "0",the other value 1-255 is for "1" |
||||
* uint8 low_8bit- the rest 8bits of the data. |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
spi_lcd_9bit_write(uint8 spi_no,uint8 high_bit,uint8 low_8bit) |
||||
{ |
||||
uint32 regvalue; |
||||
uint8 bytetemp; |
||||
if(spi_no>1) return; //handle invalid input number
|
||||
|
||||
if(high_bit) bytetemp=(low_8bit>>1)|0x80; |
||||
else bytetemp=(low_8bit>>1)&0x7f; |
||||
|
||||
regvalue= ((8&SPI_USR_COMMAND_BITLEN)<<SPI_USR_COMMAND_BITLEN_S)|((uint32)bytetemp); //configure transmission variable,9bit transmission length and first 8 command bit
|
||||
if(low_8bit&0x01) regvalue|=BIT15; //write the 9th bit
|
||||
while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); //waiting for spi module available
|
||||
WRITE_PERI_REG(SPI_USER2(spi_no), regvalue); //write command and command length into spi reg
|
||||
SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); //transmission start
|
||||
// while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR);
|
||||
} |
||||
/******************************************************************************
|
||||
* FunctionName : spi_mast_byte_write |
||||
* Description : SPI master 1 byte transmission function |
||||
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid |
||||
* uint8 data- transmitted data |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
spi_mast_byte_write(uint8 spi_no,uint8 data) |
||||
{ |
||||
uint32 regvalue; |
||||
|
||||
if(spi_no>1) return; //handle invalid input number
|
||||
|
||||
while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); |
||||
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI|SPI_USR_MISO); |
||||
|
||||
//SPI_FLASH_USER2 bit28-31 is cmd length,cmd bit length is value(0-15)+1,
|
||||
// bit15-0 is cmd value.
|
||||
WRITE_PERI_REG(SPI_USER2(spi_no),
|
||||
((7&SPI_USR_COMMAND_BITLEN)<<SPI_USR_COMMAND_BITLEN_S)|((uint32)data)); |
||||
SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); |
||||
while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : spi_byte_write_espslave |
||||
* Description : SPI master 1 byte transmission function for esp8266 slave, |
||||
* transmit 1byte data to esp8266 slave buffer needs 16bit transmission , |
||||
* first byte is command 0x04 to write slave buffer, second byte is data |
||||
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid |
||||
* uint8 data- transmitted data |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
spi_byte_write_espslave(uint8 spi_no,uint8 data) |
||||
{ |
||||
uint32 regvalue; |
||||
|
||||
if(spi_no>1) return; //handle invalid input number
|
||||
|
||||
while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); |
||||
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI); |
||||
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO|SPI_USR_ADDR|SPI_USR_DUMMY); |
||||
|
||||
//SPI_FLASH_USER2 bit28-31 is cmd length,cmd bit length is value(0-15)+1,
|
||||
// bit15-0 is cmd value.
|
||||
//0x70000000 is for 8bits cmd, 0x04 is eps8266 slave write cmd value
|
||||
WRITE_PERI_REG(SPI_USER2(spi_no),
|
||||
((7&SPI_USR_COMMAND_BITLEN)<<SPI_USR_COMMAND_BITLEN_S)|4); |
||||
WRITE_PERI_REG(SPI_W0(spi_no), (uint32)(data)); |
||||
SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); |
||||
} |
||||
/******************************************************************************
|
||||
* FunctionName : spi_byte_read_espslave |
||||
* Description : SPI master 1 byte read function for esp8266 slave, |
||||
* read 1byte data from esp8266 slave buffer needs 16bit transmission , |
||||
* first byte is command 0x06 to read slave buffer, second byte is recieved data |
||||
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid |
||||
* uint8* data- recieved data address |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
spi_byte_read_espslave(uint8 spi_no,uint8 *data) |
||||
{ |
||||
uint32 regvalue; |
||||
|
||||
if(spi_no>1) return; //handle invalid input number
|
||||
|
||||
while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); |
||||
|
||||
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO); |
||||
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI|SPI_USR_ADDR|SPI_USR_DUMMY); |
||||
//SPI_FLASH_USER2 bit28-31 is cmd length,cmd bit length is value(0-15)+1,
|
||||
// bit15-0 is cmd value.
|
||||
//0x70000000 is for 8bits cmd, 0x06 is eps8266 slave read cmd value
|
||||
WRITE_PERI_REG(SPI_USER2(spi_no),
|
||||
((7&SPI_USR_COMMAND_BITLEN)<<SPI_USR_COMMAND_BITLEN_S)|6); |
||||
SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR); |
||||
|
||||
while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR); |
||||
*data=(uint8)(READ_PERI_REG(SPI_W0(spi_no))&0xff); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : spi_slave_init |
||||
* Description : SPI slave mode initial funtion, including mode setting, |
||||
* IO setting, transmission interrupt opening, interrupt function registration |
||||
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid |
||||
* uint8 data_len - read&write data pack length,using byte as unit,the range is 1-32 |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
spi_slave_init(uint8 spi_no,uint8 data_len) |
||||
{ |
||||
uint32 regvalue;
|
||||
uint32 data_bit_len; |
||||
if(spi_no>1) |
||||
return; //handle invalid input number
|
||||
if(data_len<=1) data_bit_len=7; |
||||
else if(data_len>=32) data_bit_len=0xff; |
||||
else data_bit_len=(data_len<<3)-1; |
||||
|
||||
//clear bit9,bit8 of reg PERIPHS_IO_MUX
|
||||
//bit9 should be cleared when HSPI clock doesn't equal CPU clock
|
||||
//bit8 should be cleared when SPI clock doesn't equal CPU clock
|
||||
////WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105); //clear bit9//TEST
|
||||
if(spi_no==SPI){ |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, 1);//configure io to spi mode
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 1);//configure io to spi mode
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, 1);//configure io to spi mode
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, 1);//configure io to spi mode
|
||||
}else if(spi_no==HSPI){ |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);//configure io to spi mode
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);//configure io to spi mode
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);//configure io to spi mode
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2);//configure io to spi mode
|
||||
} |
||||
|
||||
//regvalue=READ_PERI_REG(SPI_FLASH_SLAVE(spi_no));
|
||||
//slave mode,slave use buffers which are register "SPI_FLASH_C0~C15", enable trans done isr
|
||||
//set bit 30 bit 29 bit9,bit9 is trans done isr mask
|
||||
SET_PERI_REG_MASK( SPI_SLAVE(spi_no),
|
||||
SPI_SLAVE_MODE|SPI_SLV_WR_RD_BUF_EN| |
||||
SPI_SLV_WR_BUF_DONE_EN|SPI_SLV_RD_BUF_DONE_EN| |
||||
SPI_SLV_WR_STA_DONE_EN|SPI_SLV_RD_STA_DONE_EN| |
||||
SPI_TRANS_DONE_EN); |
||||
//disable general trans intr
|
||||
//CLEAR_PERI_REG_MASK(SPI_SLAVE(spi_no),SPI_TRANS_DONE_EN);
|
||||
|
||||
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_FLASH_MODE);//disable flash operation mode
|
||||
SET_PERI_REG_MASK(SPI_USER(spi_no),SPI_USR_MISO_HIGHPART);//SLAVE SEND DATA BUFFER IN C8-C15
|
||||
|
||||
|
||||
//////**************RUN WHEN SLAVE RECIEVE*******************///////
|
||||
//tow lines below is to configure spi timing.
|
||||
SET_PERI_REG_MASK(SPI_CTRL2(spi_no),(0x2&SPI_MOSI_DELAY_NUM)<<SPI_MOSI_DELAY_NUM_S) ;//delay num
|
||||
os_printf("SPI_CTRL2 is %08x\n",READ_PERI_REG(SPI_CTRL2(spi_no))); |
||||
WRITE_PERI_REG(SPI_CLOCK(spi_no), 0); |
||||
|
||||
|
||||
|
||||
/////***************************************************//////
|
||||
|
||||
//set 8 bit slave command length, because slave must have at least one bit addr,
|
||||
//8 bit slave+8bit addr, so master device first 2 bytes can be regarded as a command
|
||||
//and the following bytes are datas,
|
||||
//32 bytes input wil be stored in SPI_FLASH_C0-C7
|
||||
//32 bytes output data should be set to SPI_FLASH_C8-C15
|
||||
WRITE_PERI_REG(SPI_USER2(spi_no), (0x7&SPI_USR_COMMAND_BITLEN)<<SPI_USR_COMMAND_BITLEN_S); //0x70000000
|
||||
|
||||
//set 8 bit slave recieve buffer length, the buffer is SPI_FLASH_C0-C7
|
||||
//set 8 bit slave status register, which is the low 8 bit of register "SPI_FLASH_STATUS"
|
||||
SET_PERI_REG_MASK(SPI_SLAVE1(spi_no), ((data_bit_len&SPI_SLV_BUF_BITLEN)<< SPI_SLV_BUF_BITLEN_S)| |
||||
((0x7&SPI_SLV_STATUS_BITLEN)<<SPI_SLV_STATUS_BITLEN_S)| |
||||
((0x7&SPI_SLV_WR_ADDR_BITLEN)<<SPI_SLV_WR_ADDR_BITLEN_S)| |
||||
((0x7&SPI_SLV_RD_ADDR_BITLEN)<<SPI_SLV_RD_ADDR_BITLEN_S)); |
||||
|
||||
SET_PERI_REG_MASK(SPI_PIN(spi_no),BIT19);//BIT19
|
||||
|
||||
//maybe enable slave transmission liston
|
||||
SET_PERI_REG_MASK(SPI_CMD(spi_no),SPI_USR); |
||||
//register level2 isr function, which contains spi, hspi and i2s events
|
||||
ETS_SPI_INTR_ATTACH(spi_slave_isr_handler,NULL); |
||||
//enable level2 isr, which contains spi, hspi and i2s events
|
||||
ETS_SPI_INTR_ENABLE();
|
||||
} |
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* =============================================================================================
|
||||
* code below is for spi slave r/w testcase with 2 r/w state lines connected to the spi master mcu |
||||
* replace with your own process functions |
||||
* find "add system_os_post here" in spi_slave_isr_handler. |
||||
* ============================================================================================= |
||||
*/ |
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef SPI_SLAVE_DEBUG |
||||
/******************************************************************************
|
||||
* FunctionName : hspi_master_readwrite_repeat |
||||
* Description : SPI master test function for reading and writing esp8266 slave buffer, |
||||
the function uses HSPI module
|
||||
*******************************************************************************/ |
||||
os_timer_t timer2; |
||||
|
||||
void hspi_master_readwrite_repeat(void) |
||||
{ |
||||
static uint8 data=0; |
||||
uint8 temp; |
||||
|
||||
os_timer_disarm(&timer2); |
||||
spi_byte_read_espslave(HSPI,&temp); |
||||
|
||||
temp++; |
||||
spi_byte_write_espslave(HSPI,temp); |
||||
os_timer_setfn(&timer2, (os_timer_func_t *)hspi_master_readwrite_repeat, NULL); |
||||
os_timer_arm(&timer2, 500, 0); |
||||
} |
||||
#endif |
||||
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : spi_slave_isr_handler |
||||
* Description : SPI interrupt function, SPI HSPI and I2S interrupt can trig this function |
||||
some basic operation like clear isr flag has been done,
|
||||
and it is availible for adding user coder in the funtion |
||||
* Parameters : void *para- function parameter address, which has been registered in function spi_slave_init |
||||
*******************************************************************************/ |
||||
#include "gpio.h" |
||||
#include "user_interface.h" |
||||
#include "mem.h" |
||||
static uint8 spi_data[32] = {0}; |
||||
static uint8 idx = 0; |
||||
static uint8 spi_flg = 0; |
||||
#define SPI_MISO |
||||
#define SPI_QUEUE_LEN 8 |
||||
os_event_t * spiQueue; |
||||
#define MOSI 0 |
||||
#define MISO 1 |
||||
#define STATUS_R_IN_WR 2 |
||||
#define STATUS_W 3 |
||||
#define TR_DONE_ALONE 4 |
||||
#define WR_RD 5 |
||||
#define DATA_ERROR 6 |
||||
#define STATUS_R_IN_RD 7 |
||||
//init the two intr line of slave
|
||||
//gpio0: wr_ready ,and
|
||||
//gpio2: rd_ready , controlled by slave
|
||||
void ICACHE_FLASH_ATTR |
||||
gpio_init() |
||||
{ |
||||
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, FUNC_GPIO0); |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_GPIO2); |
||||
//PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO4_U, FUNC_GPIO4);
|
||||
GPIO_OUTPUT_SET(0, 1); |
||||
GPIO_OUTPUT_SET(2, 0); |
||||
//GPIO_OUTPUT_SET(4, 1);
|
||||
} |
||||
|
||||
|
||||
|
||||
void spi_slave_isr_handler(void *para) |
||||
{ |
||||
uint32 regvalue,calvalue; |
||||
static uint8 state =0; |
||||
uint32 recv_data,send_data; |
||||
|
||||
if(READ_PERI_REG(0x3ff00020)&BIT4){
|
||||
//following 3 lines is to clear isr signal
|
||||
CLEAR_PERI_REG_MASK(SPI_SLAVE(SPI), 0x3ff); |
||||
}else if(READ_PERI_REG(0x3ff00020)&BIT7){ //bit7 is for hspi isr,
|
||||
regvalue=READ_PERI_REG(SPI_SLAVE(HSPI)); |
||||
CLEAR_PERI_REG_MASK(SPI_SLAVE(HSPI),
|
||||
SPI_TRANS_DONE_EN| |
||||
SPI_SLV_WR_STA_DONE_EN| |
||||
SPI_SLV_RD_STA_DONE_EN| |
||||
SPI_SLV_WR_BUF_DONE_EN| |
||||
SPI_SLV_RD_BUF_DONE_EN); |
||||
SET_PERI_REG_MASK(SPI_SLAVE(HSPI), SPI_SYNC_RESET); |
||||
CLEAR_PERI_REG_MASK(SPI_SLAVE(HSPI),
|
||||
SPI_TRANS_DONE| |
||||
SPI_SLV_WR_STA_DONE| |
||||
SPI_SLV_RD_STA_DONE| |
||||
SPI_SLV_WR_BUF_DONE| |
||||
SPI_SLV_RD_BUF_DONE);
|
||||
SET_PERI_REG_MASK(SPI_SLAVE(HSPI),
|
||||
SPI_TRANS_DONE_EN| |
||||
SPI_SLV_WR_STA_DONE_EN| |
||||
SPI_SLV_RD_STA_DONE_EN| |
||||
SPI_SLV_WR_BUF_DONE_EN| |
||||
SPI_SLV_RD_BUF_DONE_EN); |
||||
|
||||
if(regvalue&SPI_SLV_WR_BUF_DONE){
|
||||
GPIO_OUTPUT_SET(0, 0); |
||||
idx=0; |
||||
while(idx<8){ |
||||
recv_data=READ_PERI_REG(SPI_W0(HSPI)+(idx<<2)); |
||||
spi_data[idx<<2] = recv_data&0xff; |
||||
spi_data[(idx<<2)+1] = (recv_data>>8)&0xff; |
||||
spi_data[(idx<<2)+2] = (recv_data>>16)&0xff; |
||||
spi_data[(idx<<2)+3] = (recv_data>>24)&0xff; |
||||
idx++; |
||||
} |
||||
//add system_os_post here
|
||||
GPIO_OUTPUT_SET(0, 1); |
||||
} |
||||
if(regvalue&SPI_SLV_RD_BUF_DONE){ |
||||
//it is necessary to call GPIO_OUTPUT_SET(2, 1), when new data is preped in SPI_W8-15 and needs to be sended.
|
||||
GPIO_OUTPUT_SET(2, 0); |
||||
//add system_os_post here
|
||||
//system_os_post(USER_TASK_PRIO_1,WR_RD,regvalue);
|
||||
|
||||
} |
||||
|
||||
}else if(READ_PERI_REG(0x3ff00020)&BIT9){ //bit7 is for i2s isr,
|
||||
|
||||
} |
||||
} |
||||
|
||||
|
||||
#ifdef SPI_SLAVE_DEBUG |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
set_miso_data() |
||||
{ |
||||
if(GPIO_INPUT_GET(2)==0){ |
||||
WRITE_PERI_REG(SPI_W8(HSPI),0x05040302); |
||||
WRITE_PERI_REG(SPI_W9(HSPI),0x09080706); |
||||
WRITE_PERI_REG(SPI_W10(HSPI),0x0d0c0b0a); |
||||
WRITE_PERI_REG(SPI_W11(HSPI),0x11100f0e); |
||||
|
||||
WRITE_PERI_REG(SPI_W12(HSPI),0x15141312); |
||||
WRITE_PERI_REG(SPI_W13(HSPI),0x19181716); |
||||
WRITE_PERI_REG(SPI_W14(HSPI),0x1d1c1b1a); |
||||
WRITE_PERI_REG(SPI_W15(HSPI),0x21201f1e); |
||||
GPIO_OUTPUT_SET(2, 1); |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
disp_spi_data() |
||||
{ |
||||
uint8 i = 0; |
||||
for(i=0;i<32;i++){ |
||||
os_printf("data %d : 0x%02x\n\r",i,spi_data[i]); |
||||
} |
||||
//os_printf("d31:0x%02x\n\r",spi_data[31]);
|
||||
} |
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
spi_task(os_event_t *e) |
||||
{ |
||||
uint8 data; |
||||
switch(e->sig){ |
||||
case MOSI: |
||||
disp_spi_data(); |
||||
break; |
||||
case STATUS_R_IN_WR : |
||||
os_printf("SR ERR in WRPR,Reg:%08x \n",e->par); |
||||
break; |
||||
case STATUS_W: |
||||
os_printf("SW ERR,Reg:%08x\n",e->par); |
||||
break;
|
||||
case TR_DONE_ALONE: |
||||
os_printf("TD ALO ERR,Reg:%08x\n",e->par); |
||||
break;
|
||||
case WR_RD: |
||||
os_printf("WR&RD ERR,Reg:%08x\n",e->par); |
||||
break;
|
||||
case DATA_ERROR: |
||||
os_printf("Data ERR,Reg:%08x\n",e->par); |
||||
break; |
||||
case STATUS_R_IN_RD : |
||||
os_printf("SR ERR in RDPR,Reg:%08x\n",e->par); |
||||
break;
|
||||
default: |
||||
break; |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
spi_task_init(void) |
||||
{ |
||||
spiQueue = (os_event_t*)os_malloc(sizeof(os_event_t)*SPI_QUEUE_LEN); |
||||
system_os_task(spi_task,USER_TASK_PRIO_1,spiQueue,SPI_QUEUE_LEN); |
||||
} |
||||
|
||||
os_timer_t spi_timer_test; |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
spi_test_init() |
||||
{ |
||||
os_printf("spi init\n\r"); |
||||
spi_slave_init(HSPI); |
||||
os_printf("gpio init\n\r"); |
||||
gpio_init(); |
||||
os_printf("spi task init \n\r"); |
||||
spi_task_init(); |
||||
#ifdef SPI_MISO |
||||
os_printf("spi miso init\n\r"); |
||||
set_miso_data(); |
||||
#endif |
||||
|
||||
//os_timer_disarm(&spi_timer_test);
|
||||
//os_timer_setfn(&spi_timer_test, (os_timer_func_t *)set_miso_data, NULL);//wjl
|
||||
//os_timer_arm(&spi_timer_test,50,1);
|
||||
} |
||||
|
||||
#endif |
||||
|
||||
|
@ -1,398 +0,0 @@ |
||||
#include "driver/spi_overlap.h" |
||||
#include "driver/spi.h" |
||||
#include "gpio.h" |
||||
|
||||
#define SPI_FLASH_READ_MODE_MASK 0x196000 |
||||
#define WAIT_HSPI_IDLE() while(READ_PERI_REG(SPI_EXT2(HSPI))||(READ_PERI_REG(SPI_CMD(HSPI))&0xfffc0000)); |
||||
#define CONF_HSPI_CLK_DIV(div) WRITE_PERI_REG(SPI_CLOCK(HSPI), (((div<<1)+1)<<12)+(div<<6)+(div<<1)+1) |
||||
#define HSPI_FALLING_EDGE_SAMPLE() SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE) |
||||
#define HSPI_RISING_EDGE_SAMPLE() CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE) |
||||
#define ACTIVE_HSPI_CS0 CLEAR_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS0_DIS);\ |
||||
SET_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS1_DIS |SPI_CS2_DIS) |
||||
#define ACTIVE_HSPI_CS1 CLEAR_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS1_DIS);\ |
||||
SET_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS0_DIS |SPI_CS2_DIS) |
||||
#define ACTIVE_HSPI_CS2 CLEAR_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS2_DIS);\ |
||||
SET_PERI_REG_MASK(SPI_PIN(HSPI), SPI_CS0_DIS |SPI_CS1_DIS) |
||||
#define ENABLE_HSPI_DEV_CS() PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2) |
||||
#define DISABLE_HSPI_DEV_CS() GPIO_OUTPUT_SET(15, 1);\ |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_GPIO15) |
||||
struct hspi_device_register hspi_dev_reg; |
||||
/******************************************************************************
|
||||
* FunctionName : hspi_overlap_init |
||||
* Description : enable hspi and spi module overlap mode |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
hspi_overlap_init(void) |
||||
{ |
||||
//hspi overlap to spi, two spi masters on cspi
|
||||
SET_PERI_REG_MASK(HOST_INF_SEL, reg_cspi_overlap); |
||||
|
||||
//set higher priority for spi than hspi
|
||||
SET_PERI_REG_MASK(SPI_EXT3(SPI),0x1); |
||||
SET_PERI_REG_MASK(SPI_EXT3(HSPI),0x3); |
||||
SET_PERI_REG_MASK(SPI_USER(HSPI), BIT(5)); |
||||
} |
||||
/******************************************************************************
|
||||
* FunctionName : hspi_overlap_deinit |
||||
* Description : recover hspi and spi module from overlap mode |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
hspi_overlap_deinit(void) |
||||
{ |
||||
//hspi overlap to spi, two spi masters on cspi
|
||||
CLEAR_PERI_REG_MASK(HOST_INF_SEL, reg_cspi_overlap); |
||||
|
||||
//set higher priority for spi than hspi
|
||||
CLEAR_PERI_REG_MASK(SPI_EXT3(SPI),0x1); |
||||
CLEAR_PERI_REG_MASK(SPI_EXT3(HSPI),0x3); |
||||
CLEAR_PERI_REG_MASK(SPI_USER(HSPI), BIT(5)); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : spi_reg_backup |
||||
* Description : backup SPI normal operation register value and disable CPU cache to modify some flash registers. |
||||
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
spi_reg_backup(uint8 spi_no,uint32* backup_mem) |
||||
{ |
||||
if(spi_no>1) return; //handle invalid input number
|
||||
|
||||
backup_mem[PERIPHS_IO_MUX_BACKUP] =READ_PERI_REG(PERIPHS_IO_MUX); |
||||
backup_mem[SPI_USER_BACKUP] =READ_PERI_REG(SPI_USER(spi_no));
|
||||
backup_mem[SPI_CTRL_BACKUP] =READ_PERI_REG(SPI_CTRL(spi_no));
|
||||
backup_mem[SPI_CLOCK_BACKUP] =READ_PERI_REG(SPI_CLOCK(spi_no)); |
||||
backup_mem[SPI_USER1_BACKUP] =READ_PERI_REG(SPI_USER1(spi_no)); |
||||
backup_mem[SPI_USER2_BACKUP] =READ_PERI_REG(SPI_USER2(spi_no));
|
||||
backup_mem[SPI_CMD_BACKUP] =READ_PERI_REG(SPI_CMD(spi_no)); |
||||
backup_mem[SPI_PIN_BACKUP] =READ_PERI_REG(SPI_PIN(spi_no)); |
||||
backup_mem[SPI_SLAVE_BACKUP] =READ_PERI_REG(SPI_SLAVE(spi_no)); |
||||
} |
||||
/******************************************************************************
|
||||
* FunctionName : spi_reg_recover |
||||
* Description : recover SPI normal operation register value and enable CPU cache. |
||||
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
spi_reg_recover(uint8 spi_no,uint32* backup_mem) |
||||
{ |
||||
if(spi_no>1) return; //handle invalid input number
|
||||
|
||||
// WRITE_PERI_REG(PERIPHS_IO_MUX, backup_mem[PERIPHS_IO_MUX_BACKUP]);
|
||||
WRITE_PERI_REG(SPI_USER(spi_no), backup_mem[SPI_USER_BACKUP]);
|
||||
WRITE_PERI_REG(SPI_CTRL(spi_no), backup_mem[SPI_CTRL_BACKUP]);
|
||||
WRITE_PERI_REG(SPI_CLOCK(spi_no), backup_mem[SPI_CLOCK_BACKUP]);
|
||||
WRITE_PERI_REG(SPI_USER1(spi_no), backup_mem[SPI_USER1_BACKUP]);
|
||||
WRITE_PERI_REG(SPI_USER2(spi_no), backup_mem[SPI_USER2_BACKUP]);
|
||||
WRITE_PERI_REG(SPI_CMD(spi_no), backup_mem[SPI_CMD_BACKUP]);
|
||||
WRITE_PERI_REG(SPI_PIN(spi_no), backup_mem[SPI_PIN_BACKUP]);
|
||||
// WRITE_PERI_REG(SPI_SLAVE(spi_no), backup_mem[SPI_SLAVE_BACKUP]);
|
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR
|
||||
hspi_master_dev_init(uint8 dev_no,uint8 clk_polar,uint8 clk_div) |
||||
{ |
||||
uint32 regtemp; |
||||
if((dev_no>3)||(clk_polar>1)||(clk_div>0x1f)) |
||||
{ |
||||
os_printf("hspi_master_dev_init parameter is out of range!\n\r"); |
||||
return; |
||||
} |
||||
|
||||
WAIT_HSPI_IDLE(); |
||||
if(!hspi_dev_reg.hspi_reg_backup_flag){ |
||||
if(READ_PERI_REG(PERIPHS_IO_MUX)&BIT8){ |
||||
hspi_dev_reg.spi_io_80m=1; |
||||
SET_PERI_REG_MASK(SPI_CLOCK(HSPI),SPI_CLK_EQU_SYSCLK); |
||||
}else{ |
||||
hspi_dev_reg.spi_io_80m=0; |
||||
CLEAR_PERI_REG_MASK(SPI_CLOCK(HSPI),SPI_CLK_EQU_SYSCLK); |
||||
} |
||||
|
||||
regtemp=READ_PERI_REG(SPI_CTRL(SPI))&SPI_FLASH_READ_MODE_MASK; |
||||
CLEAR_PERI_REG_MASK(SPI_CTRL(HSPI), SPI_FLASH_READ_MODE_MASK); |
||||
SET_PERI_REG_MASK(SPI_CTRL(HSPI), regtemp); |
||||
spi_reg_backup(HSPI, hspi_dev_reg.hspi_flash_reg_backup); |
||||
|
||||
spi_master_init(HSPI); |
||||
spi_reg_backup(HSPI, hspi_dev_reg.hspi_dev_reg_backup); |
||||
|
||||
hspi_dev_reg.hspi_reg_backup_flag=1; |
||||
|
||||
// spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup);
|
||||
hspi_dev_reg.selected_dev_num=HSPI_IDLE; |
||||
} |
||||
|
||||
hspi_dev_reg.hspi_dev_conf[dev_no].active=1; |
||||
hspi_dev_reg.hspi_dev_conf[dev_no].clk_div=clk_div; |
||||
hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar=clk_polar; |
||||
|
||||
switch(dev_no){ |
||||
case HSPI_CS_DEV : |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2); |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2); |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2); |
||||
CLEAR_PERI_REG_MASK(PERIPHS_IO_MUX, BIT9); |
||||
break; |
||||
|
||||
case SPI_CS1_DEV :
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_SPI_CS1); |
||||
if(hspi_dev_reg.spi_io_80m){
|
||||
os_printf("SPI CS1 device must work at 80Mhz"); |
||||
} |
||||
break; |
||||
|
||||
case SPI_CS2_DEV :
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, FUNC_SPI_CS2); |
||||
if(hspi_dev_reg.spi_io_80m){
|
||||
os_printf("SPI CS2 device must work at 80Mhz"); |
||||
} |
||||
break; |
||||
|
||||
default: break; |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
hspi_dev_sel(uint8 dev_no) |
||||
{ |
||||
uint32 regval; |
||||
|
||||
if(dev_no>3){ |
||||
os_printf("hspi_dev_sel parameter is out of range!\n\r"); |
||||
return; |
||||
} |
||||
|
||||
if(!hspi_dev_reg.hspi_dev_conf[dev_no].active){ |
||||
os_printf("device%d has not been initialized!\n\r",dev_no); |
||||
return; |
||||
} |
||||
|
||||
switch(hspi_dev_reg.selected_dev_num){ |
||||
case HSPI_CS_DEV: |
||||
if((dev_no==SPI_CS1_DEV)||(dev_no==SPI_CS2_DEV)){ |
||||
WAIT_HSPI_IDLE(); |
||||
DISABLE_HSPI_DEV_CS(); |
||||
hspi_overlap_init(); |
||||
|
||||
if(hspi_dev_reg.spi_io_80m) {SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK);} |
||||
else {CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div);} |
||||
|
||||
if(hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) {HSPI_FALLING_EDGE_SAMPLE();} |
||||
else {HSPI_RISING_EDGE_SAMPLE();} |
||||
|
||||
if(dev_no==SPI_CS1_DEV) {ACTIVE_HSPI_CS1;} |
||||
else {ACTIVE_HSPI_CS2;} |
||||
} |
||||
else if(dev_no==SPI_CS0_FLASH){ |
||||
WAIT_HSPI_IDLE(); |
||||
DISABLE_HSPI_DEV_CS(); |
||||
hspi_overlap_init(); |
||||
spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup); |
||||
|
||||
if(hspi_dev_reg.spi_io_80m) {SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK);} |
||||
|
||||
HSPI_RISING_EDGE_SAMPLE(); |
||||
ACTIVE_HSPI_CS0 ; |
||||
} |
||||
break; |
||||
|
||||
case SPI_CS1_DEV: |
||||
if(dev_no==SPI_CS2_DEV){ |
||||
WAIT_HSPI_IDLE(); |
||||
if(!hspi_dev_reg.spi_io_80m) {CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div);} |
||||
|
||||
if(hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) {HSPI_FALLING_EDGE_SAMPLE();} |
||||
else {HSPI_RISING_EDGE_SAMPLE();} |
||||
ACTIVE_HSPI_CS2;
|
||||
} |
||||
else if(dev_no==SPI_CS0_FLASH){ |
||||
WAIT_HSPI_IDLE(); |
||||
spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup); |
||||
HSPI_RISING_EDGE_SAMPLE(); |
||||
ACTIVE_HSPI_CS0; |
||||
} |
||||
else if(dev_no==HSPI_CS_DEV){ |
||||
WAIT_HSPI_IDLE(); |
||||
ENABLE_HSPI_DEV_CS(); |
||||
hspi_overlap_deinit(); |
||||
CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); |
||||
|
||||
if(hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) {HSPI_FALLING_EDGE_SAMPLE();} |
||||
else {HSPI_RISING_EDGE_SAMPLE();} |
||||
|
||||
ACTIVE_HSPI_CS0; |
||||
} |
||||
break; |
||||
|
||||
case SPI_CS2_DEV: |
||||
if(dev_no==SPI_CS1_DEV){ |
||||
WAIT_HSPI_IDLE(); |
||||
if(!hspi_dev_reg.spi_io_80m) {CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div);} |
||||
|
||||
if(hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) {HSPI_FALLING_EDGE_SAMPLE();} |
||||
else {HSPI_RISING_EDGE_SAMPLE();} |
||||
|
||||
ACTIVE_HSPI_CS1; |
||||
} |
||||
else if(dev_no==SPI_CS0_FLASH){ |
||||
WAIT_HSPI_IDLE(); |
||||
spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup); |
||||
HSPI_RISING_EDGE_SAMPLE(); |
||||
ACTIVE_HSPI_CS0; |
||||
} |
||||
else if(dev_no==HSPI_CS_DEV){ |
||||
WAIT_HSPI_IDLE(); |
||||
ENABLE_HSPI_DEV_CS(); |
||||
hspi_overlap_deinit(); |
||||
CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); |
||||
|
||||
if(hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) {HSPI_FALLING_EDGE_SAMPLE();} |
||||
else {HSPI_RISING_EDGE_SAMPLE();} |
||||
|
||||
ACTIVE_HSPI_CS0; |
||||
} |
||||
break; |
||||
|
||||
case SPI_CS0_FLASH: |
||||
if((dev_no==SPI_CS1_DEV)||(dev_no==SPI_CS2_DEV)){ |
||||
WAIT_HSPI_IDLE(); |
||||
spi_reg_recover(HSPI, hspi_dev_reg.hspi_dev_reg_backup); |
||||
|
||||
if(hspi_dev_reg.spi_io_80m) {SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK);} |
||||
else {CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div);} |
||||
|
||||
if(hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) {HSPI_FALLING_EDGE_SAMPLE();} |
||||
else {HSPI_RISING_EDGE_SAMPLE();} |
||||
|
||||
if(dev_no==SPI_CS1_DEV) {ACTIVE_HSPI_CS1;} |
||||
else {ACTIVE_HSPI_CS2;}
|
||||
} |
||||
else if(dev_no==HSPI_CS_DEV){ |
||||
WAIT_HSPI_IDLE(); |
||||
ENABLE_HSPI_DEV_CS(); |
||||
hspi_overlap_deinit(); |
||||
spi_reg_recover(HSPI, hspi_dev_reg.hspi_dev_reg_backup); |
||||
CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); |
||||
|
||||
if(hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) {HSPI_FALLING_EDGE_SAMPLE();} |
||||
else {HSPI_RISING_EDGE_SAMPLE();} |
||||
|
||||
ACTIVE_HSPI_CS0; |
||||
} |
||||
break; |
||||
|
||||
default:
|
||||
if((dev_no==SPI_CS1_DEV)||(dev_no==SPI_CS2_DEV)){ |
||||
WAIT_HSPI_IDLE(); |
||||
DISABLE_HSPI_DEV_CS(); |
||||
hspi_overlap_init(); |
||||
spi_reg_recover(HSPI, hspi_dev_reg.hspi_dev_reg_backup); |
||||
|
||||
if(hspi_dev_reg.spi_io_80m) {SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK);} |
||||
else {CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div);} |
||||
|
||||
if(hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) {HSPI_FALLING_EDGE_SAMPLE();} |
||||
else {HSPI_RISING_EDGE_SAMPLE();} |
||||
|
||||
if(dev_no==SPI_CS1_DEV) {ACTIVE_HSPI_CS1;} |
||||
else {ACTIVE_HSPI_CS2;} |
||||
} |
||||
else if(dev_no==SPI_CS0_FLASH){ |
||||
WAIT_HSPI_IDLE(); |
||||
DISABLE_HSPI_DEV_CS(); |
||||
hspi_overlap_init(); |
||||
spi_reg_recover(HSPI, hspi_dev_reg.hspi_flash_reg_backup); |
||||
|
||||
if(hspi_dev_reg.spi_io_80m) {SET_PERI_REG_MASK(SPI_CLOCK(HSPI), SPI_CLK_EQU_SYSCLK);} |
||||
|
||||
HSPI_RISING_EDGE_SAMPLE(); |
||||
ACTIVE_HSPI_CS0 ; |
||||
}
|
||||
else if(dev_no==HSPI_CS_DEV){ |
||||
WAIT_HSPI_IDLE(); |
||||
ENABLE_HSPI_DEV_CS(); |
||||
hspi_overlap_deinit(); |
||||
spi_reg_recover(HSPI, hspi_dev_reg.hspi_dev_reg_backup); |
||||
CONF_HSPI_CLK_DIV(hspi_dev_reg.hspi_dev_conf[dev_no].clk_div); |
||||
|
||||
if(hspi_dev_reg.hspi_dev_conf[dev_no].clk_polar) {HSPI_FALLING_EDGE_SAMPLE();} |
||||
else {HSPI_RISING_EDGE_SAMPLE();} |
||||
|
||||
ACTIVE_HSPI_CS0; |
||||
} |
||||
break; |
||||
} |
||||
hspi_dev_reg.selected_dev_num=dev_no; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : spi_read_data |
||||
* Description : use hspi to read flash data for stability test |
||||
* Parameters : SpiFlashChip * spi-- flash parameter structure pointer |
||||
* uint32 flash_addr--flash start address |
||||
* uint32 * addr_dest--start address for preped destination memory space |
||||
* uint32 byte_length--length of the data which needs to be read from flash |
||||
*******************************************************************************/ |
||||
SpiFlashOpResult ICACHE_FLASH_ATTR |
||||
hspi_overlap_read_flash_data(SpiFlashChip * spi, uint32 flash_addr, uint32 * addr_dest, uint32 byte_length) |
||||
{ |
||||
uint32 temp_addr,reg_tmp; |
||||
sint32 temp_length; |
||||
uint8 i; |
||||
uint8 remain_word_num;
|
||||
|
||||
hspi_dev_sel(SPI_CS0_FLASH); |
||||
|
||||
//address range check
|
||||
if ((flash_addr+byte_length) > (spi->chip_size)) |
||||
{ |
||||
return SPI_FLASH_RESULT_ERR; |
||||
} |
||||
|
||||
temp_addr = flash_addr; |
||||
temp_length = byte_length; |
||||
|
||||
while(temp_length > 0) |
||||
{ |
||||
if(temp_length >= SPI_BUFF_BYTE_NUM) |
||||
{ |
||||
// reg_tmp=((temp_addr&0xff)<<16)|(temp_addr&0xff00)|((temp_addr&0xff0000)>>16)|(SPI_BUFF_BYTE_NUM << SPI_FLASH_BYTES_LEN);
|
||||
reg_tmp= temp_addr |(SPI_BUFF_BYTE_NUM<< SPI_FLASH_BYTES_LEN) ; |
||||
WRITE_PERI_REG(SPI_ADDR(HSPI), reg_tmp); |
||||
WRITE_PERI_REG(SPI_CMD(HSPI), SPI_FLASH_READ); |
||||
while(READ_PERI_REG(SPI_CMD(HSPI)) != 0); |
||||
|
||||
for(i=0; i<(SPI_BUFF_BYTE_NUM>>2);i++) |
||||
{
|
||||
*addr_dest++ = READ_PERI_REG(SPI_W0(HSPI)+i*4); |
||||
} |
||||
temp_length = temp_length - SPI_BUFF_BYTE_NUM; |
||||
temp_addr = temp_addr + SPI_BUFF_BYTE_NUM; |
||||
} |
||||
else |
||||
{ |
||||
WRITE_PERI_REG(SPI_ADDR(HSPI), temp_addr |(temp_length << SPI_FLASH_BYTES_LEN )); |
||||
WRITE_PERI_REG(SPI_CMD(HSPI), SPI_FLASH_READ); |
||||
while(READ_PERI_REG(SPI_CMD(HSPI)) != 0); |
||||
|
||||
remain_word_num = (0== (temp_length&0x3))? (temp_length>>2) : (temp_length>>2)+1; |
||||
for (i=0; i<remain_word_num; i++)
|
||||
{ |
||||
*addr_dest++ = READ_PERI_REG(SPI_W0(HSPI)+i*4); |
||||
}
|
||||
temp_length = 0; |
||||
} |
||||
} |
||||
|
||||
return SPI_FLASH_RESULT_OK; |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
hspi_overlap_flash_init(void) |
||||
{ |
||||
hspi_master_dev_init(SPI_CS0_FLASH,0,0); |
||||
|
||||
spi_flash_set_read_func(hspi_overlap_read_flash_data); |
||||
} |
@ -1,788 +0,0 @@ |
||||
/*
|
||||
* File : uart.c |
||||
* Copyright (C) 2013 - 2016, Espressif Systems |
||||
* |
||||
* This program is free software: you can redistribute it and/or modify |
||||
* it under the terms of version 3 of the GNU General Public License as |
||||
* published by the Free Software Foundation. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License along |
||||
* with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/ |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "driver/uart.h" |
||||
#include "osapi.h" |
||||
#include "driver/uart_register.h" |
||||
#include "mem.h" |
||||
#include "os_type.h" |
||||
|
||||
// UartDev is defined and initialized in rom code.
|
||||
extern UartDevice UartDev; |
||||
|
||||
LOCAL struct UartBuffer* pTxBuffer = NULL; |
||||
LOCAL struct UartBuffer* pRxBuffer = NULL; |
||||
|
||||
/*uart demo with a system task, to output what uart receives*/ |
||||
/*this is a example to process uart data from task,please change the priority to fit your application task if exists*/ |
||||
/*it might conflict with your task, if so,please arrange the priority of different task, or combine it to a different event in the same task. */ |
||||
#define uart_recvTaskPrio 0 |
||||
#define uart_recvTaskQueueLen 10 |
||||
os_event_t uart_recvTaskQueue[uart_recvTaskQueueLen]; |
||||
|
||||
#define DBG |
||||
#define DBG1 uart1_sendStr_no_wait |
||||
#define DBG2 os_printf |
||||
|
||||
|
||||
LOCAL void uart0_rx_intr_handler(void *para); |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart_config |
||||
* Description : Internal used function |
||||
* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled |
||||
* UART1 just used for debug output |
||||
* Parameters : uart_no, use UART0 or UART1 defined ahead |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
uart_config(uint8 uart_no) |
||||
{ |
||||
if (uart_no == UART1){ |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); |
||||
}else{ |
||||
/* rcv_buff size if 0x100 */ |
||||
ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff)); |
||||
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); |
||||
#if UART_HW_RTS |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS); //HW FLOW CONTROL RTS PIN
|
||||
#endif |
||||
#if UART_HW_CTS |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_U0CTS); //HW FLOW CONTROL CTS PIN
|
||||
#endif |
||||
} |
||||
uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));//SET BAUDRATE
|
||||
|
||||
WRITE_PERI_REG(UART_CONF0(uart_no), ((UartDev.exist_parity & UART_PARITY_EN_M) << UART_PARITY_EN_S) //SET BIT AND PARITY MODE
|
||||
| ((UartDev.parity & UART_PARITY_M) <<UART_PARITY_S ) |
||||
| ((UartDev.stop_bits & UART_STOP_BIT_NUM) << UART_STOP_BIT_NUM_S) |
||||
| ((UartDev.data_bits & UART_BIT_NUM) << UART_BIT_NUM_S)); |
||||
|
||||
//clear rx and tx fifo,not ready
|
||||
SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); //RESET FIFO
|
||||
CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); |
||||
|
||||
if (uart_no == UART0){ |
||||
//set rx fifo trigger
|
||||
WRITE_PERI_REG(UART_CONF1(uart_no), |
||||
((100 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) | |
||||
#if UART_HW_RTS |
||||
((110 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) | |
||||
UART_RX_FLOW_EN | //enbale rx flow control
|
||||
#endif |
||||
(0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S | |
||||
UART_RX_TOUT_EN| |
||||
((0x10 & UART_TXFIFO_EMPTY_THRHD)<<UART_TXFIFO_EMPTY_THRHD_S));//wjl
|
||||
#if UART_HW_CTS |
||||
SET_PERI_REG_MASK( UART_CONF0(uart_no),UART_TX_FLOW_EN); //add this sentense to add a tx flow control via MTCK( CTS )
|
||||
#endif |
||||
SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA |UART_FRM_ERR_INT_ENA); |
||||
}else{ |
||||
WRITE_PERI_REG(UART_CONF1(uart_no),((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));//TrigLvl default val == 1
|
||||
} |
||||
//clear all interrupt
|
||||
WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff); |
||||
//enable rx_interrupt
|
||||
SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA|UART_RXFIFO_OVF_INT_ENA); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart1_tx_one_char |
||||
* Description : Internal used function |
||||
* Use uart1 interface to transfer one char |
||||
* Parameters : uint8 TxChar - character to tx |
||||
* Returns : OK |
||||
*******************************************************************************/ |
||||
STATUS uart_tx_one_char(uint8 uart, uint8 TxChar) |
||||
{ |
||||
while (true){ |
||||
uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S); |
||||
if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { |
||||
break; |
||||
} |
||||
} |
||||
WRITE_PERI_REG(UART_FIFO(uart) , TxChar); |
||||
return OK; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart1_write_char |
||||
* Description : Internal used function |
||||
* Do some special deal while tx char is '\r' or '\n' |
||||
* Parameters : char c - character to tx |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
uart1_write_char(char c) |
||||
{ |
||||
if (c == '\n'){ |
||||
uart_tx_one_char(UART1, '\r'); |
||||
uart_tx_one_char(UART1, '\n'); |
||||
}else if (c == '\r'){ |
||||
|
||||
}else{ |
||||
uart_tx_one_char(UART1, c); |
||||
} |
||||
} |
||||
|
||||
//os_printf output to fifo or to the tx buffer
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
uart0_write_char_no_wait(char c) |
||||
{ |
||||
#if UART_BUFF_EN //send to uart0 fifo but do not wait
|
||||
uint8 chr; |
||||
if (c == '\n'){ |
||||
chr = '\r'; |
||||
tx_buff_enq(&chr, 1); |
||||
chr = '\n'; |
||||
tx_buff_enq(&chr, 1); |
||||
}else if (c == '\r'){ |
||||
|
||||
}else{ |
||||
tx_buff_enq(&c,1); |
||||
} |
||||
#else //send to uart tx buffer
|
||||
if (c == '\n'){ |
||||
uart_tx_one_char_no_wait(UART0, '\r'); |
||||
uart_tx_one_char_no_wait(UART0, '\n'); |
||||
}else if (c == '\r'){ |
||||
|
||||
} |
||||
else{ |
||||
uart_tx_one_char_no_wait(UART0, c); |
||||
} |
||||
#endif |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart0_tx_buffer |
||||
* Description : use uart0 to transfer buffer |
||||
* Parameters : uint8 *buf - point to send buffer |
||||
* uint16 len - buffer len |
||||
* Returns : |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
uart0_tx_buffer(uint8 *buf, uint16 len) |
||||
{ |
||||
uint16 i; |
||||
for (i = 0; i < len; i++) |
||||
{ |
||||
uart_tx_one_char(UART0, buf[i]); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart0_sendStr |
||||
* Description : use uart0 to transfer buffer |
||||
* Parameters : uint8 *buf - point to send buffer |
||||
* uint16 len - buffer len |
||||
* Returns : |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
uart0_sendStr(const char *str) |
||||
{ |
||||
while(*str){ |
||||
uart_tx_one_char(UART0, *str++); |
||||
} |
||||
} |
||||
void at_port_print(const char *str) __attribute__((alias("uart0_sendStr"))); |
||||
/******************************************************************************
|
||||
* FunctionName : uart0_rx_intr_handler |
||||
* Description : Internal used function |
||||
* UART0 interrupt handler, add self handle code inside |
||||
* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
LOCAL void |
||||
uart0_rx_intr_handler(void *para) |
||||
{ |
||||
/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
|
||||
* uart1 and uart0 respectively |
||||
*/ |
||||
uint8 RcvChar; |
||||
uint8 uart_no = UART0;//UartDev.buff_uart_no;
|
||||
uint8 fifo_len = 0; |
||||
uint8 buf_idx = 0; |
||||
uint8 temp,cnt; |
||||
//RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
|
||||
|
||||
/*ATTENTION:*/ |
||||
/*IN NON-OS VERSION SDK, DO NOT USE "ICACHE_FLASH_ATTR" FUNCTIONS IN THE WHOLE HANDLER PROCESS*/ |
||||
/*ALL THE FUNCTIONS CALLED IN INTERRUPT HANDLER MUST BE DECLARED IN RAM */ |
||||
/*IF NOT , POST AN EVENT AND PROCESS IN SYSTEM TASK */ |
||||
if(UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)){ |
||||
DBG1("FRM_ERR\r\n"); |
||||
WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR); |
||||
}else if(UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)){ |
||||
DBG("f"); |
||||
uart_rx_intr_disable(UART0); |
||||
WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR); |
||||
system_os_post(uart_recvTaskPrio, 0, 0); |
||||
}else if(UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)){ |
||||
DBG("t"); |
||||
uart_rx_intr_disable(UART0); |
||||
WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_TOUT_INT_CLR); |
||||
system_os_post(uart_recvTaskPrio, 0, 0); |
||||
}else if(UART_TXFIFO_EMPTY_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_TXFIFO_EMPTY_INT_ST)){ |
||||
DBG("e"); |
||||
/* to output uart data from uart buffer directly in empty interrupt handler*/ |
||||
/*instead of processing in system event, in order not to wait for current task/function to quit */ |
||||
/*ATTENTION:*/ |
||||
/*IN NON-OS VERSION SDK, DO NOT USE "ICACHE_FLASH_ATTR" FUNCTIONS IN THE WHOLE HANDLER PROCESS*/ |
||||
/*ALL THE FUNCTIONS CALLED IN INTERRUPT HANDLER MUST BE DECLARED IN RAM */ |
||||
CLEAR_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); |
||||
#if UART_BUFF_EN |
||||
tx_start_uart_buffer(UART0); |
||||
#endif |
||||
//system_os_post(uart_recvTaskPrio, 1, 0);
|
||||
WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_TXFIFO_EMPTY_INT_CLR); |
||||
|
||||
}else if(UART_RXFIFO_OVF_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_OVF_INT_ST)){ |
||||
WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_OVF_INT_CLR); |
||||
DBG1("RX OVF!!\r\n"); |
||||
} |
||||
|
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart_init |
||||
* Description : user interface for init uart |
||||
* Parameters : UartBautRate uart0_br - uart0 bautrate |
||||
* UartBautRate uart1_br - uart1 bautrate |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
#if UART_SELFTEST&UART_BUFF_EN |
||||
os_timer_t buff_timer_t; |
||||
void ICACHE_FLASH_ATTR |
||||
uart_test_rx() |
||||
{ |
||||
uint8 uart_buf[128]={0}; |
||||
uint16 len = 0; |
||||
len = rx_buff_deq(uart_buf, 128 ); |
||||
tx_buff_enq(uart_buf,len); |
||||
} |
||||
#endif |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR ///////
|
||||
uart_recvTask(os_event_t *events) |
||||
{ |
||||
if(events->sig == 0){ |
||||
#if UART_BUFF_EN |
||||
Uart_rx_buff_enq(); |
||||
#else |
||||
uint8 fifo_len = (READ_PERI_REG(UART_STATUS(UART0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT; |
||||
uint8 d_tmp = 0; |
||||
uint8 idx=0; |
||||
for(idx=0;idx<fifo_len;idx++) { |
||||
d_tmp = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF; |
||||
uart_tx_one_char(UART0, d_tmp); |
||||
} |
||||
WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR); |
||||
uart_rx_intr_enable(UART0); |
||||
#endif |
||||
}else if(events->sig == 1){ |
||||
#if UART_BUFF_EN |
||||
//already move uart buffer output to uart empty interrupt
|
||||
//tx_start_uart_buffer(UART0);
|
||||
#else |
||||
|
||||
#endif |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
uart_init(UartBautRate uart0_br, UartBautRate uart1_br) |
||||
{ |
||||
/*this is a example to process uart data from task,please change the priority to fit your application task if exists*/ |
||||
system_os_task(uart_recvTask, uart_recvTaskPrio, uart_recvTaskQueue, uart_recvTaskQueueLen); //demo with a task to process the uart data
|
||||
|
||||
UartDev.baut_rate = uart0_br; |
||||
uart_config(UART0); |
||||
UartDev.baut_rate = uart1_br; |
||||
uart_config(UART1); |
||||
ETS_UART_INTR_ENABLE(); |
||||
|
||||
#if UART_BUFF_EN |
||||
pTxBuffer = Uart_Buf_Init(UART_TX_BUFFER_SIZE); |
||||
pRxBuffer = Uart_Buf_Init(UART_RX_BUFFER_SIZE); |
||||
#endif |
||||
|
||||
|
||||
/*option 1: use default print, output from uart0 , will wait some time if fifo is full */ |
||||
//do nothing...
|
||||
|
||||
/*option 2: output from uart1,uart1 output will not wait , just for output debug info */ |
||||
/*os_printf output uart data via uart1(GPIO2)*/ |
||||
//os_install_putc1((void *)uart1_write_char); //use this one to output debug information via uart1 //
|
||||
|
||||
/*option 3: output from uart0 will skip current byte if fifo is full now... */ |
||||
/*see uart0_write_char_no_wait:you can output via a buffer or output directly */ |
||||
/*os_printf output uart data via uart0 or uart buffer*/ |
||||
//os_install_putc1((void *)uart0_write_char_no_wait); //use this to print via uart0
|
||||
|
||||
#if UART_SELFTEST&UART_BUFF_EN |
||||
os_timer_disarm(&buff_timer_t); |
||||
os_timer_setfn(&buff_timer_t, uart_test_rx , NULL); //a demo to process the data in uart rx buffer
|
||||
os_timer_arm(&buff_timer_t,10,1); |
||||
#endif |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
uart_reattach() |
||||
{ |
||||
uart_init(BIT_RATE_115200, BIT_RATE_115200); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart_tx_one_char_no_wait |
||||
* Description : uart tx a single char without waiting for fifo
|
||||
* Parameters : uint8 uart - uart port |
||||
* uint8 TxChar - char to tx |
||||
* Returns : STATUS |
||||
*******************************************************************************/ |
||||
STATUS uart_tx_one_char_no_wait(uint8 uart, uint8 TxChar) |
||||
{ |
||||
uint8 fifo_cnt = (( READ_PERI_REG(UART_STATUS(uart))>>UART_TXFIFO_CNT_S)& UART_TXFIFO_CNT); |
||||
if (fifo_cnt < 126) { |
||||
WRITE_PERI_REG(UART_FIFO(uart) , TxChar); |
||||
} |
||||
return OK; |
||||
} |
||||
|
||||
STATUS uart0_tx_one_char_no_wait(uint8 TxChar) |
||||
{ |
||||
uint8 fifo_cnt = (( READ_PERI_REG(UART_STATUS(UART0))>>UART_TXFIFO_CNT_S)& UART_TXFIFO_CNT); |
||||
if (fifo_cnt < 126) { |
||||
WRITE_PERI_REG(UART_FIFO(UART0) , TxChar); |
||||
} |
||||
return OK; |
||||
} |
||||
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart1_sendStr_no_wait |
||||
* Description : uart tx a string without waiting for every char, used for print debug info which can be lost |
||||
* Parameters : const char *str - string to be sent |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void uart1_sendStr_no_wait(const char *str) |
||||
{ |
||||
while(*str){ |
||||
uart_tx_one_char_no_wait(UART1, *str++); |
||||
} |
||||
} |
||||
|
||||
|
||||
#if UART_BUFF_EN |
||||
/******************************************************************************
|
||||
* FunctionName : Uart_Buf_Init |
||||
* Description : tx buffer enqueue: fill a first linked buffer
|
||||
* Parameters : char *pdata - data point to be enqueue |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
struct UartBuffer* ICACHE_FLASH_ATTR |
||||
Uart_Buf_Init(uint32 buf_size) |
||||
{ |
||||
uint32 heap_size = system_get_free_heap_size(); |
||||
if(heap_size <=buf_size){ |
||||
DBG1("no buf for uart\n\r"); |
||||
return NULL; |
||||
}else{ |
||||
DBG("test heap size: %d\n\r",heap_size); |
||||
struct UartBuffer* pBuff = (struct UartBuffer* )os_malloc(sizeof(struct UartBuffer)); |
||||
pBuff->UartBuffSize = buf_size; |
||||
pBuff->pUartBuff = (uint8*)os_malloc(pBuff->UartBuffSize); |
||||
pBuff->pInPos = pBuff->pUartBuff; |
||||
pBuff->pOutPos = pBuff->pUartBuff; |
||||
pBuff->Space = pBuff->UartBuffSize; |
||||
pBuff->BuffState = OK; |
||||
pBuff->nextBuff = NULL; |
||||
pBuff->TcpControl = RUN; |
||||
return pBuff; |
||||
} |
||||
} |
||||
|
||||
|
||||
//copy uart buffer
|
||||
LOCAL void Uart_Buf_Cpy(struct UartBuffer* pCur, char* pdata , uint16 data_len) |
||||
{ |
||||
if(data_len == 0) return ; |
||||
|
||||
uint16 tail_len = pCur->pUartBuff + pCur->UartBuffSize - pCur->pInPos ; |
||||
if(tail_len >= data_len){ //do not need to loop back the queue
|
||||
os_memcpy(pCur->pInPos , pdata , data_len ); |
||||
pCur->pInPos += ( data_len ); |
||||
pCur->pInPos = (pCur->pUartBuff + (pCur->pInPos - pCur->pUartBuff) % pCur->UartBuffSize ); |
||||
pCur->Space -=data_len; |
||||
}else{ |
||||
os_memcpy(pCur->pInPos, pdata, tail_len); |
||||
pCur->pInPos += ( tail_len ); |
||||
pCur->pInPos = (pCur->pUartBuff + (pCur->pInPos - pCur->pUartBuff) % pCur->UartBuffSize ); |
||||
pCur->Space -=tail_len; |
||||
os_memcpy(pCur->pInPos, pdata+tail_len , data_len-tail_len); |
||||
pCur->pInPos += ( data_len-tail_len ); |
||||
pCur->pInPos = (pCur->pUartBuff + (pCur->pInPos - pCur->pUartBuff) % pCur->UartBuffSize ); |
||||
pCur->Space -=( data_len-tail_len); |
||||
} |
||||
|
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart_buf_free |
||||
* Description : deinit of the tx buffer |
||||
* Parameters : struct UartBuffer* pTxBuff - tx buffer struct pointer |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
uart_buf_free(struct UartBuffer* pBuff) |
||||
{ |
||||
os_free(pBuff->pUartBuff); |
||||
os_free(pBuff); |
||||
} |
||||
|
||||
|
||||
//rx buffer dequeue
|
||||
uint16 ICACHE_FLASH_ATTR |
||||
rx_buff_deq(char* pdata, uint16 data_len ) |
||||
{ |
||||
uint16 buf_len = (pRxBuffer->UartBuffSize- pRxBuffer->Space); |
||||
uint16 tail_len = pRxBuffer->pUartBuff + pRxBuffer->UartBuffSize - pRxBuffer->pOutPos ; |
||||
uint16 len_tmp = 0; |
||||
len_tmp = ((data_len > buf_len)?buf_len:data_len); |
||||
if(pRxBuffer->pOutPos <= pRxBuffer->pInPos){ |
||||
os_memcpy(pdata, pRxBuffer->pOutPos,len_tmp); |
||||
pRxBuffer->pOutPos+= len_tmp; |
||||
pRxBuffer->Space += len_tmp; |
||||
}else{ |
||||
if(len_tmp>tail_len){ |
||||
os_memcpy(pdata, pRxBuffer->pOutPos, tail_len); |
||||
pRxBuffer->pOutPos += tail_len; |
||||
pRxBuffer->pOutPos = (pRxBuffer->pUartBuff + (pRxBuffer->pOutPos- pRxBuffer->pUartBuff) % pRxBuffer->UartBuffSize ); |
||||
pRxBuffer->Space += tail_len; |
||||
|
||||
os_memcpy(pdata+tail_len , pRxBuffer->pOutPos, len_tmp-tail_len); |
||||
pRxBuffer->pOutPos+= ( len_tmp-tail_len ); |
||||
pRxBuffer->pOutPos= (pRxBuffer->pUartBuff + (pRxBuffer->pOutPos- pRxBuffer->pUartBuff) % pRxBuffer->UartBuffSize ); |
||||
pRxBuffer->Space +=( len_tmp-tail_len);
|
||||
}else{ |
||||
//os_printf("case 3 in rx deq\n\r");
|
||||
os_memcpy(pdata, pRxBuffer->pOutPos, len_tmp); |
||||
pRxBuffer->pOutPos += len_tmp; |
||||
pRxBuffer->pOutPos = (pRxBuffer->pUartBuff + (pRxBuffer->pOutPos- pRxBuffer->pUartBuff) % pRxBuffer->UartBuffSize ); |
||||
pRxBuffer->Space += len_tmp; |
||||
} |
||||
} |
||||
if(pRxBuffer->Space >= UART_FIFO_LEN){ |
||||
uart_rx_intr_enable(UART0); |
||||
} |
||||
return len_tmp;
|
||||
} |
||||
|
||||
|
||||
//move data from uart fifo to rx buffer
|
||||
void Uart_rx_buff_enq() |
||||
{ |
||||
uint8 fifo_len,buf_idx; |
||||
uint8 fifo_data; |
||||
#if 1 |
||||
fifo_len = (READ_PERI_REG(UART_STATUS(UART0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT; |
||||
if(fifo_len >= pRxBuffer->Space){ |
||||
os_printf("buf full!!!\n\r");
|
||||
}else{ |
||||
buf_idx=0; |
||||
while(buf_idx < fifo_len){ |
||||
buf_idx++; |
||||
fifo_data = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF; |
||||
*(pRxBuffer->pInPos++) = fifo_data; |
||||
if(pRxBuffer->pInPos == (pRxBuffer->pUartBuff + pRxBuffer->UartBuffSize)){ |
||||
pRxBuffer->pInPos = pRxBuffer->pUartBuff; |
||||
}
|
||||
} |
||||
pRxBuffer->Space -= fifo_len ; |
||||
if(pRxBuffer->Space >= UART_FIFO_LEN){ |
||||
//os_printf("after rx enq buf enough\n\r");
|
||||
uart_rx_intr_enable(UART0); |
||||
} |
||||
} |
||||
#endif |
||||
} |
||||
|
||||
|
||||
//fill the uart tx buffer
|
||||
void ICACHE_FLASH_ATTR |
||||
tx_buff_enq(char* pdata, uint16 data_len ) |
||||
{ |
||||
CLEAR_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); |
||||
|
||||
if(pTxBuffer == NULL){ |
||||
DBG1("\n\rnull, create buffer struct\n\r"); |
||||
pTxBuffer = Uart_Buf_Init(UART_TX_BUFFER_SIZE); |
||||
if(pTxBuffer!= NULL){ |
||||
Uart_Buf_Cpy(pTxBuffer , pdata, data_len ); |
||||
}else{ |
||||
DBG1("uart tx MALLOC no buf \n\r"); |
||||
} |
||||
}else{ |
||||
if(data_len <= pTxBuffer->Space){ |
||||
Uart_Buf_Cpy(pTxBuffer , pdata, data_len); |
||||
}else{ |
||||
DBG1("UART TX BUF FULL!!!!\n\r"); |
||||
} |
||||
} |
||||
#if 0 |
||||
if(pTxBuffer->Space <= URAT_TX_LOWER_SIZE){ |
||||
set_tcp_block();
|
||||
} |
||||
#endif |
||||
SET_PERI_REG_MASK(UART_CONF1(UART0), (UART_TX_EMPTY_THRESH_VAL & UART_TXFIFO_EMPTY_THRHD)<<UART_TXFIFO_EMPTY_THRHD_S); |
||||
SET_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); |
||||
} |
||||
|
||||
|
||||
|
||||
//--------------------------------
|
||||
LOCAL void tx_fifo_insert(struct UartBuffer* pTxBuff, uint8 data_len, uint8 uart_no) |
||||
{ |
||||
uint8 i; |
||||
for(i = 0; i<data_len;i++){ |
||||
WRITE_PERI_REG(UART_FIFO(uart_no) , *(pTxBuff->pOutPos++)); |
||||
if(pTxBuff->pOutPos == (pTxBuff->pUartBuff + pTxBuff->UartBuffSize)){ |
||||
pTxBuff->pOutPos = pTxBuff->pUartBuff; |
||||
} |
||||
} |
||||
pTxBuff->pOutPos = (pTxBuff->pUartBuff + (pTxBuff->pOutPos - pTxBuff->pUartBuff) % pTxBuff->UartBuffSize ); |
||||
pTxBuff->Space += data_len; |
||||
} |
||||
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : tx_start_uart_buffer |
||||
* Description : get data from the tx buffer and fill the uart tx fifo, co-work with the uart fifo empty interrupt |
||||
* Parameters : uint8 uart_no - uart port num |
||||
* Returns : NONE |
||||
*******************************************************************************/ |
||||
void tx_start_uart_buffer(uint8 uart_no) |
||||
{ |
||||
uint8 tx_fifo_len = (READ_PERI_REG(UART_STATUS(uart_no))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT; |
||||
uint8 fifo_remain = UART_FIFO_LEN - tx_fifo_len ; |
||||
uint8 len_tmp; |
||||
uint16 tail_ptx_len,head_ptx_len,data_len; |
||||
//struct UartBuffer* pTxBuff = *get_buff_prt();
|
||||
|
||||
if(pTxBuffer){
|
||||
data_len = (pTxBuffer->UartBuffSize - pTxBuffer->Space); |
||||
if(data_len > fifo_remain){ |
||||
len_tmp = fifo_remain; |
||||
tx_fifo_insert( pTxBuffer,len_tmp,uart_no); |
||||
SET_PERI_REG_MASK(UART_INT_ENA(UART0), UART_TXFIFO_EMPTY_INT_ENA); |
||||
}else{ |
||||
len_tmp = data_len; |
||||
tx_fifo_insert( pTxBuffer,len_tmp,uart_no); |
||||
} |
||||
}else{ |
||||
DBG1("pTxBuff null \n\r"); |
||||
} |
||||
} |
||||
|
||||
#endif |
||||
|
||||
|
||||
void uart_rx_intr_disable(uint8 uart_no) |
||||
{ |
||||
#if 1 |
||||
CLEAR_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA|UART_RXFIFO_TOUT_INT_ENA); |
||||
#else |
||||
ETS_UART_INTR_DISABLE(); |
||||
#endif |
||||
} |
||||
|
||||
void uart_rx_intr_enable(uint8 uart_no) |
||||
{ |
||||
#if 1 |
||||
SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA|UART_RXFIFO_TOUT_INT_ENA); |
||||
#else |
||||
ETS_UART_INTR_ENABLE(); |
||||
#endif |
||||
} |
||||
|
||||
|
||||
//========================================================
|
||||
LOCAL void |
||||
uart0_write_char(char c) |
||||
{ |
||||
if (c == '\n') { |
||||
uart_tx_one_char(UART0, '\r'); |
||||
uart_tx_one_char(UART0, '\n'); |
||||
} else if (c == '\r') { |
||||
} else { |
||||
uart_tx_one_char(UART0, c); |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_SetWordLength(uint8 uart_no, UartBitsNum4Char len)
|
||||
{ |
||||
SET_PERI_REG_BITS(UART_CONF0(uart_no),UART_BIT_NUM,len,UART_BIT_NUM_S); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_SetStopBits(uint8 uart_no, UartStopBitsNum bit_num)
|
||||
{ |
||||
SET_PERI_REG_BITS(UART_CONF0(uart_no),UART_STOP_BIT_NUM,bit_num,UART_STOP_BIT_NUM_S); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_SetLineInverse(uint8 uart_no, UART_LineLevelInverse inverse_mask)
|
||||
{ |
||||
CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_LINE_INV_MASK); |
||||
SET_PERI_REG_MASK(UART_CONF0(uart_no), inverse_mask); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_SetParity(uint8 uart_no, UartParityMode Parity_mode)
|
||||
{ |
||||
CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_PARITY |UART_PARITY_EN); |
||||
if(Parity_mode==NONE_BITS){ |
||||
}else{ |
||||
SET_PERI_REG_MASK(UART_CONF0(uart_no), Parity_mode|UART_PARITY_EN); |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_SetBaudrate(uint8 uart_no,uint32 baud_rate) |
||||
{ |
||||
uart_div_modify(uart_no, UART_CLK_FREQ /baud_rate); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_SetFlowCtrl(uint8 uart_no,UART_HwFlowCtrl flow_ctrl,uint8 rx_thresh) |
||||
{ |
||||
if(flow_ctrl&USART_HardwareFlowControl_RTS){ |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS); |
||||
SET_PERI_REG_BITS(UART_CONF1(uart_no),UART_RX_FLOW_THRHD,rx_thresh,UART_RX_FLOW_THRHD_S); |
||||
SET_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN); |
||||
}else{ |
||||
CLEAR_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN); |
||||
} |
||||
if(flow_ctrl&USART_HardwareFlowControl_CTS){ |
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_UART0_CTS); |
||||
SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_TX_FLOW_EN); |
||||
}else{ |
||||
CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_TX_FLOW_EN); |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_WaitTxFifoEmpty(uint8 uart_no , uint32 time_out_us) //do not use if tx flow control enabled
|
||||
{ |
||||
uint32 t_s = system_get_time(); |
||||
while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S)){ |
||||
|
||||
if(( system_get_time() - t_s )> time_out_us){ |
||||
break; |
||||
} |
||||
WRITE_PERI_REG(0X60000914, 0X73);//WTD
|
||||
|
||||
} |
||||
} |
||||
|
||||
|
||||
bool ICACHE_FLASH_ATTR |
||||
UART_CheckOutputFinished(uint8 uart_no, uint32 time_out_us) |
||||
{ |
||||
uint32 t_start = system_get_time(); |
||||
uint8 tx_fifo_len; |
||||
uint32 tx_buff_len; |
||||
while(1){ |
||||
tx_fifo_len =( (READ_PERI_REG(UART_STATUS(uart_no))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT); |
||||
if(pTxBuffer){ |
||||
tx_buff_len = ((pTxBuffer->UartBuffSize)-(pTxBuffer->Space)); |
||||
}else{ |
||||
tx_buff_len = 0; |
||||
} |
||||
|
||||
if( tx_fifo_len==0 && tx_buff_len==0){ |
||||
return TRUE; |
||||
} |
||||
if( system_get_time() - t_start > time_out_us){ |
||||
return FALSE; |
||||
} |
||||
WRITE_PERI_REG(0X60000914, 0X73);//WTD
|
||||
}
|
||||
} |
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_ResetFifo(uint8 uart_no) |
||||
{ |
||||
SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); |
||||
CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_ClearIntrStatus(uint8 uart_no,uint32 clr_mask) |
||||
{ |
||||
WRITE_PERI_REG(UART_INT_CLR(uart_no), clr_mask); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_SetIntrEna(uint8 uart_no,uint32 ena_mask) |
||||
{ |
||||
SET_PERI_REG_MASK(UART_INT_ENA(uart_no), ena_mask); |
||||
} |
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
UART_SetPrintPort(uint8 uart_no) |
||||
{ |
||||
if(uart_no==1){ |
||||
os_install_putc1(uart1_write_char); |
||||
}else{ |
||||
/*option 1: do not wait if uart fifo is full,drop current character*/ |
||||
os_install_putc1(uart0_write_char_no_wait); |
||||
/*option 2: wait for a while if uart fifo is full*/ |
||||
os_install_putc1(uart0_write_char); |
||||
} |
||||
} |
||||
|
||||
|
||||
//========================================================
|
||||
|
||||
|
||||
/*test code*/ |
||||
void ICACHE_FLASH_ATTR |
||||
uart_init_2(UartBautRate uart0_br, UartBautRate uart1_br) |
||||
{ |
||||
// rom use 74880 baut_rate, here reinitialize
|
||||
UartDev.baut_rate = uart0_br; |
||||
UartDev.exist_parity = STICK_PARITY_EN; |
||||
UartDev.parity = EVEN_BITS; |
||||
UartDev.stop_bits = ONE_STOP_BIT; |
||||
UartDev.data_bits = EIGHT_BITS; |
||||
|
||||
uart_config(UART0); |
||||
UartDev.baut_rate = uart1_br; |
||||
uart_config(UART1); |
||||
ETS_UART_INTR_ENABLE(); |
||||
|
||||
// install uart1 putc callback
|
||||
os_install_putc1((void *)uart1_write_char);//print output at UART1
|
||||
} |
||||
|
||||
|
@ -1,9 +0,0 @@ |
||||
#ifndef __GPIO16_H__ |
||||
#define __GPIO16_H__ |
||||
|
||||
void gpio16_output_conf(void); |
||||
void gpio16_output_set(uint8 value); |
||||
void gpio16_input_conf(void); |
||||
uint8 gpio16_input_get(void); |
||||
|
||||
#endif |
@ -1,57 +0,0 @@ |
||||
#ifndef __I2C_MASTER_H__ |
||||
#define __I2C_MASTER_H__ |
||||
|
||||
#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U |
||||
#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_MTMS_U |
||||
#define I2C_MASTER_SDA_GPIO 2 |
||||
#define I2C_MASTER_SCL_GPIO 14 |
||||
#define I2C_MASTER_SDA_FUNC FUNC_GPIO2 |
||||
#define I2C_MASTER_SCL_FUNC FUNC_GPIO14 |
||||
|
||||
//#define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U
|
||||
//#define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_GPIO0_U
|
||||
//#define I2C_MASTER_SDA_GPIO 2
|
||||
//#define I2C_MASTER_SCL_GPIO 0
|
||||
//#define I2C_MASTER_SDA_FUNC FUNC_GPIO2
|
||||
//#define I2C_MASTER_SCL_FUNC FUNC_GPIO0
|
||||
|
||||
#if 0 |
||||
#define I2C_MASTER_GPIO_SET(pin) \ |
||||
gpio_output_set(1<<pin,0,1<<pin,0) |
||||
|
||||
#define I2C_MASTER_GPIO_CLR(pin) \ |
||||
gpio_output_set(0,1<<pin,1<<pin,0) |
||||
|
||||
#define I2C_MASTER_GPIO_OUT(pin,val) \ |
||||
if(val) I2C_MASTER_GPIO_SET(pin);\
|
||||
else I2C_MASTER_GPIO_CLR(pin) |
||||
#endif |
||||
|
||||
#define I2C_MASTER_SDA_HIGH_SCL_HIGH() \ |
||||
gpio_output_set(1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0) |
||||
|
||||
#define I2C_MASTER_SDA_HIGH_SCL_LOW() \ |
||||
gpio_output_set(1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0) |
||||
|
||||
#define I2C_MASTER_SDA_LOW_SCL_HIGH() \ |
||||
gpio_output_set(1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0) |
||||
|
||||
#define I2C_MASTER_SDA_LOW_SCL_LOW() \ |
||||
gpio_output_set(0, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 1<<I2C_MASTER_SDA_GPIO | 1<<I2C_MASTER_SCL_GPIO, 0) |
||||
|
||||
void i2c_master_gpio_init(void); |
||||
void i2c_master_init(void); |
||||
|
||||
#define i2c_master_wait os_delay_us |
||||
void i2c_master_stop(void); |
||||
void i2c_master_start(void); |
||||
void i2c_master_setAck(uint8 level); |
||||
uint8 i2c_master_getAck(void); |
||||
uint8 i2c_master_readByte(void); |
||||
void i2c_master_writeByte(uint8 wrdata); |
||||
|
||||
bool i2c_master_checkAck(void); |
||||
void i2c_master_send_ack(void); |
||||
void i2c_master_send_nack(void); |
||||
|
||||
#endif |
@ -1,27 +0,0 @@ |
||||
#ifndef __KEY_H__ |
||||
#define __KEY_H__ |
||||
|
||||
#include "gpio.h" |
||||
|
||||
typedef void (* key_function)(void); |
||||
|
||||
struct single_key_param { |
||||
uint8 key_level; |
||||
uint8 gpio_id; |
||||
uint8 gpio_func; |
||||
uint32 gpio_name; |
||||
os_timer_t key_5s; |
||||
os_timer_t key_50ms; |
||||
key_function short_press; |
||||
key_function long_press; |
||||
}; |
||||
|
||||
struct keys_param { |
||||
uint8 key_num; |
||||
struct single_key_param **single_key; |
||||
}; |
||||
|
||||
struct single_key_param *key_init_single(uint8 gpio_id, uint32 gpio_name, uint8 gpio_func, key_function long_press, key_function short_press); |
||||
void key_init(struct keys_param *key); |
||||
|
||||
#endif |
@ -1,16 +0,0 @@ |
||||
#ifndef __SDIO_SLAVE_H__ |
||||
#define __SDIO_SLAVE_H__ |
||||
#include "c_types.h"
|
||||
#include "user_interface.h" |
||||
|
||||
#define RX_AVAILIBLE 2 |
||||
#define TX_AVAILIBLE 1 |
||||
#define INIT_STAGE 0 |
||||
|
||||
void sdio_slave_init(void); |
||||
|
||||
int32 sdio_load_data(const uint8* data,uint32 len); |
||||
typedef void (*sdio_recv_data_callback_t)(uint8* data,uint32 len); |
||||
|
||||
bool sdio_register_recv_cb(sdio_recv_data_callback_t cb); |
||||
#endif |
@ -1,280 +0,0 @@ |
||||
//Generated at 2012-10-23 19:55:03
|
||||
/*
|
||||
* Copyright (c) 2010 - 2011 Espressif System |
||||
* |
||||
*/ |
||||
|
||||
#ifndef SLC_REGISTER_H_ |
||||
#define SLC_REGISTER_H_ |
||||
|
||||
#define REG_SLC_BASE 0x60000B00 |
||||
//version value:32'h091700
|
||||
|
||||
#define SLC_CONF0 (REG_SLC_BASE + 0x0) |
||||
#ifndef ESP_MAC_5 |
||||
#define SLC_MODE 0x00000003 |
||||
#define SLC_MODE_S 12 |
||||
#endif |
||||
#define SLC_DATA_BURST_EN (BIT(9)) |
||||
#define SLC_DSCR_BURST_EN (BIT(8)) |
||||
#define SLC_RX_NO_RESTART_CLR (BIT(7)) |
||||
#define SLC_RX_AUTO_WRBACK (BIT(6)) |
||||
#define SLC_RX_LOOP_TEST (BIT(5)) |
||||
#define SLC_TX_LOOP_TEST (BIT(4)) |
||||
#define SLC_AHBM_RST (BIT(3)) |
||||
#define SLC_AHBM_FIFO_RST (BIT(2)) |
||||
#define SLC_RXLINK_RST (BIT(1)) |
||||
#define SLC_TXLINK_RST (BIT(0)) |
||||
|
||||
#define SLC_INT_RAW (REG_SLC_BASE + 0x4) |
||||
#define SLC_TX_DSCR_EMPTY_INT_RAW (BIT(21)) |
||||
#define SLC_RX_DSCR_ERR_INT_RAW (BIT(20)) |
||||
#define SLC_TX_DSCR_ERR_INT_RAW (BIT(19)) |
||||
#define SLC_TOHOST_INT_RAW (BIT(18)) |
||||
#define SLC_RX_EOF_INT_RAW (BIT(17)) |
||||
#define SLC_RX_DONE_INT_RAW (BIT(16)) |
||||
#define SLC_TX_EOF_INT_RAW (BIT(15)) |
||||
#define SLC_TX_DONE_INT_RAW (BIT(14)) |
||||
#define SLC_TOKEN1_1TO0_INT_RAW (BIT(13)) |
||||
#define SLC_TOKEN0_1TO0_INT_RAW (BIT(12)) |
||||
#define SLC_TX_OVF_INT_RAW (BIT(11)) |
||||
#define SLC_RX_UDF_INT_RAW (BIT(10)) |
||||
#define SLC_TX_START_INT_RAW (BIT(9)) |
||||
#define SLC_RX_START_INT_RAW (BIT(8)) |
||||
#define SLC_FRHOST_BIT7_INT_RAW (BIT(7)) |
||||
#define SLC_FRHOST_BIT6_INT_RAW (BIT(6)) |
||||
#define SLC_FRHOST_BIT5_INT_RAW (BIT(5)) |
||||
#define SLC_FRHOST_BIT4_INT_RAW (BIT(4)) |
||||
#define SLC_FRHOST_BIT3_INT_RAW (BIT(3)) |
||||
#define SLC_FRHOST_BIT2_INT_RAW (BIT(2)) |
||||
#define SLC_FRHOST_BIT1_INT_RAW (BIT(1)) |
||||
#define SLC_FRHOST_BIT0_INT_RAW (BIT(0)) |
||||
|
||||
#define SLC_INT_STATUS (REG_SLC_BASE + 0x8) |
||||
#define SLC_TX_DSCR_EMPTY_INT_ST (BIT(21)) |
||||
#define SLC_RX_DSCR_ERR_INT_ST (BIT(20)) |
||||
#define SLC_TX_DSCR_ERR_INT_ST (BIT(19)) |
||||
#define SLC_TOHOST_INT_ST (BIT(18)) |
||||
#define SLC_RX_EOF_INT_ST (BIT(17)) |
||||
#define SLC_RX_DONE_INT_ST (BIT(16)) |
||||
#define SLC_TX_EOF_INT_ST (BIT(15)) |
||||
#define SLC_TX_DONE_INT_ST (BIT(14)) |
||||
#define SLC_TOKEN1_1TO0_INT_ST (BIT(13)) |
||||
#define SLC_TOKEN0_1TO0_INT_ST (BIT(12)) |
||||
#define SLC_TX_OVF_INT_ST (BIT(11)) |
||||
#define SLC_RX_UDF_INT_ST (BIT(10)) |
||||
#define SLC_TX_START_INT_ST (BIT(9)) |
||||
#define SLC_RX_START_INT_ST (BIT(8)) |
||||
#define SLC_FRHOST_BIT7_INT_ST (BIT(7)) |
||||
#define SLC_FRHOST_BIT6_INT_ST (BIT(6)) |
||||
#define SLC_FRHOST_BIT5_INT_ST (BIT(5)) |
||||
#define SLC_FRHOST_BIT4_INT_ST (BIT(4)) |
||||
#define SLC_FRHOST_BIT3_INT_ST (BIT(3)) |
||||
#define SLC_FRHOST_BIT2_INT_ST (BIT(2)) |
||||
#define SLC_FRHOST_BIT1_INT_ST (BIT(1)) |
||||
#define SLC_FRHOST_BIT0_INT_ST (BIT(0)) |
||||
|
||||
#define SLC_INT_ENA (REG_SLC_BASE + 0xC) |
||||
#define SLC_TX_DSCR_EMPTY_INT_ENA (BIT(21)) |
||||
#define SLC_RX_DSCR_ERR_INT_ENA (BIT(20)) |
||||
#define SLC_TX_DSCR_ERR_INT_ENA (BIT(19)) |
||||
#define SLC_TOHOST_INT_ENA (BIT(18)) |
||||
#define SLC_RX_EOF_INT_ENA (BIT(17)) |
||||
#define SLC_RX_DONE_INT_ENA (BIT(16)) |
||||
#define SLC_TX_EOF_INT_ENA (BIT(15)) |
||||
#define SLC_TX_DONE_INT_ENA (BIT(14)) |
||||
#define SLC_TOKEN1_1TO0_INT_ENA (BIT(13)) |
||||
#define SLC_TOKEN0_1TO0_INT_ENA (BIT(12)) |
||||
#define SLC_TX_OVF_INT_ENA (BIT(11)) |
||||
#define SLC_RX_UDF_INT_ENA (BIT(10)) |
||||
#define SLC_TX_START_INT_ENA (BIT(9)) |
||||
#define SLC_RX_START_INT_ENA (BIT(8)) |
||||
#define SLC_FRHOST_BIT7_INT_ENA (BIT(7)) |
||||
#define SLC_FRHOST_BIT6_INT_ENA (BIT(6)) |
||||
#define SLC_FRHOST_BIT5_INT_ENA (BIT(5)) |
||||
#define SLC_FRHOST_BIT4_INT_ENA (BIT(4)) |
||||
#define SLC_FRHOST_BIT3_INT_ENA (BIT(3)) |
||||
#define SLC_FRHOST_BIT2_INT_ENA (BIT(2)) |
||||
#define SLC_FRHOST_BIT1_INT_ENA (BIT(1)) |
||||
#define SLC_FRHOST_BIT0_INT_ENA (BIT(0)) |
||||
|
||||
#define SLC_FRHOST_BIT_INT_ENA_ALL 0xff |
||||
|
||||
#define SLC_INT_CLR (REG_SLC_BASE + 0x10) |
||||
#define SLC_TX_DSCR_EMPTY_INT_CLR (BIT(21)) |
||||
#define SLC_RX_DSCR_ERR_INT_CLR (BIT(20)) |
||||
#define SLC_TX_DSCR_ERR_INT_CLR (BIT(19)) |
||||
#define SLC_TOHOST_INT_CLR (BIT(18)) |
||||
#define SLC_RX_EOF_INT_CLR (BIT(17)) |
||||
#define SLC_RX_DONE_INT_CLR (BIT(16)) |
||||
#define SLC_TX_EOF_INT_CLR (BIT(15)) |
||||
#define SLC_TX_DONE_INT_CLR (BIT(14)) |
||||
#define SLC_TOKEN1_1TO0_INT_CLR (BIT(13)) |
||||
#define SLC_TOKEN0_1TO0_INT_CLR (BIT(12)) |
||||
#define SLC_TX_OVF_INT_CLR (BIT(11)) |
||||
#define SLC_RX_UDF_INT_CLR (BIT(10)) |
||||
#define SLC_TX_START_INT_CLR (BIT(9)) |
||||
#define SLC_RX_START_INT_CLR (BIT(8)) |
||||
#define SLC_FRHOST_BIT7_INT_CLR (BIT(7)) |
||||
#define SLC_FRHOST_BIT6_INT_CLR (BIT(6)) |
||||
#define SLC_FRHOST_BIT5_INT_CLR (BIT(5)) |
||||
#define SLC_FRHOST_BIT4_INT_CLR (BIT(4)) |
||||
#define SLC_FRHOST_BIT3_INT_CLR (BIT(3)) |
||||
#define SLC_FRHOST_BIT2_INT_CLR (BIT(2)) |
||||
#define SLC_FRHOST_BIT1_INT_CLR (BIT(1)) |
||||
#define SLC_FRHOST_BIT0_INT_CLR (BIT(0)) |
||||
|
||||
#define SLC_RX_STATUS (REG_SLC_BASE + 0x14) |
||||
#define SLC_RX_EMPTY (BIT(1)) |
||||
#define SLC_RX_FULL (BIT(0)) |
||||
|
||||
#define SLC_RX_FIFO_PUSH (REG_SLC_BASE + 0x18) |
||||
#define SLC_RXFIFO_PUSH (BIT(16)) |
||||
#define SLC_RXFIFO_WDATA 0x000001FF |
||||
#define SLC_RXFIFO_WDATA_S 0 |
||||
|
||||
#define SLC_TX_STATUS (REG_SLC_BASE + 0x1C) |
||||
#define SLC_TX_EMPTY (BIT(1)) |
||||
#define SLC_TX_FULL (BIT(0)) |
||||
|
||||
#define SLC_TX_FIFO_POP (REG_SLC_BASE + 0x20) |
||||
#define SLC_TXFIFO_POP (BIT(16)) |
||||
#define SLC_TXFIFO_RDATA 0x000007FF |
||||
#define SLC_TXFIFO_RDATA_S 0 |
||||
|
||||
#define SLC_RX_LINK (REG_SLC_BASE + 0x24) |
||||
#define SLC_RXLINK_PARK (BIT(31)) |
||||
#define SLC_RXLINK_RESTART (BIT(30)) |
||||
#define SLC_RXLINK_START (BIT(29)) |
||||
#define SLC_RXLINK_STOP (BIT(28)) |
||||
#define SLC_RXLINK_DESCADDR_MASK 0x000FFFFF |
||||
#define SLC_RXLINK_ADDR_S 0 |
||||
|
||||
#define SLC_TX_LINK (REG_SLC_BASE + 0x28) |
||||
#define SLC_TXLINK_PARK (BIT(31)) |
||||
#define SLC_TXLINK_RESTART (BIT(30)) |
||||
#define SLC_TXLINK_START (BIT(29)) |
||||
#define SLC_TXLINK_STOP (BIT(28)) |
||||
#define SLC_TXLINK_DESCADDR_MASK 0x000FFFFF |
||||
#define SLC_TXLINK_ADDR_S 0 |
||||
|
||||
#define SLC_INTVEC_TOHOST (REG_SLC_BASE + 0x2C) |
||||
#define SLC_TOHOST_INTVEC 0x000000FF |
||||
#define SLC_TOHOST_INTVEC_S 0 |
||||
|
||||
#define SLC_TOKEN0 (REG_SLC_BASE + 0x30) |
||||
#define SLC_TOKEN0_MASK 0x00000FFF |
||||
#define SLC_TOKEN0_S 16 |
||||
#define SLC_TOKEN0_LOCAL_INC_MORE (BIT(14)) |
||||
#define SLC_TOKEN0_LOCAL_INC (BIT(13)) |
||||
#define SLC_TOKEN0_LOCAL_WR (BIT(12)) |
||||
#define SLC_TOKEN0_LOCAL_WDATA_MASK 0x00000FFF |
||||
#define SLC_TOKEN0_LOCAL_WDATA_S 0 |
||||
|
||||
#define SLC_TOKEN1 (REG_SLC_BASE + 0x34) |
||||
#define SLC_TOKEN1_MASK 0x00000FFF |
||||
#define SLC_TOKEN1_S 16 |
||||
#define SLC_TOKEN1_LOCAL_INC_MORE (BIT(14)) |
||||
#define SLC_TOKEN1_LOCAL_INC (BIT(13)) |
||||
#define SLC_TOKEN1_LOCAL_WR (BIT(12)) |
||||
#define SLC_TOKEN1_LOCAL_WDATA 0x00000FFF |
||||
#define SLC_TOKEN1_LOCAL_WDATA_S 0 |
||||
|
||||
#define SLC_CONF1 (REG_SLC_BASE + 0x38) |
||||
#define SLC_STATE0 (REG_SLC_BASE + 0x3C) |
||||
#define SLC_STATE1 (REG_SLC_BASE + 0x40) |
||||
|
||||
#define SLC_BRIDGE_CONF (REG_SLC_BASE + 0x44) |
||||
#ifndef ESP_MAC_5 |
||||
#define SLC_TX_PUSH_IDLE_NUM 0x0000FFFF |
||||
#define SLC_TX_PUSH_IDLE_NUM_S 16 |
||||
#define SLC_TX_DUMMY_MODE (BIT(12)) |
||||
#endif |
||||
#define SLC_FIFO_MAP_ENA 0x0000000F |
||||
#define SLC_FIFO_MAP_ENA_S 8 |
||||
#define SLC_TXEOF_ENA 0x0000003F |
||||
#define SLC_TXEOF_ENA_S 0 |
||||
|
||||
#define SLC_RX_EOF_DES_ADDR (REG_SLC_BASE + 0x48) |
||||
#define SLC_TX_EOF_DES_ADDR (REG_SLC_BASE + 0x4C) |
||||
#define SLC_FROM_HOST_LAST_DESC SLC_TX_EOF_DES_ADDR |
||||
#define SLC_TO_HOST_LAST_DESC SLC_RX_EOF_DES_ADDR |
||||
|
||||
#define SLC_RX_EOF_BFR_DES_ADDR (REG_SLC_BASE + 0x50) |
||||
#define SLC_AHB_TEST (REG_SLC_BASE + 0x54) |
||||
#define SLC_AHB_TESTADDR 0x00000003 |
||||
#define SLC_AHB_TESTADDR_S 4 |
||||
#define SLC_AHB_TESTMODE 0x00000007 |
||||
#define SLC_AHB_TESTMODE_S 0 |
||||
|
||||
#define SLC_SDIO_ST (REG_SLC_BASE + 0x58) |
||||
#define SLC_BUS_ST 0x00000007 |
||||
#define SLC_BUS_ST_S 12 |
||||
#define SLC_SDIO_WAKEUP (BIT(8)) |
||||
#define SLC_FUNC_ST 0x0000000F |
||||
#define SLC_FUNC_ST_S 4 |
||||
#define SLC_CMD_ST 0x00000007 |
||||
#define SLC_CMD_ST_S 0 |
||||
|
||||
#define SLC_RX_DSCR_CONF (REG_SLC_BASE + 0x5C) |
||||
#ifdef ESP_MAC_5 |
||||
#define SLC_INFOR_NO_REPLACE (BIT(9)) |
||||
#define SLC_TOKEN_NO_REPLACE (BIT(8)) |
||||
#define SLC_POP_IDLE_CNT 0x000000FF |
||||
#else |
||||
#define SLC_RX_FILL_EN (BIT(20)) |
||||
#define SLC_RX_EOF_MODE (BIT(19)) |
||||
#define SLC_RX_FILL_MODE (BIT(18)) |
||||
#define SLC_INFOR_NO_REPLACE (BIT(17)) |
||||
#define SLC_TOKEN_NO_REPLACE (BIT(16)) //
|
||||
#define SLC_POP_IDLE_CNT 0x0000FFFF |
||||
#endif |
||||
#define SLC_POP_IDLE_CNT_S 0 |
||||
|
||||
#define SLC_TXLINK_DSCR (REG_SLC_BASE + 0x60) |
||||
#define SLC_TXLINK_DSCR_BF0 (REG_SLC_BASE + 0x64) |
||||
#define SLC_TXLINK_DSCR_BF1 (REG_SLC_BASE + 0x68) |
||||
#define SLC_RXLINK_DSCR (REG_SLC_BASE + 0x6C) |
||||
#define SLC_RXLINK_DSCR_BF0 (REG_SLC_BASE + 0x70) |
||||
#define SLC_RXLINK_DSCR_BF1 (REG_SLC_BASE + 0x74) |
||||
#define SLC_DATE (REG_SLC_BASE + 0x78) |
||||
#define SLC_ID (REG_SLC_BASE + 0x7C) |
||||
|
||||
#define SLC_HOST_CONF_W0 (REG_SLC_BASE + 0x80 + 0x14) |
||||
#define SLC_HOST_CONF_W1 (REG_SLC_BASE + 0x80 + 0x18) |
||||
#define SLC_HOST_CONF_W2 (REG_SLC_BASE + 0x80 + 0x20) |
||||
#define SLC_HOST_CONF_W3 (REG_SLC_BASE + 0x80 + 0x24) |
||||
#define SLC_HOST_CONF_W4 (REG_SLC_BASE + 0x80 + 0x28) |
||||
|
||||
#define SLC_HOST_INTR_ST (REG_SLC_BASE + 0x80 + 0x1c) |
||||
#define SLC_HOST_INTR_CLR (REG_SLC_BASE + 0x80 + 0x30) |
||||
#define SLC_HOST_INTR_SOF_BIT (BIT(12)) |
||||
|
||||
#define SLC_HOST_INTR_ENA (REG_SLC_BASE + 0x80 + 0x34) |
||||
#define SLC_RX_NEW_PACKET_INT_ENA (BIT23) |
||||
#define SLC_HOST_TOHOST_BIT0_INT_ENA (BIT0) |
||||
#define SLC_HOST_CONF_W5 (REG_SLC_BASE + 0x80 + 0x3C) |
||||
#define SLC_HOST_INTR_RAW (REG_SLC_BASE + 0x80 + 0x8) |
||||
#define SLC_HOST_INTR_ENA_BIT (BIT(23)) |
||||
//[15:12]: 0x3ff9xxxx -- 0b01 from_host
|
||||
// 0x3ffaxxxx -- 0b10 general
|
||||
// 0x3ffbxxxx -- 0b11 to_host
|
||||
#define SLC_DATA_ADDR_CLEAR_MASK (~(0xf<<12)) |
||||
#define SLC_FROM_HOST_ADDR_MASK (0x1<<12) |
||||
#define SLC_TO_HOST_ADDR_MASK (0x3<<12) |
||||
|
||||
#define SLC_SET_FROM_HOST_ADDR_MASK(v) do { \ |
||||
(v) &= SLC_DATA_ADDR_CLEAR_MASK; \
|
||||
(v) |= SLC_FROM_HOST_ADDR_MASK; \
|
||||
} while(0); |
||||
|
||||
#define SLC_SET_TO_HOST_ADDR_MASK(v) do { \ |
||||
(v) &= SLC_DATA_ADDR_CLEAR_MASK; \
|
||||
(v) |= SLC_TO_HOST_ADDR_MASK; \
|
||||
} while(0); |
||||
|
||||
|
||||
#define SLC_TX_DESC_DEBUG_REG 0x3ff0002c //[15:0] set to 0xcccc
|
||||
|
||||
|
||||
#endif // SLC_REGISTER_H_INCLUDED
|
@ -1,50 +0,0 @@ |
||||
#ifndef SPI_APP_H |
||||
#define SPI_APP_H |
||||
|
||||
#include "spi_register.h" |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "uart.h" |
||||
#include "os_type.h" |
||||
#include "spi_flash.h" |
||||
|
||||
#define SPI_FLASH_BYTES_LEN 24 |
||||
#define IODATA_START_ADDR BIT0 |
||||
#define SPI_BUFF_BYTE_NUM 32 |
||||
|
||||
/*SPI number define*/ |
||||
#define SPI 0 |
||||
#define HSPI 1 |
||||
|
||||
void cache_flush(void); |
||||
//spi master init funtion
|
||||
void spi_master_init(uint8 spi_no); |
||||
|
||||
//lcd drive function
|
||||
void spi_lcd_9bit_write(uint8 spi_no,uint8 high_bit,uint8 low_8bit); |
||||
//use spi send 8bit data
|
||||
void spi_mast_byte_write(uint8 spi_no,uint8 data); |
||||
|
||||
//transmit data to esp8266 slave buffer,which needs 16bit transmission ,
|
||||
//first byte is master command 0x04, second byte is master data
|
||||
void spi_byte_write_espslave(uint8 spi_no,uint8 data); |
||||
//read data from esp8266 slave buffer,which needs 16bit transmission ,
|
||||
//first byte is master command 0x06, second byte is to read slave data
|
||||
void spi_byte_read_espslave(uint8 spi_no,uint8 *data); |
||||
|
||||
//esp8266 slave mode initial
|
||||
void spi_slave_init(uint8 spi_no,uint8 data_len); |
||||
//esp8266 slave isr handle funtion,tiggered when any transmission is finished.
|
||||
//the function is registered in spi_slave_init.
|
||||
void spi_slave_isr_handler(void *para);
|
||||
|
||||
|
||||
//hspi test function, used to test esp8266 spi slave
|
||||
void hspi_master_readwrite_repeat(void); |
||||
|
||||
|
||||
void spi_test_init(void); |
||||
|
||||
|
||||
#endif |
||||
|
@ -1,61 +0,0 @@ |
||||
#ifndef SPI_OVERLAP_APP_H |
||||
#define SPI_OVERLAP_APP_H |
||||
|
||||
#include "ets_sys.h" |
||||
#include "spi_flash.h" |
||||
#define HSPI_OVERLAP |
||||
//#define NO_HSPI_DEVICE
|
||||
#define HOST_INF_SEL 0x3ff00028 |
||||
#define FUNC_SPI_CS2 1 |
||||
#define FUNC_SPI_CS1 1 |
||||
#define reg_cspi_overlap (BIT7) |
||||
|
||||
#define SPI_FLASH_BYTES_LEN 24 |
||||
#define IODATA_START_ADDR BIT0 |
||||
#define SPI_BUFF_BYTE_NUM 32 |
||||
|
||||
#define PERIPHS_IO_MUX_BACKUP 0 |
||||
#define SPI_USER_BACKUP 1 |
||||
#define SPI_CTRL_BACKUP 2 |
||||
#define SPI_CLOCK_BACKUP 3 |
||||
#define SPI_USER1_BACKUP 4 |
||||
#define SPI_USER2_BACKUP 5 |
||||
#define SPI_CMD_BACKUP 6 |
||||
#define SPI_PIN_BACKUP 7 |
||||
#define SPI_SLAVE_BACKUP 8 |
||||
|
||||
#define HSPI_CS_DEV 0 |
||||
#define SPI_CS1_DEV 1 |
||||
#define SPI_CS2_DEV 2 |
||||
#define SPI_CS0_FLASH 3 |
||||
#define HSPI_IDLE 4 |
||||
|
||||
struct hspi_device_config{ |
||||
uint8 active:1; |
||||
uint8 clk_polar:1; |
||||
uint8 res:1; |
||||
uint8 clk_div:5; |
||||
}; |
||||
|
||||
struct hspi_device_register{ |
||||
uint32 hspi_flash_reg_backup[9]; |
||||
uint32 hspi_dev_reg_backup[9]; |
||||
struct hspi_device_config hspi_dev_conf[4]; |
||||
uint8 selected_dev_num:3; |
||||
uint8 spi_io_80m:1; |
||||
uint8 hspi_reg_backup_flag:1; |
||||
uint8 res:3; |
||||
}; |
||||
|
||||
void hspi_overlap_init(void); |
||||
void hspi_overlap_deinit(void); |
||||
void spi_reg_recover(uint8 spi_no,uint32* backup_mem); |
||||
void spi_reg_backup(uint8 spi_no,uint32* backup_mem); |
||||
|
||||
void hspi_master_dev_init(uint8 dev_no,uint8 clk_polar,uint8 clk_div); |
||||
void hspi_dev_sel(uint8 dev_no); |
||||
|
||||
void hspi_overlap_flash_init(void); |
||||
SpiFlashOpResult hspi_overlap_read_flash_data(SpiFlashChip * spi, uint32 flash_addr, uint32 * addr_dest, uint32 byte_length); |
||||
|
||||
#endif |
@ -1,202 +0,0 @@ |
||||
/*
|
||||
* Copyright (c) 2010 - 2011 Espressif System |
||||
* |
||||
*/ |
||||
|
||||
#ifndef SPI_REGISTER_H_INCLUDED |
||||
#define SPI_REGISTER_H_INCLUDED |
||||
|
||||
#define REG_SPI_BASE(i) (0x60000200-i*0x100) |
||||
#define SPI_CMD(i) (REG_SPI_BASE(i) + 0x0) |
||||
|
||||
#define SPI_FLASH_READ BIT31 |
||||
#define SPI_FLASH_WREN BIT30 |
||||
#define SPI_FLASH_WRDI BIT29 |
||||
#define SPI_FLASH_RDID BIT28 |
||||
#define SPI_FLASH_RDSR BIT27 |
||||
#define SPI_FLASH_WRSR BIT26 |
||||
#define SPI_FLASH_PP BIT25 |
||||
#define SPI_FLASH_SE BIT24 |
||||
#define SPI_FLASH_BE BIT23 |
||||
#define SPI_FLASH_CE BIT22 |
||||
#define SPI_FLASH_RES BIT20 |
||||
|
||||
#define SPI_USR (BIT(18)) |
||||
|
||||
#define SPI_ADDR(i) (REG_SPI_BASE(i) + 0x4) |
||||
|
||||
#define SPI_CTRL(i) (REG_SPI_BASE(i) + 0x8) |
||||
#define SPI_WR_BIT_ORDER (BIT(26)) |
||||
#define SPI_RD_BIT_ORDER (BIT(25)) |
||||
#define SPI_QIO_MODE (BIT(24)) |
||||
#define SPI_DIO_MODE (BIT(23)) |
||||
#define SPI_QOUT_MODE (BIT(20)) |
||||
#define SPI_DOUT_MODE (BIT(14)) |
||||
#define SPI_FASTRD_MODE (BIT(13)) |
||||
|
||||
#define SPI_CTRL1(i) (REG_SPI_BASE(i) + 0xc) |
||||
#define SPI_CS_HOLD_DELAY 0xf |
||||
#define SPI_CS_HOLD_DELAY_S 28 |
||||
#define SPI_CS_HOLD_DELAY_RES 0xfff |
||||
#define SPI_CS_HOLD_DELAY_RES_S 16 |
||||
|
||||
|
||||
#define SPI_RD_STATUS(i) (REG_SPI_BASE(i) + 0x10) |
||||
|
||||
#define SPI_CTRL2(i) (REG_SPI_BASE(i) + 0x14) |
||||
|
||||
#define SPI_CS_DELAY_NUM 0x0000000F |
||||
#define SPI_CS_DELAY_NUM_S 28 |
||||
#define SPI_CS_DELAY_MODE 0x00000003 |
||||
#define SPI_CS_DELAY_MODE_S 26 |
||||
#define SPI_MOSI_DELAY_NUM 0x00000007 |
||||
#define SPI_MOSI_DELAY_NUM_S 23 |
||||
#define SPI_MOSI_DELAY_MODE 0x00000003 |
||||
#define SPI_MOSI_DELAY_MODE_S 21 |
||||
#define SPI_MISO_DELAY_NUM 0x00000007 |
||||
#define SPI_MISO_DELAY_NUM_S 18 |
||||
#define SPI_MISO_DELAY_MODE 0x00000003 |
||||
#define SPI_MISO_DELAY_MODE_S 16 |
||||
#define SPI_CLOCK(i) (REG_SPI_BASE(i) + 0x18) |
||||
#define SPI_CLK_EQU_SYSCLK (BIT(31)) |
||||
#define SPI_CLKDIV_PRE 0x00001FFF |
||||
#define SPI_CLKDIV_PRE_S 18 |
||||
#define SPI_CLKCNT_N 0x0000003F |
||||
#define SPI_CLKCNT_N_S 12 |
||||
#define SPI_CLKCNT_H 0x0000003F |
||||
#define SPI_CLKCNT_H_S 6 |
||||
#define SPI_CLKCNT_L 0x0000003F |
||||
#define SPI_CLKCNT_L_S 0 |
||||
|
||||
#define SPI_USER(i) (REG_SPI_BASE(i) + 0x1C) |
||||
#define SPI_USR_COMMAND (BIT(31)) |
||||
#define SPI_USR_ADDR (BIT(30)) |
||||
#define SPI_USR_DUMMY (BIT(29)) |
||||
#define SPI_USR_MISO (BIT(28)) |
||||
#define SPI_USR_MOSI (BIT(27)) |
||||
|
||||
#define SPI_USR_MOSI_HIGHPART (BIT(25)) |
||||
#define SPI_USR_MISO_HIGHPART (BIT(24)) |
||||
|
||||
|
||||
#define SPI_SIO (BIT(16)) |
||||
#define SPI_FWRITE_QIO (BIT(15)) |
||||
#define SPI_FWRITE_DIO (BIT(14)) |
||||
#define SPI_FWRITE_QUAD (BIT(13)) |
||||
#define SPI_FWRITE_DUAL (BIT(12)) |
||||
#define SPI_WR_BYTE_ORDER (BIT(11)) |
||||
#define SPI_RD_BYTE_ORDER (BIT(10)) |
||||
#define SPI_CK_OUT_EDGE (BIT(7)) |
||||
#define SPI_CK_I_EDGE (BIT(6)) |
||||
#define SPI_CS_SETUP (BIT(5)) |
||||
#define SPI_CS_HOLD (BIT(4)) |
||||
#define SPI_FLASH_MODE (BIT(2)) |
||||
|
||||
#define SPI_USER1(i) (REG_SPI_BASE(i) + 0x20) |
||||
#define SPI_USR_ADDR_BITLEN 0x0000003F |
||||
#define SPI_USR_ADDR_BITLEN_S 26 |
||||
#define SPI_USR_MOSI_BITLEN 0x000001FF |
||||
#define SPI_USR_MOSI_BITLEN_S 17 |
||||
#define SPI_USR_MISO_BITLEN 0x000001FF |
||||
#define SPI_USR_MISO_BITLEN_S 8 |
||||
|
||||
#define SPI_USR_DUMMY_CYCLELEN 0x000000FF |
||||
#define SPI_USR_DUMMY_CYCLELEN_S 0 |
||||
|
||||
#define SPI_USER2(i) (REG_SPI_BASE(i) + 0x24) |
||||
#define SPI_USR_COMMAND_BITLEN 0x0000000F |
||||
#define SPI_USR_COMMAND_BITLEN_S 28 |
||||
#define SPI_USR_COMMAND_VALUE 0x0000FFFF |
||||
#define SPI_USR_COMMAND_VALUE_S 0 |
||||
|
||||
#define SPI_WR_STATUS(i) (REG_SPI_BASE(i) + 0x28) |
||||
#define SPI_PIN(i) (REG_SPI_BASE(i) + 0x2C) |
||||
#define SPI_CS2_DIS (BIT(2)) |
||||
#define SPI_CS1_DIS (BIT(1)) |
||||
#define SPI_CS0_DIS (BIT(0)) |
||||
|
||||
#define SPI_SLAVE(i) (REG_SPI_BASE(i) + 0x30) |
||||
#define SPI_SYNC_RESET (BIT(31)) |
||||
#define SPI_SLAVE_MODE (BIT(30)) |
||||
#define SPI_SLV_WR_RD_BUF_EN (BIT(29)) |
||||
#define SPI_SLV_WR_RD_STA_EN (BIT(28)) |
||||
#define SPI_SLV_CMD_DEFINE (BIT(27)) |
||||
#define SPI_TRANS_CNT 0x0000000F |
||||
#define SPI_TRANS_CNT_S 23 |
||||
#define SPI_TRANS_DONE_EN (BIT(9)) |
||||
#define SPI_SLV_WR_STA_DONE_EN (BIT(8)) |
||||
#define SPI_SLV_RD_STA_DONE_EN (BIT(7)) |
||||
#define SPI_SLV_WR_BUF_DONE_EN (BIT(6)) |
||||
#define SPI_SLV_RD_BUF_DONE_EN (BIT(5)) |
||||
|
||||
|
||||
|
||||
#define SLV_SPI_INT_EN 0x0000001f |
||||
#define SLV_SPI_INT_EN_S 5 |
||||
|
||||
#define SPI_TRANS_DONE (BIT(4)) |
||||
#define SPI_SLV_WR_STA_DONE (BIT(3)) |
||||
#define SPI_SLV_RD_STA_DONE (BIT(2)) |
||||
#define SPI_SLV_WR_BUF_DONE (BIT(1)) |
||||
#define SPI_SLV_RD_BUF_DONE (BIT(0)) |
||||
|
||||
#define SPI_SLAVE1(i) (REG_SPI_BASE(i) + 0x34) |
||||
#define SPI_SLV_STATUS_BITLEN 0x0000001F |
||||
#define SPI_SLV_STATUS_BITLEN_S 27 |
||||
#define SPI_SLV_BUF_BITLEN 0x000001FF |
||||
#define SPI_SLV_BUF_BITLEN_S 16 |
||||
#define SPI_SLV_RD_ADDR_BITLEN 0x0000003F |
||||
#define SPI_SLV_RD_ADDR_BITLEN_S 10 |
||||
#define SPI_SLV_WR_ADDR_BITLEN 0x0000003F |
||||
#define SPI_SLV_WR_ADDR_BITLEN_S 4 |
||||
|
||||
#define SPI_SLV_WRSTA_DUMMY_EN (BIT(3)) |
||||
#define SPI_SLV_RDSTA_DUMMY_EN (BIT(2)) |
||||
#define SPI_SLV_WRBUF_DUMMY_EN (BIT(1)) |
||||
#define SPI_SLV_RDBUF_DUMMY_EN (BIT(0)) |
||||
|
||||
|
||||
|
||||
#define SPI_SLAVE2(i) (REG_SPI_BASE(i) + 0x38) |
||||
#define SPI_SLV_WRBUF_DUMMY_CYCLELEN 0X000000FF |
||||
#define SPI_SLV_WRBUF_DUMMY_CYCLELEN_S 24 |
||||
#define SPI_SLV_RDBUF_DUMMY_CYCLELEN 0X000000FF |
||||
#define SPI_SLV_RDBUF_DUMMY_CYCLELEN_S 16 |
||||
#define SPI_SLV_WRSTR_DUMMY_CYCLELEN 0X000000FF |
||||
#define SPI_SLV_WRSTR_DUMMY_CYCLELEN_S 8 |
||||
#define SPI_SLV_RDSTR_DUMMY_CYCLELEN 0x000000FF |
||||
#define SPI_SLV_RDSTR_DUMMY_CYCLELEN_S 0 |
||||
|
||||
#define SPI_SLAVE3(i) (REG_SPI_BASE(i) + 0x3C) |
||||
#define SPI_SLV_WRSTA_CMD_VALUE 0x000000FF |
||||
#define SPI_SLV_WRSTA_CMD_VALUE_S 24 |
||||
#define SPI_SLV_RDSTA_CMD_VALUE 0x000000FF |
||||
#define SPI_SLV_RDSTA_CMD_VALUE_S 16 |
||||
#define SPI_SLV_WRBUF_CMD_VALUE 0x000000FF |
||||
#define SPI_SLV_WRBUF_CMD_VALUE_S 8 |
||||
#define SPI_SLV_RDBUF_CMD_VALUE 0x000000FF |
||||
#define SPI_SLV_RDBUF_CMD_VALUE_S 0 |
||||
|
||||
#define SPI_W0(i) (REG_SPI_BASE(i) +0x40) |
||||
#define SPI_W1(i) (REG_SPI_BASE(i) +0x44) |
||||
#define SPI_W2(i) (REG_SPI_BASE(i) +0x48) |
||||
#define SPI_W3(i) (REG_SPI_BASE(i) +0x4C) |
||||
#define SPI_W4(i) (REG_SPI_BASE(i) +0x50) |
||||
#define SPI_W5(i) (REG_SPI_BASE(i) +0x54) |
||||
#define SPI_W6(i) (REG_SPI_BASE(i) +0x58) |
||||
#define SPI_W7(i) (REG_SPI_BASE(i) +0x5C) |
||||
#define SPI_W8(i) (REG_SPI_BASE(i) +0x60) |
||||
#define SPI_W9(i) (REG_SPI_BASE(i) +0x64) |
||||
#define SPI_W10(i) (REG_SPI_BASE(i) +0x68) |
||||
#define SPI_W11(i) (REG_SPI_BASE(i) +0x6C) |
||||
#define SPI_W12(i) (REG_SPI_BASE(i) +0x70) |
||||
#define SPI_W13(i) (REG_SPI_BASE(i) +0x74) |
||||
#define SPI_W14(i) (REG_SPI_BASE(i) +0x78) |
||||
#define SPI_W15(i) (REG_SPI_BASE(i) +0x7C) |
||||
|
||||
#define SPI_EXT2(i) (REG_SPI_BASE(i) + 0xF8) |
||||
|
||||
#define SPI_EXT3(i) (REG_SPI_BASE(i) + 0xFC) |
||||
#define SPI_INT_HOLD_ENA 0x00000003 |
||||
#define SPI_INT_HOLD_ENA_S 0 |
||||
#endif // SPI_REGISTER_H_INCLUDED
|
@ -1,221 +0,0 @@ |
||||
/*
|
||||
* File : uart.h |
||||
* Copyright (C) 2013 - 2016, Espressif Systems |
||||
* |
||||
* This program is free software: you can redistribute it and/or modify |
||||
* it under the terms of version 3 of the GNU General Public License as |
||||
* published by the Free Software Foundation. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License along |
||||
* with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/ |
||||
#ifndef UART_APP_H |
||||
#define UART_APP_H |
||||
|
||||
#include "uart_register.h" |
||||
#include "eagle_soc.h" |
||||
#include "c_types.h" |
||||
|
||||
#define UART_TX_BUFFER_SIZE 256 //Ring buffer length of tx buffer
|
||||
#define UART_RX_BUFFER_SIZE 256 //Ring buffer length of rx buffer
|
||||
|
||||
#define UART_BUFF_EN 0 //use uart buffer , FOR UART0
|
||||
#define UART_SELFTEST 0 //set 1:enable the loop test demo for uart buffer, FOR UART0
|
||||
|
||||
#define UART_HW_RTS 0 //set 1: enable uart hw flow control RTS, PIN MTDO, FOR UART0
|
||||
#define UART_HW_CTS 0 //set1: enable uart hw flow contrl CTS , PIN MTCK, FOR UART0
|
||||
|
||||
|
||||
|
||||
|
||||
#define UART0 0 |
||||
#define UART1 1 |
||||
|
||||
|
||||
typedef enum { |
||||
FIVE_BITS = 0x0, |
||||
SIX_BITS = 0x1, |
||||
SEVEN_BITS = 0x2, |
||||
EIGHT_BITS = 0x3 |
||||
} UartBitsNum4Char; |
||||
|
||||
typedef enum { |
||||
ONE_STOP_BIT = 0x1, |
||||
ONE_HALF_STOP_BIT = 0x2, |
||||
TWO_STOP_BIT = 0x3 |
||||
} UartStopBitsNum; |
||||
|
||||
typedef enum { |
||||
NONE_BITS = 0x2, |
||||
ODD_BITS = 1, |
||||
EVEN_BITS = 0 |
||||
} UartParityMode; |
||||
|
||||
typedef enum { |
||||
STICK_PARITY_DIS = 0, |
||||
STICK_PARITY_EN = 1 |
||||
} UartExistParity; |
||||
|
||||
typedef enum { |
||||
UART_None_Inverse = 0x0, |
||||
UART_Rxd_Inverse = UART_RXD_INV, |
||||
UART_CTS_Inverse = UART_CTS_INV, |
||||
UART_Txd_Inverse = UART_TXD_INV, |
||||
UART_RTS_Inverse = UART_RTS_INV, |
||||
} UART_LineLevelInverse; |
||||
|
||||
|
||||
typedef enum { |
||||
BIT_RATE_300 = 300, |
||||
BIT_RATE_600 = 600, |
||||
BIT_RATE_1200 = 1200, |
||||
BIT_RATE_2400 = 2400, |
||||
BIT_RATE_4800 = 4800, |
||||
BIT_RATE_9600 = 9600, |
||||
BIT_RATE_19200 = 19200, |
||||
BIT_RATE_38400 = 38400, |
||||
BIT_RATE_57600 = 57600, |
||||
BIT_RATE_74880 = 74880, |
||||
BIT_RATE_115200 = 115200, |
||||
BIT_RATE_230400 = 230400, |
||||
BIT_RATE_460800 = 460800, |
||||
BIT_RATE_921600 = 921600, |
||||
BIT_RATE_1843200 = 1843200, |
||||
BIT_RATE_3686400 = 3686400, |
||||
} UartBautRate; |
||||
|
||||
typedef enum { |
||||
NONE_CTRL, |
||||
HARDWARE_CTRL, |
||||
XON_XOFF_CTRL |
||||
} UartFlowCtrl; |
||||
|
||||
typedef enum { |
||||
USART_HardwareFlowControl_None = 0x0, |
||||
USART_HardwareFlowControl_RTS = 0x1, |
||||
USART_HardwareFlowControl_CTS = 0x2, |
||||
USART_HardwareFlowControl_CTS_RTS = 0x3 |
||||
} UART_HwFlowCtrl; |
||||
|
||||
typedef enum { |
||||
EMPTY, |
||||
UNDER_WRITE, |
||||
WRITE_OVER |
||||
} RcvMsgBuffState; |
||||
|
||||
typedef struct { |
||||
uint32 RcvBuffSize; |
||||
uint8 *pRcvMsgBuff; |
||||
uint8 *pWritePos; |
||||
uint8 *pReadPos; |
||||
uint8 TrigLvl; //JLU: may need to pad
|
||||
RcvMsgBuffState BuffState; |
||||
} RcvMsgBuff; |
||||
|
||||
typedef struct { |
||||
uint32 TrxBuffSize; |
||||
uint8 *pTrxBuff; |
||||
} TrxMsgBuff; |
||||
|
||||
typedef enum { |
||||
BAUD_RATE_DET, |
||||
WAIT_SYNC_FRM, |
||||
SRCH_MSG_HEAD, |
||||
RCV_MSG_BODY, |
||||
RCV_ESC_CHAR, |
||||
} RcvMsgState; |
||||
|
||||
typedef struct { |
||||
UartBautRate baut_rate; |
||||
UartBitsNum4Char data_bits; |
||||
UartExistParity exist_parity; |
||||
UartParityMode parity;
|
||||
UartStopBitsNum stop_bits; |
||||
UartFlowCtrl flow_ctrl; |
||||
RcvMsgBuff rcv_buff; |
||||
TrxMsgBuff trx_buff; |
||||
RcvMsgState rcv_state; |
||||
int received; |
||||
int buff_uart_no; //indicate which uart use tx/rx buffer
|
||||
} UartDevice; |
||||
|
||||
void uart_init(UartBautRate uart0_br, UartBautRate uart1_br); |
||||
void uart0_sendStr(const char *str); |
||||
|
||||
|
||||
///////////////////////////////////////
|
||||
#define UART_FIFO_LEN 128 //define the tx fifo length
|
||||
#define UART_TX_EMPTY_THRESH_VAL 0x10 |
||||
|
||||
|
||||
struct UartBuffer{ |
||||
uint32 UartBuffSize; |
||||
uint8 *pUartBuff; |
||||
uint8 *pInPos; |
||||
uint8 *pOutPos; |
||||
STATUS BuffState; |
||||
uint16 Space; //remanent space of the buffer
|
||||
uint8 TcpControl; |
||||
struct UartBuffer * nextBuff; |
||||
}; |
||||
|
||||
struct UartRxBuff{ |
||||
uint32 UartRxBuffSize; |
||||
uint8 *pUartRxBuff; |
||||
uint8 *pWritePos; |
||||
uint8 *pReadPos; |
||||
STATUS RxBuffState; |
||||
uint32 Space; //remanent space of the buffer
|
||||
} ; |
||||
|
||||
typedef enum { |
||||
RUN = 0, |
||||
BLOCK = 1, |
||||
} TCPState; |
||||
|
||||
//void ICACHE_FLASH_ATTR uart_test_rx();
|
||||
STATUS uart_tx_one_char(uint8 uart, uint8 TxChar); |
||||
STATUS uart_tx_one_char_no_wait(uint8 uart, uint8 TxChar); |
||||
void uart1_sendStr_no_wait(const char *str); |
||||
struct UartBuffer* Uart_Buf_Init(); |
||||
|
||||
|
||||
#if UART_BUFF_EN |
||||
LOCAL void Uart_Buf_Cpy(struct UartBuffer* pCur, char* pdata , uint16 data_len); |
||||
void uart_buf_free(struct UartBuffer* pBuff); |
||||
void tx_buff_enq(char* pdata, uint16 data_len ); |
||||
LOCAL void tx_fifo_insert(struct UartBuffer* pTxBuff, uint8 data_len, uint8 uart_no); |
||||
void tx_start_uart_buffer(uint8 uart_no); |
||||
uint16 rx_buff_deq(char* pdata, uint16 data_len ); |
||||
void Uart_rx_buff_enq(); |
||||
#endif |
||||
void uart_rx_intr_enable(uint8 uart_no); |
||||
void uart_rx_intr_disable(uint8 uart_no); |
||||
void uart0_tx_buffer(uint8 *buf, uint16 len); |
||||
|
||||
//==============================================
|
||||
#define FUNC_UART0_CTS 4 |
||||
#define FUNC_U0CTS 4 |
||||
#define FUNC_U1TXD_BK 2 |
||||
#define UART_LINE_INV_MASK (0x3f<<19) |
||||
void UART_SetWordLength(uint8 uart_no, UartBitsNum4Char len); |
||||
void UART_SetStopBits(uint8 uart_no, UartStopBitsNum bit_num); |
||||
void UART_SetLineInverse(uint8 uart_no, UART_LineLevelInverse inverse_mask); |
||||
void UART_SetParity(uint8 uart_no, UartParityMode Parity_mode); |
||||
void UART_SetBaudrate(uint8 uart_no,uint32 baud_rate); |
||||
void UART_SetFlowCtrl(uint8 uart_no,UART_HwFlowCtrl flow_ctrl,uint8 rx_thresh); |
||||
void UART_WaitTxFifoEmpty(uint8 uart_no , uint32 time_out_us); //do not use if tx flow control enabled
|
||||
void UART_ResetFifo(uint8 uart_no); |
||||
void UART_ClearIntrStatus(uint8 uart_no,uint32 clr_mask); |
||||
void UART_SetIntrEna(uint8 uart_no,uint32 ena_mask); |
||||
void UART_SetPrintPort(uint8 uart_no); |
||||
bool UART_CheckOutputFinished(uint8 uart_no, uint32 time_out_us); |
||||
//==============================================
|
||||
|
||||
#endif |
||||
|
@ -1,156 +0,0 @@ |
||||
/*
|
||||
* File : uart_register.h |
||||
* Copyright (C) 2013 - 2016, Espressif Systems |
||||
* |
||||
* This program is free software: you can redistribute it and/or modify |
||||
* it under the terms of version 3 of the GNU General Public License as |
||||
* published by the Free Software Foundation. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License along |
||||
* with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/ |
||||
/*
|
||||
* Copyright (c) 2010 - 2011 Espressif System |
||||
* |
||||
*/ |
||||
|
||||
#ifndef UART_REGISTER_H_ |
||||
#define UART_REGISTER_H_ |
||||
|
||||
#define REG_UART_BASE(i) (0x60000000 + (i)*0xf00) |
||||
//version value:32'h062000
|
||||
|
||||
#define UART_FIFO(i) (REG_UART_BASE(i) + 0x0) |
||||
#define UART_RXFIFO_RD_BYTE 0x000000FF |
||||
#define UART_RXFIFO_RD_BYTE_S 0 |
||||
|
||||
#define UART_INT_RAW(i) (REG_UART_BASE(i) + 0x4) |
||||
#define UART_RXFIFO_TOUT_INT_RAW (BIT(8)) |
||||
#define UART_BRK_DET_INT_RAW (BIT(7)) |
||||
#define UART_CTS_CHG_INT_RAW (BIT(6)) |
||||
#define UART_DSR_CHG_INT_RAW (BIT(5)) |
||||
#define UART_RXFIFO_OVF_INT_RAW (BIT(4)) |
||||
#define UART_FRM_ERR_INT_RAW (BIT(3)) |
||||
#define UART_PARITY_ERR_INT_RAW (BIT(2)) |
||||
#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1)) |
||||
#define UART_RXFIFO_FULL_INT_RAW (BIT(0)) |
||||
|
||||
#define UART_INT_ST(i) (REG_UART_BASE(i) + 0x8) |
||||
#define UART_RXFIFO_TOUT_INT_ST (BIT(8)) |
||||
#define UART_BRK_DET_INT_ST (BIT(7)) |
||||
#define UART_CTS_CHG_INT_ST (BIT(6)) |
||||
#define UART_DSR_CHG_INT_ST (BIT(5)) |
||||
#define UART_RXFIFO_OVF_INT_ST (BIT(4)) |
||||
#define UART_FRM_ERR_INT_ST (BIT(3)) |
||||
#define UART_PARITY_ERR_INT_ST (BIT(2)) |
||||
#define UART_TXFIFO_EMPTY_INT_ST (BIT(1)) |
||||
#define UART_RXFIFO_FULL_INT_ST (BIT(0)) |
||||
|
||||
#define UART_INT_ENA(i) (REG_UART_BASE(i) + 0xC) |
||||
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8)) |
||||
#define UART_BRK_DET_INT_ENA (BIT(7)) |
||||
#define UART_CTS_CHG_INT_ENA (BIT(6)) |
||||
#define UART_DSR_CHG_INT_ENA (BIT(5)) |
||||
#define UART_RXFIFO_OVF_INT_ENA (BIT(4)) |
||||
#define UART_FRM_ERR_INT_ENA (BIT(3)) |
||||
#define UART_PARITY_ERR_INT_ENA (BIT(2)) |
||||
#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1)) |
||||
#define UART_RXFIFO_FULL_INT_ENA (BIT(0)) |
||||
|
||||
#define UART_INT_CLR(i) (REG_UART_BASE(i) + 0x10) |
||||
#define UART_RXFIFO_TOUT_INT_CLR (BIT(8)) |
||||
#define UART_BRK_DET_INT_CLR (BIT(7)) |
||||
#define UART_CTS_CHG_INT_CLR (BIT(6)) |
||||
#define UART_DSR_CHG_INT_CLR (BIT(5)) |
||||
#define UART_RXFIFO_OVF_INT_CLR (BIT(4)) |
||||
#define UART_FRM_ERR_INT_CLR (BIT(3)) |
||||
#define UART_PARITY_ERR_INT_CLR (BIT(2)) |
||||
#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1)) |
||||
#define UART_RXFIFO_FULL_INT_CLR (BIT(0)) |
||||
|
||||
#define UART_CLKDIV(i) (REG_UART_BASE(i) + 0x14) |
||||
#define UART_CLKDIV_CNT 0x000FFFFF |
||||
#define UART_CLKDIV_S 0 |
||||
|
||||
#define UART_AUTOBAUD(i) (REG_UART_BASE(i) + 0x18) |
||||
#define UART_GLITCH_FILT 0x000000FF |
||||
#define UART_GLITCH_FILT_S 8 |
||||
#define UART_AUTOBAUD_EN (BIT(0)) |
||||
|
||||
#define UART_STATUS(i) (REG_UART_BASE(i) + 0x1C) |
||||
#define UART_TXD (BIT(31)) |
||||
#define UART_RTSN (BIT(30)) |
||||
#define UART_DTRN (BIT(29)) |
||||
#define UART_TXFIFO_CNT 0x000000FF |
||||
#define UART_TXFIFO_CNT_S 16 |
||||
#define UART_RXD (BIT(15)) |
||||
#define UART_CTSN (BIT(14)) |
||||
#define UART_DSRN (BIT(13)) |
||||
#define UART_RXFIFO_CNT 0x000000FF |
||||
#define UART_RXFIFO_CNT_S 0 |
||||
|
||||
#define UART_CONF0(i) (REG_UART_BASE(i) + 0x20) |
||||
#define UART_DTR_INV (BIT(24)) |
||||
#define UART_RTS_INV (BIT(23)) |
||||
#define UART_TXD_INV (BIT(22)) |
||||
#define UART_DSR_INV (BIT(21)) |
||||
#define UART_CTS_INV (BIT(20)) |
||||
#define UART_RXD_INV (BIT(19)) |
||||
#define UART_TXFIFO_RST (BIT(18)) |
||||
#define UART_RXFIFO_RST (BIT(17)) |
||||
#define UART_IRDA_EN (BIT(16)) |
||||
#define UART_TX_FLOW_EN (BIT(15)) |
||||
#define UART_LOOPBACK (BIT(14)) |
||||
#define UART_IRDA_RX_INV (BIT(13)) |
||||
#define UART_IRDA_TX_INV (BIT(12)) |
||||
#define UART_IRDA_WCTL (BIT(11)) |
||||
#define UART_IRDA_TX_EN (BIT(10)) |
||||
#define UART_IRDA_DPLX (BIT(9)) |
||||
#define UART_TXD_BRK (BIT(8)) |
||||
#define UART_SW_DTR (BIT(7)) |
||||
#define UART_SW_RTS (BIT(6)) |
||||
#define UART_STOP_BIT_NUM 0x00000003 |
||||
#define UART_STOP_BIT_NUM_S 4 |
||||
#define UART_BIT_NUM 0x00000003 |
||||
#define UART_BIT_NUM_S 2 |
||||
#define UART_PARITY_EN (BIT(1)) |
||||
#define UART_PARITY_EN_M 0x00000001 |
||||
#define UART_PARITY_EN_S 1 |
||||
#define UART_PARITY (BIT(0)) |
||||
#define UART_PARITY_M 0x00000001 |
||||
#define UART_PARITY_S 0 |
||||
|
||||
#define UART_CONF1(i) (REG_UART_BASE(i) + 0x24) |
||||
#define UART_RX_TOUT_EN (BIT(31)) |
||||
#define UART_RX_TOUT_THRHD 0x0000007F |
||||
#define UART_RX_TOUT_THRHD_S 24 |
||||
#define UART_RX_FLOW_EN (BIT(23)) |
||||
#define UART_RX_FLOW_THRHD 0x0000007F |
||||
#define UART_RX_FLOW_THRHD_S 16 |
||||
#define UART_TXFIFO_EMPTY_THRHD 0x0000007F |
||||
#define UART_TXFIFO_EMPTY_THRHD_S 8 |
||||
#define UART_RXFIFO_FULL_THRHD 0x0000007F |
||||
#define UART_RXFIFO_FULL_THRHD_S 0 |
||||
|
||||
#define UART_LOWPULSE(i) (REG_UART_BASE(i) + 0x28) |
||||
#define UART_LOWPULSE_MIN_CNT 0x000FFFFF |
||||
#define UART_LOWPULSE_MIN_CNT_S 0 |
||||
|
||||
#define UART_HIGHPULSE(i) (REG_UART_BASE(i) + 0x2C) |
||||
#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF |
||||
#define UART_HIGHPULSE_MIN_CNT_S 0 |
||||
|
||||
#define UART_PULSE_NUM(i) (REG_UART_BASE(i) + 0x30) |
||||
#define UART_PULSE_NUM_CNT 0x0003FF |
||||
#define UART_PULSE_NUM_CNT_S 0 |
||||
|
||||
#define UART_DATE(i) (REG_UART_BASE(i) + 0x78) |
||||
#define UART_ID(i) (REG_UART_BASE(i) + 0x7C) |
||||
|
||||
#endif // UART_REGISTER_H_INCLUDED
|
||||
|
@ -1,12 +0,0 @@ |
||||
STEP 1: Copy driver and include folders to your project sub-folder, such as app folder. Unused drivers can be removed in your project. |
||||
|
||||
STEP 2: Modify Makefile in app folder. |
||||
1). Search SUBDIRS, add driver as subdir: |
||||
SUBDIRS= \ |
||||
user \ |
||||
driver |
||||
|
||||
2). Search COMPONENTS_eagle.app.v6, add libdriver.a: |
||||
COMPONENTS_eagle.app.v6 = \ |
||||
user/libuser.a \ |
||||
driver/libdriver.a |
@ -1,40 +0,0 @@ |
||||
1¡¢compile options |
||||
|
||||
(1) COMPILE |
||||
Possible value: gcc |
||||
Default value: |
||||
If not set, use xt-xcc by default. |
||||
|
||||
(2) BOOT |
||||
Possible value: none/old/new |
||||
none: no need boot |
||||
old: use boot_v1.1 |
||||
new: use boot_v1.2+ |
||||
Default value: none |
||||
|
||||
(3) APP |
||||
Possible value: 0/1/2 |
||||
0: original mode, generate eagle.app.v6.flash.bin and eagle.app.v6.irom0text.bin |
||||
1: generate user1 |
||||
2: generate user2 |
||||
Default value: 0 |
||||
|
||||
(3) SPI_SPEED |
||||
Possible value: 20/26.7/40/80 |
||||
Default value: 40 |
||||
|
||||
(4) SPI_MODE |
||||
Possible value: QIO/QOUT/DIO/DOUT |
||||
Default value: QIO |
||||
|
||||
(4) SPI_SIZE_MAP |
||||
Possible value: 0/2/3/4/5/6 |
||||
Default value: 0 |
||||
|
||||
For example: |
||||
make COMPILE=gcc BOOT=new APP=1 SPI_SPEED=40 SPI_MODE=QIO SPI_SIZE_MAP=0 |
||||
|
||||
2¡¢You can also use gen_misc to make and generate specific bin you needed. |
||||
Linux: ./gen_misc.sh |
||||
Windows: gen_misc.bat |
||||
Follow the tips and steps. |
@ -1,8 +0,0 @@ |
||||
if you want to use AIRKISS2.0 LAN discovery, should include airkiss.h and include libairkiss.a in makefile. |
||||
|
||||
you can follow the steps below to achieve the function of LAN discovery. |
||||
1.scan the two-dimension code in your wechat. |
||||
2.running this smartconfig example. |
||||
3.wait device connect to AP and LAN discovery. |
||||
|
||||
More detailed introduction refer to wechat. |
@ -1,124 +0,0 @@ |
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of object file images to be generated ()
|
||||
# GEN_BINS - list of binaries to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
TARGET = eagle
|
||||
#FLAVOR = release
|
||||
FLAVOR = debug
|
||||
|
||||
#EXTRA_CCFLAGS += -u
|
||||
|
||||
ifndef PDIR # {
|
||||
GEN_IMAGES= eagle.app.v6.out
|
||||
GEN_BINS= eagle.app.v6.bin
|
||||
SPECIAL_MKTARGETS=$(APP_MKTARGETS)
|
||||
SUBDIRS= \
|
||||
user
|
||||
|
||||
endif # } PDIR
|
||||
|
||||
APPDIR = .
|
||||
LDDIR = ../ld
|
||||
|
||||
CCFLAGS += -Os
|
||||
|
||||
TARGET_LDFLAGS = \
|
||||
-nostdlib \
|
||||
-Wl,-EL \
|
||||
--longcalls \
|
||||
--text-section-literals
|
||||
|
||||
ifeq ($(FLAVOR),debug) |
||||
TARGET_LDFLAGS += -g -O2
|
||||
endif |
||||
|
||||
ifeq ($(FLAVOR),release) |
||||
TARGET_LDFLAGS += -g -O0
|
||||
endif |
||||
|
||||
COMPONENTS_eagle.app.v6 = \
|
||||
user/libuser.a
|
||||
|
||||
LINKFLAGS_eagle.app.v6 = \
|
||||
-L../lib \
|
||||
-nostdlib \
|
||||
-T$(LD_FILE) \
|
||||
-Wl,--no-check-sections \
|
||||
-u call_user_start \
|
||||
-Wl,-static \
|
||||
-Wl,--start-group \
|
||||
-lc \
|
||||
-lgcc \
|
||||
-lhal \
|
||||
-lphy \
|
||||
-lpp \
|
||||
-lnet80211 \
|
||||
-llwip \
|
||||
-lwpa \
|
||||
-lcrypto \
|
||||
-lmain \
|
||||
-ljson \
|
||||
-lssl \
|
||||
-lupgrade \
|
||||
-lsmartconfig \
|
||||
-lairkiss\
|
||||
$(DEP_LIBS_eagle.app.v6) \
|
||||
-Wl,--end-group
|
||||
|
||||
DEPENDS_eagle.app.v6 = \
|
||||
$(LD_FILE) \
|
||||
$(LDDIR)/eagle.rom.addr.v6.ld
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
|
||||
#UNIVERSAL_TARGET_DEFINES = \
|
||||
|
||||
# Other potential configuration flags include:
|
||||
# -DTXRX_TXBUF_DEBUG
|
||||
# -DTXRX_RXBUF_DEBUG
|
||||
# -DWLAN_CONFIG_CCX
|
||||
CONFIGURATION_DEFINES = -DICACHE_FLASH
|
||||
|
||||
DEFINES += \
|
||||
$(UNIVERSAL_TARGET_DEFINES) \
|
||||
$(CONFIGURATION_DEFINES)
|
||||
|
||||
DDEFINES += \
|
||||
$(UNIVERSAL_TARGET_DEFINES) \
|
||||
$(CONFIGURATION_DEFINES)
|
||||
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
||||
.PHONY: FORCE |
||||
FORCE: |
||||
|
@ -1,147 +0,0 @@ |
||||
@echo off |
||||
|
||||
echo gen_misc.bat version 20150511 |
||||
echo . |
||||
|
||||
echo Please follow below steps(1-5) to generate specific bin(s): |
||||
echo STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none) |
||||
set input=default |
||||
set /p input=enter(0/1/2, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set boot=old |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set boot=new |
||||
) else ( |
||||
set boot=none |
||||
) |
||||
) |
||||
|
||||
echo boot mode: %boot% |
||||
echo. |
||||
|
||||
echo STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin) |
||||
set input=default |
||||
set /p input=enter (0/1/2, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=1 |
||||
echo generate bin: user1.bin |
||||
) |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=2 |
||||
echo generate bin: user2.bin |
||||
) |
||||
) else ( |
||||
if %boot% neq none ( |
||||
set boot=none |
||||
echo ignore boot |
||||
) |
||||
set app=0 |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
)) |
||||
|
||||
echo. |
||||
|
||||
echo STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set spi_speed=20 |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set spi_speed=26.7 |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_speed=80 |
||||
) else ( |
||||
set spi_speed=40 |
||||
))) |
||||
|
||||
echo spi speed: %spi_speed% MHz |
||||
echo. |
||||
|
||||
echo STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
set spi_mode=QOUT |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
set spi_mode=DIO |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_mode=DOUT |
||||
) else ( |
||||
set spi_mode=QIO |
||||
))) |
||||
|
||||
echo spi mode: %spi_mode% |
||||
echo. |
||||
|
||||
echo STEP 5: choose flash size and map |
||||
echo 0= 512KB( 256KB+ 256KB) |
||||
echo 2=1024KB( 512KB+ 512KB) |
||||
echo 3=2048KB( 512KB+ 512KB) |
||||
echo 4=4096KB( 512KB+ 512KB) |
||||
echo 5=2048KB(1024KB+1024KB) |
||||
echo 6=4096KB(1024KB+1024KB) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3/4/5/6, default 0): |
||||
|
||||
if %input% equ 2 ( |
||||
set spi_size_map=2 |
||||
echo spi size: 1024KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_size_map=3 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 4 ( |
||||
set spi_size_map=4 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 5 ( |
||||
set spi_size_map=5 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
if %input% equ 6 ( |
||||
set spi_size_map=6 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
set spi_size_map=0 |
||||
echo spi size: 512KB |
||||
echo spi ota map: 256KB + 256KB |
||||
) |
||||
) |
||||
) |
||||
) |
||||
) |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo. |
||||
echo start... |
||||
echo. |
||||
|
||||
make BOOT=%boot% APP=%app% SPI_SPEED=%spi_speed% SPI_MODE=%spi_mode% SPI_SIZE=%spi_size_map% |
||||
|
@ -1,150 +0,0 @@ |
||||
#!/bin/bash |
||||
|
||||
echo "gen_misc.sh version 20150511" |
||||
echo "" |
||||
|
||||
echo "Please follow below steps(1-5) to generate specific bin(s):" |
||||
echo "STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none)" |
||||
echo "enter(0/1/2, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
boot=none |
||||
elif [ $input == 0 ]; then |
||||
boot=old |
||||
elif [ $input == 1 ]; then |
||||
boot=new |
||||
else |
||||
boot=none |
||||
fi |
||||
|
||||
echo "boot mode: $boot" |
||||
echo "" |
||||
|
||||
echo "STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin)" |
||||
echo "enter (0/1/2, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
elif [ $input == 1 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=1 |
||||
echo "generate bin: user1.bin" |
||||
fi |
||||
elif [ $input == 2 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=2 |
||||
echo "generate bin: user2.bin" |
||||
fi |
||||
else |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
echo "STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz)" |
||||
echo "enter (0/1/2/3, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_speed=40 |
||||
elif [ $input == 0 ]; then |
||||
spi_speed=20 |
||||
elif [ $input == 1 ]; then |
||||
spi_speed=26.7 |
||||
elif [ $input == 3 ]; then |
||||
spi_speed=80 |
||||
else |
||||
spi_speed=40 |
||||
fi |
||||
|
||||
echo "spi speed: $spi_speed MHz" |
||||
echo "" |
||||
|
||||
echo "STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT)" |
||||
echo "enter (0/1/2/3, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_mode=QIO |
||||
elif [ $input == 1 ]; then |
||||
spi_mode=QOUT |
||||
elif [ $input == 2 ]; then |
||||
spi_mode=DIO |
||||
elif [ $input == 3 ]; then |
||||
spi_mode=DOUT |
||||
else |
||||
spi_mode=QIO |
||||
fi |
||||
|
||||
echo "spi mode: $spi_mode" |
||||
echo "" |
||||
|
||||
echo "STEP 5: choose spi size and map" |
||||
echo " 0= 512KB( 256KB+ 256KB)" |
||||
echo " 2=1024KB( 512KB+ 512KB)" |
||||
echo " 3=2048KB( 512KB+ 512KB)" |
||||
echo " 4=4096KB( 512KB+ 512KB)" |
||||
echo " 5=2048KB(1024KB+1024KB)" |
||||
echo " 6=4096KB(1024KB+1024KB)" |
||||
echo "enter (0/2/3/4/5/6, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
elif [ $input == 2 ]; then |
||||
spi_size_map=2 |
||||
echo "spi size: 1024KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 3 ]; then |
||||
spi_size_map=3 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 4 ]; then |
||||
spi_size_map=4 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 5 ]; then |
||||
spi_size_map=5 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
elif [ $input == 6 ]; then |
||||
spi_size_map=6 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
else |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo "" |
||||
echo "start..." |
||||
echo "" |
||||
|
||||
make COMPILE=gcc BOOT=$boot APP=$app SPI_SPEED=$spi_speed SPI_MODE=$spi_mode SPI_SIZE_MAP=$spi_size_map |
@ -1,5 +0,0 @@ |
||||
#ifndef __USER_CONFIG_H__ |
||||
#define __USER_CONFIG_H__ |
||||
|
||||
#endif |
||||
|
Binary file not shown.
@ -1,45 +0,0 @@ |
||||
|
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of images to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
ifndef PDIR |
||||
GEN_LIBS = libuser.a
|
||||
endif |
||||
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
#DEFINES +=
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
INCLUDES += -I ./
|
||||
INCLUDES += -I ../../include/ets
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
@ -1,192 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_main.c |
||||
* |
||||
* Description: entry file of user application |
||||
* |
||||
* Modification history: |
||||
* 2014/1/1, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "osapi.h" |
||||
#include "ip_addr.h" |
||||
#include "espconn.h" |
||||
#include "mem.h" |
||||
|
||||
|
||||
#include "user_interface.h" |
||||
#include "smartconfig.h" |
||||
#include "airkiss.h" |
||||
|
||||
|
||||
#define DEVICE_TYPE "gh_9e2cff3dfa51" //wechat public number
|
||||
#define DEVICE_ID "122475" //model ID
|
||||
|
||||
#define DEFAULT_LAN_PORT 12476 |
||||
|
||||
LOCAL esp_udp ssdp_udp; |
||||
LOCAL struct espconn pssdpudpconn; |
||||
LOCAL os_timer_t ssdp_time_serv; |
||||
|
||||
uint8_t lan_buf[200]; |
||||
uint16_t lan_buf_len; |
||||
uint8 udp_sent_cnt = 0; |
||||
|
||||
const airkiss_config_t akconf = |
||||
{ |
||||
(airkiss_memset_fn)&memset, |
||||
(airkiss_memcpy_fn)&memcpy, |
||||
(airkiss_memcmp_fn)&memcmp, |
||||
0, |
||||
}; |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
airkiss_wifilan_time_callback(void) |
||||
{ |
||||
uint16 i; |
||||
airkiss_lan_ret_t ret; |
||||
|
||||
if ((udp_sent_cnt++) >30) { |
||||
udp_sent_cnt = 0; |
||||
os_timer_disarm(&ssdp_time_serv);//s
|
||||
//return;
|
||||
} |
||||
|
||||
ssdp_udp.remote_port = DEFAULT_LAN_PORT; |
||||
ssdp_udp.remote_ip[0] = 255; |
||||
ssdp_udp.remote_ip[1] = 255; |
||||
ssdp_udp.remote_ip[2] = 255; |
||||
ssdp_udp.remote_ip[3] = 255; |
||||
lan_buf_len = sizeof(lan_buf); |
||||
ret = airkiss_lan_pack(AIRKISS_LAN_SSDP_NOTIFY_CMD, |
||||
DEVICE_TYPE, DEVICE_ID, 0, 0, lan_buf, &lan_buf_len, &akconf); |
||||
if (ret != AIRKISS_LAN_PAKE_READY) { |
||||
os_printf("Pack lan packet error!"); |
||||
return; |
||||
} |
||||
|
||||
ret = espconn_sendto(&pssdpudpconn, lan_buf, lan_buf_len); |
||||
if (ret != 0) { |
||||
os_printf("UDP send error!"); |
||||
} |
||||
os_printf("Finish send notify!\n"); |
||||
} |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
airkiss_wifilan_recv_callbk(void *arg, char *pdata, unsigned short len) |
||||
{ |
||||
uint16 i; |
||||
remot_info* pcon_info = NULL; |
||||
|
||||
airkiss_lan_ret_t ret = airkiss_lan_recv(pdata, len, &akconf); |
||||
airkiss_lan_ret_t packret; |
||||
|
||||
switch (ret){ |
||||
case AIRKISS_LAN_SSDP_REQ: |
||||
espconn_get_connection_info(&pssdpudpconn, &pcon_info, 0); |
||||
os_printf("remote ip: %d.%d.%d.%d \r\n",pcon_info->remote_ip[0],pcon_info->remote_ip[1], |
||||
pcon_info->remote_ip[2],pcon_info->remote_ip[3]); |
||||
os_printf("remote port: %d \r\n",pcon_info->remote_port); |
||||
|
||||
pssdpudpconn.proto.udp->remote_port = pcon_info->remote_port; |
||||
os_memcpy(pssdpudpconn.proto.udp->remote_ip,pcon_info->remote_ip,4); |
||||
ssdp_udp.remote_port = DEFAULT_LAN_PORT; |
||||
|
||||
lan_buf_len = sizeof(lan_buf); |
||||
packret = airkiss_lan_pack(AIRKISS_LAN_SSDP_RESP_CMD, |
||||
DEVICE_TYPE, DEVICE_ID, 0, 0, lan_buf, &lan_buf_len, &akconf); |
||||
|
||||
if (packret != AIRKISS_LAN_PAKE_READY) { |
||||
os_printf("Pack lan packet error!"); |
||||
return; |
||||
} |
||||
|
||||
os_printf("\r\n\r\n"); |
||||
for (i=0; i<lan_buf_len; i++) |
||||
os_printf("%c",lan_buf[i]); |
||||
os_printf("\r\n\r\n"); |
||||
|
||||
packret = espconn_sendto(&pssdpudpconn, lan_buf, lan_buf_len); |
||||
if (packret != 0) { |
||||
os_printf("LAN UDP Send err!"); |
||||
} |
||||
|
||||
break; |
||||
default: |
||||
os_printf("Pack is not ssdq req!%d\r\n",ret); |
||||
break; |
||||
} |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
airkiss_start_discover(void) |
||||
{ |
||||
ssdp_udp.local_port = DEFAULT_LAN_PORT; |
||||
pssdpudpconn.type = ESPCONN_UDP; |
||||
pssdpudpconn.proto.udp = &(ssdp_udp); |
||||
espconn_regist_recvcb(&pssdpudpconn, airkiss_wifilan_recv_callbk); |
||||
espconn_create(&pssdpudpconn); |
||||
|
||||
os_timer_disarm(&ssdp_time_serv); |
||||
os_timer_setfn(&ssdp_time_serv, (os_timer_func_t *)airkiss_wifilan_time_callback, NULL); |
||||
os_timer_arm(&ssdp_time_serv, 1000, 1);//1s
|
||||
} |
||||
|
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
smartconfig_done(sc_status status, void *pdata) |
||||
{ |
||||
switch(status) { |
||||
case SC_STATUS_WAIT: |
||||
os_printf("SC_STATUS_WAIT\n"); |
||||
break; |
||||
case SC_STATUS_FIND_CHANNEL: |
||||
os_printf("SC_STATUS_FIND_CHANNEL\n"); |
||||
break; |
||||
case SC_STATUS_GETTING_SSID_PSWD: |
||||
os_printf("SC_STATUS_GETTING_SSID_PSWD\n"); |
||||
sc_type *type = pdata; |
||||
if (*type == SC_TYPE_ESPTOUCH) { |
||||
os_printf("SC_TYPE:SC_TYPE_ESPTOUCH\n"); |
||||
} else { |
||||
os_printf("SC_TYPE:SC_TYPE_AIRKISS\n"); |
||||
} |
||||
break; |
||||
case SC_STATUS_LINK: |
||||
os_printf("SC_STATUS_LINK\n"); |
||||
struct station_config *sta_conf = pdata; |
||||
|
||||
wifi_station_set_config(sta_conf); |
||||
wifi_station_disconnect(); |
||||
wifi_station_connect(); |
||||
break; |
||||
case SC_STATUS_LINK_OVER: |
||||
os_printf("SC_STATUS_LINK_OVER\n"); |
||||
if (pdata != NULL) { |
||||
//SC_TYPE_ESPTOUCH
|
||||
uint8 phone_ip[4] = {0}; |
||||
|
||||
os_memcpy(phone_ip, (uint8*)pdata, 4); |
||||
os_printf("Phone ip: %d.%d.%d.%d\n",phone_ip[0],phone_ip[1],phone_ip[2],phone_ip[3]); |
||||
} else { |
||||
//SC_TYPE_AIRKISS - support airkiss v2.0
|
||||
airkiss_start_discover(); |
||||
} |
||||
smartconfig_stop(); |
||||
break; |
||||
} |
||||
|
||||
} |
||||
|
||||
void user_rf_pre_init(void) |
||||
{ |
||||
} |
||||
|
||||
void user_init(void) |
||||
{ |
||||
os_printf("SDK version:%s\n", system_get_sdk_version()); |
||||
smartconfig_set_type(SC_TYPE_AIRKISS); //SC_TYPE_ESPTOUCH,SC_TYPE_AIRKISS,SC_TYPE_ESPTOUCH_AIRKISS
|
||||
wifi_set_opmode(STATION_MODE); |
||||
smartconfig_start(smartconfig_done); |
||||
} |
@ -1,122 +0,0 @@ |
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of object file images to be generated ()
|
||||
# GEN_BINS - list of binaries to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
TARGET = eagle
|
||||
#FLAVOR = release
|
||||
FLAVOR = debug
|
||||
|
||||
#EXTRA_CCFLAGS += -u
|
||||
|
||||
ifndef PDIR # {
|
||||
GEN_IMAGES= eagle.app.v6.out
|
||||
GEN_BINS= eagle.app.v6.bin
|
||||
SPECIAL_MKTARGETS=$(APP_MKTARGETS)
|
||||
SUBDIRS= \
|
||||
user \
|
||||
driver
|
||||
|
||||
endif # } PDIR
|
||||
|
||||
APPDIR = .
|
||||
LDDIR = ../ld
|
||||
|
||||
CCFLAGS += -Os
|
||||
|
||||
TARGET_LDFLAGS = \
|
||||
-nostdlib \
|
||||
-Wl,-EL \
|
||||
--longcalls \
|
||||
--text-section-literals
|
||||
|
||||
ifeq ($(FLAVOR),debug) |
||||
TARGET_LDFLAGS += -g -O2
|
||||
endif |
||||
|
||||
ifeq ($(FLAVOR),release) |
||||
TARGET_LDFLAGS += -g -O0
|
||||
endif |
||||
|
||||
COMPONENTS_eagle.app.v6 = \
|
||||
user/libuser.a \
|
||||
driver/libdriver.a
|
||||
|
||||
LINKFLAGS_eagle.app.v6 = \
|
||||
-L../lib \
|
||||
-nostdlib \
|
||||
-T$(LD_FILE) \
|
||||
-Wl,--no-check-sections \
|
||||
-u call_user_start \
|
||||
-Wl,-static \
|
||||
-Wl,--start-group \
|
||||
-lc \
|
||||
-lgcc \
|
||||
-lhal \
|
||||
-lphy \
|
||||
-lpp \
|
||||
-lnet80211 \
|
||||
-llwip \
|
||||
-lwpa \
|
||||
-lmain \
|
||||
-lwps \
|
||||
-lcrypto \
|
||||
$(DEP_LIBS_eagle.app.v6) \
|
||||
-Wl,--end-group
|
||||
|
||||
DEPENDS_eagle.app.v6 = \
|
||||
$(LD_FILE) \
|
||||
$(LDDIR)/eagle.rom.addr.v6.ld
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
|
||||
#UNIVERSAL_TARGET_DEFINES = \
|
||||
|
||||
# Other potential configuration flags include:
|
||||
# -DTXRX_TXBUF_DEBUG
|
||||
# -DTXRX_RXBUF_DEBUG
|
||||
# -DWLAN_CONFIG_CCX
|
||||
CONFIGURATION_DEFINES = -DICACHE_FLASH
|
||||
|
||||
DEFINES += \
|
||||
$(UNIVERSAL_TARGET_DEFINES) \
|
||||
$(CONFIGURATION_DEFINES)
|
||||
|
||||
DDEFINES += \
|
||||
$(UNIVERSAL_TARGET_DEFINES) \
|
||||
$(CONFIGURATION_DEFINES)
|
||||
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
||||
.PHONY: FORCE |
||||
FORCE: |
||||
|
@ -1,44 +0,0 @@ |
||||
|
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of images to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
ifndef PDIR |
||||
GEN_LIBS = libdriver.a
|
||||
endif |
||||
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
#DEFINES +=
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
INCLUDES += -I ./
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
@ -1,162 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: key.c |
||||
* |
||||
* Description: key driver, now can use different gpio and install different function |
||||
* |
||||
* Modification history: |
||||
* 2014/5/1, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
#include "ets_sys.h" |
||||
#include "os_type.h" |
||||
#include "osapi.h" |
||||
#include "mem.h" |
||||
#include "gpio.h" |
||||
#include "user_interface.h" |
||||
|
||||
#include "driver/key.h" |
||||
|
||||
LOCAL void key_intr_handler(struct keys_param *keys); |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_init_single |
||||
* Description : init single key's gpio and register function |
||||
* Parameters : uint8 gpio_id - which gpio to use |
||||
* uint32 gpio_name - gpio mux name |
||||
* uint32 gpio_func - gpio function |
||||
* key_function long_press - long press function, needed to install |
||||
* key_function short_press - short press function, needed to install |
||||
* Returns : single_key_param - single key parameter, needed by key init |
||||
*******************************************************************************/ |
||||
struct single_key_param *ICACHE_FLASH_ATTR |
||||
key_init_single(uint8 gpio_id, uint32 gpio_name, uint8 gpio_func, key_function long_press, key_function short_press) |
||||
{ |
||||
struct single_key_param *single_key = (struct single_key_param *)os_zalloc(sizeof(struct single_key_param)); |
||||
|
||||
single_key->gpio_id = gpio_id; |
||||
single_key->gpio_name = gpio_name; |
||||
single_key->gpio_func = gpio_func; |
||||
single_key->long_press = long_press; |
||||
single_key->short_press = short_press; |
||||
|
||||
return single_key; |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_init |
||||
* Description : init keys |
||||
* Parameters : key_param *keys - keys parameter, which inited by key_init_single |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
void ICACHE_FLASH_ATTR |
||||
key_init(struct keys_param *keys) |
||||
{ |
||||
uint8 i; |
||||
|
||||
ETS_GPIO_INTR_ATTACH(key_intr_handler, keys); |
||||
|
||||
ETS_GPIO_INTR_DISABLE(); |
||||
|
||||
for (i = 0; i < keys->key_num; i++) { |
||||
keys->single_key[i]->key_level = 1; |
||||
|
||||
PIN_FUNC_SELECT(keys->single_key[i]->gpio_name, keys->single_key[i]->gpio_func); |
||||
|
||||
gpio_output_set(0, 0, 0, GPIO_ID_PIN(keys->single_key[i]->gpio_id)); |
||||
|
||||
gpio_register_set(GPIO_PIN_ADDR(keys->single_key[i]->gpio_id), GPIO_PIN_INT_TYPE_SET(GPIO_PIN_INTR_DISABLE) |
||||
| GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_DISABLE) |
||||
| GPIO_PIN_SOURCE_SET(GPIO_AS_PIN_SOURCE)); |
||||
|
||||
//clear gpio14 status
|
||||
GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, BIT(keys->single_key[i]->gpio_id)); |
||||
|
||||
//enable interrupt
|
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_NEGEDGE); |
||||
} |
||||
|
||||
ETS_GPIO_INTR_ENABLE(); |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_5s_cb |
||||
* Description : long press 5s timer callback |
||||
* Parameters : single_key_param *single_key - single key parameter |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
key_5s_cb(struct single_key_param *single_key) |
||||
{ |
||||
os_timer_disarm(&single_key->key_5s); |
||||
|
||||
// low, then restart
|
||||
if (0 == GPIO_INPUT_GET(GPIO_ID_PIN(single_key->gpio_id))) { |
||||
if (single_key->long_press) { |
||||
single_key->long_press(); |
||||
} |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_50ms_cb |
||||
* Description : 50ms timer callback to check it's a real key push |
||||
* Parameters : single_key_param *single_key - single key parameter |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
key_50ms_cb(struct single_key_param *single_key) |
||||
{ |
||||
os_timer_disarm(&single_key->key_50ms); |
||||
|
||||
// high, then key is up
|
||||
if (1 == GPIO_INPUT_GET(GPIO_ID_PIN(single_key->gpio_id))) { |
||||
os_timer_disarm(&single_key->key_5s); |
||||
single_key->key_level = 1; |
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(single_key->gpio_id), GPIO_PIN_INTR_NEGEDGE); |
||||
|
||||
if (single_key->short_press) { |
||||
single_key->short_press(); |
||||
} |
||||
} else { |
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(single_key->gpio_id), GPIO_PIN_INTR_POSEDGE); |
||||
} |
||||
} |
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : key_intr_handler |
||||
* Description : key interrupt handler |
||||
* Parameters : key_param *keys - keys parameter, which inited by key_init_single |
||||
* Returns : none |
||||
*******************************************************************************/ |
||||
LOCAL void |
||||
key_intr_handler(struct keys_param *keys) |
||||
{ |
||||
uint8 i; |
||||
uint32 gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS); |
||||
|
||||
for (i = 0; i < keys->key_num; i++) { |
||||
if (gpio_status & BIT(keys->single_key[i]->gpio_id)) { |
||||
//disable interrupt
|
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_DISABLE); |
||||
|
||||
//clear interrupt status
|
||||
GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status & BIT(keys->single_key[i]->gpio_id)); |
||||
|
||||
if (keys->single_key[i]->key_level == 1) { |
||||
// 5s, restart & enter softap mode
|
||||
os_timer_disarm(&keys->single_key[i]->key_5s); |
||||
os_timer_setfn(&keys->single_key[i]->key_5s, (os_timer_func_t *)key_5s_cb, keys->single_key[i]); |
||||
os_timer_arm(&keys->single_key[i]->key_5s, 5000, 0); |
||||
keys->single_key[i]->key_level = 0; |
||||
gpio_pin_intr_state_set(GPIO_ID_PIN(keys->single_key[i]->gpio_id), GPIO_PIN_INTR_POSEDGE); |
||||
} else { |
||||
// 50ms, check if this is a real key up
|
||||
os_timer_disarm(&keys->single_key[i]->key_50ms); |
||||
os_timer_setfn(&keys->single_key[i]->key_50ms, (os_timer_func_t *)key_50ms_cb, keys->single_key[i]); |
||||
os_timer_arm(&keys->single_key[i]->key_50ms, 50, 0); |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
@ -1,147 +0,0 @@ |
||||
@echo off |
||||
|
||||
echo gen_misc.bat version 20150511 |
||||
echo . |
||||
|
||||
echo Please follow below steps(1-5) to generate specific bin(s): |
||||
echo STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none) |
||||
set input=default |
||||
set /p input=enter(0/1/2, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set boot=old |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set boot=new |
||||
) else ( |
||||
set boot=none |
||||
) |
||||
) |
||||
|
||||
echo boot mode: %boot% |
||||
echo. |
||||
|
||||
echo STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin) |
||||
set input=default |
||||
set /p input=enter (0/1/2, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=1 |
||||
echo generate bin: user1.bin |
||||
) |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
if %boot% equ none ( |
||||
set app=0 |
||||
echo choose no boot before |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
) else ( |
||||
set app=2 |
||||
echo generate bin: user2.bin |
||||
) |
||||
) else ( |
||||
if %boot% neq none ( |
||||
set boot=none |
||||
echo ignore boot |
||||
) |
||||
set app=0 |
||||
echo generate bin: eagle.flash.bin+eagle.irom0text.bin |
||||
)) |
||||
|
||||
echo. |
||||
|
||||
echo STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 2): |
||||
|
||||
if %input% equ 0 ( |
||||
set spi_speed=20 |
||||
) else ( |
||||
if %input% equ 1 ( |
||||
set spi_speed=26.7 |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_speed=80 |
||||
) else ( |
||||
set spi_speed=40 |
||||
))) |
||||
|
||||
echo spi speed: %spi_speed% MHz |
||||
echo. |
||||
|
||||
echo STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3, default 0): |
||||
|
||||
if %input% equ 1 ( |
||||
set spi_mode=QOUT |
||||
) else ( |
||||
if %input% equ 2 ( |
||||
set spi_mode=DIO |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_mode=DOUT |
||||
) else ( |
||||
set spi_mode=QIO |
||||
))) |
||||
|
||||
echo spi mode: %spi_mode% |
||||
echo. |
||||
|
||||
echo STEP 5: choose flash size and map |
||||
echo 0= 512KB( 256KB+ 256KB) |
||||
echo 2=1024KB( 512KB+ 512KB) |
||||
echo 3=2048KB( 512KB+ 512KB) |
||||
echo 4=4096KB( 512KB+ 512KB) |
||||
echo 5=2048KB(1024KB+1024KB) |
||||
echo 6=4096KB(1024KB+1024KB) |
||||
set input=default |
||||
set /p input=enter (0/1/2/3/4/5/6, default 0): |
||||
|
||||
if %input% equ 2 ( |
||||
set spi_size_map=2 |
||||
echo spi size: 1024KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 3 ( |
||||
set spi_size_map=3 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 4 ( |
||||
set spi_size_map=4 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 512KB + 512KB |
||||
) else ( |
||||
if %input% equ 5 ( |
||||
set spi_size_map=5 |
||||
echo spi size: 2048KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
if %input% equ 6 ( |
||||
set spi_size_map=6 |
||||
echo spi size: 4096KB |
||||
echo spi ota map: 1024KB + 1024KB |
||||
) else ( |
||||
set spi_size_map=0 |
||||
echo spi size: 512KB |
||||
echo spi ota map: 256KB + 256KB |
||||
) |
||||
) |
||||
) |
||||
) |
||||
) |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo. |
||||
echo start... |
||||
echo. |
||||
|
||||
make BOOT=%boot% APP=%app% SPI_SPEED=%spi_speed% SPI_MODE=%spi_mode% SPI_SIZE=%spi_size_map% |
||||
|
@ -1,150 +0,0 @@ |
||||
#!/bin/bash |
||||
|
||||
echo "gen_misc.sh version 20150511" |
||||
echo "" |
||||
|
||||
echo "Please follow below steps(1-5) to generate specific bin(s):" |
||||
echo "STEP 1: choose boot version(0=boot_v1.1, 1=boot_v1.2+, 2=none)" |
||||
echo "enter(0/1/2, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
boot=none |
||||
elif [ $input == 0 ]; then |
||||
boot=old |
||||
elif [ $input == 1 ]; then |
||||
boot=new |
||||
else |
||||
boot=none |
||||
fi |
||||
|
||||
echo "boot mode: $boot" |
||||
echo "" |
||||
|
||||
echo "STEP 2: choose bin generate(0=eagle.flash.bin+eagle.irom0text.bin, 1=user1.bin, 2=user2.bin)" |
||||
echo "enter (0/1/2, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
elif [ $input == 1 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=1 |
||||
echo "generate bin: user1.bin" |
||||
fi |
||||
elif [ $input == 2 ]; then |
||||
if [ $boot == none ]; then |
||||
app=0 |
||||
echo "choose no boot before" |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
else |
||||
app=2 |
||||
echo "generate bin: user2.bin" |
||||
fi |
||||
else |
||||
if [ $boot != none ]; then |
||||
boot=none |
||||
echo "ignore boot" |
||||
fi |
||||
app=0 |
||||
echo "generate bin: eagle.flash.bin+eagle.irom0text.bin" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
echo "STEP 3: choose spi speed(0=20MHz, 1=26.7MHz, 2=40MHz, 3=80MHz)" |
||||
echo "enter (0/1/2/3, default 2):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_speed=40 |
||||
elif [ $input == 0 ]; then |
||||
spi_speed=20 |
||||
elif [ $input == 1 ]; then |
||||
spi_speed=26.7 |
||||
elif [ $input == 3 ]; then |
||||
spi_speed=80 |
||||
else |
||||
spi_speed=40 |
||||
fi |
||||
|
||||
echo "spi speed: $spi_speed MHz" |
||||
echo "" |
||||
|
||||
echo "STEP 4: choose spi mode(0=QIO, 1=QOUT, 2=DIO, 3=DOUT)" |
||||
echo "enter (0/1/2/3, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_mode=QIO |
||||
elif [ $input == 1 ]; then |
||||
spi_mode=QOUT |
||||
elif [ $input == 2 ]; then |
||||
spi_mode=DIO |
||||
elif [ $input == 3 ]; then |
||||
spi_mode=DOUT |
||||
else |
||||
spi_mode=QIO |
||||
fi |
||||
|
||||
echo "spi mode: $spi_mode" |
||||
echo "" |
||||
|
||||
echo "STEP 5: choose spi size and map" |
||||
echo " 0= 512KB( 256KB+ 256KB)" |
||||
echo " 2=1024KB( 512KB+ 512KB)" |
||||
echo " 3=2048KB( 512KB+ 512KB)" |
||||
echo " 4=4096KB( 512KB+ 512KB)" |
||||
echo " 5=2048KB(1024KB+1024KB)" |
||||
echo " 6=4096KB(1024KB+1024KB)" |
||||
echo "enter (0/2/3/4/5/6, default 0):" |
||||
read input |
||||
|
||||
if [ -z "$input" ]; then |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
elif [ $input == 2 ]; then |
||||
spi_size_map=2 |
||||
echo "spi size: 1024KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 3 ]; then |
||||
spi_size_map=3 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 4 ]; then |
||||
spi_size_map=4 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 512KB + 512KB" |
||||
elif [ $input == 5 ]; then |
||||
spi_size_map=5 |
||||
echo "spi size: 2048KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
elif [ $input == 6 ]; then |
||||
spi_size_map=6 |
||||
echo "spi size: 4096KB" |
||||
echo "spi ota map: 1024KB + 1024KB" |
||||
else |
||||
spi_size_map=0 |
||||
echo "spi size: 512KB" |
||||
echo "spi ota map: 256KB + 256KB" |
||||
fi |
||||
|
||||
echo "" |
||||
|
||||
touch user/user_main.c |
||||
|
||||
echo "" |
||||
echo "start..." |
||||
echo "" |
||||
|
||||
make COMPILE=gcc BOOT=$boot APP=$app SPI_SPEED=$spi_speed SPI_MODE=$spi_mode SPI_SIZE_MAP=$spi_size_map |
@ -1,27 +0,0 @@ |
||||
#ifndef __KEY_H__ |
||||
#define __KEY_H__ |
||||
|
||||
#include "gpio.h" |
||||
|
||||
typedef void (* key_function)(void); |
||||
|
||||
struct single_key_param { |
||||
uint8 key_level; |
||||
uint8 gpio_id; |
||||
uint8 gpio_func; |
||||
uint32 gpio_name; |
||||
os_timer_t key_5s; |
||||
os_timer_t key_50ms; |
||||
key_function short_press; |
||||
key_function long_press; |
||||
}; |
||||
|
||||
struct keys_param { |
||||
uint8 key_num; |
||||
struct single_key_param **single_key; |
||||
}; |
||||
|
||||
struct single_key_param *key_init_single(uint8 gpio_id, uint32 gpio_name, uint8 gpio_func, key_function long_press, key_function short_press); |
||||
void key_init(struct keys_param *key); |
||||
|
||||
#endif |
@ -1,5 +0,0 @@ |
||||
#ifndef __USER_CONFIG_H__ |
||||
#define __USER_CONFIG_H__ |
||||
|
||||
#endif |
||||
|
@ -1,45 +0,0 @@ |
||||
|
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of images to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
ifndef PDIR |
||||
GEN_LIBS = libuser.a
|
||||
endif |
||||
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
#DEFINES +=
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
INCLUDES += -I ./
|
||||
INCLUDES += -I ../../include/ets
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile |
||||
|
@ -1,67 +0,0 @@ |
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi) |
||||
* |
||||
* FileName: user_main.c |
||||
* |
||||
* Description: entry file of user application |
||||
* |
||||
* Modification history: |
||||
* 2015/7/3, v1.0 create this file. |
||||
*******************************************************************************/ |
||||
|
||||
#include "osapi.h" |
||||
#include "user_interface.h" |
||||
|
||||
#include "driver/key.h" |
||||
|
||||
#define WPS_KEY_NUM 1 |
||||
|
||||
#define WPS_KEY_IO_MUX PERIPHS_IO_MUX_MTCK_U |
||||
#define WPS_KEY_IO_NUM 13 |
||||
#define WPS_KEY_IO_FUNC FUNC_GPIO13 |
||||
|
||||
LOCAL struct keys_param keys; |
||||
LOCAL struct single_key_param *single_key; |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_wps_status_cb(int status) |
||||
{ |
||||
switch (status) { |
||||
case WPS_CB_ST_SUCCESS: |
||||
wifi_wps_disable(); |
||||
wifi_station_connect(); |
||||
break; |
||||
case WPS_CB_ST_FAILED: |
||||
case WPS_CB_ST_TIMEOUT: |
||||
wifi_wps_start(); |
||||
break; |
||||
} |
||||
} |
||||
|
||||
LOCAL void ICACHE_FLASH_ATTR |
||||
user_wps_key_short_press(void) |
||||
{ |
||||
wifi_wps_disable(); |
||||
wifi_wps_enable(WPS_TYPE_PBC); |
||||
wifi_set_wps_cb(user_wps_status_cb); |
||||
wifi_wps_start(); |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_rf_pre_init(void) |
||||
{ |
||||
} |
||||
|
||||
void ICACHE_FLASH_ATTR |
||||
user_init(void) |
||||
{ |
||||
single_key = key_init_single(WPS_KEY_IO_NUM, WPS_KEY_IO_MUX, WPS_KEY_IO_FUNC, |
||||
NULL, user_wps_key_short_press); |
||||
|
||||
keys.key_num = WPS_KEY_NUM; |
||||
keys.single_key = &single_key; |
||||
|
||||
key_init(&keys); |
||||
|
||||
wifi_set_opmode(STATION_MODE); |
||||
} |
Loading…
Reference in new issue