Ting, a webserver example - first commit
This commit is contained in:
Jeroen Domburg
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#############################################################
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# Required variables for each makefile
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# Discard this section from all parent makefiles
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# Expected variables (with automatic defaults):
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# CSRCS (all "C" files in the dir)
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# SUBDIRS (all subdirs with a Makefile)
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# GEN_LIBS - list of libs to be generated ()
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# GEN_IMAGES - list of images to be generated ()
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# COMPONENTS_xxx - a list of libs/objs in the form
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# subdir/lib to be extracted and rolled up into
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# a generated lib/image xxx.a ()
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#
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ifndef PDIR
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GEN_LIBS = libdriver.a
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endif
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#############################################################
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# Configuration i.e. compile options etc.
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# Target specific stuff (defines etc.) goes in here!
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# Generally values applying to a tree are captured in the
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# makefile at its root level - these are then overridden
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# for a subtree within the makefile rooted therein
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#
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#DEFINES +=
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#############################################################
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# Recursion Magic - Don't touch this!!
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#
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# Each subtree potentially has an include directory
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# corresponding to the common APIs applicable to modules
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# rooted at that subtree. Accordingly, the INCLUDE PATH
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# of a module can only contain the include directories up
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# its parent path, and not its siblings
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#
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# Required for each makefile to inherit from the parent
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#
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INCLUDES := $(INCLUDES) -I $(PDIR)include
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INCLUDES += -I ./
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PDIR := ../$(PDIR)
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sinclude $(PDIR)Makefile
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+247
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/******************************************************************************
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* Copyright 2013-2014 Espressif Systems (Wuxi)
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*
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* FileName: uart.c
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*
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* Description: Two UART mode configration and interrupt handler.
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* Check your hardware connection while use this mode.
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*
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* Modification history:
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* 2014/3/12, v1.0 create this file.
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*******************************************************************************/
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#include "ets_sys.h"
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#include "osapi.h"
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#include "driver/uart.h"
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#include "driver/uart_register.h"
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//#include "ssc.h"
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//#include "at.h"
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// UartDev is defined and initialized in rom code.
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extern UartDevice UartDev;
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//extern os_event_t at_recvTaskQueue[at_recvTaskQueueLen];
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LOCAL void uart0_rx_intr_handler(void *para);
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/******************************************************************************
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* FunctionName : uart_config
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* Description : Internal used function
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* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
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* UART1 just used for debug output
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* Parameters : uart_no, use UART0 or UART1 defined ahead
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* Returns : NONE
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*******************************************************************************/
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LOCAL void ICACHE_FLASH_ATTR
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uart_config(uint8 uart_no)
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{
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if (uart_no == UART1)
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{
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
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}
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else
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{
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/* rcv_buff size if 0x100 */
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ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff));
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
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// PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
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}
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uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
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WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity
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| UartDev.parity
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| (UartDev.stop_bits << UART_STOP_BIT_NUM_S)
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| (UartDev.data_bits << UART_BIT_NUM_S));
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//clear rx and tx fifo,not ready
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SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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//set rx fifo trigger
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// WRITE_PERI_REG(UART_CONF1(uart_no),
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// ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
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// ((96 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S) |
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// UART_RX_FLOW_EN);
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if (uart_no == UART0)
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{
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//set rx fifo trigger
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
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((0x01 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
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UART_RX_FLOW_EN);
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}
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else
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{
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
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}
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//clear all interrupt
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WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
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//enable rx_interrupt
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
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}
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/******************************************************************************
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* FunctionName : uart1_tx_one_char
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* Description : Internal used function
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* Use uart1 interface to transfer one char
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* Parameters : uint8 TxChar - character to tx
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* Returns : OK
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*******************************************************************************/
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LOCAL STATUS
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uart_tx_one_char(uint8 uart, uint8 TxChar)
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{
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while (true)
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{
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uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
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if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
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break;
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}
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}
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WRITE_PERI_REG(UART_FIFO(uart) , TxChar);
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return OK;
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}
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/******************************************************************************
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* FunctionName : uart1_write_char
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* Description : Internal used function
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* Do some special deal while tx char is '\r' or '\n'
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* Parameters : char c - character to tx
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* Returns : NONE
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*******************************************************************************/
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LOCAL void ICACHE_FLASH_ATTR
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uart0_write_char(char c)
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{
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if (c == '\n')
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{
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uart_tx_one_char(UART0, '\r');
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uart_tx_one_char(UART0, '\n');
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}
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else if (c == '\r')
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{
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}
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else
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{
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uart_tx_one_char(UART0, c);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_tx_buffer
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* Description : use uart0 to transfer buffer
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* Parameters : uint8 *buf - point to send buffer
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* uint16 len - buffer len
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* Returns :
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart0_tx_buffer(uint8 *buf, uint16 len)
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{
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uint16 i;
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for (i = 0; i < len; i++)
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{
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uart_tx_one_char(UART0, buf[i]);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_sendStr
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* Description : use uart0 to transfer buffer
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* Parameters : uint8 *buf - point to send buffer
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* uint16 len - buffer len
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* Returns :
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart0_sendStr(const char *str)
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{
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while(*str)
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{
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uart_tx_one_char(UART0, *str++);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_rx_intr_handler
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* Description : Internal used function
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* UART0 interrupt handler, add self handle code inside
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* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
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* Returns : NONE
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*******************************************************************************/
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//extern void at_recvTask(void);
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LOCAL void
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uart0_rx_intr_handler(void *para)
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{
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/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
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* uart1 and uart0 respectively
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*/
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// RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
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// uint8 RcvChar;
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uint8 uart_no = UART0;//UartDev.buff_uart_no;
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// if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST))
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// {
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// return;
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// }
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if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST))
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{
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// at_recvTask();
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WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
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}
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// WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
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// if (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
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// {
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// RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xFF;
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// at_recvTask();
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// *(pRxBuff->pWritePos) = RcvChar;
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// system_os_post(at_recvTaskPrio, NULL, RcvChar);
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// //insert here for get one command line from uart
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// if (RcvChar == '\r')
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// {
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// pRxBuff->BuffState = WRITE_OVER;
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// }
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//
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// pRxBuff->pWritePos++;
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//
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// if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE))
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// {
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// // overflow ...we may need more error handle here.
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// pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff ;
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// }
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// }
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}
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/******************************************************************************
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* FunctionName : uart_init
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* Description : user interface for init uart
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* Parameters : UartBautRate uart0_br - uart0 bautrate
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* UartBautRate uart1_br - uart1 bautrate
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart_init(UartBautRate uart0_br, UartBautRate uart1_br)
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{
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// rom use 74880 baut_rate, here reinitialize
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UartDev.baut_rate = uart0_br;
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uart_config(UART0);
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UartDev.baut_rate = uart1_br;
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uart_config(UART1);
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ETS_UART_INTR_ENABLE();
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// install uart0 putc callback
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os_install_putc1((void *)uart0_write_char);
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}
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void ICACHE_FLASH_ATTR
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uart_reattach()
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{
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uart_init(BIT_RATE_74880, BIT_RATE_74880);
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// ETS_UART_INTR_ATTACH(uart_rx_intr_handler_ssc, &(UartDev.rcv_buff));
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// ETS_UART_INTR_ENABLE();
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}
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