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232 lines
5.7 KiB
232 lines
5.7 KiB
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32f1xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32f1xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include <stdio.h>
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#include "app_temp.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern TIM_HandleTypeDef htim1;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M3 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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printf("HardFault_Handler\r\n");
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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printf("MemManage_Handler\r\n");
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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printf("BusFault_Handler\r\n");
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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printf("UsageFault_Handler\r\n");
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32F1xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32f1xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles DMA1 channel1 global interrupt.
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*/
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void DMA1_Channel1_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
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/* USER CODE END DMA1_Channel1_IRQn 0 */
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/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
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/* USER CODE END DMA1_Channel1_IRQn 1 */
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}
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/**
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* @brief This function handles ADC1 and ADC2 global interrupts.
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*/
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void ADC1_2_IRQHandler(void)
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{
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/* USER CODE BEGIN ADC1_2_IRQn 0 */
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app_temp_adc_eos();
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// if (LL_ADC_IsActiveFlag_EOS(ADC_TEMP)) {
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// LL_ADC_ClearFlag_EOS(ADC_TEMP);
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// app_temp_adc_eos();
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// }
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/* USER CODE END ADC1_2_IRQn 0 */
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/* USER CODE BEGIN ADC1_2_IRQn 1 */
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/* USER CODE END ADC1_2_IRQn 1 */
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}
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/**
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* @brief This function handles TIM1 update interrupt.
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*/
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void TIM1_UP_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_UP_IRQn 0 */
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/* USER CODE END TIM1_UP_IRQn 0 */
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HAL_TIM_IRQHandler(&htim1);
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/* USER CODE BEGIN TIM1_UP_IRQn 1 */
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/* USER CODE END TIM1_UP_IRQn 1 */
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}
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/**
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* @brief This function handles TIM4 global interrupt.
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*/
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void TIM4_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM4_IRQn 0 */
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/* USER CODE END TIM4_IRQn 0 */
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/* USER CODE BEGIN TIM4_IRQn 1 */
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/* USER CODE END TIM4_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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