From 24f8252760524f631878428dc0408f03895634f8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ond=C5=99ej=20Hru=C5=A1ka?= Date: Sun, 12 Mar 2023 14:25:32 +0100 Subject: [PATCH] everything now works --- Core/Inc/main.h | 5 ++++ Core/Src/app_oled.c | 17 +++++------ Core/Src/app_temp.c | 7 +++++ Core/Src/app_temp.h | 2 ++ Core/Src/gpio.c | 5 ++-- Core/Src/spi.c | 63 ++++++++++++++++++++--------------------- Core/Src/stm32f1xx_it.c | 10 ++++--- 7 files changed, 63 insertions(+), 46 deletions(-) diff --git a/Core/Inc/main.h b/Core/Inc/main.h index c652ae0..b73d104 100644 --- a/Core/Inc/main.h +++ b/Core/Inc/main.h @@ -22,6 +22,9 @@ #ifndef __MAIN_H #define __MAIN_H +// this is a hack needed for CLion +#define USE_FULL_LL_DRIVER + #ifdef __cplusplus extern "C" { #endif @@ -72,6 +75,8 @@ void Error_Handler(void); /* USER CODE END EFP */ /* Private defines -----------------------------------------------------------*/ +int _write(int fd, const char *pcBuffer, int iLength); + #define LED_Pin LL_GPIO_PIN_13 #define LED_GPIO_Port GPIOC #define ADC_PT100_Pin LL_GPIO_PIN_0 diff --git a/Core/Src/app_oled.c b/Core/Src/app_oled.c index 3f36f83..615c062 100644 --- a/Core/Src/app_oled.c +++ b/Core/Src/app_oled.c @@ -8,22 +8,22 @@ #include "ufb/framebuffer.h" #include "gpio.h" #include "spi.h" +#include "FreeRTOS.h" #define SSD1309_HEIGHT 64 static inline void cs_select() { - // FIXME are the nops needed? - asm volatile("nop \n nop \n nop"); + //asm volatile("nop \n nop \n nop"); LL_GPIO_ResetOutputPin(OLED_CS_GPIO_Port, OLED_CS_Pin); // Active low - asm volatile("nop \n nop \n nop"); + //asm volatile("nop \n nop \n nop"); } static inline void cs_deselect() { - asm volatile("nop \n nop \n nop"); + //asm volatile("nop \n nop \n nop"); LL_GPIO_SetOutputPin(OLED_CS_GPIO_Port, OLED_CS_Pin); - asm volatile("nop \n nop \n nop"); + //asm volatile("nop \n nop \n nop"); } static inline void dc_command() @@ -42,10 +42,11 @@ void oled_command16(uint8_t cmd, uint8_t arg) cs_select(); LL_SPI_TransmitData8(SPI_OLED, cmd); - while (!LL_SPI_IsActiveFlag_TXE(SPI_OLED)) {} + while (!LL_SPI_IsActiveFlag_TXE(SPI_OLED)) {} LL_SPI_TransmitData8(SPI_OLED, arg); - while (LL_SPI_IsActiveFlag_BSY(SPI_OLED)) {} + + while (!LL_SPI_IsActiveFlag_TXE(SPI_OLED) || LL_SPI_IsActiveFlag_BSY(SPI_OLED)) {} cs_deselect(); } @@ -56,7 +57,7 @@ void oled_command(uint8_t cmd) cs_select(); LL_SPI_TransmitData8(SPI_OLED, cmd); - while (LL_SPI_IsActiveFlag_BSY(SPI_OLED)) {} + while (!LL_SPI_IsActiveFlag_TXE(SPI_OLED) || LL_SPI_IsActiveFlag_BSY(SPI_OLED)) {} cs_deselect(); } diff --git a/Core/Src/app_temp.c b/Core/Src/app_temp.c index b2e197a..510fa59 100644 --- a/Core/Src/app_temp.c +++ b/Core/Src/app_temp.c @@ -6,6 +6,7 @@ #include #include #include +#include #include "app_temp.h" #include "adc.h" @@ -153,6 +154,7 @@ void app_analog_init() LL_ADC_EnableIT_EOS(ADC_TEMP); + LL_ADC_REG_StartConversionExtTrig(ADC_TEMP, LL_ADC_REG_TRIG_EXT_RISING); LL_ADC_REG_StartConversionSWStart(ADC_TEMP); } @@ -242,3 +244,8 @@ void app_temp_adc_eos() memcpy((void *) &s_analog.adc_averagebuf[s_analog.averagebuf_ptr * 4], (const void *) adc_values, 4 * sizeof(uint16_t)); s_analog.averagebuf_ptr = (s_analog.averagebuf_ptr + 1) % AVERAGEBUF_DEPTH; } + +void app_temp_show_buf() +{ + printf("%d,%d,%d,%d\r\n", adc_values[0], adc_values[1], adc_values[2], adc_values[3]); +} diff --git a/Core/Src/app_temp.h b/Core/Src/app_temp.h index cf06aaf..6972ba4 100644 --- a/Core/Src/app_temp.h +++ b/Core/Src/app_temp.h @@ -26,4 +26,6 @@ float app_temp_read_soc(); void app_temp_adc_eos(); +void app_temp_show_buf(); + #endif //BLUEPILLTROUBA_APP_TEMP_H diff --git a/Core/Src/gpio.c b/Core/Src/gpio.c index 2723693..c8e6916 100644 --- a/Core/Src/gpio.c +++ b/Core/Src/gpio.c @@ -56,7 +56,8 @@ void MX_GPIO_Init(void) LL_GPIO_ResetOutputPin(LED_GPIO_Port, LED_Pin); /**/ - LL_GPIO_ResetOutputPin(GPIOB, OLED_CS_Pin|OLED_DC_Pin|OLED_RST_Pin); + LL_GPIO_SetOutputPin(GPIOB, OLED_CS_Pin|OLED_DC_Pin|OLED_RST_Pin); + //LL_GPIO_ResetOutputPin(GPIOB, OLED_CS_Pin|OLED_DC_Pin|OLED_RST_Pin); /**/ GPIO_InitStruct.Pin = LED_Pin; @@ -84,7 +85,7 @@ void MX_GPIO_Init(void) /**/ GPIO_InitStruct.Pin = OLED_CS_Pin|OLED_DC_Pin|OLED_RST_Pin; GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; LL_GPIO_Init(GPIOB, &GPIO_InitStruct); diff --git a/Core/Src/spi.c b/Core/Src/spi.c index b83b519..d72357e 100644 --- a/Core/Src/spi.c +++ b/Core/Src/spi.c @@ -21,52 +21,51 @@ #include "spi.h" /* USER CODE BEGIN 0 */ - /* USER CODE END 0 */ /* SPI2 init function */ void MX_SPI2_Init(void) { - /* USER CODE BEGIN SPI2_Init 0 */ + /* USER CODE BEGIN SPI2_Init 0 */ - /* USER CODE END SPI2_Init 0 */ + /* USER CODE END SPI2_Init 0 */ - LL_SPI_InitTypeDef SPI_InitStruct = {0}; + LL_SPI_InitTypeDef SPI_InitStruct = {0}; - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - /* Peripheral clock enable */ - LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); - LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB); - /**SPI2 GPIO Configuration - PB13 ------> SPI2_SCK - PB15 ------> SPI2_MOSI - */ - GPIO_InitStruct.Pin = LL_GPIO_PIN_13|LL_GPIO_PIN_15; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB); + /**SPI2 GPIO Configuration + PB13 ------> SPI2_SCK + PB15 ------> SPI2_MOSI + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_13|LL_GPIO_PIN_15; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - /* USER CODE BEGIN SPI2_Init 1 */ + /* USER CODE BEGIN SPI2_Init 1 */ - /* USER CODE END SPI2_Init 1 */ - SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; - SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT; - SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - SPI_InitStruct.CRCPoly = 10; - LL_SPI_Init(SPI2, &SPI_InitStruct); - /* USER CODE BEGIN SPI2_Init 2 */ + /* USER CODE END SPI2_Init 1 */ + SPI_InitStruct.TransferDirection = LL_SPI_HALF_DUPLEX_TX; + SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT; + SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + SPI_InitStruct.CRCPoly = 10; + LL_SPI_Init(SPI2, &SPI_InitStruct); + /* USER CODE BEGIN SPI2_Init 2 */ - /* USER CODE END SPI2_Init 2 */ + /* USER CODE END SPI2_Init 2 */ } diff --git a/Core/Src/stm32f1xx_it.c b/Core/Src/stm32f1xx_it.c index 78a4a35..11e54b9 100644 --- a/Core/Src/stm32f1xx_it.c +++ b/Core/Src/stm32f1xx_it.c @@ -186,10 +186,12 @@ void ADC1_2_IRQHandler(void) { /* USER CODE BEGIN ADC1_2_IRQn 0 */ - if (LL_ADC_IsActiveFlag_EOS(ADC_TEMP)) { - LL_ADC_ClearFlag_EOS(ADC_TEMP); - app_temp_adc_eos(); - } + app_temp_adc_eos(); + +// if (LL_ADC_IsActiveFlag_EOS(ADC_TEMP)) { +// LL_ADC_ClearFlag_EOS(ADC_TEMP); +// app_temp_adc_eos(); +// } /* USER CODE END ADC1_2_IRQn 0 */