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294 lines
6.6 KiB
294 lines
6.6 KiB
#include "stm8s.h"
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#include "fncgen.h"
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/** Get 14-bit LSB from a 28-bit value */
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#define FREQ_LSB(reg) (u16)(0x3FFF & (reg))
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/** Get 14-bit MSB from a 28-bit value */
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#define FREQ_MSB(reg) (u16)(0x3FFF & ((reg)>>14))
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/** Mask applied to the FG CREG to clear any previous waveform preset */
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#define FG_WFM_MASK (u16)(FG_OPBITEN | FG_DIV2 | FG_MODE)
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/**
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* Send 16 bits
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* @param word
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*/
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static void FG_SPI_Send16(uint16_t word)
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{
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while(!SPI_GetFlagStatus(SPI_FLAG_TXE));
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SPI_SendData((u8)(word >> 8));
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while(!SPI_GetFlagStatus(SPI_FLAG_TXE));
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SPI_SendData((u8)(word));
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}
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/**
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* @brief Write a single word over SPI to a FG
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* @param inst - FG instance
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* @param word - word to write (16 bits)
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*/
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static void FG_WriteWord(FG_Instance *inst, uint16_t word)
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{
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// NSS down
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inst->NSS_GPIO->ODR &= ~inst->NSS_PIN;
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// Data
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FG_SPI_Send16(word);
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// Wait for write to complete
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while(SPI_GetFlagStatus(SPI_FLAG_BSY));
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// NSS up
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inst->NSS_GPIO->ODR |= inst->NSS_PIN;
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}
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/**
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* @brief Manually start a FG data frame
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* This function may be used for broadcasting register
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* changes to multiple devices (ie. FG_RESET release
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* for phase synchronisation)
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*
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* @param inst - FG instance
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*/
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void FG_JoinBroadcast(FG_Instance *inst)
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{
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// NSS down
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inst->NSS_GPIO->ODR &= ~inst->NSS_PIN;
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}
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/**
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* @brief Manually end a FG data frame
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* This function is used to terminate a broadcast session.
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*
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* @param inst - FG instance
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*/
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void FG_LeaveBroadcast(FG_Instance *inst)
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{
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// Wait for write to complete
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while(SPI_GetFlagStatus(SPI_FLAG_BSY));
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// NSS up
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inst->NSS_GPIO->ODR |= inst->NSS_PIN;
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}
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/**
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* @brief Flush the CREG instance variable to the device
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* @param inst - FG instance
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*/
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static inline void FG_WriteCREG(FG_Instance *inst)
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{
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FG_WriteWord(inst, inst->CREG);
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}
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/**
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* @brief Set frequency in a bank register
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* Change is immediately applied if the bank is active.
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*
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* @param inst - FG instance
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* @param bank - bank number
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* @param regval - new frequency register value (28 bits)
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*/
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void FG_SetFreq(FG_Instance *inst, FG_FreqBank bank, u32 regval)
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{
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u16 word;
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// Ensure B28 is set
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if (!(inst->CREG & FG_B28)) {
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inst->CREG |= FG_B28;
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FG_WriteCREG(inst);
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}
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word = (bank == FREQ0 ? FG_ADDR_FREQ0 : FG_ADDR_FREQ1);
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FG_WriteWord(inst, word | FREQ_LSB(regval)); // 14 bits LSB
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FG_WriteWord(inst, word | FREQ_MSB(regval)); // 14 bits MSB
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}
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/**
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* @brief Set frequency MSB in a bank register
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* Change is immediately applied if the bank is active.
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*
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* @param inst - FG instance
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* @param bank - frequency bank to change
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* @param lsb14 - upper 14 bits of the frequency register
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*/
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void FG_SetFreqMSB(FG_Instance *inst, FG_FreqBank bank, u16 msb14)
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{
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u16 word;
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// Ensure B28 is cleared
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if ((inst->CREG & (FG_B28 | FG_HLB)) != FG_HLB) {
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inst->CREG &= ~FG_B28;
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inst->CREG |= FG_HLB;
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FG_WriteCREG(inst);
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}
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word = (bank == FREQ0 ? FG_ADDR_FREQ0 : FG_ADDR_FREQ1);
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FG_WriteWord(inst, word | (u16)(msb14 & 0x3FFF)); // 14 bits LSB
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}
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/**
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* @brief Set frequency LSB in a bank register
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* Change is immediately applied if the bank is active.
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*
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* @param inst - FG instance
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* @param bank - frequency bank to change
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* @param lsb14 - lower 14 bits of the frequency register
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*/
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void FG_SetFreqLSB(FG_Instance *inst, FG_FreqBank bank, u16 lsb14)
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{
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u16 word;
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// Ensure B28 is cleared
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if ((inst->CREG & (FG_B28 | FG_HLB)) != 0) {
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inst->CREG &= ~FG_B28;
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inst->CREG &= ~FG_HLB;
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FG_WriteCREG(inst);
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}
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word = (bank == FREQ0 ? FG_ADDR_FREQ0 : FG_ADDR_FREQ1);
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FG_WriteWord(inst, word | (u16)(lsb14 & 0x3FFF)); // 14 bits LSB
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}
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/**
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* @brief Select active frequency bank (for FSK)
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* @param inst - FG instance
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* @param bank - bank number
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*/
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void FG_FreqSwitch(FG_Instance *inst, FG_FreqBank bank)
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{
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if (bank == FREQ0) {
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inst->CREG &= ~FG_FSELECT;
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} else {
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inst->CREG |= FG_FSELECT;
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}
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FG_WriteCREG(inst);
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}
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/**
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* @brief Set phase in a bank register
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* Change is immediately applied if the bank is active.
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*
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* @param inst - FG instance
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* @param bank - bank number
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* @param regval - new phase register value (12 bits)
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*/
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void FG_SetPhase(FG_Instance *inst, FG_PhaseBank bank, u16 regval)
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{
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u16 word = (bank == PHASE0 ? FG_ADDR_PHASE0 : FG_ADDR_PHASE1);
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FG_WriteWord(inst, word | (u16) (regval & 0xFFF)); // 12 bits LSB
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}
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/**
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* @brief Select active phase register (for PSK)
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* @param inst - FG instance
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* @param bank - bank number
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*/
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void FG_PhaseSwitch(FG_Instance *inst, FG_PhaseBank bank)
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{
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if (bank == PHASE0) {
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inst->CREG &= ~FG_PSELECT;
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} else {
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inst->CREG |= FG_PSELECT;
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}
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FG_WriteCREG(inst);
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}
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/**
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* @brief Select a function generator waveform preset
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* @param inst - FG instance
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* @param wfm - waveform preset (enum)
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*/
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void FG_SetWaveform(FG_Instance *inst, FG_Waveform wfm)
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{
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inst->CREG &= ~FG_WFM_MASK;
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inst->CREG |= wfm;
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FG_WriteCREG(inst);
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}
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/**
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* @brief Suspend a function generator
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* Stops the counter, keeping the output constant
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*
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* @param inst - FG instance
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*/
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void FG_Suspend(FG_Instance *inst)
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{
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inst->CREG |= FG_SLEEP1;
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FG_WriteCREG(inst);
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}
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/**
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* @brief Resume a function generator from suspend state *
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* @param inst - FG instance
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*/
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void FG_Resume(FG_Instance *inst)
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{
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inst->CREG &= ~FG_SLEEP1;
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FG_WriteCREG(inst);
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}
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/**
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* @brief Enable or disable a function generator
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* When the FG is disabled, the output goes to a midpoint and
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* counting registers are reset.
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*
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* @param inst - FG instance
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* @param enable - enable status
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*/
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void FG_Cmd(FG_Instance *inst, FunctionalState enable)
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{
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if (enable == ENABLE) {
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inst->CREG &= ~FG_RESET;
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} else {
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inst->CREG |= FG_RESET;
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}
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FG_WriteCREG(inst);
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}
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void FG_Reset(FG_Instance *inst)
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{
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// Stop, enable fullsize freq writes
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inst->CREG = FG_B28 | FG_RESET;
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FG_WriteCREG(inst);
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FG_SetFreq(inst, FREQ0, HZ_REG(500));
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FG_SetFreq(inst, FREQ1, 0);
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FG_SetPhase(inst, PHASE0, 0);
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FG_SetPhase(inst, PHASE1, 0);
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}
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/**
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* @brief Configure a function generator
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* Sets up the GPIO pin and resets the target.
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* SPI must already be configured!
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*
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* @param inst - FG instance
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* @param NSS_GPIO - port with the slave select pin
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* @param NSS_PIN - slave slect pin position
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*/
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void FG_Init(FG_Instance *inst, GPIO_TypeDef *NSS_GPIO, GPIO_Pin_TypeDef NSS_PIN)
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{
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GPIO_Init(NSS_GPIO, NSS_PIN, GPIO_MODE_OUT_PP_HIGH_FAST);
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inst->NSS_GPIO = NSS_GPIO;
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inst->NSS_PIN = NSS_PIN;
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FG_Reset(inst);
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}
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/**
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* @brief Configure SPI for talking to FG devices
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* Sets up GPIOs and inits the SPI peripheral
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*/
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void FG_SPI_Init(void)
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{
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// MOSI, SCK
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GPIO_Init(GPIOC, GPIO_PIN_5 | GPIO_PIN_6, GPIO_MODE_OUT_PP_HIGH_FAST);
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SPI_Init(SPI_FIRSTBIT_MSB,
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SPI_BAUDRATEPRESCALER_2,
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SPI_MODE_MASTER,
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SPI_CLOCKPOLARITY_HIGH,
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SPI_CLOCKPHASE_1EDGE,
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SPI_DATADIRECTION_1LINE_TX,
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SPI_NSS_SOFT,
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0);
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SPI_Cmd(ENABLE);
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}
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