Ondřej Hruška 3 years ago
commit
367497cced

+ 7 - 0
.gitignore View File

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+cmake-build-debug/
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+Build/
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+CMakeLists.txt
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+*.o
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+*.rel
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+*.a
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+.idea/

+ 74 - 0
Makefile View File

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+#######
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+# makefile for STM8S_StdPeriph_Lib and SDCC compiler
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+#
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+# Customized by MightyPork 1/2017
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+#
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+# usage:
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+#   1. if SDCC not in PATH set path -> CC_ROOT
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+#   2. set correct STM8 device -> DEVICE
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+#   3. set project paths -> PRJ_ROOT, PRJ_SRC_DIR, PRJ_INC_DIR
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+#   4. set SPL root path -> SPL_ROOT
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+#   5. include required SPL modules -> SPL_SOURCE
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+#
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+#######
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+
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+# STM8 device (default is STM8 discovery board)
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+DEVICE=STM8S103
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+DEVICE_FLASH=stm8s103f3
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+
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+# set compiler path & parameters
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+CC_ROOT =
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+CC      = sdcc
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+CFLAGS  = -mstm8 -lstm8 --opt-code-size --disable-warning 126 --disable-warning 110
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+# --opt-code-size
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+# -DUSE_FULL_ASSERT=1
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+
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+# required for some examples for STM8S EVAL board
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+#CFLAGS += -DUSE_STM8_128_EVAL
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+
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+# set output folder and target name
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+OUTPUT_DIR = ./Build
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+TARGET     = $(OUTPUT_DIR)/$(DEVICE).hex
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+
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+# set project folder and files (all *.c)
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+PRJ_ROOT    = .
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+PRJ_SRC_DIR = $(PRJ_ROOT)/User
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+PRJ_INC_DIR = $(PRJ_ROOT)/User
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+# all project sources included by default
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+PRJ_SOURCE  = $(notdir $(wildcard $(PRJ_SRC_DIR)/*.c))
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+PRJ_OBJECTS := $(addprefix $(OUTPUT_DIR)/, $(PRJ_SOURCE:.c=.rel))
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+
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+LIB_INC_DIR = /usr/share/sdcc/include/
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+
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+#SPL_SRC_DIR = Libraries/SPL/src/
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+SPL_INC_DIR = TinySPL_S103
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+# add all library sources used here
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+SPL_SOURCE  =
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+#stm8s_uart1.c stm8s_clk.c stm8s_gpio.c
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+# SPL_OBJECTS := $(addprefix $(OUTPUT_DIR)/, $(SPL_SOURCE:.c=.rel))
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+
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+# collect all include folders
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+INCLUDE = -I$(PRJ_SRC_DIR) -I$(LIB_INC_DIR) -I$(SPL_INC_DIR)
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+
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+# collect all source directories
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+VPATH=$(PRJ_SRC_DIR):$(SPL_SRC_DIR)
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+
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+.PHONY: clean
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+
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+all: $(TARGET)
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+
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+$(OUTPUT_DIR)/%.rel: %.c
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+	$(CC) $(CFLAGS) -D$(DEVICE) $(INCLUDE) -c $?
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+
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+$(OUTPUT_DIR)/%.rel: %.c
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+	$(CC) $(CFLAGS) -D$(DEVICE) $(INCLUDE) -c $? -o $@
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+
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+#$(SPL_OBJECTS)
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+$(TARGET): $(PRJ_OBJECTS)
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+	$(CC) $(CFLAGS) -o $(TARGET) $^
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+
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+flash: $(TARGET)
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+	stm8flash -c stlinkv2 -p $(DEVICE_FLASH) -s flash -w $(TARGET)
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+
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+clean:
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+	rm $(OUTPUT_DIR)/*

File diff suppressed because it is too large
+ 2866 - 0
TinySPL_S103/stm8s.h


+ 970 - 0
TinySPL_S103/stm8s_adc1.h View File

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+/**
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+  ******************************************************************************
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+  * @file    stm8s_adc1.h
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+  * @author  MCD Application Team
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+  * @version V2.2.0
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+  * @date    30-September-2014
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+  * @brief   This file contains all the prototypes/macros for the ADC1 peripheral.
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+   ******************************************************************************
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+  * @attention
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+  *
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+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
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+  *
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+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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+  * You may not use this file except in compliance with the License.
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+  * You may obtain a copy of the License at:
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+  *
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+  *        http://www.st.com/software_license_agreement_liberty_v2
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+  *
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+  * Unless required by applicable law or agreed to in writing, software 
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+  * distributed under the License is distributed on an "AS IS" BASIS, 
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+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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+  * See the License for the specific language governing permissions and
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+  * limitations under the License.
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+  *
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+  ******************************************************************************
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+  */
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+/* Define to prevent recursive inclusion -------------------------------------*/
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+#ifndef __STM8S_ADC1_H
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+#define __STM8S_ADC1_H
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+
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+/* Includes ------------------------------------------------------------------*/
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+#include "stm8s.h"
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+
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+/* Exported types ------------------------------------------------------------*/
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+
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+/** @addtogroup ADC1_Exported_Types
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+  * @{
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+  */
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+
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+/**
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+  * @brief  ADC1 clock prescaler selection
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+  */
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+
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+typedef enum {
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+	ADC1_PRESSEL_FCPU_D2 = (uint8_t) 0x00, /**< Prescaler selection fADC1 = fcpu/2 */
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+	ADC1_PRESSEL_FCPU_D3 = (uint8_t) 0x10, /**< Prescaler selection fADC1 = fcpu/3 */
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+	ADC1_PRESSEL_FCPU_D4 = (uint8_t) 0x20, /**< Prescaler selection fADC1 = fcpu/4 */
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+	ADC1_PRESSEL_FCPU_D6 = (uint8_t) 0x30, /**< Prescaler selection fADC1 = fcpu/6 */
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+	ADC1_PRESSEL_FCPU_D8 = (uint8_t) 0x40, /**< Prescaler selection fADC1 = fcpu/8 */
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+	ADC1_PRESSEL_FCPU_D10 = (uint8_t) 0x50, /**< Prescaler selection fADC1 = fcpu/10 */
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+	ADC1_PRESSEL_FCPU_D12 = (uint8_t) 0x60, /**< Prescaler selection fADC1 = fcpu/12 */
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+	ADC1_PRESSEL_FCPU_D18 = (uint8_t) 0x70  /**< Prescaler selection fADC1 = fcpu/18 */
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+} ADC1_PresSel_TypeDef;
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+
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+/**
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+  * @brief   ADC1 External conversion trigger event selection
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+  */
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+typedef enum {
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+	ADC1_EXTTRIG_TIM = (uint8_t) 0x00, /**< Conversion from Internal TIM1 TRGO event */
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+	ADC1_EXTTRIG_GPIO = (uint8_t) 0x10  /**< Conversion from External interrupt on ADC_ETR pin*/
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+} ADC1_ExtTrig_TypeDef;
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+
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+/**
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+  * @brief  ADC1 data alignment
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+  */
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+typedef enum {
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+	ADC1_ALIGN_LEFT = (uint8_t) 0x00, /**< Data alignment left */
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+	ADC1_ALIGN_RIGHT = (uint8_t) 0x08  /**< Data alignment right */
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+} ADC1_Align_TypeDef;
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+
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+/**
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+  * @brief  ADC1 Interrupt source
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+  */
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+typedef enum {
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+	ADC1_IT_AWDIE = (uint16_t) 0x010, /**< Analog WDG interrupt enable */
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+	ADC1_IT_EOCIE = (uint16_t) 0x020, /**< EOC interrupt enable */
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+	ADC1_IT_AWD = (uint16_t) 0x140, /**< Analog WDG status */
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+	ADC1_IT_AWS0 = (uint16_t) 0x110, /**< Analog channel 0 status */
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+	ADC1_IT_AWS1 = (uint16_t) 0x111, /**< Analog channel 1 status */
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+	ADC1_IT_AWS2 = (uint16_t) 0x112, /**< Analog channel 2 status */
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+	ADC1_IT_AWS3 = (uint16_t) 0x113, /**< Analog channel 3 status */
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+	ADC1_IT_AWS4 = (uint16_t) 0x114, /**< Analog channel 4 status */
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+	ADC1_IT_AWS5 = (uint16_t) 0x115, /**< Analog channel 5 status */
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+	ADC1_IT_AWS6 = (uint16_t) 0x116, /**< Analog channel 6 status */
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+	ADC1_IT_AWS7 = (uint16_t) 0x117, /**< Analog channel 7 status */
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+	ADC1_IT_AWS8 = (uint16_t) 0x118, /**< Analog channel 8 status */
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+	ADC1_IT_AWS9 = (uint16_t) 0x119, /**< Analog channel 9 status */
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+	ADC1_IT_AWS12 = (uint16_t) 0x11C, /**< Analog channel 12 status */
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+	/* refer to product datasheet for channel 12 availability */
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+		ADC1_IT_EOC = (uint16_t) 0x080  /**< EOC pending bit */
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+
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+} ADC1_IT_TypeDef;
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+
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+/**
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+  * @brief  ADC1 Flags
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+  */
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+typedef enum {
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+	ADC1_FLAG_OVR = (uint8_t) 0x41, /**< Overrun status flag */
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+	ADC1_FLAG_AWD = (uint8_t) 0x40, /**< Analog WDG status */
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+	ADC1_FLAG_AWS0 = (uint8_t) 0x10, /**< Analog channel 0 status */
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+	ADC1_FLAG_AWS1 = (uint8_t) 0x11, /**< Analog channel 1 status */
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+	ADC1_FLAG_AWS2 = (uint8_t) 0x12, /**< Analog channel 2 status */
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+	ADC1_FLAG_AWS3 = (uint8_t) 0x13, /**< Analog channel 3 status */
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+	ADC1_FLAG_AWS4 = (uint8_t) 0x14, /**< Analog channel 4 status */
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+	ADC1_FLAG_AWS5 = (uint8_t) 0x15, /**< Analog channel 5 status */
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+	ADC1_FLAG_AWS6 = (uint8_t) 0x16, /**< Analog channel 6 status */
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+	ADC1_FLAG_AWS7 = (uint8_t) 0x17, /**< Analog channel 7 status */
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+	ADC1_FLAG_AWS8 = (uint8_t) 0x18, /**< Analog channel 8  status*/
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+	ADC1_FLAG_AWS9 = (uint8_t) 0x19, /**< Analog channel 9 status */
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+	ADC1_FLAG_AWS12 = (uint8_t) 0x1C, /**< Analog channel 12 status */
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+	/* refer to product datasheet for channel 12 availability */
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+		ADC1_FLAG_EOC = (uint8_t) 0x80  /**< EOC falg */
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+} ADC1_Flag_TypeDef;
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+
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+
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+/**
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+  * @brief  ADC1 schmitt Trigger
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+  */
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+typedef enum {
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+	ADC1_SCHMITTTRIG_CHANNEL0 = (uint8_t) 0x00, /**< Schmitt trigger disable on AIN0 */
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+	ADC1_SCHMITTTRIG_CHANNEL1 = (uint8_t) 0x01, /**< Schmitt trigger disable on AIN1 */
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+	ADC1_SCHMITTTRIG_CHANNEL2 = (uint8_t) 0x02, /**< Schmitt trigger disable on AIN2 */
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+	ADC1_SCHMITTTRIG_CHANNEL3 = (uint8_t) 0x03, /**< Schmitt trigger disable on AIN3 */
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+	ADC1_SCHMITTTRIG_CHANNEL4 = (uint8_t) 0x04, /**< Schmitt trigger disable on AIN4 */
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+	ADC1_SCHMITTTRIG_CHANNEL5 = (uint8_t) 0x05, /**< Schmitt trigger disable on AIN5 */
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+	ADC1_SCHMITTTRIG_CHANNEL6 = (uint8_t) 0x06, /**< Schmitt trigger disable on AIN6 */
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+	ADC1_SCHMITTTRIG_CHANNEL7 = (uint8_t) 0x07, /**< Schmitt trigger disable on AIN7 */
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+	ADC1_SCHMITTTRIG_CHANNEL8 = (uint8_t) 0x08, /**< Schmitt trigger disable on AIN8 */
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+	ADC1_SCHMITTTRIG_CHANNEL9 = (uint8_t) 0x09, /**< Schmitt trigger disable on AIN9 */
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+	ADC1_SCHMITTTRIG_CHANNEL12 = (uint8_t) 0x0C, /**< Schmitt trigger disable on AIN12 */
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+	/* refer to product datasheet for channel 12 availability */
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+		ADC1_SCHMITTTRIG_ALL = (uint8_t) 0xFF /**< Schmitt trigger disable on All channels */
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+} ADC1_SchmittTrigg_TypeDef;
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+
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+/**
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+  * @brief  ADC1 conversion mode selection
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+  */
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+
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+typedef enum {
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+	ADC1_CONVERSIONMODE_SINGLE = (uint8_t) 0x00, /**< Single conversion mode */
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+	ADC1_CONVERSIONMODE_CONTINUOUS = (uint8_t) 0x01  /**< Continuous conversion mode */
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+} ADC1_ConvMode_TypeDef;
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+
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+/**
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+  * @brief  ADC1 analog channel selection
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+  */
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+
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+typedef enum {
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+	ADC1_CHANNEL_0 = (uint8_t) 0x00, /**< Analog channel 0 */
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+	ADC1_CHANNEL_1 = (uint8_t) 0x01, /**< Analog channel 1 */
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+	ADC1_CHANNEL_2 = (uint8_t) 0x02, /**< Analog channel 2 */
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+	ADC1_CHANNEL_3 = (uint8_t) 0x03, /**< Analog channel 3 */
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+	ADC1_CHANNEL_4 = (uint8_t) 0x04, /**< Analog channel 4 */
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+	ADC1_CHANNEL_5 = (uint8_t) 0x05, /**< Analog channel 5 */
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+	ADC1_CHANNEL_6 = (uint8_t) 0x06, /**< Analog channel 6 */
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+	ADC1_CHANNEL_7 = (uint8_t) 0x07, /**< Analog channel 7 */
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+	ADC1_CHANNEL_8 = (uint8_t) 0x08, /**< Analog channel 8 */
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+	ADC1_CHANNEL_9 = (uint8_t) 0x09, /**< Analog channel 9 */
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+	ADC1_CHANNEL_12 = (uint8_t) 0x0C /**< Analog channel 12 */
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+	/* refer to product datasheet for channel 12 availability */
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+} ADC1_Channel_TypeDef;
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+
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+/**
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+  * @}
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+  */
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+
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+/* Exported constants --------------------------------------------------------*/
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+
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+/* Exported macros ------------------------------------------------------------*/
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+
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+/* Private macros ------------------------------------------------------------*/
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+
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+/** @addtogroup ADC1_Private_Macros
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+  * @brief  Macros used by the assert function to check the different functions parameters.
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+  * @{
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+  */
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different prescaler's values.
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+  */
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+#define IS_ADC1_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC1_PRESSEL_FCPU_D2) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D3) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D4) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D6) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D8) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D10) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D12) || \
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+                                      ((PRESCALER) == ADC1_PRESSEL_FCPU_D18))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different external trigger values.
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+  */
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+#define IS_ADC1_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC1_EXTTRIG_TIM) || \
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+                                   ((EXTRIG) == ADC1_EXTTRIG_GPIO))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different alignment modes.
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+  */
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+#define IS_ADC1_ALIGN_OK(ALIGN) (((ALIGN) == ADC1_ALIGN_LEFT) || \
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+                                ((ALIGN) == ADC1_ALIGN_RIGHT))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the Interrupt source.
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+  */
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+#define IS_ADC1_IT_OK(IT) (((IT) == ADC1_IT_EOCIE) || \
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+                          ((IT) == ADC1_IT_AWDIE))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the ADC1 Flag.
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+  */
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+#define IS_ADC1_FLAG_OK(FLAG) (((FLAG) == ADC1_FLAG_EOC)|| \
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+                              ((FLAG) == ADC1_FLAG_OVR) || \
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+                              ((FLAG) == ADC1_FLAG_AWD) || \
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+                              ((FLAG) == ADC1_FLAG_AWS0) || \
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+                              ((FLAG) == ADC1_FLAG_AWS1) || \
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+                              ((FLAG) == ADC1_FLAG_AWS2) || \
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+                              ((FLAG) == ADC1_FLAG_AWS3) || \
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+                              ((FLAG) == ADC1_FLAG_AWS4) || \
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+                              ((FLAG) == ADC1_FLAG_AWS5) || \
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+                              ((FLAG) == ADC1_FLAG_AWS6) || \
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+                              ((FLAG) == ADC1_FLAG_AWS7) || \
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+                              ((FLAG) == ADC1_FLAG_AWS8) || \
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+                              ((FLAG) == ADC1_FLAG_AWS9))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the ADC1 pending bits.
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+  */
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+#define IS_ADC1_ITPENDINGBIT_OK(ITPENDINGBIT) (((ITPENDINGBIT) == ADC1_IT_EOC) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWD) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS0) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS1) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS2) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS3) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS4) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS5) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS6) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS7) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS8) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS12) || \
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+    ((ITPENDINGBIT) == ADC1_IT_AWS9))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different schmitt trigger values.
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+  */
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+#define IS_ADC1_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL0) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL1) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL2) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL3) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL4) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL5) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL6) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL7) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL8) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL12) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_ALL) || \
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+    ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL9))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different conversion modes.
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+  */
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+#define IS_ADC1_CONVERSIONMODE_OK(MODE) (((MODE) == ADC1_CONVERSIONMODE_SINGLE) || \
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+                                        ((MODE) == ADC1_CONVERSIONMODE_CONTINUOUS))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the different channels values.
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+  */
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+#define IS_ADC1_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC1_CHANNEL_0) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_1) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_2) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_3) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_4) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_5) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_6) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_7) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_8) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_12) || \
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+                                    ((CHANNEL) == ADC1_CHANNEL_9))
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+
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+/**
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+  * @brief  Macro used by the assert function to check the possible buffer values.
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+  */
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+#define IS_ADC1_BUFFER_OK(BUFFER) ((BUFFER) <= (uint8_t)0x09)
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+
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+/**
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+  * @}
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+  */
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+
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+/* Exported functions ------------------------------------------------------- */
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+
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+#if 0
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+/** @addtogroup ADC1_Exported_Functions
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+  * @{
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+  */
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+void ADC1_DeInit(void);
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+
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+void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
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+			   ADC1_Channel_TypeDef ADC1_Channel,
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+			   ADC1_PresSel_TypeDef ADC1_PrescalerSelection,
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+			   ADC1_ExtTrig_TypeDef ADC1_ExtTrigger,
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+			   FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align,
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+			   ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
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+			   FunctionalState ADC1_SchmittTriggerState);
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+
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+void ADC1_Cmd(FunctionalState NewState);
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+
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+void ADC1_ScanModeCmd(FunctionalState NewState);
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+
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+void ADC1_DataBufferCmd(FunctionalState NewState);
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+
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+void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState);
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+
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+void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler);
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+
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+void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel,
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+							   FunctionalState NewState);
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+
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+void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode,
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+						   ADC1_Channel_TypeDef ADC1_Channel,
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+						   ADC1_Align_TypeDef ADC1_Align);
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+
321
+void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState);
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+
323
+void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState);
324
+
325
+void ADC1_StartConversion(void);
326
+
327
+uint16_t ADC1_GetConversionValue(void);
328
+
329
+void ADC1_SetHighThreshold(uint16_t Threshold);
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+
331
+void ADC1_SetLowThreshold(uint16_t Threshold);
332
+
333
+uint16_t ADC1_GetBufferValue(uint8_t Buffer);
334
+
335
+FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel);
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+
337
+FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag);
338
+
339
+void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag);
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+
341
+ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit);
342
+
343
+void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit);
344
+#endif
345
+/**
346
+  * @}
347
+  */
348
+
349
+
350
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
351
+
352
+
353
+/** @addtogroup STM8S_StdPeriph_Driver
354
+  * @{
355
+  */
356
+/* Private typedef -----------------------------------------------------------*/
357
+/* Private define ------------------------------------------------------------*/
358
+/* Private macro -------------------------------------------------------------*/
359
+/* Private variables ---------------------------------------------------------*/
360
+/* Private function prototypes -----------------------------------------------*/
361
+/* Private functions ---------------------------------------------------------*/
362
+/* Public functions ----------------------------------------------------------*/
363
+
364
+/**
365
+  * @addtogroup ADC1_Public_Functions
366
+  * @{
367
+  */
368
+
369
+/**
370
+  * @brief  Deinitializes the ADC1 peripheral registers to their default reset values.
371
+  * @param  None
372
+  * @retval None
373
+  */
374
+inline void ADC1_DeInit(void)
375
+{
376
+	ADC1->CSR = ADC1_CSR_RESET_VALUE;
377
+	ADC1->CR1 = ADC1_CR1_RESET_VALUE;
378
+	ADC1->CR2 = ADC1_CR2_RESET_VALUE;
379
+	ADC1->CR3 = ADC1_CR3_RESET_VALUE;
380
+	ADC1->TDRH = ADC1_TDRH_RESET_VALUE;
381
+	ADC1->TDRL = ADC1_TDRL_RESET_VALUE;
382
+	ADC1->HTRH = ADC1_HTRH_RESET_VALUE;
383
+	ADC1->HTRL = ADC1_HTRL_RESET_VALUE;
384
+	ADC1->LTRH = ADC1_LTRH_RESET_VALUE;
385
+	ADC1->LTRL = ADC1_LTRL_RESET_VALUE;
386
+	ADC1->AWCRH = ADC1_AWCRH_RESET_VALUE;
387
+	ADC1->AWCRL = ADC1_AWCRL_RESET_VALUE;
388
+}
389
+/**
390
+  * @brief  Configure the ADC1 conversion on selected channel.
391
+  * @param   ADC1_ConversionMode Specifies the conversion type.
392
+  * It can be set of the values of @ref ADC1_ConvMode_TypeDef
393
+  * @param   ADC1_Channel specifies the ADC1 Channel.
394
+  * It can be set of the values of @ref ADC1_Channel_TypeDef
395
+  * @param   ADC1_Align specifies the converted data alignment.
396
+  * It can be set of the values of @ref ADC1_Align_TypeDef
397
+  * @retval None
398
+  */
399
+inline void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel,
400
+								  ADC1_Align_TypeDef ADC1_Align)
401
+{
402
+	/* Check the parameters */
403
+	assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
404
+	assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
405
+	assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
406
+
407
+	/* Clear the align bit */
408
+	ADC1->CR2 &= (uint8_t) (~ADC1_CR2_ALIGN);
409
+	/* Configure the data alignment */
410
+	ADC1->CR2 |= (uint8_t) (ADC1_Align);
411
+
412
+	if (ADC1_ConversionMode == ADC1_CONVERSIONMODE_CONTINUOUS) {
413
+		/* Set the continuous conversion mode */
414
+		ADC1->CR1 |= ADC1_CR1_CONT;
415
+	} else /* ADC1_ConversionMode == ADC1_CONVERSIONMODE_SINGLE */
416
+	{
417
+		/* Set the single conversion mode */
418
+		ADC1->CR1 &= (uint8_t) (~ADC1_CR1_CONT);
419
+	}
420
+
421
+	/* Clear the ADC1 channels */
422
+	ADC1->CSR &= (uint8_t) (~ADC1_CSR_CH);
423
+	/* Select the ADC1 channel */
424
+	ADC1->CSR |= (uint8_t) (ADC1_Channel);
425
+}
426
+
427
+/**
428
+  * @brief  Enables or disables the ADC1 Schmitt Trigger on a selected channel.
429
+  * @param   ADC1_SchmittTriggerChannel specifies the desired Channel.
430
+  * It can be set of the values of @ref ADC1_SchmittTrigg_TypeDef.
431
+  * @param   NewState specifies Channel new status.
432
+  * can have one of the values of @ref FunctionalState.
433
+  * @retval None
434
+  */
435
+inline void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState NewState)
436
+{
437
+	/* Check the parameters */
438
+	assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
439
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
440
+
441
+	if (ADC1_SchmittTriggerChannel == ADC1_SCHMITTTRIG_ALL) {
442
+		if (NewState != DISABLE) {
443
+			ADC1->TDRL &= (uint8_t) 0x0;
444
+			ADC1->TDRH &= (uint8_t) 0x0;
445
+		} else /* NewState == DISABLE */
446
+		{
447
+			ADC1->TDRL |= (uint8_t) 0xFF;
448
+			ADC1->TDRH |= (uint8_t) 0xFF;
449
+		}
450
+	} else if (ADC1_SchmittTriggerChannel < ADC1_SCHMITTTRIG_CHANNEL8) {
451
+		if (NewState != DISABLE) {
452
+			ADC1->TDRL &= (uint8_t) (~(uint8_t) ((uint8_t) 0x01 << (uint8_t) ADC1_SchmittTriggerChannel));
453
+		} else /* NewState == DISABLE */
454
+		{
455
+			ADC1->TDRL |= (uint8_t) ((uint8_t) 0x01 << (uint8_t) ADC1_SchmittTriggerChannel);
456
+		}
457
+	} else /* ADC1_SchmittTriggerChannel >= ADC1_SCHMITTTRIG_CHANNEL8 */
458
+	{
459
+		if (NewState != DISABLE) {
460
+			ADC1->TDRH &= (uint8_t) (~(uint8_t) ((uint8_t) 0x01
461
+				<< ((uint8_t) ADC1_SchmittTriggerChannel - (uint8_t) 8)));
462
+		} else /* NewState == DISABLE */
463
+		{
464
+			ADC1->TDRH |= (uint8_t) ((uint8_t) 0x01 << ((uint8_t) ADC1_SchmittTriggerChannel - (uint8_t) 8));
465
+		}
466
+	}
467
+}
468
+
469
+/**
470
+  * @brief  Configure the ADC1 prescaler division factor.
471
+  * @param   ADC1_Prescaler: the selected precaler.
472
+  * It can be one of the values of @ref ADC1_PresSel_TypeDef.
473
+  * @retval None
474
+  */
475
+inline void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler)
476
+{
477
+	/* Check the parameter */
478
+	assert_param(IS_ADC1_PRESSEL_OK(ADC1_Prescaler));
479
+
480
+	/* Clear the SPSEL bits */
481
+	ADC1->CR1 &= (uint8_t) (~ADC1_CR1_SPSEL);
482
+	/* Select the prescaler division factor according to ADC1_PrescalerSelection values */
483
+	ADC1->CR1 |= (uint8_t) (ADC1_Prescaler);
484
+}
485
+
486
+/**
487
+  * @brief  Configure the ADC1 conversion on external trigger event.
488
+  * @par Full description:
489
+  * The selected external trigger event can be enabled or disabled.
490
+  * @param   ADC1_ExtTrigger to select the External trigger event.
491
+  * can have one of the values of @ref ADC1_ExtTrig_TypeDef.
492
+  * @param   NewState to enable/disable the selected external trigger
493
+  * can have one of the values of @ref FunctionalState.
494
+  * @retval None
495
+  */
496
+inline void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState)
497
+{
498
+	/* Check the parameters */
499
+	assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
500
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
501
+
502
+	/* Clear the external trigger selection bits */
503
+	ADC1->CR2 &= (uint8_t) (~ADC1_CR2_EXTSEL);
504
+
505
+	if (NewState != DISABLE) {
506
+		/* Enable the selected external Trigger */
507
+		ADC1->CR2 |= (uint8_t) (ADC1_CR2_EXTTRIG);
508
+	} else /* NewState == DISABLE */
509
+	{
510
+		/* Disable the selected external trigger */
511
+		ADC1->CR2 &= (uint8_t) (~ADC1_CR2_EXTTRIG);
512
+	}
513
+
514
+	/* Set the selected external trigger */
515
+	ADC1->CR2 |= (uint8_t) (ADC1_ExtTrigger);
516
+}
517
+
518
+/**
519
+  * @brief  Initializes the ADC1 peripheral according to the specified parameters
520
+  * @param   ADC1_ConversionMode: specifies the conversion mode
521
+  * can be one of the values of @ref ADC1_ConvMode_TypeDef.
522
+  * @param   ADC1_Channel: specifies the channel to convert
523
+  * can be one of the values of @ref ADC1_Channel_TypeDef.
524
+  * @param   ADC1_PrescalerSelection: specifies the ADC1 prescaler
525
+  * can be one of the values of @ref ADC1_PresSel_TypeDef.
526
+  * @param   ADC1_ExtTrigger: specifies the external trigger
527
+  * can be one of the values of @ref ADC1_ExtTrig_TypeDef.
528
+  * @param   ADC1_ExtTriggerState: specifies the external trigger new state
529
+  * can be one of the values of @ref FunctionalState.
530
+  * @param   ADC1_Align: specifies the converted data alignment
531
+  * can be one of the values of @ref ADC1_Align_TypeDef.
532
+  * @param   ADC1_SchmittTriggerChannel: specifies the schmitt trigger channel
533
+  * can be one of the values of @ref ADC1_SchmittTrigg_TypeDef.
534
+  * @param   ADC1_SchmittTriggerState: specifies the schmitt trigger state
535
+  * can be one of the values of @ref FunctionalState.
536
+  * @retval None
537
+  */
538
+inline void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel,
539
+					  ADC1_PresSel_TypeDef ADC1_PrescalerSelection, ADC1_ExtTrig_TypeDef ADC1_ExtTrigger,
540
+					  FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align,
541
+					  ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState ADC1_SchmittTriggerState)
542
+{
543
+	/* Check the parameters */
544
+	assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode));
545
+	assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel));
546
+	assert_param(IS_ADC1_PRESSEL_OK(ADC1_PrescalerSelection));
547
+	assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger));
548
+	assert_param(IS_FUNCTIONALSTATE_OK(((ADC1_ExtTriggerState))));
549
+	assert_param(IS_ADC1_ALIGN_OK(ADC1_Align));
550
+	assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel));
551
+	assert_param(IS_FUNCTIONALSTATE_OK(ADC1_SchmittTriggerState));
552
+
553
+	/*-----------------CR1 & CSR configuration --------------------*/
554
+	/* Configure the conversion mode and the channel to convert
555
+	respectively according to ADC1_ConversionMode & ADC1_Channel values  &  ADC1_Align values */
556
+	ADC1_ConversionConfig(ADC1_ConversionMode, ADC1_Channel, ADC1_Align);
557
+	/* Select the prescaler division factor according to ADC1_PrescalerSelection values */
558
+	ADC1_PrescalerConfig(ADC1_PrescalerSelection);
559
+
560
+	/*-----------------CR2 configuration --------------------*/
561
+	/* Configure the external trigger state and event respectively
562
+	according to NewState, ADC1_ExtTrigger */
563
+	ADC1_ExternalTriggerConfig(ADC1_ExtTrigger, ADC1_ExtTriggerState);
564
+
565
+	/*------------------TDR configuration ---------------------------*/
566
+	/* Configure the schmitt trigger channel and state respectively
567
+	according to ADC1_SchmittTriggerChannel & ADC1_SchmittTriggerNewState  values */
568
+	ADC1_SchmittTriggerConfig(ADC1_SchmittTriggerChannel, ADC1_SchmittTriggerState);
569
+
570
+	/* Enable the ADC1 peripheral */
571
+	ADC1->CR1 |= ADC1_CR1_ADON;
572
+}
573
+
574
+/**
575
+  * @brief  Enables or Disables the ADC1 peripheral.
576
+  * @param  NewState: specifies the peripheral enabled or disabled state.
577
+  * @retval None
578
+  */
579
+inline void ADC1_Cmd(FunctionalState NewState)
580
+{
581
+	/* Check the parameters */
582
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
583
+
584
+	if (NewState != DISABLE) {
585
+		ADC1->CR1 |= ADC1_CR1_ADON;
586
+	} else /* NewState == DISABLE */
587
+	{
588
+		ADC1->CR1 &= (uint8_t) (~ADC1_CR1_ADON);
589
+	}
590
+}
591
+
592
+/**
593
+  * @brief  Enables or Disables the ADC1 scan mode.
594
+  * @param  NewState: specifies the selected mode enabled or disabled state.
595
+  * @retval None
596
+  */
597
+inline void ADC1_ScanModeCmd(FunctionalState NewState)
598
+{
599
+	/* Check the parameters */
600
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
601
+
602
+	if (NewState != DISABLE) {
603
+		ADC1->CR2 |= ADC1_CR2_SCAN;
604
+	} else /* NewState == DISABLE */
605
+	{
606
+		ADC1->CR2 &= (uint8_t) (~ADC1_CR2_SCAN);
607
+	}
608
+}
609
+
610
+/**
611
+  * @brief  Enables or Disables the ADC1 data store into the Data Buffer registers rather than in the Data Register
612
+  * @param   NewState: specifies the selected mode enabled or disabled state.
613
+  * @retval None
614
+  */
615
+inline void ADC1_DataBufferCmd(FunctionalState NewState)
616
+{
617
+	/* Check the parameters */
618
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
619
+
620
+	if (NewState != DISABLE) {
621
+		ADC1->CR3 |= ADC1_CR3_DBUF;
622
+	} else /* NewState == DISABLE */
623
+	{
624
+		ADC1->CR3 &= (uint8_t) (~ADC1_CR3_DBUF);
625
+	}
626
+}
627
+
628
+/**
629
+  * @brief  Enables or disables the ADC1 interrupt.
630
+  * @param   ADC1_IT specifies the name of the interrupt to enable or disable.
631
+  * This parameter can be one of the following values:
632
+  *    - ADC1_IT_AWDITEN : Analog WDG interrupt enable
633
+  *    - ADC1_IT_EOCITEN  : EOC iterrupt enable
634
+  * @param   NewState specifies the state of the interrupt to apply.
635
+  * @retval None
636
+  */
637
+inline void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState)
638
+{
639
+	/* Check the parameters */
640
+	assert_param(IS_ADC1_IT_OK(ADC1_IT));
641
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
642
+
643
+	if (NewState != DISABLE) {
644
+		/* Enable the ADC1 interrupts */
645
+		ADC1->CSR |= (uint8_t) ADC1_IT;
646
+	} else  /* NewState == DISABLE */
647
+	{
648
+		/* Disable the ADC1 interrupts */
649
+		ADC1->CSR &= (uint8_t) ((uint16_t) ~(uint16_t) ADC1_IT);
650
+	}
651
+}
652
+
653
+
654
+/**
655
+  * @brief  Start ADC1 conversion
656
+  * @par Full description:
657
+  * This function  triggers the start of conversion, after ADC1 configuration.
658
+  * @param  None
659
+  * @retval None
660
+  * @par Required preconditions:
661
+  * Enable the ADC1 peripheral before calling this function
662
+  */
663
+inline void ADC1_StartConversion(void)
664
+{
665
+	ADC1->CR1 |= ADC1_CR1_ADON;
666
+}
667
+
668
+/**
669
+  * @brief  Get one sample of measured signal.
670
+  * @param  None
671
+  * @retval ConversionValue:  value of the measured signal.
672
+  * @par Required preconditions:
673
+  * ADC1 conversion finished.
674
+  */
675
+inline uint16_t ADC1_GetConversionValue(void)
676
+{
677
+	uint16_t temph = 0;
678
+	uint8_t templ = 0;
679
+
680
+	if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
681
+	{
682
+		/* Read LSB first */
683
+		templ = ADC1->DRL;
684
+		/* Then read MSB */
685
+		temph = ADC1->DRH;
686
+
687
+		temph = (uint16_t) (templ | (uint16_t) (temph << (uint8_t) 8));
688
+	} else /* Left alignment */
689
+	{
690
+		/* Read MSB first*/
691
+		temph = ADC1->DRH;
692
+		/* Then read LSB */
693
+		templ = ADC1->DRL;
694
+
695
+		temph = (uint16_t) ((uint16_t) ((uint16_t) templ << 6) | (uint16_t) ((uint16_t) temph << 8));
696
+	}
697
+
698
+	return ((uint16_t) temph);
699
+}
700
+
701
+/**
702
+  * @brief  Enables or disables the analog watchdog for the given channel.
703
+  * @param   Channel specifies the desired Channel.
704
+  * It can be set of the values of @ref ADC1_Channel_TypeDef.
705
+  * @param   NewState specifies the analog watchdog new state.
706
+  * can have one of the values of @ref FunctionalState.
707
+  * @retval None
708
+  */
709
+inline void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState)
710
+{
711
+	/* Check the parameters */
712
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
713
+	assert_param(IS_ADC1_CHANNEL_OK(Channel));
714
+
715
+	if (Channel < (uint8_t) 8) {
716
+		if (NewState != DISABLE) {
717
+			ADC1->AWCRL |= (uint8_t) ((uint8_t) 1 << Channel);
718
+		} else /* NewState == DISABLE */
719
+		{
720
+			ADC1->AWCRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << Channel);
721
+		}
722
+	} else {
723
+		if (NewState != DISABLE) {
724
+			ADC1->AWCRH |= (uint8_t) ((uint8_t) 1 << (Channel - (uint8_t) 8));
725
+		} else /* NewState == DISABLE */
726
+		{
727
+			ADC1->AWCRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (uint8_t) (Channel - (uint8_t) 8));
728
+		}
729
+	}
730
+}
731
+
732
+/**
733
+  * @brief  Sets the high threshold of the analog watchdog.
734
+  * @param   Threshold specifies the high threshold value.
735
+  * this value depends on the reference voltage range.
736
+  * @retval None
737
+  */
738
+inline void ADC1_SetHighThreshold(uint16_t Threshold)
739
+{
740
+	ADC1->HTRH = (uint8_t) (Threshold >> (uint8_t) 2);
741
+	ADC1->HTRL = (uint8_t) Threshold;
742
+}
743
+
744
+/**
745
+  * @brief  Sets the low threshold of the analog watchdog.
746
+  * @param   Threshold specifies the low threshold value.
747
+  * this value depends on the reference voltage range.
748
+  * @retval None
749
+  */
750
+inline void ADC1_SetLowThreshold(uint16_t Threshold)
751
+{
752
+	ADC1->LTRL = (uint8_t) Threshold;
753
+	ADC1->LTRH = (uint8_t) (Threshold >> (uint8_t) 2);
754
+}
755
+
756
+/**
757
+  * @brief  Get one sample of measured signal.
758
+  * @param   Buffer specifies the buffer to read.
759
+  * @retval BufferValue:  value read from the given buffer.
760
+  * @par Required preconditions:
761
+  * ADC1 conversion finished.
762
+  */
763
+inline uint16_t ADC1_GetBufferValue(uint8_t Buffer)
764
+{
765
+	uint16_t temph = 0;
766
+	uint8_t templ = 0;
767
+
768
+	/* Check the parameters */
769
+	assert_param(IS_ADC1_BUFFER_OK(Buffer));
770
+
771
+	if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */
772
+	{
773
+		/* Read LSB first */
774
+		templ = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1) + 1);
775
+		/* Then read MSB */
776
+		temph = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1));
777
+
778
+		temph = (uint16_t) (templ | (uint16_t) (temph << (uint8_t) 8));
779
+	} else /* Left alignment */
780
+	{
781
+		/* Read MSB first*/
782
+		temph = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1));
783
+		/* Then read LSB */
784
+		templ = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1) + 1);
785
+
786
+		temph = (uint16_t) ((uint16_t) ((uint16_t) templ << 6) | (uint16_t) (temph << 8));
787
+	}
788
+
789
+	return ((uint16_t) temph);
790
+}
791
+
792
+/**
793
+  * @brief  Checks the specified analog watchdog channel status.
794
+  * @param   Channel: specify the channel of which to check the analog watchdog
795
+  * can be one of the values of @ref ADC1_Channel_TypeDef.
796
+  * @retval FlagStatus Status of the analog watchdog.
797
+  */
798
+inline FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel)
799
+{
800
+	uint8_t status = 0;
801
+
802
+	/* Check the parameters */
803
+	assert_param(IS_ADC1_CHANNEL_OK(Channel));
804
+
805
+	if (Channel < (uint8_t) 8) {
806
+		status = (uint8_t) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << Channel));
807
+	} else /* Channel = 8 | 9 */
808
+	{
809
+		status = (uint8_t) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (Channel - (uint8_t) 8)));
810
+	}
811
+
812
+	return ((FlagStatus) status);
813
+}
814
+
815
+/**
816
+  * @brief  Checks the specified ADC1 flag status.
817
+  * @param   Flag: ADC1 flag.
818
+  * can be one of the values of @ref ADC1_Flag_TypeDef.
819
+  * @retval FlagStatus Status of the ADC1 flag.
820
+  */
821
+inline FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag)
822
+{
823
+	uint8_t flagstatus = 0;
824
+	uint8_t temp = 0;
825
+
826
+	/* Check the parameters */
827
+	assert_param(IS_ADC1_FLAG_OK(Flag));
828
+
829
+	if ((Flag & 0x0F) == 0x01) {
830
+		/* Get OVR flag status */
831
+		flagstatus = (uint8_t) (ADC1->CR3 & ADC1_CR3_OVR);
832
+	} else if ((Flag & 0xF0) == 0x10) {
833
+		/* Get analog watchdog channel status */
834
+		temp = (uint8_t) (Flag & (uint8_t) 0x0F);
835
+		if (temp < 8) {
836
+			flagstatus = (uint8_t) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << temp));
837
+		} else {
838
+			flagstatus = (uint8_t) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (temp - 8)));
839
+		}
840
+	} else  /* Get EOC | AWD flag status */
841
+	{
842
+		flagstatus = (uint8_t) (ADC1->CSR & Flag);
843
+	}
844
+	return ((FlagStatus) flagstatus);
845
+
846
+}
847
+
848
+/**
849
+  * @brief  Clear the specified ADC1 Flag.
850
+  * @param   Flag: ADC1 flag.
851
+  * can be one of the values of @ref ADC1_Flag_TypeDef.
852
+  * @retval None
853
+  */
854
+inline void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag)
855
+{
856
+	uint8_t temp = 0;
857
+
858
+	/* Check the parameters */
859
+	assert_param(IS_ADC1_FLAG_OK(Flag));
860
+
861
+	if ((Flag & 0x0F) == 0x01) {
862
+		/* Clear OVR flag status */
863
+		ADC1->CR3 &= (uint8_t) (~ADC1_CR3_OVR);
864
+	} else if ((Flag & 0xF0) == 0x10) {
865
+		/* Clear analog watchdog channel status */
866
+		temp = (uint8_t) (Flag & (uint8_t) 0x0F);
867
+		if (temp < 8) {
868
+			ADC1->AWSRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << temp);
869
+		} else {
870
+			ADC1->AWSRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (temp - 8));
871
+		}
872
+	} else  /* Clear EOC | AWD flag status */
873
+	{
874
+		ADC1->CSR &= (uint8_t) (~Flag);
875
+	}
876
+}
877
+
878
+/**
879
+  * @brief  Returns the specified pending bit status
880
+  * @param   ITPendingBit : the IT pending bit to check.
881
+  * This parameter can be one of the following values:
882
+  *    - ADC1_IT_AWD   : Analog WDG IT status
883
+  *    - ADC1_IT_AWS0 : Analog channel 0 IT status
884
+  *    - ADC1_IT_AWS1 : Analog channel 1 IT status
885
+  *    - ADC1_IT_AWS2 : Analog channel 2 IT status
886
+  *    - ADC1_IT_AWS3 : Analog channel 3 IT status
887
+  *    - ADC1_IT_AWS4 : Analog channel 4 IT status
888
+  *    - ADC1_IT_AWS5 : Analog channel 5 IT status
889
+  *    - ADC1_IT_AWS6 : Analog channel 6 IT status
890
+  *    - ADC1_IT_AWS7 : Analog channel 7 IT status
891
+  *    - ADC1_IT_AWS8 : Analog channel 8 IT status
892
+  *    - ADC1_IT_AWS9 : Analog channel 9 IT status
893
+  *    - ADC1_IT_EOC    : EOC pending bit
894
+  * @retval ITStatus: status of the specified pending bit.
895
+  */
896
+inline ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit)
897
+{
898
+	ITStatus itstatus = RESET;
899
+	uint8_t temp = 0;
900
+
901
+	/* Check the parameters */
902
+	assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
903
+
904
+	if (((uint16_t) ITPendingBit & 0xF0) == 0x10) {
905
+		/* Get analog watchdog channel status */
906
+		temp = (uint8_t) ((uint16_t) ITPendingBit & 0x0F);
907
+		if (temp < 8) {
908
+			itstatus = (ITStatus) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << temp));
909
+		} else {
910
+			itstatus = (ITStatus) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (temp - 8)));
911
+		}
912
+	} else  /* Get EOC | AWD flag status */
913
+	{
914
+		itstatus = (ITStatus) (ADC1->CSR & (uint8_t) ITPendingBit);
915
+	}
916
+	return ((ITStatus) itstatus);
917
+}
918
+
919
+/**
920
+  * @brief  Clear the ADC1 End of Conversion pending bit.
921
+  * @param   ITPendingBit : the IT pending bit to clear.
922
+  * This parameter can be one of the following values:
923
+  *    - ADC1_IT_AWD   : Analog WDG IT status
924
+  *    - ADC1_IT_AWS0 : Analog channel 0 IT status
925
+  *    - ADC1_IT_AWS1 : Analog channel 1 IT status
926
+  *    - ADC1_IT_AWS2 : Analog channel 2 IT status
927
+  *    - ADC1_IT_AWS3 : Analog channel 3 IT status
928
+  *    - ADC1_IT_AWS4 : Analog channel 4 IT status
929
+  *    - ADC1_IT_AWS5 : Analog channel 5 IT status
930
+  *    - ADC1_IT_AWS6 : Analog channel 6 IT status
931
+  *    - ADC1_IT_AWS7 : Analog channel 7 IT status
932
+  *    - ADC1_IT_AWS8 : Analog channel 8 IT status
933
+  *    - ADC1_IT_AWS9 : Analog channel 9 IT status
934
+  *    - ADC1_IT_EOC  : EOC pending bit
935
+  * @retval None
936
+  */
937
+inline void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit)
938
+{
939
+	uint8_t temp = 0;
940
+
941
+	/* Check the parameters */
942
+	assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit));
943
+
944
+	if (((uint16_t) ITPendingBit & 0xF0) == 0x10) {
945
+		/* Clear analog watchdog channel status */
946
+		temp = (uint8_t) ((uint16_t) ITPendingBit & 0x0F);
947
+		if (temp < 8) {
948
+			ADC1->AWSRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << temp);
949
+		} else {
950
+			ADC1->AWSRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (temp - 8));
951
+		}
952
+	} else  /* Clear EOC | AWD flag status */
953
+	{
954
+		ADC1->CSR &= (uint8_t) ((uint16_t) ~(uint16_t) ITPendingBit);
955
+	}
956
+}
957
+
958
+/**
959
+  * @}
960
+  */
961
+
962
+/**
963
+  * @}
964
+  */
965
+
966
+
967
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
968
+
969
+
970
+#endif /* __STM8S_ADC1_H */

+ 318 - 0
TinySPL_S103/stm8s_awu.h View File

@@ -0,0 +1,318 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_awu.h
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all functions prototype and macros for the AWU peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+/* Define to prevent recursive inclusion -------------------------------------*/
29
+#ifndef __STM8S_AWU_H
30
+#define __STM8S_AWU_H
31
+
32
+/* Includes ------------------------------------------------------------------*/
33
+#include "stm8s.h"
34
+
35
+/* Exported types ------------------------------------------------------------*/
36
+
37
+/** @addtogroup AWU_Exported_Types
38
+  * @{
39
+  */
40
+
41
+/**
42
+  * @brief  AWU TimeBase selection
43
+  */
44
+
45
+typedef enum {
46
+	AWU_TIMEBASE_NO_IT = (uint8_t) 0,    /*!< No AWU interrupt selected */
47
+	AWU_TIMEBASE_250US = (uint8_t) 1,    /*!< AWU Timebase equals 0.25 ms */
48
+	AWU_TIMEBASE_500US = (uint8_t) 2,    /*!< AWU Timebase equals 0.5 ms */
49
+	AWU_TIMEBASE_1MS = (uint8_t) 3,    /*!< AWU Timebase equals 1 ms */
50
+	AWU_TIMEBASE_2MS = (uint8_t) 4,    /*!< AWU Timebase equals 2 ms */
51
+	AWU_TIMEBASE_4MS = (uint8_t) 5,    /*!< AWU Timebase equals 4 ms */
52
+	AWU_TIMEBASE_8MS = (uint8_t) 6,    /*!< AWU Timebase equals 8 ms */
53
+	AWU_TIMEBASE_16MS = (uint8_t) 7,    /*!< AWU Timebase equals 16 ms */
54
+	AWU_TIMEBASE_32MS = (uint8_t) 8,    /*!< AWU Timebase equals 32 ms */
55
+	AWU_TIMEBASE_64MS = (uint8_t) 9,    /*!< AWU Timebase equals 64 ms */
56
+	AWU_TIMEBASE_128MS = (uint8_t) 10,   /*!< AWU Timebase equals 128 ms */
57
+	AWU_TIMEBASE_256MS = (uint8_t) 11,   /*!< AWU Timebase equals 256 ms */
58
+	AWU_TIMEBASE_512MS = (uint8_t) 12,   /*!< AWU Timebase equals 512 ms */
59
+	AWU_TIMEBASE_1S = (uint8_t) 13,   /*!< AWU Timebase equals 1 s */
60
+	AWU_TIMEBASE_2S = (uint8_t) 14,   /*!< AWU Timebase equals 2 s */
61
+	AWU_TIMEBASE_12S = (uint8_t) 15,   /*!< AWU Timebase equals 12 s */
62
+	AWU_TIMEBASE_30S = (uint8_t) 16    /*!< AWU Timebase equals 30 s */
63
+} AWU_Timebase_TypeDef;
64
+
65
+/**
66
+  * @}
67
+  */
68
+
69
+/* Exported constants --------------------------------------------------------*/
70
+
71
+/** @addtogroup AWU_Exported_Constants
72
+  * @{
73
+  */
74
+
75
+#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */
76
+#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */
77
+
78
+/**
79
+  * @}
80
+  */
81
+
82
+/* Exported macros ------------------------------------------------------------*/
83
+
84
+/* Private macros ------------------------------------------------------------*/
85
+
86
+/** @addtogroup AWU_Private_Macros
87
+  * @{
88
+  */
89
+
90
+/**
91
+  * @brief  Macro used by the assert function to check the different functions parameters.
92
+  */
93
+
94
+/**
95
+  * @brief   Macro used by the assert function to check the AWU timebases
96
+  */
97
+#define IS_AWU_TIMEBASE_OK(TB) \
98
+  (((TB) == AWU_TIMEBASE_NO_IT) || \
99
+   ((TB) == AWU_TIMEBASE_250US) || \
100
+   ((TB) == AWU_TIMEBASE_500US) || \
101
+   ((TB) == AWU_TIMEBASE_1MS)   || \
102
+   ((TB) == AWU_TIMEBASE_2MS)   || \
103
+   ((TB) == AWU_TIMEBASE_4MS)   || \
104
+   ((TB) == AWU_TIMEBASE_8MS)   || \
105
+   ((TB) == AWU_TIMEBASE_16MS)  || \
106
+   ((TB) == AWU_TIMEBASE_32MS)  || \
107
+   ((TB) == AWU_TIMEBASE_64MS)  || \
108
+   ((TB) == AWU_TIMEBASE_128MS) || \
109
+   ((TB) == AWU_TIMEBASE_256MS) || \
110
+   ((TB) == AWU_TIMEBASE_512MS) || \
111
+   ((TB) == AWU_TIMEBASE_1S)    || \
112
+   ((TB) == AWU_TIMEBASE_2S)    || \
113
+   ((TB) == AWU_TIMEBASE_12S)   || \
114
+   ((TB) == AWU_TIMEBASE_30S))
115
+
116
+/**
117
+  * @brief    Macro used by the assert function to check the LSI frequency (in Hz)
118
+  */
119
+#define IS_LSI_FREQUENCY_OK(FREQ) \
120
+  (((FREQ) >= LSI_FREQUENCY_MIN) && \
121
+   ((FREQ) <= LSI_FREQUENCY_MAX))
122
+
123
+/**
124
+  * @}
125
+  */
126
+
127
+/* Exported functions ------------------------------------------------------- */
128
+
129
+#if 0
130
+/** @addtogroup AWU_Exported_Functions
131
+  * @{
132
+  */
133
+void AWU_DeInit(void);
134
+
135
+void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase);
136
+
137
+void AWU_Cmd(FunctionalState NewState);
138
+
139
+void AWU_LSICalibrationConfig(uint32_t LSIFreqHz);
140
+
141
+void AWU_IdleModeEnable(void);
142
+
143
+FlagStatus AWU_GetFlagStatus(void);
144
+
145
+#endif
146
+/**
147
+  * @}
148
+  */
149
+
150
+/** @addtogroup STM8S_StdPeriph_Driver
151
+  * @{
152
+  */
153
+/* Private typedef -----------------------------------------------------------*/
154
+/* Private define ------------------------------------------------------------*/
155
+/* Private macro -------------------------------------------------------------*/
156
+/* Private variables ---------------------------------------------------------*/
157
+/* Private function prototypes -----------------------------------------------*/
158
+/* Private functions ---------------------------------------------------------*/
159
+
160
+/* Public functions ----------------------------------------------------------*/
161
+
162
+/**
163
+  * @addtogroup AWU_Public_Functions
164
+  * @{
165
+  */
166
+
167
+/**
168
+  * @brief  Deinitializes the AWU peripheral registers to their default reset
169
+  * values.
170
+  * @param  None
171
+  * @retval None
172
+  */
173
+inline void AWU_DeInit(void)
174
+{
175
+	AWU->CSR = AWU_CSR_RESET_VALUE;
176
+	AWU->APR = AWU_APR_RESET_VALUE;
177
+	AWU->TBR = AWU_TBR_RESET_VALUE;
178
+}
179
+
180
+/**
181
+  * @brief  Initializes the AWU peripheral according to the specified parameters.
182
+  * @param   AWU_TimeBase : Time base selection (interval between AWU interrupts).
183
+  * can be one of the values of @ref AWU_Timebase_TypeDef.
184
+  * @retval None
185
+  * @par Required preconditions:
186
+  * The LS RC calibration must be performed before calling this function.
187
+  */
188
+inline void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase)
189
+{
190
+/* See also AWU_Timebase_TypeDef structure in stm8s_awu.h file :
191
+                          N   2   5   1   2   4   8   1   3   6   1   2   5   1   2   1   3
192
+                          O   5   0   m   m   m   m   6   2   4   2   5   1   s   s   2   0
193
+                          I   0   0   s   s   s   s   m   m   m   8   6   2           s   s
194
+                          T   u   u                   s   s   s   m   m   m
195
+                              s   s                               s   s   s
196
+*/
197
+/** Contains the different values to write in the APR register (used by AWU_Init function) */
198
+	static CONST uint8_t APR_Array[17] =
199
+		{
200
+			0, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 61, 23, 23, 62
201
+		};
202
+
203
+/** Contains the different values to write in the TBR register (used by AWU_Init function) */
204
+	static CONST uint8_t TBR_Array[17] =
205
+		{
206
+			0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 12, 14, 15, 15
207
+		};
208
+
209
+	/* Check parameter */
210
+	assert_param(IS_AWU_TIMEBASE_OK(AWU_TimeBase));
211
+
212
+	/* Enable the AWU peripheral */
213
+	AWU->CSR |= AWU_CSR_AWUEN;
214
+
215
+	/* Set the TimeBase */
216
+	AWU->TBR &= (uint8_t) (~AWU_TBR_AWUTB);
217
+	AWU->TBR |= TBR_Array[(uint8_t) AWU_TimeBase];
218
+
219
+	/* Set the APR divider */
220
+	AWU->APR &= (uint8_t) (~AWU_APR_APR);
221
+	AWU->APR |= APR_Array[(uint8_t) AWU_TimeBase];
222
+}
223
+
224
+/**
225
+  * @brief  Enable or disable the AWU peripheral.
226
+  * @param   NewState Indicates the new state of the AWU peripheral.
227
+  * @retval None
228
+  * @par Required preconditions:
229
+  * Initialisation of AWU and LS RC calibration must be done before.
230
+  */
231
+inline void AWU_Cmd(FunctionalState NewState)
232
+{
233
+	if (NewState != DISABLE) {
234
+		/* Enable the AWU peripheral */
235
+		AWU->CSR |= AWU_CSR_AWUEN;
236
+	} else {
237
+		/* Disable the AWU peripheral */
238
+		AWU->CSR &= (uint8_t) (~AWU_CSR_AWUEN);
239
+	}
240
+}
241
+
242
+/**
243
+  * @brief  Update APR register with the measured LSI frequency.
244
+  * @par Note on the APR calculation:
245
+  * A is the integer part of lsifreqkhz/4 and x the decimal part.
246
+  * x <= A/(1+2A) is equivalent to A >= x(1+2A) and also to 4A >= 4x(1+2A) [F1]
247
+  * but we know that A + x = lsifreqkhz/4 ==> 4x = lsifreqkhz-4A
248
+  * so [F1] can be written :
249
+  * 4A >= (lsifreqkhz-4A)(1+2A)
250
+  * @param   LSIFreqHz Low Speed RC frequency measured by timer (in Hz).
251
+  * @retval None
252
+  * @par Required preconditions:
253
+  * - AWU must be disabled to avoid unwanted interrupts.
254
+  */
255
+inline void AWU_LSICalibrationConfig(uint32_t LSIFreqHz)
256
+{
257
+	uint16_t lsifreqkhz = 0x0;
258
+	uint16_t A = 0x0;
259
+
260
+	/* Check parameter */
261
+	assert_param(IS_LSI_FREQUENCY_OK(LSIFreqHz));
262
+
263
+	lsifreqkhz = (uint16_t) (LSIFreqHz / 1000); /* Converts value in kHz */
264
+
265
+	/* Calculation of AWU calibration value */
266
+
267
+	A = (uint16_t) (lsifreqkhz >> 2U); /* Division by 4, keep integer part only */
268
+
269
+	if ((4U * A) >= ((lsifreqkhz - (4U * A)) * (1U + (2U * A)))) {
270
+		AWU->APR = (uint8_t) (A - 2U);
271
+	} else {
272
+		AWU->APR = (uint8_t) (A - 1U);
273
+	}
274
+}
275
+
276
+/**
277
+  * @brief  Configures AWU in Idle mode to reduce power consumption.
278
+  * @param  None
279
+  * @retval None
280
+  */
281
+inline void AWU_IdleModeEnable(void)
282
+{
283
+	/* Disable AWU peripheral */
284
+	AWU->CSR &= (uint8_t) (~AWU_CSR_AWUEN);
285
+
286
+	/* No AWU timebase */
287
+	AWU->TBR = (uint8_t) (~AWU_TBR_AWUTB);
288
+}
289
+
290
+/**
291
+  * @brief  Returns status of the AWU peripheral flag.
292
+  * @param  None
293
+  * @retval FlagStatus : Status of the AWU flag.
294
+  * This parameter can be any of the @ref FlagStatus enumeration.
295
+  */
296
+inline FlagStatus AWU_GetFlagStatus(void)
297
+{
298
+	return ((FlagStatus) (((uint8_t) (AWU->CSR & AWU_CSR_AWUF) == (uint8_t) 0x00) ? RESET : SET));
299
+}
300
+
301
+
302
+/**
303
+  * @}
304
+  */
305
+
306
+/**
307
+  * @}
308
+  */
309
+
310
+
311
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
312
+
313
+
314
+
315
+#endif /* __STM8S_AWU_H */
316
+
317
+
318
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 241 - 0
TinySPL_S103/stm8s_beep.h View File

@@ -0,0 +1,241 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_beep.h
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all functions prototype and macros for the BEEP peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+
29
+/* Define to prevent recursive inclusion -------------------------------------*/
30
+#ifndef __STM8S_BEEP_H
31
+#define __STM8S_BEEP_H
32
+
33
+/* Includes ------------------------------------------------------------------*/
34
+#include "stm8s.h"
35
+
36
+/* Exported types ------------------------------------------------------------*/
37
+
38
+/** @addtogroup BEEP_Exported_Types
39
+  * @{
40
+  */
41
+
42
+/**
43
+  * @brief  BEEP Frequency selection
44
+  */
45
+typedef enum {
46
+	BEEP_FREQUENCY_1KHZ = (uint8_t) 0x00,  /*!< Beep signal output frequency equals to 1 KHz */
47
+	BEEP_FREQUENCY_2KHZ = (uint8_t) 0x40,  /*!< Beep signal output frequency equals to 2 KHz */
48
+	BEEP_FREQUENCY_4KHZ = (uint8_t) 0x80   /*!< Beep signal output frequency equals to 4 KHz */
49
+} BEEP_Frequency_TypeDef;
50
+
51
+/**
52
+  * @}
53
+  */
54
+
55
+/* Exported constants --------------------------------------------------------*/
56
+
57
+/** @addtogroup BEEP_Exported_Constants
58
+  * @{
59
+  */
60
+
61
+#define BEEP_CALIBRATION_DEFAULT ((uint8_t)0x0B) /*!< Default value when calibration is not done */
62
+
63
+#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */
64
+#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */
65
+
66
+/**
67
+  * @}
68
+  */
69
+
70
+/* Exported macros -----------------------------------------------------------*/
71
+/* Private macros ------------------------------------------------------------*/
72
+
73
+/** @addtogroup BEEP_Private_Macros
74
+  * @{
75
+  */
76
+
77
+/**
78
+  * @brief  Macro used by the assert function to check the different functions parameters.
79
+  */
80
+
81
+/**
82
+  * @brief  Macro used by the assert function to check the BEEP frequencies.
83
+  */
84
+#define IS_BEEP_FREQUENCY_OK(FREQ) \
85
+  (((FREQ) == BEEP_FREQUENCY_1KHZ) || \
86
+   ((FREQ) == BEEP_FREQUENCY_2KHZ) || \
87
+   ((FREQ) == BEEP_FREQUENCY_4KHZ))
88
+
89
+/**
90
+  * @brief   Macro used by the assert function to check the LSI frequency (in Hz).
91
+  */
92
+#define IS_LSI_FREQUENCY_OK(FREQ) \
93
+  (((FREQ) >= LSI_FREQUENCY_MIN) && \
94
+   ((FREQ) <= LSI_FREQUENCY_MAX))
95
+
96
+/**
97
+  * @}
98
+  */
99
+
100
+/* Exported functions ------------------------------------------------------- */
101
+
102
+/** @addtogroup BEEP_Exported_Functions
103
+  * @{
104
+  */
105
+
106
+#if 0
107
+void BEEP_DeInit(void);
108
+
109
+void BEEP_Init(BEEP_Frequency_TypeDef BEEP_Frequency);
110
+
111
+void BEEP_Cmd(FunctionalState NewState);
112
+
113
+void BEEP_LSICalibrationConfig(uint32_t LSIFreqHz);
114
+#endif
115
+
116
+/**
117
+  * @}
118
+  */
119
+
120
+
121
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
122
+
123
+/** @addtogroup STM8S_StdPeriph_Driver
124
+  * @{
125
+  */
126
+/* Private typedef -----------------------------------------------------------*/
127
+/* Private define ------------------------------------------------------------*/
128
+/* Private macro -------------------------------------------------------------*/
129
+/* Private variables ---------------------------------------------------------*/
130
+/* Private function prototypes -----------------------------------------------*/
131
+/* Private functions ---------------------------------------------------------*/
132
+
133
+/* Public functions ----------------------------------------------------------*/
134
+
135
+/**
136
+  * @addtogroup BEEP_Public_Functions
137
+  * @{
138
+  */
139
+
140
+/**
141
+  * @brief  Deinitializes the BEEP peripheral registers to their default reset
142
+  * values.
143
+  * @param  None
144
+  * @retval None
145
+  */
146
+inline void BEEP_DeInit(void)
147
+{
148
+	BEEP->CSR = BEEP_CSR_RESET_VALUE;
149
+}
150
+
151
+/**
152
+  * @brief  Initializes the BEEP function according to the specified parameters.
153
+  * @param   BEEP_Frequency Frequency selection.
154
+  * can be one of the values of @ref BEEP_Frequency_TypeDef.
155
+  * @retval None
156
+  * @par Required preconditions:
157
+  * The LS RC calibration must be performed before calling this function.
158
+  */
159
+inline void BEEP_Init(BEEP_Frequency_TypeDef BEEP_Frequency)
160
+{
161
+	/* Check parameter */
162
+	assert_param(IS_BEEP_FREQUENCY_OK(BEEP_Frequency));
163
+
164
+	/* Set a default calibration value if no calibration is done */
165
+	if ((BEEP->CSR & BEEP_CSR_BEEPDIV) == BEEP_CSR_BEEPDIV) {
166
+		BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPDIV); /* Clear bits */
167
+		BEEP->CSR |= BEEP_CALIBRATION_DEFAULT;
168
+	}
169
+
170
+	/* Select the output frequency */
171
+	BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPSEL);
172
+	BEEP->CSR |= (uint8_t) (BEEP_Frequency);
173
+}
174
+
175
+/**
176
+  * @brief  Enable or disable the BEEP function.
177
+  * @param   NewState Indicates the new state of the BEEP function.
178
+  * @retval None
179
+  * @par Required preconditions:
180
+  * Initialisation of BEEP and LS RC calibration must be done before.
181
+  */
182
+inline void BEEP_Cmd(FunctionalState NewState)
183
+{
184
+	if (NewState != DISABLE) {
185
+		/* Enable the BEEP peripheral */
186
+		BEEP->CSR |= BEEP_CSR_BEEPEN;
187
+	} else {
188
+		/* Disable the BEEP peripheral */
189
+		BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPEN);
190
+	}
191
+}
192
+
193
+/**
194
+  * @brief  Update CSR register with the measured LSI frequency.
195
+  * @par Note on the APR calculation:
196
+  * A is the integer part of LSIFreqkHz/4 and x the decimal part.
197
+  * x <= A/(1+2A) is equivalent to A >= x(1+2A) and also to 4A >= 4x(1+2A) [F1]
198
+  * but we know that A + x = LSIFreqkHz/4 ==> 4x = LSIFreqkHz-4A
199
+  * so [F1] can be written :
200
+  * 4A >= (LSIFreqkHz-4A)(1+2A)
201
+  * @param   LSIFreqHz Low Speed RC frequency measured by timer (in Hz).
202
+  * @retval None
203
+  * @par Required preconditions:
204
+  * - BEEP must be disabled to avoid unwanted interrupts.
205
+  */
206
+inline void BEEP_LSICalibrationConfig(uint32_t LSIFreqHz)
207
+{
208
+	uint16_t lsifreqkhz;
209
+	uint16_t A;
210
+
211
+	/* Check parameter */
212
+	assert_param(IS_LSI_FREQUENCY_OK(LSIFreqHz));
213
+
214
+	lsifreqkhz = (uint16_t) (LSIFreqHz / 1000); /* Converts value in kHz */
215
+
216
+	/* Calculation of BEEPER calibration value */
217
+
218
+	BEEP->CSR &= (uint8_t) (~BEEP_CSR_BEEPDIV); /* Clear bits */
219
+
220
+	A = (uint16_t) (lsifreqkhz >> 3U); /* Division by 8, keep integer part only */
221
+
222
+	if ((8U * A) >= ((lsifreqkhz - (8U * A)) * (1U + (2U * A)))) {
223
+		BEEP->CSR |= (uint8_t) (A - 2U);
224
+	} else {
225
+		BEEP->CSR |= (uint8_t) (A - 1U);
226
+	}
227
+}
228
+
229
+/**
230
+  * @}
231
+  */
232
+
233
+/**
234
+  * @}
235
+  */
236
+
237
+
238
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
239
+
240
+
241
+#endif /* __STM8S_BEEP_H */

File diff suppressed because it is too large
+ 1059 - 0
TinySPL_S103/stm8s_clk.h


+ 293 - 0
TinySPL_S103/stm8s_exti.h View File

@@ -0,0 +1,293 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_exti.h
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all functions prototype and macros for the EXTI peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+/* Define to prevent recursive inclusion -------------------------------------*/
29
+#ifndef __STM8S_EXTI_H
30
+#define __STM8S_EXTI_H
31
+
32
+/* Includes ------------------------------------------------------------------*/
33
+#include "stm8s.h"
34
+
35
+/* Exported types ------------------------------------------------------------*/
36
+
37
+/** @addtogroup EXTI_Exported_Types
38
+  * @{
39
+  */
40
+
41
+/**
42
+  * @brief  EXTI Sensitivity values for PORTA to PORTE
43
+  */
44
+typedef enum {
45
+	EXTI_SENSITIVITY_FALL_LOW = (uint8_t) 0x00, /*!< Interrupt on Falling edge and Low level */
46
+	EXTI_SENSITIVITY_RISE_ONLY = (uint8_t) 0x01, /*!< Interrupt on Rising edge only */
47
+	EXTI_SENSITIVITY_FALL_ONLY = (uint8_t) 0x02, /*!< Interrupt on Falling edge only */
48
+	EXTI_SENSITIVITY_RISE_FALL = (uint8_t) 0x03  /*!< Interrupt on Rising and Falling edges */
49
+} EXTI_Sensitivity_TypeDef;
50
+
51
+/**
52
+  * @brief  EXTI Sensitivity values for TLI
53
+  */
54
+typedef enum {
55
+	EXTI_TLISENSITIVITY_FALL_ONLY = (uint8_t) 0x00, /*!< Top Level Interrupt on Falling edge only */
56
+	EXTI_TLISENSITIVITY_RISE_ONLY = (uint8_t) 0x04  /*!< Top Level Interrupt on Rising edge only */
57
+} EXTI_TLISensitivity_TypeDef;
58
+
59
+/**
60
+  * @brief  EXTI PortNum possible values
61
+  */
62
+typedef enum {
63
+	EXTI_PORT_GPIOA = (uint8_t) 0x00, /*!< GPIO Port A */
64
+	EXTI_PORT_GPIOB = (uint8_t) 0x01, /*!< GPIO Port B */
65
+	EXTI_PORT_GPIOC = (uint8_t) 0x02, /*!< GPIO Port C */
66
+	EXTI_PORT_GPIOD = (uint8_t) 0x03, /*!< GPIO Port D */
67
+	EXTI_PORT_GPIOE = (uint8_t) 0x04  /*!< GPIO Port E */
68
+} EXTI_Port_TypeDef;
69
+
70
+/**
71
+  * @}
72
+  */
73
+
74
+/* Private macros ------------------------------------------------------------*/
75
+
76
+/** @addtogroup EXTI_Private_Macros
77
+  * @{
78
+  */
79
+
80
+/**
81
+  * @brief  Macro used by the assert function in order to check the different sensitivity values for PORTA to PORTE.
82
+  */
83
+#define IS_EXTI_SENSITIVITY_OK(SensitivityValue) \
84
+  (((SensitivityValue) == EXTI_SENSITIVITY_FALL_LOW) || \
85
+   ((SensitivityValue) == EXTI_SENSITIVITY_RISE_ONLY) || \
86
+   ((SensitivityValue) == EXTI_SENSITIVITY_FALL_ONLY) || \
87
+   ((SensitivityValue) == EXTI_SENSITIVITY_RISE_FALL))
88
+
89
+/**
90
+  * @brief  Macro used by the assert function in order to check the different sensitivity values for TLI.
91
+  */
92
+#define IS_EXTI_TLISENSITIVITY_OK(SensitivityValue) \
93
+  (((SensitivityValue) == EXTI_TLISENSITIVITY_FALL_ONLY) || \
94
+   ((SensitivityValue) == EXTI_TLISENSITIVITY_RISE_ONLY))
95
+
96
+/**
97
+  * @brief  Macro used by the assert function in order to check the different Port values
98
+  */
99
+#define IS_EXTI_PORT_OK(PORT) \
100
+  (((PORT) == EXTI_PORT_GPIOA) ||\
101
+   ((PORT) == EXTI_PORT_GPIOB) ||\
102
+   ((PORT) == EXTI_PORT_GPIOC) ||\
103
+   ((PORT) == EXTI_PORT_GPIOD) ||\
104
+   ((PORT) == EXTI_PORT_GPIOE))
105
+
106
+/**
107
+  * @brief  Macro used by the assert function in order to check the different values of the EXTI PinMask
108
+  */
109
+#define IS_EXTI_PINMASK_OK(PinMask) ((((PinMask) & (uint8_t)0x00) == (uint8_t)0x00) && ((PinMask) != (uint8_t)0x00))
110
+
111
+/**
112
+  * @}
113
+  */
114
+
115
+/* Exported functions ------------------------------------------------------- */
116
+
117
+/** @addtogroup EXTI_Exported_Functions
118
+  * @{
119
+  */
120
+
121
+#if 0
122
+void EXTI_DeInit(void);
123
+
124
+void EXTI_SetExtIntSensitivity(EXTI_Port_TypeDef Port, EXTI_Sensitivity_TypeDef SensitivityValue);
125
+
126
+void EXTI_SetTLISensitivity(EXTI_TLISensitivity_TypeDef SensitivityValue);
127
+
128
+EXTI_Sensitivity_TypeDef EXTI_GetExtIntSensitivity(EXTI_Port_TypeDef Port);
129
+
130
+EXTI_TLISensitivity_TypeDef EXTI_GetTLISensitivity(void);
131
+
132
+#endif
133
+
134
+
135
+/** @addtogroup STM8S_StdPeriph_Driver
136
+  * @{
137
+  */
138
+/* Private typedef -----------------------------------------------------------*/
139
+/* Private define ------------------------------------------------------------*/
140
+/* Private macro -------------------------------------------------------------*/
141
+/* Private variables ---------------------------------------------------------*/
142
+/* Private function prototypes -----------------------------------------------*/
143
+/* Private functions ---------------------------------------------------------*/
144
+
145
+/* Public functions ----------------------------------------------------------*/
146
+
147
+/**
148
+  * @addtogroup EXTI_Public_Functions
149
+  * @{
150
+  */
151
+
152
+/**
153
+  * @brief  Deinitializes the external interrupt control registers to their default reset value.
154
+  * @param  None
155
+  * @retval None
156
+  */
157
+inline void EXTI_DeInit(void)
158
+{
159
+	EXTI->CR1 = EXTI_CR1_RESET_VALUE;
160
+	EXTI->CR2 = EXTI_CR2_RESET_VALUE;
161
+}
162
+
163
+/**
164
+  * @brief  Set the external interrupt sensitivity of the selected port.
165
+  * @warning
166
+  * - The modification of external interrupt sensitivity is only possible when the interrupts are disabled.
167
+  * - The normal behavior is to disable the interrupts before calling this function, and re-enable them after.
168
+  * @param   Port The port number to access.
169
+  * @param   SensitivityValue The external interrupt sensitivity value to set.
170
+  * @retval None
171
+  * @par Required preconditions:
172
+  * Global interrupts must be disabled before calling this function.
173
+  */
174
+inline void EXTI_SetExtIntSensitivity(EXTI_Port_TypeDef Port, EXTI_Sensitivity_TypeDef SensitivityValue)
175
+{
176
+	/* Check function parameters */
177
+	assert_param(IS_EXTI_PORT_OK(Port));
178
+	assert_param(IS_EXTI_SENSITIVITY_OK(SensitivityValue));
179
+
180
+	/* Set external interrupt sensitivity */
181
+	switch (Port) {
182
+		case EXTI_PORT_GPIOA:
183
+			EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PAIS);
184
+			EXTI->CR1 |= (uint8_t) (SensitivityValue);
185
+			break;
186
+		case EXTI_PORT_GPIOB:
187
+			EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PBIS);
188
+			EXTI->CR1 |= (uint8_t) ((uint8_t) (SensitivityValue) << 2);
189
+			break;
190
+		case EXTI_PORT_GPIOC:
191
+			EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PCIS);
192
+			EXTI->CR1 |= (uint8_t) ((uint8_t) (SensitivityValue) << 4);
193
+			break;
194
+		case EXTI_PORT_GPIOD:
195
+			EXTI->CR1 &= (uint8_t) (~EXTI_CR1_PDIS);
196
+			EXTI->CR1 |= (uint8_t) ((uint8_t) (SensitivityValue) << 6);
197
+			break;
198
+		case EXTI_PORT_GPIOE:
199
+			EXTI->CR2 &= (uint8_t) (~EXTI_CR2_PEIS);
200
+			EXTI->CR2 |= (uint8_t) (SensitivityValue);
201
+			break;
202
+		default:
203
+			break;
204
+	}
205
+}
206
+
207
+/**
208
+  * @brief  Set the TLI interrupt sensitivity.
209
+  * @param   SensitivityValue The TLI interrupt sensitivity value.
210
+  * @retval None
211
+  * @par Required preconditions:
212
+  * Global interrupts must be disabled before calling this function.
213
+  */
214
+inline void EXTI_SetTLISensitivity(EXTI_TLISensitivity_TypeDef SensitivityValue)
215
+{
216
+	/* Check function parameters */
217
+	assert_param(IS_EXTI_TLISENSITIVITY_OK(SensitivityValue));
218
+
219
+	/* Set TLI interrupt sensitivity */
220
+	EXTI->CR2 &= (uint8_t) (~EXTI_CR2_TLIS);
221
+	EXTI->CR2 |= (uint8_t) (SensitivityValue);
222
+}
223
+
224
+/**
225
+  * @brief  Get the external interrupt sensitivity of the selected port.
226
+  * @param   Port The port number to access.
227
+  * @retval EXTI_Sensitivity_TypeDef The external interrupt sensitivity of the selected port.
228
+  */
229
+inline EXTI_Sensitivity_TypeDef EXTI_GetExtIntSensitivity(EXTI_Port_TypeDef Port)
230
+{
231
+	uint8_t value = 0;
232
+
233
+	/* Check function parameters */
234
+	assert_param(IS_EXTI_PORT_OK(Port));
235
+
236
+	switch (Port) {
237
+		case EXTI_PORT_GPIOA:
238
+			value = (uint8_t) (EXTI->CR1 & EXTI_CR1_PAIS);
239
+			break;
240
+		case EXTI_PORT_GPIOB:
241
+			value = (uint8_t) ((uint8_t) (EXTI->CR1 & EXTI_CR1_PBIS) >> 2);
242
+			break;
243
+		case EXTI_PORT_GPIOC:
244
+			value = (uint8_t) ((uint8_t) (EXTI->CR1 & EXTI_CR1_PCIS) >> 4);
245
+			break;
246
+		case EXTI_PORT_GPIOD:
247
+			value = (uint8_t) ((uint8_t) (EXTI->CR1 & EXTI_CR1_PDIS) >> 6);
248
+			break;
249
+		case EXTI_PORT_GPIOE:
250
+			value = (uint8_t) (EXTI->CR2 & EXTI_CR2_PEIS);
251
+			break;
252
+		default:
253
+			break;
254
+	}
255
+
256
+	return ((EXTI_Sensitivity_TypeDef) value);
257
+}
258
+
259
+/**
260
+  * @brief  Get the TLI interrupt sensitivity.
261
+  * @param  None
262
+  * @retval EXTI_TLISensitivity_TypeDef The TLI interrupt sensitivity read.
263
+  */
264
+inline EXTI_TLISensitivity_TypeDef EXTI_GetTLISensitivity(void)
265
+{
266
+	uint8_t value = 0;
267
+
268
+	/* Get TLI interrupt sensitivity */
269
+	value = (uint8_t) (EXTI->CR2 & EXTI_CR2_TLIS);
270
+
271
+	return ((EXTI_TLISensitivity_TypeDef) value);
272
+}
273
+
274
+/**
275
+  * @}
276
+  */
277
+
278
+/**
279
+  * @}
280
+  */
281
+
282
+
283
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
284
+
285
+
286
+/**
287
+  * @}
288
+  */
289
+
290
+#endif /* __STM8S_EXTI_H */
291
+
292
+
293
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 381 - 0
TinySPL_S103/stm8s_gpio.h View File

@@ -0,0 +1,381 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_gpio.h
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all functions prototype and macros for the GPIO peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+/* Define to prevent recursive inclusion -------------------------------------*/
29
+#ifndef __STM8S_GPIO_H
30
+#define __STM8S_GPIO_H
31
+
32
+/* Includes ------------------------------------------------------------------*/
33
+#include "stm8s.h"
34
+
35
+/* Exported variables ------------------------------------------------------- */
36
+/* Exported types ------------------------------------------------------------*/
37
+
38
+/** @addtogroup GPIO_Exported_Types
39
+  * @{
40
+  */
41
+
42
+/**
43
+  * @brief  GPIO modes
44
+  *
45
+  * Bits definitions:
46
+  * - Bit 7: 0 = INPUT mode
47
+  *          1 = OUTPUT mode
48
+  *          1 = PULL-UP (input) or PUSH-PULL (output)
49
+  * - Bit 5: 0 = No external interrupt (input) or No slope control (output)
50
+  *          1 = External interrupt (input) or Slow control enabled (output)
51
+  * - Bit 4: 0 = Low level (output)
52
+  *          1 = High level (output push-pull) or HI-Z (output open-drain)
53
+  */
54
+typedef enum {
55
+	GPIO_MODE_IN_FL_NO_IT = (uint8_t) 0x00,  /*!< Input floating, no external interrupt */
56
+	GPIO_MODE_IN_PU_NO_IT = (uint8_t) 0x40,  /*!< Input pull-up, no external interrupt */
57
+	GPIO_MODE_IN_FL_IT = (uint8_t) 0x20,  /*!< Input floating, external interrupt */
58
+	GPIO_MODE_IN_PU_IT = (uint8_t) 0x60,  /*!< Input pull-up, external interrupt */
59
+	GPIO_MODE_OUT_OD_LOW_FAST = (uint8_t) 0xA0,  /*!< Output open-drain, low level, 10MHz */
60
+	GPIO_MODE_OUT_PP_LOW_FAST = (uint8_t) 0xE0,  /*!< Output push-pull, low level, 10MHz */
61
+	GPIO_MODE_OUT_OD_LOW_SLOW = (uint8_t) 0x80,  /*!< Output open-drain, low level, 2MHz */
62
+	GPIO_MODE_OUT_PP_LOW_SLOW = (uint8_t) 0xC0,  /*!< Output push-pull, low level, 2MHz */
63
+	GPIO_MODE_OUT_OD_HIZ_FAST = (uint8_t) 0xB0,  /*!< Output open-drain, high-impedance level,10MHz */
64
+	GPIO_MODE_OUT_PP_HIGH_FAST = (uint8_t) 0xF0,  /*!< Output push-pull, high level, 10MHz */
65
+	GPIO_MODE_OUT_OD_HIZ_SLOW = (uint8_t) 0x90,  /*!< Output open-drain, high-impedance level, 2MHz */
66
+	GPIO_MODE_OUT_PP_HIGH_SLOW = (uint8_t) 0xD0   /*!< Output push-pull, high level, 2MHz */
67
+} GPIO_Mode_TypeDef;
68
+
69
+/**
70
+  * @brief  Definition of the GPIO pins. Used by the @ref GPIO_Init function in
71
+  * order to select the pins to be initialized.
72
+  */
73
+
74
+typedef enum {
75
+	GPIO_PIN_0 = ((uint8_t) 0x01),  /*!< Pin 0 selected */
76
+	GPIO_PIN_1 = ((uint8_t) 0x02),  /*!< Pin 1 selected */
77
+	GPIO_PIN_2 = ((uint8_t) 0x04),  /*!< Pin 2 selected */
78
+	GPIO_PIN_3 = ((uint8_t) 0x08),   /*!< Pin 3 selected */
79
+	GPIO_PIN_4 = ((uint8_t) 0x10),  /*!< Pin 4 selected */
80
+	GPIO_PIN_5 = ((uint8_t) 0x20),  /*!< Pin 5 selected */
81
+	GPIO_PIN_6 = ((uint8_t) 0x40),  /*!< Pin 6 selected */
82
+	GPIO_PIN_7 = ((uint8_t) 0x80),  /*!< Pin 7 selected */
83
+	GPIO_PIN_LNIB = ((uint8_t) 0x0F),  /*!< Low nibble pins selected */
84
+	GPIO_PIN_HNIB = ((uint8_t) 0xF0),  /*!< High nibble pins selected */
85
+	GPIO_PIN_ALL = ((uint8_t) 0xFF)   /*!< All pins selected */
86
+} GPIO_Pin_TypeDef;
87
+
88
+/**
89
+  * @}
90
+  */
91
+
92
+/* Exported constants --------------------------------------------------------*/
93
+/* Exported macros -----------------------------------------------------------*/
94
+/* Private macros ------------------------------------------------------------*/
95
+
96
+/** @addtogroup GPIO_Private_Macros
97
+  * @{
98
+  */
99
+
100
+/**
101
+  * @brief  Macro used by the assert function to check the different functions parameters.
102
+  */
103
+
104
+/**
105
+  * @brief  Macro used by the assert function in order to check the different
106
+  * values of GPIOMode_TypeDef.
107
+  */
108
+#define IS_GPIO_MODE_OK(MODE) \
109
+  (((MODE) == GPIO_MODE_IN_FL_NO_IT)    || \
110
+   ((MODE) == GPIO_MODE_IN_PU_NO_IT)    || \
111
+   ((MODE) == GPIO_MODE_IN_FL_IT)       || \
112
+   ((MODE) == GPIO_MODE_IN_PU_IT)       || \
113
+   ((MODE) == GPIO_MODE_OUT_OD_LOW_FAST)  || \
114
+   ((MODE) == GPIO_MODE_OUT_PP_LOW_FAST)  || \
115
+   ((MODE) == GPIO_MODE_OUT_OD_LOW_SLOW)  || \
116
+   ((MODE) == GPIO_MODE_OUT_PP_LOW_SLOW)  || \
117
+   ((MODE) == GPIO_MODE_OUT_OD_HIZ_FAST)  || \
118
+   ((MODE) == GPIO_MODE_OUT_PP_HIGH_FAST)  || \
119
+   ((MODE) == GPIO_MODE_OUT_OD_HIZ_SLOW)  || \
120
+   ((MODE) == GPIO_MODE_OUT_PP_HIGH_SLOW))
121
+
122
+/**
123
+  * @brief  Macro used by the assert function in order to check the different
124
+  * values of GPIO_Pins.
125
+  */
126
+#define IS_GPIO_PIN_OK(PIN)  ((PIN) != (uint8_t)0x00)
127
+
128
+/**
129
+  * @}
130
+  */
131
+
132
+/* Exported functions ------------------------------------------------------- */
133
+/** @addtogroup GPIO_Exported_Functions
134
+  * @{
135
+  */
136
+
137
+#if 0
138
+void GPIO_DeInit(GPIO_TypeDef *GPIOx);
139
+
140
+void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode);
141
+
142
+void GPIO_Write(GPIO_TypeDef *GPIOx, uint8_t PortVal);
143
+
144
+void GPIO_WriteHigh(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins);
145
+
146
+void GPIO_WriteLow(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins);
147
+
148
+void GPIO_WriteReverse(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins);
149
+
150
+uint8_t GPIO_ReadInputData(GPIO_TypeDef *GPIOx);
151
+
152
+uint8_t GPIO_ReadOutputData(GPIO_TypeDef *GPIOx);
153
+
154
+BitStatus GPIO_ReadInputPin(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin);
155
+
156
+void GPIO_ExternalPullUpConfig(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState);
157
+#endif
158
+/**
159
+  * @}
160
+  */
161
+
162
+/** @addtogroup STM8S_StdPeriph_Driver
163
+  * @{
164
+  */
165
+/* Private typedef -----------------------------------------------------------*/
166
+/* Private define ------------------------------------------------------------*/
167
+/* Private macro -------------------------------------------------------------*/
168
+/* Private variables ---------------------------------------------------------*/
169
+/* Private function prototypes -----------------------------------------------*/
170
+/* Private functions ---------------------------------------------------------*/
171
+
172
+/* Public functions ----------------------------------------------------------*/
173
+
174
+/**
175
+  * @addtogroup GPIO_Public_Functions
176
+  * @{
177
+  */
178
+
179
+/**
180
+  * @brief  Deinitializes the GPIOx peripheral registers to their default reset values.
181
+  * @param  GPIOx: Select the GPIO peripheral number (x = A to I).
182
+  * @retval None
183
+  */
184
+inline void GPIO_DeInit(GPIO_TypeDef *GPIOx)
185
+{
186
+	GPIOx->ODR = GPIO_ODR_RESET_VALUE; /* Reset Output Data Register */
187
+	GPIOx->DDR = GPIO_DDR_RESET_VALUE; /* Reset Data Direction Register */
188
+	GPIOx->CR1 = GPIO_CR1_RESET_VALUE; /* Reset Control Register 1 */
189
+	GPIOx->CR2 = GPIO_CR2_RESET_VALUE; /* Reset Control Register 2 */
190
+}
191
+
192
+/**
193
+  * @brief  Initializes the GPIOx according to the specified parameters.
194
+  * @param  GPIOx : Select the GPIO peripheral number (x = A to I).
195
+  * @param  GPIO_Pin : This parameter contains the pin number, it can be any value
196
+  *         of the @ref GPIO_Pin_TypeDef enumeration.
197
+  * @param  GPIO_Mode : This parameter can be a value of the
198
+  *         @Ref GPIO_Mode_TypeDef enumeration.
199
+  * @retval None
200
+  */
201
+
202
+inline void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode)
203
+{
204
+	/*----------------------*/
205
+	/* Check the parameters */
206
+	/*----------------------*/
207
+
208
+	assert_param(IS_GPIO_MODE_OK(GPIO_Mode));
209
+	assert_param(IS_GPIO_PIN_OK(GPIO_Pin));
210
+
211
+	/* Reset corresponding bit to GPIO_Pin in CR2 register */
212
+	GPIOx->CR2 &= (uint8_t) (~(GPIO_Pin));
213
+
214
+	/*-----------------------------*/
215
+	/* Input/Output mode selection */
216
+	/*-----------------------------*/
217
+
218
+	if ((((uint8_t) (GPIO_Mode)) & (uint8_t) 0x80) != (uint8_t) 0x00) /* Output mode */
219
+	{
220
+		if ((((uint8_t) (GPIO_Mode)) & (uint8_t) 0x10) != (uint8_t) 0x00) /* High level */
221
+		{
222
+			GPIOx->ODR |= (uint8_t) GPIO_Pin;
223
+		} else /* Low level */
224
+		{
225
+			GPIOx->ODR &= (uint8_t) (~(GPIO_Pin));
226
+		}
227
+		/* Set Output mode */
228
+		GPIOx->DDR |= (uint8_t) GPIO_Pin;
229
+	} else /* Input mode */
230
+	{
231
+		/* Set Input mode */
232
+		GPIOx->DDR &= (uint8_t) (~(GPIO_Pin));
233
+	}
234
+
235
+	/*------------------------------------------------------------------------*/
236
+	/* Pull-Up/Float (Input) or Push-Pull/Open-Drain (Output) modes selection */
237
+	/*------------------------------------------------------------------------*/
238
+
239
+	if ((((uint8_t) (GPIO_Mode)) & (uint8_t) 0x40) != (uint8_t) 0x00) /* Pull-Up or Push-Pull */
240
+	{
241
+		GPIOx->CR1 |= (uint8_t) GPIO_Pin;
242
+	} else /* Float or Open-Drain */
243
+	{
244
+		GPIOx->CR1 &= (uint8_t) (~(GPIO_Pin));
245
+	}
246
+
247
+	/*-----------------------------------------------------*/
248
+	/* Interrupt (Input) or Slope (Output) modes selection */
249
+	/*-----------------------------------------------------*/
250
+
251
+	if ((((uint8_t) (GPIO_Mode)) & (uint8_t) 0x20) != (uint8_t) 0x00) /* Interrupt or Slow slope */
252
+	{
253
+		GPIOx->CR2 |= (uint8_t) GPIO_Pin;
254
+	} else /* No external interrupt or No slope control */
255
+	{
256
+		GPIOx->CR2 &= (uint8_t) (~(GPIO_Pin));
257
+	}
258
+}
259
+
260
+/**
261
+  * @brief  Writes data to the specified GPIO data port.
262
+  * @note   The port must be configured in output mode.
263
+  * @param  GPIOx : Select the GPIO peripheral number (x = A to I).
264
+  * @param  GPIO_PortVal : Specifies the value to be written to the port output
265
+  *         data register.
266
+  * @retval None
267
+  */
268
+inline void GPIO_Write(GPIO_TypeDef *GPIOx, uint8_t PortVal)
269
+{
270
+	GPIOx->ODR = PortVal;
271
+}
272
+
273
+/**
274
+  * @brief  Writes high level to the specified GPIO pins.
275
+  * @note   The port must be configured in output mode.
276
+  * @param  GPIOx : Select the GPIO peripheral number (x = A to I).
277
+  * @param  PortPins : Specifies the pins to be turned high to the port output.
278
+  *         data register.
279
+  * @retval None
280
+  */
281
+inline void GPIO_WriteHigh(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins)
282
+{
283
+	GPIOx->ODR |= (uint8_t) PortPins;
284
+}
285
+
286
+/**
287
+  * @brief  Writes low level to the specified GPIO pins.
288
+  * @note   The port must be configured in output mode.
289
+  * @param  GPIOx : Select the GPIO peripheral number (x = A to I).
290
+  * @param  PortPins : Specifies the pins to be turned low to the port output.
291
+  *         data register.
292
+  * @retval None
293
+  */
294
+inline void GPIO_WriteLow(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins)
295
+{
296
+	GPIOx->ODR &= (uint8_t) (~PortPins);
297
+}
298
+
299
+/**
300
+  * @brief  Writes reverse level to the specified GPIO pins.
301
+  * @note   The port must be configured in output mode.
302
+  * @param  GPIOx : Select the GPIO peripheral number (x = A to I).
303
+  * @param  PortPins : Specifies the pins to be reversed to the port output.
304
+  *         data register.
305
+  * @retval None
306
+  */
307
+inline void GPIO_WriteReverse(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef PortPins)
308
+{
309
+	GPIOx->ODR ^= (uint8_t) PortPins;
310
+}
311
+
312
+/**
313
+  * @brief  Reads the specified GPIO output data port.
314
+  * @note   The port must be configured in input mode.
315
+  * @param  GPIOx : Select the GPIO peripheral number (x = A to I).
316
+  * @retval GPIO output data port value.
317
+  */
318
+inline uint8_t GPIO_ReadOutputData(GPIO_TypeDef *GPIOx)
319
+{
320
+	return ((uint8_t) GPIOx->ODR);
321
+}
322
+
323
+/**
324
+  * @brief  Reads the specified GPIO input data port.
325
+  * @note   The port must be configured in input mode.
326
+  * @param  GPIOx : Select the GPIO peripheral number (x = A to I).
327
+  * @retval GPIO input data port value.
328
+  */
329
+inline uint8_t GPIO_ReadInputData(GPIO_TypeDef *GPIOx)
330
+{
331
+	return ((uint8_t) GPIOx->IDR);
332
+}
333
+
334
+/**
335
+  * @brief  Reads the specified GPIO input data pin.
336
+  * @param  GPIOx : Select the GPIO peripheral number (x = A to I).
337
+  * @param  GPIO_Pin : Specifies the pin number.
338
+  * @retval BitStatus : GPIO input pin status.
339
+  */
340
+inline BitStatus GPIO_ReadInputPin(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin)
341
+{
342
+	return ((BitStatus) (GPIOx->IDR & (uint8_t) GPIO_Pin));
343
+}
344
+
345
+/**
346
+  * @brief  Configures the external pull-up on GPIOx pins.
347
+  * @param  GPIOx : Select the GPIO peripheral number (x = A to I).
348
+  * @param  GPIO_Pin : Specifies the pin number
349
+  * @param  NewState : The new state of the pull up pin.
350
+  * @retval None
351
+  */
352
+inline void GPIO_ExternalPullUpConfig(GPIO_TypeDef *GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState)
353
+{
354
+	/* Check the parameters */
355
+	assert_param(IS_GPIO_PIN_OK(GPIO_Pin));
356
+	assert_param(IS_FUNCTIONALSTATE_OK(NewState));
357
+
358
+	if (NewState != DISABLE) /* External Pull-Up Set*/
359
+	{
360
+		GPIOx->CR1 |= (uint8_t) GPIO_Pin;
361
+	} else /* External Pull-Up Reset*/
362
+	{
363
+		GPIOx->CR1 &= (uint8_t) (~(GPIO_Pin));
364
+	}
365
+}
366
+
367
+/**
368
+  * @}
369
+  */
370
+
371
+/**
372
+  * @}
373
+  */
374
+
375
+
376
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
377
+
378
+#endif /* __STM8L_GPIO_H */
379
+
380
+
381
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

File diff suppressed because it is too large
+ 1463 - 0
TinySPL_S103/stm8s_i2c.h


+ 506 - 0
TinySPL_S103/stm8s_itc.h View File

@@ -0,0 +1,506 @@
1
+/**
2
+  ******************************************************************************
3
+  * @file    stm8s_itc.h
4
+  * @author  MCD Application Team
5
+  * @version V2.2.0
6
+  * @date    30-September-2014
7
+  * @brief   This file contains all functions prototype and macros for the ITC peripheral.
8
+   ******************************************************************************
9
+  * @attention
10
+  *
11
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
12
+  *
13
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14
+  * You may not use this file except in compliance with the License.
15
+  * You may obtain a copy of the License at:
16
+  *
17
+  *        http://www.st.com/software_license_agreement_liberty_v2
18
+  *
19
+  * Unless required by applicable law or agreed to in writing, software 
20
+  * distributed under the License is distributed on an "AS IS" BASIS, 
21
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22
+  * See the License for the specific language governing permissions and
23
+  * limitations under the License.
24
+  *
25
+  ******************************************************************************
26
+  */
27
+
28
+/* Define to prevent recursive inclusion -------------------------------------*/
29
+#ifndef __STM8S_ITC_H
30
+#define __STM8S_ITC_H
31
+
32
+/* Includes ------------------------------------------------------------------*/
33
+#include "stm8s.h"
34
+
35
+/* Exported types ------------------------------------------------------------*/
36
+
37
+/** @addtogroup ITC_Exported_Types
38
+  * @{
39
+  */
40
+
41
+/**
42
+  * @brief  ITC Interrupt Lines selection
43
+  */
44
+typedef enum {
45
+	ITC_IRQ_TLI = (uint8_t) 0,   /*!< Software interrupt */
46
+	ITC_IRQ_AWU = (uint8_t) 1,   /*!< Auto wake up from halt interrupt */
47
+	ITC_IRQ_CLK = (uint8_t) 2,   /*!< Clock controller interrupt */
48
+	ITC_IRQ_PORTA = (uint8_t) 3,   /*!< Port A external interrupts */
49
+	ITC_IRQ_PORTB = (uint8_t) 4,   /*!< Port B external interrupts */
50
+	ITC_IRQ_PORTC = (uint8_t) 5,   /*!< Port C external interrupts */
51
+	ITC_IRQ_PORTD = (uint8_t) 6,   /*!< Port D external interrupts */
52
+	ITC_IRQ_PORTE = (uint8_t) 7,   /*!< Port E external interrupts */
53
+
54
+#if defined(STM8S208) || defined(STM8AF52Ax)
55
+	ITC_IRQ_CAN_RX         = (uint8_t)8,   /*!< beCAN RX interrupt */
56
+	ITC_IRQ_CAN_TX         = (uint8_t)9,   /*!< beCAN TX/ER/SC interrupt */
57
+#endif /*STM8S208 or STM8AF52Ax */
58
+
59
+#if defined(STM8S903) || defined(STM8AF622x)
60
+	ITC_IRQ_PORTF          = (uint8_t)8,   /*!< Port F external interrupts */
61
+#endif /*STM8S903 or STM8AF622x */
62
+
63
+	ITC_IRQ_SPI = (uint8_t) 10,  /*!< SPI interrupt */
64
+	ITC_IRQ_TIM1_OVF = (uint8_t) 11,  /*!< TIM1 update/overflow/underflow/trigger/
65
+                                         break interrupt*/
66
+	ITC_IRQ_TIM1_CAPCOM = (uint8_t) 12,  /*!< TIM1 capture/compare interrupt */
67
+
68
+#if defined(STM8S903) || defined(STM8AF622x)
69
+	ITC_IRQ_TIM5_OVFTRI    = (uint8_t)13,  /*!< TIM5 update/overflow/underflow/trigger/
70
+                                         interrupt */
71
+	ITC_IRQ_TIM5_CAPCOM    = (uint8_t)14,  /*!< TIM5 capture/compare interrupt */
72
+#else
73
+	ITC_IRQ_TIM2_OVF = (uint8_t) 13,  /*!< TIM2 update /overflow interrupt */
74
+	ITC_IRQ_TIM2_CAPCOM = (uint8_t) 14,  /*!< TIM2 capture/compare interrupt */
75
+#endif /*STM8S903 or STM8AF622x */
76
+
77
+	ITC_IRQ_TIM3_OVF = (uint8_t) 15,  /*!< TIM3 update /overflow interrupt*/
78
+	ITC_IRQ_TIM3_CAPCOM = (uint8_t) 16,  /*!< TIM3 update /overflow interrupt */
79
+
80
+#if defined(STM8S208) || defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \
81
+    defined(STM8S003) || defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
82
+	ITC_IRQ_UART1_TX = (uint8_t) 17,  /*!< UART1 TX interrupt */
83
+	ITC_IRQ_UART1_RX = (uint8_t) 18,  /*!< UART1 RX interrupt */
84
+#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S903 or STM8AF52Ax or STM8AF62Ax */ 
85
+#if defined(STM8AF622x)
86
+	ITC_IRQ_UART4_TX       = (uint8_t)17,  /*!< UART4 TX interrupt */
87
+	ITC_IRQ_UART4_RX       = (uint8_t)18,  /*!< UART4 RX interrupt */
88
+#endif /*STM8AF622x */
89
+
90
+	ITC_IRQ_I2C = (uint8_t) 19,  /*!< I2C interrupt */
91
+
92
+#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
93
+	ITC_IRQ_UART2_TX       = (uint8_t)20,  /*!< USART2 TX interrupt */
94
+	ITC_IRQ_UART2_RX       = (uint8_t)21,  /*!< USART2 RX interrupt */
95
+#endif /*STM8S105 or STM8AF626x */
96
+
97
+#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax)
98
+	ITC_IRQ_UART3_TX       = (uint8_t)20,  /*!< USART3 TX interrupt */
99
+	ITC_IRQ_UART3_RX       = (uint8_t)21,  /*!< USART3 RX interrupt */
100
+	ITC_IRQ_ADC2           = (uint8_t)22,  /*!< ADC2 interrupt */
101
+#endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */
102
+
103
+#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x)
104
+	ITC_IRQ_ADC1 = (uint8_t) 22,  /*!< ADC2 interrupt */
105
+#endif /*STM8S105 or STM8S005 or STM8S003 or STM8S103 or STM8S903 or STM8AF626x or STM8AF622x */
106
+
107
+#if defined(STM8S903) || defined(STM8AF622x)
108
+	ITC_IRQ_TIM6_OVFTRI    = (uint8_t)23,  /*!< TIM6 update/overflow/underflow/trigger/
109
+                                         interrupt */
110
+#else
111
+	ITC_IRQ_TIM4_OVF = (uint8_t) 23,  /*!< TIM4 update /overflow interrupt */
112
+#endif /*STM8S903 or STM8AF622x */
113
+
114
+	ITC_IRQ_EEPROM_EEC = (uint8_t) 24  /*!< Flash interrupt */
115
+} ITC_Irq_TypeDef;
116
+
117
+/**
118
+  * @brief  ITC Priority Levels selection
119
+  */
120
+typedef enum {
121
+	ITC_PRIORITYLEVEL_0 = (uint8_t) 0x02, /*!< Software priority level 0 (cannot be written) */
122
+	ITC_PRIORITYLEVEL_1 = (uint8_t) 0x01, /*!< Software priority level 1 */
123
+	ITC_PRIORITYLEVEL_2 = (uint8_t) 0x00, /*!< Software priority level 2 */
124
+	ITC_PRIORITYLEVEL_3 = (uint8_t) 0x03  /*!< Software priority level 3 */
125
+} ITC_PriorityLevel_TypeDef;
126
+
127
+/**
128
+  * @}
129
+  */
130
+
131
+/* Exported constants --------------------------------------------------------*/
132
+
133
+/** @addtogroup ITC_Exported_Constants
134
+  * @{
135
+  */
136
+#define CPU_SOFT_INT_DISABLED ((uint8_t)0x28) /*!< Mask for I1 and I0 bits in CPU_CC register */
137
+
138
+/**
139
+  * @}
140
+  */
141
+
142
+/* Private macros ------------------------------------------------------------*/
143
+
144
+/**
145
+  * @brief  Macros used by the assert function in order to check the different functions parameters.
146
+  * @addtogroup ITC_Private_Macros
147
+  * @{
148
+  */
149
+
150
+/* Used by assert function */
151
+#define IS_ITC_IRQ_OK(IRQ) ((IRQ) <= (uint8_t)24)
152
+
153
+/* Used by assert function */
154
+#define IS_ITC_PRIORITY_OK(PriorityValue) \
155
+  (((PriorityValue) == ITC_PRIORITYLEVEL_0) || \
156
+   ((PriorityValue) == ITC_PRIORITYLEVEL_1) || \
157
+   ((PriorityValue) == ITC_PRIORITYLEVEL_2) || \
158
+   ((PriorityValue) == ITC_PRIORITYLEVEL_3))
159
+
160
+/* Used by assert function */
161
+#define IS_ITC_INTERRUPTS_DISABLED (ITC_GetSoftIntStatus() == CPU_SOFT_INT_DISABLED)
162
+
163
+/**
164
+  * @}
165
+  */
166
+
167
+/* Exported functions ------------------------------------------------------- */
168
+
169
+/** @addtogroup ITC_Exported_Functions
170
+  * @{
171
+  */
172
+
173
+#if 0
174
+uint8_t ITC_GetCPUCC(void);
175
+
176
+void ITC_DeInit(void);
177
+
178
+uint8_t ITC_GetSoftIntStatus(void);
179
+
180
+void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue);
181
+
182
+ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum);
183
+#endif
184
+
185
+
186
+
187
+/** @addtogroup STM8S_StdPeriph_Driver
188
+  * @{
189
+  */
190
+/* Private typedef -----------------------------------------------------------*/
191
+/* Private define ------------------------------------------------------------*/
192
+/* Private macro -------------------------------------------------------------*/
193
+/* Private variables ---------------------------------------------------------*/
194
+/* Private function prototypes -----------------------------------------------*/
195
+/* Private functions ---------------------------------------------------------*/
196
+
197
+/** @addtogroup ITC_Private_Functions
198
+  * @{
199
+  */
200
+
201
+/**
202
+  * @brief  Utility function used to read CC register.
203
+  * @param  None
204
+  * @retval CPU CC register value
205
+  */
206
+inline uint8_t ITC_GetCPUCC(void)
207
+{
208
+#ifdef _COSMIC_
209
+	_asm("push cc");
210
+	_asm("pop a");
211
+	return; /* Ignore compiler warning, the returned value is in A register */
212
+#elif defined _RAISONANCE_ /* _RAISONANCE_ */
213
+	return _getCC_();
214
+#else /* _IAR_ */
215
+	__asm__("push cc");
216
+	__asm__("pop a"); /* Ignore compiler warning, the returned value is in A register */
217
+#endif /* _COSMIC_*/
218
+}
219
+
220
+
221
+/**
222
+  * @}
223
+  */
224
+
225
+/* Public functions ----------------------------------------------------------*/
226
+
227
+/** @addtogroup ITC_Public_Functions
228
+  * @{
229
+  */
230
+
231
+/**
232
+  * @brief  Deinitializes the ITC registers to their default reset value.
233
+  * @param  None
234
+  * @retval None
235
+  */
236
+inline void ITC_DeInit(void)
237
+{
238
+	ITC->ISPR1 = ITC_SPRX_RESET_VALUE;
239
+	ITC->ISPR2 = ITC_SPRX_RESET_VALUE;
240
+	ITC->ISPR3 = ITC_SPRX_RESET_VALUE;
241
+	ITC->ISPR4 = ITC_SPRX_RESET_VALUE;
242
+	ITC->ISPR5 = ITC_SPRX_RESET_VALUE;
243
+	ITC->ISPR6 = ITC_SPRX_RESET_VALUE;
244
+	ITC->ISPR7 = ITC_SPRX_RESET_VALUE;
245
+	ITC->ISPR8 = ITC_SPRX_RESET_VALUE;
246
+}
247
+
248
+/**
249
+  * @brief  Gets the interrupt software priority bits (I1, I0) value from CPU CC register.
250
+  * @param  None
251
+  * @retval The interrupt software priority bits value.
252
+  */
253
+inline uint8_t ITC_GetSoftIntStatus(void)
254
+{
255
+	return (uint8_t) (ITC_GetCPUCC() & CPU_CC_I1I0);
256
+}
257
+
258
+/**
259
+  * @brief  Gets the software priority of the specified interrupt source.
260
+  * @param  IrqNum : Specifies the peripheral interrupt source.
261
+  * @retval ITC_PriorityLevel_TypeDef : Specifies the software priority of the interrupt source.
262
+  */
263
+inline ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum)
264
+{
265
+	uint8_t Value = 0;
266
+	uint8_t Mask = 0;
267
+
268
+	/* Check function parameters */
269
+	assert_param(IS_ITC_IRQ_OK((uint8_t) IrqNum));
270
+
271
+	/* Define the mask corresponding to the bits position in the SPR register */
272
+	Mask = (uint8_t) (0x03U << (((uint8_t) IrqNum % 4U) * 2U));
273
+
274
+	switch (IrqNum) {
275
+		case ITC_IRQ_TLI: /* TLI software priority can be read but has no meaning */
276
+		case ITC_IRQ_AWU:
277
+		case ITC_IRQ_CLK:
278
+		case ITC_IRQ_PORTA:
279
+			Value = (uint8_t) (ITC->ISPR1 & Mask); /* Read software priority */
280
+			break;
281
+
282
+		case ITC_IRQ_PORTB:
283
+		case ITC_IRQ_PORTC:
284
+		case ITC_IRQ_PORTD:
285
+		case ITC_IRQ_PORTE:
286
+			Value = (uint8_t) (ITC->ISPR2 & Mask); /* Read software priority */
287
+			break;
288
+
289
+#if defined(STM8S208) || defined(STM8AF52Ax)
290
+		case ITC_IRQ_CAN_RX:
291
+		case ITC_IRQ_CAN_TX:
292
+#endif /*STM8S208 or STM8AF52Ax */
293
+#if defined(STM8S903) || defined(STM8AF622x)
294
+			case ITC_IRQ_PORTF:
295
+#endif /*STM8S903 or STM8AF622x */
296
+		case ITC_IRQ_SPI:
297
+		case ITC_IRQ_TIM1_OVF:
298
+			Value = (uint8_t) (ITC->ISPR3 & Mask); /* Read software priority */
299
+			break;
300
+
301
+		case ITC_IRQ_TIM1_CAPCOM:
302
+#if defined (STM8S903) || defined (STM8AF622x)
303
+			case ITC_IRQ_TIM5_OVFTRI:
304
+			case ITC_IRQ_TIM5_CAPCOM:
305
+#else
306
+		case ITC_IRQ_TIM2_OVF:
307
+		case ITC_IRQ_TIM2_CAPCOM:
308
+#endif /* STM8S903 or STM8AF622x*/
309
+		case ITC_IRQ_TIM3_OVF:
310
+			Value = (uint8_t) (ITC->ISPR4 & Mask); /* Read software priority */
311
+			break;
312
+
313
+		case ITC_IRQ_TIM3_CAPCOM:
314
+#if defined(STM8S208) || defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \
315
+    defined(STM8S003) || defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
316
+		case ITC_IRQ_UART1_TX:
317
+		case ITC_IRQ_UART1_RX:
318
+#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S903 or STM8AF52Ax or STM8AF62Ax */
319
+#if defined(STM8AF622x)
320
+			case ITC_IRQ_UART4_TX:
321
+			case ITC_IRQ_UART4_RX:
322
+#endif /*STM8AF622x */
323
+		case ITC_IRQ_I2C:
324
+			Value = (uint8_t) (ITC->ISPR5 & Mask); /* Read software priority */
325
+			break;
326
+
327
+#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
328
+		case ITC_IRQ_UART2_TX:
329
+		case ITC_IRQ_UART2_RX:
330
+#endif /*STM8S105 or STM8AF626x*/
331
+#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || \
332
+    defined(STM8AF62Ax)
333
+		case ITC_IRQ_UART3_TX:
334
+		case ITC_IRQ_UART3_RX:
335
+		case ITC_IRQ_ADC2:
336
+#endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */
337
+#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \
338
+    defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x)
339
+		case ITC_IRQ_ADC1:
340
+#endif /*STM8S105, STM8S005, STM8S103 or STM8S003 or STM8S903 or STM8AF626x or STM8AF622x */
341
+#if defined (STM8S903) || defined (STM8AF622x)
342
+			case ITC_IRQ_TIM6_OVFTRI:
343
+#else
344
+		case ITC_IRQ_TIM4_OVF:
345
+#endif /*STM8S903 or STM8AF622x */
346
+			Value = (uint8_t) (ITC->ISPR6 & Mask); /* Read software priority */
347
+			break;
348
+
349
+		case ITC_IRQ_EEPROM_EEC:
350
+			Value = (uint8_t) (ITC->ISPR7 & Mask); /* Read software priority */
351
+			break;
352
+
353
+		default:
354
+			break;
355
+	}
356
+
357
+	Value >>= (uint8_t) (((uint8_t) IrqNum % 4u) * 2u);
358
+
359
+	return ((ITC_PriorityLevel_TypeDef) Value);
360
+}
361
+
362
+/**
363
+  * @brief  Sets the software priority of the specified interrupt source.
364
+  * @note   - The modification of the software priority is only possible when
365
+  *         the interrupts are disabled.
366
+  *         - The normal behavior is to disable the interrupt before calling
367
+  *         this function, and re-enable it after.
368
+  *         - The priority level 0 cannot be set (see product specification
369
+  *         for more details).
370
+  * @param  IrqNum : Specifies the peripheral interrupt source.
371
+  * @param  PriorityValue : Specifies the software priority value to set,
372
+  *         can be a value of @ref  ITC_PriorityLevel_TypeDef .
373
+  * @retval None
374
+*/
375
+inline void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue)
376
+{
377
+	uint8_t Mask = 0;
378
+	uint8_t NewPriority = 0;
379
+
380
+	/* Check function parameters */
381
+	assert_param(IS_ITC_IRQ_OK((uint8_t) IrqNum));
382
+	assert_param(IS_ITC_PRIORITY_OK(PriorityValue));
383
+
384
+	/* Check if interrupts are disabled */
385
+	assert_param(IS_ITC_INTERRUPTS_DISABLED);
386
+
387
+	/* Define the mask corresponding to the bits position in the SPR register */
388
+	/* The mask is reversed in order to clear the 2 bits after more easily */
389
+	Mask = (uint8_t) (~(uint8_t) (0x03U << (((uint8_t) IrqNum % 4U) * 2U)));
390
+
391
+	/* Define the new priority to write */
392
+	NewPriority = (uint8_t) ((uint8_t) (PriorityValue) << (((uint8_t) IrqNum % 4U) * 2U));