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203 lines
6.3 KiB
203 lines
6.3 KiB
/* ----------------------------------------------------------------------
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* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
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*
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* $Date: 12. March 2014
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* $Revision: V1.4.4
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*
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* Project: CMSIS DSP Library
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* Title: arm_shift_q31.c
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*
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* Description: Shifts the elements of a Q31 vector by a specified number of bits.
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*
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* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of ARM LIMITED nor the names of its contributors
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* may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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* -------------------------------------------------------------------- */
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#include "arm_math.h"
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/**
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* @ingroup groupMath
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*/
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/**
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* @defgroup shift Vector Shift
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*
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* Shifts the elements of a fixed-point vector by a specified number of bits.
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* There are separate functions for Q7, Q15, and Q31 data types.
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* The underlying algorithm used is:
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*
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* <pre>
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* pDst[n] = pSrc[n] << shift, 0 <= n < blockSize.
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* </pre>
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*
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* If <code>shift</code> is positive then the elements of the vector are shifted to the left.
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* If <code>shift</code> is negative then the elements of the vector are shifted to the right.
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*
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* The functions support in-place computation allowing the source and destination
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* pointers to reference the same memory buffer.
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*/
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/**
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* @addtogroup shift
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* @{
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*/
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/**
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* @brief Shifts the elements of a Q31 vector a specified number of bits.
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* @param[in] *pSrc points to the input vector
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* @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right.
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* @param[out] *pDst points to the output vector
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* @param[in] blockSize number of samples in the vector
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* @return none.
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*
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*
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* <b>Scaling and Overflow Behavior:</b>
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* \par
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* The function uses saturating arithmetic.
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* Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
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*/
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void arm_shift_q31(
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q31_t * pSrc,
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int8_t shiftBits,
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q31_t * pDst,
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uint32_t blockSize)
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{
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uint32_t blkCnt; /* loop counter */
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uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */
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#ifndef ARM_MATH_CM0_FAMILY
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q31_t in1, in2, in3, in4; /* Temporary input variables */
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q31_t out1, out2, out3, out4; /* Temporary output variables */
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/*loop Unrolling */
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blkCnt = blockSize >> 2u;
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if(sign == 0u)
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{
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/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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** a second loop below computes the remaining 1 to 3 samples. */
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while(blkCnt > 0u)
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{
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/* C = A << shiftBits */
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/* Shift the input and then store the results in the destination buffer. */
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in1 = *pSrc;
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in2 = *(pSrc + 1);
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out1 = in1 << shiftBits;
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in3 = *(pSrc + 2);
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out2 = in2 << shiftBits;
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in4 = *(pSrc + 3);
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if(in1 != (out1 >> shiftBits))
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out1 = 0x7FFFFFFF ^ (in1 >> 31);
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if(in2 != (out2 >> shiftBits))
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out2 = 0x7FFFFFFF ^ (in2 >> 31);
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*pDst = out1;
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out3 = in3 << shiftBits;
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*(pDst + 1) = out2;
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out4 = in4 << shiftBits;
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if(in3 != (out3 >> shiftBits))
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out3 = 0x7FFFFFFF ^ (in3 >> 31);
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if(in4 != (out4 >> shiftBits))
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out4 = 0x7FFFFFFF ^ (in4 >> 31);
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*(pDst + 2) = out3;
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*(pDst + 3) = out4;
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/* Update destination pointer to process next sampels */
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pSrc += 4u;
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pDst += 4u;
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/* Decrement the loop counter */
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blkCnt--;
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}
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}
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else
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{
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/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
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** a second loop below computes the remaining 1 to 3 samples. */
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while(blkCnt > 0u)
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{
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/* C = A >> shiftBits */
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/* Shift the input and then store the results in the destination buffer. */
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in1 = *pSrc;
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in2 = *(pSrc + 1);
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in3 = *(pSrc + 2);
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in4 = *(pSrc + 3);
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*pDst = (in1 >> -shiftBits);
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*(pDst + 1) = (in2 >> -shiftBits);
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*(pDst + 2) = (in3 >> -shiftBits);
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*(pDst + 3) = (in4 >> -shiftBits);
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pSrc += 4u;
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pDst += 4u;
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blkCnt--;
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}
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}
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/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
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** No loop unrolling is used. */
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blkCnt = blockSize % 0x4u;
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#else
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/* Run the below code for Cortex-M0 */
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/* Initialize blkCnt with number of samples */
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blkCnt = blockSize;
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#endif /* #ifndef ARM_MATH_CM0_FAMILY */
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while(blkCnt > 0u)
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{
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/* C = A (>> or <<) shiftBits */
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/* Shift the input and then store the result in the destination buffer. */
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*pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
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(*pSrc++ >> -shiftBits);
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/* Decrement the loop counter */
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blkCnt--;
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}
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}
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/**
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* @} end of shift group
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*/
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