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285 lines
13 KiB
285 lines
13 KiB
/**
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******************************************************************************
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* @file stm32l0xx_hal_tim_ex.h
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* @author MCD Application Team
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* @brief Header file of TIM HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L0xx_HAL_TIM_EX_H
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#define __STM32L0xx_HAL_TIM_EX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l0xx_hal_def.h"
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/** @addtogroup STM32L0xx_HAL_Driver
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* @{
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*/
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/** @defgroup TIMEx TIMEx
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup TIM_Exported_Types TIM Exported Types
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* @{
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*/
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/**
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* @brief TIM Master configuration Structure definition
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*/
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typedef struct {
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uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
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This parameter can be a value of @ref TIM_Master_Mode_Selection */
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uint32_t MasterSlaveMode; /*!< Master/slave mode selection
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This parameter can be a value of @ref TIM_Master_Slave_Mode */
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}TIM_MasterConfigTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants
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* @{
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*/
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/** @defgroup TIMEx_Trigger_Selection Trigger selection
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* @{
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*/
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#define TIM_TRGO_RESET ((uint32_t)0x0000U)
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#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
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#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
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#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
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#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
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#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0))
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#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1))
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#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
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#define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \
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((__SOURCE__) == TIM_TRGO_ENABLE) || \
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((__SOURCE__) == TIM_TRGO_UPDATE) || \
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((__SOURCE__) == TIM_TRGO_OC1) || \
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((__SOURCE__) == TIM_TRGO_OC1REF) || \
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((__SOURCE__) == TIM_TRGO_OC2REF) || \
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((__SOURCE__) == TIM_TRGO_OC3REF) || \
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((__SOURCE__) == TIM_TRGO_OC4REF))
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/**
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* @}
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*/
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/** @defgroup TIMEx_Remap Remaping
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* @{
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*/
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#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
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|| defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
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#define TIM2_ETR_GPIO ((uint32_t)0x0U)
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#define TIM2_ETR_HSI48 TIM2_OR_ETR_RMP_2
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#define TIM2_ETR_HSI16 (TIM2_OR_ETR_RMP_1 | TIM2_OR_ETR_RMP_0)
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#define TIM2_ETR_LSE (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0)
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#define TIM2_ETR_COMP2_OUT (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1)
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#define TIM2_ETR_COMP1_OUT TIM2_OR_ETR_RMP
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#elif defined (STM32L011xx) || defined (STM32L021xx) || defined (STM32L031xx) || defined (STM32L041xx)
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#define TIM2_ETR_GPIO ((uint32_t)0x0U)
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#define TIM2_ETR_HSI16 (TIM2_OR_ETR_RMP_1 | TIM2_OR_ETR_RMP_0)
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#define TIM2_ETR_LSE (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0)
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#define TIM2_ETR_COMP2_OUT (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1)
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#define TIM2_ETR_COMP1_OUT TIM2_OR_ETR_RMP
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#else
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#define TIM2_ETR_GPIO ((uint32_t)0x0U)
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#define TIM2_ETR_HSI48 TIM2_OR_ETR_RMP_2
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#define TIM2_ETR_LSE (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_0)
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#define TIM2_ETR_COMP2_OUT (TIM2_OR_ETR_RMP_2 | TIM2_OR_ETR_RMP_1)
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#define TIM2_ETR_COMP1_OUT TIM2_OR_ETR_RMP
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#endif
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#define TIM2_TI4_GPIO ((uint32_t)0x0U)
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#define TIM2_TI4_COMP2 TIM2_OR_TI4_RMP_0
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#define TIM2_TI4_COMP1 TIM2_OR_TI4_RMP_1
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#define TIM21_ETR_GPIO ((uint32_t)0x0U)
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#define TIM21_ETR_COMP2_OUT TIM21_OR_ETR_RMP_0
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#define TIM21_ETR_COMP1_OUT TIM21_OR_ETR_RMP_1
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#define TIM21_ETR_LSE TIM21_OR_ETR_RMP
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#define TIM21_TI1_GPIO ((uint32_t)0x0U)
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#define TIM21_TI1_MCO TIM21_OR_TI1_RMP
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#define TIM21_TI1_RTC_WKUT_IT TIM21_OR_TI1_RMP_0
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#define TIM21_TI1_HSE_RTC TIM21_OR_TI1_RMP_1
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#define TIM21_TI1_MSI (TIM21_OR_TI1_RMP_0 | TIM21_OR_TI1_RMP_1)
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#define TIM21_TI1_LSE TIM21_OR_TI1_RMP_2
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#define TIM21_TI1_LSI (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_0)
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#define TIM21_TI1_COMP1_OUT (TIM21_OR_TI1_RMP_2 | TIM21_OR_TI1_RMP_1)
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#define TIM21_TI2_GPIO ((uint32_t)0x0U)
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#define TIM21_TI2_COMP2_OUT TIM21_OR_TI2_RMP
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#if !defined(STM32L011xx) && !defined(STM32L021xx)
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#define TIM22_ETR_GPIO ((uint32_t)0x0U)
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#define TIM22_ETR_COMP2_OUT TIM22_OR_ETR_RMP_0
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#define TIM22_ETR_COMP1_OUT TIM22_OR_ETR_RMP_1
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#define TIM22_ETR_LSE TIM22_OR_ETR_RMP
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#define TIM22_TI1_GPIO1 ((uint32_t)0x0U)
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#define TIM22_TI1_COMP2_OUT TIM22_OR_TI1_RMP_0
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#define TIM22_TI1_COMP1_OUT TIM22_OR_TI1_RMP_1
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#define TIM22_TI1_GPIO2 TIM22_OR_TI1_RMP
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#endif
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#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
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|| defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
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#define TIM3_TI4_GPIO_DEF ((uint32_t)0x0U)
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#define TIM3_TI4_GPIOC9_AF2 TIM3_OR_TI4_RMP
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#define TIM3_TI2_GPIO_DEF ((uint32_t)0x0U)
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#define TIM3_TI2_GPIOB5_AF4 TIM3_OR_TI2_RMP
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#define TIM3_TI1_USB_SOF ((uint32_t)0x0U)
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#define TIM3_TI1_GPIO TIM3_OR_TI1_RMP
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#define TIM3_ETR_GPIO ((uint32_t)0x0U)
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#define TIM3_ETR_HSI TIM3_OR_ETR_RMP_1
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#endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */
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#if defined (STM32L071xx) || defined (STM32L072xx) || defined (STM32L073xx) \
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|| defined (STM32L081xx) || defined (STM32L082xx) || defined (STM32L083xx)
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#define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \
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((((__INSTANCE__) == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \
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(((__INSTANCE__) == TIM22) && ((__TIM_REMAP__) <= (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
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(((__INSTANCE__) == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))) || \
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(((__INSTANCE__) == TIM3) && ((__TIM_REMAP__) <= (TIM3_OR_ETR_RMP | TIM3_OR_TI1_RMP | TIM3_OR_TI2_RMP | TIM3_OR_TI4_RMP))))
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#define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \
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((((__INSTANCE__) == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
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((__CHANNEL__) == TIM_CHANNEL_2) || \
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((__CHANNEL__) == TIM_CHANNEL_3) || \
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((__CHANNEL__) == TIM_CHANNEL_4))) || \
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(((__INSTANCE__) == TIM3) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
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((__CHANNEL__) == TIM_CHANNEL_2) || \
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((__CHANNEL__) == TIM_CHANNEL_3) || \
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((__CHANNEL__) == TIM_CHANNEL_4))) || \
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(((__INSTANCE__) == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
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((__CHANNEL__) == TIM_CHANNEL_2))) || \
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(((__INSTANCE__) == TIM22) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
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((__CHANNEL__) == TIM_CHANNEL_2))))
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#elif defined (STM32L011xx) || defined (STM32L021xx)
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#define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \
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((((__INSTANCE__) == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \
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(((__INSTANCE__) == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))))
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#define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \
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((((__INSTANCE__) == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
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((__CHANNEL__) == TIM_CHANNEL_2) || \
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((__CHANNEL__) == TIM_CHANNEL_3) || \
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((__CHANNEL__) == TIM_CHANNEL_4))) || \
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(((__INSTANCE__) == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
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((__CHANNEL__) == TIM_CHANNEL_2))))
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#else
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#define IS_TIM_REMAP(__INSTANCE__, __TIM_REMAP__) \
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((((__INSTANCE__) == TIM2) && ((__TIM_REMAP__) <= (TIM2_OR_TI4_RMP | TIM2_OR_ETR_RMP))) || \
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(((__INSTANCE__) == TIM22) && ((__TIM_REMAP__) <= (TIM22_OR_TI1_RMP | TIM22_OR_ETR_RMP))) || \
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(((__INSTANCE__) == TIM21) && ((__TIM_REMAP__) <= (TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP))))
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#define IS_CHANNEL_AVAILABLE(__INSTANCE__, __CHANNEL__) \
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((((__INSTANCE__) == TIM2) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
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((__CHANNEL__) == TIM_CHANNEL_2) || \
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((__CHANNEL__) == TIM_CHANNEL_3) || \
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((__CHANNEL__) == TIM_CHANNEL_4))) || \
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(((__INSTANCE__) == TIM21) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
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((__CHANNEL__) == TIM_CHANNEL_2))) || \
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(((__INSTANCE__) == TIM22) && (((__CHANNEL__) == TIM_CHANNEL_1) || \
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((__CHANNEL__) == TIM_CHANNEL_2))))
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#endif /*defined (STM32L07Xxx) or defined (STM32L08Xxx) */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/* Control functions ***********************************************************/
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/** @defgroup TIMEx_Exported_Functions TIMEx Exported Functions
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* @{
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*/
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/** @defgroup TIMEx_Exported_Functions_Group1 TIMEx Peripheral Control functions
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* @{
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*/
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HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
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HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32L0xx_HAL_TIM_EX_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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