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B3M38SPD seminar project - beehive monitor with LoRa reporting
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spd-lorabees/build/stm32l0xx_ll_lpuart.lst

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ARM GAS /tmp/ccHfYm8W.s page 1
1 .cpu cortex-m0plus
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 0
10 .eabi_attribute 18, 4
11 .file "stm32l0xx_ll_lpuart.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.LL_LPUART_DeInit,"ax",%progbits
16 .align 1
17 .global LL_LPUART_DeInit
18 .syntax unified
19 .code 16
20 .thumb_func
21 .fpu softvfp
23 LL_LPUART_DeInit:
24 .LFB336:
25 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c"
1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /**
2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** ******************************************************************************
3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @file stm32l0xx_ll_lpuart.c
4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @author MCD Application Team
5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @brief LPUART LL module driver.
6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** ******************************************************************************
7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @attention
8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** *
9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** *
11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * Redistribution and use in source and binary forms, with or without modification,
12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * are permitted provided that the following conditions are met:
13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * 1. Redistributions of source code must retain the above copyright notice,
14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * this list of conditions and the following disclaimer.
15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * 2. Redistributions in binary form must reproduce the above copyright notice,
16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * this list of conditions and the following disclaimer in the documentation
17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * and/or other materials provided with the distribution.
18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors
19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * may be used to endorse or promote products derived from this software
20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * without specific prior written permission.
21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** *
22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** *
33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** ******************************************************************************
ARM GAS /tmp/ccHfYm8W.s page 2
34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #if defined(USE_FULL_LL_DRIVER)
36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Includes ------------------------------------------------------------------*/
38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #include "stm32l0xx_ll_lpuart.h"
39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #include "stm32l0xx_ll_rcc.h"
40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #include "stm32l0xx_ll_bus.h"
41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #ifdef USE_FULL_ASSERT
42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #include "stm32_assert.h"
43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #else
44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #define assert_param(expr) ((void)0U)
45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #endif
46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /** @addtogroup STM32L0xx_LL_Driver
48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @{
49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #if defined (LPUART1)
52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /** @addtogroup LPUART_LL
54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @{
55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Private types -------------------------------------------------------------*/
58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Private variables ---------------------------------------------------------*/
59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Private constants ---------------------------------------------------------*/
60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /** @addtogroup LPUART_LL_Private_Constants
61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @{
62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /**
65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @}
66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Private macros ------------------------------------------------------------*/
70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /** @addtogroup LPUART_LL_Private_Macros
71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @{
72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Check of parameters for configuration of LPUART registers */
75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* __BAUDRATE__ Depending on constraints applicable for LPUART BRR register */
77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* value : */
78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* - fck must be in the range [3 x baudrate, 4096 x baudrate] */
79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* - LPUART_BRR register value should be >= 0x300 */
80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* - LPUART_BRR register value should be <= 0xFFFFF (20 bits) */
81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Baudrate specified by the user should belong to [8, 10600000].*/
82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #define IS_LL_LPUART_BAUDRATE(__BAUDRATE__) (((__BAUDRATE__) <= 10600000U) && ((__BAUDRATE__) >= 8U
83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #define IS_LL_LPUART_DIRECTION(__VALUE__) (((__VALUE__) == LL_LPUART_DIRECTION_NONE) \
85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_DIRECTION_RX) \
86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_DIRECTION_TX) \
87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_DIRECTION_TX_RX))
88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #define IS_LL_LPUART_PARITY(__VALUE__) (((__VALUE__) == LL_LPUART_PARITY_NONE) \
90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_PARITY_EVEN) \
ARM GAS /tmp/ccHfYm8W.s page 3
91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_PARITY_ODD))
92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #define IS_LL_LPUART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_LPUART_DATAWIDTH_7B) \
94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_DATAWIDTH_8B) \
95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_DATAWIDTH_9B))
96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #define IS_LL_LPUART_STOPBITS(__VALUE__) (((__VALUE__) == LL_LPUART_STOPBITS_1) \
98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_STOPBITS_2))
99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** #define IS_LL_LPUART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_LPUART_HWCONTROL_NONE) \
101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_HWCONTROL_RTS) \
102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_HWCONTROL_CTS) \
103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** || ((__VALUE__) == LL_LPUART_HWCONTROL_RTS_CTS))
104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /**
106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @}
107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Private function prototypes -----------------------------------------------*/
110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Exported functions --------------------------------------------------------*/
112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /** @addtogroup LPUART_LL_Exported_Functions
113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @{
114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /** @addtogroup LPUART_LL_EF_Init
117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @{
118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /**
121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @brief De-initialize LPUART registers (Registers restored to their default values).
122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @param LPUARTx LPUART Instance
123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @retval An ErrorStatus enumeration value:
124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * - SUCCESS: LPUART registers are de-initialized
125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * - ERROR: not applicable
126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx)
128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** {
26 .loc 1 128 0
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 0
29 @ frame_needed = 0, uses_anonymous_args = 0
30 @ link register save eliminated.
31 .LVL0:
32 .LBB14:
33 .LBB15:
34 .file 2 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h"
1:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
2:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ******************************************************************************
3:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @file stm32l0xx_ll_bus.h
4:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @author MCD Application Team
5:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Header file of BUS LL module.
6:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
7:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** @verbatim
8:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ##### RCC Limitations #####
9:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ==============================================================================
10:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** [..]
ARM GAS /tmp/ccHfYm8W.s page 4
11:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** A delay between an RCC peripheral clock enable and the effective peripheral
12:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** enabling should be taken into account in order to manage the peripheral read/write
13:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** from/to registers.
14:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (+) This delay depends on the peripheral mapping.
15:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (++) AHB & APB peripherals, 1 dummy read is necessary
16:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
17:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** [..]
18:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** Workarounds:
19:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
20:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** inserted in each LL_{BUS}_GRP{x}_EnableClock() function.
21:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
22:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** @endverbatim
23:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ******************************************************************************
24:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @attention
25:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
26:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
27:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
28:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * Redistribution and use in source and binary forms, with or without modification,
29:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * are permitted provided that the following conditions are met:
30:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 1. Redistributions of source code must retain the above copyright notice,
31:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * this list of conditions and the following disclaimer.
32:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 2. Redistributions in binary form must reproduce the above copyright notice,
33:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * this list of conditions and the following disclaimer in the documentation
34:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * and/or other materials provided with the distribution.
35:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 3. Neither the name of STMicroelectronics nor the names of its contributors
36:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * may be used to endorse or promote products derived from this software
37:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * without specific prior written permission.
38:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
39:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
40:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
41:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
42:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
43:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
44:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
45:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
46:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
47:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
48:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
49:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
50:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ******************************************************************************
51:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
52:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
53:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Define to prevent recursive inclusion -------------------------------------*/
54:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #ifndef __STM32L0xx_LL_BUS_H
55:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define __STM32L0xx_LL_BUS_H
56:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
57:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #ifdef __cplusplus
58:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** extern "C" {
59:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
60:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
61:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/
62:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #include "stm32l0xx.h"
63:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
64:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @addtogroup STM32L0xx_LL_Driver
65:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
66:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
67:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
ARM GAS /tmp/ccHfYm8W.s page 5
68:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(RCC)
69:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
70:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL BUS
71:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
72:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
73:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
74:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private types -------------------------------------------------------------*/
75:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private variables ---------------------------------------------------------*/
76:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
77:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private constants ---------------------------------------------------------*/
78:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
79:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private macros ------------------------------------------------------------*/
80:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
81:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported types ------------------------------------------------------------*/
82:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported constants --------------------------------------------------------*/
83:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Constants BUS Exported Constants
84:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
85:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
86:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
87:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH AHB1 GRP1 PERIPH
88:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
89:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
90:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU
91:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN /*!< DMA1 clock enable */
92:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_MIF RCC_AHBENR_MIFEN /*!< MIF clock enable */
93:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM RCC_AHBSMENR_SRAMSMEN /*!< Sleep Mode SRAM clock enable
94:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHBENR_CRCEN /*!< CRC clock enable */
95:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TSC)
96:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_TSC RCC_AHBENR_TSCEN /*!< TSC clock enable */
97:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*TSC*/
98:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(RNG)
99:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_RNG RCC_AHBENR_RNGEN /*!< RNG clock enable */
100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*RNG*/
101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(AES)
102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_CRYP RCC_AHBENR_CRYPEN /*!< CRYP clock enable */
103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*AES*/
104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @}
106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH APB1 GRP1 PERIPH
110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU
113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN /*!< TIM2 clock enable */
114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM3)
115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR_TIM3EN /*!< TIM3 clock enable */
116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM6)
118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM6 RCC_APB1ENR_TIM6EN /*!< TIM6 clock enable */
119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM7)
121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR_TIM7EN /*!< TIM7 clock enable */
122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(LCD)
124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LCD RCC_APB1ENR_LCDEN /*!< LCD clock enable */
ARM GAS /tmp/ccHfYm8W.s page 6
125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*LCD*/
126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN /*!< WWDG clock enable */
127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(SPI2)
128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN /*!< SPI2 clock enable */
129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART2 RCC_APB1ENR_USART2EN /*!< USART2 clock enable */
131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPUART1 RCC_APB1ENR_LPUART1EN /*!< LPUART1 clock enable */
132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART4)
133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART4 RCC_APB1ENR_USART4EN /*!< USART4 clock enable */
134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART5)
136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART5 RCC_APB1ENR_USART5EN /*!< USART5 clock enable */
137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C1 RCC_APB1ENR_I2C1EN /*!< I2C1 clock enable */
139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(I2C2)
140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C2 RCC_APB1ENR_I2C2EN /*!< I2C2 clock enable */
141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USB)
143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USB RCC_APB1ENR_USBEN /*!< USB clock enable */
144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*USB*/
145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(CRS)
146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CRS RCC_APB1ENR_CRSEN /*!< CRS clock enable */
147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*CRS*/
148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_PWR RCC_APB1ENR_PWREN /*!< PWR clock enable */
149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(DAC)
150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_DAC1 RCC_APB1ENR_DACEN /*!< DAC clock enable */
151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(I2C3)
153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C3 RCC_APB1ENR_I2C3EN /*!< I2C3 clock enable */
154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR_LPTIM1EN /*!< LPTIM1 clock enable */
156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @}
158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH APB2 GRP1 PERIPH
164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU
167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SYSCFG RCC_APB2ENR_SYSCFGEN /*!< SYSCFG clock enable */
168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM21 RCC_APB2ENR_TIM21EN /*!< TIM21 clock enable */
169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM22)
170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM22 RCC_APB2ENR_TIM22EN /*!< TIM22 clock enable */
171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_FW RCC_APB2ENR_FWEN /*!< FireWall clock enable */
173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC1 RCC_APB2ENR_ADC1EN /*!< ADC1 clock enable */
174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI1 RCC_APB2ENR_SPI1EN /*!< SPI1 clock enable */
175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART1)
176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN /*!< USART1 clock enable */
177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_DBGMCU RCC_APB2ENR_DBGMCUEN /*!< DBGMCU clock enable */
179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @}
ARM GAS /tmp/ccHfYm8W.s page 7
182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_IOP_GRP1_PERIPH IOP GRP1 PERIPH
187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU
190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOA RCC_IOPENR_GPIOAEN /*!< GPIO port A control */
191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOB RCC_IOPENR_GPIOBEN /*!< GPIO port B control */
192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOC RCC_IOPENR_GPIOCEN /*!< GPIO port C control */
193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOD)
194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOD RCC_IOPENR_GPIODEN /*!< GPIO port D control */
195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOD*/
196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOE)
197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOE RCC_IOPENR_GPIOEEN /*!< GPIO port H control */
198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOE*/
199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOH)
200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOH RCC_IOPENR_GPIOHEN /*!< GPIO port H control */
201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOH*/
202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @}
204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @}
209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported macro ------------------------------------------------------------*/
212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported functions --------------------------------------------------------*/
213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Functions BUS Exported Functions
214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB1 AHB1
218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Enable AHB1 peripherals clock.
223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBENR DMAEN LL_AHB1_GRP1_EnableClock\n
224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR MIFEN LL_AHB1_GRP1_EnableClock\n
225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRCEN LL_AHB1_GRP1_EnableClock\n
226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR TSCEN LL_AHB1_GRP1_EnableClock\n
227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR RNGEN LL_AHB1_GRP1_EnableClock\n
228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRYPEN LL_AHB1_GRP1_EnableClock
229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF
232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
ARM GAS /tmp/ccHfYm8W.s page 8
239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)
241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __IO uint32_t tmpreg;
243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->AHBENR, Periphs);
244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHBENR, Periphs);
246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (void)tmpreg;
247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Check if AHB1 peripheral clock is enabled or not
251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBENR DMAEN LL_AHB1_GRP1_IsEnabledClock\n
252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR MIFEN LL_AHB1_GRP1_IsEnabledClock\n
253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n
254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR TSCEN LL_AHB1_GRP1_IsEnabledClock\n
255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR RNGEN LL_AHB1_GRP1_IsEnabledClock\n
256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRYPEN LL_AHB1_GRP1_IsEnabledClock
257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF
260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)
269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** return (READ_BIT(RCC->AHBENR, Periphs) == Periphs);
271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock.
275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBENR DMAEN LL_AHB1_GRP1_DisableClock\n
276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR MIFEN LL_AHB1_GRP1_DisableClock\n
277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRCEN LL_AHB1_GRP1_DisableClock\n
278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR TSCEN LL_AHB1_GRP1_DisableClock\n
279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR RNGEN LL_AHB1_GRP1_DisableClock\n
280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRYPEN LL_AHB1_GRP1_DisableClock
281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF
284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)
293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->AHBENR, Periphs);
295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
ARM GAS /tmp/ccHfYm8W.s page 9
296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Force AHB1 peripherals reset.
299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBRSTR DMARST LL_AHB1_GRP1_ForceReset\n
300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR MIFRST LL_AHB1_GRP1_ForceReset\n
301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR CRCRST LL_AHB1_GRP1_ForceReset\n
302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR TSCRST LL_AHB1_GRP1_ForceReset\n
303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR RNGRST LL_AHB1_GRP1_ForceReset\n
304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR CRYPRST LL_AHB1_GRP1_ForceReset
305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL
307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF
309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)
318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->AHBRSTR, Periphs);
320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Release AHB1 peripherals reset.
324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBRSTR DMARST LL_AHB1_GRP1_ReleaseReset\n
325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR MIFRST LL_AHB1_GRP1_ReleaseReset\n
326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR CRCRST LL_AHB1_GRP1_ReleaseReset\n
327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR TSCRST LL_AHB1_GRP1_ReleaseReset\n
328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR RNGRST LL_AHB1_GRP1_ReleaseReset\n
329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR CRYPRST LL_AHB1_GRP1_ReleaseReset
330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL
332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF
334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)
343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->AHBRSTR, Periphs);
345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Enable AHB1 peripherals clock during Low Power (Sleep) mode.
349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBSMENR DMASMEN LL_AHB1_GRP1_EnableClockSleep\n
350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR MIFSMEN LL_AHB1_GRP1_EnableClockSleep\n
351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR SRAMSMEN LL_AHB1_GRP1_EnableClockSleep\n
352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR CRCSMEN LL_AHB1_GRP1_EnableClockSleep\n
ARM GAS /tmp/ccHfYm8W.s page 10
353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR TSCSMEN LL_AHB1_GRP1_EnableClockSleep\n
354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR RNGSMEN LL_AHB1_GRP1_EnableClockSleep\n
355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR CRYPSMEN LL_AHB1_GRP1_EnableClockSleep
356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF
359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs)
369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __IO uint32_t tmpreg;
371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->AHBSMENR, Periphs);
372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHBSMENR, Periphs);
374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (void)tmpreg;
375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock during Low Power (Sleep) mode.
379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBSMENR DMASMEN LL_AHB1_GRP1_DisableClockSleep\n
380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR MIFSMEN LL_AHB1_GRP1_DisableClockSleep\n
381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR SRAMSMEN LL_AHB1_GRP1_DisableClockSleep\n
382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR CRCSMEN LL_AHB1_GRP1_DisableClockSleep\n
383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR TSCSMEN LL_AHB1_GRP1_DisableClockSleep\n
384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR RNGSMEN LL_AHB1_GRP1_DisableClockSleep\n
385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR CRYPSMEN LL_AHB1_GRP1_DisableClockSleep
386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF
389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs)
399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->AHBSMENR, Periphs);
401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @}
405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB1 APB1
408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{
409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
ARM GAS /tmp/ccHfYm8W.s page 11
410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Enable APB1 peripherals clock.
413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n
414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n
415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_EnableClock\n
416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_EnableClock\n
417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LCDEN LL_APB1_GRP1_EnableClock\n
418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n
419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n
420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_EnableClock\n
421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPUART1EN LL_APB1_GRP1_EnableClock\n
422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART4EN LL_APB1_GRP1_EnableClock\n
423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART5EN LL_APB1_GRP1_EnableClock\n
424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n
425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n
426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USBEN LL_APB1_GRP1_EnableClock\n
427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR CRSEN LL_APB1_GRP1_EnableClock\n
428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_EnableClock\n
429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_EnableClock\n
430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n
431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_EnableClock
432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __IO uint32_t tmpreg;
459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs);
460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (void)tmpreg;
463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Check if APB1 peripheral clock is enabled or not
ARM GAS /tmp/ccHfYm8W.s page 12
467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n
468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_IsEnabledClock\n
469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_IsEnabledClock\n
470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_IsEnabledClock\n
471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LCDEN LL_APB1_GRP1_IsEnabledClock\n
472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_IsEnabledClock\n
473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_IsEnabledClock\n
474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_IsEnabledClock\n
475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPUART1EN LL_APB1_GRP1_IsEnabledClock\n
476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART4EN LL_APB1_GRP1_IsEnabledClock\n
477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART5EN LL_APB1_GRP1_IsEnabledClock\n
478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_IsEnabledClock\n
479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_IsEnabledClock\n
480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USBEN LL_APB1_GRP1_IsEnabledClock\n
481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR CRSEN LL_APB1_GRP1_IsEnabledClock\n
482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_IsEnabledClock\n
483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_IsEnabledClock\n
484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_IsEnabledClock\n
485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_IsEnabledClock
486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)
511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);
513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Disable APB1 peripherals clock.
517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_DisableClock\n
518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_DisableClock\n
519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_DisableClock\n
520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_DisableClock\n
521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LCDEN LL_APB1_GRP1_DisableClock\n
522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_DisableClock\n
523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_DisableClock\n
ARM GAS /tmp/ccHfYm8W.s page 13
524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_DisableClock\n
525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPUART1EN LL_APB1_GRP1_DisableClock\n
526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART4EN LL_APB1_GRP1_DisableClock\n
527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART5EN LL_APB1_GRP1_DisableClock\n
528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n
529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n
530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USBEN LL_APB1_GRP1_DisableClock\n
531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR CRSEN LL_APB1_GRP1_DisableClock\n
532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_DisableClock\n
533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n
534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n
535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_DisableClock
536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)
561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->APB1ENR, Periphs);
563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Force APB1 peripherals reset.
567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n
568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n
569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ForceReset\n
570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ForceReset\n
571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LCDRST LL_APB1_GRP1_ForceReset\n
572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset\n
573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n
574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ForceReset\n
575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LPUART1RST LL_APB1_GRP1_ForceReset\n
576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART4RST LL_APB1_GRP1_ForceReset\n
577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART5RST LL_APB1_GRP1_ForceReset\n
578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ForceReset\n
579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n
580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USBRST LL_APB1_GRP1_ForceReset\n
ARM GAS /tmp/ccHfYm8W.s page 14
581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR CRSRST LL_APB1_GRP1_ForceReset\n
582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ForceReset\n
583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ForceReset\n
584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n
585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ForceReset
586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_ALL
588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)
612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->APB1RSTR, Periphs);
35 .loc 2 613 0
36 0000 054B ldr r3, .L2
37 0002 996A ldr r1, [r3, #40]
38 0004 8022 movs r2, #128
39 0006 D202 lsls r2, r2, #11
40 0008 0A43 orrs r2, r1
41 000a 9A62 str r2, [r3, #40]
42 .LVL1:
43 .LBE15:
44 .LBE14:
45 .LBB16:
46 .LBB17:
614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****
616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Release APB1 peripherals reset.
618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ReleaseReset\n
619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ReleaseReset\n
620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n
621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n
622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LCDRST LL_APB1_GRP1_ReleaseReset\n
623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ReleaseReset\n
624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ReleaseReset\n
625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ReleaseReset\n
ARM GAS /tmp/ccHfYm8W.s page 15
626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LPUART1RST LL_APB1_GRP1_ReleaseReset\n
627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART4RST LL_APB1_GRP1_ReleaseReset\n
628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART5RST LL_APB1_GRP1_ReleaseReset\n
629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ReleaseReset\n
630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ReleaseReset\n
631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USBRST LL_APB1_GRP1_ReleaseReset\n
632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR CRSRST LL_APB1_GRP1_ReleaseReset\n
633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ReleaseReset\n
634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ReleaseReset\n
635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ReleaseReset\n
636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ReleaseReset
637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_ALL
639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *
659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices.
660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None
661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)
663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->APB1RSTR, Periphs);
47 .loc 2 664 0
48 000c 9A6A ldr r2, [r3, #40]
49 000e 0349 ldr r1, .L2+4
50 0010 0A40 ands r2, r1
51 0012 9A62 str r2, [r3, #40]
52 .LVL2:
53 .LBE17:
54 .LBE16:
129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** ErrorStatus status = SUCCESS;
130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Check the parameters */
132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** assert_param(IS_LPUART_INSTANCE(LPUARTx));
133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Force reset of LPUART peripheral */
135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_LPUART1);
136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Release reset of LPUART peripheral */
138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_LPUART1);
ARM GAS /tmp/ccHfYm8W.s page 16
139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** return (status);
141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** }
55 .loc 1 141 0
56 0014 0120 movs r0, #1
57 .LVL3:
58 @ sp needed
59 0016 7047 bx lr
60 .L3:
61 .align 2
62 .L2:
63 0018 00100240 .word 1073876992
64 001c FFFFFBFF .word -262145
65 .cfi_endproc
66 .LFE336:
68 .global __aeabi_uldivmod
69 .section .text.LL_LPUART_Init,"ax",%progbits
70 .align 1
71 .global LL_LPUART_Init
72 .syntax unified
73 .code 16
74 .thumb_func
75 .fpu softvfp
77 LL_LPUART_Init:
78 .LFB337:
142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /**
144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @brief Initialize LPUART registers according to the specified
145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * parameters in LPUART_InitStruct.
146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @note As some bits in LPUART configuration registers can only be written when the LPUART is d
147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * LPUART IP should be in disabled state prior calling this function. Otherwise, ERROR res
148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @note Baud rate value stored in LPUART_InitStruct BaudRate field, should be valid (different
149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @param LPUARTx LPUART Instance
150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @param LPUART_InitStruct pointer to a @ref LL_LPUART_InitTypeDef structure
151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * that contains the configuration information for the specified LPUART peripheral.
152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @retval An ErrorStatus enumeration value:
153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * - SUCCESS: LPUART registers are initialized according to LPUART_InitStruct content
154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * - ERROR: Problem occurred during LPUART Registers initialization
155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct)
157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** {
79 .loc 1 157 0
80 .cfi_startproc
81 @ args = 0, pretend = 0, frame = 0
82 @ frame_needed = 0, uses_anonymous_args = 0
83 .LVL4:
84 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
85 .LCFI0:
86 .cfi_def_cfa_offset 24
87 .cfi_offset 3, -24
88 .cfi_offset 4, -20
89 .cfi_offset 5, -16
90 .cfi_offset 6, -12
91 .cfi_offset 7, -8
92 .cfi_offset 14, -4
93 0002 0400 movs r4, r0
94 0004 0D00 movs r5, r1
ARM GAS /tmp/ccHfYm8W.s page 17
95 .LVL5:
96 .LBB18:
97 .LBB19:
98 .file 3 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h"
1:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
2:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** ******************************************************************************
3:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @file stm32l0xx_ll_lpuart.h
4:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @author MCD Application Team
5:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Header file of LPUART LL module.
6:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** ******************************************************************************
7:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @attention
8:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** *
9:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
10:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** *
11:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * Redistribution and use in source and binary forms, with or without modification,
12:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * are permitted provided that the following conditions are met:
13:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * 1. Redistributions of source code must retain the above copyright notice,
14:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * this list of conditions and the following disclaimer.
15:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * 2. Redistributions in binary form must reproduce the above copyright notice,
16:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * this list of conditions and the following disclaimer in the documentation
17:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * and/or other materials provided with the distribution.
18:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * 3. Neither the name of STMicroelectronics nor the names of its contributors
19:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * may be used to endorse or promote products derived from this software
20:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * without specific prior written permission.
21:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** *
22:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** *
33:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** ******************************************************************************
34:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
35:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
36:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Define to prevent recursive inclusion -------------------------------------*/
37:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #ifndef __STM32L0xx_LL_LPUART_H
38:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define __STM32L0xx_LL_LPUART_H
39:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
40:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #ifdef __cplusplus
41:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** extern "C" {
42:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #endif
43:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
44:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Includes ------------------------------------------------------------------*/
45:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #include "stm32l0xx.h"
46:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
47:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @addtogroup STM32L0xx_LL_Driver
48:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
49:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
50:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
51:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #if defined (LPUART1)
52:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
53:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL LPUART
ARM GAS /tmp/ccHfYm8W.s page 18
54:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
55:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
56:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
57:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Private types -------------------------------------------------------------*/
58:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Private variables ---------------------------------------------------------*/
59:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
60:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Private constants ---------------------------------------------------------*/
61:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_Private_Constants LPUART Private Constants
62:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
63:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
64:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
65:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Defines used for the bit position in the register and perform offsets*/
66:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LPUART_POSITION_CR1_DEDT (uint32_t)16U
67:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LPUART_POSITION_CR1_DEAT (uint32_t)21U
68:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LPUART_POSITION_CR2_ADD (uint32_t)24U
69:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
70:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Defines used in Baud Rate related macros and corresponding register setting computation */
71:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LPUART_LPUARTDIV_FREQ_MUL (uint32_t)(256U)
72:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LPUART_BRR_MASK (uint32_t)(0x000FFFFFU)
73:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LPUART_BRR_MIN_VALUE (uint32_t)(0x00000300U)
74:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
75:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
76:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
77:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
78:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
79:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Private macros ------------------------------------------------------------*/
80:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #if defined(USE_FULL_LL_DRIVER)
81:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_Private_Macros LPUART Private Macros
82:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
83:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
84:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
85:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
86:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
87:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #endif /*USE_FULL_LL_DRIVER*/
88:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
89:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Exported types ------------------------------------------------------------*/
90:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #if defined(USE_FULL_LL_DRIVER)
91:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures
92:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
93:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
94:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
95:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
96:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief LL LPUART Init Structure definition
97:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
98:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** typedef struct
99:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** uint32_t BaudRate; /*!< This field defines expected LPUART communication baud ra
101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This feature can be modified afterwards using unitary fu
103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or receive
105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This parameter can be a value of @ref LPUART_LL_EC_DATAW
106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This feature can be modified afterwards using unitary fu
108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This parameter can be a value of @ref LPUART_LL_EC_STOPB
ARM GAS /tmp/ccHfYm8W.s page 19
111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This feature can be modified afterwards using unitary fu
113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** uint32_t Parity; /*!< Specifies the parity mode.
115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This parameter can be a value of @ref LPUART_LL_EC_PARIT
116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This feature can be modified afterwards using unitary fu
118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is en
120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This parameter can be a value of @ref LPUART_LL_EC_DIREC
121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This feature can be modified afterwards using unitary fu
123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enab
125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This parameter can be a value of @ref LPUART_LL_EC_HWCON
126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** This feature can be modified afterwards using unitary fu
128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** } LL_LPUART_InitTypeDef;
130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #endif /* USE_FULL_LL_DRIVER */
135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Exported constants --------------------------------------------------------*/
137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants
138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines
142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Flags defines which can be used with LL_LPUART_WriteReg function
143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ICR_PECF USART_ICR_PECF /*!< Parity error flag */
146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ICR_FECF USART_ICR_FECF /*!< Framing error flag */
147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ICR_NCF USART_ICR_NCF /*!< Noise detected flag *
148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error flag */
149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected fl
150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete
151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS flag */
152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match flag
153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode
154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines
159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Flags defines which can be used with LL_LPUART_ReadReg function
160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_PE USART_ISR_PE /*!< Parity error flag */
163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_FE USART_ISR_FE /*!< Framing error flag */
164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_NE USART_ISR_NE /*!< Noise detected flag *
165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */
166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected fl
167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_RXNE USART_ISR_RXNE /*!< Read data register no
ARM GAS /tmp/ccHfYm8W.s page 20
168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_TC USART_ISR_TC /*!< Transmission complete
169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_TXE USART_ISR_TXE /*!< Transmit data registe
170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */
171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_CTS USART_ISR_CTS /*!< CTS flag */
172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */
173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_CMF USART_ISR_CMF /*!< Character match flag
174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */
175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from
176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode
177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable ackno
178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknow
179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_IT IT Defines
184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions
185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable
188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register no
189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete
190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data registe
191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_CR1_CMIE USART_CR1_CMIE /*!< Character match inter
193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enabl
194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable
195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode
196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_DIRECTION Direction
201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DIRECTION_NONE (uint32_t)0x00000000U /*!< Transmitter and
204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is d
205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is e
206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and
207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_PARITY Parity Control
212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_PARITY_NONE (uint32_t)0x00000000U /*!< Parity control d
215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_PARITY_EVEN USART_CR1_PCE /*!< Parity control e
216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control e
217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_WAKEUP Wakeup
222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_WAKEUP_IDLELINE (uint32_t)0x00000000U /*!< LPUART wake up
ARM GAS /tmp/ccHfYm8W.s page 21
225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< LPUART wake up
226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth
231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word leng
234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DATAWIDTH_8B (uint32_t)0x00000000U /*!< 8 bits word leng
235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word leng
236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_STOPBITS Stop Bits
241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_STOPBITS_1 (uint32_t)0x00000000U /*!< 1 stop bit */
244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap
250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_TXRX_STANDARD (uint32_t)0x00000000U /*!< TX/RX pins are u
253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins f
254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_RXPIN_LEVEL_STANDARD (uint32_t)0x00000000U /*!< RX pin signal wo
262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal va
263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_TXPIN_LEVEL_STANDARD (uint32_t)0x00000000U /*!< TX pin signal wo
271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal va
272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion
277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_BINARY_LOGIC_POSITIVE (uint32_t)0x00000000U /*!< Logical data fro
280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data fro
281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
ARM GAS /tmp/ccHfYm8W.s page 22
282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_BITORDER Bit Order
286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_BITORDER_LSBFIRST (uint32_t)0x00000000U /*!< data is transmit
289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmit
290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection
295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ADDRESS_DETECT_4B (uint32_t)0x00000000U /*!< 4-bit address de
298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address de
299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control
304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_HWCONTROL_NONE (uint32_t)0x00000000U /*!< CTS and RTS hard
307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabl
308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled
309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hard
310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation
315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_WAKEUP_ON_ADDRESS (uint32_t)0x00000000U /*!< Wake up act
318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up act
319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up act
320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity
325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DE_POLARITY_HIGH (uint32_t)0x00000000U /*!< DE signal is act
328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is act
329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data
334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DMA_REG_DATA_TRANSMIT (uint32_t)0U /*!< Get address of d
337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_DMA_REG_DATA_RECEIVE (uint32_t)1U /*!< Get address of d
338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
ARM GAS /tmp/ccHfYm8W.s page 23
339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Exported macro ------------------------------------------------------------*/
347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros
348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros
352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Write a value in LPUART register
357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param __INSTANCE__ LPUART Instance
358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param __REG__ Register to be written
359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param __VALUE__ Value to be written in the register
360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VA
363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Read a value in LPUART register
366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param __INSTANCE__ LPUART Instance
367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param __REG__ Register to be read
368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Register value
369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros
376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Compute LPUARTDIV value according to Peripheral Clock and
381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * expected Baud Rate (20-bit value of LPUARTDIV is returned)
382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance
383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param __BAUDRATE__ Baud Rate value to achieve
384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval LPUARTDIV value to be used for BRR register filling
385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** #define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV
387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @}
394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
ARM GAS /tmp/ccHfYm8W.s page 24
396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /* Exported functions --------------------------------------------------------*/
397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions
398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /** @defgroup LPUART_LL_EF_Configuration Configuration functions
402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @{
403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief LPUART Enable
407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 UE LL_LPUART_Enable
408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** SET_BIT(LPUARTx->CR1, USART_CR1_UE);
414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief LPUART Disable
418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately,
419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * and current operations are discarded. The configuration of the LPUART is kept, but all
420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * flags, in the LPUARTx_ISR are set to their default values.
421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note In order to go into low-power mode without generating errors on the line,
422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * the TE bit must be reset before and the software must wait
423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * for the TC bit in the LPUART_ISR to be set before resetting the UE bit.
424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * The DMA requests are also reset when UE = 0 so the DMA channel must
425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * be disabled before resetting the UE bit.
426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 UE LL_LPUART_Disable
427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Indicate if LPUART is enabled
437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 UE LL_LPUART_IsEnabled
438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval State of bit (1 or 0).
440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
99 .loc 3 443 0
100 0006 0368 ldr r3, [r0]
101 .LVL6:
102 .LBE19:
103 .LBE18:
158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** ErrorStatus status = ERROR;
159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Check the parameters */
ARM GAS /tmp/ccHfYm8W.s page 25
162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** assert_param(IS_LPUART_INSTANCE(LPUARTx));
163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** assert_param(IS_LL_LPUART_BAUDRATE(LPUART_InitStruct->BaudRate));
164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** assert_param(IS_LL_LPUART_DATAWIDTH(LPUART_InitStruct->DataWidth));
165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** assert_param(IS_LL_LPUART_STOPBITS(LPUART_InitStruct->StopBits));
166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** assert_param(IS_LL_LPUART_PARITY(LPUART_InitStruct->Parity));
167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** assert_param(IS_LL_LPUART_DIRECTION(LPUART_InitStruct->TransferDirection));
168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** assert_param(IS_LL_LPUART_HWCONTROL(LPUART_InitStruct->HardwareFlowControl));
169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* LPUART needs to be in disabled state, in order to be able to configure some bits in
171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** CRx registers. Otherwise (LPUART not in Disabled state) => return ERROR */
172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** if (LL_LPUART_IsEnabled(LPUARTx) == 0U)
104 .loc 1 172 0
105 0008 DB07 lsls r3, r3, #31
106 000a 01D5 bpl .L9
158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** ErrorStatus status = ERROR;
107 .loc 1 158 0
108 000c 0020 movs r0, #0
109 .LVL7:
110 .L5:
173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** {
174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /*---------------------------- LPUART CR1 Configuration -----------------------
175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * Configure LPUARTx CR1 (LPUART Word Length, Parity and Transfer Direction bits) with paramete
176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * - DataWidth: USART_CR1_M bits according to LPUART_InitStruct->DataWidth value
177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to LPUART_InitStruct->Parit
178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to LPUART_InitStruct->Transf
179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** MODIFY_REG(LPUARTx->CR1,
181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE),
182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** (LPUART_InitStruct->DataWidth | LPUART_InitStruct->Parity | LPUART_InitStruct->Trans
183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /*---------------------------- LPUART CR2 Configuration -----------------------
185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * Configure LPUARTx CR2 (Stop bits) with parameters:
186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * - Stop Bits: USART_CR2_STOP bits according to LPUART_InitStruct->StopBits value.
187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LL_LPUART_SetStopBitsLength(LPUARTx, LPUART_InitStruct->StopBits);
189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /*---------------------------- LPUART CR3 Configuration -----------------------
191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * Configure LPUARTx CR3 (Hardware Flow Control) with parameters:
192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to LPUART_InitStruct->H
193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LL_LPUART_SetHWFlowCtrl(LPUARTx, LPUART_InitStruct->HardwareFlowControl);
195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /*---------------------------- LPUART BRR Configuration -----------------------
197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * Retrieve Clock frequency used for LPUART Peripheral
198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** periphclk = LL_RCC_GetLPUARTClockFreq(LL_RCC_LPUART1_CLKSOURCE);
200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Configure the LPUART Baud Rate :
202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** - valid baud rate value (different from 0) is required
203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** - Peripheral clock as returned by RCC service, should be valid (different from 0).
204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** && (LPUART_InitStruct->BaudRate != 0U))
207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** {
208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** status = SUCCESS;
209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LL_LPUART_SetBaudRate(LPUARTx,
210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** periphclk,
ARM GAS /tmp/ccHfYm8W.s page 26
211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LPUART_InitStruct->BaudRate);
212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** }
213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** }
214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** return (status);
216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** }
111 .loc 1 216 0
112 @ sp needed
113 .LVL8:
114 .LVL9:
115 000e F8BD pop {r3, r4, r5, r6, r7, pc}
116 .LVL10:
117 .L9:
180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE),
118 .loc 1 180 0
119 0010 0368 ldr r3, [r0]
120 0012 184A ldr r2, .L10
121 0014 1340 ands r3, r2
122 0016 4A68 ldr r2, [r1, #4]
123 0018 C968 ldr r1, [r1, #12]
124 .LVL11:
125 001a 0A43 orrs r2, r1
126 001c 2969 ldr r1, [r5, #16]
127 001e 0A43 orrs r2, r1
128 0020 1343 orrs r3, r2
129 0022 0360 str r3, [r0]
130 .LVL12:
131 .LBB20:
132 .LBB21:
444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief LPUART enabled in STOP Mode
448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provid
449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * LPUART clock selection is HSI or LSE in RCC.
450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 UESM LL_LPUART_EnableInStopMode
451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief LPUART disabled in STOP Mode
461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode
462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 UESM LL_LPUART_DisableInStopMode
463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
ARM GAS /tmp/ccHfYm8W.s page 27
472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Indicate if LPUART is enabled in STOP Mode
473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * (able to wake up MCU from Stop mode or not)
474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode
475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval State of bit (1 or 0).
477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM));
481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 RE LL_LPUART_EnableDirectionRx
486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** SET_BIT(LPUARTx->CR1, USART_CR1_RE);
492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Receiver Disable
496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 RE LL_LPUART_DisableDirectionRx
497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Transmitter Enable
507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 TE LL_LPUART_EnableDirectionTx
508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** SET_BIT(LPUARTx->CR1, USART_CR1_TE);
514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Transmitter Disable
518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 TE LL_LPUART_DisableDirectionTx
519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure simultaneously enabled/disabled states
ARM GAS /tmp/ccHfYm8W.s page 28
529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * of Transmitter and Receiver
530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n
531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR1 TE LL_LPUART_SetTransferDirection
532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param TransferDirection This parameter can be one of the following values:
534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DIRECTION_NONE
535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DIRECTION_RX
536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DIRECTION_TX
537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DIRECTION_TX_RX
538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirect
541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Return enabled/disabled states of Transmitter and Receiver
547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n
548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR1 TE LL_LPUART_GetTransferDirection
549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DIRECTION_NONE
552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DIRECTION_RX
553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DIRECTION_TX
554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DIRECTION_TX_RX
555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE));
559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure Parity (enabled/disabled and parity mode if enabled)
563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note This function selects if hardware parity control (generation and detection) is enabled
564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * When the parity control is enabled (Odd or Even), computed parity bit is inserted at th
565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * (depending on data width) and parity is checked on the received data.
566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 PS LL_LPUART_SetParity\n
567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR1 PCE LL_LPUART_SetParity
568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param Parity This parameter can be one of the following values:
570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_PARITY_NONE
571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_PARITY_EVEN
572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_PARITY_ODD
573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 PS LL_LPUART_GetParity\n
583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR1 PCE LL_LPUART_GetParity
584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
ARM GAS /tmp/ccHfYm8W.s page 29
586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_PARITY_NONE
587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_PARITY_EVEN
588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_PARITY_ODD
589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Set Receiver Wake Up method from Mute mode.
597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod
598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param Method This parameter can be one of the following values:
600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_IDLELINE
601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Return Receiver Wake Up method from Mute mode
611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod
612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_IDLELINE
615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Set Word length (nb of data bits, excluding start and stop bits)
624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 M LL_LPUART_SetDataWidth
625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param DataWidth This parameter can be one of the following values:
627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DATAWIDTH_7B
628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DATAWIDTH_8B
629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DATAWIDTH_9B
630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 M LL_LPUART_GetDataWidth
640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DATAWIDTH_7B
ARM GAS /tmp/ccHfYm8W.s page 30
643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DATAWIDTH_8B
644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DATAWIDTH_9B
645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Allow switch between Mute Mode and Active mode
653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 MME LL_LPUART_EnableMuteMode
654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** SET_BIT(LPUARTx->CR1, USART_CR1_MME);
660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 MME LL_LPUART_DisableMuteMode
665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Indicate if switch between Mute Mode and Active mode is allowed
675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode
676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval State of bit (1 or 0).
678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Set the length of the stop bits
686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength
687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param StopBits This parameter can be one of the following values:
689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_STOPBITS_1
690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_STOPBITS_2
691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
133 .loc 3 695 0
134 0024 4368 ldr r3, [r0, #4]
135 0026 144A ldr r2, .L10+4
136 0028 1340 ands r3, r2
ARM GAS /tmp/ccHfYm8W.s page 31
137 002a AA68 ldr r2, [r5, #8]
138 002c 1343 orrs r3, r2
139 002e 4360 str r3, [r0, #4]
140 .LVL13:
141 .LBE21:
142 .LBE20:
143 .LBB22:
144 .LBB23:
696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Retrieve the length of the stop bits
700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength
701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_STOPBITS_1
704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_STOPBITS_2
705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note Call of this function is equivalent to following function call sequence :
714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * - Data Width configuration using @ref LL_LPUART_SetDataWidth() function
715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function
716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function
717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n
718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR1 PCE LL_LPUART_ConfigCharacter\n
719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR1 M LL_LPUART_ConfigCharacter\n
720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR2 STOP LL_LPUART_ConfigCharacter
721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param DataWidth This parameter can be one of the following values:
723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DATAWIDTH_7B
724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DATAWIDTH_8B
725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_DATAWIDTH_9B
726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param Parity This parameter can be one of the following values:
727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_PARITY_NONE
728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_PARITY_EVEN
729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_PARITY_ODD
730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param StopBits This parameter can be one of the following values:
731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_STOPBITS_1
732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_STOPBITS_2
733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t
736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** uint32_t StopBits)
737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure TX/RX pins swapping setting.
744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap
ARM GAS /tmp/ccHfYm8W.s page 32
745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param SwapConfig This parameter can be one of the following values:
747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_TXRX_STANDARD
748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_TXRX_SWAPPED
749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Retrieve TX/RX pins swapping configuration.
758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap
759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_TXRX_STANDARD
762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_TXRX_SWAPPED
763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure RX pin active level logic
771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel
772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param PinInvMethod This parameter can be one of the following values:
774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Retrieve RX pin active level logic configuration
785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel
786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure TX pin active level logic
798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel
799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param PinInvMethod This parameter can be one of the following values:
801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
ARM GAS /tmp/ccHfYm8W.s page 33
802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Retrieve TX pin active level logic configuration
812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel
813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure Binary data logic.
825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** *
826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note Allow to define how Logical data from the data register are send/received :
827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic
829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param DataLogic This parameter can be one of the following values:
831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Retrieve Binary data configuration
842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic
843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure transfer bit order (either Less or Most Significant Bit First)
855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note MSB First means data is transmitted/received with the MSB first, following the start bi
856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * LSB First means data is transmitted/received with data bit 0 first, following the start
857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder
858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
ARM GAS /tmp/ccHfYm8W.s page 34
859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param BitOrder This parameter can be one of the following values:
860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_BITORDER_LSBFIRST
861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_BITORDER_MSBFIRST
862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Return transfer bit order (either Less or Most Significant Bit First)
871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note MSB First means data is transmitted/received with the MSB first, following the start bi
872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * LSB First means data is transmitted/received with data bit 0 first, following the start
873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder
874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_BITORDER_LSBFIRST
877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_BITORDER_MSBFIRST
878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Set Address of the LPUART node.
886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note This is used in multiprocessor communication during Mute mode or Stop mode,
887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * for wake up with address mark detection.
888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7.
889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * (b7-b4 should be set to 0)
890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * 8bits address node is used when 7-bit Address Detection is selected in ADDM7.
891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * (This is used in multiprocessor communication during Mute mode or Stop mode,
892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * for wake up with 7-bit address mark detection.
893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * The MSB of the character sent by the transmitter should be equal to 1.
894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * It may also be used for character detection during normal reception,
895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * Mute mode inactive (for example, end of block detection in ModBus protocol).
896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * In this case, the whole received character (8-bit) is compared to the ADD[7:0]
897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * value and CMF flag is set on match)
898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n
899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR2 ADDM7 LL_LPUART_ConfigNodeAddress
900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param AddressLen This parameter can be one of the following values:
902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param NodeAddress 4 or 7 bit Address of the LPUART node.
905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint3
908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** (uint32_t)(AddressLen | (NodeAddress << LPUART_POSITION_CR2_ADD)));
911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2.
915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note If 4-bit Address Detection is selected in ADDM7,
ARM GAS /tmp/ccHfYm8W.s page 35
916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * If 7-bit Address Detection is selected in ADDM7,
918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
919:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 ADD LL_LPUART_GetNodeAddress
920:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
921:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255)
922:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
923:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
924:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
925:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> LPUART_POSITION_CR2_ADD);
926:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
927:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
928:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
929:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
930:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen
931:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
932:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
933:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
934:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
935:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
936:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
937:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
938:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
939:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
940:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
941:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
942:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Enable RTS HW Flow Control
943:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl
944:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
945:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
946:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
947:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
948:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
949:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
950:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
951:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
952:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
953:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Disable RTS HW Flow Control
954:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl
955:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
956:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
957:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
958:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
959:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
960:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
961:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
962:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
963:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
964:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Enable CTS HW Flow Control
965:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl
966:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
967:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
968:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
969:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
970:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
971:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
972:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
ARM GAS /tmp/ccHfYm8W.s page 36
973:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
974:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
975:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Disable CTS HW Flow Control
976:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl
977:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
978:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
979:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
980:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
981:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
982:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
983:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
984:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
985:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
986:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure HW Flow Control mode (both CTS and RTS)
987:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n
988:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR3 CTSE LL_LPUART_SetHWFlowCtrl
989:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
990:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param HardwareFlowControl This parameter can be one of the following values:
991:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_HWCONTROL_NONE
992:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_HWCONTROL_RTS
993:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_HWCONTROL_CTS
994:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
995:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
996:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
997:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
998:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
999:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
145 .loc 3 999 0
146 0030 8368 ldr r3, [r0, #8]
147 0032 124A ldr r2, .L10+8
148 0034 1340 ands r3, r2
149 0036 6A69 ldr r2, [r5, #20]
150 0038 1343 orrs r3, r2
151 003a 8360 str r3, [r0, #8]
152 .LVL14:
153 .LBE23:
154 .LBE22:
199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
155 .loc 1 199 0
156 003c C020 movs r0, #192
157 .LVL15:
158 003e 0001 lsls r0, r0, #4
159 0040 FFF7FEFF bl LL_RCC_GetLPUARTClockFreq
160 .LVL16:
205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** && (LPUART_InitStruct->BaudRate != 0U))
161 .loc 1 205 0
162 0044 0028 cmp r0, #0
163 0046 10D0 beq .L7
206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** {
164 .loc 1 206 0
165 0048 2A68 ldr r2, [r5]
166 004a 002A cmp r2, #0
167 004c 0FD0 beq .L8
168 .LVL17:
169 .LBB24:
170 .LBB25:
1000:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
ARM GAS /tmp/ccHfYm8W.s page 37
1001:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
1002:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
1003:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Return HW Flow Control configuration (both CTS and RTS)
1004:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n
1005:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * CR3 CTSE LL_LPUART_GetHWFlowCtrl
1006:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
1007:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
1008:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_HWCONTROL_NONE
1009:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_HWCONTROL_RTS
1010:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_HWCONTROL_CTS
1011:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
1012:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
1013:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
1014:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
1015:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
1016:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
1017:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
1018:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
1019:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Enable Overrun detection
1020:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect
1021:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
1022:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
1023:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
1024:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
1025:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
1026:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
1027:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
1028:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
1029:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
1030:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Disable Overrun detection
1031:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect
1032:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
1033:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
1034:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
1035:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
1036:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
1037:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
1038:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
1039:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
1040:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
1041:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Indicate if Overrun detection is enabled
1042:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect
1043:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
1044:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval State of bit (1 or 0).
1045:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
1046:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
1047:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
1048:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
1049:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
1050:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
1051:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
1052:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
1053:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 WUS LL_LPUART_SetWKUPType
1054:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
1055:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param Type This parameter can be one of the following values:
1056:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
1057:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
ARM GAS /tmp/ccHfYm8W.s page 38
1058:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
1059:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
1060:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
1061:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
1062:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
1063:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
1064:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
1065:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
1066:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
1067:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
1068:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll CR3 WUS LL_LPUART_GetWKUPType
1069:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
1070:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval Returned value can be one of the following values:
1071:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
1072:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
1073:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
1074:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
1075:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
1076:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
1077:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
1078:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** }
1079:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h ****
1080:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** /**
1081:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @brief Configure LPUART BRR register for achieving expected Baud Rate value.
1082:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** *
1083:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note Compute and set LPUARTDIV value in BRR Register (full BRR content)
1084:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * according to used Peripheral Clock and expected Baud Rate values
1085:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note Peripheral clock and Baud Rate values provided as function parameters should be valid
1086:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * (Baud rate value != 0).
1087:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit,
1088:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * a care should be taken when generating high baud rates using high PeriphClk
1089:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate].
1090:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @rmtoll BRR BRR LL_LPUART_SetBaudRate
1091:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param LPUARTx LPUART Instance
1092:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param PeriphClk Peripheral Clock
1093:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @param BaudRate Baud Rate
1094:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** * @retval None
1095:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** */
1096:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t Bau
1097:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** {
1098:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_lpuart.h **** LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
171 .loc 3 1098 0
172 004e 070E lsrs r7, r0, #24
173 0050 0602 lsls r6, r0, #8
174 0052 5008 lsrs r0, r2, #1
175 .LVL18:
176 0054 0021 movs r1, #0
177 0056 8019 adds r0, r0, r6
178 0058 7941 adcs r1, r1, r7
179 005a 0023 movs r3, #0
180 005c FFF7FEFF bl __aeabi_uldivmod
181 .LVL19:
182 0060 0003 lsls r0, r0, #12
183 0062 000B lsrs r0, r0, #12
184 0064 E060 str r0, [r4, #12]
185 .LBE25:
186 .LBE24:
ARM GAS /tmp/ccHfYm8W.s page 39
208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LL_LPUART_SetBaudRate(LPUARTx,
187 .loc 1 208 0
188 0066 0120 movs r0, #1
189 0068 D1E7 b .L5
190 .LVL20:
191 .L7:
158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
192 .loc 1 158 0
193 006a 0020 movs r0, #0
194 .LVL21:
195 006c CFE7 b .L5
196 .LVL22:
197 .L8:
198 006e 0020 movs r0, #0
199 .LVL23:
200 0070 CDE7 b .L5
201 .L11:
202 0072 C046 .align 2
203 .L10:
204 0074 F3E9FFEF .word -268441101
205 0078 FFCFFFFF .word -12289
206 007c FFFCFFFF .word -769
207 .cfi_endproc
208 .LFE337:
210 .section .text.LL_LPUART_StructInit,"ax",%progbits
211 .align 1
212 .global LL_LPUART_StructInit
213 .syntax unified
214 .code 16
215 .thumb_func
216 .fpu softvfp
218 LL_LPUART_StructInit:
219 .LFB338:
217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /**
219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @brief Set each @ref LL_LPUART_InitTypeDef field to default value.
220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @param LPUART_InitStruct pointer to a @ref LL_LPUART_InitTypeDef structure
221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * whose fields will be set to default values.
222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** * @retval None
223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** */
224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c ****
225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct)
226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** {
220 .loc 1 226 0
221 .cfi_startproc
222 @ args = 0, pretend = 0, frame = 0
223 @ frame_needed = 0, uses_anonymous_args = 0
224 @ link register save eliminated.
225 .LVL24:
227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** /* Set LPUART_InitStruct fields to default values */
228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LPUART_InitStruct->BaudRate = 9600U;
226 .loc 1 228 0
227 0000 9623 movs r3, #150
228 0002 9B01 lsls r3, r3, #6
229 0004 0360 str r3, [r0]
229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LPUART_InitStruct->DataWidth = LL_LPUART_DATAWIDTH_8B;
230 .loc 1 229 0
ARM GAS /tmp/ccHfYm8W.s page 40
231 0006 0023 movs r3, #0
232 0008 4360 str r3, [r0, #4]
230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LPUART_InitStruct->StopBits = LL_LPUART_STOPBITS_1;
233 .loc 1 230 0
234 000a 8360 str r3, [r0, #8]
231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LPUART_InitStruct->Parity = LL_LPUART_PARITY_NONE ;
235 .loc 1 231 0
236 000c C360 str r3, [r0, #12]
232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LPUART_InitStruct->TransferDirection = LL_LPUART_DIRECTION_TX_RX;
237 .loc 1 232 0
238 000e 0C22 movs r2, #12
239 0010 0261 str r2, [r0, #16]
233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** LPUART_InitStruct->HardwareFlowControl = LL_LPUART_HWCONTROL_NONE;
240 .loc 1 233 0
241 0012 4361 str r3, [r0, #20]
234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_lpuart.c **** }
242 .loc 1 234 0
243 @ sp needed
244 0014 7047 bx lr
245 .cfi_endproc
246 .LFE338:
248 .text
249 .Letext0:
250 .file 4 "/usr/arm-none-eabi/include/machine/_default_types.h"
251 .file 5 "/usr/arm-none-eabi/include/sys/_stdint.h"
252 .file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
253 .file 7 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
254 .file 8 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h"
255 .file 9 "/usr/arm-none-eabi/include/sys/lock.h"
256 .file 10 "/usr/arm-none-eabi/include/sys/_types.h"
257 .file 11 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
258 .file 12 "/usr/arm-none-eabi/include/sys/reent.h"
259 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h"
ARM GAS /tmp/ccHfYm8W.s page 41
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32l0xx_ll_lpuart.c
/tmp/ccHfYm8W.s:16 .text.LL_LPUART_DeInit:0000000000000000 $t
/tmp/ccHfYm8W.s:23 .text.LL_LPUART_DeInit:0000000000000000 LL_LPUART_DeInit
/tmp/ccHfYm8W.s:63 .text.LL_LPUART_DeInit:0000000000000018 $d
/tmp/ccHfYm8W.s:70 .text.LL_LPUART_Init:0000000000000000 $t
/tmp/ccHfYm8W.s:77 .text.LL_LPUART_Init:0000000000000000 LL_LPUART_Init
/tmp/ccHfYm8W.s:204 .text.LL_LPUART_Init:0000000000000074 $d
/tmp/ccHfYm8W.s:211 .text.LL_LPUART_StructInit:0000000000000000 $t
/tmp/ccHfYm8W.s:218 .text.LL_LPUART_StructInit:0000000000000000 LL_LPUART_StructInit
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
__aeabi_uldivmod
LL_RCC_GetLPUARTClockFreq