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B3M38SPD seminar project - beehive monitor with LoRa reporting
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spd-lorabees/build/stm32l0xx_hal_rcc_ex.lst

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ARM GAS /tmp/cc4UWnQP.s page 1
1 .cpu cortex-m0plus
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 0
10 .eabi_attribute 18, 4
11 .file "stm32l0xx_hal_rcc_ex.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits
16 .align 1
17 .global HAL_RCCEx_PeriphCLKConfig
18 .syntax unified
19 .code 16
20 .thumb_func
21 .fpu softvfp
23 HAL_RCCEx_PeriphCLKConfig:
24 .LFB39:
25 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c"
1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ******************************************************************************
3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @file stm32l0xx_hal_rcc_ex.c
4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @author MCD Application Team
5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver.
6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following
7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * functionalities RCC extension peripheral:
8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions
9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * + Extended Clock Recovery System Control functions
10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** *
11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ******************************************************************************
12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @attention
13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** *
14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** *
16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * Redistribution and use in source and binary forms, with or without modification,
17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * are permitted provided that the following conditions are met:
18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * 1. Redistributions of source code must retain the above copyright notice,
19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * this list of conditions and the following disclaimer.
20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * 2. Redistributions in binary form must reproduce the above copyright notice,
21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * this list of conditions and the following disclaimer in the documentation
22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * and/or other materials provided with the distribution.
23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors
24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * may be used to endorse or promote products derived from this software
25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * without specific prior written permission.
26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** *
27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ARM GAS /tmp/cc4UWnQP.s page 2
34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** *
38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ******************************************************************************
39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/
42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #include "stm32l0xx_hal.h"
43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /** @addtogroup STM32L0xx_HAL_Driver
45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @{
46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED
49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx
51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief RCC Extension HAL module driver
52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @{
53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/
56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Private define ------------------------------------------------------------*/
57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Constants RCCEx Private Constants
58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @{
59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined (CRS)
61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Bit position in register */
62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #define CRS_CFGR_FELIM_BITNUMBER CRS_CFGR_FELIM_Pos
63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #define CRS_CR_TRIM_BITNUMBER CRS_CR_TRIM_Pos
64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #define CRS_ISR_FECAP_BITNUMBER CRS_ISR_FECAP_Pos
65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* CRS */
66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(USB)
68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** extern const uint8_t PLLMulTable[];
69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* USB */
70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @}
72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Private macro -------------------------------------------------------------*/
75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Macros RCCEx Private Macros
76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @{
77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @}
80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/
83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/
84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Private functions ---------------------------------------------------------*/
85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @{
88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions
ARM GAS /tmp/cc4UWnQP.s page 3
91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions
92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** *
93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** @verbatim
94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ===============================================================================
95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions #####
96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ===============================================================================
97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** [..]
98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks
99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequencies.
100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** [..]
101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in
103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including
104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** the backup registers) are set to their reset values.
105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** @endverbatim
107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @{
108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Initializes the RCC extended peripherals clocks according to the specified
112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * parameters in the RCC_PeriphCLKInitTypeDef.
113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * contains the configuration information for the Extended Peripherals clocks(USART1,USART
115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * I2C1, I2C3, RTC, USB/RNG and LPTIM1 clocks).
116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval HAL status
117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @note If HAL_ERROR returned, first switch-OFF HSE clock oscillator with @ref HAL_RCC_OscConfi
118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * to possibly update HSE divider.
119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
26 .loc 1 121 0
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 0
29 @ frame_needed = 0, uses_anonymous_args = 0
30 .LVL0:
31 0000 70B5 push {r4, r5, r6, lr}
32 .LCFI0:
33 .cfi_def_cfa_offset 16
34 .cfi_offset 4, -16
35 .cfi_offset 5, -12
36 .cfi_offset 6, -8
37 .cfi_offset 14, -4
38 0002 0400 movs r4, r0
39 .LVL1:
122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U;
123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U;
124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check the parameters */
126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /*------------------------------- RTC/LCD Configuration ------------------------*/
129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(LCD)
131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** || (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD)
40 .loc 1 131 0
41 0004 8223 movs r3, #130
ARM GAS /tmp/cc4UWnQP.s page 4
42 0006 1B01 lsls r3, r3, #4
129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(LCD)
43 .loc 1 129 0
44 0008 0268 ldr r2, [r0]
45 000a 1A42 tst r2, r3
46 000c 5AD0 beq .L2
47 .LVL2:
48 .LBB2:
132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* LCD */
133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** )
134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* check for RTC Parameters used to output RTCCLK */
136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(LCD)
142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD)
143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->LCDClockSelection));
145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* LCD */
147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET;
149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* As soon as function is called to change RTC clock source, activation of the
151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** power domain is done. */
152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Requires to enable write access to Backup Domain of necessary */
153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED())
49 .loc 1 153 0
50 000e 754B ldr r3, .L33
51 0010 9B6B ldr r3, [r3, #56]
52 0012 DB00 lsls r3, r3, #3
53 0014 00D5 bpl .LCB29
54 0016 9DE0 b .L22 @long jump
55 .LCB29:
154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
56 .loc 1 155 0
57 0018 724A ldr r2, .L33
58 001a 916B ldr r1, [r2, #56]
59 001c 8023 movs r3, #128
60 001e 5B05 lsls r3, r3, #21
61 0020 0B43 orrs r3, r1
62 0022 9363 str r3, [r2, #56]
63 .LVL3:
156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pwrclkchanged = SET;
64 .loc 1 156 0
65 0024 0125 movs r5, #1
66 .LVL4:
67 .L3:
157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
68 .loc 1 159 0
69 0026 704B ldr r3, .L33+4
ARM GAS /tmp/cc4UWnQP.s page 5
70 0028 1B68 ldr r3, [r3]
71 002a DB05 lsls r3, r3, #23
72 002c 00D4 bmi .LCB47
73 002e 93E0 b .L27 @long jump
74 .LCB47:
75 .LVL5:
76 .L4:
160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */
162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** SET_BIT(PWR->CR, PWR_CR_DBP);
163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */
165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** return HAL_TIMEOUT;
172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if user wants to change HSE RTC prescaler whereas HSE is enabled */
177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** temp_reg = (RCC->CR & RCC_CR_RTCPRE);
77 .loc 1 177 0
78 0030 6C4B ldr r3, .L33
79 0032 1A68 ldr r2, [r3]
80 0034 C023 movs r3, #192
81 0036 9B03 lsls r3, r3, #14
82 0038 1A40 ands r2, r3
83 .LVL6:
178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if ((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CR_RTCPRE))
84 .loc 1 178 0
85 003a 6168 ldr r1, [r4, #4]
86 003c 0B40 ands r3, r1
87 003e 9342 cmp r3, r2
88 0040 00D1 bne .LCB60
89 0042 9EE0 b .L28 @long jump
90 .LCB60:
91 .L8:
179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined (LCD)
180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** || (temp_reg != (PeriphClkInit->LCDClockSelection & RCC_CR_RTCPRE))
181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* LCD */
182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** )
183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** { /* Check HSE State */
184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (((PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL) == RCC_CSR_RTCSEL_HSE) && HAL_IS_BIT
92 .loc 1 184 0
93 0044 C023 movs r3, #192
94 0046 9B02 lsls r3, r3, #10
95 0048 0A00 movs r2, r1
96 .LVL7:
97 004a 1A40 ands r2, r3
98 004c 9A42 cmp r2, r3
99 004e 00D1 bne .LCB68
100 0050 9FE0 b .L29 @long jump
101 .LCB68:
ARM GAS /tmp/cc4UWnQP.s page 6
102 .L9:
185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* To update HSE divider, first switch-OFF HSE clock oscillator*/
187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** return HAL_ERROR;
188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value
192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** temp_reg = (RCC->CSR & RCC_CSR_RTCSEL);
103 .loc 1 192 0
104 0052 644B ldr r3, .L33
105 0054 1B6D ldr r3, [r3, #80]
106 0056 C022 movs r2, #192
107 0058 9202 lsls r2, r2, #10
108 005a 1340 ands r3, r2
109 .LVL8:
193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CSR_RTCS
110 .loc 1 194 0
111 005c 1FD0 beq .L10
112 .loc 1 194 0 is_stmt 0 discriminator 1
113 005e 1140 ands r1, r2
114 0060 9942 cmp r1, r3
115 0062 02D0 beq .L11
195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
116 .loc 1 195 0 is_stmt 1
117 0064 2268 ldr r2, [r4]
118 0066 9206 lsls r2, r2, #26
119 0068 08D4 bmi .L12
120 .L11:
196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(LCD)
197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** || ((temp_reg != (PeriphClkInit->LCDClockSelection & RCC_CSR_RTCSEL)) \
121 .loc 1 197 0
122 006a C022 movs r2, #192
123 006c 9202 lsls r2, r2, #10
124 006e A168 ldr r1, [r4, #8]
125 0070 0A40 ands r2, r1
126 0072 9A42 cmp r2, r3
127 0074 13D0 beq .L10
198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD))
128 .loc 1 198 0
129 0076 2368 ldr r3, [r4]
130 .LVL9:
131 0078 1B05 lsls r3, r3, #20
132 007a 10D5 bpl .L10
133 .L12:
199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* LCD */
200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ))
201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Store the content of CSR register before the reset of Backup Domain */
203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** temp_reg = (RCC->CSR & ~(RCC_CSR_RTCSEL));
134 .loc 1 203 0
135 007c 594B ldr r3, .L33
136 007e 186D ldr r0, [r3, #80]
137 0080 5A4A ldr r2, .L33+8
138 0082 0240 ands r2, r0
139 .LVL10:
ARM GAS /tmp/cc4UWnQP.s page 7
204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */
206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE();
140 .loc 1 206 0
141 0084 1E6D ldr r6, [r3, #80]
142 0086 8021 movs r1, #128
143 0088 0903 lsls r1, r1, #12
144 008a 3143 orrs r1, r6
145 008c 1965 str r1, [r3, #80]
207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE();
146 .loc 1 207 0
147 008e 196D ldr r1, [r3, #80]
148 0090 574E ldr r6, .L33+12
149 0092 3140 ands r1, r6
150 0094 1965 str r1, [r3, #80]
208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Restore the Content of CSR register */
210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** RCC->CSR = temp_reg;
151 .loc 1 210 0
152 0096 1A65 str r2, [r3, #80]
211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Wait for LSERDY if LSE was enabled */
213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSEON))
153 .loc 1 213 0
154 0098 C305 lsls r3, r0, #23
155 009a 00D5 bpl .LCB123
156 009c 80E0 b .L30 @long jump
157 .LCB123:
158 .LVL11:
159 .L10:
214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get Start Tick */
216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Wait till LSE is ready */
219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** return HAL_TIMEOUT;
224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
160 .loc 1 228 0
161 009e 6368 ldr r3, [r4, #4]
162 00a0 C022 movs r2, #192
163 00a2 9202 lsls r2, r2, #10
164 00a4 1900 movs r1, r3
165 00a6 1140 ands r1, r2
166 00a8 9142 cmp r1, r2
167 00aa 00D1 bne .LCB132
168 00ac 88E0 b .L31 @long jump
169 .LCB132:
170 .L15:
171 .loc 1 228 0 is_stmt 0 discriminator 3
ARM GAS /tmp/cc4UWnQP.s page 8
172 00ae 4D49 ldr r1, .L33
173 00b0 0B6D ldr r3, [r1, #80]
174 00b2 C022 movs r2, #192
175 00b4 9202 lsls r2, r2, #10
176 00b6 6068 ldr r0, [r4, #4]
177 00b8 0240 ands r2, r0
178 00ba 1343 orrs r3, r2
179 00bc 0B65 str r3, [r1, #80]
229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Require to disable power clock if necessary */
231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(pwrclkchanged == SET)
180 .loc 1 231 0 is_stmt 1 discriminator 3
181 00be 012D cmp r5, #1
182 00c0 00D1 bne .LCB144
183 00c2 87E0 b .L32 @long jump
184 .LCB144:
185 .LVL12:
186 .L2:
187 .LBE2:
232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE();
234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined (RCC_CCIPR_USART1SEL)
238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /*------------------------------- USART1 Configuration ------------------------*/
239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
188 .loc 1 239 0
189 00c4 2368 ldr r3, [r4]
190 00c6 DB07 lsls r3, r3, #31
191 00c8 06D5 bpl .L16
240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check the parameters */
242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Configure the USART1 clock source */
245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
192 .loc 1 245 0
193 00ca 464A ldr r2, .L33
194 00cc D36C ldr r3, [r2, #76]
195 00ce 0321 movs r1, #3
196 00d0 8B43 bics r3, r1
197 00d2 E168 ldr r1, [r4, #12]
198 00d4 0B43 orrs r3, r1
199 00d6 D364 str r3, [r2, #76]
200 .L16:
246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* RCC_CCIPR_USART1SEL */
248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /*----------------------------- USART2 Configuration --------------------------*/
250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
201 .loc 1 250 0
202 00d8 2368 ldr r3, [r4]
203 00da 9B07 lsls r3, r3, #30
204 00dc 06D5 bpl .L17
251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check the parameters */
ARM GAS /tmp/cc4UWnQP.s page 9
253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Configure the USART2 clock source */
256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
205 .loc 1 256 0
206 00de 414A ldr r2, .L33
207 00e0 D36C ldr r3, [r2, #76]
208 00e2 0C21 movs r1, #12
209 00e4 8B43 bics r3, r1
210 00e6 2169 ldr r1, [r4, #16]
211 00e8 0B43 orrs r3, r1
212 00ea D364 str r3, [r2, #76]
213 .L17:
257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /*------------------------------ LPUART1 Configuration ------------------------*/
260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
214 .loc 1 260 0
215 00ec 2368 ldr r3, [r4]
216 00ee 5B07 lsls r3, r3, #29
217 00f0 06D5 bpl .L18
261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check the parameters */
263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection));
264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Configure the LPUAR1 clock source */
266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
218 .loc 1 266 0
219 00f2 3C4A ldr r2, .L33
220 00f4 D36C ldr r3, [r2, #76]
221 00f6 3F49 ldr r1, .L33+16
222 00f8 0B40 ands r3, r1
223 00fa 6169 ldr r1, [r4, #20]
224 00fc 0B43 orrs r3, r1
225 00fe D364 str r3, [r2, #76]
226 .L18:
267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /*------------------------------ I2C1 Configuration ------------------------*/
270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
227 .loc 1 270 0
228 0100 2368 ldr r3, [r4]
229 0102 1B07 lsls r3, r3, #28
230 0104 06D5 bpl .L19
271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check the parameters */
273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Configure the I2C1 clock source */
276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
231 .loc 1 276 0
232 0106 374A ldr r2, .L33
233 0108 D36C ldr r3, [r2, #76]
234 010a 3B49 ldr r1, .L33+20
235 010c 0B40 ands r3, r1
236 010e A169 ldr r1, [r4, #24]
237 0110 0B43 orrs r3, r1
ARM GAS /tmp/cc4UWnQP.s page 10
238 0112 D364 str r3, [r2, #76]
239 .L19:
277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined (RCC_CCIPR_I2C3SEL)
280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /*------------------------------ I2C3 Configuration ------------------------*/
281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3)
240 .loc 1 281 0
241 0114 2368 ldr r3, [r4]
242 0116 DB05 lsls r3, r3, #23
243 0118 06D5 bpl .L20
282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check the parameters */
284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection));
285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Configure the I2C3 clock source */
287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection);
244 .loc 1 287 0
245 011a 324A ldr r2, .L33
246 011c D36C ldr r3, [r2, #76]
247 011e 3349 ldr r1, .L33+8
248 0120 0B40 ands r3, r1
249 0122 E169 ldr r1, [r4, #28]
250 0124 0B43 orrs r3, r1
251 0126 D364 str r3, [r2, #76]
252 .L20:
288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* RCC_CCIPR_I2C3SEL */
290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(USB)
292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /*---------------------------- USB and RNG configuration --------------------*/
293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB))
253 .loc 1 293 0
254 0128 2368 ldr r3, [r4]
255 012a 5B06 lsls r3, r3, #25
256 012c 06D5 bpl .L21
294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection));
296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
257 .loc 1 296 0
258 012e 2D4A ldr r2, .L33
259 0130 D36C ldr r3, [r2, #76]
260 0132 3249 ldr r1, .L33+24
261 0134 0B40 ands r3, r1
262 0136 616A ldr r1, [r4, #36]
263 0138 0B43 orrs r3, r1
264 013a D364 str r3, [r2, #76]
265 .L21:
297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* USB */
299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /*---------------------------- LPTIM1 configuration ------------------------*/
301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1))
266 .loc 1 301 0
267 013c 2368 ldr r3, [r4]
268 013e 1B06 lsls r3, r3, #24
269 0140 4ED5 bpl .L26
ARM GAS /tmp/cc4UWnQP.s page 11
302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_LPTIMCLK(PeriphClkInit->LptimClockSelection));
304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->LptimClockSelection);
270 .loc 1 304 0
271 0142 284A ldr r2, .L33
272 0144 D36C ldr r3, [r2, #76]
273 0146 2E49 ldr r1, .L33+28
274 0148 0B40 ands r3, r1
275 014a 216A ldr r1, [r4, #32]
276 014c 0B43 orrs r3, r1
277 014e D364 str r3, [r2, #76]
305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** return HAL_OK;
278 .loc 1 307 0
279 0150 0020 movs r0, #0
280 .L6:
308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
281 .loc 1 308 0
282 @ sp needed
283 .LVL13:
284 0152 70BD pop {r4, r5, r6, pc}
285 .LVL14:
286 .L22:
287 .LBB3:
148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
288 .loc 1 148 0
289 0154 0025 movs r5, #0
290 0156 66E7 b .L3
291 .LVL15:
292 .L27:
162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
293 .loc 1 162 0
294 0158 234A ldr r2, .L33+4
295 015a 1168 ldr r1, [r2]
296 015c 8023 movs r3, #128
297 015e 5B00 lsls r3, r3, #1
298 0160 0B43 orrs r3, r1
299 0162 1360 str r3, [r2]
165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
300 .loc 1 165 0
301 0164 FFF7FEFF bl HAL_GetTick
302 .LVL16:
303 0168 0600 movs r6, r0
304 .LVL17:
305 .L5:
167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
306 .loc 1 167 0
307 016a 1F4B ldr r3, .L33+4
308 016c 1B68 ldr r3, [r3]
309 016e DB05 lsls r3, r3, #23
310 0170 00D5 bpl .LCB303
311 0172 5DE7 b .L4 @long jump
312 .LCB303:
169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
313 .loc 1 169 0
314 0174 FFF7FEFF bl HAL_GetTick
ARM GAS /tmp/cc4UWnQP.s page 12
315 .LVL18:
316 0178 801B subs r0, r0, r6
317 017a 6428 cmp r0, #100
318 017c F5D9 bls .L5
171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
319 .loc 1 171 0
320 017e 0320 movs r0, #3
321 0180 E7E7 b .L6
322 .LVL19:
323 .L28:
180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* LCD */
324 .loc 1 180 0
325 0182 C023 movs r3, #192
326 0184 9B03 lsls r3, r3, #14
327 0186 A068 ldr r0, [r4, #8]
328 0188 0340 ands r3, r0
329 018a 9342 cmp r3, r2
330 018c 00D0 beq .LCB323
331 018e 59E7 b .L8 @long jump
332 .LCB323:
333 0190 5FE7 b .L9
334 .LVL20:
335 .L29:
184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
336 .loc 1 184 0 discriminator 1
337 0192 144B ldr r3, .L33
338 0194 1B68 ldr r3, [r3]
339 0196 9B03 lsls r3, r3, #14
340 0198 00D4 bmi .LCB335
341 019a 5AE7 b .L9 @long jump
342 .LCB335:
187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
343 .loc 1 187 0
344 019c 0120 movs r0, #1
345 019e D8E7 b .L6
346 .LVL21:
347 .L30:
216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
348 .loc 1 216 0
349 01a0 FFF7FEFF bl HAL_GetTick
350 .LVL22:
351 01a4 0600 movs r6, r0
352 .LVL23:
353 .L13:
219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
354 .loc 1 219 0
355 01a6 0F4B ldr r3, .L33
356 01a8 1B6D ldr r3, [r3, #80]
357 01aa 9B05 lsls r3, r3, #22
358 01ac 00D5 bpl .LCB355
359 01ae 76E7 b .L10 @long jump
360 .LCB355:
221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
361 .loc 1 221 0
362 01b0 FFF7FEFF bl HAL_GetTick
363 .LVL24:
364 01b4 801B subs r0, r0, r6
ARM GAS /tmp/cc4UWnQP.s page 13
365 01b6 134B ldr r3, .L33+32
366 01b8 9842 cmp r0, r3
367 01ba F4D9 bls .L13
223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
368 .loc 1 223 0
369 01bc 0320 movs r0, #3
370 01be C8E7 b .L6
371 .LVL25:
372 .L31:
228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
373 .loc 1 228 0 discriminator 1
374 01c0 0849 ldr r1, .L33
375 01c2 0A68 ldr r2, [r1]
376 01c4 1048 ldr r0, .L33+36
377 01c6 0240 ands r2, r0
378 01c8 C020 movs r0, #192
379 01ca 8003 lsls r0, r0, #14
380 01cc 0340 ands r3, r0
381 01ce 1343 orrs r3, r2
382 01d0 0B60 str r3, [r1]
383 01d2 6CE7 b .L15
384 .L32:
233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
385 .loc 1 233 0
386 01d4 0A00 movs r2, r1
387 01d6 8B6B ldr r3, [r1, #56]
388 01d8 0C49 ldr r1, .L33+40
389 01da 0B40 ands r3, r1
390 01dc 9363 str r3, [r2, #56]
391 01de 71E7 b .L2
392 .LVL26:
393 .L26:
394 .LBE3:
307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
395 .loc 1 307 0
396 01e0 0020 movs r0, #0
397 01e2 B6E7 b .L6
398 .L34:
399 .align 2
400 .L33:
401 01e4 00100240 .word 1073876992
402 01e8 00700040 .word 1073770496
403 01ec FFFFFCFF .word -196609
404 01f0 FFFFF7FF .word -524289
405 01f4 FFF3FFFF .word -3073
406 01f8 FFCFFFFF .word -12289
407 01fc FFFFFFFB .word -67108865
408 0200 FFFFF3FF .word -786433
409 0204 88130000 .word 5000
410 0208 FFFFCFFF .word -3145729
411 020c FFFFFFEF .word -268435457
412 .cfi_endproc
413 .LFE39:
415 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits
416 .align 1
417 .global HAL_RCCEx_GetPeriphCLKConfig
418 .syntax unified
ARM GAS /tmp/cc4UWnQP.s page 14
419 .code 16
420 .thumb_func
421 .fpu softvfp
423 HAL_RCCEx_GetPeriphCLKConfig:
424 .LFB40:
309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Get the PeriphClkInit according to the internal RCC configuration registers.
312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals clocks(USART1,USART2
314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * I2C1, I2C3, RTC, USB/RNG and LPTIM1 clocks).
315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
425 .loc 1 318 0
426 .cfi_startproc
427 @ args = 0, pretend = 0, frame = 0
428 @ frame_needed = 0, uses_anonymous_args = 0
429 .LVL27:
430 0000 10B5 push {r4, lr}
431 .LCFI1:
432 .cfi_def_cfa_offset 8
433 .cfi_offset 4, -8
434 .cfi_offset 14, -4
435 .LVL28:
319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t srcclk = 0;
320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter -----------*/
322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Common part first */
323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_LPUART1 | \
324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_RTC | \
325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** RCC_PERIPHCLK_LPTIM1;
326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(RCC_CCIPR_USART1SEL)
327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART1;
328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* RCC_CCIPR_USART1SEL */
329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(RCC_CCIPR_I2C3SEL)
330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2C3;
331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* RCC_CCIPR_I2C3SEL */
332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(USB)
333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB;
334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* USB */
335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(LCD)
336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_LCD;
436 .loc 1 336 0
437 0002 1D4B ldr r3, .L38
438 0004 0360 str r3, [r0]
337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* LCD */
338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the RTC/LCD configuration -----------------------------------------------*/
340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE();
439 .loc 1 340 0
440 0006 1D4B ldr r3, .L38+4
441 0008 1B6D ldr r3, [r3, #80]
442 000a C022 movs r2, #192
443 000c 9202 lsls r2, r2, #10
444 000e 1340 ands r3, r2
ARM GAS /tmp/cc4UWnQP.s page 15
445 .LVL29:
341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (srcclk != RCC_RTCCLKSOURCE_HSE_DIV2)
446 .loc 1 341 0
447 0010 9342 cmp r3, r2
448 0012 28D0 beq .L36
342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Source clock is LSE or LSI*/
344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = srcclk;
449 .loc 1 344 0
450 0014 4360 str r3, [r0, #4]
451 .LVL30:
452 .L37:
345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Source clock is HSE. Need to get the prescaler value*/
349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = srcclk | (READ_BIT(RCC->CR, RCC_CR_RTCPRE));
350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(LCD)
352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->LCDClockSelection = PeriphClkInit->RTCClockSelection;
453 .loc 1 352 0
454 0016 4368 ldr r3, [r0, #4]
455 0018 8360 str r3, [r0, #8]
353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* LCD */
354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(RCC_CCIPR_USART1SEL)
355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the USART1 configuration --------------------------------------------*/
356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE();
456 .loc 1 356 0
457 001a 184B ldr r3, .L38+4
458 001c D96C ldr r1, [r3, #76]
459 001e 0322 movs r2, #3
460 0020 0A40 ands r2, r1
461 0022 C260 str r2, [r0, #12]
357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* RCC_CCIPR_USART1SEL */
358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the USART2 clock source ---------------------------------------------*/
359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE();
462 .loc 1 359 0
463 0024 D96C ldr r1, [r3, #76]
464 0026 0C22 movs r2, #12
465 0028 0A40 ands r2, r1
466 002a 0261 str r2, [r0, #16]
360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the LPUART1 clock source ---------------------------------------------*/
361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->Lpuart1ClockSelection = __HAL_RCC_GET_LPUART1_SOURCE();
467 .loc 1 361 0
468 002c DA6C ldr r2, [r3, #76]
469 002e C021 movs r1, #192
470 0030 0901 lsls r1, r1, #4
471 0032 0A40 ands r2, r1
472 0034 4261 str r2, [r0, #20]
362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the I2C1 clock source -----------------------------------------------*/
363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE();
473 .loc 1 363 0
474 0036 DA6C ldr r2, [r3, #76]
475 0038 C021 movs r1, #192
476 003a 8901 lsls r1, r1, #6
477 003c 0A40 ands r2, r1
478 003e 8261 str r2, [r0, #24]
ARM GAS /tmp/cc4UWnQP.s page 16
364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(RCC_CCIPR_I2C3SEL)
365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the I2C3 clock source -----------------------------------------------*/
366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE();
479 .loc 1 366 0
480 0040 D96C ldr r1, [r3, #76]
481 0042 C024 movs r4, #192
482 0044 A402 lsls r4, r4, #10
483 0046 2140 ands r1, r4
484 0048 C161 str r1, [r0, #28]
367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* RCC_CCIPR_I2C3SEL */
368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the LPTIM1 clock source -----------------------------------------------*/
369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->LptimClockSelection = __HAL_RCC_GET_LPTIM1_SOURCE();
485 .loc 1 369 0
486 004a D96C ldr r1, [r3, #76]
487 004c C022 movs r2, #192
488 004e 1203 lsls r2, r2, #12
489 0050 1140 ands r1, r2
490 0052 0162 str r1, [r0, #32]
370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the RTC clock source -----------------------------------------------*/
371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE();
491 .loc 1 371 0
492 0054 1A6D ldr r2, [r3, #80]
493 0056 2240 ands r2, r4
494 0058 4260 str r2, [r0, #4]
372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(USB)
373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the USB/RNG clock source -----------------------------------------------*/
374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE();
495 .loc 1 374 0
496 005a DB6C ldr r3, [r3, #76]
497 005c 8022 movs r2, #128
498 005e D204 lsls r2, r2, #19
499 0060 1340 ands r3, r2
500 0062 4362 str r3, [r0, #36]
375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* USB */
376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
501 .loc 1 376 0
502 @ sp needed
503 0064 10BD pop {r4, pc}
504 .LVL31:
505 .L36:
349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
506 .loc 1 349 0
507 0066 054A ldr r2, .L38+4
508 0068 1268 ldr r2, [r2]
509 006a C021 movs r1, #192
510 006c 8903 lsls r1, r1, #14
511 006e 0A40 ands r2, r1
512 0070 1343 orrs r3, r2
513 .LVL32:
514 0072 4360 str r3, [r0, #4]
515 0074 CFE7 b .L37
516 .L39:
517 0076 C046 .align 2
518 .L38:
519 0078 EF090000 .word 2543
520 007c 00100240 .word 1073876992
521 .cfi_endproc
ARM GAS /tmp/cc4UWnQP.s page 17
522 .LFE40:
524 .global __aeabi_uidiv
525 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits
526 .align 1
527 .global HAL_RCCEx_GetPeriphCLKFreq
528 .syntax unified
529 .code 16
530 .thumb_func
531 .fpu softvfp
533 HAL_RCCEx_GetPeriphCLKFreq:
534 .LFB41:
377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Return the peripheral clock frequency
380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @note Return 0 if peripheral clock is unknown
381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier
382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * This parameter can be one of the following values:
383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock
384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_LCD LCD peripheral clock (*)
385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB or RNG peripheral clock (*)
386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock (*)
387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_LPUART1 LPUART1 peripheral clock
389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock
390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock (*)
391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock (*)
392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @note (*) means that this peripheral is not present on all the devices
393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval Frequency in Hz (0: means that no available frequency for the peripheral)
394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
535 .loc 1 396 0
536 .cfi_startproc
537 @ args = 0, pretend = 0, frame = 0
538 @ frame_needed = 0, uses_anonymous_args = 0
539 .LVL33:
540 0000 10B5 push {r4, lr}
541 .LCFI2:
542 .cfi_def_cfa_offset 8
543 .cfi_offset 4, -8
544 .cfi_offset 14, -4
545 .LVL34:
397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U, clkprediv = 0U, frequency = 0U;
398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t srcclk = 0U;
399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(USB)
400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t pllmul = 0U, plldiv = 0U, pllvco = 0U;
401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* USB */
402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check the parameters */
404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** switch (PeriphClk)
546 .loc 1 406 0
547 0002 1028 cmp r0, #16
548 0004 00D1 bne .LCB527
549 0006 20E1 b .L42 @long jump
550 .LCB527:
ARM GAS /tmp/cc4UWnQP.s page 18
551 0008 2ED8 bhi .L43
552 000a 0228 cmp r0, #2
553 000c 00D1 bne .LCB531
554 000e CAE0 b .L44 @long jump
555 .LCB531:
556 0010 17D9 bls .L98
557 0012 0428 cmp r0, #4
558 0014 00D1 bne .LCB535
559 0016 E5E0 b .L47 @long jump
560 .LCB535:
561 0018 0828 cmp r0, #8
562 001a 59D1 bne .L73
407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RTC:
409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(LCD)
410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_LCD:
411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* LCD */
412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get RCC CSR configuration ------------------------------------------------------*/
414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** temp_reg = RCC->CSR;
415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the current RTC source */
417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE();
418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if LSE is ready if RTC clock selection is LSE */
420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSERDY)))
421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if LSI is ready if RTC clock selection is LSI */
425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSIRDY)))
426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = LSI_VALUE;
428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if HSE is ready and if RTC clock selection is HSE */
430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIVX) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)))
431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the current HSE clock divider */
433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** clkprediv = __HAL_RCC_GET_RTC_HSE_PRESCALER();
434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** switch (clkprediv)
436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_RTC_HSE_DIV_16: /* HSE DIV16 has been selected */
438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 16U;
440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_RTC_HSE_DIV_8: /* HSE DIV8 has been selected */
443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 8U;
445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_RTC_HSE_DIV_4: /* HSE DIV4 has been selected */
448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 4U;
450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
ARM GAS /tmp/cc4UWnQP.s page 19
452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** default: /* HSE DIV2 has been selected */
453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 2U;
455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clock not enabled for RTC */
460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = 0U;
463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(USB)
467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB:
468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the current USB source */
470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USB_SOURCE();
471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if((srcclk == RCC_USBCLKSOURCE_PLL) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get PLL clock source and multiplication factor ----------------------*/
475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)];
478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** plldiv = (plldiv >> RCC_CFGR_PLLDIV_Pos) + 1U;
479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Compute PLL clock input */
481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)
482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (READ_BIT(RCC->CR, RCC_CR_HSIDIVF) != 0U)
484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pllvco = (HSI_VALUE >> 2U);
486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pllvco = HSI_VALUE;
490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else /* HSE source */
493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pllvco = HSE_VALUE;
495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* pllvco * pllmul / plldiv */
497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pllvco = (pllvco * pllmul);
498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = (pllvco/ plldiv);
499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if((srcclk == RCC_USBCLKSOURCE_HSI48) && (HAL_IS_BIT_SET(RCC->CRRCR, RCC_CRRCR_HSI48RD
502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSI48_VALUE;
504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else /* RCC_USBCLKSOURCE_NONE */
506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = 0U;
508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
ARM GAS /tmp/cc4UWnQP.s page 20
509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* USB */
512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(RCC_CCIPR_USART1SEL)
513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART1:
514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the current USART1 source */
516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART1_SOURCE();
517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is PCLK2 */
519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK2)
520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK2Freq();
522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART1 clock selection is HSI */
524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is SYSCLK */
529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK)
530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART1 clock selection is LSE */
534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY)))
535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clock not enabled for USART1*/
539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = 0U;
542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* RCC_CCIPR_USART1SEL */
546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART2:
547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the current USART2 source */
549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART2_SOURCE();
550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is PCLK1 */
552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART2CLKSOURCE_PCLK1)
553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART2 clock selection is HSI */
557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is SYSCLK */
562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK)
563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
ARM GAS /tmp/cc4UWnQP.s page 21
566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART2 clock selection is LSE */
567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY)))
568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clock not enabled for USART2*/
572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = 0U;
575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_LPUART1:
579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the current LPUART1 source */
581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_LPUART1_SOURCE();
582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if LPUART1 clock selection is PCLK1 */
584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (srcclk == RCC_LPUART1CLKSOURCE_PCLK1)
585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if LPUART1 clock selection is HSI */
589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_LPUART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if LPUART1 clock selection is SYSCLK */
594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if (srcclk == RCC_LPUART1CLKSOURCE_SYSCLK)
595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if LPUART1 clock selection is LSE */
599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_LPUART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSERDY)))
600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clock not enabled for LPUART1*/
604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = 0U;
607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C1:
611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the current I2C1 source */
613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C1_SOURCE();
563 .loc 1 613 0
564 001c 9E4B ldr r3, .L125
565 001e DB6C ldr r3, [r3, #76]
566 0020 C022 movs r2, #192
567 0022 9201 lsls r2, r2, #6
568 0024 1340 ands r3, r2
569 .LVL35:
614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if I2C1 clock selection is PCLK1 */
ARM GAS /tmp/cc4UWnQP.s page 22
616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (srcclk == RCC_I2C1CLKSOURCE_PCLK1)
570 .loc 1 616 0
571 0026 00D1 bne .LCB545
572 0028 02E1 b .L99 @long jump
573 .LCB545:
617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C1 clock selection is HSI */
621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
574 .loc 1 621 0
575 002a 8022 movs r2, #128
576 002c 9201 lsls r2, r2, #6
577 002e 9342 cmp r3, r2
578 0030 00D1 bne .LCB549
579 0032 00E1 b .L100 @long jump
580 .LCB549:
581 .L70:
622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if I2C1 clock selection is SYSCLK */
626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK)
582 .loc 1 626 0
583 0034 8022 movs r2, #128
584 0036 5201 lsls r2, r2, #5
585 0038 9342 cmp r3, r2
586 003a 00D1 bne .LCB554
587 003c 02E1 b .L101 @long jump
588 .LCB554:
627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clock not enabled for I2C1*/
631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = 0U;
589 .loc 1 633 0
590 003e 0020 movs r0, #0
591 .LVL36:
592 0040 47E0 b .L40
593 .LVL37:
594 .L98:
406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
595 .loc 1 406 0
596 0042 0128 cmp r0, #1
597 0044 44D1 bne .L73
516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
598 .loc 1 516 0
599 0046 944B ldr r3, .L125
600 0048 DA6C ldr r2, [r3, #76]
601 004a 0323 movs r3, #3
602 004c 1340 ands r3, r2
603 .LVL38:
519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
604 .loc 1 519 0
605 004e 00D1 bne .LCB571
ARM GAS /tmp/cc4UWnQP.s page 23
606 0050 96E0 b .L102 @long jump
607 .LCB571:
524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
608 .loc 1 524 0
609 0052 022B cmp r3, #2
610 0054 00D1 bne .LCB573
611 0056 96E0 b .L103 @long jump
612 .LCB573:
613 .L61:
529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
614 .loc 1 529 0
615 0058 012B cmp r3, #1
616 005a 00D1 bne .LCB576
617 005c 9AE0 b .L104 @long jump
618 .LCB576:
534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
619 .loc 1 534 0
620 005e 032B cmp r3, #3
621 0060 00D1 bne .LCB578
622 0062 9AE0 b .L105 @long jump
623 .LCB578:
541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
624 .loc 1 541 0
625 0064 0020 movs r0, #0
626 .LVL39:
627 0066 34E0 b .L40
628 .LVL40:
629 .L43:
406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
630 .loc 1 406 0
631 0068 4028 cmp r0, #64
632 006a 59D0 beq .L49
633 006c 16D9 bls .L106
634 006e 8023 movs r3, #128
635 0070 5B00 lsls r3, r3, #1
636 0072 9842 cmp r0, r3
637 0074 28D1 bne .L107
634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(I2C2)
638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C2:
639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if I2C2 on APB1 clock enabled*/
642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (READ_BIT(RCC->APB1ENR, (RCC_APB1ENR_I2C2EN))==RCC_APB1ENR_I2C2EN)
643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = 0U;
649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* I2C2 */
653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
ARM GAS /tmp/cc4UWnQP.s page 24
654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(RCC_CCIPR_I2C3SEL)
655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C3:
656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the current I2C1 source */
658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C3_SOURCE();
638 .loc 1 658 0
639 0076 884B ldr r3, .L125
640 0078 DB6C ldr r3, [r3, #76]
641 007a C022 movs r2, #192
642 007c 9202 lsls r2, r2, #10
643 007e 1340 ands r3, r2
644 .LVL41:
659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if I2C3 clock selection is PCLK1 */
661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if (srcclk == RCC_I2C3CLKSOURCE_PCLK1)
645 .loc 1 661 0
646 0080 00D1 bne .LCB602
647 0082 EBE0 b .L108 @long jump
648 .LCB602:
662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C3 clock selection is HSI */
666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_I2C3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
649 .loc 1 666 0
650 0084 8022 movs r2, #128
651 0086 9202 lsls r2, r2, #10
652 0088 9342 cmp r3, r2
653 008a 00D1 bne .LCB606
654 008c E9E0 b .L109 @long jump
655 .LCB606:
656 .L72:
667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check if I2C3 clock selection is SYSCLK */
671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C3CLKSOURCE_SYSCLK)
657 .loc 1 671 0
658 008e 8022 movs r2, #128
659 0090 5202 lsls r2, r2, #9
660 0092 9342 cmp r3, r2
661 0094 00D1 bne .LCB611
662 0096 EBE0 b .L110 @long jump
663 .LCB611:
672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clock not enabled for I2C3*/
676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = 0U;
664 .loc 1 678 0
665 0098 0020 movs r0, #0
666 .LVL42:
679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
ARM GAS /tmp/cc4UWnQP.s page 25
682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* RCC_CCIPR_I2C3SEL */
683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** default:
684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** return(frequency);
667 .loc 1 688 0
668 009a 1AE0 b .L40
669 .LVL43:
670 .L106:
406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
671 .loc 1 406 0
672 009c 2028 cmp r0, #32
673 009e 17D1 bne .L73
674 .L51:
414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
675 .loc 1 414 0
676 00a0 7D4B ldr r3, .L125
677 00a2 196D ldr r1, [r3, #80]
678 .LVL44:
417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
679 .loc 1 417 0
680 00a4 1B6D ldr r3, [r3, #80]
681 00a6 C022 movs r2, #192
682 00a8 9202 lsls r2, r2, #10
683 00aa 1340 ands r3, r2
684 .LVL45:
420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
685 .loc 1 420 0
686 00ac 8022 movs r2, #128
687 00ae 5202 lsls r2, r2, #9
688 00b0 9342 cmp r3, r2
689 00b2 0FD0 beq .L111
690 .L53:
425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
691 .loc 1 425 0
692 00b4 8022 movs r2, #128
693 00b6 9202 lsls r2, r2, #10
694 00b8 9342 cmp r3, r2
695 00ba 10D0 beq .L112
696 .L54:
430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
697 .loc 1 430 0
698 00bc C022 movs r2, #192
699 00be 9202 lsls r2, r2, #10
700 00c0 9342 cmp r3, r2
701 00c2 10D0 beq .L113
462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
702 .loc 1 462 0
703 00c4 0020 movs r0, #0
704 .LVL46:
705 00c6 04E0 b .L40
706 .LVL47:
707 .L107:
406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
708 .loc 1 406 0
ARM GAS /tmp/cc4UWnQP.s page 26
709 00c8 8023 movs r3, #128
710 00ca 1B01 lsls r3, r3, #4
711 00cc 9842 cmp r0, r3
712 00ce E7D0 beq .L51
713 .L73:
397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t srcclk = 0U;
714 .loc 1 397 0
715 00d0 0020 movs r0, #0
716 .LVL48:
717 .L40:
689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
718 .loc 1 689 0
719 @ sp needed
720 00d2 10BD pop {r4, pc}
721 .LVL49:
722 .L111:
420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
723 .loc 1 420 0 discriminator 1
724 00d4 8A05 lsls r2, r1, #22
725 00d6 EDD5 bpl .L53
422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
726 .loc 1 422 0
727 00d8 8020 movs r0, #128
728 .LVL50:
729 00da 0002 lsls r0, r0, #8
730 00dc F9E7 b .L40
731 .LVL51:
732 .L112:
425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
733 .loc 1 425 0 discriminator 1
734 00de 8A07 lsls r2, r1, #30
735 00e0 ECD5 bpl .L54
427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
736 .loc 1 427 0
737 00e2 6E48 ldr r0, .L125+4
738 .LVL52:
739 00e4 F5E7 b .L40
740 .LVL53:
741 .L113:
430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
742 .loc 1 430 0 discriminator 1
743 00e6 6C4B ldr r3, .L125
744 .LVL54:
745 00e8 1B68 ldr r3, [r3]
746 00ea 9B03 lsls r3, r3, #14
747 00ec 00D4 bmi .LCB716
748 00ee C2E0 b .L77 @long jump
749 .LCB716:
433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
750 .loc 1 433 0
751 00f0 694B ldr r3, .L125
752 00f2 1B68 ldr r3, [r3]
753 00f4 C022 movs r2, #192
754 00f6 9203 lsls r2, r2, #14
755 00f8 1340 ands r3, r2
756 .LVL55:
435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
ARM GAS /tmp/cc4UWnQP.s page 27
757 .loc 1 435 0
758 00fa 8022 movs r2, #128
759 00fc 9203 lsls r2, r2, #14
760 00fe 9342 cmp r3, r2
761 0100 00D1 bne .LCB726
762 0102 BAE0 b .L78 @long jump
763 .LCB726:
764 0104 C022 movs r2, #192
765 0106 9203 lsls r2, r2, #14
766 0108 9342 cmp r3, r2
767 010a 05D0 beq .L56
768 010c 8022 movs r2, #128
769 010e 5203 lsls r2, r2, #13
770 0110 9342 cmp r3, r2
771 0112 03D0 beq .L114
772 .LVL56:
454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
773 .loc 1 454 0
774 0114 6248 ldr r0, .L125+8
775 .LVL57:
455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
776 .loc 1 455 0
777 0116 DCE7 b .L40
778 .LVL58:
779 .L56:
439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
780 .loc 1 439 0
781 0118 6248 ldr r0, .L125+12
782 .LVL59:
783 011a DAE7 b .L40
784 .LVL60:
785 .L114:
449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
786 .loc 1 449 0
787 011c 6248 ldr r0, .L125+16
788 .LVL61:
450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
789 .loc 1 450 0
790 011e D8E7 b .L40
791 .LVL62:
792 .L49:
470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
793 .loc 1 470 0
794 0120 5D4B ldr r3, .L125
795 0122 DB6C ldr r3, [r3, #76]
796 0124 8022 movs r2, #128
797 0126 D204 lsls r2, r2, #19
798 0128 1340 ands r3, r2
799 .LVL63:
472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
800 .loc 1 472 0
801 012a 1FD1 bne .L58
472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
802 .loc 1 472 0 is_stmt 0 discriminator 1
803 012c 5A4A ldr r2, .L125
804 012e 1268 ldr r2, [r2]
805 0130 9201 lsls r2, r2, #6
ARM GAS /tmp/cc4UWnQP.s page 28
806 0132 1BD5 bpl .L58
475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
807 .loc 1 475 0 is_stmt 1
808 0134 584B ldr r3, .L125
809 .LVL64:
810 0136 D868 ldr r0, [r3, #12]
811 .LVL65:
476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)];
812 .loc 1 476 0
813 0138 D968 ldr r1, [r3, #12]
814 .LVL66:
477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** plldiv = (plldiv >> RCC_CFGR_PLLDIV_Pos) + 1U;
815 .loc 1 477 0
816 013a 800C lsrs r0, r0, #18
817 .LVL67:
818 013c 0F22 movs r2, #15
819 013e 0240 ands r2, r0
820 0140 5A48 ldr r0, .L125+20
821 0142 805C ldrb r0, [r0, r2]
822 .LVL68:
478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
823 .loc 1 478 0
824 0144 8A0D lsrs r2, r1, #22
825 0146 0321 movs r1, #3
826 .LVL69:
827 0148 1140 ands r1, r2
828 014a 0131 adds r1, r1, #1
829 .LVL70:
481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
830 .loc 1 481 0
831 014c DB68 ldr r3, [r3, #12]
832 014e DB03 lsls r3, r3, #15
833 0150 07D4 bmi .L79
483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
834 .loc 1 483 0
835 0152 514B ldr r3, .L125
836 0154 1B68 ldr r3, [r3]
837 0156 DB06 lsls r3, r3, #27
838 0158 01D4 bmi .L115
489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
839 .loc 1 489 0
840 015a 554B ldr r3, .L125+24
841 015c 02E0 b .L59
842 .L115:
485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
843 .loc 1 485 0
844 015e 504B ldr r3, .L125+8
845 0160 00E0 b .L59
846 .L79:
494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
847 .loc 1 494 0
848 0162 544B ldr r3, .L125+28
849 .L59:
850 .LVL71:
497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** frequency = (pllvco/ plldiv);
851 .loc 1 497 0
852 0164 5843 muls r0, r3
ARM GAS /tmp/cc4UWnQP.s page 29
853 .LVL72:
498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
854 .loc 1 498 0
855 0166 FFF7FEFF bl __aeabi_uidiv
856 .LVL73:
857 016a B2E7 b .L40
858 .LVL74:
859 .L58:
501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
860 .loc 1 501 0
861 016c 002B cmp r3, #0
862 016e 00D1 bne .LCB841
863 0170 85E0 b .L81 @long jump
864 .LCB841:
501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
865 .loc 1 501 0 is_stmt 0 discriminator 1
866 0172 494B ldr r3, .L125
867 .LVL75:
868 0174 9B68 ldr r3, [r3, #8]
869 0176 9B07 lsls r3, r3, #30
870 0178 00D5 bpl .LCB848
871 017a 82E0 b .L82 @long jump
872 .LCB848:
507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
873 .loc 1 507 0 is_stmt 1
874 017c 0020 movs r0, #0
875 .LVL76:
876 017e A8E7 b .L40
877 .LVL77:
878 .L102:
521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
879 .loc 1 521 0
880 0180 FFF7FEFF bl HAL_RCC_GetPCLK2Freq
881 .LVL78:
882 0184 A5E7 b .L40
883 .LVL79:
884 .L103:
524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
885 .loc 1 524 0 discriminator 1
886 0186 444A ldr r2, .L125
887 0188 1268 ldr r2, [r2]
888 018a 5207 lsls r2, r2, #29
889 018c 00D4 bmi .LCB874
890 018e 63E7 b .L61 @long jump
891 .LCB874:
526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
892 .loc 1 526 0
893 0190 4748 ldr r0, .L125+24
894 .LVL80:
895 0192 9EE7 b .L40
896 .LVL81:
897 .L104:
531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
898 .loc 1 531 0
899 0194 FFF7FEFF bl HAL_RCC_GetSysClockFreq
900 .LVL82:
901 0198 9BE7 b .L40
ARM GAS /tmp/cc4UWnQP.s page 30
902 .LVL83:
903 .L105:
534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
904 .loc 1 534 0 discriminator 1
905 019a 3F4B ldr r3, .L125
906 .LVL84:
907 019c 1B6D ldr r3, [r3, #80]
908 019e 9B05 lsls r3, r3, #22
909 01a0 71D4 bmi .L85
541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
910 .loc 1 541 0
911 01a2 0020 movs r0, #0
912 .LVL85:
913 01a4 95E7 b .L40
914 .LVL86:
915 .L44:
549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
916 .loc 1 549 0
917 01a6 3C4B ldr r3, .L125
918 01a8 DA6C ldr r2, [r3, #76]
919 01aa 0C23 movs r3, #12
920 01ac 1340 ands r3, r2
921 .LVL87:
552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
922 .loc 1 552 0
923 01ae 07D0 beq .L116
557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
924 .loc 1 557 0
925 01b0 082B cmp r3, #8
926 01b2 08D0 beq .L117
927 .L64:
562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
928 .loc 1 562 0
929 01b4 042B cmp r3, #4
930 01b6 0CD0 beq .L118
567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
931 .loc 1 567 0
932 01b8 0C2B cmp r3, #12
933 01ba 0DD0 beq .L119
574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
934 .loc 1 574 0
935 01bc 0020 movs r0, #0
936 .LVL88:
937 01be 88E7 b .L40
938 .LVL89:
939 .L116:
554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
940 .loc 1 554 0
941 01c0 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
942 .LVL90:
943 01c4 85E7 b .L40
944 .LVL91:
945 .L117:
557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
946 .loc 1 557 0 discriminator 1
947 01c6 344A ldr r2, .L125
948 01c8 1268 ldr r2, [r2]
ARM GAS /tmp/cc4UWnQP.s page 31
949 01ca 5207 lsls r2, r2, #29
950 01cc F2D5 bpl .L64
559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
951 .loc 1 559 0
952 01ce 3848 ldr r0, .L125+24
953 .LVL92:
954 01d0 7FE7 b .L40
955 .LVL93:
956 .L118:
564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
957 .loc 1 564 0
958 01d2 FFF7FEFF bl HAL_RCC_GetSysClockFreq
959 .LVL94:
960 01d6 7CE7 b .L40
961 .LVL95:
962 .L119:
567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
963 .loc 1 567 0 discriminator 1
964 01d8 2F4B ldr r3, .L125
965 .LVL96:
966 01da 1B6D ldr r3, [r3, #80]
967 01dc 9B05 lsls r3, r3, #22
968 01de 55D4 bmi .L88
574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
969 .loc 1 574 0
970 01e0 0020 movs r0, #0
971 .LVL97:
972 01e2 76E7 b .L40
973 .LVL98:
974 .L47:
581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
975 .loc 1 581 0
976 01e4 2C4B ldr r3, .L125
977 01e6 DB6C ldr r3, [r3, #76]
978 01e8 C022 movs r2, #192
979 01ea 1201 lsls r2, r2, #4
980 01ec 1340 ands r3, r2
981 .LVL99:
584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
982 .loc 1 584 0
983 01ee 0DD0 beq .L120
589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
984 .loc 1 589 0
985 01f0 8022 movs r2, #128
986 01f2 1201 lsls r2, r2, #4
987 01f4 9342 cmp r3, r2
988 01f6 0CD0 beq .L121
989 .L67:
594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
990 .loc 1 594 0
991 01f8 8022 movs r2, #128
992 01fa D200 lsls r2, r2, #3
993 01fc 9342 cmp r3, r2
994 01fe 0ED0 beq .L122
599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
995 .loc 1 599 0
996 0200 C022 movs r2, #192
ARM GAS /tmp/cc4UWnQP.s page 32
997 0202 1201 lsls r2, r2, #4
998 0204 9342 cmp r3, r2
999 0206 0DD0 beq .L123
606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1000 .loc 1 606 0
1001 0208 0020 movs r0, #0
1002 .LVL100:
1003 020a 62E7 b .L40
1004 .LVL101:
1005 .L120:
586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1006 .loc 1 586 0
1007 020c FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1008 .LVL102:
1009 0210 5FE7 b .L40
1010 .LVL103:
1011 .L121:
589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1012 .loc 1 589 0 discriminator 1
1013 0212 214A ldr r2, .L125
1014 0214 1268 ldr r2, [r2]
1015 0216 5207 lsls r2, r2, #29
1016 0218 EED5 bpl .L67
591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1017 .loc 1 591 0
1018 021a 2548 ldr r0, .L125+24
1019 .LVL104:
1020 021c 59E7 b .L40
1021 .LVL105:
1022 .L122:
596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1023 .loc 1 596 0
1024 021e FFF7FEFF bl HAL_RCC_GetSysClockFreq
1025 .LVL106:
1026 0222 56E7 b .L40
1027 .LVL107:
1028 .L123:
599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1029 .loc 1 599 0 discriminator 1
1030 0224 1C4B ldr r3, .L125
1031 .LVL108:
1032 0226 1B6D ldr r3, [r3, #80]
1033 0228 9B05 lsls r3, r3, #22
1034 022a 32D4 bmi .L91
606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1035 .loc 1 606 0
1036 022c 0020 movs r0, #0
1037 .LVL109:
1038 022e 50E7 b .L40
1039 .LVL110:
1040 .L99:
618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1041 .loc 1 618 0
1042 0230 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1043 .LVL111:
1044 0234 4DE7 b .L40
1045 .LVL112:
ARM GAS /tmp/cc4UWnQP.s page 33
1046 .L100:
621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1047 .loc 1 621 0 discriminator 1
1048 0236 184A ldr r2, .L125
1049 0238 1268 ldr r2, [r2]
1050 023a 5207 lsls r2, r2, #29
1051 023c 00D4 bmi .LCB1079
1052 023e F9E6 b .L70 @long jump
1053 .LCB1079:
623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1054 .loc 1 623 0
1055 0240 1B48 ldr r0, .L125+24
1056 .LVL113:
1057 0242 46E7 b .L40
1058 .LVL114:
1059 .L101:
628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1060 .loc 1 628 0
1061 0244 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1062 .LVL115:
1063 0248 43E7 b .L40
1064 .LVL116:
1065 .L42:
642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1066 .loc 1 642 0
1067 024a 134B ldr r3, .L125
1068 024c 9B6B ldr r3, [r3, #56]
1069 024e 5B02 lsls r3, r3, #9
1070 0250 01D4 bmi .L124
648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1071 .loc 1 648 0
1072 0252 0020 movs r0, #0
1073 .LVL117:
1074 0254 3DE7 b .L40
1075 .LVL118:
1076 .L124:
644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1077 .loc 1 644 0
1078 0256 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1079 .LVL119:
1080 025a 3AE7 b .L40
1081 .LVL120:
1082 .L108:
663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1083 .loc 1 663 0
1084 025c FFF7FEFF bl HAL_RCC_GetPCLK1Freq
1085 .LVL121:
1086 0260 37E7 b .L40
1087 .LVL122:
1088 .L109:
666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1089 .loc 1 666 0 discriminator 1
1090 0262 0D4A ldr r2, .L125
1091 0264 1268 ldr r2, [r2]
1092 0266 5207 lsls r2, r2, #29
1093 0268 00D4 bmi .LCB1140
1094 026a 10E7 b .L72 @long jump
ARM GAS /tmp/cc4UWnQP.s page 34
1095 .LCB1140:
668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1096 .loc 1 668 0
1097 026c 1048 ldr r0, .L125+24
1098 .LVL123:
1099 026e 30E7 b .L40
1100 .LVL124:
1101 .L110:
673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1102 .loc 1 673 0
1103 0270 FFF7FEFF bl HAL_RCC_GetSysClockFreq
1104 .LVL125:
1105 0274 2DE7 b .L40
1106 .LVL126:
1107 .L77:
462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1108 .loc 1 462 0
1109 0276 0020 movs r0, #0
1110 .LVL127:
1111 0278 2BE7 b .L40
1112 .LVL128:
1113 .L78:
444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** break;
1114 .loc 1 444 0
1115 027a 0F48 ldr r0, .L125+32
1116 .LVL129:
1117 027c 29E7 b .L40
1118 .LVL130:
1119 .L81:
507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1120 .loc 1 507 0
1121 027e 0020 movs r0, #0
1122 .LVL131:
1123 0280 27E7 b .L40
1124 .LVL132:
1125 .L82:
503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1126 .loc 1 503 0
1127 0282 0E48 ldr r0, .L125+36
1128 .LVL133:
1129 0284 25E7 b .L40
1130 .LVL134:
1131 .L85:
536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1132 .loc 1 536 0
1133 0286 8020 movs r0, #128
1134 .LVL135:
1135 0288 0002 lsls r0, r0, #8
1136 028a 22E7 b .L40
1137 .LVL136:
1138 .L88:
569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1139 .loc 1 569 0
1140 028c 8020 movs r0, #128
1141 .LVL137:
1142 028e 0002 lsls r0, r0, #8
1143 0290 1FE7 b .L40
ARM GAS /tmp/cc4UWnQP.s page 35
1144 .LVL138:
1145 .L91:
601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1146 .loc 1 601 0
1147 0292 8020 movs r0, #128
1148 .LVL139:
1149 0294 0002 lsls r0, r0, #8
1150 0296 1CE7 b .L40
1151 .L126:
1152 .align 2
1153 .L125:
1154 0298 00100240 .word 1073876992
1155 029c 88900000 .word 37000
1156 02a0 00093D00 .word 4000000
1157 02a4 20A10700 .word 500000
1158 02a8 80841E00 .word 2000000
1159 02ac 00000000 .word PLLMulTable
1160 02b0 0024F400 .word 16000000
1161 02b4 00127A00 .word 8000000
1162 02b8 40420F00 .word 1000000
1163 02bc 006CDC02 .word 48000000
1164 .cfi_endproc
1165 .LFE41:
1167 .section .text.HAL_RCCEx_EnableLSECSS,"ax",%progbits
1168 .align 1
1169 .global HAL_RCCEx_EnableLSECSS
1170 .syntax unified
1171 .code 16
1172 .thumb_func
1173 .fpu softvfp
1175 HAL_RCCEx_EnableLSECSS:
1176 .LFB42:
690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Enables the LSE Clock Security System.
693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_EnableLSECSS(void)
696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1177 .loc 1 696 0
1178 .cfi_startproc
1179 @ args = 0, pretend = 0, frame = 0
1180 @ frame_needed = 0, uses_anonymous_args = 0
1181 @ link register save eliminated.
697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** SET_BIT(RCC->CSR, RCC_CSR_LSECSSON) ;
1182 .loc 1 697 0
1183 0000 034A ldr r2, .L128
1184 0002 116D ldr r1, [r2, #80]
1185 0004 8023 movs r3, #128
1186 0006 9B01 lsls r3, r3, #6
1187 0008 0B43 orrs r3, r1
1188 000a 1365 str r3, [r2, #80]
698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1189 .loc 1 698 0
1190 @ sp needed
1191 000c 7047 bx lr
1192 .L129:
ARM GAS /tmp/cc4UWnQP.s page 36
1193 000e C046 .align 2
1194 .L128:
1195 0010 00100240 .word 1073876992
1196 .cfi_endproc
1197 .LFE42:
1199 .section .text.HAL_RCCEx_DisableLSECSS,"ax",%progbits
1200 .align 1
1201 .global HAL_RCCEx_DisableLSECSS
1202 .syntax unified
1203 .code 16
1204 .thumb_func
1205 .fpu softvfp
1207 HAL_RCCEx_DisableLSECSS:
1208 .LFB43:
699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Disables the LSE Clock Security System.
702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @note Once enabled this bit cannot be disabled, except after an LSE failure detection
703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * (LSECSSD=1). In that case the software MUST disable the LSECSSON bit.
704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * Reset by power on reset and RTC software reset (RTCRST bit).
705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_DisableLSECSS(void)
708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1209 .loc 1 708 0
1210 .cfi_startproc
1211 @ args = 0, pretend = 0, frame = 0
1212 @ frame_needed = 0, uses_anonymous_args = 0
1213 @ link register save eliminated.
709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Disable LSE CSS */
710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** CLEAR_BIT(RCC->CSR, RCC_CSR_LSECSSON) ;
1214 .loc 1 710 0
1215 0000 044B ldr r3, .L131
1216 0002 1A6D ldr r2, [r3, #80]
1217 0004 0449 ldr r1, .L131+4
1218 0006 0A40 ands r2, r1
1219 0008 1A65 str r2, [r3, #80]
711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Disable LSE CSS IT */
713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_DISABLE_IT(RCC_IT_LSECSS);
1220 .loc 1 713 0
1221 000a 1A69 ldr r2, [r3, #16]
1222 000c 8021 movs r1, #128
1223 000e 8A43 bics r2, r1
1224 0010 1A61 str r2, [r3, #16]
714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1225 .loc 1 714 0
1226 @ sp needed
1227 0012 7047 bx lr
1228 .L132:
1229 .align 2
1230 .L131:
1231 0014 00100240 .word 1073876992
1232 0018 FFDFFFFF .word -8193
1233 .cfi_endproc
1234 .LFE43:
1236 .section .text.HAL_RCCEx_EnableLSECSS_IT,"ax",%progbits
ARM GAS /tmp/cc4UWnQP.s page 37
1237 .align 1
1238 .global HAL_RCCEx_EnableLSECSS_IT
1239 .syntax unified
1240 .code 16
1241 .thumb_func
1242 .fpu softvfp
1244 HAL_RCCEx_EnableLSECSS_IT:
1245 .LFB44:
715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Enable the LSE Clock Security System IT & corresponding EXTI line.
718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @note LSE Clock Security System IT is mapped on RTC EXTI line 19
719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_EnableLSECSS_IT(void)
722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1246 .loc 1 722 0
1247 .cfi_startproc
1248 @ args = 0, pretend = 0, frame = 0
1249 @ frame_needed = 0, uses_anonymous_args = 0
1250 @ link register save eliminated.
723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Enable LSE CSS */
724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** SET_BIT(RCC->CSR, RCC_CSR_LSECSSON) ;
1251 .loc 1 724 0
1252 0000 094B ldr r3, .L134
1253 0002 196D ldr r1, [r3, #80]
1254 0004 8022 movs r2, #128
1255 0006 9201 lsls r2, r2, #6
1256 0008 0A43 orrs r2, r1
1257 000a 1A65 str r2, [r3, #80]
725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Enable LSE CSS IT */
727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_ENABLE_IT(RCC_IT_LSECSS);
1258 .loc 1 727 0
1259 000c 1A69 ldr r2, [r3, #16]
1260 000e 8021 movs r1, #128
1261 0010 0A43 orrs r2, r1
1262 0012 1A61 str r2, [r3, #16]
728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Enable IT on EXTI Line 19 */
730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_LSECSS_EXTI_ENABLE_IT();
1263 .loc 1 730 0
1264 0014 054B ldr r3, .L134+4
1265 0016 1968 ldr r1, [r3]
1266 0018 8022 movs r2, #128
1267 001a 1203 lsls r2, r2, #12
1268 001c 1143 orrs r1, r2
1269 001e 1960 str r1, [r3]
731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE();
1270 .loc 1 731 0
1271 0020 9968 ldr r1, [r3, #8]
1272 0022 0A43 orrs r2, r1
1273 0024 9A60 str r2, [r3, #8]
732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1274 .loc 1 732 0
1275 @ sp needed
1276 0026 7047 bx lr
ARM GAS /tmp/cc4UWnQP.s page 38
1277 .L135:
1278 .align 2
1279 .L134:
1280 0028 00100240 .word 1073876992
1281 002c 00040140 .word 1073808384
1282 .cfi_endproc
1283 .LFE44:
1285 .section .text.HAL_RCCEx_LSECSS_Callback,"ax",%progbits
1286 .align 1
1287 .weak HAL_RCCEx_LSECSS_Callback
1288 .syntax unified
1289 .code 16
1290 .thumb_func
1291 .fpu softvfp
1293 HAL_RCCEx_LSECSS_Callback:
1294 .LFB46:
733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Handle the RCC LSE Clock Security System interrupt request.
736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_LSECSS_IRQHandler(void)
739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check RCC LSE CSSF flag */
741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(__HAL_RCC_GET_IT(RCC_IT_LSECSS))
742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* RCC LSE Clock Security System interrupt user callback */
744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** HAL_RCCEx_LSECSS_Callback();
745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clear RCC LSE CSS pending bit */
747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_CLEAR_IT(RCC_IT_LSECSS);
748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief RCCEx LSE Clock Security System interrupt callback.
753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval none
754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_LSECSS_Callback(void)
756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1295 .loc 1 756 0
1296 .cfi_startproc
1297 @ args = 0, pretend = 0, frame = 0
1298 @ frame_needed = 0, uses_anonymous_args = 0
1299 @ link register save eliminated.
757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_LSECSS_Callback should be implemented in the user file
759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1300 .loc 1 760 0
1301 @ sp needed
1302 0000 7047 bx lr
1303 .cfi_endproc
1304 .LFE46:
1306 .section .text.HAL_RCCEx_LSECSS_IRQHandler,"ax",%progbits
1307 .align 1
1308 .global HAL_RCCEx_LSECSS_IRQHandler
ARM GAS /tmp/cc4UWnQP.s page 39
1309 .syntax unified
1310 .code 16
1311 .thumb_func
1312 .fpu softvfp
1314 HAL_RCCEx_LSECSS_IRQHandler:
1315 .LFB45:
739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check RCC LSE CSSF flag */
1316 .loc 1 739 0
1317 .cfi_startproc
1318 @ args = 0, pretend = 0, frame = 0
1319 @ frame_needed = 0, uses_anonymous_args = 0
1320 0000 10B5 push {r4, lr}
1321 .LCFI3:
1322 .cfi_def_cfa_offset 8
1323 .cfi_offset 4, -8
1324 .cfi_offset 14, -4
741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1325 .loc 1 741 0
1326 0002 054B ldr r3, .L140
1327 0004 5B69 ldr r3, [r3, #20]
1328 0006 1B06 lsls r3, r3, #24
1329 0008 00D4 bmi .L139
1330 .L137:
749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1331 .loc 1 749 0
1332 @ sp needed
1333 000a 10BD pop {r4, pc}
1334 .L139:
744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1335 .loc 1 744 0
1336 000c FFF7FEFF bl HAL_RCCEx_LSECSS_Callback
1337 .LVL140:
747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1338 .loc 1 747 0
1339 0010 014B ldr r3, .L140
1340 0012 8022 movs r2, #128
1341 0014 9A61 str r2, [r3, #24]
749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1342 .loc 1 749 0
1343 0016 F8E7 b .L137
1344 .L141:
1345 .align 2
1346 .L140:
1347 0018 00100240 .word 1073876992
1348 .cfi_endproc
1349 .LFE45:
1351 .section .text.HAL_RCCEx_EnableHSI48_VREFINT,"ax",%progbits
1352 .align 1
1353 .global HAL_RCCEx_EnableHSI48_VREFINT
1354 .syntax unified
1355 .code 16
1356 .thumb_func
1357 .fpu softvfp
1359 HAL_RCCEx_EnableHSI48_VREFINT:
1360 .LFB47:
761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined(SYSCFG_CFGR3_ENREF_HSI48)
ARM GAS /tmp/cc4UWnQP.s page 40
763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Enables Vrefint for the HSI48.
765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @note This is functional only if the LOCK is not set
766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_EnableHSI48_VREFINT(void)
769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1361 .loc 1 769 0
1362 .cfi_startproc
1363 @ args = 0, pretend = 0, frame = 0
1364 @ frame_needed = 0, uses_anonymous_args = 0
1365 @ link register save eliminated.
770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Enable the Buffer for the ADC by setting SYSCFG_CFGR3_ENREF_HSI48 bit in SYSCFG_CFGR3 register
771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** SET_BIT (SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
1366 .loc 1 771 0
1367 0000 034A ldr r2, .L143
1368 0002 116A ldr r1, [r2, #32]
1369 0004 8023 movs r3, #128
1370 0006 9B01 lsls r3, r3, #6
1371 0008 0B43 orrs r3, r1
1372 000a 1362 str r3, [r2, #32]
772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1373 .loc 1 772 0
1374 @ sp needed
1375 000c 7047 bx lr
1376 .L144:
1377 000e C046 .align 2
1378 .L143:
1379 0010 00000140 .word 1073807360
1380 .cfi_endproc
1381 .LFE47:
1383 .section .text.HAL_RCCEx_DisableHSI48_VREFINT,"ax",%progbits
1384 .align 1
1385 .global HAL_RCCEx_DisableHSI48_VREFINT
1386 .syntax unified
1387 .code 16
1388 .thumb_func
1389 .fpu softvfp
1391 HAL_RCCEx_DisableHSI48_VREFINT:
1392 .LFB48:
773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Disables the Vrefint for the HSI48.
776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @note This is functional only if the LOCK is not set
777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_DisableHSI48_VREFINT(void)
780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1393 .loc 1 780 0
1394 .cfi_startproc
1395 @ args = 0, pretend = 0, frame = 0
1396 @ frame_needed = 0, uses_anonymous_args = 0
1397 @ link register save eliminated.
781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Disable the Vrefint by resetting SYSCFG_CFGR3_ENREF_HSI48 bit in SYSCFG_CFGR3 register */
782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
1398 .loc 1 782 0
1399 0000 024A ldr r2, .L146
ARM GAS /tmp/cc4UWnQP.s page 41
1400 0002 136A ldr r3, [r2, #32]
1401 0004 0249 ldr r1, .L146+4
1402 0006 0B40 ands r3, r1
1403 0008 1362 str r3, [r2, #32]
783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1404 .loc 1 783 0
1405 @ sp needed
1406 000a 7047 bx lr
1407 .L147:
1408 .align 2
1409 .L146:
1410 000c 00000140 .word 1073807360
1411 0010 FFDFFFFF .word -8193
1412 .cfi_endproc
1413 .LFE48:
1415 .section .text.HAL_RCCEx_CRSConfig,"ax",%progbits
1416 .align 1
1417 .global HAL_RCCEx_CRSConfig
1418 .syntax unified
1419 .code 16
1420 .thumb_func
1421 .fpu softvfp
1423 HAL_RCCEx_CRSConfig:
1424 .LFB49:
784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #endif /* SYSCFG_CFGR3_ENREF_HSI48 */
786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @}
789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** #if defined (CRS)
792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions
794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Extended Clock Recovery System Control functions
795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** *
796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** @verbatim
797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ===============================================================================
798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ##### Extended Clock Recovery System Control functions #####
799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** ===============================================================================
800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** [..]
801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** For devices with Clock Recovery System feature (CRS), RCC Extention HAL driver can be used as
802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (#) In System clock config, HSI48 needs to be enabled
804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (#) Enable CRS clock in IP MSP init which will use CRS functions
806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (#) Call CRS functions as follows:
808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (##) Prepare synchronization configuration necessary for HSI48 calibration
809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) Default values can be set for frequency Error Measurement (reload and error lim
810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** and also HSI48 oscillator smooth trimming.
811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) Macro @ref __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate
812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** directly reload value with target and synchronization frequencies values
813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (##) Call function @ref HAL_RCCEx_CRSConfig which
814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) Reset CRS registers to their default values.
815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) Configure CRS registers with synchronization configuration
816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) Enable automatic calibration and frequency error counter feature
ARM GAS /tmp/cc4UWnQP.s page 42
817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the
818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** periodic USB SOF will not be generated by the host. No SYNC signal will therefore be
819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock
820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs
821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** should be used as SYNC signal.
822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (##) A polling function is provided to wait for complete synchronization
824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) Call function @ref HAL_RCCEx_CRSWaitSynchronization()
825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) According to CRS status, user can decide to adjust again the calibration or con
826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** application if synchronization is OK
827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (#) User can retrieve information related to synchronization in calling function
829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** @ref HAL_RCCEx_CRSGetSynchronizationInfo()
830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (#) Regarding synchronization status and synchronization information, user can try a new cali
832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** in changing synchronization configuration and call again HAL_RCCEx_CRSConfig.
833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** Note: When the SYNC event is detected during the downcounting phase (before reaching the
834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** it means that the actual frequency is lower than the target (and so, that the TRIM value
835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** incremented), while when it is detected during the upcounting phase it means that the ac
836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** is higher (and that the TRIM value should be decremented).
837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interr
839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** through CRS Handler (RCC_IRQn/RCC_IRQHandler)
840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (++) Call function @ref HAL_RCCEx_CRSConfig()
841:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (++) Enable RCC_IRQn (thanks to NVIC functions)
842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (++) Enable CRS interrupt (@ref __HAL_RCC_CRS_ENABLE_IT)
843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (++) Implement CRS status management in the following user callbacks called from
844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_IRQHandler():
845:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_SyncOkCallback()
846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_SyncWarnCallback()
847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_ExpectedSyncCallback()
848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_ErrorCallback()
849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** (#) To force a SYNC EVENT, user can use the function @ref HAL_RCCEx_CRSSoftwareSynchronizatio
851:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** This function can be called before calling @ref HAL_RCCEx_CRSConfig (for instance in Syst
852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** @endverbatim
854:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @{
855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
857:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Start automatic synchronization for polling mode
859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @param pInit Pointer on RCC_CRSInitTypeDef structure
860:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
861:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit)
863:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1425 .loc 1 863 0
1426 .cfi_startproc
1427 @ args = 0, pretend = 0, frame = 0
1428 @ frame_needed = 0, uses_anonymous_args = 0
1429 @ link register save eliminated.
1430 .LVL141:
864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t value = 0;
865:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
866:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check the parameters */
867:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler));
ARM GAS /tmp/cc4UWnQP.s page 43
868:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source));
869:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity));
870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue));
871:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue));
872:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue));
873:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
874:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* CONFIGURATION */
875:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Before configuration, reset CRS registers to their default values*/
877:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_FORCE_RESET();
1431 .loc 1 877 0
1432 0000 104B ldr r3, .L149
1433 0002 996A ldr r1, [r3, #40]
1434 0004 8022 movs r2, #128
1435 0006 1205 lsls r2, r2, #20
1436 0008 0A43 orrs r2, r1
1437 000a 9A62 str r2, [r3, #40]
878:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_RELEASE_RESET();
1438 .loc 1 878 0
1439 000c 9A6A ldr r2, [r3, #40]
1440 000e 0E49 ldr r1, .L149+4
1441 0010 0A40 ands r2, r1
1442 0012 9A62 str r2, [r3, #40]
879:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
880:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Set the SYNCDIV[2:0] bits according to Prescaler value */
881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Set the SYNCSRC[1:0] bits according to Source value */
882:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Set the SYNCSPOL bit according to Polarity value */
883:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** value = (pInit->Prescaler | pInit->Source | pInit->Polarity);
1443 .loc 1 883 0
1444 0014 0268 ldr r2, [r0]
1445 0016 4368 ldr r3, [r0, #4]
1446 0018 1A43 orrs r2, r3
1447 001a 8368 ldr r3, [r0, #8]
1448 001c 1A43 orrs r2, r3
1449 .LVL142:
884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Set the RELOAD[15:0] bits according to ReloadValue value */
885:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** value |= pInit->ReloadValue;
1450 .loc 1 885 0
1451 001e C368 ldr r3, [r0, #12]
1452 0020 1343 orrs r3, r2
1453 .LVL143:
886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Set the FELIM[7:0] bits according to ErrorLimitValue value */
887:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_BITNUMBER);
1454 .loc 1 887 0
1455 0022 0269 ldr r2, [r0, #16]
1456 0024 1204 lsls r2, r2, #16
1457 0026 1A43 orrs r2, r3
1458 .LVL144:
888:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** WRITE_REG(CRS->CFGR, value);
1459 .loc 1 888 0
1460 0028 084B ldr r3, .L149+8
1461 002a 5A60 str r2, [r3, #4]
889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
890:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Adjust HSI48 oscillator smooth trimming */
891:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */
892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_BITNUMBER));
1462 .loc 1 892 0
ARM GAS /tmp/cc4UWnQP.s page 44
1463 002c 1A68 ldr r2, [r3]
1464 .LVL145:
1465 002e 0849 ldr r1, .L149+12
1466 0030 0A40 ands r2, r1
1467 0032 4169 ldr r1, [r0, #20]
1468 0034 0902 lsls r1, r1, #8
1469 0036 0A43 orrs r2, r1
1470 0038 1A60 str r2, [r3]
1471 .LVL146:
893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* START AUTOMATIC SYNCHRONIZATION*/
895:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Enable Automatic trimming & Frequency error counter */
897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN);
1472 .loc 1 897 0
1473 003a 1A68 ldr r2, [r3]
1474 003c 6021 movs r1, #96
1475 003e 0A43 orrs r2, r1
1476 0040 1A60 str r2, [r3]
898:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1477 .loc 1 898 0
1478 @ sp needed
1479 0042 7047 bx lr
1480 .L150:
1481 .align 2
1482 .L149:
1483 0044 00100240 .word 1073876992
1484 0048 FFFFFFF7 .word -134217729
1485 004c 006C0040 .word 1073769472
1486 0050 FFC0FFFF .word -16129
1487 .cfi_endproc
1488 .LFE49:
1490 .section .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate,"ax",%progbits
1491 .align 1
1492 .global HAL_RCCEx_CRSSoftwareSynchronizationGenerate
1493 .syntax unified
1494 .code 16
1495 .thumb_func
1496 .fpu softvfp
1498 HAL_RCCEx_CRSSoftwareSynchronizationGenerate:
1499 .LFB50:
899:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
900:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Generate the software synchronization event
902:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
903:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void)
905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1500 .loc 1 905 0
1501 .cfi_startproc
1502 @ args = 0, pretend = 0, frame = 0
1503 @ frame_needed = 0, uses_anonymous_args = 0
1504 @ link register save eliminated.
906:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_SWSYNC);
1505 .loc 1 906 0
1506 0000 024A ldr r2, .L152
1507 0002 1368 ldr r3, [r2]
ARM GAS /tmp/cc4UWnQP.s page 45
1508 0004 8021 movs r1, #128
1509 0006 0B43 orrs r3, r1
1510 0008 1360 str r3, [r2]
907:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1511 .loc 1 907 0
1512 @ sp needed
1513 000a 7047 bx lr
1514 .L153:
1515 .align 2
1516 .L152:
1517 000c 006C0040 .word 1073769472
1518 .cfi_endproc
1519 .LFE50:
1521 .section .text.HAL_RCCEx_CRSGetSynchronizationInfo,"ax",%progbits
1522 .align 1
1523 .global HAL_RCCEx_CRSGetSynchronizationInfo
1524 .syntax unified
1525 .code 16
1526 .thumb_func
1527 .fpu softvfp
1529 HAL_RCCEx_CRSGetSynchronizationInfo:
1530 .LFB51:
908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
909:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
910:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Return synchronization info
911:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @param pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure
912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
914:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo)
915:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1531 .loc 1 915 0
1532 .cfi_startproc
1533 @ args = 0, pretend = 0, frame = 0
1534 @ frame_needed = 0, uses_anonymous_args = 0
1535 @ link register save eliminated.
1536 .LVL147:
916:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check the parameter */
917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** assert_param(pSynchroInfo != NULL);
918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
919:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get the reload value */
920:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD));
1537 .loc 1 920 0
1538 0000 094A ldr r2, .L155
1539 0002 5368 ldr r3, [r2, #4]
1540 0004 1B04 lsls r3, r3, #16
1541 0006 1B0C lsrs r3, r3, #16
1542 0008 0360 str r3, [r0]
921:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get HSI48 oscillator smooth trimming */
923:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_BI
1543 .loc 1 923 0
1544 000a 1168 ldr r1, [r2]
1545 000c 090A lsrs r1, r1, #8
1546 000e 3F23 movs r3, #63
1547 0010 0B40 ands r3, r1
1548 0012 4360 str r3, [r0, #4]
924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
ARM GAS /tmp/cc4UWnQP.s page 46
925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get Frequency error capture */
926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_BI
1549 .loc 1 926 0
1550 0014 9368 ldr r3, [r2, #8]
1551 0016 1B0C lsrs r3, r3, #16
1552 0018 8360 str r3, [r0, #8]
927:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get Frequency error direction */
929:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR));
1553 .loc 1 929 0
1554 001a 9368 ldr r3, [r2, #8]
1555 001c 8022 movs r2, #128
1556 001e 1202 lsls r2, r2, #8
1557 0020 1340 ands r3, r2
1558 0022 C360 str r3, [r0, #12]
930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1559 .loc 1 930 0
1560 @ sp needed
1561 0024 7047 bx lr
1562 .L156:
1563 0026 C046 .align 2
1564 .L155:
1565 0028 006C0040 .word 1073769472
1566 .cfi_endproc
1567 .LFE51:
1569 .section .text.HAL_RCCEx_CRSWaitSynchronization,"ax",%progbits
1570 .align 1
1571 .global HAL_RCCEx_CRSWaitSynchronization
1572 .syntax unified
1573 .code 16
1574 .thumb_func
1575 .fpu softvfp
1577 HAL_RCCEx_CRSWaitSynchronization:
1578 .LFB52:
931:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
932:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Wait for CRS Synchronization status.
934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @param Timeout Duration of the timeout
935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @note Timeout is based on the maximum time to receive a SYNC event based on synchronization
936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * frequency.
937:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @note If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned.
938:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval Combination of Synchronization status
939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values:
940:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TIMEOUT
941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCOK
942:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCWARN
943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR
944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS
945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF
946:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
947:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout)
948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1579 .loc 1 948 0
1580 .cfi_startproc
1581 @ args = 0, pretend = 0, frame = 0
1582 @ frame_needed = 0, uses_anonymous_args = 0
1583 .LVL148:
ARM GAS /tmp/cc4UWnQP.s page 47
1584 0000 70B5 push {r4, r5, r6, lr}
1585 .LCFI4:
1586 .cfi_def_cfa_offset 16
1587 .cfi_offset 4, -16
1588 .cfi_offset 5, -12
1589 .cfi_offset 6, -8
1590 .cfi_offset 14, -4
1591 0002 0500 movs r5, r0
1592 .LVL149:
949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t crsstatus = RCC_CRS_NONE;
950:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U;
951:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
952:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get timeout */
953:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
1593 .loc 1 953 0
1594 0004 FFF7FEFF bl HAL_GetTick
1595 .LVL150:
1596 0008 0600 movs r6, r0
1597 .LVL151:
949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t crsstatus = RCC_CRS_NONE;
1598 .loc 1 949 0
1599 000a 0024 movs r4, #0
1600 000c 3AE0 b .L165
1601 .LVL152:
1602 .L169:
954:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
955:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Wait for CRS flag or timeout detection */
956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** do
957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(Timeout != HAL_MAX_DELAY)
959:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
960:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
1603 .loc 1 960 0 discriminator 1
1604 000e FFF7FEFF bl HAL_GetTick
1605 .LVL153:
1606 0012 801B subs r0, r0, r6
1607 0014 A842 cmp r0, r5
1608 0016 3BD8 bhi .L167
1609 .LVL154:
1610 .L158:
961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** crsstatus = RCC_CRS_TIMEOUT;
963:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */
966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK))
1611 .loc 1 966 0
1612 0018 1F4B ldr r3, .L170
1613 001a 9B68 ldr r3, [r3, #8]
1614 001c DB07 lsls r3, r3, #31
1615 001e 04D5 bpl .L159
967:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
968:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* CRS SYNC event OK */
969:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCOK;
1616 .loc 1 969 0
1617 0020 0223 movs r3, #2
1618 0022 1C43 orrs r4, r3
ARM GAS /tmp/cc4UWnQP.s page 48
1619 .LVL155:
970:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
971:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK bit */
972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK);
1620 .loc 1 972 0
1621 0024 1C4B ldr r3, .L170
1622 0026 0122 movs r2, #1
1623 0028 DA60 str r2, [r3, #12]
1624 .L159:
973:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */
976:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN))
1625 .loc 1 976 0
1626 002a 1B4B ldr r3, .L170
1627 002c 9B68 ldr r3, [r3, #8]
1628 002e 9B07 lsls r3, r3, #30
1629 0030 04D5 bpl .L160
977:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
978:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* CRS SYNC warning */
979:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCWARN;
1630 .loc 1 979 0
1631 0032 0423 movs r3, #4
1632 0034 1C43 orrs r4, r3
1633 .LVL156:
980:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN bit */
982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN);
1634 .loc 1 982 0
1635 0036 184B ldr r3, .L170
1636 0038 0222 movs r2, #2
1637 003a DA60 str r2, [r3, #12]
1638 .L160:
983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
985:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS TRIM overflow flag */
986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF))
1639 .loc 1 986 0
1640 003c 164B ldr r3, .L170
1641 003e 9B68 ldr r3, [r3, #8]
1642 0040 5B05 lsls r3, r3, #21
1643 0042 04D5 bpl .L161
987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
988:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* CRS SYNC Error */
989:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_TRIMOVF;
1644 .loc 1 989 0
1645 0044 2023 movs r3, #32
1646 0046 1C43 orrs r4, r3
1647 .LVL157:
990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */
992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF);
1648 .loc 1 992 0
1649 0048 134B ldr r3, .L170
1650 004a 0422 movs r2, #4
1651 004c DA60 str r2, [r3, #12]
1652 .L161:
ARM GAS /tmp/cc4UWnQP.s page 49
993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
994:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS Error flag */
996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR))
1653 .loc 1 996 0
1654 004e 124B ldr r3, .L170
1655 0050 9B68 ldr r3, [r3, #8]
1656 0052 DB05 lsls r3, r3, #23
1657 0054 04D5 bpl .L162
997:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
998:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* CRS SYNC Error */
999:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCERR;
1658 .loc 1 999 0
1659 0056 0823 movs r3, #8
1660 0058 1C43 orrs r4, r3
1661 .LVL158:
1000:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1001:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */
1002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR);
1662 .loc 1 1002 0
1663 005a 0F4B ldr r3, .L170
1664 005c 0422 movs r2, #4
1665 005e DA60 str r2, [r3, #12]
1666 .L162:
1003:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS SYNC Missed flag */
1006:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS))
1667 .loc 1 1006 0
1668 0060 0D4B ldr r3, .L170
1669 0062 9B68 ldr r3, [r3, #8]
1670 0064 9B05 lsls r3, r3, #22
1671 0066 04D5 bpl .L163
1007:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1008:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* CRS SYNC Missed */
1009:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCMISS;
1672 .loc 1 1009 0
1673 0068 1023 movs r3, #16
1674 006a 1C43 orrs r4, r3
1675 .LVL159:
1010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1011:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clear CRS SYNC Missed bit */
1012:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS);
1676 .loc 1 1012 0
1677 006c 0A4B ldr r3, .L170
1678 006e 0422 movs r2, #4
1679 0070 DA60 str r2, [r3, #12]
1680 .L163:
1013:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1015:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */
1016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC))
1681 .loc 1 1016 0
1682 0072 094B ldr r3, .L170
1683 0074 9B68 ldr r3, [r3, #8]
1684 0076 1B07 lsls r3, r3, #28
1685 0078 02D5 bpl .L164
ARM GAS /tmp/cc4UWnQP.s page 50
1017:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1018:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */
1019:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC);
1686 .loc 1 1019 0 discriminator 2
1687 007a 074B ldr r3, .L170
1688 007c 0822 movs r2, #8
1689 007e DA60 str r2, [r3, #12]
1690 .L164:
1020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** } while(RCC_CRS_NONE == crsstatus);
1691 .loc 1 1021 0
1692 0080 002C cmp r4, #0
1693 0082 07D1 bne .L168
1694 .LVL160:
1695 .L165:
958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1696 .loc 1 958 0
1697 0084 6B1C adds r3, r5, #1
1698 0086 C7D0 beq .L158
960:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1699 .loc 1 960 0
1700 0088 002D cmp r5, #0
1701 008a C0D1 bne .L169
962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1702 .loc 1 962 0
1703 008c 0124 movs r4, #1
1704 .LVL161:
1705 008e C3E7 b .L158
1706 .LVL162:
1707 .L167:
1708 0090 0124 movs r4, #1
1709 .LVL163:
1710 0092 C1E7 b .L158
1711 .LVL164:
1712 .L168:
1022:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** return crsstatus;
1024:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1713 .loc 1 1024 0
1714 0094 2000 movs r0, r4
1715 @ sp needed
1716 .LVL165:
1717 .LVL166:
1718 .LVL167:
1719 0096 70BD pop {r4, r5, r6, pc}
1720 .L171:
1721 .align 2
1722 .L170:
1723 0098 006C0040 .word 1073769472
1724 .cfi_endproc
1725 .LFE52:
1727 .section .text.HAL_RCCEx_CRS_SyncOkCallback,"ax",%progbits
1728 .align 1
1729 .weak HAL_RCCEx_CRS_SyncOkCallback
1730 .syntax unified
1731 .code 16
1732 .thumb_func
ARM GAS /tmp/cc4UWnQP.s page 51
1733 .fpu softvfp
1735 HAL_RCCEx_CRS_SyncOkCallback:
1736 .LFB54:
1025:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
1027:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief Handle the Clock Recovery System interrupt request.
1028:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval None
1029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
1030:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRS_IRQHandler(void)
1031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE;
1033:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */
1034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t itflags = READ_REG(CRS->ISR);
1035:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR);
1036:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */
1038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_SYNCOK) != RESET) && ((itsources & RCC_CRS_IT_SYNCOK) != RESET))
1039:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1040:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK flag */
1041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC);
1042:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1043:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* user callback */
1044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncOkCallback();
1045:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */
1047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != RESET) && ((itsources & RCC_CRS_IT_SYNCWARN) != RES
1048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1049:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN flag */
1050:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC);
1051:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1052:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* user callback */
1053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncWarnCallback();
1054:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1055:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */
1056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_ESYNC) != RESET) && ((itsources & RCC_CRS_IT_ESYNC) != RESET))
1057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1058:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */
1059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC);
1060:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1061:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* user callback */
1062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ExpectedSyncCallback();
1063:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1064:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Check CRS Error flags */
1065:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** else
1066:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_ERR) != RESET) && ((itsources & RCC_CRS_IT_ERR) != RESET))
1068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCERR) != RESET)
1070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCERR;
1072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1073:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCMISS) != RESET)
1074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCMISS;
1076:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1077:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_TRIMOVF) != RESET)
1078:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
ARM GAS /tmp/cc4UWnQP.s page 52
1079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_TRIMOVF;
1080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1081:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1082:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Clear CRS Error flags */
1083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ERRC);
1084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1085:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* user error callback */
1086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ErrorCallback(crserror);
1087:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1091:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
1092:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCOK interrupt callback.
1093:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval none
1094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
1095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncOkCallback(void)
1096:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1737 .loc 1 1096 0
1738 .cfi_startproc
1739 @ args = 0, pretend = 0, frame = 0
1740 @ frame_needed = 0, uses_anonymous_args = 0
1741 @ link register save eliminated.
1097:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
1098:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file
1099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
1100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1742 .loc 1 1100 0
1743 @ sp needed
1744 0000 7047 bx lr
1745 .cfi_endproc
1746 .LFE54:
1748 .section .text.HAL_RCCEx_CRS_SyncWarnCallback,"ax",%progbits
1749 .align 1
1750 .weak HAL_RCCEx_CRS_SyncWarnCallback
1751 .syntax unified
1752 .code 16
1753 .thumb_func
1754 .fpu softvfp
1756 HAL_RCCEx_CRS_SyncWarnCallback:
1757 .LFB55:
1101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
1103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCWARN interrupt callback.
1104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval none
1105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
1106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncWarnCallback(void)
1107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1758 .loc 1 1107 0
1759 .cfi_startproc
1760 @ args = 0, pretend = 0, frame = 0
1761 @ frame_needed = 0, uses_anonymous_args = 0
1762 @ link register save eliminated.
1108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
1109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file
1110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
1111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
ARM GAS /tmp/cc4UWnQP.s page 53
1763 .loc 1 1111 0
1764 @ sp needed
1765 0000 7047 bx lr
1766 .cfi_endproc
1767 .LFE55:
1769 .section .text.HAL_RCCEx_CRS_ExpectedSyncCallback,"ax",%progbits
1770 .align 1
1771 .weak HAL_RCCEx_CRS_ExpectedSyncCallback
1772 .syntax unified
1773 .code 16
1774 .thumb_func
1775 .fpu softvfp
1777 HAL_RCCEx_CRS_ExpectedSyncCallback:
1778 .LFB56:
1112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
1114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Expected SYNC interrupt callback.
1115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval none
1116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
1117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void)
1118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1779 .loc 1 1118 0
1780 .cfi_startproc
1781 @ args = 0, pretend = 0, frame = 0
1782 @ frame_needed = 0, uses_anonymous_args = 0
1783 @ link register save eliminated.
1119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
1120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file
1121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
1122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1784 .loc 1 1122 0
1785 @ sp needed
1786 0000 7047 bx lr
1787 .cfi_endproc
1788 .LFE56:
1790 .section .text.HAL_RCCEx_CRS_ErrorCallback,"ax",%progbits
1791 .align 1
1792 .weak HAL_RCCEx_CRS_ErrorCallback
1793 .syntax unified
1794 .code 16
1795 .thumb_func
1796 .fpu softvfp
1798 HAL_RCCEx_CRS_ErrorCallback:
1799 .LFB57:
1123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /**
1125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Error interrupt callback.
1126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @param Error Combination of Error status.
1127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values:
1128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR
1129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS
1130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF
1131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** * @retval none
1132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
1133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error)
1134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1800 .loc 1 1134 0
ARM GAS /tmp/cc4UWnQP.s page 54
1801 .cfi_startproc
1802 @ args = 0, pretend = 0, frame = 0
1803 @ frame_needed = 0, uses_anonymous_args = 0
1804 @ link register save eliminated.
1805 .LVL168:
1135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Prevent unused argument(s) compilation warning */
1136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** UNUSED(Error);
1137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
1139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file
1140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** */
1141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1806 .loc 1 1141 0
1807 @ sp needed
1808 0000 7047 bx lr
1809 .cfi_endproc
1810 .LFE57:
1812 .section .text.HAL_RCCEx_CRS_IRQHandler,"ax",%progbits
1813 .align 1
1814 .global HAL_RCCEx_CRS_IRQHandler
1815 .syntax unified
1816 .code 16
1817 .thumb_func
1818 .fpu softvfp
1820 HAL_RCCEx_CRS_IRQHandler:
1821 .LFB53:
1031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE;
1822 .loc 1 1031 0
1823 .cfi_startproc
1824 @ args = 0, pretend = 0, frame = 0
1825 @ frame_needed = 0, uses_anonymous_args = 0
1826 0000 10B5 push {r4, lr}
1827 .LCFI5:
1828 .cfi_def_cfa_offset 8
1829 .cfi_offset 4, -8
1830 .cfi_offset 14, -4
1831 .LVL169:
1034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR);
1832 .loc 1 1034 0
1833 0002 1C4A ldr r2, .L188
1834 0004 9368 ldr r3, [r2, #8]
1835 .LVL170:
1035:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1836 .loc 1 1035 0
1837 0006 1268 ldr r2, [r2]
1838 .LVL171:
1038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1839 .loc 1 1038 0
1840 0008 D907 lsls r1, r3, #31
1841 000a 01D5 bpl .L177
1038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1842 .loc 1 1038 0 is_stmt 0 discriminator 1
1843 000c D107 lsls r1, r2, #31
1844 000e 1CD4 bmi .L185
1845 .L177:
1047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1846 .loc 1 1047 0 is_stmt 1
ARM GAS /tmp/cc4UWnQP.s page 55
1847 0010 9907 lsls r1, r3, #30
1848 0012 01D5 bpl .L179
1047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1849 .loc 1 1047 0 is_stmt 0 discriminator 1
1850 0014 9107 lsls r1, r2, #30
1851 0016 1ED4 bmi .L186
1852 .L179:
1056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1853 .loc 1 1056 0 is_stmt 1
1854 0018 1907 lsls r1, r3, #28
1855 001a 01D5 bpl .L180
1056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1856 .loc 1 1056 0 is_stmt 0 discriminator 1
1857 001c 1107 lsls r1, r2, #28
1858 001e 20D4 bmi .L187
1859 .L180:
1067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1860 .loc 1 1067 0 is_stmt 1
1861 0020 5907 lsls r1, r3, #29
1862 0022 11D5 bpl .L176
1067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1863 .loc 1 1067 0 is_stmt 0 discriminator 1
1864 0024 5207 lsls r2, r2, #29
1865 0026 0FD5 bpl .L176
1866 .LVL172:
1069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1867 .loc 1 1069 0 is_stmt 1
1868 0028 DA05 lsls r2, r3, #23
1869 002a 20D4 bmi .L184
1032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */
1870 .loc 1 1032 0
1871 002c 0020 movs r0, #0
1872 .L181:
1873 .LVL173:
1073:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1874 .loc 1 1073 0
1875 002e 9A05 lsls r2, r3, #22
1876 0030 01D5 bpl .L182
1075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1877 .loc 1 1075 0
1878 0032 1022 movs r2, #16
1879 0034 1043 orrs r0, r2
1880 .LVL174:
1881 .L182:
1077:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** {
1882 .loc 1 1077 0
1883 0036 5B05 lsls r3, r3, #21
1884 0038 01D5 bpl .L183
1885 .LVL175:
1079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1886 .loc 1 1079 0
1887 003a 2023 movs r3, #32
1888 003c 1843 orrs r0, r3
1889 .LVL176:
1890 .L183:
1083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1891 .loc 1 1083 0
ARM GAS /tmp/cc4UWnQP.s page 56
1892 003e 0D4B ldr r3, .L188
1893 0040 0422 movs r2, #4
1894 0042 DA60 str r2, [r3, #12]
1086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1895 .loc 1 1086 0
1896 0044 FFF7FEFF bl HAL_RCCEx_CRS_ErrorCallback
1897 .LVL177:
1898 .L176:
1089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1899 .loc 1 1089 0
1900 @ sp needed
1901 0048 10BD pop {r4, pc}
1902 .LVL178:
1903 .L185:
1041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1904 .loc 1 1041 0
1905 004a 0A4B ldr r3, .L188
1906 .LVL179:
1907 004c 0122 movs r2, #1
1908 .LVL180:
1909 004e DA60 str r2, [r3, #12]
1044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1910 .loc 1 1044 0
1911 0050 FFF7FEFF bl HAL_RCCEx_CRS_SyncOkCallback
1912 .LVL181:
1913 0054 F8E7 b .L176
1914 .LVL182:
1915 .L186:
1050:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1916 .loc 1 1050 0
1917 0056 074B ldr r3, .L188
1918 .LVL183:
1919 0058 0222 movs r2, #2
1920 .LVL184:
1921 005a DA60 str r2, [r3, #12]
1053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1922 .loc 1 1053 0
1923 005c FFF7FEFF bl HAL_RCCEx_CRS_SyncWarnCallback
1924 .LVL185:
1925 0060 F2E7 b .L176
1926 .LVL186:
1927 .L187:
1059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c ****
1928 .loc 1 1059 0
1929 0062 044B ldr r3, .L188
1930 .LVL187:
1931 0064 0822 movs r2, #8
1932 .LVL188:
1933 0066 DA60 str r2, [r3, #12]
1062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
1934 .loc 1 1062 0
1935 0068 FFF7FEFF bl HAL_RCCEx_CRS_ExpectedSyncCallback
1936 .LVL189:
1937 006c ECE7 b .L176
1938 .LVL190:
1939 .L184:
1071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.c **** }
ARM GAS /tmp/cc4UWnQP.s page 57
1940 .loc 1 1071 0
1941 006e 0820 movs r0, #8
1942 0070 DDE7 b .L181
1943 .L189:
1944 0072 C046 .align 2
1945 .L188:
1946 0074 006C0040 .word 1073769472
1947 .cfi_endproc
1948 .LFE53:
1950 .text
1951 .Letext0:
1952 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
1953 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
1954 .file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
1955 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
1956 .file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h"
1957 .file 7 "/usr/arm-none-eabi/include/sys/lock.h"
1958 .file 8 "/usr/arm-none-eabi/include/sys/_types.h"
1959 .file 9 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
1960 .file 10 "/usr/arm-none-eabi/include/sys/reent.h"
1961 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h"
1962 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h"
1963 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h"
1964 .file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h"
ARM GAS /tmp/cc4UWnQP.s page 58
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32l0xx_hal_rcc_ex.c
/tmp/cc4UWnQP.s:16 .text.HAL_RCCEx_PeriphCLKConfig:0000000000000000 $t
/tmp/cc4UWnQP.s:23 .text.HAL_RCCEx_PeriphCLKConfig:0000000000000000 HAL_RCCEx_PeriphCLKConfig
/tmp/cc4UWnQP.s:401 .text.HAL_RCCEx_PeriphCLKConfig:00000000000001e4 $d
/tmp/cc4UWnQP.s:416 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000000 $t
/tmp/cc4UWnQP.s:423 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000000 HAL_RCCEx_GetPeriphCLKConfig
/tmp/cc4UWnQP.s:519 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000078 $d
/tmp/cc4UWnQP.s:526 .text.HAL_RCCEx_GetPeriphCLKFreq:0000000000000000 $t
/tmp/cc4UWnQP.s:533 .text.HAL_RCCEx_GetPeriphCLKFreq:0000000000000000 HAL_RCCEx_GetPeriphCLKFreq
/tmp/cc4UWnQP.s:1154 .text.HAL_RCCEx_GetPeriphCLKFreq:0000000000000298 $d
/tmp/cc4UWnQP.s:1168 .text.HAL_RCCEx_EnableLSECSS:0000000000000000 $t
/tmp/cc4UWnQP.s:1175 .text.HAL_RCCEx_EnableLSECSS:0000000000000000 HAL_RCCEx_EnableLSECSS
/tmp/cc4UWnQP.s:1195 .text.HAL_RCCEx_EnableLSECSS:0000000000000010 $d
/tmp/cc4UWnQP.s:1200 .text.HAL_RCCEx_DisableLSECSS:0000000000000000 $t
/tmp/cc4UWnQP.s:1207 .text.HAL_RCCEx_DisableLSECSS:0000000000000000 HAL_RCCEx_DisableLSECSS
/tmp/cc4UWnQP.s:1231 .text.HAL_RCCEx_DisableLSECSS:0000000000000014 $d
/tmp/cc4UWnQP.s:1237 .text.HAL_RCCEx_EnableLSECSS_IT:0000000000000000 $t
/tmp/cc4UWnQP.s:1244 .text.HAL_RCCEx_EnableLSECSS_IT:0000000000000000 HAL_RCCEx_EnableLSECSS_IT
/tmp/cc4UWnQP.s:1280 .text.HAL_RCCEx_EnableLSECSS_IT:0000000000000028 $d
/tmp/cc4UWnQP.s:1286 .text.HAL_RCCEx_LSECSS_Callback:0000000000000000 $t
/tmp/cc4UWnQP.s:1293 .text.HAL_RCCEx_LSECSS_Callback:0000000000000000 HAL_RCCEx_LSECSS_Callback
/tmp/cc4UWnQP.s:1307 .text.HAL_RCCEx_LSECSS_IRQHandler:0000000000000000 $t
/tmp/cc4UWnQP.s:1314 .text.HAL_RCCEx_LSECSS_IRQHandler:0000000000000000 HAL_RCCEx_LSECSS_IRQHandler
/tmp/cc4UWnQP.s:1347 .text.HAL_RCCEx_LSECSS_IRQHandler:0000000000000018 $d
/tmp/cc4UWnQP.s:1352 .text.HAL_RCCEx_EnableHSI48_VREFINT:0000000000000000 $t
/tmp/cc4UWnQP.s:1359 .text.HAL_RCCEx_EnableHSI48_VREFINT:0000000000000000 HAL_RCCEx_EnableHSI48_VREFINT
/tmp/cc4UWnQP.s:1379 .text.HAL_RCCEx_EnableHSI48_VREFINT:0000000000000010 $d
/tmp/cc4UWnQP.s:1384 .text.HAL_RCCEx_DisableHSI48_VREFINT:0000000000000000 $t
/tmp/cc4UWnQP.s:1391 .text.HAL_RCCEx_DisableHSI48_VREFINT:0000000000000000 HAL_RCCEx_DisableHSI48_VREFINT
/tmp/cc4UWnQP.s:1410 .text.HAL_RCCEx_DisableHSI48_VREFINT:000000000000000c $d
/tmp/cc4UWnQP.s:1416 .text.HAL_RCCEx_CRSConfig:0000000000000000 $t
/tmp/cc4UWnQP.s:1423 .text.HAL_RCCEx_CRSConfig:0000000000000000 HAL_RCCEx_CRSConfig
/tmp/cc4UWnQP.s:1483 .text.HAL_RCCEx_CRSConfig:0000000000000044 $d
/tmp/cc4UWnQP.s:1491 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:0000000000000000 $t
/tmp/cc4UWnQP.s:1498 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:0000000000000000 HAL_RCCEx_CRSSoftwareSynchronizationGenerate
/tmp/cc4UWnQP.s:1517 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:000000000000000c $d
/tmp/cc4UWnQP.s:1522 .text.HAL_RCCEx_CRSGetSynchronizationInfo:0000000000000000 $t
/tmp/cc4UWnQP.s:1529 .text.HAL_RCCEx_CRSGetSynchronizationInfo:0000000000000000 HAL_RCCEx_CRSGetSynchronizationInfo
/tmp/cc4UWnQP.s:1565 .text.HAL_RCCEx_CRSGetSynchronizationInfo:0000000000000028 $d
/tmp/cc4UWnQP.s:1570 .text.HAL_RCCEx_CRSWaitSynchronization:0000000000000000 $t
/tmp/cc4UWnQP.s:1577 .text.HAL_RCCEx_CRSWaitSynchronization:0000000000000000 HAL_RCCEx_CRSWaitSynchronization
/tmp/cc4UWnQP.s:1723 .text.HAL_RCCEx_CRSWaitSynchronization:0000000000000098 $d
/tmp/cc4UWnQP.s:1728 .text.HAL_RCCEx_CRS_SyncOkCallback:0000000000000000 $t
/tmp/cc4UWnQP.s:1735 .text.HAL_RCCEx_CRS_SyncOkCallback:0000000000000000 HAL_RCCEx_CRS_SyncOkCallback
/tmp/cc4UWnQP.s:1749 .text.HAL_RCCEx_CRS_SyncWarnCallback:0000000000000000 $t
/tmp/cc4UWnQP.s:1756 .text.HAL_RCCEx_CRS_SyncWarnCallback:0000000000000000 HAL_RCCEx_CRS_SyncWarnCallback
/tmp/cc4UWnQP.s:1770 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:0000000000000000 $t
/tmp/cc4UWnQP.s:1777 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:0000000000000000 HAL_RCCEx_CRS_ExpectedSyncCallback
/tmp/cc4UWnQP.s:1791 .text.HAL_RCCEx_CRS_ErrorCallback:0000000000000000 $t
/tmp/cc4UWnQP.s:1798 .text.HAL_RCCEx_CRS_ErrorCallback:0000000000000000 HAL_RCCEx_CRS_ErrorCallback
/tmp/cc4UWnQP.s:1813 .text.HAL_RCCEx_CRS_IRQHandler:0000000000000000 $t
/tmp/cc4UWnQP.s:1820 .text.HAL_RCCEx_CRS_IRQHandler:0000000000000000 HAL_RCCEx_CRS_IRQHandler
/tmp/cc4UWnQP.s:1946 .text.HAL_RCCEx_CRS_IRQHandler:0000000000000074 $d
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
ARM GAS /tmp/cc4UWnQP.s page 59
HAL_GetTick
__aeabi_uidiv
HAL_RCC_GetPCLK2Freq
HAL_RCC_GetSysClockFreq
HAL_RCC_GetPCLK1Freq
PLLMulTable