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708 lines
27 KiB
708 lines
27 KiB
/**
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******************************************************************************
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* @file stm32l0xx_hal_pwr.c
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* @author MCD Application Team
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* @brief PWR HAL module driver.
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*
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* This file provides firmware functions to manage the following
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* functionalities of the Power Controller (PWR) peripheral:
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* + Initialization/de-initialization functions
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* + Peripheral Control functions
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l0xx_hal.h"
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#ifdef HAL_PWR_MODULE_ENABLED
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/** @addtogroup STM32L0xx_HAL_Driver
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* @{
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*/
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/** @addtogroup PWR
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* @{
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*/
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/** @addtogroup PWR_Private
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* @{
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*/
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/** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
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* @{
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*/
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#define PVD_MODE_IT ((uint32_t)0x00010000U)
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#define PVD_MODE_EVT ((uint32_t)0x00020000U)
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#define PVD_RISING_EDGE ((uint32_t)0x00000001U)
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#define PVD_FALLING_EDGE ((uint32_t)0x00000002U)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @addtogroup PWR_Exported_Functions
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* @{
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*/
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/** @addtogroup PWR_Exported_Functions_Group1
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* @brief Initialization and de-initialization functions
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*
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@verbatim
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===============================================================================
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##### Initialization and de-initialization functions #####
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===============================================================================
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@endverbatim
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* @{
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*/
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/**
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* @brief Deinitializes the HAL PWR peripheral registers to their default reset values.
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* @retval None
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*/
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void HAL_PWR_DeInit(void)
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{
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__HAL_RCC_PWR_FORCE_RESET();
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__HAL_RCC_PWR_RELEASE_RESET();
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}
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/**
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* @}
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*/
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/** @addtogroup PWR_Exported_Functions_Group2
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* @brief Low Power modes configuration functions
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*
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@verbatim
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===============================================================================
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##### Peripheral Control functions #####
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===============================================================================
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*** Backup domain ***
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=========================
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[..]
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After reset, the backup domain (RTC registers, RTC backup data
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registers) is protected against possible unwanted
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write accesses.
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To enable access to the RTC Domain and RTC registers, proceed as follows:
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(+) Enable the Power Controller (PWR) APB1 interface clock using the
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__HAL_RCC_PWR_CLK_ENABLE() macro.
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(+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
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*** PVD configuration ***
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=========================
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[..]
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(+) The PVD is used to monitor the VDD power supply by comparing it to a
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threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
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(+) The PVD can use an external input analog voltage (PVD_IN) which is compared
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internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode
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when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
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(+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
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than the PVD threshold. This event is internally connected to the EXTI
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line16 and can generate an interrupt if enabled. This is done through
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__HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
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(+) The PVD is stopped in Standby mode.
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*** WakeUp pin configuration ***
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================================
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[..]
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(+) WakeUp pin is used to wake up the system from Standby mode. This pin is
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forced in input pull-down configuration and is active on rising edges.
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(+) There are two WakeUp pins:
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WakeUp Pin 1 on PA.00.
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WakeUp Pin 2 on PC.13.
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WakeUp Pin 3 on PE.06 .
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[..]
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*** Main and Backup Regulators configuration ***
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================================================
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(+) The main internal regulator can be configured to have a tradeoff between
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performance and power consumption when the device does not operate at
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the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
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macro which configures the two VOS bits in PWR_CR register:
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(++) PWR_REGULATOR_VOLTAGE_SCALE1 (VOS bits = 01), the regulator voltage output Scale 1 mode selected and
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the System frequency can go up to 32 MHz.
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(++) PWR_REGULATOR_VOLTAGE_SCALE2 (VOS bits = 10), the regulator voltage output Scale 2 mode selected and
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the System frequency can go up to 16 MHz.
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(++) PWR_REGULATOR_VOLTAGE_SCALE3 (VOS bits = 11), the regulator voltage output Scale 3 mode selected and
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the System frequency can go up to 4.2 MHz.
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Refer to the datasheets for more details.
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*** Low Power modes configuration ***
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=====================================
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[..]
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The device features 5 low-power modes:
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(+) Low power run mode: regulator in low power mode, limited clock frequency,
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limited number of peripherals running.
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(+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running.
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(+) Low power sleep mode: Cortex-M0+ core stopped, limited clock frequency,
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limited number of peripherals running, regulator in low power mode.
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(+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
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(+) Standby mode: VCORE domain powered off
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*** Low power run mode ***
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=========================
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[..]
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To further reduce the consumption when the system is in Run mode, the regulator can be
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configured in low power mode. In this mode, the system frequency should not exceed
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MSI frequency range1.
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In Low power run mode, all I/O pins keep the same state as in Run mode.
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(+) Entry:
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(++) VCORE in range2
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(++) Decrease the system frequency not to exceed the frequency of MSI frequency range1.
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(++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
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function.
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(+) Exit:
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(++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
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function.
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(++) Increase the system frequency if needed.
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*** Sleep mode ***
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==================
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[..]
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(+) Entry:
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The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
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functions with
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(++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
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(++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
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(+) Exit:
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(++) Any peripheral interrupt acknowledged by the nested vectored interrupt
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controller (NVIC) can wake up the device from Sleep mode. If the WFE instruction was used to enter sleep mode,
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the MCU exits Sleep mode as soon as an event occurs.
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*** Low power sleep mode ***
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============================
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[..]
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(+) Entry:
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The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
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functions with
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(++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
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(++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
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(+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register.
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This reduces power consumption but increases the wake-up time.
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(+) Exit:
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(++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
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acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
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from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
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the MCU exits Sleep mode as soon as an event occurs.
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*** Stop mode ***
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=================
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[..]
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The Stop mode is based on the Cortex-M0+ deepsleep mode combined with peripheral
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clock gating. The voltage regulator can be configured either in normal or low-power mode.
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In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
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the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
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To get the lowest consumption in Stop mode, the internal Flash memory also enters low
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power mode. When the Flash memory is in power-down mode, an additional startup delay is
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incurred when waking up from Stop mode.
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To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
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sensor can be switched off before entering Stop mode. They can be switched on again by
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software after exiting Stop mode using the ULP bit in the PWR_CR register.
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In Stop mode, all I/O pins keep the same state as in Run mode.
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(+) Entry:
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The Stop mode is entered using the HAL_PWR_EnterSTOPMode
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function with:
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(++) Main regulator ON.
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(++) Low Power regulator ON.
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(++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
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(++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
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(+) Exit:
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(++) By issuing an interrupt or a wakeup event, the MSI or HSI16 RC
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oscillator is selected as system clock depending the bit STOPWUCK in the RCC_CFGR
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register
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*** Standby mode ***
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====================
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[..]
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The Standby mode allows to achieve the lowest power consumption. It is based on the
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Cortex-M0+ deepsleep mode, with the voltage regulator disabled. The VCORE domain is
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consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
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also switched off. SRAM and register contents are lost except for the RTC registers, RTC
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backup registers and Standby circuitry.
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To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
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sensor can be switched off before entering the Standby mode. They can be switched
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on again by software after exiting the Standby mode.
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function.
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(+) Entry:
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(++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
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(+) Exit:
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(++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
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tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
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*** Auto-wakeup (AWU) from low-power mode ***
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=============================================
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[..]
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The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
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Wakeup event, a tamper event, a time-stamp event, or a comparator event,
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without depending on an external interrupt (Auto-wakeup mode).
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(+) RTC auto-wakeup (AWU) from the Stop mode
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(++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
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(+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
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or Event modes) using the EXTI_Init() function.
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(+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
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(+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
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and RTC_AlarmCmd() functions.
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(++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
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is necessary to:
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(+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt
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or Event modes) using the EXTI_Init() function.
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(+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
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function.
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(+++) Configure the RTC to detect the tamper or time stamp event using the
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RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
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functions.
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(++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
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(+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt
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or Event modes) using the EXTI_Init() function.
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(+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function.
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(+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
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RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
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(+) RTC auto-wakeup (AWU) from the Standby mode
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(++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
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(+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
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(+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm()
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and RTC_AlarmCmd() functions.
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(++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
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is necessary to:
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(+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig()
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function.
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(+++) Configure the RTC to detect the tamper or time stamp event using the
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RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
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functions.
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(++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
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(+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function
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(+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(),
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RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions.
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(+) Comparator auto-wakeup (AWU) from the Stop mode
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(++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
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event, it is necessary to:
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(+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2
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to be sensitive to to the selected edges (falling, rising or falling
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and rising) (Interrupt or Event modes) using the EXTI_Init() function.
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(+++) Configure the comparator to generate the event.
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@endverbatim
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* @{
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*/
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/**
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* @brief Enables access to the backup domain (RTC registers, RTC
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* backup data registers ).
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* @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
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* Backup Domain Access should be kept enabled.
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* @retval None
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*/
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void HAL_PWR_EnableBkUpAccess(void)
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{
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/* Enable access to RTC and backup registers */
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SET_BIT(PWR->CR, PWR_CR_DBP);
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}
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/**
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* @brief Disables access to the backup domain
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* @note Applies to RTC registers, RTC backup data registers.
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* @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
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* Backup Domain Access should be kept enabled.
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* @retval None
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*/
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void HAL_PWR_DisableBkUpAccess(void)
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{
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/* Disable access to RTC and backup registers */
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CLEAR_BIT(PWR->CR, PWR_CR_DBP);
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}
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/**
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* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
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* @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
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* information for the PVD.
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* @note Refer to the electrical characteristics of your device datasheet for
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* more details about the voltage threshold corresponding to each
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* detection level.
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* @retval None
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*/
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void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
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{
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/* Check the parameters */
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assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
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assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
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/* Set PLS[7:5] bits according to PVDLevel value */
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MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
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/* Clear any previous config. Keep it clear if no event or IT mode is selected */
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__HAL_PWR_PVD_EXTI_DISABLE_EVENT();
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__HAL_PWR_PVD_EXTI_DISABLE_IT();
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__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
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__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
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/* Configure interrupt mode */
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if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_IT();
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}
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/* Configure event mode */
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if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_EVENT();
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}
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/* Configure the edge */
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if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
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}
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if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
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}
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}
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/**
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* @brief Enables the Power Voltage Detector(PVD).
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* @retval None
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*/
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void HAL_PWR_EnablePVD(void)
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{
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/* Enable the power voltage detector */
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SET_BIT(PWR->CR, PWR_CR_PVDE);
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}
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/**
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* @brief Disables the Power Voltage Detector(PVD).
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* @retval None
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*/
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void HAL_PWR_DisablePVD(void)
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{
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/* Disable the power voltage detector */
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CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
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}
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/**
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* @brief Enables the WakeUp PINx functionality.
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* @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
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* This parameter can be one of the following values:
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* @arg PWR_WAKEUP_PIN1
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* @arg PWR_WAKEUP_PIN2
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* @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
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* @retval None
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*/
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void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
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{
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/* Check the parameter */
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assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
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/* Enable the EWUPx pin */
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SET_BIT(PWR->CSR, WakeUpPinx);
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}
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/**
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* @brief Disables the WakeUp PINx functionality.
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* @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
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* This parameter can be one of the following values:
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* @arg PWR_WAKEUP_PIN1
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* @arg PWR_WAKEUP_PIN2
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* @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only.
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* @retval None
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*/
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void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
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{
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/* Check the parameter */
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assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
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/* Disable the EWUPx pin */
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CLEAR_BIT(PWR->CSR, WakeUpPinx);
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}
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/**
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* @brief Enters Sleep mode.
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|
* @note In Sleep mode, all I/O pins keep the same state as in Run mode.
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|
* @param Regulator: Specifies the regulator state in SLEEP mode.
|
|
* This parameter can be one of the following values:
|
|
* @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
|
|
* @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
|
|
* @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
|
|
* When WFI entry is used, tick interrupt have to be disabled if not desired as
|
|
* the interrupt wake up source.
|
|
* This parameter can be one of the following values:
|
|
* @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
|
|
* @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
|
|
* @retval None
|
|
*/
|
|
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
|
|
{
|
|
uint32_t tmpreg = 0U;
|
|
/* Check the parameters */
|
|
assert_param(IS_PWR_REGULATOR(Regulator));
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|
assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
|
|
|
|
/* Select the regulator state in Sleep mode ---------------------------------*/
|
|
tmpreg = PWR->CR;
|
|
|
|
/* Clear PDDS and LPDS bits */
|
|
CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
|
|
|
|
/* Set LPSDSR bit according to PWR_Regulator value */
|
|
SET_BIT(tmpreg, Regulator);
|
|
|
|
/* Store the new value */
|
|
PWR->CR = tmpreg;
|
|
|
|
/* Clear SLEEPDEEP bit of Cortex System Control Register */
|
|
CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
|
|
|
|
/* Select SLEEP mode entry -------------------------------------------------*/
|
|
if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
|
|
{
|
|
/* Request Wait For Interrupt */
|
|
__WFI();
|
|
}
|
|
else
|
|
{
|
|
/* Request Wait For Event */
|
|
__SEV();
|
|
__WFE();
|
|
__WFE();
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Enters Stop mode.
|
|
* @note In Stop mode, all I/O pins keep the same state as in Run mode.
|
|
* @note When exiting Stop mode by issuing an interrupt or a wakeup event,
|
|
* MSI or HSI16 RCoscillator is selected as system clock depending
|
|
* the bit STOPWUCK in the RCC_CFGR register.
|
|
* @note When the voltage regulator operates in low power mode, an additional
|
|
* startup delay is incurred when waking up from Stop mode.
|
|
* By keeping the internal regulator ON during Stop mode, the consumption
|
|
* is higher although the startup time is reduced.
|
|
* @note Before entering in this function, it is important to ensure that the WUF
|
|
* wakeup flag is cleared. To perform this action, it is possible to call the
|
|
* following macro : __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU)
|
|
*
|
|
* @param Regulator: Specifies the regulator state in Stop mode.
|
|
* This parameter can be one of the following values:
|
|
* @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
|
|
* @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
|
|
* @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
|
|
* This parameter can be one of the following values:
|
|
* @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
|
|
* @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
|
|
* @retval None
|
|
*/
|
|
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
|
|
{
|
|
uint32_t tmpreg = 0U;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_PWR_REGULATOR(Regulator));
|
|
assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
|
|
|
|
/* Select the regulator state in Stop mode ---------------------------------*/
|
|
tmpreg = PWR->CR;
|
|
|
|
/* Clear PDDS and LPDS bits */
|
|
CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR));
|
|
|
|
/* Set LPSDSR bit according to PWR_Regulator value */
|
|
SET_BIT(tmpreg, Regulator);
|
|
|
|
/* Store the new value */
|
|
PWR->CR = tmpreg;
|
|
|
|
/* Set SLEEPDEEP bit of Cortex System Control Register */
|
|
SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
|
|
|
|
/* Select Stop mode entry --------------------------------------------------*/
|
|
if(STOPEntry == PWR_STOPENTRY_WFI)
|
|
{
|
|
/* Request Wait For Interrupt */
|
|
__WFI();
|
|
}
|
|
else
|
|
{
|
|
/* Request Wait For Event */
|
|
__SEV();
|
|
__WFE();
|
|
__WFE();
|
|
}
|
|
|
|
/* Reset SLEEPDEEP bit of Cortex System Control Register */
|
|
CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief Enters Standby mode.
|
|
* @note In Standby mode, all I/O pins are high impedance except for:
|
|
* - Reset pad (still available)
|
|
* - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
|
|
* Alarm out, or RTC clock calibration out.
|
|
* - RTC_AF2 pin (PC13) if configured for tamper.
|
|
* - WKUP pin 1 (PA00) if enabled.
|
|
* - WKUP pin 2 (PC13) if enabled.
|
|
* - WKUP pin 3 (PE06) if enabled, for stm32l07xxx and stm32l08xxx devices only.
|
|
* - WKUP pin 3 (PA02) if enabled, for stm32l031xx devices only.
|
|
* @retval None
|
|
*/
|
|
void HAL_PWR_EnterSTANDBYMode(void)
|
|
{
|
|
/* Select Standby mode */
|
|
SET_BIT(PWR->CR, PWR_CR_PDDS);
|
|
|
|
/* Set SLEEPDEEP bit of Cortex System Control Register */
|
|
SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
|
|
|
|
/* This option is used to ensure that store operations are completed */
|
|
#if defined ( __CC_ARM)
|
|
__force_stores();
|
|
#endif
|
|
/* Request Wait For Interrupt */
|
|
__WFI();
|
|
}
|
|
|
|
/**
|
|
* @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
|
|
* @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
|
|
* re-enters SLEEP mode when an interruption handling is over.
|
|
* Setting this bit is useful when the processor is expected to run only on
|
|
* interruptions handling.
|
|
* @retval None
|
|
*/
|
|
void HAL_PWR_EnableSleepOnExit(void)
|
|
{
|
|
/* Set SLEEPONEXIT bit of Cortex System Control Register */
|
|
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
|
|
* @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
|
|
* re-enters SLEEP mode when an interruption handling is over.
|
|
* @retval None
|
|
*/
|
|
void HAL_PWR_DisableSleepOnExit(void)
|
|
{
|
|
/* Clear SLEEPONEXIT bit of Cortex System Control Register */
|
|
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Enables CORTEX M0+ SEVONPEND bit.
|
|
* @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
|
|
* WFE to wake up when an interrupt moves from inactive to pended.
|
|
* @retval None
|
|
*/
|
|
void HAL_PWR_EnableSEVOnPend(void)
|
|
{
|
|
/* Set SEVONPEND bit of Cortex System Control Register */
|
|
SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Disables CORTEX M0+ SEVONPEND bit.
|
|
* @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
|
|
* WFE to wake up when an interrupt moves from inactive to pended.
|
|
* @retval None
|
|
*/
|
|
void HAL_PWR_DisableSEVOnPend(void)
|
|
{
|
|
/* Clear SEVONPEND bit of Cortex System Control Register */
|
|
CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
|
|
}
|
|
|
|
/**
|
|
* @brief This function handles the PWR PVD interrupt request.
|
|
* @note This API should be called under the PVD_IRQHandler().
|
|
* @retval None
|
|
*/
|
|
void HAL_PWR_PVD_IRQHandler(void)
|
|
{
|
|
/* Check PWR exti flag */
|
|
if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
|
|
{
|
|
/* PWR PVD interrupt user callback */
|
|
HAL_PWR_PVDCallback();
|
|
|
|
/* Clear PWR Exti pending bit */
|
|
__HAL_PWR_PVD_EXTI_CLEAR_FLAG();
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief PWR PVD interrupt callback
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_PWR_PVDCallback(void)
|
|
{
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_PWR_PVDCallback could be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* HAL_PWR_MODULE_ENABLED */
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
|
|
|