ARM GAS  /tmp/ccZXt8KR.s 			page 1


   1              		.cpu cortex-m0plus
   2              		.eabi_attribute 20, 1
   3              		.eabi_attribute 21, 1
   4              		.eabi_attribute 23, 3
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 1
   9              		.eabi_attribute 34, 0
  10              		.eabi_attribute 18, 4
  11              		.file	"stm32l0xx_ll_usart.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.LL_USART_DeInit,"ax",%progbits
  16              		.align	1
  17              		.global	LL_USART_DeInit
  18              		.syntax unified
  19              		.code	16
  20              		.thumb_func
  21              		.fpu softvfp
  23              	LL_USART_DeInit:
  24              	.LFB413:
  25              		.file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c"
   1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /**
   2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   ******************************************************************************
   3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @file    stm32l0xx_ll_usart.c
   4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @author  MCD Application Team
   5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @brief   USART LL module driver.
   6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   ******************************************************************************
   7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @attention
   8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *
   9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *
  11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * Redistribution and use in source and binary forms, with or without modification,
  12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * are permitted provided that the following conditions are met:
  13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *   1. Redistributions of source code must retain the above copyright notice,
  14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *      this list of conditions and the following disclaimer.
  15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
  16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *      this list of conditions and the following disclaimer in the documentation
  17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *      and/or other materials provided with the distribution.
  18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *      may be used to endorse or promote products derived from this software
  20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *      without specific prior written permission.
  21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *
  22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *
  33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   ******************************************************************************
ARM GAS  /tmp/ccZXt8KR.s 			page 2


  34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
  35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined(USE_FULL_LL_DRIVER)
  36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /* Includes ------------------------------------------------------------------*/
  38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #include "stm32l0xx_ll_usart.h"
  39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #include "stm32l0xx_ll_rcc.h"
  40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #include "stm32l0xx_ll_bus.h"
  41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #ifdef  USE_FULL_ASSERT
  42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #include "stm32_assert.h"
  43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #else
  44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define assert_param(expr) ((void)0U)
  45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif
  46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /** @addtogroup STM32L0xx_LL_Driver
  48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @{
  49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
  50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined (USART1) || defined (USART2) || defined (USART4) || defined (USART5)
  52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /** @addtogroup USART_LL
  54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @{
  55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
  56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /* Private types -------------------------------------------------------------*/
  58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /* Private variables ---------------------------------------------------------*/
  59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /* Private constants ---------------------------------------------------------*/
  60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /** @addtogroup USART_LL_Private_Constants
  61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @{
  62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
  63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /**
  65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @}
  66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
  67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /* Private macros ------------------------------------------------------------*/
  70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /** @addtogroup USART_LL_Private_Macros
  71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @{
  72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
  73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
  76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4000000U)
  77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                        || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                        || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                        || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                     || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                     || ((__VALUE__) == LL_USART_PARITY_ODD))
  86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
  88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                        || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                        || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
ARM GAS  /tmp/ccZXt8KR.s 			page 3


  91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
  92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                           || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
  93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
  95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                               || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
  96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
  98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                         || ((__VALUE__) == LL_USART_PHASE_2EDGE))
  99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                            || ((__VALUE__) == LL_USART_POLARITY_HIGH))
 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                          || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                       || ((__VALUE__) == LL_USART_STOPBITS_1) \
 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                       || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                       || ((__VALUE__) == LL_USART_STOPBITS_2))
 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                        || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /**
 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @}
 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /* Private function prototypes -----------------------------------------------*/
 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /* Exported functions --------------------------------------------------------*/
 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /** @addtogroup USART_LL_Exported_Functions
 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @{
 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /** @addtogroup USART_LL_EF_Init
 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @{
 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /**
 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @brief  De-initialize USART registers (Registers restored to their default values).
 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @param  USARTx USART Instance
 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @retval An ErrorStatus enumeration value:
 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *          - SUCCESS: USART registers are de-initialized
 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *          - ERROR: USART registers are not de-initialized
 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** {
  26              		.loc 1 139 0
  27              		.cfi_startproc
  28              		@ args = 0, pretend = 0, frame = 0
  29              		@ frame_needed = 0, uses_anonymous_args = 0
  30              		@ link register save eliminated.
  31              	.LVL0:
 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   ErrorStatus status = SUCCESS;
 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
ARM GAS  /tmp/ccZXt8KR.s 			page 4


 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   /* Check the parameters */
 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_UART_INSTANCE(USARTx));
 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined(USART1)
 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   if (USARTx == USART1)
  32              		.loc 1 146 0
  33 0000 1E4B     		ldr	r3, .L11
  34 0002 9842     		cmp	r0, r3
  35 0004 0AD0     		beq	.L7
 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   {
 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* Force reset of USART clock */
 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* Release reset of USART clock */
 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   }
 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif /* USART1 */
 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined(USART1)
 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   else if (USARTx == USART2)
  36              		.loc 1 156 0
  37 0006 1E4B     		ldr	r3, .L11+4
  38 0008 9842     		cmp	r0, r3
  39 000a 13D0     		beq	.L8
 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #else
 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   if (USARTx == USART2)
 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif
 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   {
 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* Force reset of USART clock */
 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* Release reset of USART clock */
 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   }
 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined(USART4)
 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   else if (USARTx == USART4)
  40              		.loc 1 168 0
  41 000c 1D4B     		ldr	r3, .L11+8
  42 000e 9842     		cmp	r0, r3
  43 0010 1CD0     		beq	.L9
 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   {
 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* Force reset of USART clock */
 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART4);
 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* Release reset of USART clock */
 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART4);
 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   }
 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif /* USART4 */
 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined(USART5)
 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   else if (USARTx == USART5)
  44              		.loc 1 178 0
  45 0012 1D4B     		ldr	r3, .L11+12
  46 0014 9842     		cmp	r0, r3
  47 0016 25D0     		beq	.L10
 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   {
 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* Force reset of USART clock */
 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART5);
 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
ARM GAS  /tmp/ccZXt8KR.s 			page 5


 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* Release reset of USART clock */
 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART5);
 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   }
 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif /* USART5 */
 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   else
 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   {
 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     status = ERROR;
  48              		.loc 1 189 0
  49 0018 0020     		movs	r0, #0
  50              	.LVL1:
  51 001a 0AE0     		b	.L3
  52              	.LVL2:
  53              	.L7:
  54              	.LBB30:
  55              	.LBB31:
  56              		.file 2 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h"
   1:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
   2:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   ******************************************************************************
   3:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @file    stm32l0xx_ll_bus.h
   4:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @author  MCD Application Team
   5:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief   Header file of BUS LL module.
   6:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
   7:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   @verbatim                
   8:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****                       ##### RCC Limitations #####
   9:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   ==============================================================================
  10:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****     [..]  
  11:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       A delay between an RCC peripheral clock enable and the effective peripheral 
  12:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       enabling should be taken into account in order to manage the peripheral read/write 
  13:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       from/to registers.
  14:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       (+) This delay depends on the peripheral mapping.
  15:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****         (++) AHB & APB peripherals, 1 dummy read is necessary
  16:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  17:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****     [..]  
  18:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       Workarounds:
  19:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
  20:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****           inserted in each LL_{BUS}_GRP{x}_EnableClock() function.
  21:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  22:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   @endverbatim
  23:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   ******************************************************************************
  24:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @attention
  25:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
  26:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  27:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
  28:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * Redistribution and use in source and binary forms, with or without modification,
  29:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * are permitted provided that the following conditions are met:
  30:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *   1. Redistributions of source code must retain the above copyright notice,
  31:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      this list of conditions and the following disclaimer.
  32:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
  33:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      this list of conditions and the following disclaimer in the documentation
  34:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      and/or other materials provided with the distribution.
  35:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  36:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      may be used to endorse or promote products derived from this software
  37:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      without specific prior written permission.
  38:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
  39:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  40:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  41:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ARM GAS  /tmp/ccZXt8KR.s 			page 6


  42:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  43:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  44:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  45:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  46:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  47:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  48:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  49:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
  50:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   ******************************************************************************
  51:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  52:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  53:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Define to prevent recursive inclusion -------------------------------------*/
  54:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #ifndef __STM32L0xx_LL_BUS_H
  55:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define __STM32L0xx_LL_BUS_H
  56:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  57:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #ifdef __cplusplus
  58:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** extern "C" {
  59:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
  60:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  61:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/
  62:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #include "stm32l0xx.h"
  63:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  64:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @addtogroup STM32L0xx_LL_Driver
  65:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
  66:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  67:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  68:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(RCC)
  69:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  70:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL BUS
  71:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
  72:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  73:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  74:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private types -------------------------------------------------------------*/
  75:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private variables ---------------------------------------------------------*/
  76:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  77:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private constants ---------------------------------------------------------*/
  78:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  79:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private macros ------------------------------------------------------------*/
  80:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  81:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported types ------------------------------------------------------------*/
  82:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported constants --------------------------------------------------------*/
  83:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Constants BUS Exported Constants
  84:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
  85:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  86:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  87:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH  AHB1 GRP1 PERIPH
  88:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
  89:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  90:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
  91:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA1           RCC_AHBENR_DMA1EN      /*!< DMA1 clock enable */
  92:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_MIF            RCC_AHBENR_MIFEN       /*!< MIF clock enable */
  93:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM           RCC_AHBSMENR_SRAMSMEN  /*!< Sleep Mode SRAM clock enable
  94:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_CRC            RCC_AHBENR_CRCEN       /*!< CRC clock enable */
  95:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TSC)
  96:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_TSC            RCC_AHBENR_TSCEN       /*!< TSC clock enable */
  97:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*TSC*/
  98:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(RNG)
ARM GAS  /tmp/ccZXt8KR.s 			page 7


  99:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_RNG            RCC_AHBENR_RNGEN       /*!< RNG clock enable */
 100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*RNG*/
 101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(AES)
 102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_CRYP           RCC_AHBENR_CRYPEN      /*!< CRYP clock enable */
 103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*AES*/
 104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH  APB1 GRP1 PERIPH
 110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
 113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2           RCC_APB1ENR_TIM2EN     /*!< TIM2 clock enable */
 114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM3)
 115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM3           RCC_APB1ENR_TIM3EN     /*!< TIM3 clock enable */
 116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM6)
 118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM6           RCC_APB1ENR_TIM6EN     /*!< TIM6 clock enable */
 119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM7)
 121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM7           RCC_APB1ENR_TIM7EN     /*!< TIM7 clock enable */
 122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(LCD)
 124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LCD            RCC_APB1ENR_LCDEN      /*!< LCD clock enable */
 125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*LCD*/
 126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG           RCC_APB1ENR_WWDGEN     /*!< WWDG clock enable */
 127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(SPI2)
 128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2           RCC_APB1ENR_SPI2EN     /*!< SPI2 clock enable */
 129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART2         RCC_APB1ENR_USART2EN   /*!< USART2 clock enable */
 131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPUART1        RCC_APB1ENR_LPUART1EN  /*!< LPUART1 clock enable */
 132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART4)
 133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART4         RCC_APB1ENR_USART4EN   /*!< USART4 clock enable */
 134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART5)
 136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART5         RCC_APB1ENR_USART5EN   /*!< USART5 clock enable */
 137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C1           RCC_APB1ENR_I2C1EN     /*!< I2C1 clock enable */
 139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(I2C2)
 140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C2           RCC_APB1ENR_I2C2EN     /*!< I2C2 clock enable */
 141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USB)
 143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USB            RCC_APB1ENR_USBEN      /*!< USB clock enable */
 144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*USB*/
 145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(CRS)
 146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CRS            RCC_APB1ENR_CRSEN      /*!< CRS clock enable */
 147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*CRS*/
 148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_PWR            RCC_APB1ENR_PWREN      /*!< PWR clock enable */
 149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(DAC)
 150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_DAC1           RCC_APB1ENR_DACEN      /*!< DAC clock enable */
 151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(I2C3)
 153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C3           RCC_APB1ENR_I2C3EN     /*!< I2C3 clock enable */
 154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1         RCC_APB1ENR_LPTIM1EN   /*!< LPTIM1 clock enable */
ARM GAS  /tmp/ccZXt8KR.s 			page 8


 156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH  APB2 GRP1 PERIPH
 164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
 167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SYSCFG         RCC_APB2ENR_SYSCFGEN  /*!< SYSCFG clock enable */
 168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM21          RCC_APB2ENR_TIM21EN   /*!< TIM21 clock enable */
 169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM22)
 170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM22          RCC_APB2ENR_TIM22EN   /*!< TIM22 clock enable */
 171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_FW             RCC_APB2ENR_FWEN      /*!< FireWall clock enable */
 173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC1           RCC_APB2ENR_ADC1EN    /*!< ADC1 clock enable */
 174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI1           RCC_APB2ENR_SPI1EN    /*!< SPI1 clock enable */
 175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART1)
 176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART1         RCC_APB2ENR_USART1EN  /*!< USART1 clock enable */
 177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_DBGMCU         RCC_APB2ENR_DBGMCUEN  /*!< DBGMCU clock enable */
 179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_IOP_GRP1_PERIPH  IOP GRP1 PERIPH
 187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_ALL             (uint32_t)0xFFFFFFFFU
 190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOA           RCC_IOPENR_GPIOAEN    /*!< GPIO port A control */
 191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOB           RCC_IOPENR_GPIOBEN    /*!< GPIO port B control */
 192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOC           RCC_IOPENR_GPIOCEN    /*!< GPIO port C control */
 193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOD)
 194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOD           RCC_IOPENR_GPIODEN    /*!< GPIO port D control */
 195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOD*/
 196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOE)
 197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOE           RCC_IOPENR_GPIOEEN    /*!< GPIO port H control */
 198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOE*/
 199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOH)
 200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOH           RCC_IOPENR_GPIOHEN    /*!< GPIO port H control */
 201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOH*/
 202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported macro ------------------------------------------------------------*/
 212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported functions --------------------------------------------------------*/
ARM GAS  /tmp/ccZXt8KR.s 			page 9


 213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Functions BUS Exported Functions
 214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB1 AHB1
 218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable AHB1 peripherals clock.
 223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBENR      DMAEN        LL_AHB1_GRP1_EnableClock\n
 224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      MIFEN        LL_AHB1_GRP1_EnableClock\n
 225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRCEN        LL_AHB1_GRP1_EnableClock\n
 226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      TSCEN        LL_AHB1_GRP1_EnableClock\n
 227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      RNGEN        LL_AHB1_GRP1_EnableClock\n
 228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRYPEN       LL_AHB1_GRP1_EnableClock
 229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)
 241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->AHBENR, Periphs);
 244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->AHBENR, Periphs);
 246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Check if AHB1 peripheral clock is enabled or not
 251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBENR      DMAEN        LL_AHB1_GRP1_IsEnabledClock\n
 252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      MIFEN        LL_AHB1_GRP1_IsEnabledClock\n
 253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRCEN        LL_AHB1_GRP1_IsEnabledClock\n
 254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      TSCEN        LL_AHB1_GRP1_IsEnabledClock\n
 255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      RNGEN        LL_AHB1_GRP1_IsEnabledClock\n
 256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRYPEN       LL_AHB1_GRP1_IsEnabledClock
 257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval State of Periphs (1 or 0).
 267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)
 269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
ARM GAS  /tmp/ccZXt8KR.s 			page 10


 270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   return (READ_BIT(RCC->AHBENR, Periphs) == Periphs);
 271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable AHB1 peripherals clock.
 275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBENR      DMAEN        LL_AHB1_GRP1_DisableClock\n
 276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      MIFEN        LL_AHB1_GRP1_DisableClock\n
 277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRCEN        LL_AHB1_GRP1_DisableClock\n
 278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      TSCEN        LL_AHB1_GRP1_DisableClock\n
 279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      RNGEN        LL_AHB1_GRP1_DisableClock\n
 280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRYPEN       LL_AHB1_GRP1_DisableClock
 281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)
 293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->AHBENR, Periphs);
 295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Force AHB1 peripherals reset.
 299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBRSTR      DMARST        LL_AHB1_GRP1_ForceReset\n
 300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      MIFRST        LL_AHB1_GRP1_ForceReset\n
 301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      CRCRST        LL_AHB1_GRP1_ForceReset\n
 302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      TSCRST        LL_AHB1_GRP1_ForceReset\n
 303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      RNGRST        LL_AHB1_GRP1_ForceReset\n
 304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      CRYPRST       LL_AHB1_GRP1_ForceReset
 305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_ALL
 307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)
 318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->AHBRSTR, Periphs);
 320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Release AHB1 peripherals reset.
 324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBRSTR      DMARST        LL_AHB1_GRP1_ReleaseReset\n
 325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      MIFRST        LL_AHB1_GRP1_ReleaseReset\n
 326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      CRCRST        LL_AHB1_GRP1_ReleaseReset\n
ARM GAS  /tmp/ccZXt8KR.s 			page 11


 327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      TSCRST        LL_AHB1_GRP1_ReleaseReset\n
 328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      RNGRST        LL_AHB1_GRP1_ReleaseReset\n
 329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      CRYPRST       LL_AHB1_GRP1_ReleaseReset
 330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_ALL
 332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)
 343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->AHBRSTR, Periphs);
 345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable AHB1 peripherals clock during Low Power (Sleep) mode.
 349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBSMENR     DMASMEN       LL_AHB1_GRP1_EnableClockSleep\n
 350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     MIFSMEN       LL_AHB1_GRP1_EnableClockSleep\n
 351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     SRAMSMEN      LL_AHB1_GRP1_EnableClockSleep\n
 352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     CRCSMEN       LL_AHB1_GRP1_EnableClockSleep\n
 353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     TSCSMEN       LL_AHB1_GRP1_EnableClockSleep\n
 354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     RNGSMEN       LL_AHB1_GRP1_EnableClockSleep\n
 355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     CRYPSMEN      LL_AHB1_GRP1_EnableClockSleep
 356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
 360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs)
 369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->AHBSMENR, Periphs);
 372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->AHBSMENR, Periphs);
 374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable AHB1 peripherals clock during Low Power (Sleep) mode.
 379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBSMENR     DMASMEN       LL_AHB1_GRP1_DisableClockSleep\n
 380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     MIFSMEN       LL_AHB1_GRP1_DisableClockSleep\n
 381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     SRAMSMEN      LL_AHB1_GRP1_DisableClockSleep\n
 382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     CRCSMEN       LL_AHB1_GRP1_DisableClockSleep\n
 383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     TSCSMEN       LL_AHB1_GRP1_DisableClockSleep\n
ARM GAS  /tmp/ccZXt8KR.s 			page 12


 384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     RNGSMEN       LL_AHB1_GRP1_DisableClockSleep\n
 385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     CRYPSMEN      LL_AHB1_GRP1_DisableClockSleep
 386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
 390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs)
 399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->AHBSMENR, Periphs);
 401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB1 APB1
 408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable APB1 peripherals clock.
 413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_EnableClock\n
 414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM3EN        LL_APB1_GRP1_EnableClock\n
 415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM6EN        LL_APB1_GRP1_EnableClock\n
 416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM7EN        LL_APB1_GRP1_EnableClock\n
 417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LCDEN         LL_APB1_GRP1_EnableClock\n
 418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     WWDGEN        LL_APB1_GRP1_EnableClock\n
 419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     SPI2EN        LL_APB1_GRP1_EnableClock\n
 420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART2EN      LL_APB1_GRP1_EnableClock\n
 421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPUART1EN     LL_APB1_GRP1_EnableClock\n
 422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART4EN      LL_APB1_GRP1_EnableClock\n
 423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART5EN      LL_APB1_GRP1_EnableClock\n
 424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C1EN        LL_APB1_GRP1_EnableClock\n
 425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C2EN        LL_APB1_GRP1_EnableClock\n
 426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USBEN         LL_APB1_GRP1_EnableClock\n
 427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     CRSEN         LL_APB1_GRP1_EnableClock\n
 428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     PWREN         LL_APB1_GRP1_EnableClock\n
 429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     DACEN         LL_APB1_GRP1_EnableClock\n
 430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C3EN        LL_APB1_GRP1_EnableClock\n
 431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_EnableClock
 432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
ARM GAS  /tmp/ccZXt8KR.s 			page 13


 441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
 457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB1ENR, Periphs);
 460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
 462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Check if APB1 peripheral clock is enabled or not
 467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_IsEnabledClock\n
 468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM3EN        LL_APB1_GRP1_IsEnabledClock\n
 469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM6EN        LL_APB1_GRP1_IsEnabledClock\n
 470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM7EN        LL_APB1_GRP1_IsEnabledClock\n
 471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LCDEN         LL_APB1_GRP1_IsEnabledClock\n
 472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     WWDGEN        LL_APB1_GRP1_IsEnabledClock\n
 473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     SPI2EN        LL_APB1_GRP1_IsEnabledClock\n
 474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART2EN      LL_APB1_GRP1_IsEnabledClock\n
 475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPUART1EN     LL_APB1_GRP1_IsEnabledClock\n
 476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART4EN      LL_APB1_GRP1_IsEnabledClock\n
 477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART5EN      LL_APB1_GRP1_IsEnabledClock\n
 478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C1EN        LL_APB1_GRP1_IsEnabledClock\n
 479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C2EN        LL_APB1_GRP1_IsEnabledClock\n
 480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USBEN         LL_APB1_GRP1_IsEnabledClock\n
 481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     CRSEN         LL_APB1_GRP1_IsEnabledClock\n
 482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     PWREN         LL_APB1_GRP1_IsEnabledClock\n
 483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     DACEN         LL_APB1_GRP1_IsEnabledClock\n
 484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C3EN        LL_APB1_GRP1_IsEnabledClock\n
 485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_IsEnabledClock
 486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
ARM GAS  /tmp/ccZXt8KR.s 			page 14


 498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval State of Periphs (1 or 0).
 509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)
 511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);
 513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable APB1 peripherals clock.
 517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_DisableClock\n
 518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM3EN        LL_APB1_GRP1_DisableClock\n
 519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM6EN        LL_APB1_GRP1_DisableClock\n
 520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM7EN        LL_APB1_GRP1_DisableClock\n
 521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LCDEN         LL_APB1_GRP1_DisableClock\n
 522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     WWDGEN        LL_APB1_GRP1_DisableClock\n
 523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     SPI2EN        LL_APB1_GRP1_DisableClock\n
 524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART2EN      LL_APB1_GRP1_DisableClock\n
 525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPUART1EN     LL_APB1_GRP1_DisableClock\n
 526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART4EN      LL_APB1_GRP1_DisableClock\n
 527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART5EN      LL_APB1_GRP1_DisableClock\n
 528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C1EN        LL_APB1_GRP1_DisableClock\n
 529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C2EN        LL_APB1_GRP1_DisableClock\n
 530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USBEN         LL_APB1_GRP1_DisableClock\n
 531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     CRSEN         LL_APB1_GRP1_DisableClock\n
 532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     PWREN         LL_APB1_GRP1_DisableClock\n
 533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     DACEN         LL_APB1_GRP1_DisableClock\n
 534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C3EN        LL_APB1_GRP1_DisableClock\n
 535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_DisableClock
 536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
ARM GAS  /tmp/ccZXt8KR.s 			page 15


 555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)
 561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB1ENR, Periphs);
 563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Force APB1 peripherals reset.
 567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1RSTR     TIM2RST        LL_APB1_GRP1_ForceReset\n
 568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM3RST        LL_APB1_GRP1_ForceReset\n
 569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM6RST        LL_APB1_GRP1_ForceReset\n
 570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM7RST        LL_APB1_GRP1_ForceReset\n
 571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LCDRST         LL_APB1_GRP1_ForceReset\n
 572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     WWDGRST        LL_APB1_GRP1_ForceReset\n
 573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     SPI2RST        LL_APB1_GRP1_ForceReset\n
 574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART2RST      LL_APB1_GRP1_ForceReset\n
 575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LPUART1RST     LL_APB1_GRP1_ForceReset\n
 576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART4RST      LL_APB1_GRP1_ForceReset\n
 577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART5RST      LL_APB1_GRP1_ForceReset\n
 578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C1RST        LL_APB1_GRP1_ForceReset\n
 579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C2RST        LL_APB1_GRP1_ForceReset\n
 580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USBRST         LL_APB1_GRP1_ForceReset\n
 581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     CRSRST         LL_APB1_GRP1_ForceReset\n
 582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     PWRRST         LL_APB1_GRP1_ForceReset\n
 583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     DACRST         LL_APB1_GRP1_ForceReset\n
 584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C3RST        LL_APB1_GRP1_ForceReset\n
 585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LPTIM1RST      LL_APB1_GRP1_ForceReset
 586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_ALL
 588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)
ARM GAS  /tmp/ccZXt8KR.s 			page 16


 612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB1RSTR, Periphs);
 614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Release APB1 peripherals reset.
 618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1RSTR     TIM2RST        LL_APB1_GRP1_ReleaseReset\n
 619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM3RST        LL_APB1_GRP1_ReleaseReset\n
 620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM6RST        LL_APB1_GRP1_ReleaseReset\n
 621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM7RST        LL_APB1_GRP1_ReleaseReset\n
 622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LCDRST         LL_APB1_GRP1_ReleaseReset\n
 623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     WWDGRST        LL_APB1_GRP1_ReleaseReset\n
 624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     SPI2RST        LL_APB1_GRP1_ReleaseReset\n
 625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART2RST      LL_APB1_GRP1_ReleaseReset\n
 626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LPUART1RST     LL_APB1_GRP1_ReleaseReset\n
 627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART4RST      LL_APB1_GRP1_ReleaseReset\n
 628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART5RST      LL_APB1_GRP1_ReleaseReset\n
 629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C1RST        LL_APB1_GRP1_ReleaseReset\n
 630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C2RST        LL_APB1_GRP1_ReleaseReset\n
 631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USBRST         LL_APB1_GRP1_ReleaseReset\n
 632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     CRSRST         LL_APB1_GRP1_ReleaseReset\n
 633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     PWRRST         LL_APB1_GRP1_ReleaseReset\n
 634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     DACRST         LL_APB1_GRP1_ReleaseReset\n
 635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C3RST        LL_APB1_GRP1_ReleaseReset\n
 636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LPTIM1RST      LL_APB1_GRP1_ReleaseReset
 637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_ALL
 639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)
 663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB1RSTR, Periphs);
 665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable APB1 peripherals clock during Low Power (Sleep) mode.
ARM GAS  /tmp/ccZXt8KR.s 			page 17


 669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1SMENR    TIM2SMEN      LL_APB1_GRP1_EnableClockSleep\n
 670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM3SMEN      LL_APB1_GRP1_EnableClockSleep\n
 671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM6SMEN      LL_APB1_GRP1_EnableClockSleep\n
 672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM7SMEN      LL_APB1_GRP1_EnableClockSleep\n
 673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LCDSMEN       LL_APB1_GRP1_EnableClockSleep\n
 674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    WWDGSMEN      LL_APB1_GRP1_EnableClockSleep\n
 675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    SPI2SMEN      LL_APB1_GRP1_EnableClockSleep\n
 676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART2SMEN    LL_APB1_GRP1_EnableClockSleep\n
 677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LPUART1SMEN   LL_APB1_GRP1_EnableClockSleep\n
 678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART4SMEN    LL_APB1_GRP1_EnableClockSleep\n
 679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART5SMEN    LL_APB1_GRP1_EnableClockSleep\n
 680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C1SMEN      LL_APB1_GRP1_EnableClockSleep\n
 681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C2SMEN      LL_APB1_GRP1_EnableClockSleep\n
 682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USBSMEN       LL_APB1_GRP1_EnableClockSleep\n
 683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    CRSSMEN       LL_APB1_GRP1_EnableClockSleep\n
 684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    PWRSMEN       LL_APB1_GRP1_EnableClockSleep\n
 685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    DACSMEN       LL_APB1_GRP1_EnableClockSleep\n
 686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C3SMEN      LL_APB1_GRP1_EnableClockSleep\n
 687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LPTIM1SMEN    LL_APB1_GRP1_EnableClockSleep
 688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClockSleep(uint32_t Periphs)
 713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB1SMENR, Periphs);
 716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->APB1SMENR, Periphs);
 718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable APB1 peripherals clock during Low Power (Sleep) mode.
 723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1SMENR    TIM2SMEN      LL_APB1_GRP1_DisableClockSleep\n
 724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM3SMEN      LL_APB1_GRP1_DisableClockSleep\n
 725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM6SMEN      LL_APB1_GRP1_DisableClockSleep\n
ARM GAS  /tmp/ccZXt8KR.s 			page 18


 726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM7SMEN      LL_APB1_GRP1_DisableClockSleep\n
 727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LCDSMEN       LL_APB1_GRP1_DisableClockSleep\n
 728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    WWDGSMEN      LL_APB1_GRP1_DisableClockSleep\n
 729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    SPI2SMEN      LL_APB1_GRP1_DisableClockSleep\n
 730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART2SMEN    LL_APB1_GRP1_DisableClockSleep\n
 731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LPUART1SMEN   LL_APB1_GRP1_DisableClockSleep\n
 732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART4SMEN    LL_APB1_GRP1_DisableClockSleep\n
 733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART5SMEN    LL_APB1_GRP1_DisableClockSleep\n
 734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C1SMEN      LL_APB1_GRP1_DisableClockSleep\n
 735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C2SMEN      LL_APB1_GRP1_DisableClockSleep\n
 736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USBSMEN       LL_APB1_GRP1_DisableClockSleep\n
 737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    CRSSMEN       LL_APB1_GRP1_DisableClockSleep\n
 738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    PWRSMEN       LL_APB1_GRP1_DisableClockSleep\n
 739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    DACSMEN       LL_APB1_GRP1_DisableClockSleep\n
 740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C3SMEN      LL_APB1_GRP1_DisableClockSleep\n
 741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LPTIM1SMEN    LL_APB1_GRP1_DisableClockSleep
 742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClockSleep(uint32_t Periphs)
 767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB1SMENR, Periphs);
 769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2
 776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable APB2 peripherals clock.
 781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2ENR      SYSCFGEN      LL_APB2_GRP1_EnableClock\n
 782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM21EN       LL_APB2_GRP1_EnableClock\n
ARM GAS  /tmp/ccZXt8KR.s 			page 19


 783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM22EN       LL_APB2_GRP1_EnableClock\n
 784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      FWEN          LL_APB2_GRP1_EnableClock\n
 785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      ADCEN         LL_APB2_GRP1_EnableClock\n
 786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      SPI1EN        LL_APB2_GRP1_EnableClock\n
 787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      USART1EN      LL_APB2_GRP1_EnableClock\n
 788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      DBGEN         LL_APB2_GRP1_EnableClock
 789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_FW
 794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*)
 797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
 803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB2ENR, Periphs);
 806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
 808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Check if APB2 peripheral clock is enabled or not
 813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2ENR      SYSCFGEN      LL_APB2_GRP1_IsEnabledClock\n
 814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM21EN       LL_APB2_GRP1_IsEnabledClock\n
 815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM22EN       LL_APB2_GRP1_IsEnabledClock\n
 816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      FWEN          LL_APB2_GRP1_IsEnabledClock\n
 817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      ADCEN         LL_APB2_GRP1_IsEnabledClock\n
 818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      SPI1EN        LL_APB2_GRP1_IsEnabledClock\n
 819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      USART1EN      LL_APB2_GRP1_IsEnabledClock\n
 820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      DBGEN         LL_APB2_GRP1_IsEnabledClock
 821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_FW
 826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*)
 829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval State of Periphs (1 or 0).
 833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)
 835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs);
 837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
ARM GAS  /tmp/ccZXt8KR.s 			page 20


 840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable APB2 peripherals clock.
 841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2ENR      SYSCFGEN      LL_APB2_GRP1_DisableClock\n
 842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM21EN       LL_APB2_GRP1_DisableClock\n
 843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM22EN       LL_APB2_GRP1_DisableClock\n
 844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      FWEN          LL_APB2_GRP1_DisableClock\n
 845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      ADCEN         LL_APB2_GRP1_DisableClock\n
 846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      SPI1EN        LL_APB2_GRP1_DisableClock\n
 847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      USART1EN      LL_APB2_GRP1_DisableClock\n
 848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      DBGEN         LL_APB2_GRP1_DisableClock
 849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_FW
 854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1  (*)
 857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs)
 863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB2ENR, Periphs);
 865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Force APB2 peripherals reset.
 869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2RSTR     SYSCFGRST     LL_APB2_GRP1_ForceReset\n
 870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     TIM21RST      LL_APB2_GRP1_ForceReset\n
 871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     TIM22RST      LL_APB2_GRP1_ForceReset\n
 872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     ADCRST        LL_APB2_GRP1_ForceReset\n
 873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     SPI1RST       LL_APB2_GRP1_ForceReset\n
 874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     USART1RST     LL_APB2_GRP1_ForceReset\n
 875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     DBGRST        LL_APB2_GRP1_ForceReset
 876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ALL
 878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*)
 884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs)
 890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB2RSTR, Periphs);
  57              		.loc 2 891 0
  58 001c 1B4B     		ldr	r3, .L11+16
  59 001e 596A     		ldr	r1, [r3, #36]
  60 0020 8022     		movs	r2, #128
  61 0022 D201     		lsls	r2, r2, #7
ARM GAS  /tmp/ccZXt8KR.s 			page 21


  62 0024 0A43     		orrs	r2, r1
  63 0026 5A62     		str	r2, [r3, #36]
  64              	.LVL3:
  65              	.LBE31:
  66              	.LBE30:
  67              	.LBB32:
  68              	.LBB33:
 892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Release APB2 peripherals reset.
 896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2RSTR     SYSCFGRST     LL_APB2_GRP1_ReleaseReset\n
 897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     TIM21RST      LL_APB2_GRP1_ReleaseReset\n
 898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     TIM22RST      LL_APB2_GRP1_ReleaseReset\n
 899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     ADCRST        LL_APB2_GRP1_ReleaseReset\n
 900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     SPI1RST       LL_APB2_GRP1_ReleaseReset\n
 901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     USART1RST     LL_APB2_GRP1_ReleaseReset\n
 902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     DBGRST        LL_APB2_GRP1_ReleaseReset
 903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ALL
 905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1  (*)
 911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)
 917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB2RSTR, Periphs);
  69              		.loc 2 918 0
  70 0028 5A6A     		ldr	r2, [r3, #36]
  71 002a 1949     		ldr	r1, .L11+20
  72 002c 0A40     		ands	r2, r1
  73 002e 5A62     		str	r2, [r3, #36]
  74              	.LBE33:
  75              	.LBE32:
 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
  76              		.loc 1 140 0
  77 0030 0120     		movs	r0, #1
  78              	.LVL4:
  79              	.L3:
 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   }
 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   return (status);
 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** }
  80              		.loc 1 193 0
  81              		@ sp needed
  82 0032 7047     		bx	lr
  83              	.LVL5:
  84              	.L8:
  85              	.LBB34:
  86              	.LBB35:
ARM GAS  /tmp/ccZXt8KR.s 			page 22


 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
  87              		.loc 2 613 0
  88 0034 154B     		ldr	r3, .L11+16
  89 0036 996A     		ldr	r1, [r3, #40]
  90 0038 8022     		movs	r2, #128
  91 003a 9202     		lsls	r2, r2, #10
  92 003c 0A43     		orrs	r2, r1
  93 003e 9A62     		str	r2, [r3, #40]
  94              	.LVL6:
  95              	.LBE35:
  96              	.LBE34:
  97              	.LBB36:
  98              	.LBB37:
 664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
  99              		.loc 2 664 0
 100 0040 9A6A     		ldr	r2, [r3, #40]
 101 0042 1449     		ldr	r1, .L11+24
 102 0044 0A40     		ands	r2, r1
 103 0046 9A62     		str	r2, [r3, #40]
 104              	.LBE37:
 105              	.LBE36:
 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 106              		.loc 1 140 0
 107 0048 0120     		movs	r0, #1
 108              	.LVL7:
 109 004a F2E7     		b	.L3
 110              	.LVL8:
 111              	.L9:
 112              	.LBB38:
 113              	.LBB39:
 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 114              		.loc 2 613 0
 115 004c 0F4B     		ldr	r3, .L11+16
 116 004e 996A     		ldr	r1, [r3, #40]
 117 0050 8022     		movs	r2, #128
 118 0052 1203     		lsls	r2, r2, #12
 119 0054 0A43     		orrs	r2, r1
 120 0056 9A62     		str	r2, [r3, #40]
 121              	.LVL9:
 122              	.LBE39:
 123              	.LBE38:
 124              	.LBB40:
 125              	.LBB41:
 664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 126              		.loc 2 664 0
 127 0058 9A6A     		ldr	r2, [r3, #40]
 128 005a 0F49     		ldr	r1, .L11+28
 129 005c 0A40     		ands	r2, r1
 130 005e 9A62     		str	r2, [r3, #40]
 131              	.LBE41:
 132              	.LBE40:
 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 133              		.loc 1 140 0
 134 0060 0120     		movs	r0, #1
 135              	.LVL10:
 136 0062 E6E7     		b	.L3
 137              	.LVL11:
ARM GAS  /tmp/ccZXt8KR.s 			page 23


 138              	.L10:
 139              	.LBB42:
 140              	.LBB43:
 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 141              		.loc 2 613 0
 142 0064 094B     		ldr	r3, .L11+16
 143 0066 996A     		ldr	r1, [r3, #40]
 144 0068 8022     		movs	r2, #128
 145 006a 5203     		lsls	r2, r2, #13
 146 006c 0A43     		orrs	r2, r1
 147 006e 9A62     		str	r2, [r3, #40]
 148              	.LVL12:
 149              	.LBE43:
 150              	.LBE42:
 151              	.LBB44:
 152              	.LBB45:
 664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 153              		.loc 2 664 0
 154 0070 9A6A     		ldr	r2, [r3, #40]
 155 0072 0A49     		ldr	r1, .L11+32
 156 0074 0A40     		ands	r2, r1
 157 0076 9A62     		str	r2, [r3, #40]
 158              	.LBE45:
 159              	.LBE44:
 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 160              		.loc 1 140 0
 161 0078 0120     		movs	r0, #1
 162              	.LVL13:
 163 007a DAE7     		b	.L3
 164              	.L12:
 165              		.align	2
 166              	.L11:
 167 007c 00380140 		.word	1073821696
 168 0080 00440040 		.word	1073759232
 169 0084 004C0040 		.word	1073761280
 170 0088 00500040 		.word	1073762304
 171 008c 00100240 		.word	1073876992
 172 0090 FFBFFFFF 		.word	-16385
 173 0094 FFFFFDFF 		.word	-131073
 174 0098 FFFFF7FF 		.word	-524289
 175 009c FFFFEFFF 		.word	-1048577
 176              		.cfi_endproc
 177              	.LFE413:
 179              		.global	__aeabi_uidiv
 180              		.section	.text.LL_USART_Init,"ax",%progbits
 181              		.align	1
 182              		.global	LL_USART_Init
 183              		.syntax unified
 184              		.code	16
 185              		.thumb_func
 186              		.fpu softvfp
 188              	LL_USART_Init:
 189              	.LFB414:
 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /**
 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @brief  Initialize USART registers according to the specified
 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *         parameters in USART_InitStruct.
ARM GAS  /tmp/ccZXt8KR.s 			page 24


 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @note   As some bits in USART configuration registers can only be written when the USART is dis
 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR resu
 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different f
 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @param  USARTx USART Instance
 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @param  USART_InitStruct: pointer to a LL_USART_InitTypeDef structure
 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *         that contains the configuration information for the specified USART peripheral.
 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @retval An ErrorStatus enumeration value:
 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *          - ERROR: Problem occurred during USART Registers initialization
 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** {
 190              		.loc 1 209 0
 191              		.cfi_startproc
 192              		@ args = 0, pretend = 0, frame = 16
 193              		@ frame_needed = 0, uses_anonymous_args = 0
 194              	.LVL14:
 195 0000 30B5     		push	{r4, r5, lr}
 196              	.LCFI0:
 197              		.cfi_def_cfa_offset 12
 198              		.cfi_offset 4, -12
 199              		.cfi_offset 5, -8
 200              		.cfi_offset 14, -4
 201 0002 85B0     		sub	sp, sp, #20
 202              	.LCFI1:
 203              		.cfi_def_cfa_offset 32
 204 0004 0400     		movs	r4, r0
 205 0006 0D00     		movs	r5, r1
 206              	.LVL15:
 207              	.LBB46:
 208              	.LBB47:
 209              		.file 3 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h"
   1:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
   2:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   ******************************************************************************
   3:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @file    stm32l0xx_ll_usart.h
   4:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @author  MCD Application Team
   5:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief   Header file of USART LL module.
   6:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   ******************************************************************************
   7:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @attention
   8:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *
   9:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *
  11:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * Redistribution and use in source and binary forms, with or without modification,
  12:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * are permitted provided that the following conditions are met:
  13:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *   1. Redistributions of source code must retain the above copyright notice,
  14:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *      this list of conditions and the following disclaimer.
  15:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
  16:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *      this list of conditions and the following disclaimer in the documentation
  17:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *      and/or other materials provided with the distribution.
  18:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  19:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *      may be used to endorse or promote products derived from this software
  20:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *      without specific prior written permission.
  21:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *
  22:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ARM GAS  /tmp/ccZXt8KR.s 			page 25


  26:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *
  33:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   ******************************************************************************
  34:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
  35:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  36:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Define to prevent recursive inclusion -------------------------------------*/
  37:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #ifndef __STM32L0xx_LL_USART_H
  38:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define __STM32L0xx_LL_USART_H
  39:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  40:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #ifdef __cplusplus
  41:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** extern "C" {
  42:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #endif
  43:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  44:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Includes ------------------------------------------------------------------*/
  45:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #include "stm32l0xx.h"
  46:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  47:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @addtogroup STM32L0xx_LL_Driver
  48:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
  49:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
  50:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  51:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #if defined (USART1) || defined (USART2) || defined (USART4) || defined (USART5)
  52:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  53:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL USART
  54:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
  55:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
  56:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  57:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Private types -------------------------------------------------------------*/
  58:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Private variables ---------------------------------------------------------*/
  59:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  60:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Private constants ---------------------------------------------------------*/
  61:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_Private_Constants USART Private Constants
  62:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
  63:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
  64:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  65:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Defines used for the bit position in the register and perform offsets*/
  66:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define USART_POSITION_CR1_DEDT                 (uint32_t)16
  67:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define USART_POSITION_CR1_DEAT                 (uint32_t)21
  68:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define USART_POSITION_CR2_ADD                  (uint32_t)24
  69:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define USART_POSITION_CR3_SCARCNT              (uint32_t)17
  70:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define USART_POSITION_RTOR_BLEN                (uint32_t)24
  71:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define USART_POSITION_GTPR_GT                  (uint32_t)8
  72:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
  73:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
  74:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
  75:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  76:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Private macros ------------------------------------------------------------*/
  77:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER)
  78:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_Private_Macros USART Private Macros
  79:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
  80:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
  81:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
  82:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
ARM GAS  /tmp/ccZXt8KR.s 			page 26


  83:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
  84:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #endif /*USE_FULL_LL_DRIVER*/
  85:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  86:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Exported types ------------------------------------------------------------*/
  87:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER)
  88:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_ES_INIT USART Exported Init structures
  89:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
  90:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
  91:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  92:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
  93:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief LL USART Init Structure definition
  94:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
  95:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** typedef struct
  96:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
  97:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t BaudRate;                  /*!< This field defines expected Usart communication baud rat
  98:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
  99:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This feature can be modified afterwards using unitary fu
 100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t DataWidth;                 /*!< Specifies the number of data bits transmitted or receive
 102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_DATAWI
 103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This feature can be modified afterwards using unitary fu
 105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t StopBits;                  /*!< Specifies the number of stop bits transmitted.
 107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_STOPBI
 108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This feature can be modified afterwards using unitary fu
 110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t Parity;                    /*!< Specifies the parity mode.
 112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_PARITY
 113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This feature can be modified afterwards using unitary fu
 115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t TransferDirection;         /*!< Specifies whether the Receive and/or Transmit mode is en
 117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_DIRECT
 118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This feature can be modified afterwards using unitary fu
 120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t HardwareFlowControl;       /*!< Specifies whether the hardware flow control mode is enab
 122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_HWCONT
 123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This feature can be modified afterwards using unitary fu
 125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t OverSampling;              /*!< Specifies whether USART oversampling mode is 16 or 8.
 127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_OVERSA
 128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This feature can be modified afterwards using unitary fu
 130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** } LL_USART_InitTypeDef;
 132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief LL USART Clock Init Structure definition
 135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** typedef struct
 137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t ClockOutput;               /*!< Specifies whether the USART clock is enabled or disabled
 139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_CLOCK.
ARM GAS  /tmp/ccZXt8KR.s 			page 27


 140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            USART HW configuration can be modified afterwards using 
 142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_Disabl
 143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            For more details, refer to description of this function.
 144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t ClockPolarity;             /*!< Specifies the steady state of the serial clock.
 146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_POLARI
 147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            USART HW configuration can be modified afterwards using 
 149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            For more details, refer to description of this function.
 150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t ClockPhase;                /*!< Specifies the clock transition on which the bit capture 
 152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_PHASE.
 153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            USART HW configuration can be modified afterwards using 
 155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            For more details, refer to description of this function.
 156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   uint32_t LastBitClockPulse;         /*!< Specifies whether the clock pulse corresponding to the l
 158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            data bit (MSB) has to be output on the SCLK pin in synch
 159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            This parameter can be a value of @ref USART_LL_EC_LASTCL
 160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            USART HW configuration can be modified afterwards using 
 162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                            For more details, refer to description of this function.
 163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** } LL_USART_ClockInitTypeDef;
 165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #endif /* USE_FULL_LL_DRIVER */
 170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Exported constants --------------------------------------------------------*/
 172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Constants USART Exported Constants
 173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_CLEAR_FLAG Clear Flags Defines
 177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief    Flags defines which can be used with LL_USART_WriteReg function
 178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_PECF                       USART_ICR_PECF                /*!< Parity error fla
 181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_FECF                       USART_ICR_FECF                /*!< Framing error fl
 182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_NCF                        USART_ICR_NCF                 /*!< Noise detected f
 183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_ORECF                      USART_ICR_ORECF               /*!< Overrun error fl
 184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_IDLECF                     USART_ICR_IDLECF              /*!< Idle line detect
 185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_TCCF                       USART_ICR_TCCF                /*!< Transmission com
 186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
 187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_TCBGTCF                    USART_ICR_TCBGTCF             /*!< Transmission com
 188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #endif
 189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_LBDCF                      USART_ICR_LBDCF               /*!< LIN break detect
 190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_CTSCF                      USART_ICR_CTSCF               /*!< CTS flag */
 191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_RTOCF                      USART_ICR_RTOCF               /*!< Receiver timeout
 192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_EOBCF                      USART_ICR_EOBCF               /*!< End of block fla
 193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_CMCF                       USART_ICR_CMCF                /*!< Character match 
 194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ICR_WUCF                       USART_ICR_WUCF                /*!< Wakeup from Stop
 195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
ARM GAS  /tmp/ccZXt8KR.s 			page 28


 197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
 200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief    Flags defines which can be used with LL_USART_ReadReg function
 201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_PE                         USART_ISR_PE                  /*!< Parity error fla
 204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_FE                         USART_ISR_FE                  /*!< Framing error fl
 205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_NE                         USART_ISR_NE                  /*!< Noise detected f
 206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_ORE                        USART_ISR_ORE                 /*!< Overrun error fl
 207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_IDLE                       USART_ISR_IDLE                /*!< Idle line detect
 208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_RXNE                       USART_ISR_RXNE                /*!< Read data regist
 209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_TC                         USART_ISR_TC                  /*!< Transmission com
 210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_TXE                        USART_ISR_TXE                 /*!< Transmit data re
 211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_LBDF                       USART_ISR_LBDF                /*!< LIN break detect
 212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_CTSIF                      USART_ISR_CTSIF               /*!< CTS interrupt fl
 213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_CTS                        USART_ISR_CTS                 /*!< CTS flag */
 214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_RTOF                       USART_ISR_RTOF                /*!< Receiver timeout
 215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_EOBF                       USART_ISR_EOBF                /*!< End of block fla
 216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_ABRE                       USART_ISR_ABRE                /*!< Auto baud rate e
 217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_ABRF                       USART_ISR_ABRF                /*!< Auto baud rate f
 218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_BUSY                       USART_ISR_BUSY                /*!< Busy flag */
 219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_CMF                        USART_ISR_CMF                 /*!< Character match 
 220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_SBKF                       USART_ISR_SBKF                /*!< Send break flag 
 221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_RWU                        USART_ISR_RWU                 /*!< Receiver wakeup 
 222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_WUF                        USART_ISR_WUF                 /*!< Wakeup from Stop
 223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_TEACK                      USART_ISR_TEACK               /*!< Transmit enable 
 224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_REACK                      USART_ISR_REACK               /*!< Receive enable a
 225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
 226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ISR_TCBGT                      USART_ISR_TCBGT               /*!< Transmission com
 227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #endif
 228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_IT IT Defines
 233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief    IT defines which can be used with LL_USART_ReadReg and  LL_USART_WriteReg functions
 234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR1_IDLEIE                     USART_CR1_IDLEIE              /*!< IDLE interrupt e
 237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR1_RXNEIE                     USART_CR1_RXNEIE              /*!< Read data regist
 238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR1_TCIE                       USART_CR1_TCIE                /*!< Transmission com
 239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR1_TXEIE                      USART_CR1_TXEIE               /*!< Transmit data re
 240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR1_PEIE                       USART_CR1_PEIE                /*!< Parity error */
 241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR1_CMIE                       USART_CR1_CMIE                /*!< Character match 
 242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR1_RTOIE                      USART_CR1_RTOIE               /*!< Receiver timeout
 243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR1_EOBIE                      USART_CR1_EOBIE               /*!< End of Block int
 244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR2_LBDIE                      USART_CR2_LBDIE               /*!< LIN break detect
 245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR3_EIE                        USART_CR3_EIE                 /*!< Error interrupt 
 246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR3_CTSIE                      USART_CR3_CTSIE               /*!< CTS interrupt en
 247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR3_WUFIE                      USART_CR3_WUFIE               /*!< Wakeup from Stop
 248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
 249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CR3_TCBGTIE                    USART_CR3_TCBGTIE             /*!< Transmission com
 250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #endif
 251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
ARM GAS  /tmp/ccZXt8KR.s 			page 29


 254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_DIRECTION Communication Direction
 256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DIRECTION_NONE                 (uint32_t)0x00000000U              /*!< Transmitter
 259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DIRECTION_RX                   USART_CR1_RE                       /*!< Transmitter
 260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DIRECTION_TX                   USART_CR1_TE                       /*!< Transmitter
 261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DIRECTION_TX_RX                (USART_CR1_TE |USART_CR1_RE)       /*!< Transmitter
 262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_PARITY Parity Control
 267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_PARITY_NONE                    (uint32_t)0x00000000U                /*!< Parity co
 270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_PARITY_EVEN                    USART_CR1_PCE                        /*!< Parity co
 271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_PARITY_ODD                     (USART_CR1_PCE | USART_CR1_PS)       /*!< Parity co
 272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_WAKEUP Wakeup
 277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_WAKEUP_IDLELINE                (uint32_t)0x00000000U /*!<  USART wake up from Mute
 280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_WAKEUP_ADDRESSMARK             USART_CR1_WAKE        /*!<  USART wake up from Mute
 281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_DATAWIDTH Datawidth
 286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DATAWIDTH_7B                   USART_CR1_M1            /*!< 7 bits word length : S
 289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DATAWIDTH_8B                   (uint32_t)0x00000000U   /*!< 8 bits word length : S
 290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DATAWIDTH_9B                   USART_CR1_M0            /*!< 9 bits word length : S
 291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
 296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_OVERSAMPLING_16                (uint32_t)0x00000000U  /*!< Oversampling by 16 */
 299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_OVERSAMPLING_8                 USART_CR1_OVER8        /*!< Oversampling by 8 */
 300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER)
 305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_CLOCK Clock Signal
 306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CLOCK_DISABLE                  (uint32_t)0x00000000U  /*!< Clock signal not provid
 310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_CLOCK_ENABLE                   USART_CR2_CLKEN        /*!< Clock signal provided *
ARM GAS  /tmp/ccZXt8KR.s 			page 30


 311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #endif /*USE_FULL_LL_DRIVER*/
 315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
 317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_LASTCLKPULSE_NO_OUTPUT         (uint32_t)0x00000000U /*!< The clock pulse of the l
 320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_LASTCLKPULSE_OUTPUT            USART_CR2_LBCL        /*!< The clock pulse of the l
 321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_PHASE Clock Phase
 326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_PHASE_1EDGE                    (uint32_t)0x00000000U /*!< The first clock transiti
 329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_PHASE_2EDGE                    USART_CR2_CPHA        /*!< The second clock transit
 330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_POLARITY Clock Polarity
 335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_POLARITY_LOW                   (uint32_t)0x00000000U /*!< Steady low value on SCLK
 338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_POLARITY_HIGH                  USART_CR2_CPOL        /*!< Steady high value on SCL
 339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_STOPBITS Stop Bits
 344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_STOPBITS_0_5                   USART_CR2_STOP_0                           /*!< 0.5
 347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_STOPBITS_1                     (uint32_t)0x00000000U                      /*!< 1 s
 348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_STOPBITS_1_5                   (USART_CR2_STOP_0 | USART_CR2_STOP_1)      /*!< 1.5
 349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_STOPBITS_2                     USART_CR2_STOP_1                           /*!< 2 s
 350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_TXRX TX RX Pins Swap
 355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_TXRX_STANDARD                  (uint32_t)0x00000000U /*!< TX/RX pins are used as d
 358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_TXRX_SWAPPED                   (USART_CR2_SWAP)      /*!< TX and RX pins functions
 359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
 364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_RXPIN_LEVEL_STANDARD           (uint32_t)0x00000000U /*!< RX pin signal works usin
 367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_RXPIN_LEVEL_INVERTED           (USART_CR2_RXINV)     /*!< RX pin signal values are
ARM GAS  /tmp/ccZXt8KR.s 			page 31


 368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
 373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_TXPIN_LEVEL_STANDARD           (uint32_t)0x00000000U /*!< TX pin signal works usin
 376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_TXPIN_LEVEL_INVERTED           (USART_CR2_TXINV)     /*!< TX pin signal values are
 377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_BINARY_LOGIC Binary Data Inversion
 382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_BINARY_LOGIC_POSITIVE          (uint32_t)0x00000000U /*!< Logical data from the da
 385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_BINARY_LOGIC_NEGATIVE          USART_CR2_DATAINV     /*!< Logical data from the da
 386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_BITORDER Bit Order
 391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_BITORDER_LSBFIRST              (uint32_t)0x00000000U /*!< data is transmitted/rece
 394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_BITORDER_MSBFIRST              USART_CR2_MSBFIRST    /*!< data is transmitted/rece
 395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_AUTOBAUD_DETECT_ON Autobaud Detection
 400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_STARTBIT    (uint32_t)0x00000000U                       /*!< Me
 403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0                         /*!< Fa
 404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME    USART_CR2_ABRMODE_1                         /*!< 0x
 405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME    (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0) /*!< 0x
 406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_ADDRESS_DETECT Address Length Detection
 411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ADDRESS_DETECT_4B              (uint32_t)0x00000000U /*!< 4-bit address detection 
 414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ADDRESS_DETECT_7B              USART_CR2_ADDM7       /*!< 7-bit address detection 
 415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_HWCONTROL Hardware Control
 420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_HWCONTROL_NONE                 (uint32_t)0x00000000U                /*!< CTS and R
 423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_HWCONTROL_RTS                  USART_CR3_RTSE                       /*!< RTS outpu
 424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_HWCONTROL_CTS                  USART_CR3_CTSE                       /*!< CTS mode 
ARM GAS  /tmp/ccZXt8KR.s 			page 32


 425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_HWCONTROL_RTS_CTS              (USART_CR3_RTSE | USART_CR3_CTSE)    /*!< CTS and R
 426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_WAKEUP_ON Wakeup Activation
 431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_ADDRESS              (uint32_t)0x00000000U                   /*!< Wake u
 434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_STARTBIT             USART_CR3_WUS_1                         /*!< Wake u
 435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_RXNE                 (USART_CR3_WUS_0 | USART_CR3_WUS_1)     /*!< Wake u
 436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
 441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_IRDA_POWER_NORMAL              (uint32_t)0x00000000U /*!< IrDA normal power mode *
 444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_IRDA_POWER_LOW                 USART_CR3_IRLP        /*!< IrDA low power mode */
 445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
 450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_LINBREAK_DETECT_10B            (uint32_t)0x00000000U /*!< 10-bit break detection m
 453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_LINBREAK_DETECT_11B            USART_CR2_LBDL        /*!< 11-bit break detection m
 454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_DE_POLARITY Driver Enable Polarity
 459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DE_POLARITY_HIGH               (uint32_t)0x00000000U /*!< DE signal is active high
 462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DE_POLARITY_LOW                USART_CR3_DEP         /*!< DE signal is active low 
 463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EC_DMA_REG_DATA DMA Register Data
 468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DMA_REG_DATA_TRANSMIT          (uint32_t)0U          /*!< Get address of data regi
 471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_DMA_REG_DATA_RECEIVE           (uint32_t)1U          /*!< Get address of data regi
 472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Exported macro ------------------------------------------------------------*/
 481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Macros USART Exported Macros
ARM GAS  /tmp/ccZXt8KR.s 			page 33


 482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
 486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Write a value in USART register
 491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  __INSTANCE__ USART Instance
 492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  __REG__ Register to be written
 493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  __VALUE__ Value to be written in the register
 494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VAL
 497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Read a value in USART register
 500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  __INSTANCE__ USART Instance
 501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  __REG__ Register to be read
 502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Register value
 503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
 505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
 510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Compute USARTDIV value according to Peripheral Clock and
 515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
 516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  __PERIPHCLK__ Peripheral Clock frequency used for USART instance
 517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  __BAUDRATE__ Baud rate value to achieve
 518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
 519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) ((((__PERIPHCLK__)*2) + ((__BAUDRATE_
 521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Compute USARTDIV value according to Peripheral Clock and
 524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
 525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  __PERIPHCLK__ Peripheral Clock frequency used for USART instance
 526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  __BAUDRATE__ Baud rate value to achieve
 527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
 528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__) + ((__BAUDRATE__)/
 530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @}
 537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
ARM GAS  /tmp/ccZXt8KR.s 			page 34


 539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /* Exported functions --------------------------------------------------------*/
 540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Functions USART Exported Functions
 542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration Configuration functions
 546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @{
 547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  USART Enable
 551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          UE            LL_USART_Enable
 552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
 556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR1, USART_CR1_UE);
 558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  USART Disable (all USART prescalers and outputs are disabled)
 562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   When USART is disabled, USART prescalers and outputs are stopped immediately,
 563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         and current operations are discarded. The configuration of the USART is kept, but all t
 564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         flags, in the USARTx_ISR are set to their default values.
 565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          UE            LL_USART_Disable
 566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
 570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
 572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Indicate if USART is enabled
 576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          UE            LL_USART_IsEnabled
 577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
 581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
 210              		.loc 3 582 0
 211 0008 0368     		ldr	r3, [r0]
 212              	.LVL16:
 213              	.LBE47:
 214              	.LBE46:
 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   ErrorStatus status = ERROR;
 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if (defined(USART4) || defined(USART5))
 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   LL_RCC_ClocksTypeDef RCC_Clocks;
 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif
 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   /* Check the parameters */
 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_UART_INSTANCE(USARTx));
ARM GAS  /tmp/ccZXt8KR.s 			page 35


 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   /* USART needs to be in disabled state, in order to be able to configure some bits in
 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      CRx registers */
 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   if (LL_USART_IsEnabled(USARTx) == 0U)
 215              		.loc 1 228 0
 216 000a DB07     		lsls	r3, r3, #31
 217 000c 57D4     		bmi	.L20
 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   {
 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /*---------------------------- USART CR1 Configuration -----------------------
 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters
 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity
 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->Transfe
 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      */
 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     MODIFY_REG(USARTx->CR1,
 218              		.loc 1 237 0
 219 000e 0368     		ldr	r3, [r0]
 220 0010 2E4A     		ldr	r2, .L29
 221 0012 1A40     		ands	r2, r3
 222 0014 4B68     		ldr	r3, [r1, #4]
 223 0016 C968     		ldr	r1, [r1, #12]
 224              	.LVL17:
 225 0018 0B43     		orrs	r3, r1
 226 001a 2969     		ldr	r1, [r5, #16]
 227 001c 0B43     		orrs	r3, r1
 228 001e A969     		ldr	r1, [r5, #24]
 229 0020 0B43     		orrs	r3, r1
 230 0022 1343     		orrs	r3, r2
 231 0024 0360     		str	r3, [r0]
 232              	.LVL18:
 233              	.LBB48:
 234              	.LBB49:
 583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  USART enabled in STOP Mode.
 587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   When this function is enabled, USART is able to wake up the MCU from Stop mode, provide
 588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         USART clock selection is HSI or LSE in RCC.
 589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
 590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Wake-up from Stop mode feature is supported by the USARTx instance.
 591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          UESM          LL_USART_EnableInStopMode
 592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx)
 596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR1, USART_CR1_UESM);
 598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
ARM GAS  /tmp/ccZXt8KR.s 			page 36


 600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  USART disabled in STOP Mode.
 602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   When this function is disabled, USART is not able to wake up the MCU from Stop mode
 603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
 604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Wake-up from Stop mode feature is supported by the USARTx instance.
 605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          UESM          LL_USART_DisableInStopMode
 606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx)
 610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR1, USART_CR1_UESM);
 612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not)
 616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
 617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Wake-up from Stop mode feature is supported by the USARTx instance.
 618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          UESM          LL_USART_IsEnabledInStopMode
 619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(USART_TypeDef *USARTx)
 623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (READ_BIT(USARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM));
 625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Receiver Enable (Receiver is enabled and begins searching for a start bit)
 629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          RE            LL_USART_EnableDirectionRx
 630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
 634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR1, USART_CR1_RE);
 636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Receiver Disable
 640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          RE            LL_USART_DisableDirectionRx
 641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
 645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
 647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Transmitter Enable
 651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          TE            LL_USART_EnableDirectionTx
 652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
 656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
ARM GAS  /tmp/ccZXt8KR.s 			page 37


 657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR1, USART_CR1_TE);
 658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Transmitter Disable
 662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          TE            LL_USART_DisableDirectionTx
 663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
 667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
 669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure simultaneously enabled/disabled states
 673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         of Transmitter and Receiver
 674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          RE            LL_USART_SetTransferDirection\n
 675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR1          TE            LL_USART_SetTransferDirection
 676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  TransferDirection This parameter can be one of the following values:
 678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DIRECTION_NONE
 679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DIRECTION_RX
 680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DIRECTION_TX
 681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DIRECTION_TX_RX
 682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirectio
 685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
 687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return enabled/disabled states of Transmitter and Receiver
 691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          RE            LL_USART_GetTransferDirection\n
 692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR1          TE            LL_USART_GetTransferDirection
 693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DIRECTION_NONE
 696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DIRECTION_RX
 697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DIRECTION_TX
 698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DIRECTION_TX_RX
 699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
 701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
 703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure Parity (enabled/disabled and parity mode if enabled).
 707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   This function selects if hardware parity control (generation and detection) is enabled 
 708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         When the parity control is enabled (Odd or Even), computed parity bit is inserted at th
 709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         (9th or 8th bit depending on data width) and parity is checked on the received data.
 710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          PS            LL_USART_SetParity\n
 711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR1          PCE           LL_USART_SetParity
 712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  Parity This parameter can be one of the following values:
ARM GAS  /tmp/ccZXt8KR.s 			page 38


 714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_NONE
 715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_EVEN
 716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_ODD
 717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
 720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
 722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return Parity configuration (enabled/disabled and parity mode if enabled)
 726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          PS            LL_USART_GetParity\n
 727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR1          PCE           LL_USART_GetParity
 728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_NONE
 731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_EVEN
 732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_ODD
 733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
 735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
 737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Set Receiver Wake Up method from Mute mode.
 741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          WAKE          LL_USART_SetWakeUpMethod
 742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  Method This parameter can be one of the following values:
 744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_IDLELINE
 745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_ADDRESSMARK
 746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
 749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
 751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return Receiver Wake Up method from Mute mode
 755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          WAKE          LL_USART_GetWakeUpMethod
 756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_IDLELINE
 759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_ADDRESSMARK
 760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
 762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
 764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Set Word length (i.e. nb of data bits, excluding start and stop bits)
 768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          M0            LL_USART_SetDataWidth\n
 769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR1          M1            LL_USART_SetDataWidth
 770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
ARM GAS  /tmp/ccZXt8KR.s 			page 39


 771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  DataWidth This parameter can be one of the following values:
 772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DATAWIDTH_7B
 773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DATAWIDTH_8B
 774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DATAWIDTH_9B
 775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
 778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
 780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return Word length (i.e. nb of data bits, excluding start and stop bits)
 784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          M0            LL_USART_GetDataWidth\n
 785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR1          M1            LL_USART_GetDataWidth
 786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DATAWIDTH_7B
 789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DATAWIDTH_8B
 790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DATAWIDTH_9B
 791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
 793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
 795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Allow switch between Mute Mode and Active mode
 799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          MME           LL_USART_EnableMuteMode
 800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx)
 804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR1, USART_CR1_MME);
 806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Prevent Mute Mode use. Set Receiver in active mode permanently.
 810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          MME           LL_USART_DisableMuteMode
 811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx)
 815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR1, USART_CR1_MME);
 817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Indicate if switch between Mute Mode and Active mode is allowed
 821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          MME           LL_USART_IsEnabledMuteMode
 822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval State of bit (1 or 0).
 824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(USART_TypeDef *USARTx)
 826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
ARM GAS  /tmp/ccZXt8KR.s 			page 40


 828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Set Oversampling to 8-bit or 16-bit mode
 832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          OVER8         LL_USART_SetOverSampling
 833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  OverSampling This parameter can be one of the following values:
 835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_OVERSAMPLING_16
 836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_OVERSAMPLING_8
 837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
 840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
 842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return Oversampling mode
 846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          OVER8         LL_USART_GetOverSampling
 847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_OVERSAMPLING_16
 850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_OVERSAMPLING_8
 851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
 853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
 855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure if Clock pulse of the last data bit is output to the SCLK pin or not
 859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
 860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
 861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          LBCL          LL_USART_SetLastClkPulseOutput
 862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  LastBitClockPulse This parameter can be one of the following values:
 864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
 865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
 866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPul
 869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
 871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Retrieve Clock pulse of the last data bit output configuration
 875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         (Last bit Clock pulse output to the SCLK pin or not)
 876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
 877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
 878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          LBCL          LL_USART_GetLastClkPulseOutput
 879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
 882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
 883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
ARM GAS  /tmp/ccZXt8KR.s 			page 41


 885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
 887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Select the phase of the clock output on the SCLK pin in synchronous mode
 891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
 892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
 893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          CPHA          LL_USART_SetClockPhase
 894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  ClockPhase This parameter can be one of the following values:
 896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_1EDGE
 897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_2EDGE
 898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
 901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
 903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return phase of the clock output on the SCLK pin in synchronous mode
 907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
 908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
 909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          CPHA          LL_USART_GetClockPhase
 910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_1EDGE
 913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_2EDGE
 914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
 916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
 918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 919:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 920:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 921:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Select the polarity of the clock output on the SCLK pin in synchronous mode
 922:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
 923:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
 924:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          CPOL          LL_USART_SetClockPolarity
 925:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 926:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  ClockPolarity This parameter can be one of the following values:
 927:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_POLARITY_LOW
 928:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_POLARITY_HIGH
 929:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 930:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 931:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
 932:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 933:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
 934:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 935:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 936:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 937:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return polarity of the clock output on the SCLK pin in synchronous mode
 938:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
 939:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
 940:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          CPOL          LL_USART_GetClockPolarity
 941:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
ARM GAS  /tmp/ccZXt8KR.s 			page 42


 942:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
 943:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_POLARITY_LOW
 944:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_POLARITY_HIGH
 945:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 946:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
 947:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 948:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
 949:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 950:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 951:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 952:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure Clock signal format (Phase Polarity and choice about output of last bit clock
 953:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
 954:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
 955:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Call of this function is equivalent to following function call sequence :
 956:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
 957:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
 958:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutpu
 959:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          CPHA          LL_USART_ConfigClock\n
 960:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR2          CPOL          LL_USART_ConfigClock\n
 961:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR2          LBCL          LL_USART_ConfigClock
 962:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 963:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  Phase This parameter can be one of the following values:
 964:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_1EDGE
 965:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PHASE_2EDGE
 966:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  Polarity This parameter can be one of the following values:
 967:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_POLARITY_LOW
 968:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_POLARITY_HIGH
 969:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  LBCPOutput This parameter can be one of the following values:
 970:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
 971:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
 972:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 973:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 974:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity,
 975:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 976:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCP
 977:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 978:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 979:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 980:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Enable Clock output on SCLK pin
 981:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
 982:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
 983:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          CLKEN         LL_USART_EnableSCLKOutput
 984:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 985:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
 986:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
 987:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
 988:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
 989:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
 990:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 991:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
 992:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
 993:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Disable Clock output on SCLK pin
 994:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
 995:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
 996:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          CLKEN         LL_USART_DisableSCLKOutput
 997:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
 998:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
ARM GAS  /tmp/ccZXt8KR.s 			page 43


 999:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1000:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
1001:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1002:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
1003:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1004:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1005:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1006:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Indicate if Clock output on SCLK pin is enabled
1007:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
1008:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Synchronous mode is supported by the USARTx instance.
1009:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          CLKEN         LL_USART_IsEnabledSCLKOutput
1010:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1011:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval State of bit (1 or 0).
1012:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1013:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
1014:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1015:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
1016:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1017:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1018:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1019:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Set the length of the stop bits
1020:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          STOP          LL_USART_SetStopBitsLength
1021:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1022:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  StopBits This parameter can be one of the following values:
1023:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_0_5
1024:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_1
1025:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_1_5
1026:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_2
1027:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1028:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1029:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
1030:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1031:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
 235              		.loc 3 1031 0
 236 0026 4368     		ldr	r3, [r0, #4]
 237 0028 294A     		ldr	r2, .L29+4
 238 002a 1340     		ands	r3, r2
 239 002c AA68     		ldr	r2, [r5, #8]
 240 002e 1343     		orrs	r3, r2
 241 0030 4360     		str	r3, [r0, #4]
 242              	.LVL19:
 243              	.LBE49:
 244              	.LBE48:
 245              	.LBB50:
 246              	.LBB51:
1032:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1033:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1034:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1035:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Retrieve the length of the stop bits
1036:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          STOP          LL_USART_GetStopBitsLength
1037:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1038:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1039:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_0_5
1040:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_1
1041:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_1_5
1042:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_2
1043:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
ARM GAS  /tmp/ccZXt8KR.s 			page 44


1044:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
1045:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1046:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
1047:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1048:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1049:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1050:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure Character frame format (Datawidth, Parity control, Stop Bits)
1051:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Call of this function is equivalent to following function call sequence :
1052:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         - Data Width configuration using @ref LL_USART_SetDataWidth() function
1053:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         - Parity Control and mode configuration using @ref LL_USART_SetParity() function
1054:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
1055:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR1          PS            LL_USART_ConfigCharacter\n
1056:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR1          PCE           LL_USART_ConfigCharacter\n
1057:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR1          M0            LL_USART_ConfigCharacter\n
1058:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR1          M1            LL_USART_ConfigCharacter\n
1059:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR2          STOP          LL_USART_ConfigCharacter
1060:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1061:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  DataWidth This parameter can be one of the following values:
1062:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DATAWIDTH_7B
1063:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DATAWIDTH_8B
1064:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_DATAWIDTH_9B
1065:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  Parity This parameter can be one of the following values:
1066:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_NONE
1067:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_EVEN
1068:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_PARITY_ODD
1069:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  StopBits This parameter can be one of the following values:
1070:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_0_5
1071:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_1
1072:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_1_5
1073:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_STOPBITS_2
1074:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1075:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1076:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t P
1077:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                               uint32_t StopBits)
1078:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1079:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
1080:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
1081:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1082:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1083:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1084:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure TX/RX pins swapping setting.
1085:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          SWAP          LL_USART_SetTXRXSwap
1086:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1087:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  SwapConfig This parameter can be one of the following values:
1088:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_TXRX_STANDARD
1089:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_TXRX_SWAPPED
1090:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1091:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1092:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
1093:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1094:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig);
1095:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1096:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1097:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1098:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Retrieve TX/RX pins swapping configuration.
1099:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          SWAP          LL_USART_GetTXRXSwap
1100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
ARM GAS  /tmp/ccZXt8KR.s 			page 45


1101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_TXRX_STANDARD
1103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_TXRX_SWAPPED
1104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(USART_TypeDef *USARTx)
1106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_SWAP));
1108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure RX pin active level logic
1112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          RXINV         LL_USART_SetRXPinLevel
1113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  PinInvMethod This parameter can be one of the following values:
1115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_RXPIN_LEVEL_STANDARD
1116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_RXPIN_LEVEL_INVERTED
1117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetRXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
1120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_RXINV, PinInvMethod);
1122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Retrieve RX pin active level logic configuration
1126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          RXINV         LL_USART_GetRXPinLevel
1127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_RXPIN_LEVEL_STANDARD
1130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_RXPIN_LEVEL_INVERTED
1131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(USART_TypeDef *USARTx)
1133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV));
1135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure TX pin active level logic
1139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          TXINV         LL_USART_SetTXPinLevel
1140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  PinInvMethod This parameter can be one of the following values:
1142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_TXPIN_LEVEL_STANDARD
1143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_TXPIN_LEVEL_INVERTED
1144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
1147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod);
1149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Retrieve TX pin active level logic configuration
1153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          TXINV         LL_USART_GetTXPinLevel
1154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_TXPIN_LEVEL_STANDARD
1157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_TXPIN_LEVEL_INVERTED
ARM GAS  /tmp/ccZXt8KR.s 			page 46


1158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(USART_TypeDef *USARTx)
1160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV));
1162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure Binary data logic.
1166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Allow to define how Logical data from the data register are send/received :
1167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
1168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          DATAINV       LL_USART_SetBinaryDataLogic
1169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  DataLogic This parameter can be one of the following values:
1171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
1172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE
1173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetBinaryDataLogic(USART_TypeDef *USARTx, uint32_t DataLogic)
1176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_DATAINV, DataLogic);
1178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Retrieve Binary data configuration
1182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          DATAINV       LL_USART_GetBinaryDataLogic
1183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
1186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE
1187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(USART_TypeDef *USARTx)
1189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV));
1191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure transfer bit order (either Less or Most Significant Bit First)
1195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   MSB First means data is transmitted/received with the MSB first, following the start bi
1196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         LSB First means data is transmitted/received with data bit 0 first, following the start
1197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          MSBFIRST      LL_USART_SetTransferBitOrder
1198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  BitOrder This parameter can be one of the following values:
1200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_BITORDER_LSBFIRST
1201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_BITORDER_MSBFIRST
1202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
1205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
1207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return transfer bit order (either Less or Most Significant Bit First)
1211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   MSB First means data is transmitted/received with the MSB first, following the start bi
1212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         LSB First means data is transmitted/received with data bit 0 first, following the start
1213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          MSBFIRST      LL_USART_GetTransferBitOrder
1214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
ARM GAS  /tmp/ccZXt8KR.s 			page 47


1215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_BITORDER_LSBFIRST
1217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_BITORDER_MSBFIRST
1218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(USART_TypeDef *USARTx)
1220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_MSBFIRST));
1222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Enable Auto Baud-Rate Detection
1226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whethe
1227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Auto Baud Rate detection feature is supported by the USARTx instance.
1228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          ABREN         LL_USART_EnableAutoBaudRate
1229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx)
1233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR2, USART_CR2_ABREN);
1235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Disable Auto Baud-Rate Detection
1239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whethe
1240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Auto Baud Rate detection feature is supported by the USARTx instance.
1241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          ABREN         LL_USART_DisableAutoBaudRate
1242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
1246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN);
1248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Indicate if Auto Baud-Rate Detection mechanism is enabled
1252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whethe
1253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Auto Baud Rate detection feature is supported by the USARTx instance.
1254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          ABREN         LL_USART_IsEnabledAutoBaud
1255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval State of bit (1 or 0).
1257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaud(USART_TypeDef *USARTx)
1259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN));
1261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Set Auto Baud-Rate mode bits
1265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whethe
1266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Auto Baud Rate detection feature is supported by the USARTx instance.
1267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          ABRMODE       LL_USART_SetAutoBaudRateMode
1268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  AutoBaudRateMode This parameter can be one of the following values:
1270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT
1271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE
ARM GAS  /tmp/ccZXt8KR.s 			page 48


1272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME
1273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME
1274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode)
1277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_ABRMODE, AutoBaudRateMode);
1279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return Auto Baud-Rate mode
1283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whethe
1284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Auto Baud Rate detection feature is supported by the USARTx instance.
1285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          ABRMODE       LL_USART_GetAutoBaudRateMode
1286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_STARTBIT
1289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE
1290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME
1291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME
1292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(USART_TypeDef *USARTx)
1294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
1296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Enable Receiver Timeout
1300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          RTOEN         LL_USART_EnableRxTimeout
1301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx)
1305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR2, USART_CR2_RTOEN);
1307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Disable Receiver Timeout
1311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          RTOEN         LL_USART_DisableRxTimeout
1312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableRxTimeout(USART_TypeDef *USARTx)
1316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN);
1318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Indicate if Receiver Timeout feature is enabled
1322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          RTOEN         LL_USART_IsEnabledRxTimeout
1323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval State of bit (1 or 0).
1325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledRxTimeout(USART_TypeDef *USARTx)
1327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN));
ARM GAS  /tmp/ccZXt8KR.s 			page 49


1329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Set Address of the USART node.
1333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   This is used in multiprocessor communication during Mute mode or Stop mode,
1334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         for wake up with address mark detection.
1335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   4bits address node is used when 4-bit Address Detection is selected in ADDM7.
1336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         (b7-b4 should be set to 0)
1337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         8bits address node is used when 7-bit Address Detection is selected in ADDM7.
1338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         (This is used in multiprocessor communication during Mute mode or Stop mode,
1339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         for wake up with 7-bit address mark detection.
1340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         The MSB of the character sent by the transmitter should be equal to 1.
1341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         It may also be used for character detection during normal reception,
1342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Mute mode inactive (for example, end of block detection in ModBus protocol).
1343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         In this case, the whole received character (8-bit) is compared to the ADD[7:0]
1344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         value and CMF flag is set on match)
1345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          ADD           LL_USART_ConfigNodeAddress\n
1346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR2          ADDM7         LL_USART_ConfigNodeAddress
1347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  AddressLen This parameter can be one of the following values:
1349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_ADDRESS_DETECT_4B
1350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_ADDRESS_DETECT_7B
1351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  NodeAddress 4 or 7 bit Address of the USART node.
1352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_
1355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
1357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****              (uint32_t)(AddressLen | (NodeAddress << USART_POSITION_CR2_ADD)));
1358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return 8 bit Address of the USART node as set in ADD field of CR2.
1362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   If 4-bit Address Detection is selected in ADDM7,
1363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
1364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         If 7-bit Address Detection is selected in ADDM7,
1365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
1366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          ADD           LL_USART_GetNodeAddress
1367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
1369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
1371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD) >> USART_POSITION_CR2_ADD);
1373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
1377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR2          ADDM7         LL_USART_GetNodeAddressLen
1378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_ADDRESS_DETECT_4B
1381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_ADDRESS_DETECT_7B
1382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetNodeAddressLen(USART_TypeDef *USARTx)
1384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7));
ARM GAS  /tmp/ccZXt8KR.s 			page 50


1386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Enable RTS HW Flow Control
1390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
1391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Hardware Flow control feature is supported by the USARTx instance.
1392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          RTSE          LL_USART_EnableRTSHWFlowCtrl
1393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR3, USART_CR3_RTSE);
1399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Disable RTS HW Flow Control
1403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
1404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Hardware Flow control feature is supported by the USARTx instance.
1405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          RTSE          LL_USART_DisableRTSHWFlowCtrl
1406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
1412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Enable CTS HW Flow Control
1416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
1417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Hardware Flow control feature is supported by the USARTx instance.
1418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          CTSE          LL_USART_EnableCTSHWFlowCtrl
1419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
1423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR3, USART_CR3_CTSE);
1425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Disable CTS HW Flow Control
1429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
1430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Hardware Flow control feature is supported by the USARTx instance.
1431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          CTSE          LL_USART_DisableCTSHWFlowCtrl
1432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
1436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
1438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure HW Flow Control mode (both CTS and RTS)
1442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
ARM GAS  /tmp/ccZXt8KR.s 			page 51


1443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Hardware Flow control feature is supported by the USARTx instance.
1444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          RTSE          LL_USART_SetHWFlowCtrl\n
1445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR3          CTSE          LL_USART_SetHWFlowCtrl
1446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  HardwareFlowControl This parameter can be one of the following values:
1448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_NONE
1449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_RTS
1450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_CTS
1451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_RTS_CTS
1452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
1455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
 247              		.loc 3 1456 0
 248 0032 8368     		ldr	r3, [r0, #8]
 249 0034 274A     		ldr	r2, .L29+8
 250 0036 1340     		ands	r3, r2
 251 0038 6A69     		ldr	r2, [r5, #20]
 252 003a 1343     		orrs	r3, r2
 253 003c 8360     		str	r3, [r0, #8]
 254              	.LVL20:
 255              	.LBE51:
 256              	.LBE50:
 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /*---------------------------- USART CR2 Configuration -----------------------
 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * Configure USARTx CR2 (Stop bits) with parameters:
 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      */
 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /*---------------------------- USART CR3 Configuration -----------------------
 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->Ha
 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      */
 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /*---------------------------- USART BRR Configuration -----------------------
 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      * Retrieve Clock frequency used for USART Peripheral
 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      */
 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined(USART1)
 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     if (USARTx == USART1)
 257              		.loc 1 260 0
 258 003e 264B     		ldr	r3, .L29+12
 259 0040 9842     		cmp	r0, r3
 260 0042 0AD0     		beq	.L24
 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     {
 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif /* USART1 */
 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined(USART1)
 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     else if (USARTx == USART2)
ARM GAS  /tmp/ccZXt8KR.s 			page 52


 261              		.loc 1 266 0
 262 0044 254B     		ldr	r3, .L29+16
 263 0046 9842     		cmp	r0, r3
 264 0048 1DD0     		beq	.L25
 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #else
 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     if (USARTx == USART2)
 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif
 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     {
 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined(USART4)
 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     else if (USARTx == USART4)
 265              		.loc 1 274 0
 266 004a 254B     		ldr	r3, .L29+20
 267 004c 9842     		cmp	r0, r3
 268 004e 1ED0     		beq	.L26
 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     {
 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       /* USART4 clock is PCLK1 */
 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       periphclk = RCC_Clocks.PCLK1_Frequency;
 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif /* USART4 */
 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #if defined(USART5)
 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     else if (USARTx == USART5)
 269              		.loc 1 282 0
 270 0050 244B     		ldr	r3, .L29+24
 271 0052 9842     		cmp	r0, r3
 272 0054 20D0     		beq	.L27
 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 273              		.loc 1 210 0
 274 0056 0020     		movs	r0, #0
 275              	.LVL21:
 276 0058 32E0     		b	.L14
 277              	.LVL22:
 278              	.L24:
 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 279              		.loc 1 262 0
 280 005a 0320     		movs	r0, #3
 281              	.LVL23:
 282 005c FFF7FEFF 		bl	LL_RCC_GetUSARTClockFreq
 283              	.LVL24:
 284              	.L16:
 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     {
 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       /* USART5 clock is PCLK1 */
 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       periphclk = RCC_Clocks.PCLK1_Frequency;
 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** #endif /* USART5 */
 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     else
 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     {
 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       /* Nothing to do, as error code is already assigned to ERROR value */
 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* Configure the USART Baud Rate :
 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        - valid baud rate value (different from 0) is required
 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        - Peripheral clock as returned by RCC service, should be valid (different from 0).
 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     */
ARM GAS  /tmp/ccZXt8KR.s 			page 53


 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
 285              		.loc 1 298 0
 286 0060 0028     		cmp	r0, #0
 287 0062 2FD0     		beq	.L22
 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****         && (USART_InitStruct->BaudRate != 0U))
 288              		.loc 1 299 0
 289 0064 2968     		ldr	r1, [r5]
 290 0066 0029     		cmp	r1, #0
 291 0068 2ED0     		beq	.L23
 292              	.LVL25:
 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     {
 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       status = SUCCESS;
 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       LL_USART_SetBaudRate(USARTx,
 293              		.loc 1 302 0
 294 006a AA69     		ldr	r2, [r5, #24]
 295              	.LVL26:
 296              	.LBB52:
 297              	.LBB53:
1457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return HW Flow Control configuration (both CTS and RTS)
1461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
1462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Hardware Flow control feature is supported by the USARTx instance.
1463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          RTSE          LL_USART_GetHWFlowCtrl\n
1464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         CR3          CTSE          LL_USART_GetHWFlowCtrl
1465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_NONE
1468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_RTS
1469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_CTS
1470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_HWCONTROL_RTS_CTS
1471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
1473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
1475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Enable One bit sampling method
1479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          ONEBIT        LL_USART_EnableOneBitSamp
1480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
1484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
1486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Disable One bit sampling method
1490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          ONEBIT        LL_USART_DisableOneBitSamp
1491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
1495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
ARM GAS  /tmp/ccZXt8KR.s 			page 54


1496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
1497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Indicate if One bit sampling method is enabled
1501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          ONEBIT        LL_USART_IsEnabledOneBitSamp
1502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval State of bit (1 or 0).
1504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
1506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
1508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Enable Overrun detection
1512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          OVRDIS        LL_USART_EnableOverrunDetect
1513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableOverrunDetect(USART_TypeDef *USARTx)
1517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);
1519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Disable Overrun detection
1523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          OVRDIS        LL_USART_DisableOverrunDetect
1524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
1528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);
1530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Indicate if Overrun detection is enabled
1534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          OVRDIS        LL_USART_IsEnabledOverrunDetect
1535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval State of bit (1 or 0).
1537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(USART_TypeDef *USARTx)
1539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
1541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
1545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
1546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Wake-up from Stop mode feature is supported by the USARTx instance.
1547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          WUS           LL_USART_SetWKUPType
1548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  Type This parameter can be one of the following values:
1550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_ON_ADDRESS
1551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_ON_STARTBIT
1552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_ON_RXNE
ARM GAS  /tmp/ccZXt8KR.s 			page 55


1553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type)
1556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);
1558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
1562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Macro @ref IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
1563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         Wake-up from Stop mode feature is supported by the USARTx instance.
1564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll CR3          WUS           LL_USART_GetWKUPType
1565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval Returned value can be one of the following values:
1567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_ON_ADDRESS
1568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_ON_STARTBIT
1569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_WAKEUP_ON_RXNE
1570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetWKUPType(USART_TypeDef *USARTx)
1572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));
1574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
1575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** /**
1577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @brief  Configure USART BRR register for achieving expected Baud Rate value.
1578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Compute and set USARTDIV value in BRR Register (full BRR content)
1579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
1580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @note   Peripheral clock and Baud rate values provided as function parameters should be valid
1581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         (Baud rate value != 0)
1582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @rmtoll BRR          BRR           LL_USART_SetBaudRate
1583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  USARTx USART Instance
1584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  PeriphClk Peripheral Clock
1585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  OverSampling This parameter can be one of the following values:
1586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_OVERSAMPLING_16
1587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   *         @arg @ref LL_USART_OVERSAMPLING_8
1588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @param  BaudRate Baud Rate
1589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   * @retval None
1590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   */
1591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverS
1592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****                                           uint32_t BaudRate)
1593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** {
1594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   register uint32_t usartdiv = 0x0U;
1595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   register uint32_t brrtemp = 0x0U;
1596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** 
1597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   if (OverSampling == LL_USART_OVERSAMPLING_8)
 298              		.loc 3 1597 0
 299 006c 8023     		movs	r3, #128
 300 006e 1B02     		lsls	r3, r3, #8
 301 0070 9A42     		cmp	r2, r3
 302 0072 16D0     		beq	.L28
1598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   {
1599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****     usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
1600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****     brrtemp = usartdiv & 0xFFF0U;
1601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****     brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
1602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****     USARTx->BRR = brrtemp;
1603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   }
1604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   else
ARM GAS  /tmp/ccZXt8KR.s 			page 56


1605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   {
1606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****     USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
 303              		.loc 3 1606 0
 304 0074 4B08     		lsrs	r3, r1, #1
 305 0076 C018     		adds	r0, r0, r3
 306              	.LVL27:
 307 0078 FFF7FEFF 		bl	__aeabi_uidiv
 308              	.LVL28:
 309 007c 0004     		lsls	r0, r0, #16
 310 007e 000C     		lsrs	r0, r0, #16
 311 0080 E060     		str	r0, [r4, #12]
 312              	.LBE53:
 313              	.LBE52:
 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       LL_USART_SetBaudRate(USARTx,
 314              		.loc 1 301 0
 315 0082 0120     		movs	r0, #1
 316 0084 1CE0     		b	.L14
 317              	.LVL29:
 318              	.L25:
 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 319              		.loc 1 271 0
 320 0086 0C20     		movs	r0, #12
 321              	.LVL30:
 322 0088 FFF7FEFF 		bl	LL_RCC_GetUSARTClockFreq
 323              	.LVL31:
 324 008c E8E7     		b	.L16
 325              	.LVL32:
 326              	.L26:
 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       periphclk = RCC_Clocks.PCLK1_Frequency;
 327              		.loc 1 277 0
 328 008e 6846     		mov	r0, sp
 329              	.LVL33:
 330 0090 FFF7FEFF 		bl	LL_RCC_GetSystemClocksFreq
 331              	.LVL34:
 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 332              		.loc 1 278 0
 333 0094 0298     		ldr	r0, [sp, #8]
 334              	.LVL35:
 335 0096 E3E7     		b	.L16
 336              	.LVL36:
 337              	.L27:
 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       periphclk = RCC_Clocks.PCLK1_Frequency;
 338              		.loc 1 285 0
 339 0098 6846     		mov	r0, sp
 340              	.LVL37:
 341 009a FFF7FEFF 		bl	LL_RCC_GetSystemClocksFreq
 342              	.LVL38:
 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 343              		.loc 1 286 0
 344 009e 0298     		ldr	r0, [sp, #8]
 345              	.LVL39:
 346 00a0 DEE7     		b	.L16
 347              	.LVL40:
 348              	.L28:
 349              	.LBB55:
 350              	.LBB54:
1599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****     brrtemp = usartdiv & 0xFFF0U;
ARM GAS  /tmp/ccZXt8KR.s 			page 57


 351              		.loc 3 1599 0
 352 00a2 4000     		lsls	r0, r0, #1
 353              	.LVL41:
 354 00a4 4B08     		lsrs	r3, r1, #1
 355 00a6 C018     		adds	r0, r0, r3
 356 00a8 FFF7FEFF 		bl	__aeabi_uidiv
 357              	.LVL42:
1600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****     brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
 358              		.loc 3 1600 0
 359 00ac 0E4B     		ldr	r3, .L29+28
 360 00ae 0340     		ands	r3, r0
 361              	.LVL43:
1601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****     USARTx->BRR = brrtemp;
 362              		.loc 3 1601 0
 363 00b0 4008     		lsrs	r0, r0, #1
 364              	.LVL44:
 365 00b2 0722     		movs	r2, #7
 366 00b4 1040     		ands	r0, r2
 367 00b6 1843     		orrs	r0, r3
 368              	.LVL45:
1602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h ****   }
 369              		.loc 3 1602 0
 370 00b8 E060     		str	r0, [r4, #12]
 371              	.LBE54:
 372              	.LBE55:
 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       LL_USART_SetBaudRate(USARTx,
 373              		.loc 1 301 0
 374 00ba 0120     		movs	r0, #1
 375              	.LVL46:
 376 00bc 00E0     		b	.L14
 377              	.LVL47:
 378              	.L20:
 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 379              		.loc 1 210 0
 380 00be 0020     		movs	r0, #0
 381              	.LVL48:
 382              	.L14:
 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                            periphclk,
 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                            USART_InitStruct->OverSampling,
 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                            USART_InitStruct->BaudRate);
 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   }
 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   /* Endif (=> USART not in Disabled state => return ERROR) */
 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   return (status);
 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** }
 383              		.loc 1 311 0
 384 00c0 05B0     		add	sp, sp, #20
 385              		@ sp needed
 386              	.LVL49:
 387              	.LVL50:
 388 00c2 30BD     		pop	{r4, r5, pc}
 389              	.LVL51:
 390              	.L22:
 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 391              		.loc 1 210 0
 392 00c4 0020     		movs	r0, #0
ARM GAS  /tmp/ccZXt8KR.s 			page 58


 393              	.LVL52:
 394 00c6 FBE7     		b	.L14
 395              	.LVL53:
 396              	.L23:
 397 00c8 0020     		movs	r0, #0
 398              	.LVL54:
 399 00ca F9E7     		b	.L14
 400              	.L30:
 401              		.align	2
 402              	.L29:
 403 00cc F369FFEF 		.word	-268473869
 404 00d0 FFCFFFFF 		.word	-12289
 405 00d4 FFFCFFFF 		.word	-769
 406 00d8 00380140 		.word	1073821696
 407 00dc 00440040 		.word	1073759232
 408 00e0 004C0040 		.word	1073761280
 409 00e4 00500040 		.word	1073762304
 410 00e8 F0FF0000 		.word	65520
 411              		.cfi_endproc
 412              	.LFE414:
 414              		.section	.text.LL_USART_StructInit,"ax",%progbits
 415              		.align	1
 416              		.global	LL_USART_StructInit
 417              		.syntax unified
 418              		.code	16
 419              		.thumb_func
 420              		.fpu softvfp
 422              	LL_USART_StructInit:
 423              	.LFB415:
 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /**
 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @param USART_InitStruct: pointer to a @ref LL_USART_InitTypeDef structure
 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *                          whose fields will be set to default values.
 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @retval None
 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** {
 424              		.loc 1 321 0
 425              		.cfi_startproc
 426              		@ args = 0, pretend = 0, frame = 0
 427              		@ frame_needed = 0, uses_anonymous_args = 0
 428              		@ link register save eliminated.
 429              	.LVL55:
 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   /* Set USART_InitStruct fields to default values */
 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_InitStruct->BaudRate            = 9600U;
 430              		.loc 1 323 0
 431 0000 9623     		movs	r3, #150
 432 0002 9B01     		lsls	r3, r3, #6
 433 0004 0360     		str	r3, [r0]
 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
 434              		.loc 1 324 0
 435 0006 0023     		movs	r3, #0
 436 0008 4360     		str	r3, [r0, #4]
 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
 437              		.loc 1 325 0
ARM GAS  /tmp/ccZXt8KR.s 			page 59


 438 000a 8360     		str	r3, [r0, #8]
 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
 439              		.loc 1 326 0
 440 000c C360     		str	r3, [r0, #12]
 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
 441              		.loc 1 327 0
 442 000e 0C22     		movs	r2, #12
 443 0010 0261     		str	r2, [r0, #16]
 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
 444              		.loc 1 328 0
 445 0012 4361     		str	r3, [r0, #20]
 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
 446              		.loc 1 329 0
 447 0014 8361     		str	r3, [r0, #24]
 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** }
 448              		.loc 1 330 0
 449              		@ sp needed
 450 0016 7047     		bx	lr
 451              		.cfi_endproc
 452              	.LFE415:
 454              		.section	.text.LL_USART_ClockInit,"ax",%progbits
 455              		.align	1
 456              		.global	LL_USART_ClockInit
 457              		.syntax unified
 458              		.code	16
 459              		.thumb_func
 460              		.fpu softvfp
 462              	LL_USART_ClockInit:
 463              	.LFB416:
 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /**
 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @brief  Initialize USART Clock related settings according to the
 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *         specified parameters in the USART_ClockInitStruct.
 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @note   As some bits in USART configuration registers can only be written when the USART is dis
 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR resu
 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @param  USARTx USART Instance
 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @param  USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *         that contains the Clock configuration information for the specified USART peripheral.
 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @retval An ErrorStatus enumeration value:
 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *          - SUCCESS: USART registers related to Clock settings are initialized according to USAR
 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *          - ERROR: Problem occurred during USART Registers initialization
 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStr
 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** {
 464              		.loc 1 345 0
 465              		.cfi_startproc
 466              		@ args = 0, pretend = 0, frame = 0
 467              		@ frame_needed = 0, uses_anonymous_args = 0
 468              	.LVL56:
 469 0000 10B5     		push	{r4, lr}
 470              	.LCFI2:
 471              		.cfi_def_cfa_offset 8
 472              		.cfi_offset 4, -8
 473              		.cfi_offset 14, -4
 474              	.LVL57:
 475              	.LBB56:
 476              	.LBB57:
ARM GAS  /tmp/ccZXt8KR.s 			page 60


 582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 477              		.loc 3 582 0
 478 0002 0368     		ldr	r3, [r0]
 479              	.LVL58:
 480              	.LBE57:
 481              	.LBE56:
 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   ErrorStatus status = SUCCESS;
 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   /* Check USART Instance and Clock signal output parameters */
 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_UART_INSTANCE(USARTx));
 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   /* USART needs to be in disabled state, in order to be able to configure some bits in
 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****      CRx registers */
 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   if (LL_USART_IsEnabled(USARTx) == 0U)
 482              		.loc 1 354 0
 483 0004 DB07     		lsls	r3, r3, #31
 484 0006 17D4     		bmi	.L35
 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   {
 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /*---------------------------- USART CR2 Configuration -----------------------*/
 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     /* If Clock signal has to be output */
 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
 485              		.loc 1 358 0
 486 0008 0B68     		ldr	r3, [r1]
 487 000a 002B     		cmp	r3, #0
 488 000c 0ED0     		beq	.L36
 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     {
 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       /* Deactivate Clock signal delivery :
 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        * - Disable Clock Output:        USART_CR2_CLKEN cleared
 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        */
 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       LL_USART_DisableSCLKOutput(USARTx);
 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     else
 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     {
 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       /* Ensure USART instance is USART capable */
 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       assert_param(IS_USART_INSTANCE(USARTx));
 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       /* Check clock related parameters */
 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       /*---------------------------- USART CR2 Configuration -----------------------
 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        * Configure USARTx CR2 (Clock signal related bits) with parameters:
 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        * - Enable Clock Output:         USART_CR2_CLKEN set
 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->Cloc
 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->Cloc
 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->Last
 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****        */
 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****       MODIFY_REG(USARTx->CR2,
 489              		.loc 1 382 0
 490 000e 4368     		ldr	r3, [r0, #4]
 491 0010 0A4A     		ldr	r2, .L37
 492 0012 1340     		ands	r3, r2
 493 0014 4A68     		ldr	r2, [r1, #4]
 494 0016 8C68     		ldr	r4, [r1, #8]
 495 0018 2243     		orrs	r2, r4
ARM GAS  /tmp/ccZXt8KR.s 			page 61


 496 001a C968     		ldr	r1, [r1, #12]
 497              	.LVL59:
 498 001c 0A43     		orrs	r2, r1
 499 001e 1343     		orrs	r3, r2
 500 0020 8022     		movs	r2, #128
 501 0022 1201     		lsls	r2, r2, #4
 502 0024 1343     		orrs	r3, r2
 503 0026 4360     		str	r3, [r0, #4]
 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 504              		.loc 1 346 0
 505 0028 0120     		movs	r0, #1
 506              	.LVL60:
 507 002a 06E0     		b	.L33
 508              	.LVL61:
 509              	.L36:
 510              	.LBB58:
 511              	.LBB59:
1002:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_usart.h **** }
 512              		.loc 3 1002 0
 513 002c 4368     		ldr	r3, [r0, #4]
 514 002e 044A     		ldr	r2, .L37+4
 515 0030 1340     		ands	r3, r2
 516 0032 4360     		str	r3, [r0, #4]
 517              	.LBE59:
 518              	.LBE58:
 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 519              		.loc 1 346 0
 520 0034 0120     		movs	r0, #1
 521              	.LVL62:
 522 0036 00E0     		b	.L33
 523              	.LVL63:
 524              	.L35:
 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                  USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                  USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****                  USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     }
 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   }
 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   /* Else (USART not in Disabled state => return ERROR */
 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   else
 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   {
 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****     status = ERROR;
 525              		.loc 1 391 0
 526 0038 0020     		movs	r0, #0
 527              	.LVL64:
 528              	.L33:
 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   }
 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   return (status);
 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** }
 529              		.loc 1 395 0
 530              		@ sp needed
 531 003a 10BD     		pop	{r4, pc}
 532              	.L38:
 533              		.align	2
 534              	.L37:
 535 003c FFF0FFFF 		.word	-3841
 536 0040 FFF7FFFF 		.word	-2049
ARM GAS  /tmp/ccZXt8KR.s 			page 62


 537              		.cfi_endproc
 538              	.LFE416:
 540              		.section	.text.LL_USART_ClockStructInit,"ax",%progbits
 541              		.align	1
 542              		.global	LL_USART_ClockStructInit
 543              		.syntax unified
 544              		.code	16
 545              		.thumb_func
 546              		.fpu softvfp
 548              	LL_USART_ClockStructInit:
 549              	.LFB417:
 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** 
 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** /**
 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @param USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   *                               whose fields will be set to default values.
 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   * @retval None
 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   */
 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** {
 550              		.loc 1 404 0
 551              		.cfi_startproc
 552              		@ args = 0, pretend = 0, frame = 0
 553              		@ frame_needed = 0, uses_anonymous_args = 0
 554              		@ link register save eliminated.
 555              	.LVL65:
 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   /* Set LL_USART_ClockInitStruct fields with default values */
 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
 556              		.loc 1 406 0
 557 0000 0023     		movs	r3, #0
 558 0002 0360     		str	r3, [r0]
 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when
 559              		.loc 1 407 0
 560 0004 4360     		str	r3, [r0, #4]
 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when
 561              		.loc 1 408 0
 562 0006 8360     		str	r3, [r0, #8]
 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c ****   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when
 563              		.loc 1 409 0
 564 0008 C360     		str	r3, [r0, #12]
 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_usart.c **** }
 565              		.loc 1 410 0
 566              		@ sp needed
 567 000a 7047     		bx	lr
 568              		.cfi_endproc
 569              	.LFE417:
 571              		.text
 572              	.Letext0:
 573              		.file 4 "/usr/arm-none-eabi/include/machine/_default_types.h"
 574              		.file 5 "/usr/arm-none-eabi/include/sys/_stdint.h"
 575              		.file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
 576              		.file 7 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
 577              		.file 8 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h"
 578              		.file 9 "/usr/arm-none-eabi/include/sys/lock.h"
 579              		.file 10 "/usr/arm-none-eabi/include/sys/_types.h"
 580              		.file 11 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
 581              		.file 12 "/usr/arm-none-eabi/include/sys/reent.h"
ARM GAS  /tmp/ccZXt8KR.s 			page 63


 582              		.file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_rcc.h"
ARM GAS  /tmp/ccZXt8KR.s 			page 64


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32l0xx_ll_usart.c
     /tmp/ccZXt8KR.s:16     .text.LL_USART_DeInit:0000000000000000 $t
     /tmp/ccZXt8KR.s:23     .text.LL_USART_DeInit:0000000000000000 LL_USART_DeInit
     /tmp/ccZXt8KR.s:167    .text.LL_USART_DeInit:000000000000007c $d
     /tmp/ccZXt8KR.s:181    .text.LL_USART_Init:0000000000000000 $t
     /tmp/ccZXt8KR.s:188    .text.LL_USART_Init:0000000000000000 LL_USART_Init
     /tmp/ccZXt8KR.s:403    .text.LL_USART_Init:00000000000000cc $d
     /tmp/ccZXt8KR.s:415    .text.LL_USART_StructInit:0000000000000000 $t
     /tmp/ccZXt8KR.s:422    .text.LL_USART_StructInit:0000000000000000 LL_USART_StructInit
     /tmp/ccZXt8KR.s:455    .text.LL_USART_ClockInit:0000000000000000 $t
     /tmp/ccZXt8KR.s:462    .text.LL_USART_ClockInit:0000000000000000 LL_USART_ClockInit
     /tmp/ccZXt8KR.s:535    .text.LL_USART_ClockInit:000000000000003c $d
     /tmp/ccZXt8KR.s:541    .text.LL_USART_ClockStructInit:0000000000000000 $t
     /tmp/ccZXt8KR.s:548    .text.LL_USART_ClockStructInit:0000000000000000 LL_USART_ClockStructInit
                     .debug_frame:0000000000000010 $d

UNDEFINED SYMBOLS
__aeabi_uidiv
LL_RCC_GetUSARTClockFreq
LL_RCC_GetSystemClocksFreq