ARM GAS /tmp/cc5G6dGG.s page 1 1 .cpu cortex-m0plus 2 .eabi_attribute 20, 1 3 .eabi_attribute 21, 1 4 .eabi_attribute 23, 3 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 1 9 .eabi_attribute 34, 0 10 .eabi_attribute 18, 4 11 .file "stm32l0xx_ll_tim.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.LL_TIM_DeInit,"ax",%progbits 16 .align 1 17 .global LL_TIM_DeInit 18 .syntax unified 19 .code 16 20 .thumb_func 21 .fpu softvfp 23 LL_TIM_DeInit: 24 .LFB211: 25 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c" 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ****************************************************************************** 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @file stm32l0xx_ll_tim.c 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @author MCD Application Team 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief TIM LL module driver. 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ****************************************************************************** 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @attention 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * Redistribution and use in source and binary forms, with or without modification, 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * are permitted provided that the following conditions are met: 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * 1. Redistributions of source code must retain the above copyright notice, 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * this list of conditions and the following disclaimer. 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * this list of conditions and the following disclaimer in the documentation 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * and/or other materials provided with the distribution. 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * may be used to endorse or promote products derived from this software 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * without specific prior written permission. 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ****************************************************************************** ARM GAS /tmp/cc5G6dGG.s page 2 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #if defined(USE_FULL_LL_DRIVER) 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Includes ------------------------------------------------------------------*/ 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #include "stm32l0xx_ll_tim.h" 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #include "stm32l0xx_ll_bus.h" 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #ifdef USE_FULL_ASSERT 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #include "stm32_assert.h" 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #else 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define assert_param(expr) ((void)0U) 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #endif 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** @addtogroup STM32L0xx_LL_Driver 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @{ 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #if defined (TIM2) || defined (TIM3) || defined (TIM21) || defined (TIM22) || defined (TIM6) || def 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** @addtogroup TIM_LL 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @{ 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Private types -------------------------------------------------------------*/ 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Private variables ---------------------------------------------------------*/ 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Private constants ---------------------------------------------------------*/ 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Private macros ------------------------------------------------------------*/ 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** @addtogroup TIM_LL_Private_Macros 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @{ 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \ 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \ 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \ 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \ 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN)) 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \ 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \ 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4)) 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \ 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \ 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_INACTIVE) \ 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_TOGGLE) \ 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_FORCED_INACTIVE) \ 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_FORCED_ACTIVE) \ 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_PWM1) \ 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_PWM2)) 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_OCSTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCSTATE_DISABLE) \ 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCSTATE_ENABLE)) 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_OCPOLARITY(__VALUE__) (((__VALUE__) == LL_TIM_OCPOLARITY_HIGH) \ 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCPOLARITY_LOW)) 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_ACTIVEINPUT(__VALUE__) (((__VALUE__) == LL_TIM_ACTIVEINPUT_DIRECTTI) \ 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ACTIVEINPUT_INDIRECTTI) \ ARM GAS /tmp/cc5G6dGG.s page 3 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ACTIVEINPUT_TRC)) 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_ICPSC(__VALUE__) (((__VALUE__) == LL_TIM_ICPSC_DIV1) \ 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV2) \ 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV4) \ 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV8)) 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_IC_FILTER(__VALUE__) (((__VALUE__) == LL_TIM_IC_FILTER_FDIV1) \ 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N2) \ 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N4) \ 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N8) \ 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N6) \ 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N8) \ 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N6) \ 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N8) \ 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N6) \ 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N8) \ 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N5) \ 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N6) \ 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N8) \ 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N5) \ 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N6) \ 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N8)) 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_IC_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \ 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING) \ 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_POLARITY_BOTHEDGE)) 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_ENCODERMODE(__VALUE__) (((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI1) \ 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI2) \ 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ENCODERMODE_X4_TI12)) 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #define IS_LL_TIM_IC_POLARITY_ENCODER(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \ 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING)) 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @} 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Private function prototypes -----------------------------------------------*/ 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** @defgroup TIM_LL_Private_Functions TIM Private Functions 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @{ 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct); 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct); 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct); 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct); 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct); 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct); 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct); 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct); 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @} 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Exported functions --------------------------------------------------------*/ 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** @addtogroup TIM_LL_Exported_Functions ARM GAS /tmp/cc5G6dGG.s page 4 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @{ 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** @addtogroup TIM_LL_EF_Init 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @{ 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Set TIMx registers to their reset values. 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer instance 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: invalid TIMx instance 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ErrorStatus LL_TIM_DeInit(TIM_TypeDef *TIMx) 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 26 .loc 1 163 0 27 .cfi_startproc 28 @ args = 0, pretend = 0, frame = 0 29 @ frame_needed = 0, uses_anonymous_args = 0 30 @ link register save eliminated. 31 .LVL0: 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ErrorStatus result = SUCCESS; 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_INSTANCE(TIMx)); 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** if (TIMx == TIM2) 32 .loc 1 169 0 33 0000 8023 movs r3, #128 34 0002 DB05 lsls r3, r3, #23 35 0004 9842 cmp r0, r3 36 0006 10D0 beq .L9 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2); 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2); 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #if defined(TIM3) 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** else if (TIMx == TIM3) 37 .loc 1 175 0 38 0008 264B ldr r3, .L15 39 000a 9842 cmp r0, r3 40 000c 17D0 beq .L10 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3); 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3); 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #endif /* TIM3 */ 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #if defined(TIM6) 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** else if (TIMx == TIM6) 41 .loc 1 182 0 42 000e 264B ldr r3, .L15+4 43 0010 9842 cmp r0, r3 44 0012 1ED0 beq .L11 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6); 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6); ARM GAS /tmp/cc5G6dGG.s page 5 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #endif /* TIM6 */ 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #if defined(TIM7) 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** else if (TIMx == TIM7) 45 .loc 1 189 0 46 0014 254B ldr r3, .L15+8 47 0016 9842 cmp r0, r3 48 0018 25D0 beq .L12 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7); 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7); 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #endif /* TIM7 */ 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** else if (TIMx == TIM21) 49 .loc 1 195 0 50 001a 254B ldr r3, .L15+12 51 001c 9842 cmp r0, r3 52 001e 2CD0 beq .L13 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM21); 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM21); 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #if defined(TIM22) 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** else if (TIMx == TIM22) 53 .loc 1 201 0 54 0020 244B ldr r3, .L15+16 55 0022 9842 cmp r0, r3 56 0024 33D0 beq .L14 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM22); 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM22); 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** #endif /* TIM22 */ 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** else 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** result = ERROR; 57 .loc 1 209 0 58 0026 0020 movs r0, #0 59 .LVL1: 60 0028 08E0 b .L3 61 .LVL2: 62 .L9: 63 .LBB66: 64 .LBB67: 65 .file 2 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h" 1:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 2:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ****************************************************************************** 3:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @file stm32l0xx_ll_bus.h 4:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @author MCD Application Team 5:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Header file of BUS LL module. 6:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 7:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** @verbatim 8:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ##### RCC Limitations ##### 9:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ============================================================================== 10:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** [..] 11:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** A delay between an RCC peripheral clock enable and the effective peripheral 12:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** enabling should be taken into account in order to manage the peripheral read/write ARM GAS /tmp/cc5G6dGG.s page 6 13:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** from/to registers. 14:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (+) This delay depends on the peripheral mapping. 15:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (++) AHB & APB peripherals, 1 dummy read is necessary 16:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 17:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** [..] 18:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** Workarounds: 19:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been 20:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** inserted in each LL_{BUS}_GRP{x}_EnableClock() function. 21:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 22:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** @endverbatim 23:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ****************************************************************************** 24:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @attention 25:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 26:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** *

© COPYRIGHT(c) 2016 STMicroelectronics

27:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 28:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * Redistribution and use in source and binary forms, with or without modification, 29:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * are permitted provided that the following conditions are met: 30:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 1. Redistributions of source code must retain the above copyright notice, 31:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * this list of conditions and the following disclaimer. 32:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 2. Redistributions in binary form must reproduce the above copyright notice, 33:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * this list of conditions and the following disclaimer in the documentation 34:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * and/or other materials provided with the distribution. 35:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 3. Neither the name of STMicroelectronics nor the names of its contributors 36:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * may be used to endorse or promote products derived from this software 37:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * without specific prior written permission. 38:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 39:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 40:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 41:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 42:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 43:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 44:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 45:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 46:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 47:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 48:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 49:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 50:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ****************************************************************************** 51:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 52:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 53:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 54:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #ifndef __STM32L0xx_LL_BUS_H 55:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define __STM32L0xx_LL_BUS_H 56:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 57:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #ifdef __cplusplus 58:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** extern "C" { 59:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 60:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 61:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/ 62:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #include "stm32l0xx.h" 63:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 64:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @addtogroup STM32L0xx_LL_Driver 65:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 66:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 67:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 68:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(RCC) 69:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ARM GAS /tmp/cc5G6dGG.s page 7 70:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL BUS 71:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 72:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 73:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 74:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private types -------------------------------------------------------------*/ 75:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private variables ---------------------------------------------------------*/ 76:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 77:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private constants ---------------------------------------------------------*/ 78:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 79:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private macros ------------------------------------------------------------*/ 80:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 81:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported types ------------------------------------------------------------*/ 82:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported constants --------------------------------------------------------*/ 83:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Constants BUS Exported Constants 84:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 85:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 86:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 87:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH AHB1 GRP1 PERIPH 88:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 89:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 90:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU 91:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN /*!< DMA1 clock enable */ 92:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_MIF RCC_AHBENR_MIFEN /*!< MIF clock enable */ 93:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM RCC_AHBSMENR_SRAMSMEN /*!< Sleep Mode SRAM clock enable 94:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHBENR_CRCEN /*!< CRC clock enable */ 95:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TSC) 96:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_TSC RCC_AHBENR_TSCEN /*!< TSC clock enable */ 97:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*TSC*/ 98:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(RNG) 99:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_RNG RCC_AHBENR_RNGEN /*!< RNG clock enable */ 100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*RNG*/ 101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(AES) 102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_CRYP RCC_AHBENR_CRYPEN /*!< CRYP clock enable */ 103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*AES*/ 104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @} 106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH APB1 GRP1 PERIPH 110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU 113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN /*!< TIM2 clock enable */ 114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM3) 115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR_TIM3EN /*!< TIM3 clock enable */ 116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM6) 118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM6 RCC_APB1ENR_TIM6EN /*!< TIM6 clock enable */ 119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM7) 121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR_TIM7EN /*!< TIM7 clock enable */ 122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(LCD) 124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LCD RCC_APB1ENR_LCDEN /*!< LCD clock enable */ 125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*LCD*/ 126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN /*!< WWDG clock enable */ ARM GAS /tmp/cc5G6dGG.s page 8 127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(SPI2) 128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN /*!< SPI2 clock enable */ 129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART2 RCC_APB1ENR_USART2EN /*!< USART2 clock enable */ 131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPUART1 RCC_APB1ENR_LPUART1EN /*!< LPUART1 clock enable */ 132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART4) 133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART4 RCC_APB1ENR_USART4EN /*!< USART4 clock enable */ 134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART5) 136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART5 RCC_APB1ENR_USART5EN /*!< USART5 clock enable */ 137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C1 RCC_APB1ENR_I2C1EN /*!< I2C1 clock enable */ 139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(I2C2) 140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C2 RCC_APB1ENR_I2C2EN /*!< I2C2 clock enable */ 141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USB) 143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USB RCC_APB1ENR_USBEN /*!< USB clock enable */ 144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*USB*/ 145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(CRS) 146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CRS RCC_APB1ENR_CRSEN /*!< CRS clock enable */ 147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*CRS*/ 148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_PWR RCC_APB1ENR_PWREN /*!< PWR clock enable */ 149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(DAC) 150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_DAC1 RCC_APB1ENR_DACEN /*!< DAC clock enable */ 151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(I2C3) 153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C3 RCC_APB1ENR_I2C3EN /*!< I2C3 clock enable */ 154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR_LPTIM1EN /*!< LPTIM1 clock enable */ 156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @} 158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH APB2 GRP1 PERIPH 164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU 167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SYSCFG RCC_APB2ENR_SYSCFGEN /*!< SYSCFG clock enable */ 168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM21 RCC_APB2ENR_TIM21EN /*!< TIM21 clock enable */ 169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM22) 170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM22 RCC_APB2ENR_TIM22EN /*!< TIM22 clock enable */ 171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_FW RCC_APB2ENR_FWEN /*!< FireWall clock enable */ 173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC1 RCC_APB2ENR_ADC1EN /*!< ADC1 clock enable */ 174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI1 RCC_APB2ENR_SPI1EN /*!< SPI1 clock enable */ 175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART1) 176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN /*!< USART1 clock enable */ 177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif 178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_DBGMCU RCC_APB2ENR_DBGMCUEN /*!< DBGMCU clock enable */ 179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @} 182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ARM GAS /tmp/cc5G6dGG.s page 9 184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_IOP_GRP1_PERIPH IOP GRP1 PERIPH 187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU 190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOA RCC_IOPENR_GPIOAEN /*!< GPIO port A control */ 191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOB RCC_IOPENR_GPIOBEN /*!< GPIO port B control */ 192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOC RCC_IOPENR_GPIOCEN /*!< GPIO port C control */ 193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOD) 194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOD RCC_IOPENR_GPIODEN /*!< GPIO port D control */ 195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOD*/ 196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOE) 197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOE RCC_IOPENR_GPIOEEN /*!< GPIO port H control */ 198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOE*/ 199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOH) 200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOH RCC_IOPENR_GPIOHEN /*!< GPIO port H control */ 201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOH*/ 202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @} 204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @} 209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported macro ------------------------------------------------------------*/ 212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported functions --------------------------------------------------------*/ 213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Functions BUS Exported Functions 214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB1 AHB1 218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Enable AHB1 peripherals clock. 223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBENR DMAEN LL_AHB1_GRP1_EnableClock\n 224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR MIFEN LL_AHB1_GRP1_EnableClock\n 225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRCEN LL_AHB1_GRP1_EnableClock\n 226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR TSCEN LL_AHB1_GRP1_EnableClock\n 227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR RNGEN LL_AHB1_GRP1_EnableClock\n 228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRYPEN LL_AHB1_GRP1_EnableClock 229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF 232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*) 234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) 235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*) 236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) ARM GAS /tmp/cc5G6dGG.s page 10 241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __IO uint32_t tmpreg; 243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->AHBENR, Periphs); 244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHBENR, Periphs); 246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (void)tmpreg; 247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Check if AHB1 peripheral clock is enabled or not 251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBENR DMAEN LL_AHB1_GRP1_IsEnabledClock\n 252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR MIFEN LL_AHB1_GRP1_IsEnabledClock\n 253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n 254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR TSCEN LL_AHB1_GRP1_IsEnabledClock\n 255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR RNGEN LL_AHB1_GRP1_IsEnabledClock\n 256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRYPEN LL_AHB1_GRP1_IsEnabledClock 257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF 260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*) 262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) 263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*) 264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval State of Periphs (1 or 0). 267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) 269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** return (READ_BIT(RCC->AHBENR, Periphs) == Periphs); 271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock. 275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBENR DMAEN LL_AHB1_GRP1_DisableClock\n 276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR MIFEN LL_AHB1_GRP1_DisableClock\n 277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRCEN LL_AHB1_GRP1_DisableClock\n 278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR TSCEN LL_AHB1_GRP1_DisableClock\n 279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR RNGEN LL_AHB1_GRP1_DisableClock\n 280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBENR CRYPEN LL_AHB1_GRP1_DisableClock 281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF 284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*) 286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) 287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*) 288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) 293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->AHBENR, Periphs); 295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** ARM GAS /tmp/cc5G6dGG.s page 11 298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Force AHB1 peripherals reset. 299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBRSTR DMARST LL_AHB1_GRP1_ForceReset\n 300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR MIFRST LL_AHB1_GRP1_ForceReset\n 301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR CRCRST LL_AHB1_GRP1_ForceReset\n 302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR TSCRST LL_AHB1_GRP1_ForceReset\n 303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR RNGRST LL_AHB1_GRP1_ForceReset\n 304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR CRYPRST LL_AHB1_GRP1_ForceReset 305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL 307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF 309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*) 311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) 312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*) 313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) 318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->AHBRSTR, Periphs); 320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Release AHB1 peripherals reset. 324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBRSTR DMARST LL_AHB1_GRP1_ReleaseReset\n 325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR MIFRST LL_AHB1_GRP1_ReleaseReset\n 326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR CRCRST LL_AHB1_GRP1_ReleaseReset\n 327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR TSCRST LL_AHB1_GRP1_ReleaseReset\n 328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR RNGRST LL_AHB1_GRP1_ReleaseReset\n 329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBRSTR CRYPRST LL_AHB1_GRP1_ReleaseReset 330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL 332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF 334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*) 336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) 337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*) 338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) 343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->AHBRSTR, Periphs); 345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Enable AHB1 peripherals clock during Low Power (Sleep) mode. 349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBSMENR DMASMEN LL_AHB1_GRP1_EnableClockSleep\n 350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR MIFSMEN LL_AHB1_GRP1_EnableClockSleep\n 351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR SRAMSMEN LL_AHB1_GRP1_EnableClockSleep\n 352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR CRCSMEN LL_AHB1_GRP1_EnableClockSleep\n 353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR TSCSMEN LL_AHB1_GRP1_EnableClockSleep\n 354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR RNGSMEN LL_AHB1_GRP1_EnableClockSleep\n ARM GAS /tmp/cc5G6dGG.s page 12 355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR CRYPSMEN LL_AHB1_GRP1_EnableClockSleep 356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF 359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM 360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*) 362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) 363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*) 364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs) 369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __IO uint32_t tmpreg; 371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->AHBSMENR, Periphs); 372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHBSMENR, Periphs); 374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (void)tmpreg; 375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock during Low Power (Sleep) mode. 379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll AHBSMENR DMASMEN LL_AHB1_GRP1_DisableClockSleep\n 380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR MIFSMEN LL_AHB1_GRP1_DisableClockSleep\n 381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR SRAMSMEN LL_AHB1_GRP1_DisableClockSleep\n 382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR CRCSMEN LL_AHB1_GRP1_DisableClockSleep\n 383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR TSCSMEN LL_AHB1_GRP1_DisableClockSleep\n 384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR RNGSMEN LL_AHB1_GRP1_DisableClockSleep\n 385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * AHBSMENR CRYPSMEN LL_AHB1_GRP1_DisableClockSleep 386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_MIF 389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM 390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*) 392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) 393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*) 394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs) 399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->AHBSMENR, Periphs); 401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @} 405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB1 APB1 408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** ARM GAS /tmp/cc5G6dGG.s page 13 412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Enable APB1 peripherals clock. 413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n 414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n 415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_EnableClock\n 416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_EnableClock\n 417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LCDEN LL_APB1_GRP1_EnableClock\n 418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n 419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n 420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_EnableClock\n 421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPUART1EN LL_APB1_GRP1_EnableClock\n 422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART4EN LL_APB1_GRP1_EnableClock\n 423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART5EN LL_APB1_GRP1_EnableClock\n 424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n 425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n 426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USBEN LL_APB1_GRP1_EnableClock\n 427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR CRSEN LL_APB1_GRP1_EnableClock\n 428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_EnableClock\n 429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_EnableClock\n 430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n 431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_EnableClock 432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) 435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*) 438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1 442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*) 443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*) 444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*) 448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) 451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) 457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __IO uint32_t tmpreg; 459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); 460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1ENR, Periphs); 462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (void)tmpreg; 463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Check if APB1 peripheral clock is enabled or not 467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n 468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_IsEnabledClock\n ARM GAS /tmp/cc5G6dGG.s page 14 469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_IsEnabledClock\n 470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_IsEnabledClock\n 471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LCDEN LL_APB1_GRP1_IsEnabledClock\n 472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_IsEnabledClock\n 473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_IsEnabledClock\n 474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_IsEnabledClock\n 475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPUART1EN LL_APB1_GRP1_IsEnabledClock\n 476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART4EN LL_APB1_GRP1_IsEnabledClock\n 477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART5EN LL_APB1_GRP1_IsEnabledClock\n 478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_IsEnabledClock\n 479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_IsEnabledClock\n 480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USBEN LL_APB1_GRP1_IsEnabledClock\n 481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR CRSEN LL_APB1_GRP1_IsEnabledClock\n 482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_IsEnabledClock\n 483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_IsEnabledClock\n 484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_IsEnabledClock\n 485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_IsEnabledClock 486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) 489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*) 492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1 496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*) 497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*) 498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*) 502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) 505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval State of Periphs (1 or 0). 509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) 511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs); 513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Disable APB1 peripherals clock. 517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_DisableClock\n 518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_DisableClock\n 519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_DisableClock\n 520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_DisableClock\n 521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LCDEN LL_APB1_GRP1_DisableClock\n 522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_DisableClock\n 523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_DisableClock\n 524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_DisableClock\n 525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPUART1EN LL_APB1_GRP1_DisableClock\n ARM GAS /tmp/cc5G6dGG.s page 15 526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART4EN LL_APB1_GRP1_DisableClock\n 527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USART5EN LL_APB1_GRP1_DisableClock\n 528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n 529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n 530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR USBEN LL_APB1_GRP1_DisableClock\n 531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR CRSEN LL_APB1_GRP1_DisableClock\n 532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_DisableClock\n 533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n 534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n 535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_DisableClock 536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) 539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*) 542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1 546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*) 547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*) 548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*) 552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) 555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) 561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->APB1ENR, Periphs); 563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Force APB1 peripherals reset. 567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n 568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n 569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ForceReset\n 570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ForceReset\n 571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LCDRST LL_APB1_GRP1_ForceReset\n 572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset\n 573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n 574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ForceReset\n 575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LPUART1RST LL_APB1_GRP1_ForceReset\n 576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART4RST LL_APB1_GRP1_ForceReset\n 577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART5RST LL_APB1_GRP1_ForceReset\n 578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ForceReset\n 579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n 580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USBRST LL_APB1_GRP1_ForceReset\n 581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR CRSRST LL_APB1_GRP1_ForceReset\n 582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ForceReset\n ARM GAS /tmp/cc5G6dGG.s page 16 583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ForceReset\n 584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n 585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ForceReset 586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_ALL 588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) 590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*) 593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1 597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*) 598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*) 599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*) 603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) 606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) 612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->APB1RSTR, Periphs); 66 .loc 2 613 0 67 002a 234B ldr r3, .L15+20 68 002c 9A6A ldr r2, [r3, #40] 69 002e 0121 movs r1, #1 70 0030 0A43 orrs r2, r1 71 0032 9A62 str r2, [r3, #40] 72 .LVL3: 73 .LBE67: 74 .LBE66: 75 .LBB68: 76 .LBB69: 614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Release APB1 peripherals reset. 618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ReleaseReset\n 619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ReleaseReset\n 620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n 621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n 622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LCDRST LL_APB1_GRP1_ReleaseReset\n 623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ReleaseReset\n 624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ReleaseReset\n 625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ReleaseReset\n 626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LPUART1RST LL_APB1_GRP1_ReleaseReset\n 627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART4RST LL_APB1_GRP1_ReleaseReset\n 628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USART5RST LL_APB1_GRP1_ReleaseReset\n ARM GAS /tmp/cc5G6dGG.s page 17 629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ReleaseReset\n 630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ReleaseReset\n 631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR USBRST LL_APB1_GRP1_ReleaseReset\n 632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR CRSRST LL_APB1_GRP1_ReleaseReset\n 633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ReleaseReset\n 634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ReleaseReset\n 635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ReleaseReset\n 636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ReleaseReset 637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_ALL 639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) 641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*) 644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1 648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*) 649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*) 650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*) 654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) 657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) 663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->APB1RSTR, Periphs); 77 .loc 2 664 0 78 0034 9A6A ldr r2, [r3, #40] 79 0036 8A43 bics r2, r1 80 0038 9A62 str r2, [r3, #40] 81 .LBE69: 82 .LBE68: 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 83 .loc 1 164 0 84 003a 0120 movs r0, #1 85 .LVL4: 86 .L3: 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return result; 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 87 .loc 1 213 0 88 @ sp needed 89 003c 7047 bx lr 90 .LVL5: 91 .L10: 92 .LBB70: ARM GAS /tmp/cc5G6dGG.s page 18 93 .LBB71: 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 94 .loc 2 613 0 95 003e 1E4B ldr r3, .L15+20 96 0040 9A6A ldr r2, [r3, #40] 97 0042 0221 movs r1, #2 98 0044 0A43 orrs r2, r1 99 0046 9A62 str r2, [r3, #40] 100 .LVL6: 101 .LBE71: 102 .LBE70: 103 .LBB72: 104 .LBB73: 105 .loc 2 664 0 106 0048 9A6A ldr r2, [r3, #40] 107 004a 8A43 bics r2, r1 108 004c 9A62 str r2, [r3, #40] 109 .LBE73: 110 .LBE72: 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 111 .loc 1 164 0 112 004e 0120 movs r0, #1 113 .LVL7: 114 0050 F4E7 b .L3 115 .LVL8: 116 .L11: 117 .LBB74: 118 .LBB75: 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 119 .loc 2 613 0 120 0052 194B ldr r3, .L15+20 121 0054 9A6A ldr r2, [r3, #40] 122 0056 1021 movs r1, #16 123 0058 0A43 orrs r2, r1 124 005a 9A62 str r2, [r3, #40] 125 .LVL9: 126 .LBE75: 127 .LBE74: 128 .LBB76: 129 .LBB77: 130 .loc 2 664 0 131 005c 9A6A ldr r2, [r3, #40] 132 005e 8A43 bics r2, r1 133 0060 9A62 str r2, [r3, #40] 134 .LBE77: 135 .LBE76: 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 136 .loc 1 164 0 137 0062 0120 movs r0, #1 138 .LVL10: 139 0064 EAE7 b .L3 140 .LVL11: 141 .L12: 142 .LBB78: 143 .LBB79: 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 144 .loc 2 613 0 ARM GAS /tmp/cc5G6dGG.s page 19 145 0066 144B ldr r3, .L15+20 146 0068 9A6A ldr r2, [r3, #40] 147 006a 2021 movs r1, #32 148 006c 0A43 orrs r2, r1 149 006e 9A62 str r2, [r3, #40] 150 .LVL12: 151 .LBE79: 152 .LBE78: 153 .LBB80: 154 .LBB81: 155 .loc 2 664 0 156 0070 9A6A ldr r2, [r3, #40] 157 0072 8A43 bics r2, r1 158 0074 9A62 str r2, [r3, #40] 159 .LBE81: 160 .LBE80: 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 161 .loc 1 164 0 162 0076 0120 movs r0, #1 163 .LVL13: 164 0078 E0E7 b .L3 165 .LVL14: 166 .L13: 167 .LBB82: 168 .LBB83: 665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Enable APB1 peripherals clock during Low Power (Sleep) mode. 669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1SMENR TIM2SMEN LL_APB1_GRP1_EnableClockSleep\n 670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR TIM3SMEN LL_APB1_GRP1_EnableClockSleep\n 671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR TIM6SMEN LL_APB1_GRP1_EnableClockSleep\n 672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR TIM7SMEN LL_APB1_GRP1_EnableClockSleep\n 673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR LCDSMEN LL_APB1_GRP1_EnableClockSleep\n 674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR WWDGSMEN LL_APB1_GRP1_EnableClockSleep\n 675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR SPI2SMEN LL_APB1_GRP1_EnableClockSleep\n 676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR USART2SMEN LL_APB1_GRP1_EnableClockSleep\n 677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR LPUART1SMEN LL_APB1_GRP1_EnableClockSleep\n 678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR USART4SMEN LL_APB1_GRP1_EnableClockSleep\n 679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR USART5SMEN LL_APB1_GRP1_EnableClockSleep\n 680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR I2C1SMEN LL_APB1_GRP1_EnableClockSleep\n 681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR I2C2SMEN LL_APB1_GRP1_EnableClockSleep\n 682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR USBSMEN LL_APB1_GRP1_EnableClockSleep\n 683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR CRSSMEN LL_APB1_GRP1_EnableClockSleep\n 684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR PWRSMEN LL_APB1_GRP1_EnableClockSleep\n 685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR DACSMEN LL_APB1_GRP1_EnableClockSleep\n 686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR I2C3SMEN LL_APB1_GRP1_EnableClockSleep\n 687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR LPTIM1SMEN LL_APB1_GRP1_EnableClockSleep 688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) 691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*) 694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 ARM GAS /tmp/cc5G6dGG.s page 20 697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1 698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*) 699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*) 700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*) 704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) 707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClockSleep(uint32_t Periphs) 713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __IO uint32_t tmpreg; 715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->APB1SMENR, Periphs); 716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1SMENR, Periphs); 718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (void)tmpreg; 719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Disable APB1 peripherals clock during Low Power (Sleep) mode. 723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB1SMENR TIM2SMEN LL_APB1_GRP1_DisableClockSleep\n 724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR TIM3SMEN LL_APB1_GRP1_DisableClockSleep\n 725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR TIM6SMEN LL_APB1_GRP1_DisableClockSleep\n 726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR TIM7SMEN LL_APB1_GRP1_DisableClockSleep\n 727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR LCDSMEN LL_APB1_GRP1_DisableClockSleep\n 728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR WWDGSMEN LL_APB1_GRP1_DisableClockSleep\n 729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR SPI2SMEN LL_APB1_GRP1_DisableClockSleep\n 730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR USART2SMEN LL_APB1_GRP1_DisableClockSleep\n 731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR LPUART1SMEN LL_APB1_GRP1_DisableClockSleep\n 732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR USART4SMEN LL_APB1_GRP1_DisableClockSleep\n 733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR USART5SMEN LL_APB1_GRP1_DisableClockSleep\n 734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR I2C1SMEN LL_APB1_GRP1_DisableClockSleep\n 735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR I2C2SMEN LL_APB1_GRP1_DisableClockSleep\n 736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR USBSMEN LL_APB1_GRP1_DisableClockSleep\n 737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR CRSSMEN LL_APB1_GRP1_DisableClockSleep\n 738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR PWRSMEN LL_APB1_GRP1_DisableClockSleep\n 739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR DACSMEN LL_APB1_GRP1_DisableClockSleep\n 740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR I2C3SMEN LL_APB1_GRP1_DisableClockSleep\n 741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB1SMENR LPTIM1SMEN LL_APB1_GRP1_DisableClockSleep 742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) 745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LCD (*) 748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPUART1 752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*) 753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*) ARM GAS /tmp/cc5G6dGG.s page 21 754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CRS (*) 758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) 761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClockSleep(uint32_t Periphs) 767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->APB1SMENR, Periphs); 769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @} 773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2 776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @{ 777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Enable APB2 peripherals clock. 781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB2ENR SYSCFGEN LL_APB2_GRP1_EnableClock\n 782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR TIM21EN LL_APB2_GRP1_EnableClock\n 783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR TIM22EN LL_APB2_GRP1_EnableClock\n 784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR FWEN LL_APB2_GRP1_EnableClock\n 785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR ADCEN LL_APB2_GRP1_EnableClock\n 786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR SPI1EN LL_APB2_GRP1_EnableClock\n 787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n 788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR DBGEN LL_APB2_GRP1_EnableClock 789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG 791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM21 792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM22 (*) 793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_FW 794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*) 797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU 798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) 803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __IO uint32_t tmpreg; 805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); 806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB2ENR, Periphs); 808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** (void)tmpreg; 809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** ARM GAS /tmp/cc5G6dGG.s page 22 811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Check if APB2 peripheral clock is enabled or not 813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB2ENR SYSCFGEN LL_APB2_GRP1_IsEnabledClock\n 814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR TIM21EN LL_APB2_GRP1_IsEnabledClock\n 815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR TIM22EN LL_APB2_GRP1_IsEnabledClock\n 816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR FWEN LL_APB2_GRP1_IsEnabledClock\n 817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR ADCEN LL_APB2_GRP1_IsEnabledClock\n 818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR SPI1EN LL_APB2_GRP1_IsEnabledClock\n 819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_IsEnabledClock\n 820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR DBGEN LL_APB2_GRP1_IsEnabledClock 821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG 823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM21 824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM22 (*) 825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_FW 826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*) 829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU 830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval State of Periphs (1 or 0). 833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) 835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs); 837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Disable APB2 peripherals clock. 841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB2ENR SYSCFGEN LL_APB2_GRP1_DisableClock\n 842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR TIM21EN LL_APB2_GRP1_DisableClock\n 843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR TIM22EN LL_APB2_GRP1_DisableClock\n 844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR FWEN LL_APB2_GRP1_DisableClock\n 845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR ADCEN LL_APB2_GRP1_DisableClock\n 846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR SPI1EN LL_APB2_GRP1_DisableClock\n 847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_DisableClock\n 848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2ENR DBGEN LL_APB2_GRP1_DisableClock 849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG 851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM21 852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM22 (*) 853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_FW 854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*) 857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU 858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) 863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->APB2ENR, Periphs); 865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** ARM GAS /tmp/cc5G6dGG.s page 23 868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Force APB2 peripherals reset. 869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB2RSTR SYSCFGRST LL_APB2_GRP1_ForceReset\n 870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR TIM21RST LL_APB2_GRP1_ForceReset\n 871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR TIM22RST LL_APB2_GRP1_ForceReset\n 872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR ADCRST LL_APB2_GRP1_ForceReset\n 873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR SPI1RST LL_APB2_GRP1_ForceReset\n 874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR USART1RST LL_APB2_GRP1_ForceReset\n 875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR DBGRST LL_APB2_GRP1_ForceReset 876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ALL 878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG 879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM21 880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM22 (*) 881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*) 884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU 885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. 887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) 890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** SET_BIT(RCC->APB2RSTR, Periphs); 169 .loc 2 891 0 170 007a 0F4B ldr r3, .L15+20 171 007c 5A6A ldr r2, [r3, #36] 172 007e 0421 movs r1, #4 173 0080 0A43 orrs r2, r1 174 0082 5A62 str r2, [r3, #36] 175 .LVL15: 176 .LBE83: 177 .LBE82: 178 .LBB84: 179 .LBB85: 892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** 895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @brief Release APB2 peripherals reset. 896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @rmtoll APB2RSTR SYSCFGRST LL_APB2_GRP1_ReleaseReset\n 897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR TIM21RST LL_APB2_GRP1_ReleaseReset\n 898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR TIM22RST LL_APB2_GRP1_ReleaseReset\n 899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR ADCRST LL_APB2_GRP1_ReleaseReset\n 900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR SPI1RST LL_APB2_GRP1_ReleaseReset\n 901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR USART1RST LL_APB2_GRP1_ReleaseReset\n 902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * APB2RSTR DBGRST LL_APB2_GRP1_ReleaseReset 903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ALL 905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG 906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM21 907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM22 (*) 908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*) 911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU 912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * 913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * (*) value not defined in all devices. ARM GAS /tmp/cc5G6dGG.s page 24 914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** * @retval None 915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */ 916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) 917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** { 918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** CLEAR_BIT(RCC->APB2RSTR, Periphs); 180 .loc 2 918 0 181 0084 5A6A ldr r2, [r3, #36] 182 0086 8A43 bics r2, r1 183 0088 5A62 str r2, [r3, #36] 184 .LBE85: 185 .LBE84: 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 186 .loc 1 164 0 187 008a 0120 movs r0, #1 188 .LVL16: 189 008c D6E7 b .L3 190 .LVL17: 191 .L14: 192 .LBB86: 193 .LBB87: 891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** } 194 .loc 2 891 0 195 008e 0A4B ldr r3, .L15+20 196 0090 5A6A ldr r2, [r3, #36] 197 0092 2021 movs r1, #32 198 0094 0A43 orrs r2, r1 199 0096 5A62 str r2, [r3, #36] 200 .LVL18: 201 .LBE87: 202 .LBE86: 203 .LBB88: 204 .LBB89: 205 .loc 2 918 0 206 0098 5A6A ldr r2, [r3, #36] 207 009a 8A43 bics r2, r1 208 009c 5A62 str r2, [r3, #36] 209 .LBE89: 210 .LBE88: 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 211 .loc 1 164 0 212 009e 0120 movs r0, #1 213 .LVL19: 214 00a0 CCE7 b .L3 215 .L16: 216 00a2 C046 .align 2 217 .L15: 218 00a4 00040040 .word 1073742848 219 00a8 00100040 .word 1073745920 220 00ac 00140040 .word 1073746944 221 00b0 00080140 .word 1073809408 222 00b4 00140140 .word 1073812480 223 00b8 00100240 .word 1073876992 224 .cfi_endproc 225 .LFE211: 227 .section .text.LL_TIM_StructInit,"ax",%progbits 228 .align 1 229 .global LL_TIM_StructInit ARM GAS /tmp/cc5G6dGG.s page 25 230 .syntax unified 231 .code 16 232 .thumb_func 233 .fpu softvfp 235 LL_TIM_StructInit: 236 .LFB212: 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Set the fields of the time base unit configuration data structure 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * to their default values. 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (time base unit configura 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval None 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct) 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 237 .loc 1 222 0 238 .cfi_startproc 239 @ args = 0, pretend = 0, frame = 0 240 @ frame_needed = 0, uses_anonymous_args = 0 241 @ link register save eliminated. 242 .LVL20: 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the default configuration */ 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_InitStruct->Prescaler = (uint16_t)0x0000U; 243 .loc 1 224 0 244 0000 0023 movs r3, #0 245 0002 0380 strh r3, [r0] 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_InitStruct->CounterMode = LL_TIM_COUNTERMODE_UP; 246 .loc 1 225 0 247 0004 4360 str r3, [r0, #4] 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_InitStruct->Autoreload = (uint32_t)0xFFFFFFFFU; 248 .loc 1 226 0 249 0006 0122 movs r2, #1 250 0008 5242 rsbs r2, r2, #0 251 000a 8260 str r2, [r0, #8] 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; 252 .loc 1 227 0 253 000c C360 str r3, [r0, #12] 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 254 .loc 1 228 0 255 @ sp needed 256 000e 7047 bx lr 257 .cfi_endproc 258 .LFE212: 260 .section .text.LL_TIM_Init,"ax",%progbits 261 .align 1 262 .global LL_TIM_Init 263 .syntax unified 264 .code 16 265 .thumb_func 266 .fpu softvfp 268 LL_TIM_Init: 269 .LFB213: 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx time base unit. 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit conf ARM GAS /tmp/cc5G6dGG.s page 26 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct) 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 270 .loc 1 239 0 271 .cfi_startproc 272 @ args = 0, pretend = 0, frame = 0 273 @ frame_needed = 0, uses_anonymous_args = 0 274 @ link register save eliminated. 275 .LVL21: 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpcr1 = 0U; 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_INSTANCE(TIMx)); 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode)); 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision)); 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpcr1 = LL_TIM_ReadReg(TIMx, CR1); 276 .loc 1 247 0 277 0000 0368 ldr r3, [r0] 278 .LVL22: 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 279 .loc 1 249 0 280 0002 8022 movs r2, #128 281 0004 D205 lsls r2, r2, #23 282 0006 9042 cmp r0, r2 283 0008 08D0 beq .L19 284 .loc 1 249 0 is_stmt 0 discriminator 1 285 000a 144A ldr r2, .L23 286 000c 9042 cmp r0, r2 287 000e 05D0 beq .L19 288 .loc 1 249 0 discriminator 2 289 0010 134A ldr r2, .L23+4 290 0012 9042 cmp r0, r2 291 0014 02D0 beq .L19 292 .loc 1 249 0 discriminator 3 293 0016 134A ldr r2, .L23+8 294 0018 9042 cmp r0, r2 295 001a 03D1 bne .L20 296 .L19: 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Counter Mode */ 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode); 297 .loc 1 252 0 is_stmt 1 298 001c 7022 movs r2, #112 299 001e 9343 bics r3, r2 300 .LVL23: 301 0020 4A68 ldr r2, [r1, #4] 302 0022 1343 orrs r3, r2 303 .LVL24: 304 .L20: 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) ARM GAS /tmp/cc5G6dGG.s page 27 305 .loc 1 255 0 306 0024 8022 movs r2, #128 307 0026 D205 lsls r2, r2, #23 308 0028 9042 cmp r0, r2 309 002a 08D0 beq .L21 310 .loc 1 255 0 is_stmt 0 discriminator 1 311 002c 0B4A ldr r2, .L23 312 002e 9042 cmp r0, r2 313 0030 05D0 beq .L21 314 .loc 1 255 0 discriminator 2 315 0032 0B4A ldr r2, .L23+4 316 0034 9042 cmp r0, r2 317 0036 02D0 beq .L21 318 .loc 1 255 0 discriminator 3 319 0038 0A4A ldr r2, .L23+8 320 003a 9042 cmp r0, r2 321 003c 03D1 bne .L22 322 .L21: 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the clock division */ 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision); 323 .loc 1 258 0 is_stmt 1 324 003e 0A4A ldr r2, .L23+12 325 0040 1340 ands r3, r2 326 .LVL25: 327 0042 CA68 ldr r2, [r1, #12] 328 0044 1343 orrs r3, r2 329 .LVL26: 330 .L22: 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CR1 */ 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR1, tmpcr1); 331 .loc 1 262 0 332 0046 0360 str r3, [r0] 333 .LVL27: 334 .LBB90: 335 .LBB91: 336 .file 3 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h" 1:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ****************************************************************************** 3:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @file stm32l0xx_ll_tim.h 4:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @author MCD Application Team 5:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Header file of TIM LL module. 6:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ****************************************************************************** 7:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @attention 8:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 9:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** *

© COPYRIGHT(c) 2016 STMicroelectronics

10:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 11:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * Redistribution and use in source and binary forms, with or without modification, 12:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * are permitted provided that the following conditions are met: 13:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 1. Redistributions of source code must retain the above copyright notice, 14:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * this list of conditions and the following disclaimer. 15:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2. Redistributions in binary form must reproduce the above copyright notice, 16:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * this list of conditions and the following disclaimer in the documentation 17:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * and/or other materials provided with the distribution. 18:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 3. Neither the name of STMicroelectronics nor the names of its contributors ARM GAS /tmp/cc5G6dGG.s page 28 19:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * may be used to endorse or promote products derived from this software 20:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * without specific prior written permission. 21:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 22:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 33:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ****************************************************************************** 34:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 35:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 36:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 37:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #ifndef __STM32L0xx_LL_TIM_H 38:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define __STM32L0xx_LL_TIM_H 39:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 40:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #ifdef __cplusplus 41:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** extern "C" { 42:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #endif 43:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 44:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Includes ------------------------------------------------------------------*/ 45:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #include "stm32l0xx.h" 46:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 47:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @addtogroup STM32L0xx_LL_Driver 48:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 49:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 50:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 51:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #if defined (TIM2) || defined (TIM3) || defined (TIM21) || defined (TIM22) || defined (TIM6) || def 52:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 53:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL TIM 54:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 55:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 56:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 57:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Private types -------------------------------------------------------------*/ 58:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Private variables ---------------------------------------------------------*/ 59:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Variables TIM Private Variables 60:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 61:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 62:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** static const uint8_t OFFSET_TAB_CCMRx[] = 63:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 64:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0x00U, /* 0: TIMx_CH1 */ 65:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0x00U, /* 1: NA */ 66:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0x00U, /* 2: TIMx_CH2 */ 67:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0x00U, /* 3: NA */ 68:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0x04U, /* 4: TIMx_CH3 */ 69:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0x00U, /* 5: NA */ 70:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0x04U /* 6: TIMx_CH4 */ 71:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** }; 72:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 73:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OCxx[] = 74:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 75:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 0: OC1M, OC1FE, OC1PE */ ARM GAS /tmp/cc5G6dGG.s page 29 76:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 1: - NA */ 77:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 8U, /* 2: OC2M, OC2FE, OC2PE */ 78:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 3: - NA */ 79:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 4: OC3M, OC3FE, OC3PE */ 80:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 5: - NA */ 81:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 8U /* 6: OC4M, OC4FE, OC4PE */ 82:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** }; 83:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 84:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** static const uint8_t SHIFT_TAB_ICxx[] = 85:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 86:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 0: CC1S, IC1PSC, IC1F */ 87:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 1: - NA */ 88:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 8U, /* 2: CC2S, IC2PSC, IC2F */ 89:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 3: - NA */ 90:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 4: CC3S, IC3PSC, IC3F */ 91:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 5: - NA */ 92:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 8U /* 6: CC4S, IC4PSC, IC4F */ 93:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** }; 94:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 95:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** static const uint8_t SHIFT_TAB_CCxP[] = 96:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 97:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 0: CC1P */ 98:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 1: NA */ 99:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 4U, /* 2: CC2P */ 100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 3: NA */ 101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 8U, /* 4: CC3P */ 102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 0U, /* 5: NA */ 103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 12U /* 6: CC4P */ 104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** }; 105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Private constants ---------------------------------------------------------*/ 112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Constants TIM Private Constants 113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Remap mask definitions */ 118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define TIMx_OR_RMP_SHIFT ((uint32_t)16U) 119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define TIMx_OR_RMP_MASK ((uint32_t)0x0000FFFFU) 120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define TIM2_OR_RMP_MASK ((uint32_t)((TIM2_OR_ETR_RMP | TIM2_OR_TI4_RMP ) << TIMx_OR_RMP_SHIFT)) 121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define TIM21_OR_RMP_MASK ((uint32_t)((TIM21_OR_ETR_RMP | TIM21_OR_TI1_RMP | TIM21_OR_TI2_RMP) << 122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define TIM22_OR_RMP_MASK ((uint32_t)((TIM22_OR_ETR_RMP | TIM22_OR_TI1_RMP) << TIMx_OR_RMP_SHIFT)) 123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #if defined(TIM3) 124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define TIM3_OR_RMP_MASK ((uint32_t)((TIM3_OR_ETR_RMP | TIM3_OR_TI1_RMP | TIM3_OR_TI2_RMP | TIM3_ 125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #endif /* TIM3 */ 126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ARM GAS /tmp/cc5G6dGG.s page 30 133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Private macros ------------------------------------------------------------*/ 135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Macros TIM Private Macros 136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @brief Convert channel id into channel index. 139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __CHANNEL__ This parameter can be one of the following values: 140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval none 145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \ 147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\ 148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\ 149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U : 6U) 150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Exported types ------------------------------------------------------------*/ 157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER) 158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_ES_INIT TIM Exported Init structure 159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief TIM Time Base configuration structure definition. 164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** typedef struct 166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. 168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a number between Min_Data=0x0000 and Max_D 169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ 171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t CounterMode; /*!< Specifies the counter mode. 173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE. 174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ 176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active 178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** Auto-Reload Register at the next update event. 179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter must be a number between Min_Data=0x0000 and Max_ 180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** Some timer instances may support 32 bits counters. In that case 181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ 183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t ClockDivision; /*!< Specifies the clock division. 185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION. 186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ 188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } LL_TIM_InitTypeDef; 189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ARM GAS /tmp/cc5G6dGG.s page 31 190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief TIM Output Compare configuration structure definition. 192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** typedef struct 194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t OCMode; /*!< Specifies the output mode. 196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCMODE. 197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ref 199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t OCState; /*!< Specifies the TIM Output Compare state. 201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE. 202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary functions @ref 204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Re 206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a number between Min_Data=0x0000 and Max_Data= 207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function LL_TI 209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t OCPolarity; /*!< Specifies the output polarity. 211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. 212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ref 214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } LL_TIM_OC_InitTypeDef; 216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief TIM Input Capture configuration structure definition. 219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** typedef struct 222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. 225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. 226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ref 228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t ICActiveInput; /*!< Specifies the input. 230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. 231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ref 233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. 235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ref 238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t ICFilter; /*!< Specifies the input capture filter. 240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. 241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @ref 243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } LL_TIM_IC_InitTypeDef; 244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** ARM GAS /tmp/cc5G6dGG.s page 32 247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief TIM Encoder interface configuration structure definition. 248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** typedef struct 250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). 252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE. 253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @re 255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. 257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. 258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @re 260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source 262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. 263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @re 265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. 267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @re 270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t IC1Filter; /*!< Specifies the TI1 input filter. 272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. 273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @re 275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input. 277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. 278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @re 280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source 282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. 283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @re 285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value. 287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @re 290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t IC2Filter; /*!< Specifies the TI2 input filter. 292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. 293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** This feature can be modified afterwards using unitary function @re 295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } LL_TIM_ENCODER_InitTypeDef; 297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #endif /* USE_FULL_LL_DRIVER */ 303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ARM GAS /tmp/cc5G6dGG.s page 33 304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Exported constants --------------------------------------------------------*/ 305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Constants TIM Exported Constants 306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines 310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Flags defines which can be used with LL_TIM_ReadReg function. 311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_UIF TIM_SR_UIF /*!< Update interrupt flag */ 314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_CC1IF TIM_SR_CC1IF /*!< Capture/compare 1 interrup 315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_CC2IF TIM_SR_CC2IF /*!< Capture/compare 2 interrup 316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_CC3IF TIM_SR_CC3IF /*!< Capture/compare 3 interrup 317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_CC4IF TIM_SR_CC4IF /*!< Capture/compare 4 interrup 318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_TIF TIM_SR_TIF /*!< Trigger interrupt flag */ 319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_CC1OF TIM_SR_CC1OF /*!< Capture/Compare 1 overcapt 320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_CC2OF TIM_SR_CC2OF /*!< Capture/Compare 2 overcapt 321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_CC3OF TIM_SR_CC3OF /*!< Capture/Compare 3 overcapt 322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_SR_CC4OF TIM_SR_CC4OF /*!< Capture/Compare 4 overcapt 323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EC_IT IT Defines 328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions. 329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_DIER_CC1IE TIM_DIER_CC1IE /*!< Capture/compare 1 interrup 333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_DIER_CC2IE TIM_DIER_CC2IE /*!< Capture/compare 2 interrup 334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_DIER_CC3IE TIM_DIER_CC3IE /*!< Capture/compare 3 interrup 335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_DIER_CC4IE TIM_DIER_CC4IE /*!< Capture/compare 4 interrup 336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_DIER_TIE TIM_DIER_TIE /*!< Trigger interrupt enable * 337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EC_UPDATESOURCE Update Source 342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_REGULAR ((uint32_t)0x00000000U) /*!< Counter overflow/underf 345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /*!< Only counter overflow/un 346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode 351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter is not stopped a 354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_REPETITIVE ((uint32_t)0x00000000U) /*!< Counter stops counting 355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode 360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ ARM GAS /tmp/cc5G6dGG.s page 34 361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_UP ((uint32_t)0x00000000U) /*!__REG__, (__VALUE 819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Read a value in TIM register. 822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __INSTANCE__ TIM Instance 823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __REG__ Register to be read 824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Register value 825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EM_Exported_Macros Exported_Macros 832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief HELPER macro calculating the prescaler value to achieve the required counter clock freq 838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000); 839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __CNTCLK__ counter clock frequency (in Hz) 841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Prescaler value (between Min_Data=0 and Max_Data=65535) 842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \ 844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((__TIMCLK__)/(__CNTCLK__) - 1U) : 0U 845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required output signal fr 848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000); 849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __PSC__ prescaler 851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __FREQ__ output signal frequency (in Hz) 852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \ 855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U) 856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief HELPER macro calculating the compare value required to achieve the required timer outpu 859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); 860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __PSC__ prescaler 862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us) 863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Compare value (between Min_Data=0 and Max_Data=65535) 864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \ 866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ 867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration ( 871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20); 872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __PSC__ prescaler ARM GAS /tmp/cc5G6dGG.s page 43 874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us) 875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __PULSE__ pulse duration (in us) 876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ 879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \ 880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__)))) 881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief HELPER macro retrieving the ratio of the input capture prescaler 884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ()); 885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param __ICPSC__ This parameter can be one of the following values: 886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2 888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4 889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8 890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Input capture prescaler ratio (1, 2, 4 or 8) 891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** #define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \ 893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ((uint32_t)((uint32_t)0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos))) 894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /* Exported functions --------------------------------------------------------*/ 906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Functions TIM Exported Functions 907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Time_Base Time Base configuration 911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable timer counter. 915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_EnableCounter 916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 919:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) 920:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 921:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_CEN); 922:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 923:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 924:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 925:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable timer counter. 926:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_DisableCounter 927:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 928:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 929:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 930:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) ARM GAS /tmp/cc5G6dGG.s page 44 931:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 932:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); 933:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 934:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 935:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 936:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the timer counter is enabled. 937:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_IsEnabledCounter 938:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 939:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 940:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 941:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(TIM_TypeDef *TIMx) 942:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 943:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)); 944:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 945:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 946:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 947:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable update event generation. 948:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent 949:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 950:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 951:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 952:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) 953:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 954:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UDIS); 955:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 956:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 957:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 958:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable update event generation. 959:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent 960:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 961:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 962:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 963:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) 964:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 965:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); 966:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 967:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 968:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 969:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether update event generation is enabled. 970:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent 971:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 972:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 973:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 974:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(TIM_TypeDef *TIMx) 975:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 976:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (TIM_CR1_UDIS)); 977:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 978:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 979:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 980:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set update event source 981:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events 982:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * generate an update interrupt or DMA request if enabled: 983:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * - Counter overflow/underflow 984:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * - Setting the UG bit 985:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * - Update generation through the slave mode controller 986:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter 987:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * overflow/underflow generates an update interrupt or DMA request if enabled. ARM GAS /tmp/cc5G6dGG.s page 45 988:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_SetUpdateSource 989:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 990:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param UpdateSource This parameter can be one of the following values: 991:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR 992:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER 993:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 994:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 995:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource) 996:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 997:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource); 998:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 999:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1000:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1001:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get actual event update source 1002:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_GetUpdateSource 1003:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1004:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1005:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR 1006:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER 1007:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1008:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(TIM_TypeDef *TIMx) 1009:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1010:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS)); 1011:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1012:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1013:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1014:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set one pulse mode (one shot v.s. repetitive). 1015:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_SetOnePulseMode 1016:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1017:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param OnePulseMode This parameter can be one of the following values: 1018:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE 1019:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE 1020:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1021:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1022:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode) 1023:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1024:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); 1025:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1026:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1027:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1028:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get actual one pulse mode. 1029:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode 1030:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1031:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1032:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE 1033:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE 1034:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1035:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(TIM_TypeDef *TIMx) 1036:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1037:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM)); 1038:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1039:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1040:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1041:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the timer counter counting mode. 1042:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to 1043:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported 1044:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * by a timer instance. ARM GAS /tmp/cc5G6dGG.s page 46 1045:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_SetCounterMode\n 1046:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CR1 CMS LL_TIM_SetCounterMode 1047:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1048:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param CounterMode This parameter can be one of the following values: 1049:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP 1050:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_DOWN 1051:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP 1052:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN 1053:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN 1054:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1055:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1056:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode) 1057:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1058:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_DIR | TIM_CR1_CMS, CounterMode); 1059:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1060:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1061:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1062:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get actual counter mode. 1063:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to 1064:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported 1065:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * by a timer instance. 1066:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetCounterMode\n 1067:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CR1 CMS LL_TIM_GetCounterMode 1068:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1069:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1070:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP 1071:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_DOWN 1072:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP 1073:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN 1074:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN 1075:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1076:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef *TIMx) 1077:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1078:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR | TIM_CR1_CMS)); 1079:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1080:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1081:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1082:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable auto-reload (ARR) preload. 1083:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload 1084:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1085:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1086:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1087:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx) 1088:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1089:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_ARPE); 1090:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1091:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1092:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1093:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable auto-reload (ARR) preload. 1094:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_DisableARRPreload 1095:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1096:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1097:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1098:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) 1099:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); 1101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } ARM GAS /tmp/cc5G6dGG.s page 47 1102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether auto-reload (ARR) preload is enabled. 1105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_IsEnabledARRPreload 1106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 1108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx) 1110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)); 1112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the division ratio between the timer clock and the sampling clock used by the dead 1116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check 1117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer 1118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * instance. 1119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_SetClockDivision 1120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param ClockDivision This parameter can be one of the following values: 1122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 1123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 1125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision) 1128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); 1130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the actual division ratio between the timer clock and the sampling clock used by t 1134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check 1135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer 1136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * instance. 1137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_GetClockDivision 1138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 1141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 1143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(TIM_TypeDef *TIMx) 1145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD)); 1147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the counter value. 1151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_SetCounter 1152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF) 1154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter) 1157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->CNT, Counter); ARM GAS /tmp/cc5G6dGG.s page 48 1159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the counter value. 1163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_GetCounter 1164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF) 1166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounter(TIM_TypeDef *TIMx) 1168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CNT)); 1170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the current direction of the counter 1174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection 1175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_UP 1178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_DOWN 1179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetDirection(TIM_TypeDef *TIMx) 1181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); 1183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the prescaler value. 1187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1). 1188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note The prescaler can be changed on the fly as this control register is buffered. The new 1189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * prescaler ratio is taken into account at the next update event. 1190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter 1191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll PSC PSC LL_TIM_SetPrescaler 1192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Prescaler between Min_Data=0 and Max_Data=65535 1194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler) 1197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->PSC, Prescaler); 1199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the prescaler value. 1203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll PSC PSC LL_TIM_GetPrescaler 1204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Prescaler value between Min_Data=0 and Max_Data=65535 1206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef *TIMx) 1208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->PSC)); 1210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the auto-reload value. 1214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note The counter is blocked while the auto-reload value is null. 1215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter ARM GAS /tmp/cc5G6dGG.s page 49 1216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_SetAutoReload 1217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param AutoReload between Min_Data=0 and Max_Data=65535 1219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload) 1222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->ARR, AutoReload); 337 .loc 3 1223 0 338 0048 8B68 ldr r3, [r1, #8] 339 .LVL28: 340 004a C362 str r3, [r0, #44] 341 .LVL29: 342 .LBE91: 343 .LBE90: 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Autoreload value */ 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_SetAutoReload(TIMx, TIM_InitStruct->Autoreload); 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Prescaler value */ 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_SetPrescaler(TIMx, TIM_InitStruct->Prescaler); 344 .loc 1 268 0 345 004c 0B88 ldrh r3, [r1] 346 .LVL30: 347 .LBB92: 348 .LBB93: 1198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 349 .loc 3 1198 0 350 004e 8362 str r3, [r0, #40] 351 .LVL31: 352 .LBE93: 353 .LBE92: 354 .LBB94: 355 .LBB95: 1224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the auto-reload value. 1228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_GetAutoReload 1229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Auto-reload value 1231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(TIM_TypeDef *TIMx) 1233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->ARR)); 1235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 1239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration 1242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 1243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the trigger of the capture/compare DMA request. 1246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger ARM GAS /tmp/cc5G6dGG.s page 50 1247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param DMAReqTrigger This parameter can be one of the following values: 1249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC 1250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE 1251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger) 1254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger); 1256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get actual trigger of the capture/compare DMA request. 1260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger 1261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC 1264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE 1265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(TIM_TypeDef *TIMx) 1267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS)); 1269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable capture/compare channels. 1273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_EnableChannel\n 1274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_EnableChannel\n 1275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_EnableChannel\n 1276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_EnableChannel 1277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels) 1286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->CCER, Channels); 1288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable capture/compare channels. 1292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_DisableChannel\n 1293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_DisableChannel\n 1294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_DisableChannel\n 1295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_DisableChannel 1296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ ARM GAS /tmp/cc5G6dGG.s page 51 1304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels) 1305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->CCER, Channels); 1307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether channel(s) is(are) enabled. 1311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_IsEnabledChannel\n 1312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_IsEnabledChannel\n 1313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_IsEnabledChannel\n 1314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_IsEnabledChannel 1315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 1322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(TIM_TypeDef *TIMx, uint32_t Channels) 1324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, Channels) == (Channels)); 1326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 1330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Output_Channel Output channel configuration 1333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 1334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Configure an output channel. 1337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n 1338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n 1339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_OC_ConfigOutput\n 1340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_OC_ConfigOutput\n 1341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC1P LL_TIM_OC_ConfigOutput\n 1342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_ConfigOutput\n 1343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n 1344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_ConfigOutput\n 1345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Configuration This parameter must be a combination of all the following values: 1352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW 1353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura 1356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); 1360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), ARM GAS /tmp/cc5G6dGG.s page 52 1361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); 1362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Define the behavior of the output reference signal OCxREF from which 1366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * OCx and OCxN (when relevant) are derived. 1367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n 1368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_SetMode\n 1369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_SetMode\n 1370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_SetMode 1371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Mode This parameter can be one of the following values: 1378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN 1379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE 1380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE 1381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE 1382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE 1383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE 1384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1 1385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2 1386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode) 1389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIF 1393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the output compare mode of an output channel. 1397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n 1398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_GetMode\n 1399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_GetMode\n 1400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_GetMode 1401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN 1409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE 1410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE 1411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE 1412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE 1413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE 1414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1 1415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2 1416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel) ARM GAS /tmp/cc5G6dGG.s page 53 1418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIF 1422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the polarity of an output channel. 1426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n 1427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_SetPolarity\n 1428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_SetPolarity\n 1429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_SetPolarity 1430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values: 1437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH 1438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW 1439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) 1442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[i 1445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the polarity of an output channel. 1449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n 1450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_GetPolarity\n 1451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_GetPolarity\n 1452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_GetPolarity 1453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH 1461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW 1462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel) 1464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChan 1467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable fast mode for the output channel. 1471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Acts only if the channel is configured in PWM1 or PWM2 mode. 1472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n 1473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_EnableFast\n 1474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_EnableFast\n ARM GAS /tmp/cc5G6dGG.s page 54 1475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_EnableFast 1476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel) 1485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); 1489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable fast mode for the output channel. 1494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n 1495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_DisableFast\n 1496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_DisableFast\n 1497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_DisableFast 1498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel) 1507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); 1511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether fast mode is enabled for the output channel. 1516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_IsEnabledFast\n 1517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n 1518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n 1519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n 1520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 1527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel) 1529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh ARM GAS /tmp/cc5G6dGG.s page 55 1532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]; 1533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(*pReg, bitfield) == bitfield); 1534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable compare register (TIMx_CCRx) preload for the output channel. 1538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n 1539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_EnablePreload\n 1540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_EnablePreload\n 1541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_EnablePreload 1542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) 1551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); 1555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable compare register (TIMx_CCRx) preload for the output channel. 1559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_DisablePreload\n 1560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_DisablePreload\n 1561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_DisablePreload\n 1562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_DisablePreload 1563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel) 1572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); 1576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channe 1580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n 1581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n 1582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload\n 1583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload\n 1584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 ARM GAS /tmp/cc5G6dGG.s page 56 1589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 1591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel) 1593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; 1597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(*pReg, bitfield) == bitfield); 1598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable clearing the output channel on an external event. 1602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force 1603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether 1604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event. 1605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_EnableClear\n 1606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_EnableClear\n 1607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_EnableClear\n 1608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_EnableClear 1609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) 1618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); 1622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable clearing the output channel on an external event. 1626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether 1627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event. 1628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n 1629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_DisableClear\n 1630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_DisableClear\n 1631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_DisableClear 1632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) 1641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); 1645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } ARM GAS /tmp/cc5G6dGG.s page 57 1646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates clearing the output channel on an external event is enabled for the output ch 1649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note This function enables clearing the output channel on an external event. 1650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force 1651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether 1652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event. 1653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_IsEnabledClear\n 1654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_IsEnabledClear\n 1655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_IsEnabledClear\n 1656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_IsEnabledClear\n 1657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 1664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel) 1666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]; 1670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(*pReg, bitfield) == bitfield); 1671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set compare value for output channel 1 (TIMx_CCR1). 1675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not 1676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * output channel 1 is supported by a timer instance. 1677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1 1678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 1680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) 1683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->CCR1, CompareValue); 1685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set compare value for output channel 2 (TIMx_CCR2). 1689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not 1690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * output channel 2 is supported by a timer instance. 1691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_SetCompareCH2 1692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 1694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue) 1697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->CCR2, CompareValue); 1699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set compare value for output channel 3 (TIMx_CCR3). ARM GAS /tmp/cc5G6dGG.s page 58 1703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not 1704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * output channel is supported by a timer instance. 1705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3 1706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 1708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue) 1711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->CCR3, CompareValue); 1713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set compare value for output channel 4 (TIMx_CCR4). 1717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not 1718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * output channel 4 is supported by a timer instance. 1719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4 1720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 1722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue) 1725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->CCR4, CompareValue); 1727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR1) set for output channel 1. 1731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not 1732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * output channel 1 is supported by a timer instance. 1733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1 1734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 1736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(TIM_TypeDef *TIMx) 1738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR1)); 1740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR2) set for output channel 2. 1744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not 1745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * output channel 2 is supported by a timer instance. 1746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2 1747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 1749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(TIM_TypeDef *TIMx) 1751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); 1753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR3) set for output channel 3. 1757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not 1758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * output channel 3 is supported by a timer instance. 1759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_GetCompareCH3 ARM GAS /tmp/cc5G6dGG.s page 59 1760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 1762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(TIM_TypeDef *TIMx) 1764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3)); 1766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR4) set for output channel 4. 1770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not 1771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * output channel 4 is supported by a timer instance. 1772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_GetCompareCH4 1773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 1775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(TIM_TypeDef *TIMx) 1777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4)); 1779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 1783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Input_Channel Input channel configuration 1786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 1787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Configure input channel. 1790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n 1791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 IC1PSC LL_TIM_IC_Config\n 1792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 IC1F LL_TIM_IC_Config\n 1793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_Config\n 1794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_Config\n 1795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_Config\n 1796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_Config\n 1797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_Config\n 1798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_Config\n 1799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_Config\n 1800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_Config\n 1801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_Config\n 1802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC1P LL_TIM_IC_Config\n 1803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_Config\n 1804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_Config\n 1805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_Config\n 1806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_Config\n 1807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_Config\n 1808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_Config\n 1809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_Config 1810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Configuration This parameter must be a combination of all the following values: ARM GAS /tmp/cc5G6dGG.s page 60 1817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_ 1818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8 1819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8 1820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_I 1821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) 1824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChanne 1828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SH 1829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), 1830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); 1831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the active input. 1835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n 1836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_SetActiveInput\n 1837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_SetActiveInput\n 1838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_SetActiveInput 1839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param ICActiveInput This parameter can be one of the following values: 1846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI 1847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI 1848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC 1849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv 1852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT 1856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the current active input. 1860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n 1861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n 1862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_GetActiveInput\n 1863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_GetActiveInput 1864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI 1872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI 1873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC ARM GAS /tmp/cc5G6dGG.s page 61 1874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel) 1876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann 1880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the prescaler of input channel. 1884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 IC1PSC LL_TIM_IC_SetPrescaler\n 1885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_SetPrescaler\n 1886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_SetPrescaler\n 1887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_SetPrescaler 1888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param ICPrescaler This parameter can be one of the following values: 1895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 1896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2 1897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4 1898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8 1899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal 1902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT 1906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the current prescaler value acting on an input channel. 1910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 IC1PSC LL_TIM_IC_GetPrescaler\n 1911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_GetPrescaler\n 1912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_GetPrescaler\n 1913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_GetPrescaler 1914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1919:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1920:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1921:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 1922:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2 1923:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4 1924:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8 1925:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1926:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel) 1927:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1928:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1929:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1930:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iCha ARM GAS /tmp/cc5G6dGG.s page 62 1931:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1932:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1933:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1934:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the input filter duration. 1935:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_SetFilter\n 1936:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_SetFilter\n 1937:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_SetFilter\n 1938:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_SetFilter 1939:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1940:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1941:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1942:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1943:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1944:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1945:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param ICFilter This parameter can be one of the following values: 1946:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 1947:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 1948:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4 1949:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8 1950:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6 1951:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8 1952:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6 1953:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8 1954:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6 1955:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8 1956:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5 1957:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6 1958:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8 1959:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5 1960:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 1961:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 1962:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 1963:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 1964:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter) 1965:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 1966:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1967:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 1968:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ 1969:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1970:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 1971:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 1972:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the input filter duration. 1973:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n 1974:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_GetFilter\n 1975:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_GetFilter\n 1976:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_GetFilter 1977:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 1978:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1979:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1980:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1981:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1982:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1983:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1984:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 1985:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 1986:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4 1987:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8 ARM GAS /tmp/cc5G6dGG.s page 63 1988:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6 1989:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8 1990:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6 1991:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8 1992:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6 1993:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8 1994:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5 1995:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6 1996:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8 1997:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5 1998:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 1999:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 2000:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2001:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef *TIMx, uint32_t Channel) 2002:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2003:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2004:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iCh 2005:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann 2006:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2007:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2008:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2009:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the input channel polarity. 2010:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_SetPolarity\n 2011:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_SetPolarity\n 2012:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_SetPolarity\n 2013:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_SetPolarity\n 2014:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_SetPolarity\n 2015:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_SetPolarity\n 2016:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_SetPolarity\n 2017:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_SetPolarity 2018:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2019:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2020:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2021:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2022:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2023:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2024:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param ICPolarity This parameter can be one of the following values: 2025:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING 2026:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_FALLING 2027:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE 2028:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2029:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2030:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity 2031:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2032:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2033:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), 2034:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ICPolarity << SHIFT_TAB_CCxP[iChannel]); 2035:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2036:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2037:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2038:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get the current input channel polarity. 2039:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n 2040:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n 2041:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n 2042:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_GetPolarity\n 2043:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_GetPolarity\n 2044:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_GetPolarity\n ARM GAS /tmp/cc5G6dGG.s page 64 2045:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_GetPolarity\n 2046:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_GetPolarity 2047:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2048:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2049:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2050:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2051:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2052:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2053:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2054:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING 2055:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_FALLING 2056:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE 2057:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2058:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel) 2059:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2060:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2061:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> 2062:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SHIFT_TAB_CCxP[iChannel]); 2063:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2064:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2065:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2066:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination). 2067:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not 2068:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a timer instance provides an XOR input. 2069:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_EnableXORCombination 2070:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2071:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2072:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2073:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx) 2074:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2075:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_TI1S); 2076:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2077:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2078:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2079:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input. 2080:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not 2081:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a timer instance provides an XOR input. 2082:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_DisableXORCombination 2083:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2084:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2085:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2086:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx) 2087:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2088:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S); 2089:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2090:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2091:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2092:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input. 2093:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not 2094:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a timer instance provides an XOR input. 2095:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination 2096:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2097:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2098:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2099:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(TIM_TypeDef *TIMx) 2100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)); ARM GAS /tmp/cc5G6dGG.s page 65 2102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get captured value for input channel 1. 2106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not 2107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * input channel 1 is supported by a timer instance. 2108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_IC_GetCaptureCH1 2109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(TIM_TypeDef *TIMx) 2113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR1)); 2115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get captured value for input channel 2. 2119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not 2120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * input channel 2 is supported by a timer instance. 2121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_IC_GetCaptureCH2 2122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(TIM_TypeDef *TIMx) 2126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); 2128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get captured value for input channel 3. 2132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not 2133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * input channel 3 is supported by a timer instance. 2134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3 2135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(TIM_TypeDef *TIMx) 2139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3)); 2141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Get captured value for input channel 4. 2145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not 2146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * input channel 4 is supported by a timer instance. 2147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4 2148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(TIM_TypeDef *TIMx) 2152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4)); 2154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 2158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ ARM GAS /tmp/cc5G6dGG.s page 66 2159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection 2161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 2162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable external clock mode 2. 2165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ET 2166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 2167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 2168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_EnableExternalClock 2169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx) 2173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); 2175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable external clock mode 2. 2179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 2180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 2181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_DisableExternalClock 2182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx) 2186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); 2188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether external clock mode 2 is enabled. 2192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 2193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 2194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock 2195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(TIM_TypeDef *TIMx) 2199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)); 2201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the clock source of the counter clock. 2205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note when selected clock source is external clock mode 1, the timer input 2206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput() 2207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * function. This timer input must be configured by calling 2208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * the @ref LL_TIM_IC_Config() function. 2209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check 2210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * whether or not a timer instance supports external clock mode1. 2211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 2212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 2213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetClockSource\n 2214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * SMCR ECE LL_TIM_SetClockSource 2215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance ARM GAS /tmp/cc5G6dGG.s page 67 2216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param ClockSource This parameter can be one of the following values: 2217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL 2218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1 2219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2 2220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) 2223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); 2225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the encoder interface mode. 2229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check 2230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * whether or not a timer instance supports the encoder mode. 2231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetEncoderMode 2232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param EncoderMode This parameter can be one of the following values: 2234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI1 2235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI2 2236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X4_TI12 2237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode) 2240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); 2242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 2246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration 2249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 2250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the trigger output (TRGO) used for timer synchronization . 2253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_MASTER_INSTANCE(TIMx) can be used to check 2254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * whether or not a timer instance can operate as a master timer. 2255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput 2256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TimerSynchronization This parameter can be one of the following values: 2258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_RESET 2259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_ENABLE 2260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_UPDATE 2261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_CC1IF 2262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC1REF 2263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC2REF 2264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC3REF 2265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC4REF 2266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) 2269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); 2271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ARM GAS /tmp/cc5G6dGG.s page 68 2273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the synchronization mode of a slave timer. 2275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a timer instance can operate as a slave timer. 2277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetSlaveMode 2278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param SlaveMode This parameter can be one of the following values: 2280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_DISABLED 2281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_RESET 2282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_GATED 2283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_TRIGGER 2284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode) 2287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); 2289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the selects the trigger input to be used to synchronize the counter. 2293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a timer instance can operate as a slave timer. 2295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR TS LL_TIM_SetTriggerInput 2296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TriggerInput This parameter can be one of the following values: 2298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR0 2299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR1 2300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR2 2301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR3 2302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1F_ED 2303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1FP1 2304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI2FP2 2305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ETRF 2306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput) 2309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); 2311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable the Master/Slave mode. 2315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a timer instance can operate as a slave timer. 2317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_EnableMasterSlaveMode 2318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx) 2322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_MSM); 2324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable the Master/Slave mode. 2328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a timer instance can operate as a slave timer. ARM GAS /tmp/cc5G6dGG.s page 69 2330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode 2331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) 2335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); 2337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled. 2341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a timer instance can operate as a slave timer. 2343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode 2344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(TIM_TypeDef *TIMx) 2348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)); 2350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Configure the external trigger (ETR) input. 2354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not 2355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a timer instance provides an external trigger input. 2356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR ETP LL_TIM_ConfigETR\n 2357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * SMCR ETPS LL_TIM_ConfigETR\n 2358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * SMCR ETF LL_TIM_ConfigETR 2359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param ETRPolarity This parameter can be one of the following values: 2361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED 2362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_INVERTED 2363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param ETRPrescaler This parameter can be one of the following values: 2364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV1 2365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV2 2366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV4 2367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV8 2368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param ETRFilter This parameter can be one of the following values: 2369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1 2370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2 2371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4 2372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8 2373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6 2374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8 2375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6 2376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8 2377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6 2378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8 2379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5 2380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6 2381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8 2382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5 2383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6 2384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8 2385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ ARM GAS /tmp/cc5G6dGG.s page 70 2387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale 2388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** uint32_t ETRFilter) 2389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | 2391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 2395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration 2398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 2399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Configures the timer DMA burst feature. 2402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or 2403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * not a timer instance supports the DMA burst mode. 2404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n 2405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * DCR DBA LL_TIM_ConfigDMABurst 2406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param DMABurstBaseAddress This parameter can be one of the following values: 2408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR1 2409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR2 2410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR 2411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_DIER 2412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SR 2413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_EGR 2414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1 2415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2 2416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCER 2417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CNT 2418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_PSC 2419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_ARR 2420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_RCR 2421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1 2422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2 2423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3 2424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4 2425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR 2426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3 2427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5 2428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6 2429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_OR1 2430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_OR2 2431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_OR3 2432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values: 2433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER 2434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS 2435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS 2436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS 2437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS 2438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS 2439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS 2440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS 2441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS 2442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS 2443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS ARM GAS /tmp/cc5G6dGG.s page 71 2444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS 2445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS 2446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS 2447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS 2448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS 2449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS 2450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS 2451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_ 2454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->DCR, TIM_DCR_DBL | TIM_DCR_DBA, DMABurstBaseAddress | DMABurstLength); 2456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 2460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping 2463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 2464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Remap TIM inputs (input channel, internal/external triggers). 2467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note Macro @ref IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not 2468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * a some timer inputs can be remapped. 2469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll TIM2_OR ETR_RMP LL_TIM_SetRemap\n 2470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM2_OR TI4_RMP LL_TIM_SetRemap\n 2471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM21_OR ETR_RMP LL_TIM_SetRemap\n 2472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM21_OR TI1_RMP LL_TIM_SetRemap\n 2473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM21_OR TI2_RMP LL_TIM_SetRemap\n 2474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM22_OR ETR_RMP LL_TIM_SetRemap\n 2475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM22_OR TI1_RMP LL_TIM_SetRemap\n 2476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM3_OR ETR_RMP LL_TIM_SetRemap\n 2477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM3_OR TI1_RMP LL_TIM_SetRemap\n 2478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM3_OR TI2_RMP LL_TIM_SetRemap\n 2479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM3_OR TI4_RMP LL_TIM_SetRemap 2480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param Remap Remap params depends on the TIMx. Description available only 2482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * in CHM version of the User Manual (not in .pdf). 2483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * Otherwise see Reference Manual description of OR registers. 2484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * Below description summarizes "Timer Instance" and "Remap" param combinations: 2486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM2: any combination of ETR_RMP, TI4_RMP where 2488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . ETR_RMP can be one of the following values 2490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ETR_RMP_GPIO 2491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ETR_RMP_HSI (*) 2492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ETR_RMP_HSI48 (*) 2493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ETR_RMP_LSE 2494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ETR_RMP_COMP2 2495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ETR_RMP_COMP1 2496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . TI4_RMP can be one of the following values 2498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_TI4_RMP_GPIO 2499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_TI4_RMP_COMP1 2500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_TI4_RMP_COMP2 ARM GAS /tmp/cc5G6dGG.s page 72 2501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM3: any combination of the following values (**) 2503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . ETR_RMP can be one of the following values (**) 2505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM3_ETR_RMP_GPIO 2506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM3_ETR_RMP_HSI48DIV6 2507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . TI_RMP_TI1 can be one of the following values (**) 2509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM3_TI_RMP_TI1_USB_SOF 2510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM3_TI_RMP_TI1_GPIO 2511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . TI_RMP_TI2 can be one of the following values (**) 2513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM3_TI_RMP_TI2_GPIO_DEF 2514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM3_TI_RMP_TI2_GPIOB5_AF4 2515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . TI_RMP_TI4 can be one of the following values (**) 2517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM3_TI_RMP_TI4_GPIO_DEF 2518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM3_TI_RMP_TI4_GPIOC9_AF2 2519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM21: any combination of ETR_RMP, TI1_RMP, TI2_RMP where 2521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . ETR_RMP can be one of the following values 2523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_ETR_RMP_GPIO 2524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_ETR_RMP_COMP2 2525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_ETR_RMP_COMP1 2526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_ETR_RMP_LSE 2527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . TI1_RMP can be one of the following values 2529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI1_RMP_GPIO 2530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI1_RMP_RTC_WK 2531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI1_RMP_HSE_RTC 2532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI1_RMP_MSI 2533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI1_RMP_LSE 2534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI1_RMP_LSI 2535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI1_RMP_COMP1 2536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI1_RMP_MCO 2537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . TI2_RMP can be one of the following values 2539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI2_RMP_GPIO 2540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM21_TI2_RMP_COMP2 2541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * TIM22: any combination of ETR_RMP, TI1_RMP where (**) 2543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . ETR_RMP can be one of the following values (**) 2545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM22_ETR_RMP_GPIO 2546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM22_ETR_RMP_COMP2 2547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM22_ETR_RMP_COMP1 2548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM22_ETR_RMP_LSE 2549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * . . TI1_RMP can be one of the following values (**) 2551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM22_TI1_RMP_GPIO1 2552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM22_TI1_RMP_COMP2 2553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM22_TI1_RMP_COMP1 2554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_TIM22_TI1_RMP_GPIO2 2555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * 2556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * (*) Value not defined in all devices. \n 2557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * (*) Register not available in all devices. ARM GAS /tmp/cc5G6dGG.s page 73 2558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap) 2561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->OR, (Remap >> TIMx_OR_RMP_SHIFT), (Remap & TIMx_OR_RMP_MASK)); 2563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 2567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_OCREF_Clear OCREF_Clear_Management 2570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 2571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Set the OCREF clear input source 2574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note The OCxREF signal of a given channel can be cleared when a high level is applied on the O 2575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. 2576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SMCR OCCS LL_TIM_SetOCRefClearInputSource 2577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param OCRefClearInputSource This parameter can be one of the following values: 2579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCREF_CLR_INT_NC 2580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @arg @ref LL_TIM_OCREF_CLR_INT_ETR 2581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSou 2584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, OCRefClearInputSource); 2586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 2589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management 2592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 2593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the update interrupt flag (UIF). 2596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE 2597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx) 2601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_UIF)); 2603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending). 2607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE 2608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(TIM_TypeDef *TIMx) 2612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)); 2614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } ARM GAS /tmp/cc5G6dGG.s page 74 2615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the Capture/Compare 1 interrupt flag (CC1F). 2618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1 2619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx) 2623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF)); 2625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 inte 2629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1 2630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(TIM_TypeDef *TIMx) 2634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)); 2636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the Capture/Compare 2 interrupt flag (CC2F). 2640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC2IF LL_TIM_ClearFlag_CC2 2641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx) 2645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF)); 2647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 inte 2651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2 2652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(TIM_TypeDef *TIMx) 2656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)); 2658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 interrupt flag (CC3F). 2662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3 2663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx) 2667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF)); 2669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** ARM GAS /tmp/cc5G6dGG.s page 75 2672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 inte 2673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC3IF LL_TIM_IsActiveFlag_CC3 2674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(TIM_TypeDef *TIMx) 2678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)); 2680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 interrupt flag (CC4F). 2684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4 2685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx) 2689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF)); 2691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 inte 2695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_IsActiveFlag_CC4 2696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(TIM_TypeDef *TIMx) 2700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)); 2702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the trigger interrupt flag (TIF). 2706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR TIF LL_TIM_ClearFlag_TRIG 2707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx) 2711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_TIF)); 2713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending). 2717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR TIF LL_TIM_IsActiveFlag_TRIG 2718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(TIM_TypeDef *TIMx) 2722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)); 2724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF). 2728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_ClearFlag_CC1OVR ARM GAS /tmp/cc5G6dGG.s page 76 2729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx) 2733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF)); 2735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/ 2739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR 2740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef *TIMx) 2744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)); 2746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF). 2750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC2OF LL_TIM_ClearFlag_CC2OVR 2751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx) 2755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF)); 2757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/ 2761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR 2762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef *TIMx) 2766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)); 2768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF). 2772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR 2773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx) 2777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); 2779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/ 2783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR 2784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). ARM GAS /tmp/cc5G6dGG.s page 77 2786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef *TIMx) 2788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)); 2790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF). 2794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR 2795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) 2799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); 2801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/ 2805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR 2806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef *TIMx) 2810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)); 2812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 2816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_IT_Management IT-Management 2819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 2820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable update interrupt (UIE). 2823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE 2824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) 2828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UIE); 2830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable update interrupt (UIE). 2834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER UIE LL_TIM_DisableIT_UPDATE 2835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx) 2839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); 2841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** ARM GAS /tmp/cc5G6dGG.s page 78 2843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the update interrupt (UIE) is enabled. 2845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER UIE LL_TIM_IsEnabledIT_UPDATE 2846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(TIM_TypeDef *TIMx) 2850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)); 2852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable capture/compare 1 interrupt (CC1IE). 2856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC1IE LL_TIM_EnableIT_CC1 2857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx) 2861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC1IE); 2863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable capture/compare 1 interrupt (CC1IE). 2867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC1IE LL_TIM_DisableIT_CC1 2868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx) 2872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE); 2874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled. 2878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC1IE LL_TIM_IsEnabledIT_CC1 2879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(TIM_TypeDef *TIMx) 2883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)); 2885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable capture/compare 2 interrupt (CC2IE). 2889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC2IE LL_TIM_EnableIT_CC2 2890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx) 2894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC2IE); 2896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable capture/compare 2 interrupt (CC2IE). ARM GAS /tmp/cc5G6dGG.s page 79 2900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC2IE LL_TIM_DisableIT_CC2 2901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx) 2905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE); 2907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled. 2911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC2IE LL_TIM_IsEnabledIT_CC2 2912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(TIM_TypeDef *TIMx) 2916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)); 2918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2919:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2920:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2921:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable capture/compare 3 interrupt (CC3IE). 2922:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC3IE LL_TIM_EnableIT_CC3 2923:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2924:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2925:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2926:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx) 2927:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2928:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC3IE); 2929:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2930:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2931:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2932:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable capture/compare 3 interrupt (CC3IE). 2933:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC3IE LL_TIM_DisableIT_CC3 2934:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2935:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2936:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2937:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx) 2938:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2939:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE); 2940:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2941:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2942:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2943:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled. 2944:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC3IE LL_TIM_IsEnabledIT_CC3 2945:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2946:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2947:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2948:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(TIM_TypeDef *TIMx) 2949:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2950:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)); 2951:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2952:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2953:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2954:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable capture/compare 4 interrupt (CC4IE). 2955:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC4IE LL_TIM_EnableIT_CC4 2956:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance ARM GAS /tmp/cc5G6dGG.s page 80 2957:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2958:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2959:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx) 2960:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2961:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC4IE); 2962:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2963:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2964:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2965:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable capture/compare 4 interrupt (CC4IE). 2966:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC4IE LL_TIM_DisableIT_CC4 2967:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2968:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2969:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2970:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx) 2971:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2972:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE); 2973:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2974:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2975:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2976:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled. 2977:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC4IE LL_TIM_IsEnabledIT_CC4 2978:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2979:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 2980:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2981:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(TIM_TypeDef *TIMx) 2982:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2983:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)); 2984:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2985:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2986:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2987:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable trigger interrupt (TIE). 2988:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER TIE LL_TIM_EnableIT_TRIG 2989:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 2990:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 2991:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 2992:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx) 2993:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 2994:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_TIE); 2995:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 2996:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 2997:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 2998:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable trigger interrupt (TIE). 2999:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER TIE LL_TIM_DisableIT_TRIG 3000:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3001:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3002:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3003:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx) 3004:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3005:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE); 3006:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3007:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3008:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3009:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the trigger interrupt (TIE) is enabled. 3010:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER TIE LL_TIM_IsEnabledIT_TRIG 3011:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3012:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 3013:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ ARM GAS /tmp/cc5G6dGG.s page 81 3014:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(TIM_TypeDef *TIMx) 3015:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3016:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)); 3017:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3018:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3019:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3020:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 3021:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3022:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3023:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_DMA_Management DMA-Management 3024:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 3025:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3026:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3027:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable update DMA request (UDE). 3028:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER UDE LL_TIM_EnableDMAReq_UPDATE 3029:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3030:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3031:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3032:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx) 3033:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3034:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UDE); 3035:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3036:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3037:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3038:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable update DMA request (UDE). 3039:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER UDE LL_TIM_DisableDMAReq_UPDATE 3040:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3041:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3042:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3043:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx) 3044:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3045:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE); 3046:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3047:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3048:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3049:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the update DMA request (UDE) is enabled. 3050:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE 3051:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3052:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 3053:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3054:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(TIM_TypeDef *TIMx) 3055:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3056:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)); 3057:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3058:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3059:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3060:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable capture/compare 1 DMA request (CC1DE). 3061:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC1DE LL_TIM_EnableDMAReq_CC1 3062:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3063:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3064:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3065:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx) 3066:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3067:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC1DE); 3068:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3069:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3070:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** ARM GAS /tmp/cc5G6dGG.s page 82 3071:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable capture/compare 1 DMA request (CC1DE). 3072:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC1DE LL_TIM_DisableDMAReq_CC1 3073:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3074:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3075:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3076:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx) 3077:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3078:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE); 3079:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3080:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3081:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3082:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled. 3083:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC1DE LL_TIM_IsEnabledDMAReq_CC1 3084:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3085:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 3086:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3087:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(TIM_TypeDef *TIMx) 3088:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3089:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)); 3090:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3091:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3092:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3093:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable capture/compare 2 DMA request (CC2DE). 3094:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC2DE LL_TIM_EnableDMAReq_CC2 3095:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3096:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3097:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3098:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx) 3099:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); 3101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable capture/compare 2 DMA request (CC2DE). 3105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC2DE LL_TIM_DisableDMAReq_CC2 3106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx) 3110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); 3112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled. 3116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC2DE LL_TIM_IsEnabledDMAReq_CC2 3117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 3119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(TIM_TypeDef *TIMx) 3121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)); 3123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable capture/compare 3 DMA request (CC3DE). 3127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC3DE LL_TIM_EnableDMAReq_CC3 ARM GAS /tmp/cc5G6dGG.s page 83 3128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx) 3132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC3DE); 3134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable capture/compare 3 DMA request (CC3DE). 3138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC3DE LL_TIM_DisableDMAReq_CC3 3139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx) 3143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE); 3145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled. 3149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC3DE LL_TIM_IsEnabledDMAReq_CC3 3150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 3152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(TIM_TypeDef *TIMx) 3154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)); 3156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable capture/compare 4 DMA request (CC4DE). 3160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC4DE LL_TIM_EnableDMAReq_CC4 3161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx) 3165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC4DE); 3167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable capture/compare 4 DMA request (CC4DE). 3171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC4DE LL_TIM_DisableDMAReq_CC4 3172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx) 3176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE); 3178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled. 3182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER CC4DE LL_TIM_IsEnabledDMAReq_CC4 3183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). ARM GAS /tmp/cc5G6dGG.s page 84 3185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(TIM_TypeDef *TIMx) 3187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)); 3189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Enable trigger interrupt (TDE). 3193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER TDE LL_TIM_EnableDMAReq_TRIG 3194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx) 3198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_TDE); 3200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Disable trigger interrupt (TDE). 3204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER TDE LL_TIM_DisableDMAReq_TRIG 3205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx) 3209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE); 3211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Indicates whether the trigger interrupt (TDE) is enabled. 3215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll DIER TDE LL_TIM_IsEnabledDMAReq_TRIG 3216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval State of bit (1 or 0). 3218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(TIM_TypeDef *TIMx) 3220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** return (READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)); 3222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 3223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @} 3226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** 3228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** @defgroup TIM_LL_EF_EVENT_Management EVENT-Management 3229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @{ 3230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** /** 3232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @brief Generate an update event. 3233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @rmtoll EGR UG LL_TIM_GenerateEvent_UPDATE 3234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @param TIMx Timer instance 3235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** * @retval None 3236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** */ 3237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx) 3238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** { 3239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** SET_BIT(TIMx->EGR, TIM_EGR_UG); 356 .loc 3 3239 0 357 0050 4369 ldr r3, [r0, #20] ARM GAS /tmp/cc5G6dGG.s page 85 358 0052 0122 movs r2, #1 359 0054 1343 orrs r3, r2 360 0056 4361 str r3, [r0, #20] 361 .LVL32: 362 .LBE95: 363 .LBE94: 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Generate an update event to reload the Prescaler 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** and the repetition counter value (if applicable) immediately */ 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_GenerateEvent_UPDATE(TIMx); 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return SUCCESS; 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 364 .loc 1 274 0 365 0058 0120 movs r0, #1 366 .LVL33: 367 @ sp needed 368 005a 7047 bx lr 369 .L24: 370 .align 2 371 .L23: 372 005c 00040040 .word 1073742848 373 0060 00080140 .word 1073809408 374 0064 00140140 .word 1073812480 375 0068 FFFCFFFF .word -769 376 .cfi_endproc 377 .LFE213: 379 .section .text.LL_TIM_OC_StructInit,"ax",%progbits 380 .align 1 381 .global LL_TIM_OC_StructInit 382 .syntax unified 383 .code 16 384 .thumb_func 385 .fpu softvfp 387 LL_TIM_OC_StructInit: 388 .LFB214: 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Set the fields of the TIMx output channel configuration data 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * structure to their default values. 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval None 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct) 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 389 .loc 1 283 0 390 .cfi_startproc 391 @ args = 0, pretend = 0, frame = 0 392 @ frame_needed = 0, uses_anonymous_args = 0 393 @ link register save eliminated. 394 .LVL34: 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the default configuration */ 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_OC_InitStruct->OCMode = LL_TIM_OCMODE_FROZEN; 395 .loc 1 285 0 396 0000 0023 movs r3, #0 397 0002 0360 str r3, [r0] 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_OC_InitStruct->OCState = LL_TIM_OCSTATE_DISABLE; 398 .loc 1 286 0 ARM GAS /tmp/cc5G6dGG.s page 86 399 0004 4360 str r3, [r0, #4] 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_OC_InitStruct->CompareValue = (uint32_t)0x00000000U; 400 .loc 1 287 0 401 0006 8360 str r3, [r0, #8] 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH; 402 .loc 1 288 0 403 0008 C360 str r3, [r0, #12] 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 404 .loc 1 289 0 405 @ sp needed 406 000a 7047 bx lr 407 .cfi_endproc 408 .LFE214: 410 .section .text.LL_TIM_OC_Init,"ax",%progbits 411 .align 1 412 .global LL_TIM_OC_Init 413 .syntax unified 414 .code 16 415 .thumb_func 416 .fpu softvfp 418 LL_TIM_OC_Init: 419 .LFB215: 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx output channel. 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param Channel This parameter can be one of the following values: 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH1 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH2 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH3 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH4 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channe 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx output channel is initialized 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: TIMx output channel is not initialized 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitS 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 420 .loc 1 305 0 421 .cfi_startproc 422 @ args = 0, pretend = 0, frame = 0 423 @ frame_needed = 0, uses_anonymous_args = 0 424 .LVL35: 425 0000 70B5 push {r4, r5, r6, lr} 426 .LCFI0: 427 .cfi_def_cfa_offset 16 428 .cfi_offset 4, -16 429 .cfi_offset 5, -12 430 .cfi_offset 6, -8 431 .cfi_offset 14, -4 432 .LVL36: 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ErrorStatus result = ERROR; 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** switch (Channel) 433 .loc 1 308 0 434 0002 1029 cmp r1, #16 435 0004 40D0 beq .L28 ARM GAS /tmp/cc5G6dGG.s page 87 436 0006 24D9 bls .L34 437 0008 8023 movs r3, #128 438 000a 5B00 lsls r3, r3, #1 439 000c 9942 cmp r1, r3 440 000e 57D0 beq .L31 441 0010 8023 movs r3, #128 442 0012 5B01 lsls r3, r3, #5 443 0014 9942 cmp r1, r3 444 0016 00D0 beq .LCB386 445 0018 6DE0 b .L33 @long jump 446 .LCB386: 447 .LVL37: 448 .LBB96: 449 .LBB97: 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH1: 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** result = OC1Config(TIMx, TIM_OC_InitStruct); 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH2: 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** result = OC2Config(TIMx, TIM_OC_InitStruct); 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH3: 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** result = OC3Config(TIMx, TIM_OC_InitStruct); 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH4: 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** result = OC4Config(TIMx, TIM_OC_InitStruct); 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** default: 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return result; 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Set the fields of the TIMx input channel configuration data 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * structure to their default values. 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel c 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval None 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the default configuration */ 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_ICInitStruct->ICPolarity = LL_TIM_IC_POLARITY_RISING; 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_ICInitStruct->ICPrescaler = LL_TIM_ICPSC_DIV1; 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_ICInitStruct->ICFilter = LL_TIM_IC_FILTER_FDIV1; 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx input channel. 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param Channel This parameter can be one of the following values: 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH1 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH2 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH3 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH4 ARM GAS /tmp/cc5G6dGG.s page 88 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx output channel is initialized 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: TIMx output channel is not initialized 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitS 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ErrorStatus result = ERROR; 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** switch (Channel) 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH1: 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** result = IC1Config(TIMx, TIM_IC_InitStruct); 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH2: 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** result = IC2Config(TIMx, TIM_IC_InitStruct); 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH3: 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** result = IC3Config(TIMx, TIM_IC_InitStruct); 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH4: 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** result = IC4Config(TIMx, TIM_IC_InitStruct); 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** default: 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return result; 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Fills each TIM_EncoderInitStruct field with its default value 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder i 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval None 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct) 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the default configuration */ 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->EncoderMode = LL_TIM_ENCODERMODE_X2_TI1; 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING; 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1; 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1; 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Polarity = LL_TIM_IC_POLARITY_RISING; 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Prescaler = LL_TIM_ICPSC_DIV1; 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Filter = LL_TIM_IC_FILTER_FDIV1; 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the encoder interface of the timer instance. 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx enco 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ ARM GAS /tmp/cc5G6dGG.s page 89 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruc 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccmr1 = 0U; 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccer = 0U; 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx)); 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ENCODERMODE(TIM_EncoderInitStruct->EncoderMode)); 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC1Polarity)); 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC1ActiveInput)); 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC1Prescaler)); 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC1Filter)); 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC2Polarity)); 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC2ActiveInput)); 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC2Prescaler)); 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC2Filter)); 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */ 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCMR1 register value */ 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCER register value */ 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Configure TI1 */ 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC); 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U); 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U); 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U); 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Configure TI2 */ 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F | TIM_CCMR1_IC2PSC); 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U); 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U); 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U); 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set TI1 and TI2 polarity and enable TI1 and TI2 */ 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP); 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity); 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U); 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set encoder mode */ 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_SetEncoderMode(TIMx, TIM_EncoderInitStruct->EncoderMode); 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCMR1 */ 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCER */ 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return SUCCESS; 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ARM GAS /tmp/cc5G6dGG.s page 90 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @} 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @} 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** @addtogroup TIM_LL_Private_Functions TIM Private Functions 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Private functions 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @{ 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx output channel 1. 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 1 configuration data structure 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct) 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccmr1 = 0U; 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccer = 0U; 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpcr2 = 0U; 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(TIMx)); 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E); 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCER register value */ 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CR2 register value */ 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCMR1 register value */ 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Reset Capture/Compare selection Bits */ 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S); 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Output Compare Mode */ 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode); 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Output Compare Polarity */ 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity); 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Output State */ 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState); 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CR2 */ ARM GAS /tmp/cc5G6dGG.s page 91 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR2, tmpcr2); 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCMR1 */ 526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Capture Compare Register value */ 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_OC_SetCompareCH1(TIMx, TIM_OCInitStruct->CompareValue); 530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCER */ 532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return SUCCESS; 535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx output channel 2. 539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 2 configuration data structure 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct) 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccmr1 = 0U; 548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccer = 0U; 549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpcr2 = 0U; 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(TIMx)); 553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); 555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); 556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ 558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E); 559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCER register value */ 561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CR2 register value */ 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCMR1 register value */ 567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); 568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Reset Capture/Compare selection Bits */ 570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S); 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Output Compare Mode */ 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U); 574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Output Compare Polarity */ 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC2P, TIM_OCInitStruct->OCPolarity << 4U); 577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Output State */ 579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC2E, TIM_OCInitStruct->OCState << 4U); ARM GAS /tmp/cc5G6dGG.s page 92 580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CR2 */ 582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR2, tmpcr2); 583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCMR1 */ 585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); 586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Capture Compare Register value */ 588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_OC_SetCompareCH2(TIMx, TIM_OCInitStruct->CompareValue); 589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCER */ 591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return SUCCESS; 594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx output channel 3. 598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 3 configuration data structure 600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct) 605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccmr2 = 0U; 607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccer = 0U; 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpcr2 = 0U; 609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(TIMx)); 612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); 613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); 615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Disable the Channel 3: Reset the CC3E Bit */ 617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E); 618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCER register value */ 620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CR2 register value */ 623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCMR2 register value */ 626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); 627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Reset Capture/Compare selection Bits */ 629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S); 630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Output Compare Mode */ 632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode); 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Output Compare Polarity */ 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC3P, TIM_OCInitStruct->OCPolarity << 8U); 636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ARM GAS /tmp/cc5G6dGG.s page 93 637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Output State */ 638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC3E, TIM_OCInitStruct->OCState << 8U); 639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CR2 */ 641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR2, tmpcr2); 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCMR2 */ 644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); 645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Capture Compare Register value */ 647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_OC_SetCompareCH3(TIMx, TIM_OCInitStruct->CompareValue); 648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCER */ 650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return SUCCESS; 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx output channel 4. 657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 4 configuration data structure 659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct) 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccmr2 = 0U; 666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccer = 0U; 667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpcr2 = 0U; 668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(TIMx)); 671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); 673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); 674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ 676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E); 450 .loc 1 676 0 451 001a 016A ldr r1, [r0, #32] 452 .LVL38: 453 001c 374E ldr r6, .L35 454 001e 3140 ands r1, r6 455 0020 0162 str r1, [r0, #32] 677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCER register value */ 679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 456 .loc 1 679 0 457 0022 036A ldr r3, [r0, #32] 458 .LVL39: 680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CR2 register value */ 682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 459 .loc 1 682 0 460 0024 4568 ldr r5, [r0, #4] ARM GAS /tmp/cc5G6dGG.s page 94 461 .LVL40: 683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Get the TIMx CCMR2 register value */ 685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); 462 .loc 1 685 0 463 0026 C169 ldr r1, [r0, #28] 464 .LVL41: 686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Reset Capture/Compare selection Bits */ 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S); 689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Output Compare Mode */ 691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U); 465 .loc 1 691 0 466 0028 354C ldr r4, .L35+4 467 002a 2140 ands r1, r4 468 .LVL42: 469 002c 1468 ldr r4, [r2] 470 002e 2402 lsls r4, r4, #8 471 0030 2143 orrs r1, r4 472 .LVL43: 692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Output Compare Polarity */ 694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC4P, TIM_OCInitStruct->OCPolarity << 12U); 473 .loc 1 694 0 474 0032 344C ldr r4, .L35+8 475 0034 2340 ands r3, r4 476 .LVL44: 477 0036 D468 ldr r4, [r2, #12] 478 0038 2403 lsls r4, r4, #12 479 003a 2343 orrs r3, r4 480 .LVL45: 695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Output State */ 697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC4E, TIM_OCInitStruct->OCState << 12U); 481 .loc 1 697 0 482 003c 3340 ands r3, r6 483 .LVL46: 484 003e 5468 ldr r4, [r2, #4] 485 0040 2403 lsls r4, r4, #12 486 0042 2343 orrs r3, r4 487 .LVL47: 698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CR2 */ 700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR2, tmpcr2); 488 .loc 1 700 0 489 0044 4560 str r5, [r0, #4] 701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCMR2 */ 703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); 490 .loc 1 703 0 491 0046 C161 str r1, [r0, #28] 704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the Capture Compare Register value */ 706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_OC_SetCompareCH4(TIMx, TIM_OCInitStruct->CompareValue); 492 .loc 1 706 0 493 0048 9268 ldr r2, [r2, #8] ARM GAS /tmp/cc5G6dGG.s page 95 494 .LVL48: 495 .LBB98: 496 .LBB99: 1726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 497 .loc 3 1726 0 498 004a 0264 str r2, [r0, #64] 499 .LVL49: 500 .LBE99: 501 .LBE98: 707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Write to TIMx CCER */ 709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 502 .loc 1 709 0 503 004c 0362 str r3, [r0, #32] 504 .LVL50: 505 .LBE97: 506 .LBE96: 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 507 .loc 1 320 0 508 004e 0120 movs r0, #1 509 .LVL51: 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** default: 510 .loc 1 321 0 511 0050 19E0 b .L27 512 .LVL52: 513 .L34: 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 514 .loc 1 308 0 515 0052 0129 cmp r1, #1 516 0054 4FD1 bne .L33 517 .LVL53: 518 .LBB100: 519 .LBB101: 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 520 .loc 1 499 0 521 0056 036A ldr r3, [r0, #32] 522 0058 0124 movs r4, #1 523 005a A343 bics r3, r4 524 005c 0362 str r3, [r0, #32] 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 525 .loc 1 502 0 526 005e 036A ldr r3, [r0, #32] 527 .LVL54: 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 528 .loc 1 505 0 529 0060 4568 ldr r5, [r0, #4] 530 .LVL55: 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 531 .loc 1 508 0 532 0062 8169 ldr r1, [r0, #24] 533 .LVL56: 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 534 .loc 1 514 0 535 0064 7326 movs r6, #115 536 0066 B143 bics r1, r6 537 .LVL57: 538 0068 1668 ldr r6, [r2] ARM GAS /tmp/cc5G6dGG.s page 96 539 006a 3143 orrs r1, r6 540 .LVL58: 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 541 .loc 1 517 0 542 006c 0226 movs r6, #2 543 006e B343 bics r3, r6 544 .LVL59: 545 0070 D668 ldr r6, [r2, #12] 546 0072 3343 orrs r3, r6 547 .LVL60: 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 548 .loc 1 520 0 549 0074 A343 bics r3, r4 550 .LVL61: 551 0076 5468 ldr r4, [r2, #4] 552 0078 2343 orrs r3, r4 553 .LVL62: 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 554 .loc 1 523 0 555 007a 4560 str r5, [r0, #4] 526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 556 .loc 1 526 0 557 007c 8161 str r1, [r0, #24] 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 558 .loc 1 529 0 559 007e 9268 ldr r2, [r2, #8] 560 .LVL63: 561 .LBB102: 562 .LBB103: 1684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 563 .loc 3 1684 0 564 0080 4263 str r2, [r0, #52] 565 .LVL64: 566 .LBE103: 567 .LBE102: 532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 568 .loc 1 532 0 569 0082 0362 str r3, [r0, #32] 570 .LVL65: 571 .LBE101: 572 .LBE100: 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 573 .loc 1 311 0 574 0084 0120 movs r0, #1 575 .LVL66: 576 .L27: 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 577 .loc 1 327 0 578 @ sp needed 579 0086 70BD pop {r4, r5, r6, pc} 580 .LVL67: 581 .L28: 582 .LBB104: 583 .LBB105: 558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 584 .loc 1 558 0 585 0088 036A ldr r3, [r0, #32] ARM GAS /tmp/cc5G6dGG.s page 97 586 008a 1026 movs r6, #16 587 008c B343 bics r3, r6 588 008e 0362 str r3, [r0, #32] 561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 589 .loc 1 561 0 590 0090 036A ldr r3, [r0, #32] 591 .LVL68: 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 592 .loc 1 564 0 593 0092 4568 ldr r5, [r0, #4] 594 .LVL69: 567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 595 .loc 1 567 0 596 0094 8169 ldr r1, [r0, #24] 597 .LVL70: 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 598 .loc 1 573 0 599 0096 1A4C ldr r4, .L35+4 600 0098 2140 ands r1, r4 601 .LVL71: 602 009a 1468 ldr r4, [r2] 603 009c 2402 lsls r4, r4, #8 604 009e 2143 orrs r1, r4 605 .LVL72: 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 606 .loc 1 576 0 607 00a0 2024 movs r4, #32 608 00a2 A343 bics r3, r4 609 .LVL73: 610 00a4 D468 ldr r4, [r2, #12] 611 00a6 2401 lsls r4, r4, #4 612 00a8 2343 orrs r3, r4 613 .LVL74: 579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 614 .loc 1 579 0 615 00aa B343 bics r3, r6 616 .LVL75: 617 00ac 5468 ldr r4, [r2, #4] 618 00ae 2401 lsls r4, r4, #4 619 00b0 2343 orrs r3, r4 620 .LVL76: 582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 621 .loc 1 582 0 622 00b2 4560 str r5, [r0, #4] 585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 623 .loc 1 585 0 624 00b4 8161 str r1, [r0, #24] 588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 625 .loc 1 588 0 626 00b6 9268 ldr r2, [r2, #8] 627 .LVL77: 628 .LBB106: 629 .LBB107: 1698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 630 .loc 3 1698 0 631 00b8 8263 str r2, [r0, #56] 632 .LVL78: ARM GAS /tmp/cc5G6dGG.s page 98 633 .LBE107: 634 .LBE106: 591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 635 .loc 1 591 0 636 00ba 0362 str r3, [r0, #32] 637 .LVL79: 638 .LBE105: 639 .LBE104: 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 640 .loc 1 314 0 641 00bc 0120 movs r0, #1 642 .LVL80: 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH3: 643 .loc 1 315 0 644 00be E2E7 b .L27 645 .LVL81: 646 .L31: 647 .LBB108: 648 .LBB109: 617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 649 .loc 1 617 0 650 00c0 016A ldr r1, [r0, #32] 651 .LVL82: 652 00c2 114E ldr r6, .L35+12 653 00c4 3140 ands r1, r6 654 00c6 0162 str r1, [r0, #32] 620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 655 .loc 1 620 0 656 00c8 036A ldr r3, [r0, #32] 657 .LVL83: 623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 658 .loc 1 623 0 659 00ca 4568 ldr r5, [r0, #4] 660 .LVL84: 626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 661 .loc 1 626 0 662 00cc C169 ldr r1, [r0, #28] 663 .LVL85: 632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 664 .loc 1 632 0 665 00ce 7324 movs r4, #115 666 00d0 A143 bics r1, r4 667 .LVL86: 668 00d2 1468 ldr r4, [r2] 669 00d4 2143 orrs r1, r4 670 .LVL87: 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 671 .loc 1 635 0 672 00d6 0D4C ldr r4, .L35+16 673 00d8 2340 ands r3, r4 674 .LVL88: 675 00da D468 ldr r4, [r2, #12] 676 00dc 2402 lsls r4, r4, #8 677 00de 2343 orrs r3, r4 678 .LVL89: 638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 679 .loc 1 638 0 ARM GAS /tmp/cc5G6dGG.s page 99 680 00e0 3340 ands r3, r6 681 .LVL90: 682 00e2 5468 ldr r4, [r2, #4] 683 00e4 2402 lsls r4, r4, #8 684 00e6 2343 orrs r3, r4 685 .LVL91: 641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 686 .loc 1 641 0 687 00e8 4560 str r5, [r0, #4] 644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 688 .loc 1 644 0 689 00ea C161 str r1, [r0, #28] 647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 690 .loc 1 647 0 691 00ec 9268 ldr r2, [r2, #8] 692 .LVL92: 693 .LBB110: 694 .LBB111: 1712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 695 .loc 3 1712 0 696 00ee C263 str r2, [r0, #60] 697 .LVL93: 698 .LBE111: 699 .LBE110: 650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 700 .loc 1 650 0 701 00f0 0362 str r3, [r0, #32] 702 .LVL94: 703 .LBE109: 704 .LBE108: 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 705 .loc 1 317 0 706 00f2 0120 movs r0, #1 707 .LVL95: 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH4: 708 .loc 1 318 0 709 00f4 C7E7 b .L27 710 .LVL96: 711 .L33: 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 712 .loc 1 306 0 713 00f6 0020 movs r0, #0 714 .LVL97: 715 00f8 C5E7 b .L27 716 .L36: 717 00fa C046 .align 2 718 .L35: 719 00fc FFEFFFFF .word -4097 720 0100 FF8CFFFF .word -29441 721 0104 FFDFFFFF .word -8193 722 0108 FFFEFFFF .word -257 723 010c FFFDFFFF .word -513 724 .cfi_endproc 725 .LFE215: 727 .section .text.LL_TIM_IC_StructInit,"ax",%progbits 728 .align 1 729 .global LL_TIM_IC_StructInit ARM GAS /tmp/cc5G6dGG.s page 100 730 .syntax unified 731 .code 16 732 .thumb_func 733 .fpu softvfp 735 LL_TIM_IC_StructInit: 736 .LFB216: 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the default configuration */ 737 .loc 1 336 0 738 .cfi_startproc 739 @ args = 0, pretend = 0, frame = 0 740 @ frame_needed = 0, uses_anonymous_args = 0 741 @ link register save eliminated. 742 .LVL98: 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 743 .loc 1 338 0 744 0000 0023 movs r3, #0 745 0002 0360 str r3, [r0] 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_ICInitStruct->ICPrescaler = LL_TIM_ICPSC_DIV1; 746 .loc 1 339 0 747 0004 8022 movs r2, #128 748 0006 5202 lsls r2, r2, #9 749 0008 4260 str r2, [r0, #4] 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_ICInitStruct->ICFilter = LL_TIM_IC_FILTER_FDIV1; 750 .loc 1 340 0 751 000a 8360 str r3, [r0, #8] 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 752 .loc 1 341 0 753 000c C360 str r3, [r0, #12] 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 754 .loc 1 342 0 755 @ sp needed 756 000e 7047 bx lr 757 .cfi_endproc 758 .LFE216: 760 .section .text.LL_TIM_IC_Init,"ax",%progbits 761 .align 1 762 .global LL_TIM_IC_Init 763 .syntax unified 764 .code 16 765 .thumb_func 766 .fpu softvfp 768 LL_TIM_IC_Init: 769 .LFB217: 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ErrorStatus result = ERROR; 770 .loc 1 358 0 771 .cfi_startproc 772 @ args = 0, pretend = 0, frame = 0 773 @ frame_needed = 0, uses_anonymous_args = 0 774 .LVL99: 775 0000 30B5 push {r4, r5, lr} 776 .LCFI1: 777 .cfi_def_cfa_offset 12 778 .cfi_offset 4, -12 779 .cfi_offset 5, -8 780 .cfi_offset 14, -4 781 .LVL100: 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { ARM GAS /tmp/cc5G6dGG.s page 101 782 .loc 1 361 0 783 0002 1029 cmp r1, #16 784 0004 3DD0 beq .L40 785 0006 22D9 bls .L46 786 0008 8023 movs r3, #128 787 000a 5B00 lsls r3, r3, #1 788 000c 9942 cmp r1, r3 789 000e 51D0 beq .L43 790 0010 8023 movs r3, #128 791 0012 5B01 lsls r3, r3, #5 792 0014 9942 cmp r1, r3 793 0016 69D1 bne .L45 794 .LVL101: 795 .LBB112: 796 .LBB113: 710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return SUCCESS; 712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx input channel 1. 717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to the the TIMx input channel 1 configuration data structure 719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus IC1Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(TIMx)); 727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity)); 728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput)); 729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler)); 730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter)); 731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ 733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E; 734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */ 736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR1, 737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC), 738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPr 739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Polarity and set the CC1E Bit */ 741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(TIMx->CCER, 742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCER_CC1P | TIM_CCER_CC1NP), 743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E)); 744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return SUCCESS; 746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx input channel 2. 750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to the the TIMx input channel 2 configuration data structure ARM GAS /tmp/cc5G6dGG.s page 102 752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus IC2Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(TIMx)); 760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity)); 761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput)); 762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler)); 763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter)); 764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ 766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~TIM_CCER_CC2E; 767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */ 769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR1, 770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCMR1_CC2S | TIM_CCMR1_IC2F | TIM_CCMR1_IC2PSC), 771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPr 772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Polarity and set the CC2E Bit */ 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(TIMx->CCER, 775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCER_CC2P | TIM_CCER_CC2NP), 776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ((TIM_ICInitStruct->ICPolarity << 4U) | TIM_CCER_CC2E)); 777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return SUCCESS; 779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx input channel 3. 783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to the the TIMx input channel 3 configuration data structure 785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus IC3Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(TIMx)); 793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity)); 794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput)); 795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler)); 796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter)); 797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Disable the Channel 3: Reset the CC3E Bit */ 799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~TIM_CCER_CC3E; 800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */ 802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR2, 803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCMR2_CC3S | TIM_CCMR2_IC3F | TIM_CCMR2_IC3PSC), 804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPr 805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Polarity and set the CC3E Bit */ 807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(TIMx->CCER, 808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCER_CC3P | TIM_CCER_CC3NP), ARM GAS /tmp/cc5G6dGG.s page 103 809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** ((TIM_ICInitStruct->ICPolarity << 8U) | TIM_CCER_CC3E)); 810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** return SUCCESS; 812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /** 815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @brief Configure the TIMx input channel 4. 816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIMx Timer Instance 817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to the the TIMx input channel 4 configuration data structure 818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** * - ERROR: not applicable 821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** */ 822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Check the parameters */ 825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(TIMx)); 826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity)); 827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput)); 828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler)); 829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter)); 830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ 832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~TIM_CCER_CC4E; 797 .loc 1 832 0 798 0018 036A ldr r3, [r0, #32] 799 001a 3549 ldr r1, .L47 800 .LVL102: 801 001c 0B40 ands r3, r1 802 001e 0362 str r3, [r0, #32] 833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */ 835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR2, 803 .loc 1 835 0 804 0020 C369 ldr r3, [r0, #28] 805 0022 3449 ldr r1, .L47+4 806 0024 1940 ands r1, r3 807 0026 5368 ldr r3, [r2, #4] 808 0028 D468 ldr r4, [r2, #12] 809 002a 2343 orrs r3, r4 810 002c 9468 ldr r4, [r2, #8] 811 002e 2343 orrs r3, r4 812 0030 1B0A lsrs r3, r3, #8 813 0032 0B43 orrs r3, r1 814 0034 C361 str r3, [r0, #28] 836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCMR2_CC4S | TIM_CCMR2_IC4F | TIM_CCMR2_IC4PSC), 837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPr 838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Select the Polarity and set the CC2E Bit */ 840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** MODIFY_REG(TIMx->CCER, 815 .loc 1 840 0 816 0036 036A ldr r3, [r0, #32] 817 0038 2F49 ldr r1, .L47+8 818 003a 0B40 ands r3, r1 819 003c 1268 ldr r2, [r2] 820 .LVL103: 821 003e 1203 lsls r2, r2, #12 ARM GAS /tmp/cc5G6dGG.s page 104 822 0040 1343 orrs r3, r2 823 0042 8022 movs r2, #128 824 0044 5201 lsls r2, r2, #5 825 0046 1343 orrs r3, r2 826 0048 0362 str r3, [r0, #32] 827 .LVL104: 828 .LBE113: 829 .LBE112: 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 830 .loc 1 373 0 831 004a 0120 movs r0, #1 832 .LVL105: 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** default: 833 .loc 1 374 0 834 004c 18E0 b .L39 835 .LVL106: 836 .L46: 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** { 837 .loc 1 361 0 838 004e 0129 cmp r1, #1 839 0050 4CD1 bne .L45 840 .LVL107: 841 .LBB114: 842 .LBB115: 733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 843 .loc 1 733 0 844 0052 016A ldr r1, [r0, #32] 845 .LVL108: 846 0054 0125 movs r5, #1 847 0056 A943 bics r1, r5 848 0058 0162 str r1, [r0, #32] 736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC), 849 .loc 1 736 0 850 005a 8469 ldr r4, [r0, #24] 851 005c FF23 movs r3, #255 852 005e 9C43 bics r4, r3 853 0060 5168 ldr r1, [r2, #4] 854 0062 D368 ldr r3, [r2, #12] 855 0064 1943 orrs r1, r3 856 0066 9368 ldr r3, [r2, #8] 857 0068 1943 orrs r1, r3 858 006a 090C lsrs r1, r1, #16 859 006c 2143 orrs r1, r4 860 006e 8161 str r1, [r0, #24] 741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCER_CC1P | TIM_CCER_CC1NP), 861 .loc 1 741 0 862 0070 036A ldr r3, [r0, #32] 863 0072 0A21 movs r1, #10 864 0074 8B43 bics r3, r1 865 0076 1268 ldr r2, [r2] 866 .LVL109: 867 0078 1343 orrs r3, r2 868 007a 2B43 orrs r3, r5 869 007c 0362 str r3, [r0, #32] 870 .LVL110: 871 .LBE115: 872 .LBE114: ARM GAS /tmp/cc5G6dGG.s page 105 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 873 .loc 1 364 0 874 007e 0120 movs r0, #1 875 .LVL111: 876 .L39: 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 877 .loc 1 380 0 878 @ sp needed 879 0080 30BD pop {r4, r5, pc} 880 .LVL112: 881 .L40: 882 .LBB116: 883 .LBB117: 766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 884 .loc 1 766 0 885 0082 036A ldr r3, [r0, #32] 886 0084 1025 movs r5, #16 887 0086 AB43 bics r3, r5 888 0088 0362 str r3, [r0, #32] 769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCMR1_CC2S | TIM_CCMR1_IC2F | TIM_CCMR1_IC2PSC), 889 .loc 1 769 0 890 008a 8169 ldr r1, [r0, #24] 891 .LVL113: 892 008c 194C ldr r4, .L47+4 893 008e 0C40 ands r4, r1 894 0090 5168 ldr r1, [r2, #4] 895 0092 D368 ldr r3, [r2, #12] 896 0094 1943 orrs r1, r3 897 0096 9368 ldr r3, [r2, #8] 898 0098 1943 orrs r1, r3 899 009a 090A lsrs r1, r1, #8 900 009c 2143 orrs r1, r4 901 009e 8161 str r1, [r0, #24] 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCER_CC2P | TIM_CCER_CC2NP), 902 .loc 1 774 0 903 00a0 036A ldr r3, [r0, #32] 904 00a2 A021 movs r1, #160 905 00a4 8B43 bics r3, r1 906 00a6 1268 ldr r2, [r2] 907 .LVL114: 908 00a8 1201 lsls r2, r2, #4 909 00aa 1343 orrs r3, r2 910 00ac 2B43 orrs r3, r5 911 00ae 0362 str r3, [r0, #32] 912 .LVL115: 913 .LBE117: 914 .LBE116: 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 915 .loc 1 367 0 916 00b0 0120 movs r0, #1 917 .LVL116: 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH3: 918 .loc 1 368 0 919 00b2 E5E7 b .L39 920 .LVL117: 921 .L43: 922 .LBB118: ARM GAS /tmp/cc5G6dGG.s page 106 923 .LBB119: 799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 924 .loc 1 799 0 925 00b4 036A ldr r3, [r0, #32] 926 00b6 1149 ldr r1, .L47+12 927 .LVL118: 928 00b8 0B40 ands r3, r1 929 00ba 0362 str r3, [r0, #32] 802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCMR2_CC3S | TIM_CCMR2_IC3F | TIM_CCMR2_IC3PSC), 930 .loc 1 802 0 931 00bc C369 ldr r3, [r0, #28] 932 00be FF21 movs r1, #255 933 00c0 8B43 bics r3, r1 934 00c2 1900 movs r1, r3 935 00c4 5368 ldr r3, [r2, #4] 936 00c6 D468 ldr r4, [r2, #12] 937 00c8 2343 orrs r3, r4 938 00ca 9468 ldr r4, [r2, #8] 939 00cc 2343 orrs r3, r4 940 00ce 1B0C lsrs r3, r3, #16 941 00d0 0B43 orrs r3, r1 942 00d2 C361 str r3, [r0, #28] 807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** (TIM_CCER_CC3P | TIM_CCER_CC3NP), 943 .loc 1 807 0 944 00d4 036A ldr r3, [r0, #32] 945 00d6 0A49 ldr r1, .L47+16 946 00d8 0B40 ands r3, r1 947 00da 1268 ldr r2, [r2] 948 .LVL119: 949 00dc 1202 lsls r2, r2, #8 950 00de 1343 orrs r3, r2 951 00e0 8022 movs r2, #128 952 00e2 5200 lsls r2, r2, #1 953 00e4 1343 orrs r3, r2 954 00e6 0362 str r3, [r0, #32] 955 .LVL120: 956 .LBE119: 957 .LBE118: 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** break; 958 .loc 1 370 0 959 00e8 0120 movs r0, #1 960 .LVL121: 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** case LL_TIM_CHANNEL_CH4: 961 .loc 1 371 0 962 00ea C9E7 b .L39 963 .LVL122: 964 .L45: 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 965 .loc 1 359 0 966 00ec 0020 movs r0, #0 967 .LVL123: 968 00ee C7E7 b .L39 969 .L48: 970 .align 2 971 .L47: 972 00f0 FFEFFFFF .word -4097 973 00f4 FF00FFFF .word -65281 ARM GAS /tmp/cc5G6dGG.s page 107 974 00f8 FF5FFFFF .word -40961 975 00fc FFFEFFFF .word -257 976 0100 FFF5FFFF .word -2561 977 .cfi_endproc 978 .LFE217: 980 .section .text.LL_TIM_ENCODER_StructInit,"ax",%progbits 981 .align 1 982 .global LL_TIM_ENCODER_StructInit 983 .syntax unified 984 .code 16 985 .thumb_func 986 .fpu softvfp 988 LL_TIM_ENCODER_StructInit: 989 .LFB218: 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** /* Set the default configuration */ 990 .loc 1 388 0 991 .cfi_startproc 992 @ args = 0, pretend = 0, frame = 0 993 @ frame_needed = 0, uses_anonymous_args = 0 994 @ link register save eliminated. 995 .LVL124: 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING; 996 .loc 1 390 0 997 0000 0123 movs r3, #1 998 0002 0360 str r3, [r0] 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 999 .loc 1 391 0 1000 0004 0023 movs r3, #0 1001 0006 4360 str r3, [r0, #4] 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1; 1002 .loc 1 392 0 1003 0008 8022 movs r2, #128 1004 000a 5202 lsls r2, r2, #9 1005 000c 8260 str r2, [r0, #8] 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1; 1006 .loc 1 393 0 1007 000e C360 str r3, [r0, #12] 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Polarity = LL_TIM_IC_POLARITY_RISING; 1008 .loc 1 394 0 1009 0010 0361 str r3, [r0, #16] 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 1010 .loc 1 395 0 1011 0012 4361 str r3, [r0, #20] 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Prescaler = LL_TIM_ICPSC_DIV1; 1012 .loc 1 396 0 1013 0014 8261 str r2, [r0, #24] 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Filter = LL_TIM_IC_FILTER_FDIV1; 1014 .loc 1 397 0 1015 0016 C361 str r3, [r0, #28] 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** } 1016 .loc 1 398 0 1017 0018 0362 str r3, [r0, #32] 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1018 .loc 1 399 0 1019 @ sp needed 1020 001a 7047 bx lr 1021 .cfi_endproc ARM GAS /tmp/cc5G6dGG.s page 108 1022 .LFE218: 1024 .section .text.LL_TIM_ENCODER_Init,"ax",%progbits 1025 .align 1 1026 .global LL_TIM_ENCODER_Init 1027 .syntax unified 1028 .code 16 1029 .thumb_func 1030 .fpu softvfp 1032 LL_TIM_ENCODER_Init: 1033 .LFB219: 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** uint32_t tmpccmr1 = 0U; 1034 .loc 1 410 0 1035 .cfi_startproc 1036 @ args = 0, pretend = 0, frame = 0 1037 @ frame_needed = 0, uses_anonymous_args = 0 1038 .LVL125: 1039 0000 30B5 push {r4, r5, lr} 1040 .LCFI2: 1041 .cfi_def_cfa_offset 12 1042 .cfi_offset 4, -12 1043 .cfi_offset 5, -8 1044 .cfi_offset 14, -4 1045 .LVL126: 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1046 .loc 1 427 0 1047 0002 036A ldr r3, [r0, #32] 1048 0004 1125 movs r5, #17 1049 0006 AB43 bics r3, r5 1050 0008 0362 str r3, [r0, #32] 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1051 .loc 1 430 0 1052 000a 8269 ldr r2, [r0, #24] 1053 .LVL127: 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1054 .loc 1 433 0 1055 000c 036A ldr r3, [r0, #32] 1056 .LVL128: 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U); 1057 .loc 1 436 0 1058 000e FF24 movs r4, #255 1059 0010 A243 bics r2, r4 1060 .LVL129: 1061 0012 1400 movs r4, r2 1062 .LVL130: 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U); 1063 .loc 1 437 0 1064 0014 4A89 ldrh r2, [r1, #10] 1065 .LVL131: 1066 0016 2243 orrs r2, r4 1067 .LVL132: 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U); 1068 .loc 1 438 0 1069 0018 4C8A ldrh r4, [r1, #18] 1070 001a 2243 orrs r2, r4 1071 .LVL133: 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1072 .loc 1 439 0 ARM GAS /tmp/cc5G6dGG.s page 109 1073 001c CC89 ldrh r4, [r1, #14] 1074 001e 1443 orrs r4, r2 1075 .LVL134: 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U); 1076 .loc 1 442 0 1077 0020 0E4A ldr r2, .L51 1078 0022 1440 ands r4, r2 1079 .LVL135: 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U); 1080 .loc 1 443 0 1081 0024 8A69 ldr r2, [r1, #24] 1082 0026 120A lsrs r2, r2, #8 1083 0028 1443 orrs r4, r2 1084 .LVL136: 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U); 1085 .loc 1 444 0 1086 002a 0A6A ldr r2, [r1, #32] 1087 002c 120A lsrs r2, r2, #8 1088 002e 2243 orrs r2, r4 1089 .LVL137: 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1090 .loc 1 445 0 1091 0030 CC69 ldr r4, [r1, #28] 1092 0032 240A lsrs r4, r4, #8 1093 0034 2243 orrs r2, r4 1094 .LVL138: 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity); 1095 .loc 1 448 0 1096 0036 AA24 movs r4, #170 1097 0038 A343 bics r3, r4 1098 .LVL139: 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U); 1099 .loc 1 449 0 1100 003a 4C68 ldr r4, [r1, #4] 1101 003c 1C43 orrs r4, r3 1102 .LVL140: 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 1103 .loc 1 450 0 1104 003e 4B69 ldr r3, [r1, #20] 1105 0040 1B01 lsls r3, r3, #4 1106 0042 2343 orrs r3, r4 1107 .LVL141: 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1108 .loc 1 451 0 1109 0044 2B43 orrs r3, r5 1110 .LVL142: 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1111 .loc 1 454 0 1112 0046 0968 ldr r1, [r1] 1113 .LVL143: 1114 .LBB120: 1115 .LBB121: 2241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_tim.h **** } 1116 .loc 3 2241 0 1117 0048 8468 ldr r4, [r0, #8] 1118 004a 0A3D subs r5, r5, #10 1119 004c AC43 bics r4, r5 ARM GAS /tmp/cc5G6dGG.s page 110 1120 004e 2143 orrs r1, r4 1121 .LVL144: 1122 0050 8160 str r1, [r0, #8] 1123 .LVL145: 1124 .LBE121: 1125 .LBE120: 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1126 .loc 1 457 0 1127 0052 8261 str r2, [r0, #24] 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1128 .loc 1 460 0 1129 0054 0362 str r3, [r0, #32] 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_tim.c **** 1130 .loc 1 463 0 1131 0056 0120 movs r0, #1 1132 .LVL146: 1133 @ sp needed 1134 0058 30BD pop {r4, r5, pc} 1135 .L52: 1136 005a C046 .align 2 1137 .L51: 1138 005c FF00FFFF .word -65281 1139 .cfi_endproc 1140 .LFE219: 1142 .text 1143 .Letext0: 1144 .file 4 "/usr/arm-none-eabi/include/machine/_default_types.h" 1145 .file 5 "/usr/arm-none-eabi/include/sys/_stdint.h" 1146 .file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" 1147 .file 7 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" 1148 .file 8 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" 1149 .file 9 "/usr/arm-none-eabi/include/sys/lock.h" 1150 .file 10 "/usr/arm-none-eabi/include/sys/_types.h" 1151 .file 11 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" 1152 .file 12 "/usr/arm-none-eabi/include/sys/reent.h" ARM GAS /tmp/cc5G6dGG.s page 111 DEFINED SYMBOLS *ABS*:0000000000000000 stm32l0xx_ll_tim.c /tmp/cc5G6dGG.s:16 .text.LL_TIM_DeInit:0000000000000000 $t /tmp/cc5G6dGG.s:23 .text.LL_TIM_DeInit:0000000000000000 LL_TIM_DeInit /tmp/cc5G6dGG.s:218 .text.LL_TIM_DeInit:00000000000000a4 $d /tmp/cc5G6dGG.s:228 .text.LL_TIM_StructInit:0000000000000000 $t /tmp/cc5G6dGG.s:235 .text.LL_TIM_StructInit:0000000000000000 LL_TIM_StructInit /tmp/cc5G6dGG.s:261 .text.LL_TIM_Init:0000000000000000 $t /tmp/cc5G6dGG.s:268 .text.LL_TIM_Init:0000000000000000 LL_TIM_Init /tmp/cc5G6dGG.s:372 .text.LL_TIM_Init:000000000000005c $d /tmp/cc5G6dGG.s:380 .text.LL_TIM_OC_StructInit:0000000000000000 $t /tmp/cc5G6dGG.s:387 .text.LL_TIM_OC_StructInit:0000000000000000 LL_TIM_OC_StructInit /tmp/cc5G6dGG.s:411 .text.LL_TIM_OC_Init:0000000000000000 $t /tmp/cc5G6dGG.s:418 .text.LL_TIM_OC_Init:0000000000000000 LL_TIM_OC_Init /tmp/cc5G6dGG.s:719 .text.LL_TIM_OC_Init:00000000000000fc $d /tmp/cc5G6dGG.s:728 .text.LL_TIM_IC_StructInit:0000000000000000 $t /tmp/cc5G6dGG.s:735 .text.LL_TIM_IC_StructInit:0000000000000000 LL_TIM_IC_StructInit /tmp/cc5G6dGG.s:761 .text.LL_TIM_IC_Init:0000000000000000 $t /tmp/cc5G6dGG.s:768 .text.LL_TIM_IC_Init:0000000000000000 LL_TIM_IC_Init /tmp/cc5G6dGG.s:972 .text.LL_TIM_IC_Init:00000000000000f0 $d /tmp/cc5G6dGG.s:981 .text.LL_TIM_ENCODER_StructInit:0000000000000000 $t /tmp/cc5G6dGG.s:988 .text.LL_TIM_ENCODER_StructInit:0000000000000000 LL_TIM_ENCODER_StructInit /tmp/cc5G6dGG.s:1025 .text.LL_TIM_ENCODER_Init:0000000000000000 $t /tmp/cc5G6dGG.s:1032 .text.LL_TIM_ENCODER_Init:0000000000000000 LL_TIM_ENCODER_Init /tmp/cc5G6dGG.s:1138 .text.LL_TIM_ENCODER_Init:000000000000005c $d .debug_frame:0000000000000010 $d NO UNDEFINED SYMBOLS