ARM GAS  /tmp/ccBKcv9L.s 			page 1


   1              		.cpu cortex-m0plus
   2              		.eabi_attribute 20, 1
   3              		.eabi_attribute 21, 1
   4              		.eabi_attribute 23, 3
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 1
   9              		.eabi_attribute 34, 0
  10              		.eabi_attribute 18, 4
  11              		.file	"stm32l0xx_ll_adc.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.LL_ADC_CommonDeInit,"ax",%progbits
  16              		.align	1
  17              		.global	LL_ADC_CommonDeInit
  18              		.syntax unified
  19              		.code	16
  20              		.thumb_func
  21              		.fpu softvfp
  23              	LL_ADC_CommonDeInit:
  24              	.LFB170:
  25              		.file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c"
   1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
   2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ******************************************************************************
   3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @file    stm32l0xx_ll_adc.c
   4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @author  MCD Application Team
   5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @brief   ADC LL module driver
   6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ******************************************************************************
   7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @attention
   8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *
   9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *
  11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * Redistribution and use in source and binary forms, with or without modification,
  12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * are permitted provided that the following conditions are met:
  13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *   1. Redistributions of source code must retain the above copyright notice,
  14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *      this list of conditions and the following disclaimer.
  15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
  16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *      this list of conditions and the following disclaimer in the documentation
  17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *      and/or other materials provided with the distribution.
  18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *      may be used to endorse or promote products derived from this software
  20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *      without specific prior written permission.
  21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *
  22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *
  33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ******************************************************************************
ARM GAS  /tmp/ccBKcv9L.s 			page 2


  34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
  35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #if defined(USE_FULL_LL_DRIVER)
  36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Includes ------------------------------------------------------------------*/
  38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #include "stm32l0xx_ll_adc.h"
  39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #include "stm32l0xx_ll_bus.h"
  40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #ifdef  USE_FULL_ASSERT
  42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   #include "stm32_assert.h"
  43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #else
  44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   #define assert_param(expr) ((void)0U)
  45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #endif
  46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /** @addtogroup STM32L0xx_LL_Driver
  48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @{
  49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
  50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #if defined (ADC1)
  52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /** @addtogroup ADC_LL ADC
  54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @{
  55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
  56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Private types -------------------------------------------------------------*/
  58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Private variables ---------------------------------------------------------*/
  59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Private constants ---------------------------------------------------------*/
  60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /** @addtogroup ADC_LL_Private_Constants
  61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @{
  62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
  63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Definitions of ADC hardware constraints delays */
  65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Note: Only ADC IP HW delays are defined in ADC LL driver driver,           */
  66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       not timeout values:                                                  */
  67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       Timeout values for ADC operations are dependent to device clock      */
  68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       configuration (system clock versus ADC clock),                       */
  69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       and therefore must be defined in user application.                   */
  70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       Refer to @ref ADC_LL_EC_HW_DELAYS for description of ADC timeout     */
  71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       values definition.                                                   */
  72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Note: ADC timeout values are defined here in CPU cycles to be independent  */
  73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       of device clock setting.                                             */
  74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       In user application, ADC timeout values should be defined with       */
  75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       temporal values, in function of device clock settings.               */
  76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*       Highest ratio CPU clock frequency vs ADC clock frequency:            */
  77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*        - ADC clock from synchronous clock with AHB prescaler 512,          */
  78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*          APB prescaler 16, ADC prescaler 4.                                */
  79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*        - ADC clock from asynchronous clock (HSI) with prescaler 1,         */
  80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*          with highest ratio CPU clock frequency vs HSI clock frequency:    */
  81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /*          CPU clock frequency max 32MHz, HSI frequency 16MHz: ratio 2.      */
  82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Unit: CPU cycles.                                                          */
  83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define ADC_CLOCK_RATIO_VS_CPU_HIGHEST          ((uint32_t) 512U * 16U * 4U)
  84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define ADC_TIMEOUT_DISABLE_CPU_CYCLES          (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1U)
  85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES  (ADC_CLOCK_RATIO_VS_CPU_HIGHEST * 1U)
  86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
  88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @}
  89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
  90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
ARM GAS  /tmp/ccBKcv9L.s 			page 3


  91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Private macros ------------------------------------------------------------*/
  92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /** @addtogroup ADC_LL_Private_Macros
  94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @{
  95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
  96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
  97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Check of parameters for configuration of ADC hierarchical scope:           */
  98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* common to several ADC instances.                                           */
  99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_COMMON_CLOCK(__CLOCK__)                                      \
 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV1)                                 \
 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV2)                                 \
 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV4)                                 \
 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV6)                                 \
 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV8)                                 \
 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV10)                                \
 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV12)                                \
 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV16)                                \
 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV32)                                \
 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV64)                                \
 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV128)                               \
 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC_DIV256)                               \
 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_CLOCK_FREQ_MODE(__CLOCK_FREQ_MODE__)                         \
 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__CLOCK_FREQ_MODE__) == LL_ADC_CLOCK_FREQ_MODE_HIGH)                   \
 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK_FREQ_MODE__) == LL_ADC_CLOCK_FREQ_MODE_LOW)                    \
 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Check of parameters for configuration of ADC hierarchical scope:           */
 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* ADC instance.                                                              */
 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_CLOCK(__CLOCK__)                                             \
 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV4)                             \
 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV2)                             \
 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV1)                             \
 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__CLOCK__) == LL_ADC_CLOCK_ASYNC)                                      \
 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_RESOLUTION(__RESOLUTION__)                                   \
 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__RESOLUTION__) == LL_ADC_RESOLUTION_12B)                              \
 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__RESOLUTION__) == LL_ADC_RESOLUTION_10B)                              \
 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__RESOLUTION__) == LL_ADC_RESOLUTION_8B)                               \
 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__RESOLUTION__) == LL_ADC_RESOLUTION_6B)                               \
 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_DATA_ALIGN(__DATA_ALIGN__)                                   \
 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_RIGHT)                            \
 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_LEFT)                             \
 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_LOW_POWER(__LOW_POWER__)                                     \
 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__LOW_POWER__) == LL_ADC_LP_MODE_NONE)                                 \
 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT)                                  \
 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__LOW_POWER__) == LL_ADC_LP_AUTOPOWEROFF)                              \
 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__LOW_POWER__) == LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF)                     \
 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Check of parameters for configuration of ADC hierarchical scope:           */
ARM GAS  /tmp/ccBKcv9L.s 			page 4


 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* ADC group regular                                                          */
 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__)                         \
 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE)                      \
 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM6_TRGO)                 \
 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM21_CH2)                 \
 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_TRGO)                 \
 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH4)                  \
 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM22_TRGO)                \
 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH3)                  \
 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO)                 \
 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11)               \
 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_REG_CONTINUOUS_MODE(__REG_CONTINUOUS_MODE__)                 \
 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_SINGLE)                    \
 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_CONTINUOUS)                \
 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_REG_DMA_TRANSFER(__REG_DMA_TRANSFER__)                       \
 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_NONE)                 \
 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_LIMITED)              \
 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_UNLIMITED)            \
 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(__REG_OVR_DATA_BEHAVIOR__)             \
 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_PRESERVED)           \
 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_OVR_DATA_BEHAVIOR__) == LL_ADC_REG_OVR_DATA_OVERWRITTEN)         \
 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #define IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(__REG_SEQ_DISCONT_MODE__)          \
 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   (   ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_DISABLE)           \
 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****    || ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_1RANK)             \
 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   )
 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @}
 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Private function prototypes -----------------------------------------------*/
 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /* Exported functions --------------------------------------------------------*/
 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /** @addtogroup ADC_LL_Exported_Functions
 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @{
 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /** @addtogroup ADC_LL_EF_Init
 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @{
 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @brief  De-initialize registers of all ADC instances belonging to
 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         the same ADC common instance to their default reset values.
 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   This function is performing a hard reset, using high level
 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         clock source RCC ADC reset.
 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADCxy_COMMON ADC common instance
 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
ARM GAS  /tmp/ccBKcv9L.s 			page 5


 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @retval An ErrorStatus enumeration value:
 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - SUCCESS: ADC common registers are de-initialized
 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - ERROR: not applicable
 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON)
 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** {
  26              		.loc 1 210 0
  27              		.cfi_startproc
  28              		@ args = 0, pretend = 0, frame = 0
  29              		@ frame_needed = 0, uses_anonymous_args = 0
  30              		@ link register save eliminated.
  31              	.LVL0:
  32              	.LBB30:
  33              	.LBB31:
  34              		.file 2 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h"
   1:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
   2:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   ******************************************************************************
   3:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @file    stm32l0xx_ll_bus.h
   4:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @author  MCD Application Team
   5:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief   Header file of BUS LL module.
   6:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
   7:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   @verbatim                
   8:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****                       ##### RCC Limitations #####
   9:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   ==============================================================================
  10:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****     [..]  
  11:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       A delay between an RCC peripheral clock enable and the effective peripheral 
  12:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       enabling should be taken into account in order to manage the peripheral read/write 
  13:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       from/to registers.
  14:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       (+) This delay depends on the peripheral mapping.
  15:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****         (++) AHB & APB peripherals, 1 dummy read is necessary
  16:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  17:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****     [..]  
  18:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       Workarounds:
  19:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****       (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
  20:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****           inserted in each LL_{BUS}_GRP{x}_EnableClock() function.
  21:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  22:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   @endverbatim
  23:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   ******************************************************************************
  24:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @attention
  25:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
  26:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  27:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
  28:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * Redistribution and use in source and binary forms, with or without modification,
  29:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * are permitted provided that the following conditions are met:
  30:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *   1. Redistributions of source code must retain the above copyright notice,
  31:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      this list of conditions and the following disclaimer.
  32:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
  33:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      this list of conditions and the following disclaimer in the documentation
  34:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      and/or other materials provided with the distribution.
  35:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  36:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      may be used to endorse or promote products derived from this software
  37:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *      without specific prior written permission.
  38:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
  39:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  40:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  41:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  42:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ARM GAS  /tmp/ccBKcv9L.s 			page 6


  43:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  44:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  45:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  46:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  47:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  48:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  49:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
  50:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   ******************************************************************************
  51:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  52:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  53:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Define to prevent recursive inclusion -------------------------------------*/
  54:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #ifndef __STM32L0xx_LL_BUS_H
  55:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define __STM32L0xx_LL_BUS_H
  56:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  57:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #ifdef __cplusplus
  58:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** extern "C" {
  59:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
  60:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  61:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/
  62:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #include "stm32l0xx.h"
  63:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  64:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @addtogroup STM32L0xx_LL_Driver
  65:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
  66:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  67:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  68:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(RCC)
  69:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  70:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL BUS
  71:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
  72:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  73:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  74:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private types -------------------------------------------------------------*/
  75:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private variables ---------------------------------------------------------*/
  76:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  77:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private constants ---------------------------------------------------------*/
  78:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  79:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Private macros ------------------------------------------------------------*/
  80:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  81:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported types ------------------------------------------------------------*/
  82:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported constants --------------------------------------------------------*/
  83:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Constants BUS Exported Constants
  84:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
  85:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  86:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
  87:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH  AHB1 GRP1 PERIPH
  88:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
  89:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
  90:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
  91:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA1           RCC_AHBENR_DMA1EN      /*!< DMA1 clock enable */
  92:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_MIF            RCC_AHBENR_MIFEN       /*!< MIF clock enable */
  93:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM           RCC_AHBSMENR_SRAMSMEN  /*!< Sleep Mode SRAM clock enable
  94:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_CRC            RCC_AHBENR_CRCEN       /*!< CRC clock enable */
  95:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TSC)
  96:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_TSC            RCC_AHBENR_TSCEN       /*!< TSC clock enable */
  97:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*TSC*/
  98:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(RNG)
  99:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_RNG            RCC_AHBENR_RNGEN       /*!< RNG clock enable */
ARM GAS  /tmp/ccBKcv9L.s 			page 7


 100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*RNG*/
 101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(AES)
 102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_CRYP           RCC_AHBENR_CRYPEN      /*!< CRYP clock enable */
 103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*AES*/
 104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH  APB1 GRP1 PERIPH
 110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
 113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2           RCC_APB1ENR_TIM2EN     /*!< TIM2 clock enable */
 114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM3)
 115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM3           RCC_APB1ENR_TIM3EN     /*!< TIM3 clock enable */
 116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM6)
 118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM6           RCC_APB1ENR_TIM6EN     /*!< TIM6 clock enable */
 119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM7)
 121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM7           RCC_APB1ENR_TIM7EN     /*!< TIM7 clock enable */
 122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(LCD)
 124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LCD            RCC_APB1ENR_LCDEN      /*!< LCD clock enable */
 125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*LCD*/
 126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG           RCC_APB1ENR_WWDGEN     /*!< WWDG clock enable */
 127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(SPI2)
 128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2           RCC_APB1ENR_SPI2EN     /*!< SPI2 clock enable */
 129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART2         RCC_APB1ENR_USART2EN   /*!< USART2 clock enable */
 131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPUART1        RCC_APB1ENR_LPUART1EN  /*!< LPUART1 clock enable */
 132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART4)
 133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART4         RCC_APB1ENR_USART4EN   /*!< USART4 clock enable */
 134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART5)
 136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART5         RCC_APB1ENR_USART5EN   /*!< USART5 clock enable */
 137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C1           RCC_APB1ENR_I2C1EN     /*!< I2C1 clock enable */
 139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(I2C2)
 140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C2           RCC_APB1ENR_I2C2EN     /*!< I2C2 clock enable */
 141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USB)
 143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USB            RCC_APB1ENR_USBEN      /*!< USB clock enable */
 144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*USB*/
 145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(CRS)
 146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CRS            RCC_APB1ENR_CRSEN      /*!< CRS clock enable */
 147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*CRS*/
 148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_PWR            RCC_APB1ENR_PWREN      /*!< PWR clock enable */
 149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(DAC)
 150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_DAC1           RCC_APB1ENR_DACEN      /*!< DAC clock enable */
 151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(I2C3)
 153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C3           RCC_APB1ENR_I2C3EN     /*!< I2C3 clock enable */
 154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1         RCC_APB1ENR_LPTIM1EN   /*!< LPTIM1 clock enable */
 156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
ARM GAS  /tmp/ccBKcv9L.s 			page 8


 157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH  APB2 GRP1 PERIPH
 164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ALL            (uint32_t)0xFFFFFFFFU
 167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SYSCFG         RCC_APB2ENR_SYSCFGEN  /*!< SYSCFG clock enable */
 168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM21          RCC_APB2ENR_TIM21EN   /*!< TIM21 clock enable */
 169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(TIM22)
 170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM22          RCC_APB2ENR_TIM22EN   /*!< TIM22 clock enable */
 171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_FW             RCC_APB2ENR_FWEN      /*!< FireWall clock enable */
 173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC1           RCC_APB2ENR_ADC1EN    /*!< ADC1 clock enable */
 174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI1           RCC_APB2ENR_SPI1EN    /*!< SPI1 clock enable */
 175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(USART1)
 176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART1         RCC_APB2ENR_USART1EN  /*!< USART1 clock enable */
 177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif
 178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_DBGMCU         RCC_APB2ENR_DBGMCUEN  /*!< DBGMCU clock enable */
 179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EC_IOP_GRP1_PERIPH  IOP GRP1 PERIPH
 187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_ALL             (uint32_t)0xFFFFFFFFU
 190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOA           RCC_IOPENR_GPIOAEN    /*!< GPIO port A control */
 191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOB           RCC_IOPENR_GPIOBEN    /*!< GPIO port B control */
 192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOC           RCC_IOPENR_GPIOCEN    /*!< GPIO port C control */
 193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOD)
 194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOD           RCC_IOPENR_GPIODEN    /*!< GPIO port D control */
 195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOD*/
 196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOE)
 197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOE           RCC_IOPENR_GPIOEEN    /*!< GPIO port H control */
 198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOE*/
 199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #if defined(GPIOH)
 200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #define LL_IOP_GRP1_PERIPH_GPIOH           RCC_IOPENR_GPIOHEN    /*!< GPIO port H control */
 201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** #endif /*GPIOH*/
 202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported macro ------------------------------------------------------------*/
 212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /* Exported functions --------------------------------------------------------*/
 213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Functions BUS Exported Functions
ARM GAS  /tmp/ccBKcv9L.s 			page 9


 214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB1 AHB1
 218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable AHB1 peripherals clock.
 223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBENR      DMAEN        LL_AHB1_GRP1_EnableClock\n
 224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      MIFEN        LL_AHB1_GRP1_EnableClock\n
 225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRCEN        LL_AHB1_GRP1_EnableClock\n
 226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      TSCEN        LL_AHB1_GRP1_EnableClock\n
 227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      RNGEN        LL_AHB1_GRP1_EnableClock\n
 228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRYPEN       LL_AHB1_GRP1_EnableClock
 229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)
 241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->AHBENR, Periphs);
 244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->AHBENR, Periphs);
 246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Check if AHB1 peripheral clock is enabled or not
 251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBENR      DMAEN        LL_AHB1_GRP1_IsEnabledClock\n
 252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      MIFEN        LL_AHB1_GRP1_IsEnabledClock\n
 253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRCEN        LL_AHB1_GRP1_IsEnabledClock\n
 254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      TSCEN        LL_AHB1_GRP1_IsEnabledClock\n
 255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      RNGEN        LL_AHB1_GRP1_IsEnabledClock\n
 256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRYPEN       LL_AHB1_GRP1_IsEnabledClock
 257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval State of Periphs (1 or 0).
 267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)
 269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   return (READ_BIT(RCC->AHBENR, Periphs) == Periphs);
ARM GAS  /tmp/ccBKcv9L.s 			page 10


 271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable AHB1 peripherals clock.
 275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBENR      DMAEN        LL_AHB1_GRP1_DisableClock\n
 276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      MIFEN        LL_AHB1_GRP1_DisableClock\n
 277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRCEN        LL_AHB1_GRP1_DisableClock\n
 278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      TSCEN        LL_AHB1_GRP1_DisableClock\n
 279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      RNGEN        LL_AHB1_GRP1_DisableClock\n
 280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBENR      CRYPEN       LL_AHB1_GRP1_DisableClock
 281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)
 293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->AHBENR, Periphs);
 295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Force AHB1 peripherals reset.
 299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBRSTR      DMARST        LL_AHB1_GRP1_ForceReset\n
 300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      MIFRST        LL_AHB1_GRP1_ForceReset\n
 301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      CRCRST        LL_AHB1_GRP1_ForceReset\n
 302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      TSCRST        LL_AHB1_GRP1_ForceReset\n
 303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      RNGRST        LL_AHB1_GRP1_ForceReset\n
 304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      CRYPRST       LL_AHB1_GRP1_ForceReset
 305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_ALL
 307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)
 318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->AHBRSTR, Periphs);
 320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Release AHB1 peripherals reset.
 324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBRSTR      DMARST        LL_AHB1_GRP1_ReleaseReset\n
 325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      MIFRST        LL_AHB1_GRP1_ReleaseReset\n
 326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      CRCRST        LL_AHB1_GRP1_ReleaseReset\n
 327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      TSCRST        LL_AHB1_GRP1_ReleaseReset\n
ARM GAS  /tmp/ccBKcv9L.s 			page 11


 328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      RNGRST        LL_AHB1_GRP1_ReleaseReset\n
 329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBRSTR      CRYPRST       LL_AHB1_GRP1_ReleaseReset
 330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_ALL
 332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)
 343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->AHBRSTR, Periphs);
 345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable AHB1 peripherals clock during Low Power (Sleep) mode.
 349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBSMENR     DMASMEN       LL_AHB1_GRP1_EnableClockSleep\n
 350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     MIFSMEN       LL_AHB1_GRP1_EnableClockSleep\n
 351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     SRAMSMEN      LL_AHB1_GRP1_EnableClockSleep\n
 352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     CRCSMEN       LL_AHB1_GRP1_EnableClockSleep\n
 353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     TSCSMEN       LL_AHB1_GRP1_EnableClockSleep\n
 354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     RNGSMEN       LL_AHB1_GRP1_EnableClockSleep\n
 355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     CRYPSMEN      LL_AHB1_GRP1_EnableClockSleep
 356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
 360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep(uint32_t Periphs)
 369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->AHBSMENR, Periphs);
 372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->AHBSMENR, Periphs);
 374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable AHB1 peripherals clock during Low Power (Sleep) mode.
 379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll AHBSMENR     DMASMEN       LL_AHB1_GRP1_DisableClockSleep\n
 380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     MIFSMEN       LL_AHB1_GRP1_DisableClockSleep\n
 381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     SRAMSMEN      LL_AHB1_GRP1_DisableClockSleep\n
 382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     CRCSMEN       LL_AHB1_GRP1_DisableClockSleep\n
 383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     TSCSMEN       LL_AHB1_GRP1_DisableClockSleep\n
 384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     RNGSMEN       LL_AHB1_GRP1_DisableClockSleep\n
ARM GAS  /tmp/ccBKcv9L.s 			page 12


 385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         AHBSMENR     CRYPSMEN      LL_AHB1_GRP1_DisableClockSleep
 386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
 388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_MIF
 389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_SRAM
 390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRC
 391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_TSC (*)
 392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*)
 393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_AHB1_GRP1_PERIPH_CRYP (*)
 394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep(uint32_t Periphs)
 399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->AHBSMENR, Periphs);
 401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB1 APB1
 408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable APB1 peripherals clock.
 413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_EnableClock\n
 414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM3EN        LL_APB1_GRP1_EnableClock\n
 415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM6EN        LL_APB1_GRP1_EnableClock\n
 416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM7EN        LL_APB1_GRP1_EnableClock\n
 417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LCDEN         LL_APB1_GRP1_EnableClock\n
 418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     WWDGEN        LL_APB1_GRP1_EnableClock\n
 419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     SPI2EN        LL_APB1_GRP1_EnableClock\n
 420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART2EN      LL_APB1_GRP1_EnableClock\n
 421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPUART1EN     LL_APB1_GRP1_EnableClock\n
 422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART4EN      LL_APB1_GRP1_EnableClock\n
 423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART5EN      LL_APB1_GRP1_EnableClock\n
 424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C1EN        LL_APB1_GRP1_EnableClock\n
 425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C2EN        LL_APB1_GRP1_EnableClock\n
 426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USBEN         LL_APB1_GRP1_EnableClock\n
 427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     CRSEN         LL_APB1_GRP1_EnableClock\n
 428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     PWREN         LL_APB1_GRP1_EnableClock\n
 429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     DACEN         LL_APB1_GRP1_EnableClock\n
 430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C3EN        LL_APB1_GRP1_EnableClock\n
 431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_EnableClock
 432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
ARM GAS  /tmp/ccBKcv9L.s 			page 13


 442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
 457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB1ENR, Periphs);
 460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
 462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Check if APB1 peripheral clock is enabled or not
 467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_IsEnabledClock\n
 468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM3EN        LL_APB1_GRP1_IsEnabledClock\n
 469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM6EN        LL_APB1_GRP1_IsEnabledClock\n
 470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM7EN        LL_APB1_GRP1_IsEnabledClock\n
 471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LCDEN         LL_APB1_GRP1_IsEnabledClock\n
 472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     WWDGEN        LL_APB1_GRP1_IsEnabledClock\n
 473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     SPI2EN        LL_APB1_GRP1_IsEnabledClock\n
 474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART2EN      LL_APB1_GRP1_IsEnabledClock\n
 475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPUART1EN     LL_APB1_GRP1_IsEnabledClock\n
 476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART4EN      LL_APB1_GRP1_IsEnabledClock\n
 477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART5EN      LL_APB1_GRP1_IsEnabledClock\n
 478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C1EN        LL_APB1_GRP1_IsEnabledClock\n
 479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C2EN        LL_APB1_GRP1_IsEnabledClock\n
 480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USBEN         LL_APB1_GRP1_IsEnabledClock\n
 481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     CRSEN         LL_APB1_GRP1_IsEnabledClock\n
 482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     PWREN         LL_APB1_GRP1_IsEnabledClock\n
 483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     DACEN         LL_APB1_GRP1_IsEnabledClock\n
 484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C3EN        LL_APB1_GRP1_IsEnabledClock\n
 485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_IsEnabledClock
 486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
ARM GAS  /tmp/ccBKcv9L.s 			page 14


 499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval State of Periphs (1 or 0).
 509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)
 511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);
 513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable APB1 peripherals clock.
 517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1ENR     TIM2EN        LL_APB1_GRP1_DisableClock\n
 518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM3EN        LL_APB1_GRP1_DisableClock\n
 519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM6EN        LL_APB1_GRP1_DisableClock\n
 520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     TIM7EN        LL_APB1_GRP1_DisableClock\n
 521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LCDEN         LL_APB1_GRP1_DisableClock\n
 522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     WWDGEN        LL_APB1_GRP1_DisableClock\n
 523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     SPI2EN        LL_APB1_GRP1_DisableClock\n
 524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART2EN      LL_APB1_GRP1_DisableClock\n
 525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPUART1EN     LL_APB1_GRP1_DisableClock\n
 526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART4EN      LL_APB1_GRP1_DisableClock\n
 527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USART5EN      LL_APB1_GRP1_DisableClock\n
 528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C1EN        LL_APB1_GRP1_DisableClock\n
 529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C2EN        LL_APB1_GRP1_DisableClock\n
 530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     USBEN         LL_APB1_GRP1_DisableClock\n
 531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     CRSEN         LL_APB1_GRP1_DisableClock\n
 532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     PWREN         LL_APB1_GRP1_DisableClock\n
 533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     DACEN         LL_APB1_GRP1_DisableClock\n
 534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     I2C3EN        LL_APB1_GRP1_DisableClock\n
 535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1ENR     LPTIM1EN      LL_APB1_GRP1_DisableClock
 536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
ARM GAS  /tmp/ccBKcv9L.s 			page 15


 556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)
 561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB1ENR, Periphs);
 563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Force APB1 peripherals reset.
 567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1RSTR     TIM2RST        LL_APB1_GRP1_ForceReset\n
 568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM3RST        LL_APB1_GRP1_ForceReset\n
 569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM6RST        LL_APB1_GRP1_ForceReset\n
 570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM7RST        LL_APB1_GRP1_ForceReset\n
 571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LCDRST         LL_APB1_GRP1_ForceReset\n
 572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     WWDGRST        LL_APB1_GRP1_ForceReset\n
 573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     SPI2RST        LL_APB1_GRP1_ForceReset\n
 574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART2RST      LL_APB1_GRP1_ForceReset\n
 575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LPUART1RST     LL_APB1_GRP1_ForceReset\n
 576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART4RST      LL_APB1_GRP1_ForceReset\n
 577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART5RST      LL_APB1_GRP1_ForceReset\n
 578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C1RST        LL_APB1_GRP1_ForceReset\n
 579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C2RST        LL_APB1_GRP1_ForceReset\n
 580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USBRST         LL_APB1_GRP1_ForceReset\n
 581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     CRSRST         LL_APB1_GRP1_ForceReset\n
 582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     PWRRST         LL_APB1_GRP1_ForceReset\n
 583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     DACRST         LL_APB1_GRP1_ForceReset\n
 584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C3RST        LL_APB1_GRP1_ForceReset\n
 585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LPTIM1RST      LL_APB1_GRP1_ForceReset
 586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_ALL
 588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)
 612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
ARM GAS  /tmp/ccBKcv9L.s 			page 16


 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB1RSTR, Periphs);
 614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Release APB1 peripherals reset.
 618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1RSTR     TIM2RST        LL_APB1_GRP1_ReleaseReset\n
 619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM3RST        LL_APB1_GRP1_ReleaseReset\n
 620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM6RST        LL_APB1_GRP1_ReleaseReset\n
 621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     TIM7RST        LL_APB1_GRP1_ReleaseReset\n
 622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LCDRST         LL_APB1_GRP1_ReleaseReset\n
 623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     WWDGRST        LL_APB1_GRP1_ReleaseReset\n
 624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     SPI2RST        LL_APB1_GRP1_ReleaseReset\n
 625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART2RST      LL_APB1_GRP1_ReleaseReset\n
 626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LPUART1RST     LL_APB1_GRP1_ReleaseReset\n
 627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART4RST      LL_APB1_GRP1_ReleaseReset\n
 628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USART5RST      LL_APB1_GRP1_ReleaseReset\n
 629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C1RST        LL_APB1_GRP1_ReleaseReset\n
 630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C2RST        LL_APB1_GRP1_ReleaseReset\n
 631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     USBRST         LL_APB1_GRP1_ReleaseReset\n
 632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     CRSRST         LL_APB1_GRP1_ReleaseReset\n
 633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     PWRRST         LL_APB1_GRP1_ReleaseReset\n
 634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     DACRST         LL_APB1_GRP1_ReleaseReset\n
 635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     I2C3RST        LL_APB1_GRP1_ReleaseReset\n
 636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1RSTR     LPTIM1RST      LL_APB1_GRP1_ReleaseReset
 637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_ALL
 639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)
 663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB1RSTR, Periphs);
 665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable APB1 peripherals clock during Low Power (Sleep) mode.
 669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1SMENR    TIM2SMEN      LL_APB1_GRP1_EnableClockSleep\n
ARM GAS  /tmp/ccBKcv9L.s 			page 17


 670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM3SMEN      LL_APB1_GRP1_EnableClockSleep\n
 671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM6SMEN      LL_APB1_GRP1_EnableClockSleep\n
 672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM7SMEN      LL_APB1_GRP1_EnableClockSleep\n
 673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LCDSMEN       LL_APB1_GRP1_EnableClockSleep\n
 674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    WWDGSMEN      LL_APB1_GRP1_EnableClockSleep\n
 675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    SPI2SMEN      LL_APB1_GRP1_EnableClockSleep\n
 676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART2SMEN    LL_APB1_GRP1_EnableClockSleep\n
 677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LPUART1SMEN   LL_APB1_GRP1_EnableClockSleep\n
 678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART4SMEN    LL_APB1_GRP1_EnableClockSleep\n
 679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART5SMEN    LL_APB1_GRP1_EnableClockSleep\n
 680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C1SMEN      LL_APB1_GRP1_EnableClockSleep\n
 681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C2SMEN      LL_APB1_GRP1_EnableClockSleep\n
 682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USBSMEN       LL_APB1_GRP1_EnableClockSleep\n
 683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    CRSSMEN       LL_APB1_GRP1_EnableClockSleep\n
 684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    PWRSMEN       LL_APB1_GRP1_EnableClockSleep\n
 685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    DACSMEN       LL_APB1_GRP1_EnableClockSleep\n
 686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C3SMEN      LL_APB1_GRP1_EnableClockSleep\n
 687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LPTIM1SMEN    LL_APB1_GRP1_EnableClockSleep
 688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClockSleep(uint32_t Periphs)
 713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB1SMENR, Periphs);
 716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->APB1SMENR, Periphs);
 718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable APB1 peripherals clock during Low Power (Sleep) mode.
 723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB1SMENR    TIM2SMEN      LL_APB1_GRP1_DisableClockSleep\n
 724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM3SMEN      LL_APB1_GRP1_DisableClockSleep\n
 725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM6SMEN      LL_APB1_GRP1_DisableClockSleep\n
 726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    TIM7SMEN      LL_APB1_GRP1_DisableClockSleep\n
ARM GAS  /tmp/ccBKcv9L.s 			page 18


 727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LCDSMEN       LL_APB1_GRP1_DisableClockSleep\n
 728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    WWDGSMEN      LL_APB1_GRP1_DisableClockSleep\n
 729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    SPI2SMEN      LL_APB1_GRP1_DisableClockSleep\n
 730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART2SMEN    LL_APB1_GRP1_DisableClockSleep\n
 731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LPUART1SMEN   LL_APB1_GRP1_DisableClockSleep\n
 732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART4SMEN    LL_APB1_GRP1_DisableClockSleep\n
 733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USART5SMEN    LL_APB1_GRP1_DisableClockSleep\n
 734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C1SMEN      LL_APB1_GRP1_DisableClockSleep\n
 735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C2SMEN      LL_APB1_GRP1_DisableClockSleep\n
 736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    USBSMEN       LL_APB1_GRP1_DisableClockSleep\n
 737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    CRSSMEN       LL_APB1_GRP1_DisableClockSleep\n
 738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    PWRSMEN       LL_APB1_GRP1_DisableClockSleep\n
 739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    DACSMEN       LL_APB1_GRP1_DisableClockSleep\n
 740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    I2C3SMEN      LL_APB1_GRP1_DisableClockSleep\n
 741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB1SMENR    LPTIM1SMEN    LL_APB1_GRP1_DisableClockSleep
 742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM2
 744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*)
 745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*)
 746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*)
 747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LCD (*)
 748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_WWDG
 749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*)
 750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART2
 751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPUART1
 752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART4 (*)
 753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USART5 (*)
 754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C1
 755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*)
 756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_USB (*)
 757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_CRS (*)
 758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_PWR
 759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*)
 760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*)
 761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
 762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClockSleep(uint32_t Periphs)
 767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB1SMENR, Periphs);
 769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @}
 773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2
 776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @{
 777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   */
 778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Enable APB2 peripherals clock.
 781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2ENR      SYSCFGEN      LL_APB2_GRP1_EnableClock\n
 782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM21EN       LL_APB2_GRP1_EnableClock\n
 783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM22EN       LL_APB2_GRP1_EnableClock\n
ARM GAS  /tmp/ccBKcv9L.s 			page 19


 784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      FWEN          LL_APB2_GRP1_EnableClock\n
 785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      ADCEN         LL_APB2_GRP1_EnableClock\n
 786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      SPI1EN        LL_APB2_GRP1_EnableClock\n
 787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      USART1EN      LL_APB2_GRP1_EnableClock\n
 788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      DBGEN         LL_APB2_GRP1_EnableClock
 789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_FW
 794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*)
 797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
 803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   __IO uint32_t tmpreg;
 805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB2ENR, Periphs);
 806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   /* Delay after an RCC peripheral clock enabling */
 807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
 808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   (void)tmpreg;
 809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Check if APB2 peripheral clock is enabled or not
 813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2ENR      SYSCFGEN      LL_APB2_GRP1_IsEnabledClock\n
 814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM21EN       LL_APB2_GRP1_IsEnabledClock\n
 815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM22EN       LL_APB2_GRP1_IsEnabledClock\n
 816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      FWEN          LL_APB2_GRP1_IsEnabledClock\n
 817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      ADCEN         LL_APB2_GRP1_IsEnabledClock\n
 818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      SPI1EN        LL_APB2_GRP1_IsEnabledClock\n
 819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      USART1EN      LL_APB2_GRP1_IsEnabledClock\n
 820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      DBGEN         LL_APB2_GRP1_IsEnabledClock
 821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_FW
 826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*)
 829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval State of Periphs (1 or 0).
 833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs)
 835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs);
 837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Disable APB2 peripherals clock.
ARM GAS  /tmp/ccBKcv9L.s 			page 20


 841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2ENR      SYSCFGEN      LL_APB2_GRP1_DisableClock\n
 842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM21EN       LL_APB2_GRP1_DisableClock\n
 843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      TIM22EN       LL_APB2_GRP1_DisableClock\n
 844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      FWEN          LL_APB2_GRP1_DisableClock\n
 845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      ADCEN         LL_APB2_GRP1_DisableClock\n
 846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      SPI1EN        LL_APB2_GRP1_DisableClock\n
 847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      USART1EN      LL_APB2_GRP1_DisableClock\n
 848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2ENR      DBGEN         LL_APB2_GRP1_DisableClock
 849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_FW
 854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1  (*)
 857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs)
 863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB2ENR, Periphs);
 865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Force APB2 peripherals reset.
 869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2RSTR     SYSCFGRST     LL_APB2_GRP1_ForceReset\n
 870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     TIM21RST      LL_APB2_GRP1_ForceReset\n
 871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     TIM22RST      LL_APB2_GRP1_ForceReset\n
 872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     ADCRST        LL_APB2_GRP1_ForceReset\n
 873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     SPI1RST       LL_APB2_GRP1_ForceReset\n
 874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     USART1RST     LL_APB2_GRP1_ForceReset\n
 875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     DBGRST        LL_APB2_GRP1_ForceReset
 876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ALL
 878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1 (*)
 884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs)
 890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   SET_BIT(RCC->APB2RSTR, Periphs);
  35              		.loc 2 891 0
  36 0000 054B     		ldr	r3, .L2
  37 0002 596A     		ldr	r1, [r3, #36]
  38 0004 8022     		movs	r2, #128
  39 0006 9200     		lsls	r2, r2, #2
  40 0008 0A43     		orrs	r2, r1
ARM GAS  /tmp/ccBKcv9L.s 			page 21


  41 000a 5A62     		str	r2, [r3, #36]
  42              	.LVL1:
  43              	.LBE31:
  44              	.LBE30:
  45              	.LBB32:
  46              	.LBB33:
 892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** }
 893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** 
 894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** /**
 895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @brief  Release APB2 peripherals reset.
 896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @rmtoll APB2RSTR     SYSCFGRST     LL_APB2_GRP1_ReleaseReset\n
 897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     TIM21RST      LL_APB2_GRP1_ReleaseReset\n
 898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     TIM22RST      LL_APB2_GRP1_ReleaseReset\n
 899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     ADCRST        LL_APB2_GRP1_ReleaseReset\n
 900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     SPI1RST       LL_APB2_GRP1_ReleaseReset\n
 901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     USART1RST     LL_APB2_GRP1_ReleaseReset\n
 902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         APB2RSTR     DBGRST        LL_APB2_GRP1_ReleaseReset
 903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @param  Periphs This parameter can be a combination of the following values:
 904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ALL
 905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
 906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM21
 907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_TIM22  (*)
 908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_ADC1
 909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_SPI1
 910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_USART1  (*)
 911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         @arg @ref LL_APB2_GRP1_PERIPH_DBGMCU
 912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *
 913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   *         (*) value not defined in all devices.
 914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   * @retval None
 915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** */
 916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs)
 917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h **** {
 918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_bus.h ****   CLEAR_BIT(RCC->APB2RSTR, Periphs);
  47              		.loc 2 918 0
  48 000c 5A6A     		ldr	r2, [r3, #36]
  49 000e 0349     		ldr	r1, .L2+4
  50 0010 0A40     		ands	r2, r1
  51 0012 5A62     		str	r2, [r3, #36]
  52              	.LVL2:
  53              	.LBE33:
  54              	.LBE32:
 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Check the parameters */
 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Force reset of ADC clock (core clock) */
 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_ADC1);
 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Release reset of ADC clock (core clock) */
 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_ADC1);
 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   return SUCCESS;
 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** }
  55              		.loc 1 221 0
  56 0014 0120     		movs	r0, #1
  57              	.LVL3:
  58              		@ sp needed
  59 0016 7047     		bx	lr
ARM GAS  /tmp/ccBKcv9L.s 			page 22


  60              	.L3:
  61              		.align	2
  62              	.L2:
  63 0018 00100240 		.word	1073876992
  64 001c FFFDFFFF 		.word	-513
  65              		.cfi_endproc
  66              	.LFE170:
  68              		.section	.text.LL_ADC_CommonInit,"ax",%progbits
  69              		.align	1
  70              		.global	LL_ADC_CommonInit
  71              		.syntax unified
  72              		.code	16
  73              		.thumb_func
  74              		.fpu softvfp
  76              	LL_ADC_CommonInit:
  77              	.LFB171:
 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @brief  Initialize some features of ADC common parameters
 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         (all ADC instances belonging to the same ADC common instance)
 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         and multimode (for devices with several ADC instances available).
 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   The setting of ADC common parameters is conditioned to
 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         ADC instances state:
 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         All ADC instances belonging to the same ADC common instance
 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         must be disabled.
 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADCxy_COMMON ADC common instance
 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @retval An ErrorStatus enumeration value:
 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - SUCCESS: ADC common registers are initialized
 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - ERROR: ADC common registers are not initialized
 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef *ADCxy_COMMON, LL_ADC_CommonInitTypeDef *ADC_Commo
 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** {
  78              		.loc 1 239 0
  79              		.cfi_startproc
  80              		@ args = 0, pretend = 0, frame = 0
  81              		@ frame_needed = 0, uses_anonymous_args = 0
  82              		@ link register save eliminated.
  83              	.LVL4:
  84              	.LBB34:
  85              	.LBB35:
  86              		.file 3 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h"
   1:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
   2:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ******************************************************************************
   3:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @file    stm32l0xx_ll_adc.h
   4:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @author  MCD Application Team
   5:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief   Header file of ADC LL module.
   6:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ******************************************************************************
   7:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @attention
   8:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
   9:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
  11:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * Redistribution and use in source and binary forms, with or without modification,
  12:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * are permitted provided that the following conditions are met:
  13:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *   1. Redistributions of source code must retain the above copyright notice,
  14:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *      this list of conditions and the following disclaimer.
ARM GAS  /tmp/ccBKcv9L.s 			page 23


  15:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *   2. Redistributions in binary form must reproduce the above copyright notice,
  16:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *      this list of conditions and the following disclaimer in the documentation
  17:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *      and/or other materials provided with the distribution.
  18:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  19:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *      may be used to endorse or promote products derived from this software
  20:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *      without specific prior written permission.
  21:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
  22:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
  33:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ******************************************************************************
  34:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
  35:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  36:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Define to prevent recursive inclusion -------------------------------------*/
  37:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #ifndef __STM32L0xx_LL_ADC_H
  38:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __STM32L0xx_LL_ADC_H
  39:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  40:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #ifdef __cplusplus
  41:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** extern "C" {
  42:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
  43:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  44:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Includes ------------------------------------------------------------------*/
  45:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #include "stm32l0xx.h"
  46:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  47:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @addtogroup STM32L0xx_LL_Driver
  48:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
  49:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
  50:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  51:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if defined (ADC1)
  52:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  53:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL ADC
  54:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
  55:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
  56:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  57:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Private types -------------------------------------------------------------*/
  58:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Private variables ---------------------------------------------------------*/
  59:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  60:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Private constants ---------------------------------------------------------*/
  61:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Constants ADC Private Constants
  62:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
  63:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
  64:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  65:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Internal mask for ADC group regular trigger:                               */
  66:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* To select into literal LL_ADC_REG_TRIG_x the relevant bits for:            */
  67:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* - regular trigger source                                                   */
  68:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* - regular trigger edge                                                     */
  69:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_REG_TRIG_EXT_EDGE_DEFAULT       (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge 
  70:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  71:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Mask containing trigger source masks for each of possible                  */
ARM GAS  /tmp/ccBKcv9L.s 			page 24


  72:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12]                */
  73:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}.        */
  74:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_REG_TRIG_SOURCE_MASK            (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTSEL) << (4U 
  75:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              ((ADC_CFGR1_EXTSEL)                            << (4U 
  76:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              ((ADC_CFGR1_EXTSEL)                            << (4U 
  77:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              ((ADC_CFGR1_EXTSEL)                            << (4U 
  78:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  79:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Mask containing trigger edge masks for each of possible                    */
  80:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* trigger edge selection duplicated with shifts [0; 4; 8; 12]                */
  81:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* corresponding to {SW start; ext trigger; ext trigger; ext trigger}.        */
  82:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_REG_TRIG_EDGE_MASK              (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U *
  83:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              ((ADC_REG_TRIG_EXT_EDGE_DEFAULT)              << (4U *
  84:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              ((ADC_REG_TRIG_EXT_EDGE_DEFAULT)              << (4U *
  85:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              ((ADC_REG_TRIG_EXT_EDGE_DEFAULT)              << (4U *
  86:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  87:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Definition of ADC group regular trigger bits information.                  */
  88:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS  ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_
  89:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_REG_TRIG_EXTEN_BITOFFSET_POS   ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_
  90:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  91:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  92:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
  93:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Internal mask for ADC channel:                                             */
  94:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* To select into literal LL_ADC_CHANNEL_x the relevant bits for:             */
  95:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* - channel identifier defined by number                                     */
  96:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* - channel identifier defined by bitfield                                   */
  97:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* - channel differentiation between external channels (connected to          */
  98:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*   GPIO pins) and internal channels (connected to internal paths)           */
  99:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK         (ADC_CFGR1_AWDCH)
 100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_ID_BITFIELD_MASK       (ADC_CHSELR_CHSEL)
 101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS ((uint32_t)26U)/* Value equivalent to POSITION_VAL(ADC_
 102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_ID_MASK                (ADC_CHANNEL_ID_NUMBER_MASK | ADC_CHANNEL_ID_BITFIELD_MA
 103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
 104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 ((uint32_t)0x0000001FU) /* Equivalent to shift: (ADC_CHA
 105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Channel differentiation between external and internal channels */
 107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH         ((uint32_t)0x80000000U) /* Marker of internal channel */
 108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_ID_INTERNAL_CH_MASK    (ADC_CHANNEL_ID_INTERNAL_CH)
 109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Definition of channels ID number information to be inserted into           */
 111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* channels literals definition.                                              */
 112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_0_NUMBER               ((uint32_t)0x00000000U)
 113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_1_NUMBER               (                                                       
 114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_2_NUMBER               (                                                       
 115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_3_NUMBER               (                                                       
 116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_4_NUMBER               (                                        ADC_CFGR1_AWDCH
 117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_5_NUMBER               (                                        ADC_CFGR1_AWDCH
 118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_6_NUMBER               (                                        ADC_CFGR1_AWDCH
 119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_7_NUMBER               (                                        ADC_CFGR1_AWDCH
 120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_8_NUMBER               (                    ADC_CFGR1_AWDCH_3                  
 121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_9_NUMBER               (                    ADC_CFGR1_AWDCH_3                  
 122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_10_NUMBER              (                    ADC_CFGR1_AWDCH_3                  
 123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_11_NUMBER              (                    ADC_CFGR1_AWDCH_3                  
 124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_12_NUMBER              (                    ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH
 125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_13_NUMBER              (                    ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH
 126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_14_NUMBER              (                    ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH
 127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_15_NUMBER              (                    ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH
 128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_16_NUMBER              (ADC_CFGR1_AWDCH_4                                      
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 129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_17_NUMBER              (ADC_CFGR1_AWDCH_4                                      
 130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_18_NUMBER              (ADC_CFGR1_AWDCH_4                                      
 131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Definition of channels ID bitfield information to be inserted into         */
 133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* channels literals definition.                                              */
 134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_0_BITFIELD             (ADC_CHSELR_CHSEL0)
 135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_1_BITFIELD             (ADC_CHSELR_CHSEL1)
 136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_2_BITFIELD             (ADC_CHSELR_CHSEL2)
 137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_3_BITFIELD             (ADC_CHSELR_CHSEL3)
 138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_4_BITFIELD             (ADC_CHSELR_CHSEL4)
 139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_5_BITFIELD             (ADC_CHSELR_CHSEL5)
 140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_6_BITFIELD             (ADC_CHSELR_CHSEL6)
 141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_7_BITFIELD             (ADC_CHSELR_CHSEL7)
 142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_8_BITFIELD             (ADC_CHSELR_CHSEL8)
 143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_9_BITFIELD             (ADC_CHSELR_CHSEL9)
 144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_10_BITFIELD            (ADC_CHSELR_CHSEL10)
 145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_11_BITFIELD            (ADC_CHSELR_CHSEL11)
 146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_12_BITFIELD            (ADC_CHSELR_CHSEL12)
 147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_13_BITFIELD            (ADC_CHSELR_CHSEL13)
 148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_14_BITFIELD            (ADC_CHSELR_CHSEL14)
 149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_15_BITFIELD            (ADC_CHSELR_CHSEL15)
 150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if  defined(ADC_CCR_VLCDEN)
 151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_16_BITFIELD            (ADC_CHSELR_CHSEL16)
 152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
 153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_17_BITFIELD            (ADC_CHSELR_CHSEL17)
 154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHANNEL_18_BITFIELD            (ADC_CHSELR_CHSEL18)
 155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Internal mask for ADC analog watchdog:                                     */
 157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for:     */
 158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* (concatenation of multiple bits used in different analog watchdogs,        */
 159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* (feature of several watchdogs not available on all STM32 families)).       */
 160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* - analog watchdog 1: monitored channel defined by number,                  */
 161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*   selection of ADC group (ADC group regular).                              */
 162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog channel configuration */
 164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_AWD_CR1_REGOFFSET              ((uint32_t)0x00000000U)
 165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_AWD_CRX_REGOFFSET_MASK         (ADC_AWD_CR1_REGOFFSET)
 167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_AWD_CR1_CHANNEL_MASK           (ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)
 169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_AWD_CR_ALL_CHANNEL_MASK        (ADC_AWD_CR1_CHANNEL_MASK)
 170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Internal register offset for ADC analog watchdog threshold configuration */
 172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_AWD_TR1_REGOFFSET              (ADC_AWD_CR1_REGOFFSET)
 173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_AWD_TRX_REGOFFSET_MASK         (ADC_AWD_TR1_REGOFFSET)
 174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* ADC registers bits positions */
 177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CFGR1_RES_BITOFFSET_POS        ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_
 178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CFGR1_AWDSGL_BITOFFSET_POS     ((uint32_t)22U) /* Value equivalent to POSITION_VAL(ADC_
 179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_TR_HT_BITOFFSET_POS            ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_
 180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL0_BITOFFSET_POS    ((uint32_t) 0U) /* Value equivalent to POSITION_VAL(ADC_
 181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL1_BITOFFSET_POS    ((uint32_t) 1U) /* Value equivalent to POSITION_VAL(ADC_
 182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL2_BITOFFSET_POS    ((uint32_t) 2U) /* Value equivalent to POSITION_VAL(ADC_
 183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL3_BITOFFSET_POS    ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_
 184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL4_BITOFFSET_POS    ((uint32_t) 4U) /* Value equivalent to POSITION_VAL(ADC_
 185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL5_BITOFFSET_POS    ((uint32_t) 5U) /* Value equivalent to POSITION_VAL(ADC_
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 186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL6_BITOFFSET_POS    ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_
 187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL7_BITOFFSET_POS    ((uint32_t) 7U) /* Value equivalent to POSITION_VAL(ADC_
 188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL8_BITOFFSET_POS    ((uint32_t) 8U) /* Value equivalent to POSITION_VAL(ADC_
 189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL9_BITOFFSET_POS    ((uint32_t) 9U) /* Value equivalent to POSITION_VAL(ADC_
 190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL10_BITOFFSET_POS   ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_
 191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL11_BITOFFSET_POS   ((uint32_t)11U) /* Value equivalent to POSITION_VAL(ADC_
 192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL12_BITOFFSET_POS   ((uint32_t)12U) /* Value equivalent to POSITION_VAL(ADC_
 193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL13_BITOFFSET_POS   ((uint32_t)13U) /* Value equivalent to POSITION_VAL(ADC_
 194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL14_BITOFFSET_POS   ((uint32_t)14U) /* Value equivalent to POSITION_VAL(ADC_
 195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL15_BITOFFSET_POS   ((uint32_t)15U) /* Value equivalent to POSITION_VAL(ADC_
 196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if  defined(ADC_CCR_VLCDEN)
 197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL16_BITOFFSET_POS   ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_
 198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
 199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL17_BITOFFSET_POS   ((uint32_t)17U) /* Value equivalent to POSITION_VAL(ADC_
 200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CHSELR_CHSEL18_BITOFFSET_POS   ((uint32_t)18U) /* Value equivalent to POSITION_VAL(ADC_
 201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* ADC registers bits groups */
 204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define ADC_CR_BITS_PROPERTY_RS            (ADC_CR_ADCAL | ADC_CR_ADSTP | ADC_CR_ADSTART | ADC_CR_A
 205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* ADC internal channels related definitions */
 208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Internal voltage reference VrefInt */
 209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define VREFINT_CAL_ADDR                   ((uint16_t*) ((uint32_t)0x1FF80078U)) /* Internal voltag
 210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define VREFINT_CAL_VREF                   ((uint32_t) 3000U)                    /* Analog voltage 
 211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Temperature sensor */
 212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Note: On device STM32L011, calibration parameter TS_CAL1 is not available. */
 213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if !defined(STM32L011xx)
 214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define TEMPSENSOR_CAL1_ADDR               ((uint16_t*) ((uint32_t)0x1FF8007AU)) /* Internal temper
 215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
 216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define TEMPSENSOR_CAL2_ADDR               ((uint16_t*) ((uint32_t)0x1FF8007EU)) /* Internal temper
 217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if !defined(STM32L011xx)
 218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define TEMPSENSOR_CAL1_TEMP               (( int32_t)   30)                     /* Internal temper
 219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
 220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define TEMPSENSOR_CAL2_TEMP               (( int32_t)  130)                     /* Internal temper
 221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define TEMPSENSOR_CAL_VREFANALOG          ((uint32_t) 3000U)                    /* Analog voltage 
 222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if  defined(USE_FULL_LL_DRIVER)
 230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Private macros ------------------------------------------------------------*/
 231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_Private_Macros ADC Private Macros
 232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
 241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Exported types ------------------------------------------------------------*/
ARM GAS  /tmp/ccBKcv9L.s 			page 27


 243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if defined(USE_FULL_LL_DRIVER)
 244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
 245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Structure definition of some features of ADC common parameters
 250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and multimode
 251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (all ADC instances belonging to the same ADC common instance).
 252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   The setting of these parameters by function @ref LL_ADC_CommonInit()
 253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is conditioned to ADC instances state (all ADC instances
 254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         sharing the same ADC common instance):
 255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         All ADC instances sharing the same ADC common instance must be
 256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         disabled.
 257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** typedef struct
 259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
 260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t CommonClock;                 /*!< Set parameter common to several ADC: Clock source and 
 261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_COMMON
 262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** } LL_ADC_CommonInitTypeDef;
 266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Structure definition of some features of ADC instance.
 269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   These parameters have an impact on ADC scope: ADC instance.
 270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to corresponding unitary functions into
 271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @ref ADC_LL_EF_Configuration_ADC_Instance .
 272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   The setting of these parameters by function @ref LL_ADC_Init()
 273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is conditioned to ADC state:
 274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC instance must be disabled.
 275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This condition is applied to all ADC features, for efficiency
 276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and compatibility over all STM32 families. However, the different
 277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         features can be set under different ADC state conditions
 278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (setting possible with ADC enabled without conversion on going,
 279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC enabled with conversion on going, ...)
 280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Each feature can be updated afterwards with a unitary function
 281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and potentially with ADC in a different state than disabled,
 282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         refer to description of each function for setting
 283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         conditioned to ADC state.
 284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** typedef struct
 286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
 287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t Clock;                       /*!< Set ADC instance clock source and prescaler.
 288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_CLOCK_
 289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              @note On this STM32 serie, this parameter has some clo
 290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                                    ADC clock synchronous (from PCLK) with prescaler
 291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                                    (APB prescaler configured inside the RCC must be
 292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              For more details, refer to description of this functio
 296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t Resolution;                  /*!< Set ADC resolution.
 298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_RESOLU
 299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
ARM GAS  /tmp/ccBKcv9L.s 			page 28


 300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t DataAlignment;               /*!< Set ADC conversion data alignment.
 303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_DATA_A
 304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t LowPowerMode;                /*!< Set ADC low power mode.
 308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_LP_MOD
 309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** } LL_ADC_InitTypeDef;
 313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Structure definition of some features of ADC group regular.
 316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   These parameters have an impact on ADC scope: ADC group regular.
 317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to corresponding unitary functions into
 318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @ref ADC_LL_EF_Configuration_ADC_Group_Regular
 319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (functions with prefix "REG").
 320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   The setting of these parameters by function @ref LL_ADC_REG_Init()
 321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is conditioned to ADC state:
 322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC instance must be disabled.
 323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This condition is applied to all ADC features, for efficiency
 324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and compatibility over all STM32 families. However, the different
 325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         features can be set under different ADC state conditions
 326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (setting possible with ADC enabled without conversion on going,
 327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC enabled with conversion on going, ...)
 328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Each feature can be updated afterwards with a unitary function
 329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and potentially with ADC in a different state than disabled,
 330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         refer to description of each function for setting
 331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         conditioned to ADC state.
 332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** typedef struct
 334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
 335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t TriggerSource;               /*!< Set ADC group regular conversion trigger source: inter
 336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_REG_TR
 337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              @note On this STM32 serie, setting trigger source to e
 338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                                    (default setting for compatibility with some ADC
 339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                                    In case of need to modify trigger edge, use func
 340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t SequencerDiscont;            /*!< Set ADC group regular sequencer discontinuous mode: se
 344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_REG_SE
 345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              @note This parameter has an effect only if group regul
 346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                                    (several ADC channels enabled in group regular s
 347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t ContinuousMode;              /*!< Set ADC continuous conversion mode on ADC group regula
 351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_REG_CO
 352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              Note: It is not possible to enable both ADC group regu
 353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t DMATransfer;                 /*!< Set ADC group regular conversion data transfer: no tra
ARM GAS  /tmp/ccBKcv9L.s 			page 29


 357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_REG_DM
 358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   uint32_t Overrun;                     /*!< Set ADC group regular behavior in case of overrun:
 362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              data preserved or overwritten.
 363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This parameter can be a value of @ref ADC_LL_EC_REG_OV
 364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              
 365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              This feature can be modified afterwards using unitary 
 366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** } LL_ADC_REG_InitTypeDef;
 368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif /* USE_FULL_LL_DRIVER */
 373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Exported constants --------------------------------------------------------*/
 375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
 376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_FLAG ADC flags
 380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief    Flags defines which can be used with LL_ADC_ReadReg function
 381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_FLAG_ADRDY                  ADC_ISR_ADRDY      /*!< ADC flag ADC instance ready */
 384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_FLAG_EOC                    ADC_ISR_EOC        /*!< ADC flag ADC group regular end o
 385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_FLAG_EOS                    ADC_ISR_EOS        /*!< ADC flag ADC group regular end o
 386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_FLAG_OVR                    ADC_ISR_OVR        /*!< ADC flag ADC group regular overr
 387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_FLAG_EOSMP                  ADC_ISR_EOSMP      /*!< ADC flag ADC group regular end o
 388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_FLAG_AWD1                   ADC_ISR_AWD        /*!< ADC flag ADC analog watchdog 1 *
 389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_FLAG_EOCAL                  ADC_ISR_EOCAL      /*!< ADC flag end of calibration */
 390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable)
 395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief    IT defines which can be used with LL_ADC_ReadReg and  LL_ADC_WriteReg functions
 396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_IT_ADRDY                    ADC_IER_ADRDYIE    /*!< ADC interruption ADC instance re
 399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_IT_EOC                      ADC_IER_EOCIE      /*!< ADC interruption ADC group regul
 400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_IT_EOS                      ADC_IER_EOSIE      /*!< ADC interruption ADC group regul
 401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_IT_OVR                      ADC_IER_OVRIE      /*!< ADC interruption ADC group regul
 402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_IT_EOSMP                    ADC_IER_EOSMPIE    /*!< ADC interruption ADC group regul
 403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_IT_AWD1                     ADC_IER_AWDIE      /*!< ADC interruption ADC analog watc
 404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_IT_EOCAL                    ADC_IER_EOCALIE    /*!< ADC interruption ADC end of cali
 405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REGISTERS  ADC registers compliant with specific purpose
 410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* List of ADC registers intended to be used (most commonly) with             */
 413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* DMA transfer.                                                              */
ARM GAS  /tmp/ccBKcv9L.s 			page 30


 414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Refer to function @ref LL_ADC_DMA_GetRegAddr().                            */
 415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_DMA_REG_REGULAR_DATA          ((uint32_t)0x00000000U) /* ADC group regular conversio
 416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE  ADC common - Clock source
 421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV1            ((uint32_t)0x00000000U)                               /*
 424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV2            (ADC_CCR_PRESC_0)                                     /*
 425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV4            (ADC_CCR_PRESC_1                  )                   /*
 426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV6            (ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0)                   /*
 427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV8            (ADC_CCR_PRESC_2                                    ) /*
 428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV10           (ADC_CCR_PRESC_2                   | ADC_CCR_PRESC_0) /*
 429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV12           (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1                  ) /*
 430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV16           (ADC_CCR_PRESC_2 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*
 431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV32           (ADC_CCR_PRESC_3)                                     /*
 432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV64           (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_0)                   /*
 433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV128          (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1)                   /*
 434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC_DIV256          (ADC_CCR_PRESC_3 | ADC_CCR_PRESC_1 | ADC_CCR_PRESC_0) /*
 435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_CLOCK_FREQ_MODE  ADC common - Clock frequency mode
 440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_FREQ_MODE_HIGH        ((uint32_t)0x00000000U)/*!< ADC clock mode to high frequ
 443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_FREQ_MODE_LOW         (ADC_CCR_LFMEN)        /*!< ADC clock mode to low freque
 444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL  ADC common - Measurement path to internal channels
 449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Note: Other measurement paths to internal channels may be available        */
 452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       (connections to other peripherals).                                  */
 453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       If they are not listed below, they do not require any specific       */
 454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       path enable. In this case, Access to measurement path is done        */
 455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       only by selecting the corresponding ADC internal channel.            */
 456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_NONE          ((uint32_t)0x00000000U)/*!< ADC measurement pathes all d
 457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VREFINT       (ADC_CCR_VREFEN)       /*!< ADC measurement path to inte
 458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_TEMPSENSOR    (ADC_CCR_TSEN)         /*!< ADC measurement path to inte
 459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_PATH_INTERNAL_VLCD          (ADC_CCR_VLCDEN)       /*!< ADC measurement path to inte
 460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CLOCK_SOURCE  ADC instance - Clock source
 465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV4        (ADC_CFGR2_CKMODE_1)                                  /*
 468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV2        (ADC_CFGR2_CKMODE_0)                                  /*
 469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_SYNC_PCLK_DIV1        (ADC_CFGR2_CKMODE_1 | ADC_CFGR2_CKMODE_0)             /*
 470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CLOCK_ASYNC                 ((uint32_t)0x00000000U)                               /*
ARM GAS  /tmp/ccBKcv9L.s 			page 31


 471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_RESOLUTION  ADC instance - Resolution
 476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_RESOLUTION_12B              ((uint32_t)0x00000000U)             /*!< ADC resolution 
 479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_RESOLUTION_10B              (                  ADC_CFGR1_RES_0) /*!< ADC resolution 
 480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_RESOLUTION_8B               (ADC_CFGR1_RES_1                  ) /*!< ADC resolution 
 481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_RESOLUTION_6B               (ADC_CFGR1_RES_1 | ADC_CFGR1_RES_0) /*!< ADC resolution 
 482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_DATA_ALIGN  ADC instance - Data alignment
 487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_RIGHT            ((uint32_t)0x00000000U)/*!< ADC conversion data alignmen
 490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_DATA_ALIGN_LEFT             (ADC_CFGR1_ALIGN)      /*!< ADC conversion data alignmen
 491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_LP_MODE  ADC instance - Low power mode
 496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_LP_MODE_NONE                ((uint32_t)0x00000000U)             /*!< No ADC low powe
 499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_LP_AUTOWAIT                 (ADC_CFGR1_WAIT)                    /*!< ADC low power m
 500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_LP_AUTOPOWEROFF             (ADC_CFGR1_AUTOFF)                  /*!< ADC low power m
 501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF    (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF) /*!< ADC low power m
 502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_GROUPS  ADC instance - Groups
 507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_GROUP_REGULAR               ((uint32_t)0x00000001U) /*!< ADC group regular (availabl
 510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL  ADC instance - Channel number
 515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_0                   (ADC_CHANNEL_0_NUMBER  | ADC_CHANNEL_0_BITFIELD ) /*!< A
 518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_1                   (ADC_CHANNEL_1_NUMBER  | ADC_CHANNEL_1_BITFIELD ) /*!< A
 519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_2                   (ADC_CHANNEL_2_NUMBER  | ADC_CHANNEL_2_BITFIELD ) /*!< A
 520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_3                   (ADC_CHANNEL_3_NUMBER  | ADC_CHANNEL_3_BITFIELD ) /*!< A
 521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_4                   (ADC_CHANNEL_4_NUMBER  | ADC_CHANNEL_4_BITFIELD ) /*!< A
 522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_5                   (ADC_CHANNEL_5_NUMBER  | ADC_CHANNEL_5_BITFIELD ) /*!< A
 523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_6                   (ADC_CHANNEL_6_NUMBER  | ADC_CHANNEL_6_BITFIELD ) /*!< A
 524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_7                   (ADC_CHANNEL_7_NUMBER  | ADC_CHANNEL_7_BITFIELD ) /*!< A
 525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_8                   (ADC_CHANNEL_8_NUMBER  | ADC_CHANNEL_8_BITFIELD ) /*!< A
 526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_9                   (ADC_CHANNEL_9_NUMBER  | ADC_CHANNEL_9_BITFIELD ) /*!< A
 527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_10                  (ADC_CHANNEL_10_NUMBER | ADC_CHANNEL_10_BITFIELD) /*!< A
ARM GAS  /tmp/ccBKcv9L.s 			page 32


 528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_11                  (ADC_CHANNEL_11_NUMBER | ADC_CHANNEL_11_BITFIELD) /*!< A
 529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_12                  (ADC_CHANNEL_12_NUMBER | ADC_CHANNEL_12_BITFIELD) /*!< A
 530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_13                  (ADC_CHANNEL_13_NUMBER | ADC_CHANNEL_13_BITFIELD) /*!< A
 531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_14                  (ADC_CHANNEL_14_NUMBER | ADC_CHANNEL_14_BITFIELD) /*!< A
 532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_15                  (ADC_CHANNEL_15_NUMBER | ADC_CHANNEL_15_BITFIELD) /*!< A
 533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_17                  (ADC_CHANNEL_17_NUMBER | ADC_CHANNEL_17_BITFIELD) /*!< A
 534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_18                  (ADC_CHANNEL_18_NUMBER | ADC_CHANNEL_18_BITFIELD) /*!< A
 535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_VREFINT             (LL_ADC_CHANNEL_17 | ADC_CHANNEL_ID_INTERNAL_CH)  /*!< A
 536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_TEMPSENSOR          (LL_ADC_CHANNEL_18 | ADC_CHANNEL_ID_INTERNAL_CH)  /*!< A
 537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if defined(ADC_CCR_VLCDEN)
 538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_16                  (ADC_CHANNEL_16_NUMBER | ADC_CHANNEL_16_BITFIELD) /*!< A
 539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_CHANNEL_VLCD                (LL_ADC_CHANNEL_16 | ADC_CHANNEL_ID_INTERNAL_CH)  /*!< A
 540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
 541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE  ADC group regular - Trigger source
 546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_SOFTWARE           ((uint32_t)0x00000000U)                                 
 549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM6_TRGO      (ADC_REG_TRIG_EXT_EDGE_DEFAULT)                         
 550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM21_CH2      (ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)    
 551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO      (ADC_CFGR1_EXTSEL_1 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)    
 552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH4       (ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_
 553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM22_TRGO     (ADC_CFGR1_EXTSEL_2 | ADC_REG_TRIG_EXT_EDGE_DEFAULT)    
 554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM2_CH3       (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_0 | ADC_REG_TRIG_
 555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO      (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_REG_TRIG_
 556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_EXTI_LINE11    (ADC_CFGR1_EXTSEL_2 | ADC_CFGR1_EXTSEL_1 | ADC_CFGR1_EXT
 557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE  ADC group regular - Trigger edge
 562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISING         (                    ADC_CFGR1_EXTEN_0) /*!< ADC group r
 565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_FALLING        (ADC_CFGR1_EXTEN_1                    ) /*!< ADC group r
 566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_TRIG_EXT_RISINGFALLING  (ADC_CFGR1_EXTEN_1 | ADC_CFGR1_EXTEN_0) /*!< ADC group r
 567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE  ADC group regular - Continuous mode
 572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** * @{
 573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** */
 574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_CONV_SINGLE             ((uint32_t)0x00000000U) /*!< ADC conversions are perform
 575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_CONV_CONTINUOUS         (ADC_CFGR1_CONT)        /*!< ADC conversions are perform
 576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_DMA_TRANSFER  ADC group regular - DMA transfer of ADC conversion data
 581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_NONE       ((uint32_t)0x00000000U)              /*!< ADC conversion
 584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_LIMITED    (                   ADC_CFGR1_DMAEN) /*!< ADC conversion
ARM GAS  /tmp/ccBKcv9L.s 			page 33


 585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_DMA_TRANSFER_UNLIMITED  (ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN) /*!< ADC conversion
 586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR  ADC group regular - Overrun behavior on conversion d
 591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** * @{
 592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** */
 593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_PRESERVED      ((uint32_t)0x00000000U)/*!< ADC group regular behavior i
 594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_OVR_DATA_OVERWRITTEN    (ADC_CFGR1_OVRMOD)     /*!< ADC group regular behavior i
 595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_SCAN_DIRECTION  ADC group regular - Sequencer scan direction
 600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_DIR_FORWARD    ((uint32_t)0x00000000U)/*!< ADC group regular sequencer 
 603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD   (ADC_CFGR1_SCANDIR)    /*!< ADC group regular sequencer 
 604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE  ADC group regular - Sequencer discontinuous mode
 609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_DISABLE     ((uint32_t)0x00000000U)                                 
 612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_REG_SEQ_DISCONT_1RANK       (ADC_CFGR1_DISCEN)                                      
 613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME  Channel - Sampling time
 618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_1CYCLE_5       ((uint32_t)0x00000000U)                               /*
 621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_3CYCLES_5      (ADC_SMPR_SMP_0)                                      /*
 622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_7CYCLES_5      (ADC_SMPR_SMP_1)                                      /*
 623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_12CYCLES_5     (ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0)                     /*
 624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_19CYCLES_5     (ADC_SMPR_SMP_2)                                      /*
 625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_39CYCLES_5     (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_0)                     /*
 626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_79CYCLES_5     (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1)                     /*
 627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_SAMPLINGTIME_160CYCLES_5    (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0)    /*
 628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number
 633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD1                        (ADC_AWD_CR1_CHANNEL_MASK  | ADC_AWD_CR1_REGOFFSET) /*!<
 636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_CHANNELS  Analog watchdog - Monitored channels
 641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
ARM GAS  /tmp/ccBKcv9L.s 			page 34


 642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_DISABLE                 ((uint32_t)0x00000000U)                                 
 644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_ALL_CHANNELS_REG        (                                                    ADC
 645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_0_REG           ((LL_ADC_CHANNEL_0  & ADC_CHANNEL_ID_MASK)         | ADC
 646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_1_REG           ((LL_ADC_CHANNEL_1  & ADC_CHANNEL_ID_MASK)         | ADC
 647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_2_REG           ((LL_ADC_CHANNEL_2  & ADC_CHANNEL_ID_MASK)         | ADC
 648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_3_REG           ((LL_ADC_CHANNEL_3  & ADC_CHANNEL_ID_MASK)         | ADC
 649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_4_REG           ((LL_ADC_CHANNEL_4  & ADC_CHANNEL_ID_MASK)         | ADC
 650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_5_REG           ((LL_ADC_CHANNEL_5  & ADC_CHANNEL_ID_MASK)         | ADC
 651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_6_REG           ((LL_ADC_CHANNEL_6  & ADC_CHANNEL_ID_MASK)         | ADC
 652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_7_REG           ((LL_ADC_CHANNEL_7  & ADC_CHANNEL_ID_MASK)         | ADC
 653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_8_REG           ((LL_ADC_CHANNEL_8  & ADC_CHANNEL_ID_MASK)         | ADC
 654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_9_REG           ((LL_ADC_CHANNEL_9  & ADC_CHANNEL_ID_MASK)         | ADC
 655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_10_REG          ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK)         | ADC
 656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_11_REG          ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK)         | ADC
 657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_12_REG          ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK)         | ADC
 658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_13_REG          ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK)         | ADC
 659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_14_REG          ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK)         | ADC
 660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_15_REG          ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK)         | ADC
 661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_17_REG          ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK)         | ADC
 662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_18_REG          ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK)         | ADC
 663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CH_VREFINT_REG          ((LL_ADC_CHANNEL_VREFINT    & ADC_CHANNEL_ID_MASK) | ADC
 664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CH_TEMPSENSOR_REG       ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) | ADC
 665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if defined(ADC_CCR_VLCDEN)
 666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CHANNEL_16_REG          ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK)         | ADC
 667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_CH_VLCD_REG             ((LL_ADC_CHANNEL_VLCD       & ADC_CHANNEL_ID_MASK) | ADC
 668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
 669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_AWD_THRESHOLDS  Analog watchdog - Thresholds
 674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_HIGH          (ADC_TR_HT            )     /*!< ADC analog watchdog thr
 677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLD_LOW           (            ADC_TR_LT)     /*!< ADC analog watchdog thr
 678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_AWD_THRESHOLDS_HIGH_LOW     (ADC_TR_HT | ADC_TR_LT)     /*!< ADC analog watchdog bot
 679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SCOPE  Oversampling - Oversampling scope
 684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_DISABLE                 ((uint32_t)0x00000000U)                               /*
 687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_GRP_REGULAR_CONTINUED   (                                    ADC_CFGR2_OVSE)  /*
 688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_DISCONT_MODE  Oversampling - Discontinuous mode
 693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_REG_CONT                ((uint32_t)0x00000000U)/*!< ADC oversampling discontinuo
 696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_REG_DISCONT             (ADC_CFGR2_TOVS)       /*!< ADC oversampling discontinuo
 697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
ARM GAS  /tmp/ccBKcv9L.s 			page 35


 699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_RATIO  Oversampling - Ratio
 702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_2                 ((uint32_t)0x00000000U)                                 
 705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_4                 (                                      ADC_CFGR2_OVSR_0)
 706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_8                 (                   ADC_CFGR2_OVSR_1                   )
 707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_16                (                   ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0)
 708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_32                (ADC_CFGR2_OVSR_2                                      )
 709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_64                (ADC_CFGR2_OVSR_2                    | ADC_CFGR2_OVSR_0)
 710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_128               (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1                   )
 711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_RATIO_256               (ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0)
 712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_OVS_SHIFT  Oversampling - Data shift
 717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_NONE              ((uint32_t)0x00000000U)                                 
 720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_1           (                                                       
 721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_2           (                                      ADC_CFGR2_OVSS_1 
 722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_3           (                                      ADC_CFGR2_OVSS_1 
 723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_4           (                   ADC_CFGR2_OVSS_2                    
 724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_5           (                   ADC_CFGR2_OVSS_2                    
 725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_6           (                   ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 
 726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_7           (                   ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 
 727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_OVS_SHIFT_RIGHT_8           (ADC_CFGR2_OVSS_3                                       
 728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EC_HW_DELAYS  Definitions of ADC hardware constraints delays
 734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Only ADC IP HW delays are defined in ADC LL driver driver,
 735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         not timeout values.
 736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         For details on delays values, refer to descriptions in source code
 737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         above each literal definition.
 738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   
 741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Note: Only ADC IP HW delays are defined in ADC LL driver driver,           */
 742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       not timeout values.                                                  */
 743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       Timeout values for ADC operations are dependent to device clock      */
 744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       configuration (system clock versus ADC clock),                       */
 745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       and therefore must be defined in user application.                   */
 746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       Indications for estimation of ADC timeout delays, for this           */
 747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       STM32 serie:                                                         */
 748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       - ADC calibration time: maximum delay is 83/fADC.                    */
 749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*         (refer to device datasheet, parameter "tCAL")                      */
 750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       - ADC enable time: maximum delay is 1 conversion cycle.              */
 751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*         (refer to device datasheet, parameter "tSTAB")                     */
 752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       - ADC disable time: maximum delay should be a few ADC clock cycles   */
 753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       - ADC stop conversion time: maximum delay should be a few ADC clock  */
 754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*         cycles                                                             */
 755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       - ADC conversion time: duration depending on ADC clock and ADC       */
ARM GAS  /tmp/ccBKcv9L.s 			page 36


 756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*         configuration.                                                     */
 757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*         (refer to device reference manual, section "Timing")               */
 758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Delay for ADC stabilization time (ADC voltage regulator start-up time)     */
 760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet,                     */
 761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* parameter "tUP_LDO").                                                      */
 762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ((uint32_t)  10U)  /*!< Delay for ADC stabilization tim
 763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Delay for internal voltage reference stabilization time.                   */
 765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Delay set to maximum value (refer to device datasheet,                     */
 766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* parameter "TADC_BUF").                                                     */
 767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Unit: us                                                                   */
 768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_DELAY_VREFINT_STAB_US       ((uint32_t)  10U)  /*!< Delay for internal voltage refer
 769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Delay for temperature sensor stabilization time.                           */
 771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Literal set to maximum value (refer to device datasheet,                   */
 772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* parameter "tSTART").                                                       */
 773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Unit: us                                                                   */
 774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_DELAY_TEMPSENSOR_STAB_US    ((uint32_t)  10U)  /*!< Delay for temperature sensor sta
 775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Delay required between ADC end of calibration and ADC enable.              */
 777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Note: On this STM32 serie, a minimum number of ADC clock cycles            */
 778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       are required between ADC end of calibration and ADC enable.          */
 779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       Wait time can be computed in user application by waiting for the     */
 780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       equivalent number of CPU cycles, by taking into account              */
 781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       ratio of CPU clock versus ADC clock prescalers.                      */
 782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Unit: ADC clock cycles.                                                    */
 783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ((uint32_t) 2U)  /*!< Delay required between ADC end o
 784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Exported macro ------------------------------------------------------------*/
 795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
 796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
 800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Write a value in ADC register
 805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __INSTANCE__ ADC Instance
 806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __REG__ Register to be written
 807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __VALUE__ Value to be written in the register
 808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
 809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE
 811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
ARM GAS  /tmp/ccBKcv9L.s 			page 37


 813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Read a value in ADC register
 814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __INSTANCE__ ADC Instance
 815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __REG__ Register to be read
 816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Register value
 817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
 819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
 821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
 824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
 825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to get ADC channel number in decimal format
 829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         from literals LL_ADC_CHANNEL_x.
 830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Example:
 831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4)
 832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           will return decimal number "4".
 833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   The input can be a value from functions where a channel
 834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         number is returned, either defined with number
 835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or with bitfield (only one bit must be set).
 836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __CHANNEL__ This parameter can be one of the following values:
 837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
 838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
 839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
 840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
 841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
 842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
 843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
 844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
 845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
 846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
 847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
 848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
 849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
 850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
 851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
 852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
 853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16         (1)
 854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
 855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
 856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT
 857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
 858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
 859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
 860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
 861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value between Min_Data=0 and Max_Data=18
 862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
 863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if defined(ADC_CCR_VLCDEN)
 864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__)                                                
 865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U)                                          
 866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ? (                                                                                            
 867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****        ((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS         
 868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       )                                                                                            
 869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       :                                                                                            
ARM GAS  /tmp/ccBKcv9L.s 			page 38


 870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       (                                                                                            
 871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****        (((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) :                         
 872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****         (                                                                                          
 873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****          (((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) :                       
 874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****           (                                                                                        
 875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            (((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) :                     
 876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****             (                                                                                      
 877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              (((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) :                   
 878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****               (                                                                                    
 879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                (((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) :                 
 880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                 (                                                                                  
 881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                  (((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) :               
 882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                   (                                                                                
 883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                    (((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) :             
 884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                     (                                                                              
 885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                      (((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) :           
 886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                       (                                                                            
 887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                        (((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) :         
 888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                         (                                                                          
 889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                          (((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) :       
 890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                           (                                                                        
 891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                            (((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) :  
 892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                             (                                                                      
 893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                              (((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) :
 894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                               (                                                                    
 895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                (((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U)
 896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                 (                                                                  
 897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                  (((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13
 898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                   (                                                                
 899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                    (((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (
 900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                     (                                                              
 901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                      (((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ?
 902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                       (                                                            
 903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                        (((__CHANNEL__) & ADC_CHSELR_CHSEL16) == ADC_CHSELR_CHSEL16)
 904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                         (                                                          
 905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                          (((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL1
 906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                           (                                                        
 907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                            (((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSE
 908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                             (0U)                                                   
 909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                           )                                                        
 910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                         )                                                          
 911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                       )                                                            
 912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                     )                                                              
 913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                   )                                                                
 914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                 )                                                                  
 915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                               )                                                                    
 916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                             )                                                                      
 917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                           )                                                                        
 918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                         )                                                                          
 919:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                       )                                                                            
 920:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                     )                                                                              
 921:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                   )                                                                                
 922:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                 )                                                                                  
 923:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****               )                                                                                    
 924:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****             )                                                                                      
 925:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****           )                                                                                        
 926:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****         )                                                                                          
ARM GAS  /tmp/ccBKcv9L.s 			page 39


 927:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       )                                                                                            
 928:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
 929:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #else
 930:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__)                                                
 931:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U)                                          
 932:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ? (                                                                                            
 933:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****        ((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS         
 934:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       )                                                                                            
 935:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       :                                                                                            
 936:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       (                                                                                            
 937:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****        (((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) :                         
 938:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****         (                                                                                          
 939:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****          (((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) :                       
 940:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****           (                                                                                        
 941:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            (((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) :                     
 942:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****             (                                                                                      
 943:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              (((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) :                   
 944:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****               (                                                                                    
 945:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                (((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) :                 
 946:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                 (                                                                                  
 947:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                  (((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) :               
 948:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                   (                                                                                
 949:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                    (((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) :             
 950:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                     (                                                                              
 951:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                      (((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) :           
 952:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                       (                                                                            
 953:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                        (((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) :         
 954:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                         (                                                                          
 955:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                          (((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) :       
 956:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                           (                                                                        
 957:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                            (((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) :  
 958:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                             (                                                                      
 959:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                              (((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) :
 960:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                               (                                                                    
 961:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                (((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U)
 962:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                 (                                                                  
 963:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                  (((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13
 964:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                   (                                                                
 965:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                    (((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (
 966:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                     (                                                              
 967:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                      (((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ?
 968:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                       (                                                            
 969:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                        (((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17)
 970:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                         (                                                          
 971:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                          (((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL1
 972:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                           (0U)                                                     
 973:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                         )                                                          
 974:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                       )                                                            
 975:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                     )                                                              
 976:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                   )                                                                
 977:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                 )                                                                  
 978:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                               )                                                                    
 979:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                             )                                                                      
 980:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                           )                                                                        
 981:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                         )                                                                          
 982:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                       )                                                                            
 983:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                     )                                                                              
ARM GAS  /tmp/ccBKcv9L.s 			page 40


 984:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                   )                                                                                
 985:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                 )                                                                                  
 986:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****               )                                                                                    
 987:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****             )                                                                                      
 988:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****           )                                                                                        
 989:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****         )                                                                                          
 990:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       )                                                                                            
 991:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
 992:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
 993:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
 994:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
 995:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x
 996:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         from number in decimal format.
 997:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Example:
 998:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           __LL_ADC_DECIMAL_NB_TO_CHANNEL(4)
 999:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           will return a data equivalent to "LL_ADC_CHANNEL_4".
1000:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __DECIMAL_NB__: Value between Min_Data=0 and Max_Data=18
1001:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
1002:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
1003:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
1004:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
1005:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
1006:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
1007:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
1008:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
1009:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
1010:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
1011:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
1012:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
1013:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
1014:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
1015:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
1016:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
1017:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
1018:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16         (1)
1019:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
1020:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
1021:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT       (2)
1022:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR    (2)
1023:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)(2)
1024:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
1025:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
1026:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (2) For ADC channel read back from ADC register,
1027:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             comparison with internal channel parameter to be done
1028:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
1029:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1030:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__)                         \
1031:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (                                                                            \
1032:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****    ((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) |                 \
1033:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****    (ADC_CHSELR_CHSEL0 << (__DECIMAL_NB__))                                     \
1034:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
1035:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1036:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1037:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to determine whether the selected channel
1038:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         corresponds to literal definitions of driver.
1039:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   The different literal definitions of ADC channels are:
1040:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - ADC internal channel:
ARM GAS  /tmp/ccBKcv9L.s 			page 41


1041:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...
1042:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - ADC external channel (channel connected to a GPIO pin):
1043:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...
1044:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   The channel parameter must be a value defined from literal
1045:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
1046:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         LL_ADC_CHANNEL_TEMPSENSOR, ...),
1047:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...),
1048:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         must not be a value from functions where a channel number is
1049:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         returned from ADC registers,
1050:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         because internal and external channels share the same channel
1051:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         number in ADC registers. The differentiation is made only with
1052:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         parameters definitions of driver.
1053:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __CHANNEL__ This parameter can be one of the following values:
1054:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
1055:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
1056:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
1057:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
1058:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
1059:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
1060:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
1061:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
1062:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
1063:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
1064:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
1065:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
1066:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
1067:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
1068:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
1069:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
1070:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16         (1)
1071:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
1072:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
1073:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT
1074:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
1075:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
1076:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
1077:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
1078:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channe
1079:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Value "1" if the channel corresponds to a parameter definition of a ADC internal channe
1080:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1081:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__)                              \
1082:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0U)
1083:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1084:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1085:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to convert a channel defined from parameter
1086:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
1087:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         LL_ADC_CHANNEL_TEMPSENSOR, ...),
1088:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         to its equivalent parameter definition of a ADC external channel
1089:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...).
1090:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   The channel parameter can be, additionally to a value
1091:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         defined from parameter definition of a ADC internal channel
1092:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...),
1093:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         a value defined from parameter definition of
1094:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
1095:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or a value from functions where a channel number is returned
1096:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         from ADC registers.
1097:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __CHANNEL__ This parameter can be one of the following values:
ARM GAS  /tmp/ccBKcv9L.s 			page 42


1098:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
1099:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
1100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
1101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
1102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
1103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
1104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
1105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
1106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
1107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
1108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
1109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
1110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
1111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
1112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
1113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
1114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16         (1)
1115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
1116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
1117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT
1118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
1119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
1120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
1121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
1122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
1123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
1124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
1125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
1126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
1127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
1128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
1129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
1130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
1131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
1132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
1133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
1134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
1135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
1136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
1137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
1138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
1139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16
1140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
1141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
1142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__)                     \
1144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK)
1145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to determine whether the internal channel
1148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         selected is available on the ADC instance selected.
1149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   The channel parameter must be a value defined from parameter
1150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
1151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         LL_ADC_CHANNEL_TEMPSENSOR, ...),
1152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         must not be a value defined from parameter definition of
1153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
1154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or a value from functions where a channel number is
ARM GAS  /tmp/ccBKcv9L.s 			page 43


1155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         returned from ADC registers,
1156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         because internal and external channels share the same channel
1157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         number in ADC registers. The differentiation is made only with
1158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         parameters definitions of driver.
1159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_INSTANCE__ ADC instance
1160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __CHANNEL__ This parameter can be one of the following values:
1161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT
1162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
1163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
1164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
1165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
1166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value "0" if the internal channel selected is not available on the ADC instance selecte
1168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Value "1" if the internal channel selected is available on the ADC instance selected.
1169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if defined(ADC_CCR_VLCDEN)
1171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__)  \
1172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (                                                                            \
1173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT)    ||                            \
1174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) ||                            \
1175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ((__CHANNEL__) == LL_ADC_CHANNEL_VLCD)                                     \
1176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
1177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #else
1178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__)  \
1179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (                                                                            \
1180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT)    ||                            \
1181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR)                               \
1182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
1183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
1184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to define ADC analog watchdog parameter:
1187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         define a single channel to monitor with analog watchdog
1188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         from sequencer channel and groups definition.
1189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
1190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example:
1191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           LL_ADC_SetAnalogWDMonitChannels(
1192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             ADC1, LL_ADC_AWD1,
1193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR))
1194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __CHANNEL__ This parameter can be one of the following values:
1195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
1196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
1197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
1198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
1199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
1200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
1201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
1202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
1203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
1204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
1205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
1206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
1207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
1208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
1209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
1210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
1211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16         (1)
ARM GAS  /tmp/ccBKcv9L.s 			page 44


1212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
1213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
1214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT       (2)
1215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR    (2)
1216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)(2)
1217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
1218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
1219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (2) For ADC channel read back from ADC register,
1220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             comparison with internal channel parameter to be done
1221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
1222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __GROUP__ This parameter can be one of the following values:
1223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_GROUP_REGULAR
1224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
1225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_DISABLE
1226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
1227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_0_REG 
1228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_1_REG 
1229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_2_REG 
1230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_3_REG 
1231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_4_REG 
1232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_5_REG 
1233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_6_REG 
1234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_7_REG 
1235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_8_REG 
1236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_9_REG 
1237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_10_REG
1238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_11_REG
1239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_12_REG
1240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_13_REG
1241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_14_REG
1242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_15_REG
1243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_16_REG          (1)
1244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_17_REG
1245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_18_REG
1246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CH_VREFINT_REG
1247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
1248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CH_VLCD_REG             (1)
1249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
1250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
1251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__)                                    
1253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (((__CHANNEL__) & ADC_CHANNEL_ID_MASK) | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL)
1254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to set the value of ADC analog watchdog threshold high
1257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or low in function of ADC resolution, when ADC resolution is
1258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         different of 12 bits.
1259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
1260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or @ref LL_ADC_SetAnalogWDThresholds().
1261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example, with a ADC resolution of 8 bits, to set the value of
1262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         analog watchdog threshold high (on 8 bits):
1263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           LL_ADC_SetAnalogWDThresholds
1264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *            (< ADCx param >,
1265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, <threshold_value_8
1266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *            );
1267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
1268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
ARM GAS  /tmp/ccBKcv9L.s 			page 45


1269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
1270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __AWD_THRESHOLD__ Value between Min_Data=0x000 and Max_Data=0xFFF
1273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
1274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD__) \
1276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ((__AWD_THRESHOLD__) << ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
1277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to get the value of ADC analog watchdog threshold high
1280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or low in function of ADC resolution, when ADC resolution is 
1281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         different of 12 bits.
1282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example, with a ADC resolution of 8 bits, to get the value of
1284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         analog watchdog threshold high (on 8 bits):
1285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION
1286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *            (LL_ADC_RESOLUTION_8B,
1287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             LL_ADC_GetAnalogWDThresholds(<ADCx param>, LL_ADC_AWD_THRESHOLD_HIGH)
1288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *            );
1289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
1290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
1292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF
1295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
1296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \
1298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
1299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to get the ADC analog watchdog threshold high
1302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or low from raw value containing both thresholds concatenated.
1303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   To be used with function @ref LL_ADC_GetAnalogWDThresholds().
1304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example, to get analog watchdog threshold high from the register raw value:
1305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, <raw_value_with_both
1306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __AWD_THRESHOLD_TYPE__ This parameter can be one of the following values:
1307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
1308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_THRESHOLD_LOW
1309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __AWD_THRESHOLDS__ Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
1310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
1311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(__AWD_THRESHOLD_TYPE__, __AWD_THRESHOLDS__) \
1313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (((__AWD_THRESHOLD_TYPE__) == LL_ADC_AWD_THRESHOLD_LOW)                                 \
1314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ? (                                                                                   \
1315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****        (__AWD_THRESHOLDS__) & LL_ADC_AWD_THRESHOLD_LOW                                    \
1316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       )                                                                                   \
1317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       :                                                                                   \
1318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       (                                                                                   \
1319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****        ((__AWD_THRESHOLDS__) >> ADC_TR_HT_BITOFFSET_POS) & LL_ADC_AWD_THRESHOLD_LOW       \
1320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       )                                                                                   \
1321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
1322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to select the ADC common instance
1325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         to which is belonging the selected ADC instance.
ARM GAS  /tmp/ccBKcv9L.s 			page 46


1326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   ADC common register instance can be used for:
1327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Set parameters common to several ADC instances
1328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Multimode (for devices with several ADC instances)
1329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to functions having argument "ADCxy_COMMON" as parameter.
1330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADCx__ ADC instance
1331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval ADC common register instance
1332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_COMMON_INSTANCE(__ADCx__)                                     \
1334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (ADC1_COMMON)
1335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to check if all ADC instances sharing the same
1338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC common instance are disabled.
1339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   This check is required by functions with setting conditioned to
1340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
1341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         All ADC instances of the ADC common group must be disabled.
1342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to functions having argument "ADCxy_COMMON" as parameter.
1343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On devices with only 1 ADC common instance, parameter of this macro
1344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is useless and can be ignored (parameter kept for compatibility
1345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         with devices featuring several ADC common instances).
1346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADCXY_COMMON__ ADC common instance
1347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
1348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value "0" if all ADC instances sharing the same ADC common instance
1349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         are disabled.
1350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Value "1" if at least one ADC instance sharing the same ADC common instance
1351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is enabled.
1352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__)              \
1354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   LL_ADC_IsEnabled(ADC1)
1355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to define the ADC conversion data full-scale digital
1358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         value corresponding to the selected ADC resolution.
1359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   ADC conversion data full-scale corresponds to voltage range
1360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         determined by analog voltage references Vref+ and Vref-
1361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (refer to reference manual).
1362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
1363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
1365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval ADC conversion data equivalent voltage value (unit: mVolt)
1368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)                             \
1370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (((uint32_t)0xFFFU) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)))
1371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to convert the ADC conversion data from
1374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         a resolution to another resolution.
1375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __DATA__ ADC conversion data to be converted 
1376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_RESOLUTION_CURRENT__ Resolution of to the data to be converted
1377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This parameter can be one of the following values:
1378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
1380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
ARM GAS  /tmp/ccBKcv9L.s 			page 47


1383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This parameter can be one of the following values:
1384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
1386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval ADC conversion data to the requested resolution
1389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__, __ADC_RESOLUTION_CURRENT__, __ADC_RESOLUTION_TAR
1391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (((__DATA__)                                                                 \
1392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     << ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)))   \
1393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****    >> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U))      \
1394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
1395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to calculate the voltage (unit: mVolt)
1398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         corresponding to a ADC conversion data (unit: digital value).
1399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Analog reference voltage (Vref+) must be either known from
1400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         user board environment or can be calculated using ADC measurement
1401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
1402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
1403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_DATA__ ADC conversion data (resolution 12 bits)
1404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                       (unit: digital value).
1405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
1406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
1408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval ADC conversion data equivalent voltage value (unit: mVolt)
1411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
1413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                       __ADC_DATA__,\
1414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                       __ADC_RESOLUTION__)                      \
1415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__)                                   \
1416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****    / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)                                \
1417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
1418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to calculate analog reference voltage (Vref+)
1421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (unit: mVolt) from ADC conversion data of internal voltage
1422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         reference VrefInt.
1423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Computation is using VrefInt calibration value
1424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         stored in system memory for each device during production.
1425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   This voltage depends on user board environment: voltage level
1426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         connected to pin Vref+.
1427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         On devices with small package, the pin Vref+ is not present
1428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and internally bonded to pin Vdda.
1429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, calibration data of internal voltage reference
1430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         VrefInt corresponds to a resolution of 12 bits,
1431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         this is the recommended ADC resolution to convert voltage of
1432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         internal voltage reference VrefInt.
1433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Otherwise, this macro performs the processing to scale
1434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC conversion data to 12 bits.
1435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __VREFINT_ADC_DATA__: ADC conversion data (resolution 12 bits)
1436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         of internal voltage reference VrefInt (unit: digital value).
1437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_RESOLUTION__ This parameter can be one of the following values:
1438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
ARM GAS  /tmp/ccBKcv9L.s 			page 48


1440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Analog reference voltage (unit: mV)
1443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
1445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                          __ADC_RESOLUTION__)                   \
1446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (((uint32_t)(*VREFINT_CAL_ADDR) * VREFINT_CAL_VREF)                          \
1447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     / __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__),                 \
1448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                        (__ADC_RESOLUTION__),                   \
1449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                        LL_ADC_RESOLUTION_12B)                  \
1450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
1451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Note: On device STM32L011, calibration parameter TS_CAL1 is not available. */
1453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       Therefore, helper macro __LL_ADC_CALC_TEMPERATURE() is not available.*/
1454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       Use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().        */
1455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if !defined(STM32L011xx)
1456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to calculate the temperature (unit: degree Celsius)
1458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         from ADC conversion data of internal temperature sensor.
1459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Computation is using temperature sensor calibration values
1460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         stored in system memory for each device during production.
1461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Calculation formula:
1462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           Temperature = ((TS_ADC_DATA - TS_CAL1)
1463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                           * (TS_CAL2_TEMP - TS_CAL1_TEMP))
1464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                         / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP
1465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           with TS_ADC_DATA = temperature sensor raw data measured by ADC
1466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                Avg_Slope = (TS_CAL2 - TS_CAL1)
1467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                            / (TS_CAL2_TEMP - TS_CAL1_TEMP)
1468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                TS_CAL1   = equivalent TS_ADC_DATA at temperature
1469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                            TEMP_DEGC_CAL1 (calibrated in factory)
1470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                TS_CAL2   = equivalent TS_ADC_DATA at temperature
1471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                            TEMP_DEGC_CAL2 (calibrated in factory)
1472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Caution: Calculation relevancy under reserve that calibration
1473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  parameters are correct (address and data).
1474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  To calculate temperature using temperature sensor
1475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  datasheet typical values (generic values less, therefore
1476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  less accurate than calibrated values),
1477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
1478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   As calculation input, the analog reference voltage (Vref+) must be
1479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         defined as it impacts the ADC LSB equivalent voltage.
1480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Analog reference voltage (Vref+) must be either known from
1481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         user board environment or can be calculated using ADC measurement
1482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
1483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, calibration data of temperature sensor
1484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         corresponds to a resolution of 12 bits,
1485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         this is the recommended ADC resolution to convert voltage of
1486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         temperature sensor.
1487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Otherwise, this macro performs the processing to scale
1488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC conversion data to 12 bits.
1489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __VREFANALOG_VOLTAGE__  Analog reference voltage (unit: mV)
1490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
1491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                 temperature sensor (unit: digital value).
1492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_RESOLUTION__      ADC resolution at which internal temperature
1493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                 sensor voltage has been measured.
1494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This parameter can be one of the following values:
1495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
ARM GAS  /tmp/ccBKcv9L.s 			page 49


1497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Temperature (unit: degree Celsius)
1500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\
1502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                   __TEMPSENSOR_ADC_DATA__,\
1503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                   __ADC_RESOLUTION__)                              \
1504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   (((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__),     \
1505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                                     (__ADC_RESOLUTION__),          \
1506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                                     LL_ADC_RESOLUTION_12B)         \
1507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                    * (__VREFANALOG_VOLTAGE__))                                     \
1508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                   / TEMPSENSOR_CAL_VREFANALOG)                                     \
1509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****         - (int32_t) *TEMPSENSOR_CAL1_ADDR)                                         \
1510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****      ) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP)                    \
1511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ) / (int32_t)((int32_t)*TEMPSENSOR_CAL2_ADDR - (int32_t)*TEMPSENSOR_CAL1_ADDR) \
1512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****    ) + TEMPSENSOR_CAL1_TEMP                                                        \
1513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
1514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
1515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Helper macro to calculate the temperature (unit: degree Celsius)
1518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         from ADC conversion data of internal temperature sensor.
1519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Computation is using temperature sensor typical values
1520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (refer to device datasheet).
1521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Calculation formula:
1522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV)
1523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                         / Avg_Slope + CALx_TEMP
1524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           with TS_ADC_DATA      = temperature sensor raw data measured by ADC
1525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                   (unit: digital value)
1526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                Avg_Slope        = temperature sensor slope
1527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                   (unit: uV/Degree Celsius)
1528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                TS_TYP_CALx_VOLT = temperature sensor digital value at
1529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                   temperature CALx_TEMP (unit: mV)
1530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Caution: Calculation relevancy under reserve the temperature sensor
1531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  of the current device has characteristics in line with
1532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  datasheet typical values.
1533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  If temperature sensor calibration values are available on
1534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
1535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  temperature calculation will be more accurate using
1536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                  helper macro @ref __LL_ADC_CALC_TEMPERATURE().
1537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   As calculation input, the analog reference voltage (Vref+) must be
1538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         defined as it impacts the ADC LSB equivalent voltage.
1539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Analog reference voltage (Vref+) must be either known from
1540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         user board environment or can be calculated using ADC measurement
1541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
1542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   ADC measurement data must correspond to a resolution of 12bits
1543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (full scale digital value 4095). If not the case, the data must be
1544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         preliminarily rescaled to an equivalent resolution of 12 bits.
1545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __TEMPSENSOR_TYP_AVGSLOPE__   Device datasheet data: Temperature sensor slope typical v
1546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                       On STM32L0, refer to device datasheet parameter "Avg_Slop
1547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __TEMPSENSOR_TYP_CALX_V__     Device datasheet data: Temperature sensor voltage typical
1548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                       On STM32L0, refer to device datasheet parameter "V130" (c
1549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __TEMPSENSOR_CALX_TEMP__      Device datasheet data: Temperature at which temperature s
1550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __VREFANALOG_VOLTAGE__        Analog voltage reference (Vref+) voltage (unit: mV)
1551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __TEMPSENSOR_ADC_DATA__       ADC conversion data of internal temperature sensor (unit:
1552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  __ADC_RESOLUTION__            ADC resolution at which internal temperature sensor volta
1553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This parameter can be one of the following values:
ARM GAS  /tmp/ccBKcv9L.s 			page 50


1554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
1556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Temperature (unit: degree Celsius)
1559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\
1561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              __TEMPSENSOR_TYP_CALX_V__,\
1562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              __TEMPSENSOR_CALX_TEMP__,\
1563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              __VREFANALOG_VOLTAGE__,\
1564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              __TEMPSENSOR_ADC_DATA__,\
1565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                                              __ADC_RESOLUTION__)               \
1566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   ((( (                                                                        \
1567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****        (int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__))       \
1568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                   / __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__))                \
1569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                  * 1000)                                                       \
1570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****        -                                                                       \
1571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****        (int32_t)(((__TEMPSENSOR_TYP_CALX_V__))                                 \
1572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                  * 1000)                                                       \
1573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****       )                                                                        \
1574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****     ) / (__TEMPSENSOR_TYP_AVGSLOPE__)                                          \
1575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****    ) + (__TEMPSENSOR_CALX_TEMP__)                                              \
1576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   )
1577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
1580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
1584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Exported functions --------------------------------------------------------*/
1588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
1589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
1590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EF_DMA_Management ADC DMA management
1593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
1594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /* Note: LL ADC functions to set DMA transfer are located into sections of    */
1596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       configuration of ADC instance, groups and multimode (if available):  */
1597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /*       @ref LL_ADC_REG_SetDMATransfer(), ...                                */
1598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Function to help to configure DMA transfer from ADC: retrieve the
1601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC register address from ADC instance and a list of ADC registers
1602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         intended to be used (most commonly) with DMA transfer.
1603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   These ADC registers are data registers:
1604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         when ADC conversion data is available in ADC data registers,
1605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC generates a DMA transfer request.
1606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   This macro is intended to be used with LL DMA driver, refer to
1607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         function "LL_DMA_ConfigAddresses()".
1608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example:
1609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           LL_DMA_ConfigAddresses(DMA1,
1610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                  LL_DMA_CHANNEL_1,
ARM GAS  /tmp/ccBKcv9L.s 			page 51


1611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                  LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
1612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                  (uint32_t)&< array or variable >,
1613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                                  LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
1614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   For devices with several ADC: in multimode, some devices
1615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         use a different data register outside of ADC instance scope
1616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (common data register). This macro manages this register difference,
1617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         only ADC instance has to be set as parameter.
1618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll DR       DATA           LL_ADC_DMA_GetRegAddr
1619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
1620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Register This parameter can be one of the following values:
1621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_DMA_REG_REGULAR_DATA
1622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval ADC register address
1623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
1625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Retrieve address of register DR */
1627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)&(ADCx->DR);
1628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
1632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to
1635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
1636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set parameter common to several ADC: Clock source and prescaler.
1640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
1641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
1642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         All ADC instances of the ADC common group must be disabled.
1643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This check can be done with function @ref LL_ADC_IsEnabled() for each
1644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC instance or by using helper macro helper macro
1645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
1646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CCR      PRESC          LL_ADC_SetCommonClock
1647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCxy_COMMON ADC common instance
1648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
1649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  CommonClock This parameter can be one of the following values:
1650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV1   (1)
1651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV2   (1)
1652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV4   (1)
1653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV6   (1)
1654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV8   (1)
1655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV10  (1)
1656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV12  (1)
1657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV16  (1)
1658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV32  (1)
1659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV64  (1)
1660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
1661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
1662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
1663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) ADC common clock asynchonous prescaler is applied to 
1664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             each ADC instance if the corresponding ADC instance clock  
1665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             is set to clock source asynchronous.
1666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             (refer to function @ref LL_ADC_SetClock() ).
1667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
ARM GAS  /tmp/ccBKcv9L.s 			page 52


1668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
1670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_PRESC, CommonClock);
1672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get parameter common to several ADC: Clock source and prescaler.
1676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CCR      PRESC          LL_ADC_GetCommonClock
1677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCxy_COMMON ADC common instance
1678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
1679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
1680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV1   (1)
1681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV2   (1)
1682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV4   (1)
1683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV6   (1)
1684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV8   (1)
1685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV10  (1)
1686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV12  (1)
1687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV16  (1)
1688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV32  (1)
1689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV64  (1)
1690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
1691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
1692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
1693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) ADC common clock asynchonous prescaler is applied to 
1694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             each ADC instance if the corresponding ADC instance clock  
1695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             is set to clock source asynchronous.
1696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             (refer to function @ref LL_ADC_SetClock() ).
1697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON)
1699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_PRESC));
1701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set parameter common to several ADC: Clock low frequency mode.
1705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to reference manual for alignments formats
1706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         dependencies to ADC resolutions.
1707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
1708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
1709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
1710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
1711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CCR      LFMEN          LL_ADC_SetCommonFrequencyMode
1712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCxy_COMMON ADC common instance
1713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
1714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Resolution This parameter can be one of the following values:
1715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
1716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
1717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
1718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Resol
1720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_LFMEN, Resolution);
1722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
ARM GAS  /tmp/ccBKcv9L.s 			page 53


1725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get parameter common to several ADC: Clock low frequency mode.
1726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to reference manual for alignments formats
1727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         dependencies to ADC resolutions.
1728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CCR      LFMEN          LL_ADC_GetCommonFrequencyMode
1729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCxy_COMMON ADC common instance
1730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
1731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
1732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
1733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
1734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON)
1736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_LFMEN));
1738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set parameter common to several ADC: measurement path to internal
1742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         channels (VrefInt, temperature sensor, ...).
1743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   One or several values can be selected.
1744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example: (LL_ADC_PATH_INTERNAL_VREFINT |
1745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                   LL_ADC_PATH_INTERNAL_TEMPSENSOR)
1746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Stabilization time of measurement path to internal channel:
1747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         After enabling internal paths, before starting ADC conversion,
1748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         a delay is required for internal voltage reference and
1749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         temperature sensor stabilization time.
1750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet.
1751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
1752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
1753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   ADC internal channel sampling time constraint:
1754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         For ADC conversion of internal channels,
1755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         a sampling time minimum value is required.
1756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet.
1757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
1758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
1759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         All ADC instances of the ADC common group must be disabled.
1760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This check can be done with function @ref LL_ADC_IsEnabled() for each
1761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC instance or by using helper macro helper macro
1762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
1763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CCR      VREFEN         LL_ADC_SetCommonPathInternalCh\n
1764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CCR      TSEN           LL_ADC_SetCommonPathInternalCh\n
1765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CCR      VLCDEN         LL_ADC_SetCommonPathInternalCh
1766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCxy_COMMON ADC common instance
1767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
1768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  PathInternal This parameter can be a combination of the following values:
1769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_PATH_INTERNAL_NONE
1770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
1771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
1772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
1773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
1774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, ST
1775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
1776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Path
1778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if defined (ADC_CCR_VLCDEN)
1780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VLCDEN, PathInternal);
1781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #else
ARM GAS  /tmp/ccBKcv9L.s 			page 54


1782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN, PathInternal);
1783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
1784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get parameter common to several ADC: measurement path to internal
1788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         channels (VrefInt, temperature sensor, ...).
1789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   One or several values can be selected.
1790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example: (LL_ADC_PATH_INTERNAL_VREFINT |
1791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *                   LL_ADC_PATH_INTERNAL_TEMPSENSOR)
1792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CCR      VREFEN         LL_ADC_GetCommonPathInternalCh\n
1793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CCR      TSEN           LL_ADC_GetCommonPathInternalCh\n
1794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CCR      VLCDEN         LL_ADC_GetCommonPathInternalCh
1795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCxy_COMMON ADC common instance
1796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMO
1797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be a combination of the following values:
1798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_PATH_INTERNAL_NONE
1799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
1800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
1801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
1802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
1803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, ST
1804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
1806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if defined(ADC_CCR_VLCDEN)
1808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VLCDEN));
1809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #else
1810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN));
1811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
1812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
1816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC ins
1819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
1820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC instance clock source and prescaler.
1824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
1825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
1826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled.
1827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR2    CKMODE         LL_ADC_SetClock
1828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
1829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ClockSource This parameter can be one of the following values:
1830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
1831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
1832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
1833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC (1)
1834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
1835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) Asynchronous clock prescaler can be configured using
1836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             function @ref LL_ADC_SetCommonClock().\n
1837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (2) Caution: This parameter has some clock ratio constraints:
1838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             This configuration must be enabled only if PCLK has a 50%
ARM GAS  /tmp/ccBKcv9L.s 			page 55


1839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             duty clock cycle (APB prescaler configured inside the RCC
1840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             must be bypassed and the system clock must by 50% duty
1841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             cycle).
1842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             Refer to reference manual.
1843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
1844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetClock(ADC_TypeDef *ADCx, uint32_t ClockSource)
1846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_CKMODE, ClockSource);
1848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC instance clock source and prescaler.
1852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR2    CKMODE         LL_ADC_GetClock
1853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
1854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
1855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
1856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
1857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
1858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CLOCK_ASYNC (1)
1859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
1860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) Asynchronous clock prescaler can be retrieved using
1861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             function @ref LL_ADC_GetCommonClock().\n
1862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (2) Caution: This parameter has some clock ratio constraints:
1863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             This configuration must be enabled only if PCLK has a 50%
1864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             duty clock cycle (APB prescaler configured inside the RCC
1865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             must be bypassed and the system clock must by 50% duty
1866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             cycle).
1867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             Refer to reference manual.
1868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetClock(ADC_TypeDef *ADCx)
1870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_CKMODE));
1872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC calibration factor in the mode single-ended
1876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or differential (for devices with differential mode available).
1877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   This function is intended to set calibration parameters
1878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         without having to perform a new calibration using
1879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @ref LL_ADC_StartCalibration().
1880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
1881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
1882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be enabled, without calibration on going, without conversion
1883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on going on group regular.
1884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CALFACT  CALFACT        LL_ADC_SetCalibrationFactor
1885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
1886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F
1887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
1888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t CalibrationFactor)
1890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CALFACT,
1892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CALFACT_CALFACT,
1893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              CalibrationFactor);
1894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
ARM GAS  /tmp/ccBKcv9L.s 			page 56


1896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC calibration factor in the mode single-ended
1898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or differential (for devices with differential mode available).
1899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Calibration factors are set by hardware after performing
1900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         a calibration run using function @ref LL_ADC_StartCalibration().
1901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CALFACT  CALFACT        LL_ADC_GetCalibrationFactor
1902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
1903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value between Min_Data=0x00 and Max_Data=0x7F
1904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx)
1906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT));
1908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC resolution.
1912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to reference manual for alignments formats
1913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         dependencies to ADC resolutions.
1914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
1915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
1916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
1917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
1918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    RES            LL_ADC_SetResolution
1919:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
1920:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Resolution This parameter can be one of the following values:
1921:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1922:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
1923:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1924:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1925:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
1926:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1927:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
1928:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1929:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution);
1930:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1931:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1932:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1933:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC resolution.
1934:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to reference manual for alignments formats
1935:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         dependencies to ADC resolutions.
1936:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    RES            LL_ADC_GetResolution
1937:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
1938:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
1939:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_12B
1940:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_10B
1941:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_8B
1942:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_RESOLUTION_6B
1943:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1944:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx)
1945:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1946:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES));
1947:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1948:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1949:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1950:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC conversion data alignment.
1951:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Refer to reference manual for alignments formats
1952:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         dependencies to ADC resolutions.
ARM GAS  /tmp/ccBKcv9L.s 			page 57


1953:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
1954:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
1955:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
1956:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
1957:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    ALIGN          LL_ADC_SetDataAlignment
1958:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
1959:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  DataAlignment This parameter can be one of the following values:
1960:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_DATA_ALIGN_RIGHT
1961:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_DATA_ALIGN_LEFT
1962:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
1963:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1964:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment)
1965:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1966:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment);
1967:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1968:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1969:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1970:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC conversion data alignment.
1971:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Refer to reference manual for alignments formats
1972:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         dependencies to ADC resolutions.
1973:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    ALIGN          LL_ADC_GetDataAlignment
1974:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
1975:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
1976:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_DATA_ALIGN_RIGHT
1977:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_DATA_ALIGN_LEFT
1978:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
1979:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx)
1980:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
1981:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN));
1982:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
1983:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
1984:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
1985:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC low power mode.
1986:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Description of ADC low power modes:
1987:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - ADC low power mode "auto wait": Dynamic low power mode,
1988:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           ADC conversions occurrences are limited to the minimum necessary
1989:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           in order to reduce power consumption.
1990:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           New ADC conversion starts only when the previous
1991:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           unitary conversion data (for ADC group regular)
1992:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           has been retrieved by user software.
1993:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           In the meantime, ADC remains idle: does not performs any
1994:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           other conversion.
1995:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           This mode allows to automatically adapt the ADC conversions
1996:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           triggers to the speed of the software that reads the data.
1997:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           Moreover, this avoids risk of overrun for low frequency
1998:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           applications.
1999:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           How to use this low power mode:
2000:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - Do not use with interruption or DMA since these modes
2001:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             have to clear immediately the EOC flag to free the
2002:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             IRQ vector sequencer.
2003:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - Do use with polling: 1. Start conversion,
2004:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             2. Later on, when conversion data is needed: poll for end of
2005:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             conversion  to ensure that conversion is completed and
2006:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             retrieve ADC conversion data. This will trig another
2007:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             ADC conversion start.
2008:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - ADC low power mode "auto power-off" (feature available on
2009:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
ARM GAS  /tmp/ccBKcv9L.s 			page 58


2010:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           the ADC automatically powers-off after a conversion and
2011:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           automatically wakes up when a new conversion is triggered
2012:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           (with startup time between trigger and start of sampling).
2013:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           This feature can be combined with low power mode "auto wait".
2014:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   With ADC low power mode "auto wait", the ADC conversion data read
2015:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is corresponding to previous ADC conversion start, independently
2016:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         of delay during which ADC was idle.
2017:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Therefore, the ADC conversion data may be outdated: does not
2018:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         correspond to the current voltage level on the selected
2019:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC channel.
2020:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2021:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2022:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2023:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2024:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    WAIT           LL_ADC_SetLowPowerMode\n
2025:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    AUTOFF         LL_ADC_SetLowPowerMode
2026:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2027:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  LowPowerMode This parameter can be one of the following values:
2028:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_LP_MODE_NONE
2029:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_LP_AUTOWAIT
2030:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_LP_AUTOPOWEROFF
2031:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
2032:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2033:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2034:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
2035:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2036:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode);
2037:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2038:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2039:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2040:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC low power mode:
2041:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Description of ADC low power modes:
2042:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - ADC low power mode "auto wait": Dynamic low power mode,
2043:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           ADC conversions occurrences are limited to the minimum necessary
2044:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           in order to reduce power consumption.
2045:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           New ADC conversion starts only when the previous
2046:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           unitary conversion data (for ADC group regular)
2047:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           has been retrieved by user software.
2048:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           In the meantime, ADC remains idle: does not performs any
2049:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           other conversion.
2050:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           This mode allows to automatically adapt the ADC conversions
2051:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           triggers to the speed of the software that reads the data.
2052:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           Moreover, this avoids risk of overrun for low frequency
2053:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           applications.
2054:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           How to use this low power mode:
2055:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - Do not use with interruption or DMA since these modes
2056:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             have to clear immediately the EOC flag to free the
2057:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             IRQ vector sequencer.
2058:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - Do use with polling: 1. Start conversion,
2059:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             2. Later on, when conversion data is needed: poll for end of
2060:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             conversion  to ensure that conversion is completed and
2061:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             retrieve ADC conversion data. This will trig another
2062:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             ADC conversion start.
2063:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - ADC low power mode "auto power-off" (feature available on
2064:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
2065:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           the ADC automatically powers-off after a conversion and
2066:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           automatically wakes up when a new conversion is triggered
ARM GAS  /tmp/ccBKcv9L.s 			page 59


2067:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           (with startup time between trigger and start of sampling).
2068:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           This feature can be combined with low power mode "auto wait".
2069:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   With ADC low power mode "auto wait", the ADC conversion data read
2070:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is corresponding to previous ADC conversion start, independently
2071:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         of delay during which ADC was idle.
2072:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Therefore, the ADC conversion data may be outdated: does not
2073:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         correspond to the current voltage level on the selected
2074:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC channel.
2075:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    WAIT           LL_ADC_GetLowPowerMode\n
2076:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    AUTOFF         LL_ADC_GetLowPowerMode
2077:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2078:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2079:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_LP_MODE_NONE
2080:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_LP_AUTOWAIT
2081:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_LP_AUTOPOWEROFF
2082:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
2083:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2084:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx)
2085:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2086:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF)));
2087:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2088:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2089:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2090:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set sampling time common to a group of channels.
2091:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Unit: ADC clock cycles.
2092:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, sampling time scope is on ADC instance:
2093:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Sampling time common to all channels.
2094:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (on some other STM32 families, sampling time is channel wise)
2095:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   In case of internal channel (VrefInt, TempSensor, ...) to be
2096:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         converted:
2097:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         sampling time constraints must be respected (sampling time can be
2098:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         adjusted in function of ADC clock frequency and sampling time
2099:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         setting).
2100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet for timings values (parameters TS_vrefint,
2101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         TS_temp, ...).
2102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Conversion time is the addition of sampling time and processing time.
2103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         On this STM32 serie, ADC processing time is:
2104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - 12.5 ADC clock cycles at ADC resolution 12 bits
2105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - 10.5 ADC clock cycles at ADC resolution 10 bits
2106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - 8.5 ADC clock cycles at ADC resolution 8 bits
2107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - 6.5 ADC clock cycles at ADC resolution 6 bits
2108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   In case of ADC conversion of internal channel (VrefInt,
2109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         temperature sensor, ...), a sampling time minimum value
2110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is required.
2111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet.
2112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll SMPR     SMP            LL_ADC_SetSamplingTimeCommonChannels
2117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  SamplingTime This parameter can be one of the following values:
2119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
2120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_3CYCLES_5
2121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
2122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
2123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_19CYCLES_5
ARM GAS  /tmp/ccBKcv9L.s 			page 60


2124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_39CYCLES_5
2125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_79CYCLES_5
2126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5
2127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetSamplingTimeCommonChannels(ADC_TypeDef *ADCx, uint32_t SamplingTime)
2130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->SMPR, ADC_SMPR_SMP, SamplingTime);
2132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get sampling time common to a group of channels.
2136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Unit: ADC clock cycles.
2137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, sampling time scope is on ADC instance:
2138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Sampling time common to all channels.
2139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (on some other STM32 families, sampling time is channel wise)
2140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Conversion time is the addition of sampling time and processing time.
2141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to reference manual for ADC processing time of
2142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         this STM32 serie.
2143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll SMPR     SMP            LL_ADC_GetSamplingTimeCommonChannels
2144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
2147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_3CYCLES_5
2148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
2149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
2150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_19CYCLES_5
2151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_39CYCLES_5
2152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_79CYCLES_5
2153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5
2154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonChannels(ADC_TypeDef *ADCx)
2156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->SMPR, ADC_SMPR_SMP));
2158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
2162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: gr
2165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
2166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC group regular conversion trigger source:
2170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         internal (SW start) or from external IP (timer event,
2171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         external interrupt line).
2172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting trigger source to external trigger
2173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         also set trigger polarity to rising edge 
2174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (default setting for compatibility with some ADC on other
2175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         STM32 families having this setting set by HW default value).
2176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         In case of need to modify trigger edge, use
2177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         function @ref LL_ADC_REG_SetTriggerEdge().
2178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Availability of parameters of trigger sources from timer 
2179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         depends on timers availability on the selected device.
2180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
ARM GAS  /tmp/ccBKcv9L.s 			page 61


2181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    EXTSEL         LL_ADC_REG_SetTriggerSource\n
2185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    EXTEN          LL_ADC_REG_SetTriggerSource
2186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  TriggerSource This parameter can be one of the following values:
2188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_SOFTWARE
2189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
2190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
2191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
2192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
2193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
2194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
2195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
2196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
2197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
2198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (*) value not defined in all devices
2199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
2202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource);
2204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular conversion trigger source:
2208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         internal (SW start) or from external IP (timer event,
2209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         external interrupt line).
2210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   To determine whether group regular trigger source is
2211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         internal (SW start) or external, without detail
2212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         of which peripheral is selected as external trigger,
2213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (equivalent to 
2214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)")
2215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         use function @ref LL_ADC_REG_IsTriggerSourceSWStart.
2216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Availability of parameters of trigger sources from timer 
2217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         depends on timers availability on the selected device.
2218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    EXTSEL         LL_ADC_REG_GetTriggerSource\n
2219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    EXTEN          LL_ADC_REG_GetTriggerSource
2220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_SOFTWARE
2223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
2224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
2225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
2226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
2227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
2228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
2229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
2230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
2231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *
2232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (*) value not defined in all devices
2233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx)
2235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   register uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN);
2237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   
ARM GAS  /tmp/ccBKcv9L.s 			page 62


2238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Value for shift of {0; 4; 8; 12} depending on value of bitfield          */
2239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* corresponding to ADC_CFGR1_EXTEN {0; 1; 2; 3}.                           */
2240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   register uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSE
2241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   
2242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Set bitfield corresponding to ADC_CFGR1_EXTEN and ADC_CFGR1_EXTSEL       */
2243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* to match with triggers literals definition.                              */
2244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return ((TriggerSource
2245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            & (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR1_EXTSEL)
2246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****           | ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN)
2247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****          );
2248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular conversion trigger source internal (SW start)
2252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****             or external.
2253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   In case of group regular trigger source set to external trigger,
2254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         to determine which peripheral is selected as external trigger,
2255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         use function @ref LL_ADC_REG_GetTriggerSource().
2256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    EXTEN          LL_ADC_REG_IsTriggerSourceSWStart
2257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value "0" if trigger source external trigger
2259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Value "1" if trigger source SW start.
2260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
2262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN));
2264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC group regular conversion trigger polarity.
2268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Applicable only for trigger source set to external trigger.
2269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    EXTEN          LL_ADC_REG_SetTriggerEdge
2274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ExternalTriggerEdge This parameter can be one of the following values:
2276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_RISING
2277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
2278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
2279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
2282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge);
2284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular conversion trigger polarity.
2288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Applicable only for trigger source set to external trigger.
2289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    EXTEN          LL_ADC_REG_GetTriggerEdge
2290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_RISING
2293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
2294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
ARM GAS  /tmp/ccBKcv9L.s 			page 63


2295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
2297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN));
2299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC group regular sequencer scan direction.
2304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On some other STM32 families, this setting is not available and
2305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         the default scan direction is forward.
2306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    SCANDIR        LL_ADC_REG_SetSequencerScanDirection
2311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ScanDirection This parameter can be one of the following values:
2313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
2314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
2315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerScanDirection(ADC_TypeDef *ADCx, uint32_t ScanDirection
2318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_SCANDIR, ScanDirection);
2320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular sequencer scan direction.
2324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On some other STM32 families, this setting is not available and
2325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         the default scan direction is forward.
2326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    SCANDIR        LL_ADC_REG_GetSequencerScanDirection
2327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
2330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
2331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerScanDirection(ADC_TypeDef *ADCx)
2333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_SCANDIR));
2335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC group regular sequencer discontinuous mode:
2339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         sequence subdivided and scan conversions interrupted every selected
2340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         number of ranks.
2341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   It is not possible to enable both ADC group regular 
2342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         continuous mode and sequencer discontinuous mode.
2343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    DISCEN         LL_ADC_REG_SetSequencerDiscont\n
2348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  SeqDiscont This parameter can be one of the following values:
2350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
2351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
ARM GAS  /tmp/ccBKcv9L.s 			page 64


2352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
2355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DISCEN, SeqDiscont);
2357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular sequencer discontinuous mode:
2361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         sequence subdivided and scan conversions interrupted every selected
2362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         number of ranks.
2363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    DISCEN         LL_ADC_REG_GetSequencerDiscont\n
2364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
2367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
2368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx)
2370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DISCEN));
2372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC group regular sequence: channel on rank corresponding to
2376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         channel number.
2377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   This function performs:
2378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Channels ordering into each rank of scan sequence:
2379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           rank of each channel is fixed by channel HW number
2380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
2381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Set channels selected by overwriting the current sequencer
2382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           configuration.
2383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, ADC group regular sequencer is
2384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         not fully configurable: sequencer length and each rank
2385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         affectation to a channel are fixed by channel HW number.
2386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Depending on devices and packages, some channels may not be available.
2387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet for channels availability.
2388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, to measure internal channels (VrefInt,
2389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         TempSensor, ...), measurement paths to internal channels must be
2390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         enabled separately.
2391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
2392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   One or several values can be selected.
2397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
2398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CHSELR   CHSEL0         LL_ADC_REG_SetSequencerChannels\n
2399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL1         LL_ADC_REG_SetSequencerChannels\n
2400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL2         LL_ADC_REG_SetSequencerChannels\n
2401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL3         LL_ADC_REG_SetSequencerChannels\n
2402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL4         LL_ADC_REG_SetSequencerChannels\n
2403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL5         LL_ADC_REG_SetSequencerChannels\n
2404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL6         LL_ADC_REG_SetSequencerChannels\n
2405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL7         LL_ADC_REG_SetSequencerChannels\n
2406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL8         LL_ADC_REG_SetSequencerChannels\n
2407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL9         LL_ADC_REG_SetSequencerChannels\n
2408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL10        LL_ADC_REG_SetSequencerChannels\n
ARM GAS  /tmp/ccBKcv9L.s 			page 65


2409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL11        LL_ADC_REG_SetSequencerChannels\n
2410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL12        LL_ADC_REG_SetSequencerChannels\n
2411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL13        LL_ADC_REG_SetSequencerChannels\n
2412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL14        LL_ADC_REG_SetSequencerChannels\n
2413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL15        LL_ADC_REG_SetSequencerChannels\n
2414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL16        LL_ADC_REG_SetSequencerChannels\n
2415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL17        LL_ADC_REG_SetSequencerChannels\n
2416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL18        LL_ADC_REG_SetSequencerChannels
2417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Channel This parameter can be a combination of the following values:
2419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
2420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
2421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
2422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
2423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
2424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
2425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
2426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
2427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
2428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
2429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
2430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
2431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
2432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
2433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
2434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
2435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16         (1)
2436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
2437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
2438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT
2439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
2440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
2441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
2442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
2443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerChannels(ADC_TypeDef *ADCx, uint32_t Channel)
2446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Parameter "Channel" is used with masks because containing                */
2448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* other bits reserved for other purpose.                                   */
2449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   WRITE_REG(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
2450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Add channel to ADC group regular sequence: channel on rank corresponding to
2454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         channel number.
2455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   This function performs:
2456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Channels ordering into each rank of scan sequence:
2457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           rank of each channel is fixed by channel HW number
2458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
2459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Set channels selected by adding them to the current sequencer
2460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           configuration.
2461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, ADC group regular sequencer is
2462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         not fully configurable: sequencer length and each rank
2463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         affectation to a channel are fixed by channel HW number.
2464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Depending on devices and packages, some channels may not be available.
2465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet for channels availability.
ARM GAS  /tmp/ccBKcv9L.s 			page 66


2466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, to measure internal channels (VrefInt,
2467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         TempSensor, ...), measurement paths to internal channels must be
2468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         enabled separately.
2469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
2470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   One or several values can be selected.
2475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
2476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CHSELR   CHSEL0         LL_ADC_REG_SetSequencerChAdd\n
2477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL1         LL_ADC_REG_SetSequencerChAdd\n
2478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL2         LL_ADC_REG_SetSequencerChAdd\n
2479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL3         LL_ADC_REG_SetSequencerChAdd\n
2480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL4         LL_ADC_REG_SetSequencerChAdd\n
2481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL5         LL_ADC_REG_SetSequencerChAdd\n
2482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL6         LL_ADC_REG_SetSequencerChAdd\n
2483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL7         LL_ADC_REG_SetSequencerChAdd\n
2484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL8         LL_ADC_REG_SetSequencerChAdd\n
2485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL9         LL_ADC_REG_SetSequencerChAdd\n
2486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL10        LL_ADC_REG_SetSequencerChAdd\n
2487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL11        LL_ADC_REG_SetSequencerChAdd\n
2488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL12        LL_ADC_REG_SetSequencerChAdd\n
2489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL13        LL_ADC_REG_SetSequencerChAdd\n
2490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL14        LL_ADC_REG_SetSequencerChAdd\n
2491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL15        LL_ADC_REG_SetSequencerChAdd\n
2492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL16        LL_ADC_REG_SetSequencerChAdd\n
2493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL17        LL_ADC_REG_SetSequencerChAdd\n
2494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL18        LL_ADC_REG_SetSequencerChAdd
2495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Channel This parameter can be a combination of the following values:
2497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
2498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
2499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
2500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
2501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
2502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
2503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
2504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
2505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
2506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
2507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
2508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
2509:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
2510:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
2511:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
2512:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
2513:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16         (1)
2514:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
2515:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
2516:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT
2517:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
2518:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
2519:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
2520:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
2521:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2522:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
ARM GAS  /tmp/ccBKcv9L.s 			page 67


2523:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerChAdd(ADC_TypeDef *ADCx, uint32_t Channel)
2524:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2525:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Parameter "Channel" is used with masks because containing                */
2526:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* other bits reserved for other purpose.                                   */
2527:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   SET_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
2528:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2529:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2530:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2531:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Remove channel to ADC group regular sequence: channel on rank corresponding to
2532:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         channel number.
2533:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   This function performs:
2534:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Channels ordering into each rank of scan sequence:
2535:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           rank of each channel is fixed by channel HW number
2536:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
2537:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Set channels selected by removing them to the current sequencer
2538:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           configuration.
2539:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, ADC group regular sequencer is
2540:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         not fully configurable: sequencer length and each rank
2541:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         affectation to a channel are fixed by channel HW number.
2542:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Depending on devices and packages, some channels may not be available.
2543:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet for channels availability.
2544:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, to measure internal channels (VrefInt,
2545:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         TempSensor, ...), measurement paths to internal channels must be
2546:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         enabled separately.
2547:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
2548:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2549:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2550:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2551:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2552:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   One or several values can be selected.
2553:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
2554:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CHSELR   CHSEL0         LL_ADC_REG_SetSequencerChRem\n
2555:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL1         LL_ADC_REG_SetSequencerChRem\n
2556:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL2         LL_ADC_REG_SetSequencerChRem\n
2557:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL3         LL_ADC_REG_SetSequencerChRem\n
2558:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL4         LL_ADC_REG_SetSequencerChRem\n
2559:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL5         LL_ADC_REG_SetSequencerChRem\n
2560:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL6         LL_ADC_REG_SetSequencerChRem\n
2561:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL7         LL_ADC_REG_SetSequencerChRem\n
2562:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL8         LL_ADC_REG_SetSequencerChRem\n
2563:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL9         LL_ADC_REG_SetSequencerChRem\n
2564:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL10        LL_ADC_REG_SetSequencerChRem\n
2565:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL11        LL_ADC_REG_SetSequencerChRem\n
2566:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL12        LL_ADC_REG_SetSequencerChRem\n
2567:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL13        LL_ADC_REG_SetSequencerChRem\n
2568:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL14        LL_ADC_REG_SetSequencerChRem\n
2569:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL15        LL_ADC_REG_SetSequencerChRem\n
2570:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL16        LL_ADC_REG_SetSequencerChRem\n
2571:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL17        LL_ADC_REG_SetSequencerChRem\n
2572:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL18        LL_ADC_REG_SetSequencerChRem
2573:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2574:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Channel This parameter can be a combination of the following values:
2575:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
2576:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
2577:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
2578:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
2579:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
ARM GAS  /tmp/ccBKcv9L.s 			page 68


2580:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
2581:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
2582:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
2583:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
2584:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
2585:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
2586:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
2587:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
2588:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
2589:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
2590:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
2591:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16         (1)
2592:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
2593:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
2594:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT
2595:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
2596:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
2597:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
2598:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
2599:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2600:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2601:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetSequencerChRem(ADC_TypeDef *ADCx, uint32_t Channel)
2602:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2603:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Parameter "Channel" is used with masks because containing                */
2604:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* other bits reserved for other purpose.                                   */
2605:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   CLEAR_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
2606:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2607:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2608:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2609:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular sequence: channel on rank corresponding to
2610:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         channel number.
2611:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   This function performs:
2612:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Channels order reading into each rank of scan sequence:
2613:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           rank of each channel is fixed by channel HW number
2614:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
2615:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, ADC group regular sequencer is
2616:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         not fully configurable: sequencer length and each rank
2617:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         affectation to a channel are fixed by channel HW number.
2618:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Depending on devices and packages, some channels may not be available.
2619:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet for channels availability.
2620:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, to measure internal channels (VrefInt,
2621:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         TempSensor, ...), measurement paths to internal channels must be
2622:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         enabled separately.
2623:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
2624:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2625:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2626:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2627:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2628:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   One or several values can be retrieved.
2629:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Example: (LL_ADC_CHANNEL_4 | LL_ADC_CHANNEL_12 | ...)
2630:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CHSELR   CHSEL0         LL_ADC_REG_GetSequencerChannels\n
2631:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL1         LL_ADC_REG_GetSequencerChannels\n
2632:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL2         LL_ADC_REG_GetSequencerChannels\n
2633:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL3         LL_ADC_REG_GetSequencerChannels\n
2634:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL4         LL_ADC_REG_GetSequencerChannels\n
2635:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL5         LL_ADC_REG_GetSequencerChannels\n
2636:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL6         LL_ADC_REG_GetSequencerChannels\n
ARM GAS  /tmp/ccBKcv9L.s 			page 69


2637:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL7         LL_ADC_REG_GetSequencerChannels\n
2638:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL8         LL_ADC_REG_GetSequencerChannels\n
2639:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL9         LL_ADC_REG_GetSequencerChannels\n
2640:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL10        LL_ADC_REG_GetSequencerChannels\n
2641:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL11        LL_ADC_REG_GetSequencerChannels\n
2642:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL12        LL_ADC_REG_GetSequencerChannels\n
2643:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL13        LL_ADC_REG_GetSequencerChannels\n
2644:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL14        LL_ADC_REG_GetSequencerChannels\n
2645:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL15        LL_ADC_REG_GetSequencerChannels\n
2646:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL16        LL_ADC_REG_GetSequencerChannels\n
2647:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL17        LL_ADC_REG_GetSequencerChannels\n
2648:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CHSELR   CHSEL18        LL_ADC_REG_GetSequencerChannels
2649:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2650:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be a combination of the following values:
2651:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_0
2652:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_1
2653:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_2
2654:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_3
2655:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_4
2656:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_5
2657:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_6
2658:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_7
2659:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_8
2660:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_9
2661:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_10
2662:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_11
2663:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_12
2664:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_13
2665:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_14
2666:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_15
2667:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_16         (1)
2668:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_17
2669:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_18
2670:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VREFINT
2671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
2672:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_CHANNEL_VLCD       (1)
2673:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
2674:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
2675:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2676:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerChannels(ADC_TypeDef *ADCx)
2677:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2678:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   register uint32_t ChannelsBitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL);
2679:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   
2680:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (   (((ChannelsBitfield & ADC_CHSELR_CHSEL0) >> ADC_CHSELR_CHSEL0_BITOFFSET_POS) * LL_ADC_
2681:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL1) >> ADC_CHSELR_CHSEL1_BITOFFSET_POS) * LL_ADC_
2682:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL2) >> ADC_CHSELR_CHSEL2_BITOFFSET_POS) * LL_ADC_
2683:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL3) >> ADC_CHSELR_CHSEL3_BITOFFSET_POS) * LL_ADC_
2684:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL4) >> ADC_CHSELR_CHSEL4_BITOFFSET_POS) * LL_ADC_
2685:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL5) >> ADC_CHSELR_CHSEL5_BITOFFSET_POS) * LL_ADC_
2686:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL6) >> ADC_CHSELR_CHSEL6_BITOFFSET_POS) * LL_ADC_
2687:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL7) >> ADC_CHSELR_CHSEL7_BITOFFSET_POS) * LL_ADC_
2688:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL8) >> ADC_CHSELR_CHSEL8_BITOFFSET_POS) * LL_ADC_
2689:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL9) >> ADC_CHSELR_CHSEL9_BITOFFSET_POS) * LL_ADC_
2690:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL10) >> ADC_CHSELR_CHSEL10_BITOFFSET_POS) * LL_AD
2691:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL11) >> ADC_CHSELR_CHSEL11_BITOFFSET_POS) * LL_AD
2692:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL12) >> ADC_CHSELR_CHSEL12_BITOFFSET_POS) * LL_AD
2693:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL13) >> ADC_CHSELR_CHSEL13_BITOFFSET_POS) * LL_AD
ARM GAS  /tmp/ccBKcv9L.s 			page 70


2694:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL14) >> ADC_CHSELR_CHSEL14_BITOFFSET_POS) * LL_AD
2695:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL15) >> ADC_CHSELR_CHSEL15_BITOFFSET_POS) * LL_AD
2696:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #if defined(ADC_CCR_VLCDEN)
2697:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL16) >> ADC_CHSELR_CHSEL16_BITOFFSET_POS) * LL_AD
2698:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** #endif
2699:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL17) >> ADC_CHSELR_CHSEL17_BITOFFSET_POS) * LL_AD
2700:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****            | (((ChannelsBitfield & ADC_CHSELR_CHSEL18) >> ADC_CHSELR_CHSEL18_BITOFFSET_POS) * LL_AD
2701:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****          );
2702:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2703:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2704:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC continuous conversion mode on ADC group regular.
2705:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Description of ADC continuous conversion mode:
2706:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - single mode: one conversion per trigger
2707:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - continuous mode: after the first trigger, following
2708:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           conversions launched successively automatically.
2709:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   It is not possible to enable both ADC group regular 
2710:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         continuous mode and sequencer discontinuous mode.
2711:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2712:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2713:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2714:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2715:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    CONT           LL_ADC_REG_SetContinuousMode
2716:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2717:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Continuous This parameter can be one of the following values:
2718:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_CONV_SINGLE
2719:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_CONV_CONTINUOUS
2720:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2721:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2722:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
2723:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2724:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CONT, Continuous);
2725:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2726:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2727:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2728:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC continuous conversion mode on ADC group regular.
2729:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Description of ADC continuous conversion mode:
2730:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - single mode: one conversion per trigger
2731:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - continuous mode: after the first trigger, following
2732:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           conversions launched successively automatically.
2733:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    CONT           LL_ADC_REG_GetContinuousMode
2734:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2735:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2736:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_CONV_SINGLE
2737:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_CONV_CONTINUOUS
2738:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2739:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx)
2740:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2741:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CONT));
2742:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2743:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2744:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2745:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC group regular conversion data transfer: no transfer or
2746:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         transfer by DMA, and DMA requests mode.
2747:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   If transfer by DMA selected, specifies the DMA requests
2748:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         mode:
2749:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Limited mode (One shot mode): DMA transfer requests are stopped
2750:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           when number of DMA data transfers (number of
ARM GAS  /tmp/ccBKcv9L.s 			page 71


2751:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           ADC conversions) is reached.
2752:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           This ADC mode is intended to be used with DMA mode non-circular.
2753:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Unlimited mode: DMA transfer requests are unlimited,
2754:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           whatever number of DMA data transfers (number of
2755:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           ADC conversions).
2756:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           This ADC mode is intended to be used with DMA mode circular.
2757:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   If ADC DMA requests mode is set to unlimited and DMA is set to
2758:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         mode non-circular:
2759:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         when DMA transfers size will be reached, DMA will stop transfers of
2760:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC conversions data ADC will raise an overrun error
2761:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *        (overrun flag and interruption if enabled).
2762:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   To configure DMA source address (peripheral address),
2763:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         use function @ref LL_ADC_DMA_GetRegAddr().
2764:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2765:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2766:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2767:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2768:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    DMAEN          LL_ADC_REG_SetDMATransfer\n
2769:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    DMACFG         LL_ADC_REG_SetDMATransfer
2770:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2771:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  DMATransfer This parameter can be one of the following values:
2772:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
2773:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
2774:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
2775:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2776:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2777:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer)
2778:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2779:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG, DMATransfer);
2780:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2781:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2782:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2783:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular conversion data transfer: no transfer or
2784:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         transfer by DMA, and DMA requests mode.
2785:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   If transfer by DMA selected, specifies the DMA requests
2786:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         mode:
2787:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Limited mode (One shot mode): DMA transfer requests are stopped
2788:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           when number of DMA data transfers (number of
2789:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           ADC conversions) is reached.
2790:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           This ADC mode is intended to be used with DMA mode non-circular.
2791:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - Unlimited mode: DMA transfer requests are unlimited,
2792:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           whatever number of DMA data transfers (number of
2793:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           ADC conversions).
2794:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           This ADC mode is intended to be used with DMA mode circular.
2795:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   If ADC DMA requests mode is set to unlimited and DMA is set to
2796:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         mode non-circular:
2797:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         when DMA transfers size will be reached, DMA will stop transfers of
2798:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC conversions data ADC will raise an overrun error
2799:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (overrun flag and interruption if enabled).
2800:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   To configure DMA source address (peripheral address),
2801:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         use function @ref LL_ADC_DMA_GetRegAddr().
2802:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    DMAEN          LL_ADC_REG_GetDMATransfer\n
2803:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    DMACFG         LL_ADC_REG_GetDMATransfer
2804:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2805:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2806:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
2807:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
ARM GAS  /tmp/ccBKcv9L.s 			page 72


2808:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
2809:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2810:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx)
2811:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2812:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG));
2813:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2814:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2815:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2816:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC group regular behavior in case of overrun:
2817:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         data preserved or overwritten.
2818:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Compatibility with devices without feature overrun:
2819:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         other devices without this feature have a behavior
2820:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         equivalent to data overwritten.
2821:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         The default setting of overrun is data preserved.
2822:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Therefore, for compatibility with all devices, parameter
2823:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         overrun should be set to data overwritten.
2824:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2825:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2826:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2827:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2828:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    OVRMOD         LL_ADC_REG_SetOverrun
2829:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2830:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Overrun This parameter can be one of the following values:
2831:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
2832:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
2833:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2834:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2835:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
2836:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2837:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_OVRMOD, Overrun);
2838:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2839:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2840:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2841:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular behavior in case of overrun:
2842:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         data preserved or overwritten.
2843:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    OVRMOD         LL_ADC_REG_GetOverrun
2844:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2845:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2846:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
2847:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
2848:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2849:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx)
2850:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2851:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_OVRMOD));
2852:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2853:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2854:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2855:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
2856:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2857:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2858:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2859:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: an
2860:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
2861:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2862:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2863:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2864:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC analog watchdog monitored channels:
ARM GAS  /tmp/ccBKcv9L.s 			page 73


2865:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         a single channel or all channels,
2866:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on ADC group regular.
2867:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Once monitored channels are selected, analog watchdog
2868:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is enabled.
2869:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   In case of need to define a single channel to monitor
2870:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         with analog watchdog from sequencer channel definition,
2871:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
2872:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, there is only 1 kind of analog watchdog
2873:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         instance:
2874:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - AWD standard (instance AWD1):
2875:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - channels monitored: can monitor 1 channel or all channels.
2876:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - groups monitored: ADC group regular.
2877:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - resolution: resolution is not limited (corresponds to
2878:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             ADC resolution configured).
2879:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2880:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2881:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2882:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2883:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    AWDCH          LL_ADC_SetAnalogWDMonitChannels\n
2884:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    AWDSGL         LL_ADC_SetAnalogWDMonitChannels\n
2885:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    AWDEN          LL_ADC_SetAnalogWDMonitChannels
2886:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2887:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  AWDChannelGroup This parameter can be one of the following values:
2888:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_DISABLE
2889:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
2890:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_0_REG 
2891:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_1_REG 
2892:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_2_REG 
2893:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_3_REG 
2894:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_4_REG 
2895:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_5_REG 
2896:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_6_REG 
2897:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_7_REG 
2898:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_8_REG 
2899:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_9_REG 
2900:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_10_REG
2901:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_11_REG
2902:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_12_REG
2903:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_13_REG
2904:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_14_REG
2905:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_15_REG
2906:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_16_REG          (1)
2907:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_17_REG
2908:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_18_REG
2909:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CH_VREFINT_REG
2910:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
2911:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CH_VLCD_REG             (1)
2912:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         
2913:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063x
2914:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
2915:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2916:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDChannelGroup)
2917:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2918:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR1,
2919:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              (ADC_CFGR1_AWDCH | ADC_CFGR1_AWDSGL | ADC_CFGR1_AWDEN),
2920:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              (AWDChannelGroup & ADC_AWD_CR_ALL_CHANNEL_MASK));
2921:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
ARM GAS  /tmp/ccBKcv9L.s 			page 74


2922:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2923:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2924:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC analog watchdog monitored channel.
2925:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Usage of the returned channel number:
2926:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - To reinject this channel into another function LL_ADC_xxx:
2927:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           the returned channel number is only partly formatted on definition
2928:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
2929:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           with parts of literals LL_ADC_CHANNEL_x or using
2930:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
2931:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           Then the selected literal LL_ADC_CHANNEL_x can be used
2932:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           as parameter for another function.
2933:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - To get the channel number in decimal format:
2934:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           process the returned value with the helper macro
2935:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
2936:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           Applicable only when the analog watchdog is set to monitor
2937:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           one channel.
2938:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, there is only 1 kind of analog watchdog
2939:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         instance:
2940:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - AWD standard (instance AWD1):
2941:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - channels monitored: can monitor 1 channel or all channels.
2942:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - groups monitored: ADC group regular.
2943:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - resolution: resolution is not limited (corresponds to
2944:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             ADC resolution configured).
2945:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
2946:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
2947:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
2948:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
2949:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR1    AWDCH          LL_ADC_GetAnalogWDMonitChannels\n
2950:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    AWDSGL         LL_ADC_GetAnalogWDMonitChannels\n
2951:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR1    AWDEN          LL_ADC_GetAnalogWDMonitChannels
2952:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
2953:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
2954:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_DISABLE
2955:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
2956:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_0_REG 
2957:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_1_REG 
2958:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_2_REG 
2959:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_3_REG 
2960:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_4_REG 
2961:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_5_REG 
2962:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_6_REG 
2963:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_7_REG 
2964:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_8_REG 
2965:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_9_REG 
2966:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_10_REG
2967:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_11_REG
2968:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_12_REG
2969:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_13_REG
2970:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_14_REG
2971:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_15_REG
2972:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_16_REG
2973:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_17_REG
2974:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_CHANNEL_18_REG
2975:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
2976:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx)
2977:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
2978:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   register uint32_t AWDChannelGroup = READ_BIT(ADCx->CFGR1, (ADC_CFGR1_AWDCH | ADC_CFGR1_AWDSGL | A
ARM GAS  /tmp/ccBKcv9L.s 			page 75


2979:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   
2980:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Note: Set variable according to channel definition including channel ID  */
2981:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       with bitfield.                                                     */
2982:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   register uint32_t AWDChannelSingle = ((AWDChannelGroup & ADC_CFGR1_AWDSGL) >> ADC_CFGR1_AWDSGL_BI
2983:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   register uint32_t AWDChannelBitField = (ADC_CHANNEL_0_BITFIELD << ((AWDChannelGroup & ADC_CHANNEL
2984:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   
2985:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (AWDChannelGroup | (AWDChannelBitField * AWDChannelSingle));
2986:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
2987:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
2988:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
2989:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC analog watchdog thresholds value of both thresholds
2990:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         high and low.
2991:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   If value of only one threshold high or low must be set,
2992:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         use function @ref LL_ADC_SetAnalogWDThresholds().
2993:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   In case of ADC resolution different of 12 bits,
2994:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         analog watchdog thresholds data require a specific shift.
2995:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
2996:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, there is only 1 kind of analog watchdog
2997:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         instance:
2998:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - AWD standard (instance AWD1):
2999:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - channels monitored: can monitor 1 channel or all channels.
3000:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - groups monitored: ADC group regular.
3001:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - resolution: resolution is not limited (corresponds to
3002:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             ADC resolution configured).
3003:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3004:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3005:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
3006:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
3007:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll TR       HT             LL_ADC_ConfigAnalogWDThresholds\n
3008:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         TR       LT             LL_ADC_ConfigAnalogWDThresholds
3009:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3010:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF
3011:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF
3012:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3013:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3014:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdHighVa
3015:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3016:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->TR,
3017:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_TR_HT | ADC_TR_LT,
3018:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              (AWDThresholdHighValue << ADC_TR_HT_BITOFFSET_POS) | AWDThresholdLowValue);
3019:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3020:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3021:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3022:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC analog watchdog threshold value of threshold
3023:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         high or low.
3024:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   If values of both thresholds high or low must be set,
3025:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         use function @ref LL_ADC_ConfigAnalogWDThresholds().
3026:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   In case of ADC resolution different of 12 bits,
3027:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         analog watchdog thresholds data require a specific shift.
3028:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
3029:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, there is only 1 kind of analog watchdog
3030:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         instance:
3031:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - AWD standard (instance AWD1):
3032:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - channels monitored: can monitor 1 channel or all channels.
3033:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - groups monitored: ADC group regular.
3034:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           - resolution: resolution is not limited (corresponds to
3035:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *             ADC resolution configured).
ARM GAS  /tmp/ccBKcv9L.s 			page 76


3036:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3037:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3038:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
3039:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
3040:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll TR       HT             LL_ADC_SetAnalogWDThresholds\n
3041:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         TR       LT             LL_ADC_SetAnalogWDThresholds
3042:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3043:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  AWDThresholdsHighLow This parameter can be one of the following values:
3044:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
3045:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_THRESHOLD_LOW
3046:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  AWDThresholdValue: Value between Min_Data=0x000 and Max_Data=0xFFF
3047:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3048:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3049:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow,
3050:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3051:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010"          */
3052:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold   */
3053:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* high is selected, then data is shifted to LSB. Else(threshold low),      */
3054:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* data is not shifted.                                                     */
3055:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->TR,
3056:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              AWDThresholdsHighLow,
3057:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              AWDThresholdValue << ((AWDThresholdsHighLow >> ADC_TR_HT_BITOFFSET_POS) & ((uint32_t)0
3058:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3059:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3060:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3061:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC analog watchdog threshold value of threshold high,
3062:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         threshold low or raw data with ADC thresholds high and low
3063:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         concatenated.
3064:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   If raw data with ADC thresholds high and low is retrieved,
3065:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         the data of each threshold high or low can be isolated
3066:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         using helper macro:
3067:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW().
3068:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   In case of ADC resolution different of 12 bits,
3069:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         analog watchdog thresholds data require a specific shift.
3070:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION().
3071:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll TR       HT             LL_ADC_GetAnalogWDThresholds\n
3072:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         TR       LT             LL_ADC_GetAnalogWDThresholds
3073:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3074:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  AWDThresholdsHighLow This parameter can be one of the following values:
3075:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
3076:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_THRESHOLD_LOW
3077:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW
3078:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Value between Min_Data=0x000 and Max_Data=0xFFF
3079:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** */
3080:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHigh
3081:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3082:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010"          */
3083:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold   */
3084:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* high is selected, then data is shifted to LSB. Else(threshold low or     */
3085:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* both thresholds), data is not shifted.                                   */
3086:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->TR,
3087:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                              (AWDThresholdsHighLow | ADC_TR_LT))
3088:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                     >> ((~AWDThresholdsHighLow) & ((uint32_t)0x00000010U))
3089:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****                    );
3090:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3091:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3092:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
ARM GAS  /tmp/ccBKcv9L.s 			page 77


3093:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
3094:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3095:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3096:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: over
3097:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
3098:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3099:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3100:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3101:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC oversampling scope.
3102:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3103:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3104:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
3105:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
3106:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR2    OVSE           LL_ADC_SetOverSamplingScope
3107:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3108:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  OvsScope This parameter can be one of the following values:
3109:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_DISABLE
3110:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
3111:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3112:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3113:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope)
3114:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3115:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSE, OvsScope);
3116:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3117:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3118:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3119:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC oversampling scope.
3120:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR2    OVSE           LL_ADC_GetOverSamplingScope
3121:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3122:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
3123:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_DISABLE
3124:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
3125:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3126:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx)
3127:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3128:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSE));
3129:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3130:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3131:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3132:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC oversampling discontinuous mode (triggered mode)
3133:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on the selected ADC group.
3134:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Number of oversampled conversions are done either in:
3135:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - continuous mode (all conversions of oversampling ratio
3136:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           are done from 1 trigger)
3137:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - discontinuous mode (each conversion of oversampling ratio
3138:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           needs a trigger)
3139:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3140:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3141:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
3142:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
3143:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR2    TOVS           LL_ADC_SetOverSamplingDiscont
3144:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3145:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  OverSamplingDiscont This parameter can be one of the following values:
3146:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_REG_CONT
3147:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_REG_DISCONT
3148:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3149:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
ARM GAS  /tmp/ccBKcv9L.s 			page 78


3150:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont)
3151:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3152:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TOVS, OverSamplingDiscont);
3153:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3154:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3155:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3156:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC oversampling discontinuous mode (triggered mode)
3157:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on the selected ADC group.
3158:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   Number of oversampled conversions are done either in:
3159:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - continuous mode (all conversions of oversampling ratio
3160:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           are done from 1 trigger)
3161:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - discontinuous mode (each conversion of oversampling ratio
3162:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           needs a trigger)
3163:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR2    TOVS           LL_ADC_GetOverSamplingDiscont
3164:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3165:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Returned value can be one of the following values:
3166:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_REG_CONT
3167:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_REG_DISCONT
3168:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3169:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx)
3170:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3171:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TOVS));
3172:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3173:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3174:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3175:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Set ADC oversampling
3176:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   This function set the 2 items of oversampling configuration:
3177:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - ratio
3178:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - shift
3179:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3180:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3181:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be disabled or enabled without conversion on going
3182:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
3183:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR2    OVSS           LL_ADC_ConfigOverSamplingRatioShift\n
3184:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         CFGR2    OVSR           LL_ADC_ConfigOverSamplingRatioShift
3185:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3186:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Ratio This parameter can be one of the following values:
3187:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_2
3188:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_4
3189:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_8
3190:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_16
3191:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_32
3192:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_64
3193:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_128
3194:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_256
3195:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  Shift This parameter can be one of the following values:
3196:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_NONE
3197:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
3198:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
3199:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
3200:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
3201:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
3202:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
3203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
3204:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
3205:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3206:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
ARM GAS  /tmp/ccBKcv9L.s 			page 79


3207:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_
3208:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3209:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS | ADC_CFGR2_OVSR), (Shift | Ratio));
3210:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3211:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3212:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3213:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC oversampling ratio
3214:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR2    OVSR           LL_ADC_GetOverSamplingRatio
3215:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3216:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Ratio This parameter can be one of the following values:
3217:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_2
3218:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_4
3219:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_8
3220:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_16
3221:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_32
3222:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_64
3223:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_128
3224:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_RATIO_256
3225:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** */
3226:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx)
3227:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3228:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR));
3229:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3230:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3231:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3232:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC oversampling shift
3233:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CFGR2    OVSS           LL_ADC_GetOverSamplingShift
3234:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3235:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval Shift This parameter can be one of the following values:
3236:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_NONE
3237:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
3238:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
3239:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
3240:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
3241:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
3242:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
3243:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
3244:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
3245:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** */
3246:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx)
3247:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3248:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS));
3249:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3250:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3251:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3252:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
3253:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3254:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3255:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
3256:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
3257:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3258:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3259:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3260:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Enable ADC instance internal voltage regulator.
3261:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, there are three possibilities to enable
3262:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         the voltage regulator:
3263:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - by enabling it manually
ARM GAS  /tmp/ccBKcv9L.s 			page 80


3264:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           using function @ref LL_ADC_EnableInternalRegulator().
3265:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - by launching a calibration
3266:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           using function @ref LL_ADC_StartCalibration().
3267:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - by enabling the ADC
3268:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           using function @ref LL_ADC_Enable().
3269:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, after ADC internal voltage regulator enable,
3270:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         a delay for ADC internal voltage regulator stabilization
3271:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is required before performing a ADC calibration or ADC enable.
3272:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet, parameter "tUP_LDO".
3273:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US.
3274:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3275:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3276:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be ADC disabled.
3277:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADVREGEN       LL_ADC_EnableInternalRegulator
3278:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3279:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3280:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3281:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
3282:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3283:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Note: Write register with some additional bits forced to state reset     */
3284:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       instead of modifying only the selected bit for this function,      */
3285:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       to not interfere with bits with HW property "rs".                  */
3286:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CR,
3287:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_BITS_PROPERTY_RS,
3288:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_ADVREGEN);
3289:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3290:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3291:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3292:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Disable ADC internal voltage regulator.
3293:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3294:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3295:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be ADC disabled.
3296:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADVREGEN       LL_ADC_DisableInternalRegulator
3297:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3298:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3299:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3300:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
3301:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3302:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN | ADC_CR_BITS_PROPERTY_RS));
3303:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3304:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3305:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3306:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get the selected ADC instance internal voltage regulator state.
3307:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADVREGEN       LL_ADC_IsInternalRegulatorEnabled
3308:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3309:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval 0: internal regulator is disabled, 1: internal regulator is enabled.
3310:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3311:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx)
3312:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3313:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN));
3314:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3315:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3316:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3317:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Enable the selected ADC instance.
3318:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, after ADC enable, a delay for 
3319:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC internal analog stabilization is required before performing a
3320:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC conversion start.
ARM GAS  /tmp/ccBKcv9L.s 			page 81


3321:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to device datasheet, parameter tSTAB.
3322:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
3323:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is enabled and when conversion clock is active.
3324:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (not only core clock: this ADC has a dual clock domain)
3325:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3326:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3327:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be ADC disabled and ADC internal voltage regulator enabled.
3328:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADEN           LL_ADC_Enable
3329:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3330:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3331:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3332:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
3333:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3334:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Note: Write register with some additional bits forced to state reset     */
3335:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       instead of modifying only the selected bit for this function,      */
3336:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       to not interfere with bits with HW property "rs".                  */
3337:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CR,
3338:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_BITS_PROPERTY_RS,
3339:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_ADEN);
3340:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3341:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3342:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3343:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Disable the selected ADC instance.
3344:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3345:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3346:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be not disabled. Must be enabled without conversion on going
3347:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         on group regular.
3348:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADDIS          LL_ADC_Disable
3349:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3350:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3351:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3352:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
3353:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3354:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Note: Write register with some additional bits forced to state reset     */
3355:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       instead of modifying only the selected bit for this function,      */
3356:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       to not interfere with bits with HW property "rs".                  */
3357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CR,
3358:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_BITS_PROPERTY_RS,
3359:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_ADDIS);
3360:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3361:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3362:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3363:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get the selected ADC instance enable state.
3364:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
3365:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         is enabled and when conversion clock is active.
3366:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (not only core clock: this ADC has a dual clock domain)
3367:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADEN           LL_ADC_IsEnabled
3368:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3369:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval 0: ADC is disabled, 1: ADC is enabled.
3370:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3371:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
3372:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN));
  87              		.loc 3 3373 0
  88 0000 064B     		ldr	r3, .L7
  89 0002 9B68     		ldr	r3, [r3, #8]
  90              	.LVL5:
ARM GAS  /tmp/ccBKcv9L.s 			page 82


  91              	.LBE35:
  92              	.LBE34:
 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ErrorStatus status = SUCCESS;
 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Check the parameters */
 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_COMMON_CLOCK(ADC_CommonInitStruct->CommonClock));
 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Note: Hardware constraint (refer to description of functions             */
 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /*       "LL_ADC_SetCommonXXX()":                                           */
 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /*       On this STM32 serie, setting of these features is conditioned to   */
 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /*       ADC state:                                                         */
 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /*       All ADC instances of the ADC common group must be disabled.        */
 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   if(__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(ADCxy_COMMON) == 0U)
  93              		.loc 1 251 0
  94 0004 DB07     		lsls	r3, r3, #31
  95 0006 07D4     		bmi	.L6
 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   {
 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Configuration of ADC hierarchical scope:                               */
 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*  - common to several ADC                                               */
 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    (all ADC instances belonging to the same ADC common instance)       */
 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    - Set ADC clock (conversion clock)                                  */
 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     LL_ADC_SetCommonClock(ADCxy_COMMON, ADC_CommonInitStruct->CommonClock);
  96              		.loc 1 257 0
  97 0008 0B68     		ldr	r3, [r1]
  98              	.LVL6:
  99              	.LBB36:
 100              	.LBB37:
1671:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
 101              		.loc 3 1671 0
 102 000a 0268     		ldr	r2, [r0]
 103 000c 0449     		ldr	r1, .L7+4
 104              	.LVL7:
 105 000e 0A40     		ands	r2, r1
 106 0010 1343     		orrs	r3, r2
 107              	.LVL8:
 108 0012 0360     		str	r3, [r0]
 109              	.LVL9:
 110              	.LBE37:
 111              	.LBE36:
 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ErrorStatus status = SUCCESS;
 112              		.loc 1 240 0
 113 0014 0120     		movs	r0, #1
 114              	.LVL10:
 115              	.L5:
 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   else
 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   {
 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Initialization error: One or several ADC instances belonging to        */
 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* the same ADC common instance are not disabled.                         */
 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     status = ERROR;
 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   return status;
 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** }
 116              		.loc 1 267 0
 117              		@ sp needed
ARM GAS  /tmp/ccBKcv9L.s 			page 83


 118 0016 7047     		bx	lr
 119              	.LVL11:
 120              	.L6:
 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 121              		.loc 1 263 0
 122 0018 0020     		movs	r0, #0
 123              	.LVL12:
 124 001a FCE7     		b	.L5
 125              	.L8:
 126              		.align	2
 127              	.L7:
 128 001c 00240140 		.word	1073816576
 129 0020 FFFFC3FF 		.word	-3932161
 130              		.cfi_endproc
 131              	.LFE171:
 133              		.section	.text.LL_ADC_CommonStructInit,"ax",%progbits
 134              		.align	1
 135              		.global	LL_ADC_CommonStructInit
 136              		.syntax unified
 137              		.code	16
 138              		.thumb_func
 139              		.fpu softvfp
 141              	LL_ADC_CommonStructInit:
 142              	.LFB172:
 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @brief  Set each @ref LL_ADC_CommonInitTypeDef field to default value.
 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *                              whose fields will be set to default values.
 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @retval None
 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** {
 143              		.loc 1 276 0
 144              		.cfi_startproc
 145              		@ args = 0, pretend = 0, frame = 0
 146              		@ frame_needed = 0, uses_anonymous_args = 0
 147              		@ link register save eliminated.
 148              	.LVL13:
 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Set ADC_CommonInitStruct fields to default values */
 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Set fields of ADC common */
 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* (all ADC instances belonging to the same ADC common instance) */
 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_CommonInitStruct->CommonClock = LL_ADC_CLOCK_ASYNC_DIV2;
 149              		.loc 1 280 0
 150 0000 8023     		movs	r3, #128
 151 0002 DB02     		lsls	r3, r3, #11
 152 0004 0360     		str	r3, [r0]
 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** }
 153              		.loc 1 282 0
 154              		@ sp needed
 155 0006 7047     		bx	lr
 156              		.cfi_endproc
 157              	.LFE172:
 159              		.section	.text.LL_ADC_DeInit,"ax",%progbits
 160              		.align	1
 161              		.global	LL_ADC_DeInit
ARM GAS  /tmp/ccBKcv9L.s 			page 84


 162              		.syntax unified
 163              		.code	16
 164              		.thumb_func
 165              		.fpu softvfp
 167              	LL_ADC_DeInit:
 168              	.LFB173:
 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @brief  De-initialize registers of the selected ADC instance
 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         to their default reset values.
 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   To reset all ADC instances quickly (perform a hard reset),
 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         use function @ref LL_ADC_CommonDeInit().
 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   If this functions returns error status, it means that ADC instance
 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         is in an unknown state.
 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         In this case, perform a hard reset using high level
 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         clock source RCC ADC reset.
 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         Refer to function @ref LL_ADC_CommonDeInit().
 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADCx ADC instance
 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @retval An ErrorStatus enumeration value:
 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - SUCCESS: ADC registers are de-initialized
 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - ERROR: ADC registers are not de-initialized
 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** {
 169              		.loc 1 300 0
 170              		.cfi_startproc
 171              		@ args = 0, pretend = 0, frame = 8
 172              		@ frame_needed = 0, uses_anonymous_args = 0
 173              	.LVL14:
 174 0000 10B5     		push	{r4, lr}
 175              	.LCFI0:
 176              		.cfi_def_cfa_offset 8
 177              		.cfi_offset 4, -8
 178              		.cfi_offset 14, -4
 179 0002 82B0     		sub	sp, sp, #8
 180              	.LCFI1:
 181              		.cfi_def_cfa_offset 16
 182 0004 0300     		movs	r3, r0
 183              	.LVL15:
 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ErrorStatus status = SUCCESS;
 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   __IO uint32_t timeout_cpu_cycles = 0U;
 184              		.loc 1 303 0
 185 0006 0022     		movs	r2, #0
 186 0008 0192     		str	r2, [sp, #4]
 187              	.LVL16:
 188              	.LBB38:
 189              	.LBB39:
 190              		.loc 3 3373 0
 191 000a 8268     		ldr	r2, [r0, #8]
 192              	.LVL17:
 193              	.LBE39:
 194              	.LBE38:
 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Check the parameters */
 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_ADC_ALL_INSTANCE(ADCx));
 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
ARM GAS  /tmp/ccBKcv9L.s 			page 85


 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Disable ADC instance if not already disabled.                            */
 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   if(LL_ADC_IsEnabled(ADCx) == 1U)
 195              		.loc 1 309 0
 196 000c D207     		lsls	r2, r2, #31
 197 000e 30D5     		bpl	.L20
 198              	.LVL18:
 199              	.LBB40:
 200              	.LBB41:
2203:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
 201              		.loc 3 2203 0
 202 0010 C268     		ldr	r2, [r0, #12]
 203 0012 2F49     		ldr	r1, .L25
 204 0014 0A40     		ands	r2, r1
 205 0016 C260     		str	r2, [r0, #12]
 206              	.LVL19:
 207              	.LBE41:
 208              	.LBE40:
 209              	.LBB42:
 210              	.LBB43:
3374:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3375:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3376:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3377:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get the selected ADC instance disable state.
3378:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADDIS          LL_ADC_IsDisableOngoing
3379:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3380:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval 0: no ADC disable command on going.
3381:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3382:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx)
3383:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS));
3385:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3386:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3387:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3388:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Start ADC calibration in the mode single-ended
3389:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         or differential (for devices with differential mode available).
3390:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, a minimum number of ADC clock cycles
3391:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         are required between ADC end of calibration and ADC enable.
3392:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES.
3393:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   In case of usage of ADC with DMA transfer:
3394:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         On this STM32 serie, ADC DMA transfer request should be disabled
3395:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         during calibration:
3396:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Calibration factor is available in data register
3397:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         and also transfered by DMA.
3398:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         To not insert ADC calibration factor among ADC conversion data
3399:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         in array variable, DMA transfer must be disabled during
3400:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         calibration.
3401:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         (DMA transfer setting backup and disable before calibration,
3402:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         DMA transfer setting restore after calibration.
3403:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         Refer to functions @ref LL_ADC_REG_GetDMATransfer(),
3404:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         @ref LL_ADC_REG_SetDMATransfer() ).
3405:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3406:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3407:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be ADC disabled.
3408:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADCAL          LL_ADC_StartCalibration
3409:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3410:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3411:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
ARM GAS  /tmp/ccBKcv9L.s 			page 86


3412:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx)
3413:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3414:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Note: Write register with some additional bits forced to state reset     */
3415:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       instead of modifying only the selected bit for this function,      */
3416:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       to not interfere with bits with HW property "rs".                  */
3417:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CR,
3418:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_BITS_PROPERTY_RS,
3419:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_ADCAL);
3420:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3421:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3422:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3423:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC calibration state.
3424:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADCAL          LL_ADC_IsCalibrationOnGoing
3425:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3426:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval 0: calibration complete, 1: calibration in progress.
3427:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3428:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx)
3429:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3430:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL));
3431:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3432:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3433:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3434:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @}
3435:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3436:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3437:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regu
3438:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @{
3439:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3440:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3441:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3442:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Start ADC group regular conversion.
3443:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, this function is relevant for both 
3444:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         internal trigger (SW start) and external trigger:
3445:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - If ADC trigger has been set to software start, ADC conversion
3446:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           starts immediately.
3447:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         - If ADC trigger has been set to external trigger, ADC conversion
3448:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           will start at next trigger event (on the selected trigger edge)
3449:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *           following the ADC start conversion command.
3450:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3451:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3452:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be enabled without conversion on going on group regular,
3453:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         without conversion stop command on going on group regular,
3454:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         without ADC disable command on going.
3455:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADSTART        LL_ADC_REG_StartConversion
3456:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3457:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3458:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3459:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
3460:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3461:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Note: Write register with some additional bits forced to state reset     */
3462:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       instead of modifying only the selected bit for this function,      */
3463:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       to not interfere with bits with HW property "rs".                  */
3464:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CR,
3465:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_BITS_PROPERTY_RS,
3466:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_ADSTART);
3467:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3468:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
ARM GAS  /tmp/ccBKcv9L.s 			page 87


3469:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3470:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Stop ADC group regular conversion.
3471:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @note   On this STM32 serie, setting of this feature is conditioned to
3472:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC state:
3473:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         ADC must be enabled with conversion on going on group regular,
3474:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   *         without ADC disable command on going.
3475:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADSTP          LL_ADC_REG_StopConversion
3476:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3477:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval None
3478:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3479:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
3480:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3481:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /* Note: Write register with some additional bits forced to state reset     */
3482:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       instead of modifying only the selected bit for this function,      */
3483:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   /*       to not interfere with bits with HW property "rs".                  */
3484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   MODIFY_REG(ADCx->CR,
3485:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_BITS_PROPERTY_RS,
3486:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_ADSTP);
3487:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3488:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3489:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3490:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular conversion state.
3491:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADSTART        LL_ADC_REG_IsConversionOngoing
3492:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3493:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval 0: no conversion is on going on ADC group regular.
3494:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3495:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx)
3496:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3497:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART));
 211              		.loc 3 3497 0
 212 0018 8268     		ldr	r2, [r0, #8]
 213              	.LVL20:
 214              	.LBE43:
 215              	.LBE42:
 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   {
 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Set ADC group regular trigger source to SW start to ensure to not      */
 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* have an external trigger event occurring during the conversion stop    */
 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* ADC disable process.                                                   */
 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     LL_ADC_REG_SetTriggerSource(ADCx, LL_ADC_REG_TRIG_SOFTWARE);
 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Stop potential ADC conversion on going on ADC group regular.           */
 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     if(LL_ADC_REG_IsConversionOngoing(ADCx) != 0U)
 216              		.loc 1 317 0
 217 001a 5207     		lsls	r2, r2, #29
 218 001c 08D5     		bpl	.L12
 219              	.LVL21:
 220              	.LBB44:
 221              	.LBB45:
3498:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
3499:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** 
3500:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** /**
3501:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @brief  Get ADC group regular command of conversion stop state
3502:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @rmtoll CR       ADSTP          LL_ADC_REG_IsStopConversionOngoing
3503:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @param  ADCx ADC instance
3504:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   * @retval 0: no command of conversion stop is on going on ADC group regular.
3505:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   */
3506:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** __STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx)
ARM GAS  /tmp/ccBKcv9L.s 			page 88


3507:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** {
3508:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****   return (READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP));
 222              		.loc 3 3508 0
 223 001e 8268     		ldr	r2, [r0, #8]
 224              	.LVL22:
 225              	.LBE45:
 226              	.LBE44:
 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     {
 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****       if(LL_ADC_REG_IsStopConversionOngoing(ADCx) == 0U)
 227              		.loc 1 319 0
 228 0020 D206     		lsls	r2, r2, #27
 229 0022 05D4     		bmi	.L12
 230              	.LVL23:
 231              	.LBB46:
 232              	.LBB47:
3484:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_BITS_PROPERTY_RS,
 233              		.loc 3 3484 0
 234 0024 8268     		ldr	r2, [r0, #8]
 235 0026 2B49     		ldr	r1, .L25+4
 236 0028 0A40     		ands	r2, r1
 237 002a 1021     		movs	r1, #16
 238 002c 0A43     		orrs	r2, r1
 239 002e 8260     		str	r2, [r0, #8]
 240              	.LVL24:
 241              	.L12:
 242              	.LBE47:
 243              	.LBE46:
 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****       {
 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****         LL_ADC_REG_StopConversion(ADCx);
 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****       }
 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     }
 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Wait for ADC conversions are effectively stopped                       */
 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     timeout_cpu_cycles = ADC_TIMEOUT_STOP_CONVERSION_CPU_CYCLES;
 244              		.loc 1 326 0
 245 0030 8022     		movs	r2, #128
 246 0032 1202     		lsls	r2, r2, #8
 247 0034 0192     		str	r2, [sp, #4]
 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 248              		.loc 1 301 0
 249 0036 0120     		movs	r0, #1
 250              	.LVL25:
 251              	.L13:
 252              	.LBB48:
 253              	.LBB49:
 254              		.loc 3 3508 0
 255 0038 9A68     		ldr	r2, [r3, #8]
 256              	.LVL26:
 257              	.LBE49:
 258              	.LBE48:
 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     while (LL_ADC_REG_IsStopConversionOngoing(ADCx) == 1U)
 259              		.loc 1 327 0
 260 003a D206     		lsls	r2, r2, #27
 261 003c 06D5     		bpl	.L24
 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     {
 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****       if(timeout_cpu_cycles-- == 0U)
 262              		.loc 1 329 0
ARM GAS  /tmp/ccBKcv9L.s 			page 89


 263 003e 019A     		ldr	r2, [sp, #4]
 264 0040 511E     		subs	r1, r2, #1
 265 0042 0191     		str	r1, [sp, #4]
 266 0044 002A     		cmp	r2, #0
 267 0046 F7D1     		bne	.L13
 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****       {
 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****         /* Time-out error */
 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****         status = ERROR;
 268              		.loc 1 332 0
 269 0048 0020     		movs	r0, #0
 270              	.LVL27:
 271 004a F5E7     		b	.L13
 272              	.LVL28:
 273              	.L24:
 274              	.LBB50:
 275              	.LBB51:
3357:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h ****              ADC_CR_BITS_PROPERTY_RS,
 276              		.loc 3 3357 0
 277 004c 9A68     		ldr	r2, [r3, #8]
 278 004e 2149     		ldr	r1, .L25+4
 279 0050 0A40     		ands	r2, r1
 280 0052 0221     		movs	r1, #2
 281 0054 0A43     		orrs	r2, r1
 282 0056 9A60     		str	r2, [r3, #8]
 283              	.LVL29:
 284              	.LBE51:
 285              	.LBE50:
 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****       }
 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     }
 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Disable the ADC instance */
 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     LL_ADC_Disable(ADCx);
 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Wait for ADC instance is effectively disabled */
 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     timeout_cpu_cycles = ADC_TIMEOUT_DISABLE_CPU_CYCLES;
 286              		.loc 1 340 0
 287 0058 8022     		movs	r2, #128
 288 005a 1202     		lsls	r2, r2, #8
 289 005c 0192     		str	r2, [sp, #4]
 290              	.LVL30:
 291              	.L16:
 292              	.LBB52:
 293              	.LBB53:
3384:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
 294              		.loc 3 3384 0
 295 005e 9A68     		ldr	r2, [r3, #8]
 296              	.LVL31:
 297              	.LBE53:
 298              	.LBE52:
 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     while (LL_ADC_IsDisableOngoing(ADCx) == 1U)
 299              		.loc 1 341 0
 300 0060 9207     		lsls	r2, r2, #30
 301 0062 07D5     		bpl	.L11
 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     {
 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****       if(timeout_cpu_cycles-- == 0U)
 302              		.loc 1 343 0
 303 0064 019A     		ldr	r2, [sp, #4]
ARM GAS  /tmp/ccBKcv9L.s 			page 90


 304 0066 511E     		subs	r1, r2, #1
 305 0068 0191     		str	r1, [sp, #4]
 306 006a 002A     		cmp	r2, #0
 307 006c F7D1     		bne	.L16
 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****       {
 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****         /* Time-out error */
 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****         status = ERROR;
 308              		.loc 1 346 0
 309 006e 0020     		movs	r0, #0
 310              	.LVL32:
 311 0070 F5E7     		b	.L16
 312              	.LVL33:
 313              	.L20:
 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 314              		.loc 1 301 0
 315 0072 0120     		movs	r0, #1
 316              	.LVL34:
 317              	.L11:
 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****       }
 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     }
 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Check whether ADC state is compliant with expected state */
 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   if(READ_BIT(ADCx->CR,
 318              		.loc 1 352 0
 319 0074 9A68     		ldr	r2, [r3, #8]
 320 0076 1721     		movs	r1, #23
 321 0078 1142     		tst	r1, r2
 322 007a 27D1     		bne	.L23
 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               (  ADC_CR_ADSTP | ADC_CR_ADSTART
 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CR_ADDIS | ADC_CR_ADEN   )
 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              )
 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****      == 0U)
 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   {
 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* ========== Reset ADC registers ========== */
 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register IER */
 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     CLEAR_BIT(ADCx->IER,
 323              		.loc 1 360 0
 324 007c 5968     		ldr	r1, [r3, #4]
 325 007e 9F24     		movs	r4, #159
 326 0080 A143     		bics	r1, r4
 327 0082 5960     		str	r1, [r3, #4]
 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               (  LL_ADC_IT_ADRDY
 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | LL_ADC_IT_EOC
 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | LL_ADC_IT_EOS
 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | LL_ADC_IT_OVR
 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | LL_ADC_IT_EOSMP
 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | LL_ADC_IT_AWD1 )
 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              );
 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register ISR */
 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     SET_BIT(ADCx->ISR,
 328              		.loc 1 370 0
 329 0084 1A68     		ldr	r2, [r3]
 330 0086 2243     		orrs	r2, r4
 331 0088 1A60     		str	r2, [r3]
 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****             (  LL_ADC_FLAG_ADRDY
ARM GAS  /tmp/ccBKcv9L.s 			page 91


 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              | LL_ADC_FLAG_EOC
 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              | LL_ADC_FLAG_EOS
 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              | LL_ADC_FLAG_OVR
 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              | LL_ADC_FLAG_EOSMP
 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              | LL_ADC_FLAG_AWD1 )
 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****            );
 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register CR */
 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode     */
 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* "read-set": no direct reset applicable.                                */
 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     CLEAR_BIT(ADCx->CR, ADC_CR_ADVREGEN);
 332              		.loc 1 382 0
 333 008a 9A68     		ldr	r2, [r3, #8]
 334 008c 1249     		ldr	r1, .L25+8
 335 008e 0A40     		ands	r2, r1
 336 0090 9A60     		str	r2, [r3, #8]
 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register CFGR1 */
 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     CLEAR_BIT(ADCx->CFGR1,
 337              		.loc 1 385 0
 338 0092 DA68     		ldr	r2, [r3, #12]
 339 0094 1149     		ldr	r1, .L25+12
 340 0096 0A40     		ands	r2, r1
 341 0098 DA60     		str	r2, [r3, #12]
 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               (  ADC_CFGR1_AWDCH   | ADC_CFGR1_AWDEN  | ADC_CFGR1_AWDSGL  | ADC_CFGR1_DISCEN
 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_AUTOFF  | ADC_CFGR1_WAIT   | ADC_CFGR1_CONT    | ADC_CFGR1_OVRMOD
 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_EXTEN   | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN   | ADC_CFGR1_RES
 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN                     )
 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              );
 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register CFGR2 */
 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Note: Update of ADC clock mode is conditioned to ADC state disabled:   */
 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*       already done above.                                              */
 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     CLEAR_BIT(ADCx->CFGR2,
 342              		.loc 1 395 0
 343 009a 1A69     		ldr	r2, [r3, #16]
 344 009c 1049     		ldr	r1, .L25+16
 345 009e 0A40     		ands	r2, r1
 346 00a0 1A61     		str	r2, [r3, #16]
 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               (  ADC_CFGR2_CKMODE
 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR2_TOVS   | ADC_CFGR2_OVSS  | ADC_CFGR2_OVSR
 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR2_OVSE   | ADC_CFGR2_CKMODE                )
 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              );
 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register SMPR */
 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     CLEAR_BIT(ADCx->SMPR, ADC_SMPR_SMP);
 347              		.loc 1 402 0
 348 00a2 5A69     		ldr	r2, [r3, #20]
 349 00a4 0721     		movs	r1, #7
 350 00a6 8A43     		bics	r2, r1
 351 00a8 5A61     		str	r2, [r3, #20]
 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register TR */
 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     MODIFY_REG(ADCx->TR, ADC_TR_HT | ADC_TR_LT, ADC_TR_HT);
 352              		.loc 1 405 0
 353 00aa 1A6A     		ldr	r2, [r3, #32]
 354 00ac 0D49     		ldr	r1, .L25+20
ARM GAS  /tmp/ccBKcv9L.s 			page 92


 355 00ae 1140     		ands	r1, r2
 356 00b0 0D4A     		ldr	r2, .L25+24
 357 00b2 0A43     		orrs	r2, r1
 358 00b4 1A62     		str	r2, [r3, #32]
 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register CHSELR */
 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #if defined(ADC_CCR_VLCDEN)
 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     CLEAR_BIT(ADCx->CHSELR,
 359              		.loc 1 409 0
 360 00b6 9A6A     		ldr	r2, [r3, #40]
 361 00b8 D20C     		lsrs	r2, r2, #19
 362 00ba D204     		lsls	r2, r2, #19
 363 00bc 9A62     		str	r2, [r3, #40]
 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               (  ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16
 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12
 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9  | ADC_CHSELR_CHSEL8
 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CHSELR_CHSEL7  | ADC_CHSELR_CHSEL6  | ADC_CHSELR_CHSEL5  | ADC_CHSELR_CHSEL4
 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CHSELR_CHSEL3  | ADC_CHSELR_CHSEL2  | ADC_CHSELR_CHSEL1  | ADC_CHSELR_CHSEL0 )
 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              );
 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #else
 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     CLEAR_BIT(ADCx->CHSELR,
 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               (  ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17
 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_CHSELR_CHSEL12
 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9  | ADC_CHSELR_CHSEL8
 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CHSELR_CHSEL7  | ADC_CHSELR_CHSEL6  | ADC_CHSELR_CHSEL5  | ADC_CHSELR_CHSEL4
 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CHSELR_CHSEL3  | ADC_CHSELR_CHSEL2  | ADC_CHSELR_CHSEL1  | ADC_CHSELR_CHSEL0 )
 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****              );
 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** #endif
 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register DR */
 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* bits in access mode read only, no direct reset applicable */
 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Reset register CALFACT */
 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     CLEAR_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT);
 364              		.loc 1 430 0
 365 00be B421     		movs	r1, #180
 366 00c0 5A58     		ldr	r2, [r3, r1]
 367 00c2 203C     		subs	r4, r4, #32
 368 00c4 A243     		bics	r2, r4
 369 00c6 5A50     		str	r2, [r3, r1]
 370              	.LVL35:
 371              	.L19:
 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   else
 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   {
 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* ADC instance is in an unknown state */
 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Need to performing a hard reset of ADC instance, using high level      */
 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* clock source RCC ADC reset.                                            */
 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Caution: On this STM32 serie, if several ADC instances are available   */
 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*          on the selected device, RCC ADC reset will reset              */
 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*          all ADC instances belonging to the common ADC instance.       */
 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     status = ERROR;
 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   return status;
 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** }
ARM GAS  /tmp/ccBKcv9L.s 			page 93


 372              		.loc 1 445 0
 373 00c8 02B0     		add	sp, sp, #8
 374              		@ sp needed
 375 00ca 10BD     		pop	{r4, pc}
 376              	.L23:
 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 377              		.loc 1 441 0
 378 00cc 0020     		movs	r0, #0
 379              	.LVL36:
 380 00ce FBE7     		b	.L19
 381              	.L26:
 382              		.align	2
 383              	.L25:
 384 00d0 3FF2FFFF 		.word	-3521
 385 00d4 E8FFFF7F 		.word	2147483624
 386 00d8 FFFFFFEF 		.word	-268435457
 387 00dc 00023E83 		.word	-2093088256
 388 00e0 02FCFF3F 		.word	1073740802
 389 00e4 00F000F0 		.word	-268374016
 390 00e8 0000FF0F 		.word	268369920
 391              		.cfi_endproc
 392              	.LFE173:
 394              		.section	.text.LL_ADC_Init,"ax",%progbits
 395              		.align	1
 396              		.global	LL_ADC_Init
 397              		.syntax unified
 398              		.code	16
 399              		.thumb_func
 400              		.fpu softvfp
 402              	LL_ADC_Init:
 403              	.LFB174:
 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @brief  Initialize some features of ADC instance.
 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   These parameters have an impact on ADC scope: ADC instance.
 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         Refer to corresponding unitary functions into
 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         @ref ADC_LL_EF_Configuration_ADC_Instance .
 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   The setting of these parameters by function @ref LL_ADC_Init()
 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         is conditioned to ADC state:
 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         ADC instance must be disabled.
 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         This condition is applied to all ADC features, for efficiency
 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         and compatibility over all STM32 families. However, the different
 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         features can be set under different ADC state conditions
 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         (setting possible with ADC enabled without conversion on going,
 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         ADC enabled with conversion on going, ...)
 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         Each feature can be updated afterwards with a unitary function
 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         and potentially with ADC in a different state than disabled,
 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         refer to description of each function for setting
 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         conditioned to ADC state.
 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   After using this function, some other features must be configured
 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         using LL unitary functions.
 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         The minimum configuration remaining to be done is:
 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - Set ADC group regular sequencer:
 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *            map channel on rank corresponding to channel number.
 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *            Refer to function @ref LL_ADC_REG_SetSequencerChannels();
 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - Set ADC channel sampling time
 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *            Refer to function LL_ADC_SetChannelSamplingTime();
ARM GAS  /tmp/ccBKcv9L.s 			page 94


 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADCx ADC instance
 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADC_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @retval An ErrorStatus enumeration value:
 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - SUCCESS: ADC registers are initialized
 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - ERROR: ADC registers are not initialized
 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** ErrorStatus LL_ADC_Init(ADC_TypeDef *ADCx, LL_ADC_InitTypeDef *ADC_InitStruct)
 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** {
 404              		.loc 1 479 0
 405              		.cfi_startproc
 406              		@ args = 0, pretend = 0, frame = 0
 407              		@ frame_needed = 0, uses_anonymous_args = 0
 408              	.LVL37:
 409 0000 10B5     		push	{r4, lr}
 410              	.LCFI2:
 411              		.cfi_def_cfa_offset 8
 412              		.cfi_offset 4, -8
 413              		.cfi_offset 14, -4
 414              	.LVL38:
 415              	.LBB54:
 416              	.LBB55:
3373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
 417              		.loc 3 3373 0
 418 0002 8368     		ldr	r3, [r0, #8]
 419              	.LVL39:
 420              	.LBE55:
 421              	.LBE54:
 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ErrorStatus status = SUCCESS;
 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Check the parameters */
 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_ADC_ALL_INSTANCE(ADCx));
 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_CLOCK(ADC_InitStruct->Clock));
 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_RESOLUTION(ADC_InitStruct->Resolution));
 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_DATA_ALIGN(ADC_InitStruct->DataAlignment));
 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_LOW_POWER(ADC_InitStruct->LowPowerMode));
 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Note: Hardware constraint (refer to description of this function):       */
 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /*       ADC instance must be disabled.                                     */
 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   if(LL_ADC_IsEnabled(ADCx) == 0U)
 422              		.loc 1 492 0
 423 0004 DB07     		lsls	r3, r3, #31
 424 0006 0BD4     		bmi	.L29
 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   {
 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Configuration of ADC hierarchical scope:                               */
 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*  - ADC instance                                                        */
 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    - Set ADC data resolution                                           */
 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    - Set ADC conversion data alignment                                 */
 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    - Set ADC low power mode                                            */
 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     MODIFY_REG(ADCx->CFGR1,
 425              		.loc 1 499 0
 426 0008 C368     		ldr	r3, [r0, #12]
 427 000a 064A     		ldr	r2, .L30
 428 000c 1340     		ands	r3, r2
 429 000e 4A68     		ldr	r2, [r1, #4]
 430 0010 8C68     		ldr	r4, [r1, #8]
 431 0012 2243     		orrs	r2, r4
ARM GAS  /tmp/ccBKcv9L.s 			page 95


 432 0014 C968     		ldr	r1, [r1, #12]
 433              	.LVL40:
 434 0016 0A43     		orrs	r2, r1
 435 0018 1343     		orrs	r3, r2
 436 001a C360     		str	r3, [r0, #12]
 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ErrorStatus status = SUCCESS;
 437              		.loc 1 480 0
 438 001c 0120     		movs	r0, #1
 439              	.LVL41:
 440              	.L28:
 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                  ADC_CFGR1_RES
 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_ALIGN
 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_WAIT
 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_AUTOFF
 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               ,
 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                  ADC_InitStruct->Resolution
 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_InitStruct->DataAlignment
 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_InitStruct->LowPowerMode
 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               );
 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     
 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   else
 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   {
 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Initialization error: ADC instance is not disabled. */
 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     status = ERROR;
 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   return status;
 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** }
 441              		.loc 1 517 0
 442              		@ sp needed
 443 001e 10BD     		pop	{r4, pc}
 444              	.LVL42:
 445              	.L29:
 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 446              		.loc 1 514 0
 447 0020 0020     		movs	r0, #0
 448              	.LVL43:
 449 0022 FCE7     		b	.L28
 450              	.L31:
 451              		.align	2
 452              	.L30:
 453 0024 C73FFFFF 		.word	-49209
 454              		.cfi_endproc
 455              	.LFE174:
 457              		.section	.text.LL_ADC_StructInit,"ax",%progbits
 458              		.align	1
 459              		.global	LL_ADC_StructInit
 460              		.syntax unified
 461              		.code	16
 462              		.thumb_func
 463              		.fpu softvfp
 465              	LL_ADC_StructInit:
 466              	.LFB175:
 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @brief  Set each @ref LL_ADC_InitTypeDef field to default value.
 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADC_InitStruct Pointer to a @ref LL_ADC_InitTypeDef structure
ARM GAS  /tmp/ccBKcv9L.s 			page 96


 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *                        whose fields will be set to default values.
 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @retval None
 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct)
 526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** {
 467              		.loc 1 526 0
 468              		.cfi_startproc
 469              		@ args = 0, pretend = 0, frame = 0
 470              		@ frame_needed = 0, uses_anonymous_args = 0
 471              		@ link register save eliminated.
 472              	.LVL44:
 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Set ADC_InitStruct fields to default values */
 528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Set fields of ADC instance */
 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_InitStruct->Clock         = LL_ADC_CLOCK_SYNC_PCLK_DIV2;
 473              		.loc 1 529 0
 474 0000 8023     		movs	r3, #128
 475 0002 DB05     		lsls	r3, r3, #23
 476 0004 0360     		str	r3, [r0]
 530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_InitStruct->Resolution    = LL_ADC_RESOLUTION_12B;
 477              		.loc 1 530 0
 478 0006 0023     		movs	r3, #0
 479 0008 4360     		str	r3, [r0, #4]
 531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_InitStruct->DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
 480              		.loc 1 531 0
 481 000a 8360     		str	r3, [r0, #8]
 532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_InitStruct->LowPowerMode  = LL_ADC_LP_MODE_NONE;
 482              		.loc 1 532 0
 483 000c C360     		str	r3, [r0, #12]
 533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** }
 484              		.loc 1 534 0
 485              		@ sp needed
 486 000e 7047     		bx	lr
 487              		.cfi_endproc
 488              	.LFE175:
 490              		.section	.text.LL_ADC_REG_Init,"ax",%progbits
 491              		.align	1
 492              		.global	LL_ADC_REG_Init
 493              		.syntax unified
 494              		.code	16
 495              		.thumb_func
 496              		.fpu softvfp
 498              	LL_ADC_REG_Init:
 499              	.LFB176:
 535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
 537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @brief  Initialize some features of ADC group regular.
 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   These parameters have an impact on ADC scope: ADC group regular.
 539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         Refer to corresponding unitary functions into
 540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         @ref ADC_LL_EF_Configuration_ADC_Group_Regular
 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         (functions with prefix "REG").
 542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   The setting of these parameters by function @ref LL_ADC_Init()
 543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         is conditioned to ADC state:
 544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         ADC instance must be disabled.
 545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         This condition is applied to all ADC features, for efficiency
 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         and compatibility over all STM32 families. However, the different
 547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         features can be set under different ADC state conditions
ARM GAS  /tmp/ccBKcv9L.s 			page 97


 548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         (setting possible with ADC enabled without conversion on going,
 549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         ADC enabled with conversion on going, ...)
 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         Each feature can be updated afterwards with a unitary function
 551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         and potentially with ADC in a different state than disabled,
 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         refer to description of each function for setting
 553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         conditioned to ADC state.
 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @note   After using this function, other features must be configured
 555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         using LL unitary functions.
 556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *         The minimum configuration remaining to be done is:
 557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - Set ADC group regular sequencer:
 558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *            map channel on rank corresponding to channel number.
 559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *            Refer to function @ref LL_ADC_REG_SetSequencerChannels();
 560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - Set ADC channel sampling time
 561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *            Refer to function LL_ADC_SetChannelSamplingTime();
 562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADCx ADC instance
 563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @retval An ErrorStatus enumeration value:
 565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - SUCCESS: ADC registers are initialized
 566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *          - ERROR: ADC registers are not initialized
 567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** ErrorStatus LL_ADC_REG_Init(ADC_TypeDef *ADCx, LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
 569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** {
 500              		.loc 1 569 0
 501              		.cfi_startproc
 502              		@ args = 0, pretend = 0, frame = 0
 503              		@ frame_needed = 0, uses_anonymous_args = 0
 504              	.LVL45:
 505 0000 10B5     		push	{r4, lr}
 506              	.LCFI3:
 507              		.cfi_def_cfa_offset 8
 508              		.cfi_offset 4, -8
 509              		.cfi_offset 14, -4
 510              	.LVL46:
 511              	.LBB56:
 512              	.LBB57:
3373:Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_adc.h **** }
 513              		.loc 3 3373 0
 514 0002 8368     		ldr	r3, [r0, #8]
 515              	.LVL47:
 516              	.LBE57:
 517              	.LBE56:
 570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ErrorStatus status = SUCCESS;
 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Check the parameters */
 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_ADC_ALL_INSTANCE(ADCx));
 574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_REG_TRIG_SOURCE(ADC_REG_InitStruct->TriggerSource));
 575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(ADC_REG_InitStruct->SequencerDiscont));
 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_REG_CONTINUOUS_MODE(ADC_REG_InitStruct->ContinuousMode));
 577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_REG_DMA_TRANSFER(ADC_REG_InitStruct->DMATransfer));
 578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   assert_param(IS_LL_ADC_REG_OVR_DATA_BEHAVIOR(ADC_REG_InitStruct->Overrun));
 579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   
 580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Note: Hardware constraint (refer to description of this function):       */
 581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /*       ADC instance must be disabled.                                     */
 582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   if(LL_ADC_IsEnabled(ADCx) == 0U)
 518              		.loc 1 582 0
 519 0004 DB07     		lsls	r3, r3, #31
 520 0006 0FD4     		bmi	.L35
ARM GAS  /tmp/ccBKcv9L.s 			page 98


 583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   {
 584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Configuration of ADC hierarchical scope:                               */
 585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*  - ADC group regular                                                   */
 586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    - Set ADC group regular trigger source                              */
 587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    - Set ADC group regular sequencer discontinuous mode                */
 588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    - Set ADC group regular continuous mode                             */
 589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    - Set ADC group regular conversion data transfer: no transfer or    */
 590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*      transfer by DMA, and DMA requests mode                            */
 591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*    - Set ADC group regular overrun behavior                            */
 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Note: On this STM32 serie, ADC trigger edge is set to value 0x0 by     */
 593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /*       setting of trigger source to SW start.                           */
 594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     MODIFY_REG(ADCx->CFGR1,
 521              		.loc 1 594 0
 522 0008 C368     		ldr	r3, [r0, #12]
 523 000a 084A     		ldr	r2, .L36
 524 000c 1A40     		ands	r2, r3
 525 000e 0B68     		ldr	r3, [r1]
 526 0010 4C68     		ldr	r4, [r1, #4]
 527 0012 2343     		orrs	r3, r4
 528 0014 8C68     		ldr	r4, [r1, #8]
 529 0016 2343     		orrs	r3, r4
 530 0018 CC68     		ldr	r4, [r1, #12]
 531 001a 2343     		orrs	r3, r4
 532 001c 0969     		ldr	r1, [r1, #16]
 533              	.LVL48:
 534 001e 0B43     		orrs	r3, r1
 535 0020 1343     		orrs	r3, r2
 536 0022 C360     		str	r3, [r0, #12]
 570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ErrorStatus status = SUCCESS;
 537              		.loc 1 570 0
 538 0024 0120     		movs	r0, #1
 539              	.LVL49:
 540              	.L34:
 595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                  ADC_CFGR1_EXTSEL
 596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_EXTEN
 597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_DISCEN
 598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_CONT
 599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_DMAEN
 600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_DMACFG
 601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_CFGR1_OVRMOD
 602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               ,
 603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                  ADC_REG_InitStruct->TriggerSource
 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_REG_InitStruct->SequencerDiscont
 605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_REG_InitStruct->ContinuousMode
 606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_REG_InitStruct->DMATransfer
 607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****                | ADC_REG_InitStruct->Overrun
 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****               );
 609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   else
 612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   {
 613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     /* Initialization error: ADC instance is not disabled. */
 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****     status = ERROR;
 615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   return status;
 617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** }
 541              		.loc 1 617 0
ARM GAS  /tmp/ccBKcv9L.s 			page 99


 542              		@ sp needed
 543 0026 10BD     		pop	{r4, pc}
 544              	.LVL50:
 545              	.L35:
 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   }
 546              		.loc 1 614 0
 547 0028 0020     		movs	r0, #0
 548              	.LVL51:
 549 002a FCE7     		b	.L34
 550              	.L37:
 551              		.align	2
 552              	.L36:
 553 002c 3CC2FEFF 		.word	-81348
 554              		.cfi_endproc
 555              	.LFE176:
 557              		.section	.text.LL_ADC_REG_StructInit,"ax",%progbits
 558              		.align	1
 559              		.global	LL_ADC_REG_StructInit
 560              		.syntax unified
 561              		.code	16
 562              		.thumb_func
 563              		.fpu softvfp
 565              	LL_ADC_REG_StructInit:
 566              	.LFB177:
 618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** 
 619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** /**
 620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @brief  Set each @ref LL_ADC_REG_InitTypeDef field to default value.
 621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @param  ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
 622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   *                            whose fields will be set to default values.
 623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   * @retval None
 624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   */
 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
 626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** {
 567              		.loc 1 626 0
 568              		.cfi_startproc
 569              		@ args = 0, pretend = 0, frame = 0
 570              		@ frame_needed = 0, uses_anonymous_args = 0
 571              		@ link register save eliminated.
 572              	.LVL52:
 627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Set ADC_REG_InitStruct fields to default values */
 628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Set fields of ADC group regular */
 629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /* Note: On this STM32 serie, ADC trigger edge is set to value 0x0 by       */
 630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   /*       setting of trigger source to SW start.                             */
 631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_REG_InitStruct->TriggerSource    = LL_ADC_REG_TRIG_SOFTWARE;
 573              		.loc 1 631 0
 574 0000 0023     		movs	r3, #0
 575 0002 0360     		str	r3, [r0]
 632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_REG_InitStruct->SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
 576              		.loc 1 632 0
 577 0004 4360     		str	r3, [r0, #4]
 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_REG_InitStruct->ContinuousMode   = LL_ADC_REG_CONV_SINGLE;
 578              		.loc 1 633 0
 579 0006 8360     		str	r3, [r0, #8]
 634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_REG_InitStruct->DMATransfer      = LL_ADC_REG_DMA_TRANSFER_NONE;
 580              		.loc 1 634 0
 581 0008 C360     		str	r3, [r0, #12]
 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c ****   ADC_REG_InitStruct->Overrun          = LL_ADC_REG_OVR_DATA_OVERWRITTEN;
ARM GAS  /tmp/ccBKcv9L.s 			page 100


 582              		.loc 1 635 0
 583 000a 8023     		movs	r3, #128
 584 000c 5B01     		lsls	r3, r3, #5
 585 000e 0361     		str	r3, [r0, #16]
 636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_ll_adc.c **** }
 586              		.loc 1 636 0
 587              		@ sp needed
 588 0010 7047     		bx	lr
 589              		.cfi_endproc
 590              	.LFE177:
 592              		.text
 593              	.Letext0:
 594              		.file 4 "/usr/arm-none-eabi/include/machine/_default_types.h"
 595              		.file 5 "/usr/arm-none-eabi/include/sys/_stdint.h"
 596              		.file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
 597              		.file 7 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
 598              		.file 8 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h"
 599              		.file 9 "/usr/arm-none-eabi/include/sys/lock.h"
 600              		.file 10 "/usr/arm-none-eabi/include/sys/_types.h"
 601              		.file 11 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
 602              		.file 12 "/usr/arm-none-eabi/include/sys/reent.h"
ARM GAS  /tmp/ccBKcv9L.s 			page 101


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32l0xx_ll_adc.c
     /tmp/ccBKcv9L.s:16     .text.LL_ADC_CommonDeInit:0000000000000000 $t
     /tmp/ccBKcv9L.s:23     .text.LL_ADC_CommonDeInit:0000000000000000 LL_ADC_CommonDeInit
     /tmp/ccBKcv9L.s:63     .text.LL_ADC_CommonDeInit:0000000000000018 $d
     /tmp/ccBKcv9L.s:69     .text.LL_ADC_CommonInit:0000000000000000 $t
     /tmp/ccBKcv9L.s:76     .text.LL_ADC_CommonInit:0000000000000000 LL_ADC_CommonInit
     /tmp/ccBKcv9L.s:128    .text.LL_ADC_CommonInit:000000000000001c $d
     /tmp/ccBKcv9L.s:134    .text.LL_ADC_CommonStructInit:0000000000000000 $t
     /tmp/ccBKcv9L.s:141    .text.LL_ADC_CommonStructInit:0000000000000000 LL_ADC_CommonStructInit
     /tmp/ccBKcv9L.s:160    .text.LL_ADC_DeInit:0000000000000000 $t
     /tmp/ccBKcv9L.s:167    .text.LL_ADC_DeInit:0000000000000000 LL_ADC_DeInit
     /tmp/ccBKcv9L.s:384    .text.LL_ADC_DeInit:00000000000000d0 $d
     /tmp/ccBKcv9L.s:395    .text.LL_ADC_Init:0000000000000000 $t
     /tmp/ccBKcv9L.s:402    .text.LL_ADC_Init:0000000000000000 LL_ADC_Init
     /tmp/ccBKcv9L.s:453    .text.LL_ADC_Init:0000000000000024 $d
     /tmp/ccBKcv9L.s:458    .text.LL_ADC_StructInit:0000000000000000 $t
     /tmp/ccBKcv9L.s:465    .text.LL_ADC_StructInit:0000000000000000 LL_ADC_StructInit
     /tmp/ccBKcv9L.s:491    .text.LL_ADC_REG_Init:0000000000000000 $t
     /tmp/ccBKcv9L.s:498    .text.LL_ADC_REG_Init:0000000000000000 LL_ADC_REG_Init
     /tmp/ccBKcv9L.s:553    .text.LL_ADC_REG_Init:000000000000002c $d
     /tmp/ccBKcv9L.s:558    .text.LL_ADC_REG_StructInit:0000000000000000 $t
     /tmp/ccBKcv9L.s:565    .text.LL_ADC_REG_StructInit:0000000000000000 LL_ADC_REG_StructInit
                     .debug_frame:0000000000000010 $d

NO UNDEFINED SYMBOLS