ARM GAS /tmp/ccpOZGrp.s page 1 1 .cpu cortex-m0plus 2 .eabi_attribute 20, 1 3 .eabi_attribute 21, 1 4 .eabi_attribute 23, 3 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 1 9 .eabi_attribute 34, 0 10 .eabi_attribute 18, 4 11 .file "hw_gpio.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.HW_GPIO_Init,"ax",%progbits 16 .align 1 17 .global HW_GPIO_Init 18 .syntax unified 19 .code 16 20 .thumb_func 21 .fpu softvfp 23 HW_GPIO_Init: 24 .LFB96: 25 .file 1 "./Src/hw_gpio.c" 1:./Src/hw_gpio.c **** /* 2:./Src/hw_gpio.c **** / _____) _ | | 3:./Src/hw_gpio.c **** ( (____ _____ ____ _| |_ _____ ____| |__ 4:./Src/hw_gpio.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ 5:./Src/hw_gpio.c **** _____) ) ____| | | || |_| ____( (___| | | | 6:./Src/hw_gpio.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| 7:./Src/hw_gpio.c **** (C)2013 Semtech 8:./Src/hw_gpio.c **** 9:./Src/hw_gpio.c **** Description: Bleeper board GPIO driver implementation 10:./Src/hw_gpio.c **** 11:./Src/hw_gpio.c **** License: Revised BSD License, see LICENSE.TXT file include in the project 12:./Src/hw_gpio.c **** 13:./Src/hw_gpio.c **** Maintainer: Miguel Luis and Gregory Cristian 14:./Src/hw_gpio.c **** */ 15:./Src/hw_gpio.c **** /****************************************************************************** 16:./Src/hw_gpio.c **** * @file hw_gpio.c 17:./Src/hw_gpio.c **** * @author MCD Application Team 18:./Src/hw_gpio.c **** * @version V1.1.2 19:./Src/hw_gpio.c **** * @date 08-September-2017 20:./Src/hw_gpio.c **** * @brief driver for GPIO 21:./Src/hw_gpio.c **** ****************************************************************************** 22:./Src/hw_gpio.c **** * @attention 23:./Src/hw_gpio.c **** * 24:./Src/hw_gpio.c **** *

© Copyright (c) 2017 STMicroelectronics International N.V. 25:./Src/hw_gpio.c **** * All rights reserved.

26:./Src/hw_gpio.c **** * 27:./Src/hw_gpio.c **** * Redistribution and use in source and binary forms, with or without 28:./Src/hw_gpio.c **** * modification, are permitted, provided that the following conditions are met: 29:./Src/hw_gpio.c **** * 30:./Src/hw_gpio.c **** * 1. Redistribution of source code must retain the above copyright notice, 31:./Src/hw_gpio.c **** * this list of conditions and the following disclaimer. 32:./Src/hw_gpio.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, 33:./Src/hw_gpio.c **** * this list of conditions and the following disclaimer in the documentation ARM GAS /tmp/ccpOZGrp.s page 2 34:./Src/hw_gpio.c **** * and/or other materials provided with the distribution. 35:./Src/hw_gpio.c **** * 3. Neither the name of STMicroelectronics nor the names of other 36:./Src/hw_gpio.c **** * contributors to this software may be used to endorse or promote products 37:./Src/hw_gpio.c **** * derived from this software without specific written permission. 38:./Src/hw_gpio.c **** * 4. This software, including modifications and/or derivative works of this 39:./Src/hw_gpio.c **** * software, must execute solely and exclusively on microcontroller or 40:./Src/hw_gpio.c **** * microprocessor devices manufactured by or for STMicroelectronics. 41:./Src/hw_gpio.c **** * 5. Redistribution and use of this software other than as permitted under 42:./Src/hw_gpio.c **** * this license is void and will automatically terminate your rights under 43:./Src/hw_gpio.c **** * this license. 44:./Src/hw_gpio.c **** * 45:./Src/hw_gpio.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" 46:./Src/hw_gpio.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT 47:./Src/hw_gpio.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 48:./Src/hw_gpio.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY 49:./Src/hw_gpio.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT 50:./Src/hw_gpio.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 51:./Src/hw_gpio.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 52:./Src/hw_gpio.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 53:./Src/hw_gpio.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 54:./Src/hw_gpio.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 55:./Src/hw_gpio.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 56:./Src/hw_gpio.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 57:./Src/hw_gpio.c **** * 58:./Src/hw_gpio.c **** ****************************************************************************** 59:./Src/hw_gpio.c **** */ 60:./Src/hw_gpio.c **** 61:./Src/hw_gpio.c **** /* Includes ------------------------------------------------------------------*/ 62:./Src/hw_gpio.c **** #include "hw.h" 63:./Src/hw_gpio.c **** 64:./Src/hw_gpio.c **** /* Private typedef -----------------------------------------------------------*/ 65:./Src/hw_gpio.c **** /* Private define ------------------------------------------------------------*/ 66:./Src/hw_gpio.c **** /* Private macro -------------------------------------------------------------*/ 67:./Src/hw_gpio.c **** /* Private variables ---------------------------------------------------------*/ 68:./Src/hw_gpio.c **** static GpioIrqHandler *GpioIrq[16] = { NULL }; 69:./Src/hw_gpio.c **** 70:./Src/hw_gpio.c **** /* Private function prototypes -----------------------------------------------*/ 71:./Src/hw_gpio.c **** 72:./Src/hw_gpio.c **** static uint8_t HW_GPIO_GetBitPos(uint16_t GPIO_Pin); 73:./Src/hw_gpio.c **** 74:./Src/hw_gpio.c **** /* Exported functions ---------------------------------------------------------*/ 75:./Src/hw_gpio.c **** /*! 76:./Src/hw_gpio.c **** * @brief Initializes the given GPIO object 77:./Src/hw_gpio.c **** * 78:./Src/hw_gpio.c **** * @param GPIOx: where x can be (A..E and H) 79:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. 80:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). 81:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. 82:./Src/hw_gpio.c **** * @param [IN] initStruct GPIO_InitTypeDef intit structure 83:./Src/hw_gpio.c **** * @retval none 84:./Src/hw_gpio.c **** */ 85:./Src/hw_gpio.c **** void HW_GPIO_Init( GPIO_TypeDef* port, uint16_t GPIO_Pin, GPIO_InitTypeDef* initStruct) 86:./Src/hw_gpio.c **** { 26 .loc 1 86 0 27 .cfi_startproc 28 @ args = 0, pretend = 0, frame = 24 29 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS /tmp/ccpOZGrp.s page 3 30 .LVL0: 31 0000 30B5 push {r4, r5, lr} 32 .LCFI0: 33 .cfi_def_cfa_offset 12 34 .cfi_offset 4, -12 35 .cfi_offset 5, -8 36 .cfi_offset 14, -4 37 0002 87B0 sub sp, sp, #28 38 .LCFI1: 39 .cfi_def_cfa_offset 40 87:./Src/hw_gpio.c **** 88:./Src/hw_gpio.c **** RCC_GPIO_CLK_ENABLE( (uint32_t) port); 40 .loc 1 88 0 41 0004 224C ldr r4, .L10 42 0006 A042 cmp r0, r4 43 0008 23D0 beq .L3 44 000a 0FD9 bls .L9 45 000c 214C ldr r4, .L10+4 46 000e A042 cmp r0, r4 47 0010 29D0 beq .L6 48 0012 214C ldr r4, .L10+8 49 0014 A042 cmp r0, r4 50 0016 30D1 bne .L2 51 .LBB6: 52 .loc 1 88 0 is_stmt 0 discriminator 5 53 0018 204C ldr r4, .L10+12 54 001a E56A ldr r5, [r4, #44] 55 001c 0823 movs r3, #8 56 001e 1D43 orrs r5, r3 57 0020 E562 str r5, [r4, #44] 58 0022 E46A ldr r4, [r4, #44] 59 0024 2340 ands r3, r4 60 0026 0493 str r3, [sp, #16] 61 0028 049B ldr r3, [sp, #16] 62 .LBE6: 63 002a 0CE0 b .L8 64 .L9: 65 .loc 1 88 0 66 002c A024 movs r4, #160 67 002e E405 lsls r4, r4, #23 68 0030 A042 cmp r0, r4 69 0032 22D1 bne .L2 70 .LBB7: 71 .loc 1 88 0 discriminator 2 72 0034 194C ldr r4, .L10+12 73 0036 E56A ldr r5, [r4, #44] 74 0038 0123 movs r3, #1 75 003a 1D43 orrs r5, r3 76 003c E562 str r5, [r4, #44] 77 003e E46A ldr r4, [r4, #44] 78 0040 2340 ands r3, r4 79 0042 0193 str r3, [sp, #4] 80 0044 019B ldr r3, [sp, #4] 81 .L8: 82 .LBE7: 89:./Src/hw_gpio.c **** 90:./Src/hw_gpio.c **** initStruct->Pin = GPIO_Pin ; ARM GAS /tmp/ccpOZGrp.s page 4 83 .loc 1 90 0 is_stmt 1 84 0046 1160 str r1, [r2] 91:./Src/hw_gpio.c **** 92:./Src/hw_gpio.c **** HAL_GPIO_Init( port, initStruct ); 85 .loc 1 92 0 86 0048 1100 movs r1, r2 87 .LVL1: 88 004a FFF7FEFF bl HAL_GPIO_Init 89 .LVL2: 93:./Src/hw_gpio.c **** } 90 .loc 1 93 0 91 004e 07B0 add sp, sp, #28 92 @ sp needed 93 0050 30BD pop {r4, r5, pc} 94 .LVL3: 95 .L3: 96 .LBB8: 88:./Src/hw_gpio.c **** 97 .loc 1 88 0 discriminator 3 98 0052 124C ldr r4, .L10+12 99 0054 E56A ldr r5, [r4, #44] 100 0056 0223 movs r3, #2 101 0058 1D43 orrs r5, r3 102 005a E562 str r5, [r4, #44] 103 005c E46A ldr r4, [r4, #44] 104 005e 2340 ands r3, r4 105 0060 0293 str r3, [sp, #8] 106 0062 029B ldr r3, [sp, #8] 107 .LBE8: 108 0064 EFE7 b .L8 109 .L6: 110 .LBB9: 88:./Src/hw_gpio.c **** 111 .loc 1 88 0 is_stmt 0 discriminator 4 112 0066 0D4C ldr r4, .L10+12 113 0068 E56A ldr r5, [r4, #44] 114 006a 0423 movs r3, #4 115 006c 1D43 orrs r5, r3 116 006e E562 str r5, [r4, #44] 117 0070 E46A ldr r4, [r4, #44] 118 0072 2340 ands r3, r4 119 0074 0393 str r3, [sp, #12] 120 0076 039B ldr r3, [sp, #12] 121 .LBE9: 122 0078 E5E7 b .L8 123 .L2: 124 .LBB10: 88:./Src/hw_gpio.c **** 125 .loc 1 88 0 discriminator 1 126 007a 084C ldr r4, .L10+12 127 007c E56A ldr r5, [r4, #44] 128 007e 8023 movs r3, #128 129 0080 1D43 orrs r5, r3 130 0082 E562 str r5, [r4, #44] 131 0084 E46A ldr r4, [r4, #44] 132 0086 2340 ands r3, r4 133 0088 0593 str r3, [sp, #20] ARM GAS /tmp/ccpOZGrp.s page 5 134 008a 059B ldr r3, [sp, #20] 135 008c DBE7 b .L8 136 .L11: 137 008e C046 .align 2 138 .L10: 139 0090 00040050 .word 1342178304 140 0094 00080050 .word 1342179328 141 0098 000C0050 .word 1342180352 142 009c 00100240 .word 1073876992 143 .LBE10: 144 .cfi_endproc 145 .LFE96: 147 .section .text.HW_GPIO_SetIrq,"ax",%progbits 148 .align 1 149 .global HW_GPIO_SetIrq 150 .syntax unified 151 .code 16 152 .thumb_func 153 .fpu softvfp 155 HW_GPIO_SetIrq: 156 .LFB97: 94:./Src/hw_gpio.c **** 95:./Src/hw_gpio.c **** /*! 96:./Src/hw_gpio.c **** * @brief Records the interrupt handler for the GPIO object 97:./Src/hw_gpio.c **** * 98:./Src/hw_gpio.c **** * @param GPIOx: where x can be (A..E and H) 99:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. 100:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). 101:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. 102:./Src/hw_gpio.c **** * @param [IN] prio NVIC priority (0 is highest) 103:./Src/hw_gpio.c **** * @param [IN] irqHandler points to the function to execute 104:./Src/hw_gpio.c **** * @retval none 105:./Src/hw_gpio.c **** */ 106:./Src/hw_gpio.c **** void HW_GPIO_SetIrq( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, uint32_t prio, GpioIrqHandler *irqHan 107:./Src/hw_gpio.c **** { 157 .loc 1 107 0 is_stmt 1 158 .cfi_startproc 159 @ args = 0, pretend = 0, frame = 0 160 @ frame_needed = 0, uses_anonymous_args = 0 161 .LVL4: 162 0000 70B5 push {r4, r5, r6, lr} 163 .LCFI2: 164 .cfi_def_cfa_offset 16 165 .cfi_offset 4, -16 166 .cfi_offset 5, -12 167 .cfi_offset 6, -8 168 .cfi_offset 14, -4 169 0002 1400 movs r4, r2 170 .LVL5: 171 .LBB11: 172 .LBB12: 108:./Src/hw_gpio.c **** IRQn_Type IRQnb; 109:./Src/hw_gpio.c **** 110:./Src/hw_gpio.c **** uint32_t BitPos = HW_GPIO_GetBitPos( GPIO_Pin ) ; 111:./Src/hw_gpio.c **** 112:./Src/hw_gpio.c **** if ( irqHandler != NULL) 113:./Src/hw_gpio.c **** { ARM GAS /tmp/ccpOZGrp.s page 6 114:./Src/hw_gpio.c **** GpioIrq[ BitPos ] = irqHandler; 115:./Src/hw_gpio.c **** 116:./Src/hw_gpio.c **** IRQnb = MSP_GetIRQn( GPIO_Pin ); 117:./Src/hw_gpio.c **** 118:./Src/hw_gpio.c **** HAL_NVIC_SetPriority( IRQnb , prio, 0); 119:./Src/hw_gpio.c **** 120:./Src/hw_gpio.c **** HAL_NVIC_EnableIRQ( IRQnb ); 121:./Src/hw_gpio.c **** } 122:./Src/hw_gpio.c **** } 123:./Src/hw_gpio.c **** 124:./Src/hw_gpio.c **** /*! 125:./Src/hw_gpio.c **** * @brief Execute the interrupt from the object 126:./Src/hw_gpio.c **** * 127:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. 128:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). 129:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. 130:./Src/hw_gpio.c **** * @retval none 131:./Src/hw_gpio.c **** */ 132:./Src/hw_gpio.c **** void HW_GPIO_IrqHandler( uint16_t GPIO_Pin ) 133:./Src/hw_gpio.c **** { 134:./Src/hw_gpio.c **** uint32_t BitPos = HW_GPIO_GetBitPos( GPIO_Pin ); 135:./Src/hw_gpio.c **** 136:./Src/hw_gpio.c **** if ( GpioIrq[ BitPos ] != NULL) 137:./Src/hw_gpio.c **** { 138:./Src/hw_gpio.c **** GpioIrq[ BitPos ] ( ); 139:./Src/hw_gpio.c **** } 140:./Src/hw_gpio.c **** } 141:./Src/hw_gpio.c **** 142:./Src/hw_gpio.c **** /*! 143:./Src/hw_gpio.c **** * @brief Writes the given value to the GPIO output 144:./Src/hw_gpio.c **** * 145:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. 146:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). 147:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. 148:./Src/hw_gpio.c **** * @param [IN] value New GPIO output value 149:./Src/hw_gpio.c **** * @retval none 150:./Src/hw_gpio.c **** */ 151:./Src/hw_gpio.c **** void HW_GPIO_Write( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, uint32_t value ) 152:./Src/hw_gpio.c **** { 153:./Src/hw_gpio.c **** HAL_GPIO_WritePin( GPIOx, GPIO_Pin , (GPIO_PinState) value ); 154:./Src/hw_gpio.c **** } 155:./Src/hw_gpio.c **** 156:./Src/hw_gpio.c **** /*! 157:./Src/hw_gpio.c **** * @brief Reads the current GPIO input value 158:./Src/hw_gpio.c **** * 159:./Src/hw_gpio.c **** * @param GPIOx: where x can be (A..E and H) 160:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. 161:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). 162:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. 163:./Src/hw_gpio.c **** * @retval value Current GPIO input value 164:./Src/hw_gpio.c **** */ 165:./Src/hw_gpio.c **** uint32_t HW_GPIO_Read( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin ) 166:./Src/hw_gpio.c **** { 167:./Src/hw_gpio.c **** return HAL_GPIO_ReadPin( GPIOx, GPIO_Pin); 168:./Src/hw_gpio.c **** } 169:./Src/hw_gpio.c **** 170:./Src/hw_gpio.c **** /* Private functions ---------------------------------------------------------*/ ARM GAS /tmp/ccpOZGrp.s page 7 171:./Src/hw_gpio.c **** 172:./Src/hw_gpio.c **** /*! 173:./Src/hw_gpio.c **** * @brief Get the position of the bit set in the GPIO_Pin 174:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. 175:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). 176:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. 177:./Src/hw_gpio.c **** * @retval the position of the bit 178:./Src/hw_gpio.c **** */ 179:./Src/hw_gpio.c **** static uint8_t HW_GPIO_GetBitPos(uint16_t GPIO_Pin) 180:./Src/hw_gpio.c **** { 181:./Src/hw_gpio.c **** uint8_t PinPos=0; 182:./Src/hw_gpio.c **** 183:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xFF00 ) != 0) { PinPos |= 0x8; } 173 .loc 1 183 0 174 0004 FF22 movs r2, #255 175 .LVL6: 176 0006 0800 movs r0, r1 177 .LVL7: 178 0008 9043 bics r0, r2 179 000a 021E subs r2, r0, #0 180 000c 00D0 beq .L13 181 000e 0822 movs r2, #8 182 .L13: 183 .LVL8: 184:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xF0F0 ) != 0) { PinPos |= 0x4; } 184 .loc 1 184 0 185 0010 0F48 ldr r0, .L19 186 0012 0142 tst r1, r0 187 0014 01D0 beq .L14 188 0016 0420 movs r0, #4 189 0018 0243 orrs r2, r0 190 .LVL9: 191 .L14: 185:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xCCCC ) != 0) { PinPos |= 0x2; } 192 .loc 1 185 0 193 001a 0E48 ldr r0, .L19+4 194 001c 0142 tst r1, r0 195 001e 01D0 beq .L15 196 0020 0220 movs r0, #2 197 0022 0243 orrs r2, r0 198 .LVL10: 199 .L15: 186:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xAAAA ) != 0) { PinPos |= 0x1; } 200 .loc 1 186 0 201 0024 0C48 ldr r0, .L19+8 202 0026 0142 tst r1, r0 203 0028 01D0 beq .L16 204 002a 0120 movs r0, #1 205 002c 0243 orrs r2, r0 206 .LVL11: 207 .L16: 208 .LBE12: 209 .LBE11: 112:./Src/hw_gpio.c **** { 210 .loc 1 112 0 211 002e 002B cmp r3, #0 212 0030 0DD0 beq .L12 ARM GAS /tmp/ccpOZGrp.s page 8 114:./Src/hw_gpio.c **** 213 .loc 1 114 0 214 0032 9200 lsls r2, r2, #2 215 .LVL12: 216 0034 0948 ldr r0, .L19+12 217 0036 1350 str r3, [r2, r0] 116:./Src/hw_gpio.c **** 218 .loc 1 116 0 219 0038 0800 movs r0, r1 220 003a FFF7FEFF bl MSP_GetIRQn 221 .LVL13: 222 003e 0500 movs r5, r0 223 .LVL14: 118:./Src/hw_gpio.c **** 224 .loc 1 118 0 225 0040 0022 movs r2, #0 226 0042 2100 movs r1, r4 227 0044 FFF7FEFF bl HAL_NVIC_SetPriority 228 .LVL15: 120:./Src/hw_gpio.c **** } 229 .loc 1 120 0 230 0048 2800 movs r0, r5 231 004a FFF7FEFF bl HAL_NVIC_EnableIRQ 232 .LVL16: 233 .L12: 122:./Src/hw_gpio.c **** 234 .loc 1 122 0 235 @ sp needed 236 .LVL17: 237 004e 70BD pop {r4, r5, r6, pc} 238 .L20: 239 .align 2 240 .L19: 241 0050 F0F0FFFF .word -3856 242 0054 CCCCFFFF .word -13108 243 0058 AAAAFFFF .word -21846 244 005c 00000000 .word .LANCHOR0 245 .cfi_endproc 246 .LFE97: 248 .section .text.HW_GPIO_IrqHandler,"ax",%progbits 249 .align 1 250 .global HW_GPIO_IrqHandler 251 .syntax unified 252 .code 16 253 .thumb_func 254 .fpu softvfp 256 HW_GPIO_IrqHandler: 257 .LFB98: 133:./Src/hw_gpio.c **** uint32_t BitPos = HW_GPIO_GetBitPos( GPIO_Pin ); 258 .loc 1 133 0 259 .cfi_startproc 260 @ args = 0, pretend = 0, frame = 0 261 @ frame_needed = 0, uses_anonymous_args = 0 262 .LVL18: 263 0000 10B5 push {r4, lr} 264 .LCFI3: 265 .cfi_def_cfa_offset 8 ARM GAS /tmp/ccpOZGrp.s page 9 266 .cfi_offset 4, -8 267 .cfi_offset 14, -4 268 .LVL19: 269 .LBB13: 270 .LBB14: 183:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xF0F0 ) != 0) { PinPos |= 0x4; } 271 .loc 1 183 0 272 0002 FF23 movs r3, #255 273 0004 0200 movs r2, r0 274 0006 9A43 bics r2, r3 275 0008 131E subs r3, r2, #0 276 000a 00D0 beq .L22 277 000c 0823 movs r3, #8 278 .L22: 279 .LVL20: 184:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xCCCC ) != 0) { PinPos |= 0x2; } 280 .loc 1 184 0 281 000e 0B4A ldr r2, .L28 282 0010 1042 tst r0, r2 283 0012 01D0 beq .L23 284 0014 0422 movs r2, #4 285 0016 1343 orrs r3, r2 286 .LVL21: 287 .L23: 185:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xAAAA ) != 0) { PinPos |= 0x1; } 288 .loc 1 185 0 289 0018 094A ldr r2, .L28+4 290 001a 1042 tst r0, r2 291 001c 01D0 beq .L24 292 001e 0222 movs r2, #2 293 0020 1343 orrs r3, r2 294 .LVL22: 295 .L24: 296 .loc 1 186 0 297 0022 084A ldr r2, .L28+8 298 0024 1042 tst r0, r2 299 0026 01D0 beq .L25 300 0028 0122 movs r2, #1 301 002a 1343 orrs r3, r2 302 .LVL23: 303 .L25: 304 .LBE14: 305 .LBE13: 136:./Src/hw_gpio.c **** { 306 .loc 1 136 0 307 002c 9B00 lsls r3, r3, #2 308 .LVL24: 309 002e 064A ldr r2, .L28+12 310 0030 9B58 ldr r3, [r3, r2] 311 0032 002B cmp r3, #0 312 0034 00D0 beq .L21 138:./Src/hw_gpio.c **** } 313 .loc 1 138 0 314 0036 9847 blx r3 315 .LVL25: 316 .L21: 140:./Src/hw_gpio.c **** ARM GAS /tmp/ccpOZGrp.s page 10 317 .loc 1 140 0 318 @ sp needed 319 0038 10BD pop {r4, pc} 320 .L29: 321 003a C046 .align 2 322 .L28: 323 003c F0F0FFFF .word -3856 324 0040 CCCCFFFF .word -13108 325 0044 AAAAFFFF .word -21846 326 0048 00000000 .word .LANCHOR0 327 .cfi_endproc 328 .LFE98: 330 .section .text.HW_GPIO_Write,"ax",%progbits 331 .align 1 332 .global HW_GPIO_Write 333 .syntax unified 334 .code 16 335 .thumb_func 336 .fpu softvfp 338 HW_GPIO_Write: 339 .LFB99: 152:./Src/hw_gpio.c **** HAL_GPIO_WritePin( GPIOx, GPIO_Pin , (GPIO_PinState) value ); 340 .loc 1 152 0 341 .cfi_startproc 342 @ args = 0, pretend = 0, frame = 0 343 @ frame_needed = 0, uses_anonymous_args = 0 344 .LVL26: 345 0000 10B5 push {r4, lr} 346 .LCFI4: 347 .cfi_def_cfa_offset 8 348 .cfi_offset 4, -8 349 .cfi_offset 14, -4 153:./Src/hw_gpio.c **** } 350 .loc 1 153 0 351 0002 D2B2 uxtb r2, r2 352 .LVL27: 353 0004 FFF7FEFF bl HAL_GPIO_WritePin 354 .LVL28: 154:./Src/hw_gpio.c **** 355 .loc 1 154 0 356 @ sp needed 357 0008 10BD pop {r4, pc} 358 .cfi_endproc 359 .LFE99: 361 .section .text.HW_GPIO_Read,"ax",%progbits 362 .align 1 363 .global HW_GPIO_Read 364 .syntax unified 365 .code 16 366 .thumb_func 367 .fpu softvfp 369 HW_GPIO_Read: 370 .LFB100: 166:./Src/hw_gpio.c **** return HAL_GPIO_ReadPin( GPIOx, GPIO_Pin); 371 .loc 1 166 0 372 .cfi_startproc 373 @ args = 0, pretend = 0, frame = 0 ARM GAS /tmp/ccpOZGrp.s page 11 374 @ frame_needed = 0, uses_anonymous_args = 0 375 .LVL29: 376 0000 10B5 push {r4, lr} 377 .LCFI5: 378 .cfi_def_cfa_offset 8 379 .cfi_offset 4, -8 380 .cfi_offset 14, -4 167:./Src/hw_gpio.c **** } 381 .loc 1 167 0 382 0002 FFF7FEFF bl HAL_GPIO_ReadPin 383 .LVL30: 168:./Src/hw_gpio.c **** 384 .loc 1 168 0 385 @ sp needed 386 0006 10BD pop {r4, pc} 387 .cfi_endproc 388 .LFE100: 390 .section .bss.GpioIrq,"aw",%nobits 391 .align 2 392 .set .LANCHOR0,. + 0 395 GpioIrq: 396 0000 00000000 .space 64 396 00000000 396 00000000 396 00000000 396 00000000 397 .text 398 .Letext0: 399 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" 400 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" 401 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" 402 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" 403 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" 404 .file 7 "/usr/arm-none-eabi/include/math.h" 405 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h" 406 .file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" 407 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" 408 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h" 409 .file 12 "Inc/hw_gpio.h" 410 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h" ARM GAS /tmp/ccpOZGrp.s page 12 DEFINED SYMBOLS *ABS*:0000000000000000 hw_gpio.c /tmp/ccpOZGrp.s:16 .text.HW_GPIO_Init:0000000000000000 $t /tmp/ccpOZGrp.s:23 .text.HW_GPIO_Init:0000000000000000 HW_GPIO_Init /tmp/ccpOZGrp.s:139 .text.HW_GPIO_Init:0000000000000090 $d /tmp/ccpOZGrp.s:148 .text.HW_GPIO_SetIrq:0000000000000000 $t /tmp/ccpOZGrp.s:155 .text.HW_GPIO_SetIrq:0000000000000000 HW_GPIO_SetIrq /tmp/ccpOZGrp.s:241 .text.HW_GPIO_SetIrq:0000000000000050 $d /tmp/ccpOZGrp.s:249 .text.HW_GPIO_IrqHandler:0000000000000000 $t /tmp/ccpOZGrp.s:256 .text.HW_GPIO_IrqHandler:0000000000000000 HW_GPIO_IrqHandler /tmp/ccpOZGrp.s:323 .text.HW_GPIO_IrqHandler:000000000000003c $d /tmp/ccpOZGrp.s:331 .text.HW_GPIO_Write:0000000000000000 $t /tmp/ccpOZGrp.s:338 .text.HW_GPIO_Write:0000000000000000 HW_GPIO_Write /tmp/ccpOZGrp.s:362 .text.HW_GPIO_Read:0000000000000000 $t /tmp/ccpOZGrp.s:369 .text.HW_GPIO_Read:0000000000000000 HW_GPIO_Read /tmp/ccpOZGrp.s:391 .bss.GpioIrq:0000000000000000 $d /tmp/ccpOZGrp.s:395 .bss.GpioIrq:0000000000000000 GpioIrq .debug_frame:0000000000000010 $d UNDEFINED SYMBOLS HAL_GPIO_Init MSP_GetIRQn HAL_NVIC_SetPriority HAL_NVIC_EnableIRQ HAL_GPIO_WritePin HAL_GPIO_ReadPin