From e22af2bccdeeb0014f8d55b9e84033afcca928ee Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ond=C5=99ej=20Hru=C5=A1ka?= Date: Sun, 19 Nov 2017 01:28:31 +0100 Subject: [PATCH] bme integrted to lora --- .gitignore | 2 +- CMakeLists.txt | 12 +- Drivers/BME680/bsec_datatypes.h | 467 + Drivers/BME680/bsec_interface.h | 564 + Drivers/BME680/libalgobsec.a | Bin 0 -> 218762 bytes Inc/hw_i2c.h | 3 +- Makefile | 8 +- Src/hw_i2c.c | 9 +- Src/main.c | 256 +- Src/payload_builder.c | 69 + Src/payload_builder.h | 50 + Src/payload_parser.c | 86 + Src/payload_parser.h | 66 + Src/stm32l0xx_hw.c | 75 +- Src/type_coerce.h | 25 + Src/voc_sensor.c | 26 +- Src/voc_sensor.h | 3 +- build/LoRaMac.d | 43 - build/LoRaMac.lst | 13841 ------------------ build/LoRaMacCrypto.d | 31 - build/LoRaMacCrypto.lst | 1053 -- build/Region.d | 34 - build/Region.lst | 2208 --- build/RegionCommon.d | 35 - build/RegionCommon.lst | 1997 --- build/RegionEU868.d | 51 - build/RegionEU868.lst | 4727 ------- build/aes.d | 4 - build/aes.lst | 2834 ---- build/bees.bin | Bin 56464 -> 0 bytes build/bees.hex | 3535 ----- build/bees.map | 6414 --------- build/bme680.d | 6 - build/bme680.lst | 5480 -------- build/cmac.d | 25 - build/cmac.lst | 844 -- build/debug.d | 135 - build/debug.lst | 326 - build/delay.d | 141 - build/delay.lst | 199 - build/hw_gpio.d | 135 - build/hw_gpio.lst | 672 - build/hw_i2c.d | 141 - build/hw_i2c.lst | 486 - build/hw_rtc.d | 138 - build/hw_rtc.lst | 2705 ---- build/hw_spi.d | 135 - build/hw_spi.lst | 824 -- build/lora.d | 155 - build/lora.lst | 2559 ---- build/low_power.d | 138 - build/low_power.lst | 657 - build/main.d | 171 - build/main.lst | 571 - build/startup_stm32l073xx.d | 1 - build/stm32l0xx_hal.d | 102 - build/stm32l0xx_hal.lst | 1522 -- build/stm32l0xx_hal_adc.d | 103 - build/stm32l0xx_hal_adc.lst | 5657 -------- build/stm32l0xx_hal_adc_ex.d | 103 - build/stm32l0xx_hal_adc_ex.lst | 924 -- build/stm32l0xx_hal_comp.d | 103 - build/stm32l0xx_hal_comp.lst | 32 - build/stm32l0xx_hal_comp_ex.d | 103 - build/stm32l0xx_hal_comp_ex.lst | 32 - build/stm32l0xx_hal_cortex.d | 103 - build/stm32l0xx_hal_cortex.lst | 2621 ---- build/stm32l0xx_hal_crc.d | 103 - build/stm32l0xx_hal_crc.lst | 32 - build/stm32l0xx_hal_crc_ex.d | 103 - build/stm32l0xx_hal_crc_ex.lst | 32 - build/stm32l0xx_hal_cryp.d | 2 - build/stm32l0xx_hal_cryp.lst | 25 - build/stm32l0xx_hal_cryp_ex.d | 2 - build/stm32l0xx_hal_cryp_ex.lst | 25 - build/stm32l0xx_hal_dac.d | 103 - build/stm32l0xx_hal_dac.lst | 32 - build/stm32l0xx_hal_dac_ex.d | 103 - build/stm32l0xx_hal_dac_ex.lst | 32 - build/stm32l0xx_hal_dma.d | 103 - build/stm32l0xx_hal_dma.lst | 3299 ----- build/stm32l0xx_hal_firewall.d | 103 - build/stm32l0xx_hal_firewall.lst | 32 - build/stm32l0xx_hal_flash.d | 103 - build/stm32l0xx_hal_flash.lst | 1990 --- build/stm32l0xx_hal_flash_ex.d | 103 - build/stm32l0xx_hal_flash_ex.lst | 3227 ----- build/stm32l0xx_hal_flash_ramfunc.d | 103 - build/stm32l0xx_hal_flash_ramfunc.lst | 1527 -- build/stm32l0xx_hal_gpio.d | 103 - build/stm32l0xx_hal_gpio.lst | 1503 -- build/stm32l0xx_hal_i2c.d | 105 - build/stm32l0xx_hal_i2c.lst | 17938 ------------------------ build/stm32l0xx_hal_i2c_ex.d | 103 - build/stm32l0xx_hal_i2c_ex.lst | 868 -- build/stm32l0xx_hal_i2s.d | 103 - build/stm32l0xx_hal_i2s.lst | 32 - build/stm32l0xx_hal_irda.d | 103 - build/stm32l0xx_hal_irda.lst | 32 - build/stm32l0xx_hal_iwdg.d | 103 - build/stm32l0xx_hal_iwdg.lst | 457 - build/stm32l0xx_hal_lcd.d | 103 - build/stm32l0xx_hal_lcd.lst | 32 - build/stm32l0xx_hal_lptim.d | 103 - build/stm32l0xx_hal_lptim.lst | 32 - build/stm32l0xx_hal_msp.d | 147 - build/stm32l0xx_hal_msp.lst | 676 - build/stm32l0xx_hal_pcd.d | 103 - build/stm32l0xx_hal_pcd.lst | 32 - build/stm32l0xx_hal_pcd_ex.d | 103 - build/stm32l0xx_hal_pcd_ex.lst | 32 - build/stm32l0xx_hal_pwr.d | 103 - build/stm32l0xx_hal_pwr.lst | 2041 --- build/stm32l0xx_hal_pwr_ex.d | 103 - build/stm32l0xx_hal_pwr_ex.lst | 539 - build/stm32l0xx_hal_rcc.d | 103 - build/stm32l0xx_hal_rcc.lst | 4313 ------ build/stm32l0xx_hal_rcc_ex.d | 103 - build/stm32l0xx_hal_rcc_ex.lst | 3456 ----- build/stm32l0xx_hal_rng.d | 103 - build/stm32l0xx_hal_rng.lst | 32 - build/stm32l0xx_hal_rtc.d | 103 - build/stm32l0xx_hal_rtc.lst | 5279 ------- build/stm32l0xx_hal_rtc_ex.d | 103 - build/stm32l0xx_hal_rtc_ex.lst | 5596 -------- build/stm32l0xx_hal_smartcard.d | 103 - build/stm32l0xx_hal_smartcard.lst | 32 - build/stm32l0xx_hal_smartcard_ex.d | 103 - build/stm32l0xx_hal_smartcard_ex.lst | 32 - build/stm32l0xx_hal_smbus.d | 103 - build/stm32l0xx_hal_smbus.lst | 32 - build/stm32l0xx_hal_spi.d | 103 - build/stm32l0xx_hal_spi.lst | 8540 ----------- build/stm32l0xx_hal_tim.d | 103 - build/stm32l0xx_hal_tim.lst | 16567 ---------------------- build/stm32l0xx_hal_tim_ex.d | 103 - build/stm32l0xx_hal_tim_ex.lst | 648 - build/stm32l0xx_hal_tsc.d | 103 - build/stm32l0xx_hal_tsc.lst | 32 - build/stm32l0xx_hal_uart.d | 103 - build/stm32l0xx_hal_uart.lst | 9536 ------------- build/stm32l0xx_hal_uart_ex.d | 103 - build/stm32l0xx_hal_uart_ex.lst | 1291 -- build/stm32l0xx_hal_usart.d | 103 - build/stm32l0xx_hal_usart.lst | 32 - build/stm32l0xx_hal_wwdg.d | 103 - build/stm32l0xx_hal_wwdg.lst | 32 - build/stm32l0xx_hw.d | 142 - build/stm32l0xx_hw.lst | 1305 -- build/stm32l0xx_it.d | 140 - build/stm32l0xx_it.lst | 1162 -- build/stm32l0xx_ll_adc.d | 109 - build/stm32l0xx_ll_adc.lst | 5993 -------- build/stm32l0xx_ll_comp.d | 106 - build/stm32l0xx_ll_comp.lst | 1249 -- build/stm32l0xx_ll_crc.d | 109 - build/stm32l0xx_ll_crc.lst | 574 - build/stm32l0xx_ll_crs.d | 109 - build/stm32l0xx_ll_crs.lst | 873 -- build/stm32l0xx_ll_dac.d | 109 - build/stm32l0xx_ll_dac.lst | 2263 --- build/stm32l0xx_ll_dma.d | 109 - build/stm32l0xx_ll_dma.lst | 3142 ----- build/stm32l0xx_ll_exti.d | 106 - build/stm32l0xx_ll_exti.lst | 1445 -- build/stm32l0xx_ll_gpio.d | 109 - build/stm32l0xx_ll_gpio.lst | 2610 ---- build/stm32l0xx_ll_i2c.d | 109 - build/stm32l0xx_ll_i2c.lst | 3383 ----- build/stm32l0xx_ll_lptim.d | 109 - build/stm32l0xx_ll_lptim.lst | 1486 -- build/stm32l0xx_ll_lpuart.d | 112 - build/stm32l0xx_ll_lpuart.lst | 2394 ---- build/stm32l0xx_ll_pwr.d | 109 - build/stm32l0xx_ll_pwr.lst | 876 -- build/stm32l0xx_ll_rcc.d | 106 - build/stm32l0xx_ll_rcc.lst | 4950 ------- build/stm32l0xx_ll_rng.d | 109 - build/stm32l0xx_ll_rng.lst | 549 - build/stm32l0xx_ll_rtc.d | 109 - build/stm32l0xx_ll_rtc.lst | 6985 --------- build/stm32l0xx_ll_spi.d | 112 - build/stm32l0xx_ll_spi.lst | 3709 ----- build/stm32l0xx_ll_tim.d | 109 - build/stm32l0xx_ll_tim.lst | 6609 --------- build/stm32l0xx_ll_usart.d | 112 - build/stm32l0xx_ll_usart.lst | 3748 ----- build/stm32l0xx_ll_utils.d | 115 - build/stm32l0xx_ll_utils.lst | 5059 ------- build/sx1272.d | 156 - build/sx1272.lst | 9945 ------------- build/sx1272mb2das.d | 150 - build/sx1272mb2das.lst | 925 -- build/system_stm32l0xx.d | 102 - build/system_stm32l0xx.lst | 674 - build/timeServer.d | 141 - build/timeServer.lst | 1694 --- build/utilities.d | 19 - build/utilities.lst | 479 - build/vcom.d | 137 - build/vcom.lst | 1441 -- build/voc_sensor.d | 147 - build/voc_sensor.lst | 741 - junk/i2c.h | 2 +- 204 files changed, 1460 insertions(+), 238474 deletions(-) create mode 100644 Drivers/BME680/bsec_datatypes.h create mode 100644 Drivers/BME680/bsec_interface.h create mode 100644 Drivers/BME680/libalgobsec.a create mode 100644 Src/payload_builder.c create mode 100644 Src/payload_builder.h create mode 100644 Src/payload_parser.c create mode 100644 Src/payload_parser.h create mode 100644 Src/type_coerce.h delete mode 100644 build/LoRaMac.d delete mode 100644 build/LoRaMac.lst delete mode 100644 build/LoRaMacCrypto.d delete mode 100644 build/LoRaMacCrypto.lst delete mode 100644 build/Region.d delete mode 100644 build/Region.lst delete mode 100644 build/RegionCommon.d delete mode 100644 build/RegionCommon.lst delete mode 100644 build/RegionEU868.d delete mode 100644 build/RegionEU868.lst delete mode 100644 build/aes.d delete mode 100644 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+build/ diff --git a/CMakeLists.txt b/CMakeLists.txt index 61dea8b..e681f6a 100755 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -3,7 +3,7 @@ project(proj) set(CMAKE_CXX_STANDARD 11) -add_definitions(-DSTM32L073xx -DUSE_FULL_LL_DRIVER) +add_definitions(-DSTM32L073xx -DUSE_FULL_LL_DRIVER -DUSE_FULL_ASSERT) set(SOURCE_FILES Src/system_stm32l0xx.c @@ -18,6 +18,11 @@ set(SOURCE_FILES Drivers/CMSIS/Include/cmsis_gcc.h Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/core_cm0plus.h + Src/payload_builder.c + Src/payload_builder.h + Src/payload_parser.c + Src/payload_parser.h + Src/type_coerce.h Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/core_cm7.h @@ -364,7 +369,10 @@ set(SOURCE_FILES Drivers/BME680/bme680.h Drivers/BME680/bme680_defs.h Src/voc_sensor.c - Src/voc_sensor.h) + Src/voc_sensor.h + Drivers/BME680/bsec_datatypes.h + Drivers/BME680/bsec_interface.h + ) include_directories(Drivers/CMSIS/Device/ST/STM32L0xx/Include) include_directories(Drivers/CMSIS/Include) diff --git a/Drivers/BME680/bsec_datatypes.h b/Drivers/BME680/bsec_datatypes.h new file mode 100644 index 0000000..226c8ce --- /dev/null +++ b/Drivers/BME680/bsec_datatypes.h @@ -0,0 +1,467 @@ +/* + * Copyright (C) 2015, 2016, 2017 Robert Bosch. All Rights Reserved. + * + * Disclaimer + * + * Common: + * Bosch Sensortec products are developed for the consumer goods industry. They may only be used + * within the parameters of the respective valid product data sheet. Bosch Sensortec products are + * provided with the express understanding that there is no warranty of fitness for a particular purpose. + * They are not fit for use in life-sustaining, safety or security sensitive systems or any system or device + * that may lead to bodily harm or property damage if the system or device malfunctions. In addition, + * Bosch Sensortec products are not fit for use in products which interact with motor vehicle systems. + * The resale and/or use of products are at the purchasers own risk and his own responsibility. The + * examination of fitness for the intended use is the sole responsibility of the Purchaser. + * + * The purchaser shall indemnify Bosch Sensortec from all third party claims, including any claims for + * incidental, or consequential damages, arising from any product use not covered by the parameters of + * the respective valid product data sheet or not approved by Bosch Sensortec and reimburse Bosch + * Sensortec for all costs in connection with such claims. + * + * The purchaser must monitor the market for the purchased products, particularly with regard to + * product safety and inform Bosch Sensortec without delay of all security relevant incidents. + * + * Engineering Samples are marked with an asterisk (*) or (e). Samples may vary from the valid + * technical specifications of the product series. They are therefore not intended or fit for resale to third + * parties or for use in end products. Their sole purpose is internal client testing. The testing of an + * engineering sample may in no way replace the testing of a product series. Bosch Sensortec + * assumes no liability for the use of engineering samples. By accepting the engineering samples, the + * Purchaser agrees to indemnify Bosch Sensortec from all claims arising from the use of engineering + * samples. + * + * Special: + * This software module (hereinafter called "Software") and any information on application-sheets + * (hereinafter called "Information") is provided free of charge for the sole purpose to support your + * application work. The Software and Information is subject to the following terms and conditions: + * + * The Software is specifically designed for the exclusive use for Bosch Sensortec products by + * personnel who have special experience and training. Do not use this Software if you do not have the + * proper experience or training. + * + * This Software package is provided `` as is `` and without any expressed or implied warranties, + * including without limitation, the implied warranties of merchantability and fitness for a particular + * purpose. + * + * Bosch Sensortec and their representatives and agents deny any liability for the functional impairment + * of this Software in terms of fitness, performance and safety. Bosch Sensortec and their + * representatives and agents shall not be liable for any direct or indirect damages or injury, except as + * otherwise stipulated in mandatory applicable law. + * + * The Information provided is believed to be accurate and reliable. Bosch Sensortec assumes no + * responsibility for the consequences of use of such Information nor for any infringement of patents or + * other rights of third parties which may result from its use. No license is granted by implication or + * otherwise under any patent or patent rights of Bosch. Specifications mentioned in the Information are + * subject to change without notice. + * + * It is not allowed to deliver the source code of the Software to any third party without permission of + * Bosch Sensortec. + * + */ + + /** + * @file bsec_datatypes.h + * + * @brief + * Contains the data types used by BSEC + * + */ + +#ifndef __BSEC_DATATYPES_H__ +#define __BSEC_DATATYPES_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/*! + * @addtogroup bsec_interface BSEC C Interface + * @{*/ + +#ifdef __KERNEL__ +#include +#endif +#include +#include + +#define BSEC_MAX_PHYSICAL_SENSOR (6) /*!< Number of physical sensors that need allocated space before calling bsec_update_subscription() */ +#define BSEC_MAX_PROPERTY_BLOB_SIZE (400) /*!< Maximum size (in bytes) of the data blobs returned by bsec_get_state() and bsec_get_configuration() */ +#define BSEC_SAMPLE_RATE_DISABLED (65535.0f) /*!< Sample rate of a disabled sensor */ +#define BSEC_SAMPLE_RATE_ULP (0.0033333f) /*!< Sample rate in case of Ultra Low Power Mode */ +#define BSEC_SAMPLE_RATE_LP (0.33333f) /*!< Sample rate in case of Low Power Mode */ + +#define BSEC_PROCESS_PRESSURE (1 << (BSEC_INPUT_PRESSURE-1)) /*!< process_data bitfield constant for pressure @sa bsec_bme_settings_t */ +#define BSEC_PROCESS_TEMPERATURE (1 << (BSEC_INPUT_TEMPERATURE-1)) /*!< process_data bitfield constant for temperature @sa bsec_bme_settings_t */ +#define BSEC_PROCESS_HUMIDITY (1 << (BSEC_INPUT_HUMIDITY-1)) /*!< process_data bitfield constant for humidity @sa bsec_bme_settings_t */ +#define BSEC_PROCESS_GAS (1 << (BSEC_INPUT_GASRESISTOR-1)) /*!< process_data bitfield constant for gas sensor @sa bsec_bme_settings_t */ +#define BSEC_NUMBER_OUTPUTS (13) /*!< Number of outputs, depending on solution */ +#define BSEC_OUTPUT_INCLUDED (4250095) /*!< bitfield that indicates which outputs are included in the solution */ + +/*! + * @brief Enumeration for input (physical) sensors. + * + * Used to populate bsec_input_t::sensor_id. It is also used in bsec_sensor_configuration_t::sensor_id structs + * returned in the parameter required_sensor_settings of bsec_update_subscription(). + * + * @sa bsec_sensor_configuration_t @sa bsec_input_t + */ +typedef enum +{ + /** + * @brief Pressure sensor output of BMExxx [Pa] + */ + BSEC_INPUT_PRESSURE = 1, + + /** + * @brief Humidity sensor output of BMExxx [%] + * + * @note Relative humidity strongly depends on the temperature (it is measured at). It may required a convertion to + * the temperature outside of the device. + * + * @sa bsec_virtual_sensor_t + */ + BSEC_INPUT_HUMIDITY = 2, + + /** + * @brief Temperature sensor output of BMExxx [degrees Celcius] + * + * @note The BME680 is factory trimmed, thus the temperature sensor of the BME680 is very accurate. + * The temperature value is a very local measurement value and can be influenced by external heat sources. + * + * @sa bsec_virtual_sensor_t + */ + BSEC_INPUT_TEMPERATURE = 3, + + /** + * @brief Gas sensor resistance output of BMExxx [Ohm] + * + * The restistance value changes due to varying VOC concentrations (the higher the concentration of reducing VOCs, + * the lower the resistance and vice versa). + */ + BSEC_INPUT_GASRESISTOR = 4, /*!< */ + + /** + * @brief Additional input for device heat compensation + * + * IAQ solution: The value is substracted from ::BSEC_INPUT_TEMPERATURE to compute + * ::BSEC_OUTPUT_SENSOR_HEAT_COMPENSATED_TEMPERATURE. + * + * ALL solution: Generic heatsource 1 + * + * @sa bsec_virtual_sensor_t + */ + BSEC_INPUT_HEATSOURCE = 14, + + /** + * @brief Additional input for device heat compensation 8 + * + * Generic heatsource 8 + */ + +} bsec_physical_sensor_t; + +/*! + * @brief Enumeration for output (virtual) sensors + * + * Used to populate bsec_output_t::sensor_id. It is also used in bsec_sensor_configuration_t::sensor_id structs + * passed in the parameter requested_virtual_sensors of bsec_update_subscription(). + * + * @sa bsec_sensor_configuration_t @sa bsec_output_t + */ +typedef enum +{ + /** + * @brief Indoor-air-qualiy estimate [0-500] + * + * Indoor-air-quality (IAQ) gives an indication of the relative change in ambient TVOCs detected by BME680. + * + * @note The IAQ scale ranges from 0 (clean air) to 500 (heavily polluted air). During operation, algorithms + * automatically calibrate and adapt themselves to the typical environments where the sensor is operated + * (e.g., home, workplace, inside a car, etc.).This automatic background calibration ensures that users experience + * consistent IAQ performance. The calibration process considers the recent measurement history (typ. up to four + * days) to ensure that IAQ=25 corresponds to typical good air and IAQ=250 indicates typical polluted air. + */ + BSEC_OUTPUT_IAQ_ESTIMATE = 1, + + /** + * @brief Temperature sensor signal [degrees Celcius] + * + * Temperature directly measured by BME680 in degree Celcius. + * + * @note This value is cross-influenced by the sensor heating and device specific heating. + */ + BSEC_OUTPUT_RAW_TEMPERATURE = 6, + + /** + * @brief Pressure sensor signal [Pa] + * + * Pressure directly measured by the BME680 in Pa. + */ + BSEC_OUTPUT_RAW_PRESSURE = 7, + + /** + * @brief Relative humidity sensor signal [%] + * + * Relative humidity directly measured by the BME680 in %. + * + * @note This value is cross-influenced by the sensor heating and device specific heating. + */ + BSEC_OUTPUT_RAW_HUMIDITY = 8, + + /** + * @brief Gas sensor signal [Ohm] + * + * Gas resistance measured directly by the BME680 in Ohm.The restistance value changes due to varying VOC + * concentrations (the higher the concentration of reducing VOCs, the lower the resistance and vice versa). + */ + BSEC_OUTPUT_RAW_GAS = 9, + + /** + * @brief Gas sensor stabilization status [boolean] + * + * Indicates initial stabilization status of the gas sensor element: stabilization is ongoing (0) or stablization + * is finished (1). + */ + BSEC_OUTPUT_STABILIZATION_STATUS = 12, + + /** + * @brief Gas sensor run-in status [boolean] + * + * Indicates power-on stabilization status of the gas sensor element: stabilization is ongoing (0) or stablization + * is finished (1). + */ + BSEC_OUTPUT_RUN_IN_STATUS = 13, + + /** + * @brief Sensor heat compensated temperature [degrees Celcius] + * + * Temperature measured by BME680 which is compensated for the influence of sensor (heater) in degree Celcius. + * The self heating introduced by the heater is depending on the sensor operation mode and the sensor supply voltage. + * + * + * @note IAQ solution: In addition, the temperature output can be compensated by an user defined value + * (::BSEC_INPUT_HEATSOURCE in degrees Celcius), which represents the device specific self-heating. + * + * Thus, the value is calculated as follows: + * * IAQ soultion: ```BSEC_OUTPUT_SENSOR_HEAT_COMPENSATED_TEMPERATURE = ::BSEC_INPUT_TEMPERATURE - function(sensor operation mode, sensor supply voltage) - ::BSEC_INPUT_HEATSOURCE``` + * * other solutions: ```::BSEC_OUTPUT_SENSOR_HEAT_COMPENSATED_TEMPERATURE = ::BSEC_INPUT_TEMPERATURE - function(sensor operation mode, sensor supply voltage)``` + * + * The self-heating in operation mode BSEC_SAMPLE_RATE_ULP is negligible. + * The self-heating in operation mode BSEC_SAMPLE_RATE_LP is supported for 1.8V by default (no config file required). If the BME680 sensor supply voltage is 3.3V, the IoT_LP_3_3V.config shall be used. + */ + BSEC_OUTPUT_SENSOR_HEAT_COMPENSATED_TEMPERATURE = 15, + + /** + * @brief Sensor heat compensated humidity [%] + * + * Relative measured by BME680 which is compensated for the influence of sensor (heater) in %. + * + * It converts the ::BSEC_INPUT_HUMIDITY from temperature ::BSEC_INPUT_TEMPERATURE to temperature + * ::BSEC_OUTPUT_SENSOR_HEAT_COMPENSATED_TEMPERATURE. + * + * @note IAQ soultion: If ::BSEC_INPUT_HEATSOURCE is used for device specific temperature compensation, it will be + * effective for ::BSEC_OUTPUT_SENSOR_HEAT_COMPENSATED_HUMIDITY too. + */ + BSEC_OUTPUT_SENSOR_HEAT_COMPENSATED_HUMIDITY = 16, + +} bsec_virtual_sensor_t; + +/*! + * @brief Enumeration for function return codes + */ +typedef enum +{ + BSEC_OK = 0, /*!< Function execution successful */ + BSEC_E_DOSTEPS_INVALIDINPUT = -1, /*!< Input (physical) sensor id passed to bsec_do_steps() is not in the valid range or not valid for requested virtual sensor */ + BSEC_E_DOSTEPS_VALUELIMITS = -2, /*!< Value of input (physical) sensor signal passed to bsec_do_steps() is not in the valid range */ + BSEC_E_DOSTEPS_DUPLICATEINPUT = -6, /*!< Duplicate input (physical) sensor ids passed as input to bsec_do_steps() */ + BSEC_I_DOSTEPS_NOOUTPUTSRETURNABLE = 2, /*!< No memory allocated to hold return values from bsec_do_steps(), i.e., n_outputs == 0 */ + BSEC_W_DOSTEPS_EXCESSOUTPUTS = 3, /*!< Not enough memory allocated to hold return values from bsec_do_steps(), i.e., n_outputs < maximum number of requested output (virtual) sensors */ + BSEC_W_DOSTEPS_TSINTRADIFFOUTOFRANGE = 4, /*!< Duplicate timestamps passed to bsec_do_steps() */ + BSEC_E_SU_WRONGDATARATE = -10, /*!< The sample_rate of the requested output (virtual) sensor passed to bsec_update_subscription() is zero */ + BSEC_E_SU_SAMPLERATELIMITS = -12, /*!< The sample_rate of the requested output (virtual) sensor passed to bsec_update_subscription() does not match with the sampling rate allowed for that sensor */ + BSEC_E_SU_DUPLICATEGATE = -13, /*!< Duplicate output (virtual) sensor ids requested through bsec_update_subscription() */ + BSEC_E_SU_INVALIDSAMPLERATE = -14, /*!< The sample_rate of the requested output (virtual) sensor passed to bsec_update_subscription() does not fall within the global minimum and maximum sampling rates */ + BSEC_E_SU_GATECOUNTEXCEEDSARRAY = -15, /*!< Not enough memory allocated to hold returned input (physical) sensor data from bsec_update_subscription(), i.e., n_required_sensor_settings < #BSEC_MAX_PHYSICAL_SENSOR */ + BSEC_E_SU_SAMPLINTVLINTEGERMULT = -16, /*!< The sample_rate of the requested output (virtual) sensor passed to bsec_update_subscription() is not correct */ + BSEC_E_SU_MULTGASSAMPLINTVL = -17, /*!< The sample_rate of the requested output (virtual), which requires the gas sensor, is not equal to the sample_rate that the gas sensor is being operated */ + BSEC_E_SU_HIGHHEATERONDURATION = -18, /*!< The duration of one measurement is longer than the requested sampling interval */ + BSEC_W_SU_UNKNOWNOUTPUTGATE = 10, /*!< Output (virtual) sensor id passed to bsec_update_subscription() is not in the valid range; e.g., n_requested_virtual_sensors > actual number of output (virtual) sensors requested */ + BSEC_I_SU_SUBSCRIBEDOUTPUTGATES = 12, /*!< No output (virtual) sensor data were requested via bsec_update_subscription() */ + BSEC_E_PARSE_SECTIONEXCEEDSWORKBUFFER = -32, /*!< n_work_buffer_size passed to bsec_set_[configuration/state]() not sufficient */ + BSEC_E_CONFIG_FAIL = -33, /*!< Configuration failed */ + BSEC_E_CONFIG_VERSIONMISMATCH = -34, /*!< Version encoded in serialized_[settings/state] passed to bsec_set_[configuration/state]() does not match with current version */ + BSEC_E_CONFIG_FEATUREMISMATCH = -35, /*!< Enabled features encoded in serialized_[settings/state] passed to bsec_set_[configuration/state]() does not match with current library implementation */ + BSEC_E_CONFIG_CRCMISMATCH = -36, /*!< serialized_[settings/state] passed to bsec_set_[configuration/state]() is corrupted */ + BSEC_E_CONFIG_EMPTY = -37, /*!< n_serialized_[settings/state] passed to bsec_set_[configuration/state]() is to short to be valid */ + BSEC_E_CONFIG_INSUFFICIENTWORKBUFFER = -38, /*!< Provided work_buffer is not large enough to hold the desired string */ + BSEC_E_CONFIG_INVALIDSTRINGSIZE = -40, /*!< String size encoded in configuration/state strings passed to bsec_set_[configuration/state]() does not match with the actual string size n_serialized_[settings/state] passed to these functions */ + BSEC_E_CONFIG_INSUFFICIENTBUFFER = -41, /*!< String buffer nsufficient to hold serialized data from BSEC library */ + BSEC_E_SET_INVALIDCHANNELIDENTIFIER = -100, /*!< Internal error code */ + BSEC_E_SET_INVALIDLENGTH = -104, /*!< Internal error code */ + BSEC_W_SC_CALL_TIMING_VIOLATION = 100, /*!< Difference between actual and defined sampling intervals of bsec_sensor_control() greater than allowed */ +} bsec_library_return_t; + +/*! + * @brief Structure containing the version information + * + * Please note that configuration and state strings are coded to a specific version and will not be accepted by other + * versions of BSEC. + * + */ +typedef struct +{ + uint8_t major; /**< @brief Major version */ + uint8_t minor; /**< @brief Minor version */ + uint8_t major_bugfix; /**< @brief Major bug fix version */ + uint8_t minor_bugfix; /**< @brief Minor bug fix version */ +} bsec_version_t; + +/*! + * @brief Structure describing an input sample to the library + * + * Each input sample is provided to BSEC as an element in a struct array of this type. Timestamps must be provided + * in nanosecond resolution. Moreover, duplicate timestamps for subsequent samples are not allowed and will results in + * an error code being returned from bsec_do_steps(). + * + * The meaning unit of the signal field are determined by the bsec_input_t::sensor_id field content. Possible + * bsec_input_t::sensor_id values and and their meaning are described in ::bsec_physical_sensor_t. + * + * @sa bsec_physical_sensor_t + * + */ +typedef struct +{ + /** + * @brief Time stamp in nanosecond resolution [ns] + * + * Timestamps must be provided as non-repeating and increasing values. They can have their 0-points at system start or + * at a defined wall-clock time (e.g., 01-Jan-1970 00:00:00) + */ + int64_t time_stamp; + float signal; /*!< @brief Signal sample in the unit defined for the respective sensor_id @sa bsec_physical_sensor_t */ + uint8_t signal_dimensions; /*!< @brief Signal dimensions (reserved for future use, shall be set to 1) */ + uint8_t sensor_id; /*!< @brief Identifier of physical sensor @sa bsec_physical_sensor_t */ +} bsec_input_t; + +/*! + * @brief Structure describing an output sample of the library + * + * Each output sample is returned from BSEC by populating the element of a struct array of this type. The contents of + * the signal field is defined by the supplied bsec_output_t::sensor_id. Possible output + * bsec_output_t::sensor_id values are defined in ::bsec_virtual_sensor_t. + * + * @sa bsec_virtual_sensor_t + */ +typedef struct +{ + int64_t time_stamp; /*!< @brief Time stamp in nanosecond resolution as provided as input [ns] */ + float signal; /*!< @brief Signal sample in the unit defined for the respective bsec_output_t::sensor_id @sa bsec_virtual_sensor_t */ + uint8_t signal_dimensions; /*!< @brief Signal dimensions (reserved for future use, shall be set to 1) */ + uint8_t sensor_id; /*!< @brief Identifier of virtual sensor @sa bsec_virtual_sensor_t */ + + /** + * @brief Accuracy status 0-4 + * + * Some virtual sensors provide a value in the accuracy field. If this is the case, the meaning of the field is as + * follows: + * + * | Name | Value | Accuracy description | + * |----------------------------|-------|-------------------------------------------------------------| + * | UNRELIABLE | 0 | Sensor data is unreliable, the sensor must be calibrated | + * | LOW_ACCURACY | 1 | Low accuracy, sensor should be calibrated | + * | MEDIUM_ACCURACY | 2 | Medium accuracy, sensor calibration may improve performance | + * | HIGH_ACCURACY | 3 | High accuracy | + * + * For example: + * + * - Ambient temperature accuracy is derived from change in the temperature in 1 minute. + * + * | Virtual sensor | Value | Accuracy description | + * |--------------------- |-------|------------------------------------------------------------------------------| + * | Ambient temperature | 0 | The difference in ambient temperature is greater than 4 degree in one minute | + * | | 1 | The difference in ambient temperature is less than 4 degree in one minute | + * | | 2 | The difference in ambient temperature is less than 3 degree in one minute | + * | | 3 | The difference in ambient temperature is less than 2 degree in one minute | + * + * - IAQ accuracy indicator will notify the user when she/he should initiate a calibration process. Calibration is + * performed automatically in the background if the sensor is exposed to clean and polluted air for approximately + * 30 minutes each. + * + * | Virtual sensor | Value | Accuracy description | + * |----------------------------|-------|-----------------------------------------------------------------| + * | IAQ | 0 | The sensor is not yet stablized or in a run-in status | + * | | 1 | Calibration required | + * | | 2 | Calibration on-going | + * | | 3 | Calibration is done, now IAQ estimate achieves best perfomance | + */ + uint8_t accuracy; +} bsec_output_t; + +/*! + * @brief Structure describing sample rate of physical/virtual sensors + * + * This structure is used together with bsec_update_subscription() to enable BSEC outputs and to retrieve information + * about the sample rates used for BSEC inputs. + */ +typedef struct +{ + /** + * @brief Sample rate of the virtual or physical sensor in Hertz [Hz] + * + * Only supported sample rates are allowed. + */ + float sample_rate; + + /** + * @brief Identifier of the virtual or physical sensor + * + * The meaning of this field changes depening on whether the structs are as the requested_virtual_sensors argument + * to bsec_update_subscription() or as the required_sensor_settings argument. + * + * | bsec_update_subscription() argument | sensor_id field interpretation | + * |-------------------------------------|--------------------------------| + * | requested_virtual_sensors | ::bsec_virtual_sensor_t | + * | required_sensor_settings | ::bsec_physical_sensor_t | + * + * @sa bsec_physical_sensor_t + * @sa bsec_virtual_sensor_t + */ + uint8_t sensor_id; +} bsec_sensor_configuration_t; + +/*! + * @brief Structure returned by bsec_sensor_control() to configure BMExxx sensor + * + * This structure contains settings that must be used to configure the BMExxx to perform a forced-mode measurement. + * A measurement should only be executed if bsec_bme_settings_t::trigger_measurement is 1. If so, the oversampling + * settings for temperature, humidity, and pressure should be set to the provided settings provided in + * bsec_bme_settings_t::temperature_oversampling, bsec_bme_settings_t::humidity_oversampling, and + * bsec_bme_settings_t::pressure_oversampling, respectively. + * + * In case of bsec_bme_settings_t::run_gas = 1, the gas sensor must be enabled with the provided + * bsec_bme_settings_t::heater_temperature and bsec_bme_settings_t::heating_duration settings. + */ +typedef struct +{ + int64_t next_call; /*!< @brief Time stamp of the next call of the sensor_control*/ + uint32_t process_data; /*!< @brief Bit field describing which data is to be passed to bsec_do_steps() @sa BSEC_PROCESS_* */ + uint16_t heater_temperature; /*!< @brief Heating temperature [degrees Celsius] */ + uint16_t heating_duration; /*!< @brief Heating duration [ms] */ + uint8_t run_gas; /*!< @brief Enable gas measurements [0/1] */ + uint8_t pressure_oversampling; /*!< @brief Pressure oversampling settings [0-5] */ + uint8_t temperature_oversampling; /*!< @brief Temperature oversampling settings [0-5] */ + uint8_t humidity_oversampling; /*!< @brief Humidity oversampling settings [0-5] */ + uint8_t trigger_measurement; /*!< @brief Trigger a forced measurement with these settings now [0/1] */ +} bsec_bme_settings_t; + +/* internal defines and backward compatbility */ +#define BSEC_STRUCT_NAME Bsec /*!< Internal struct name */ + +/*@}*/ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/Drivers/BME680/bsec_interface.h b/Drivers/BME680/bsec_interface.h new file mode 100644 index 0000000..61e8c19 --- /dev/null +++ b/Drivers/BME680/bsec_interface.h @@ -0,0 +1,564 @@ +/* + * Copyright (C) 2015, 2016, 2017 Robert Bosch. All Rights Reserved. + * + * Disclaimer + * + * Common: + * Bosch Sensortec products are developed for the consumer goods industry. They may only be used + * within the parameters of the respective valid product data sheet. Bosch Sensortec products are + * provided with the express understanding that there is no warranty of fitness for a particular purpose. + * They are not fit for use in life-sustaining, safety or security sensitive systems or any system or device + * that may lead to bodily harm or property damage if the system or device malfunctions. In addition, + * Bosch Sensortec products are not fit for use in products which interact with motor vehicle systems. + * The resale and/or use of products are at the purchasers own risk and his own responsibility. The + * examination of fitness for the intended use is the sole responsibility of the Purchaser. + * + * The purchaser shall indemnify Bosch Sensortec from all third party claims, including any claims for + * incidental, or consequential damages, arising from any product use not covered by the parameters of + * the respective valid product data sheet or not approved by Bosch Sensortec and reimburse Bosch + * Sensortec for all costs in connection with such claims. + * + * The purchaser must monitor the market for the purchased products, particularly with regard to + * product safety and inform Bosch Sensortec without delay of all security relevant incidents. + * + * Engineering Samples are marked with an asterisk (*) or (e). Samples may vary from the valid + * technical specifications of the product series. They are therefore not intended or fit for resale to third + * parties or for use in end products. Their sole purpose is internal client testing. The testing of an + * engineering sample may in no way replace the testing of a product series. Bosch Sensortec + * assumes no liability for the use of engineering samples. By accepting the engineering samples, the + * Purchaser agrees to indemnify Bosch Sensortec from all claims arising from the use of engineering + * samples. + * + * Special: + * This software module (hereinafter called "Software") and any information on application-sheets + * (hereinafter called "Information") is provided free of charge for the sole purpose to support your + * application work. The Software and Information is subject to the following terms and conditions: + * + * The Software is specifically designed for the exclusive use for Bosch Sensortec products by + * personnel who have special experience and training. Do not use this Software if you do not have the + * proper experience or training. + * + * This Software package is provided `` as is `` and without any expressed or implied warranties, + * including without limitation, the implied warranties of merchantability and fitness for a particular + * purpose. + * + * Bosch Sensortec and their representatives and agents deny any liability for the functional impairment + * of this Software in terms of fitness, performance and safety. Bosch Sensortec and their + * representatives and agents shall not be liable for any direct or indirect damages or injury, except as + * otherwise stipulated in mandatory applicable law. + * + * The Information provided is believed to be accurate and reliable. Bosch Sensortec assumes no + * responsibility for the consequences of use of such Information nor for any infringement of patents or + * other rights of third parties which may result from its use. No license is granted by implication or + * otherwise under any patent or patent rights of Bosch. Specifications mentioned in the Information are + * subject to change without notice. + * + * It is not allowed to deliver the source code of the Software to any third party without permission of + * Bosch Sensortec. + * + */ + /*! + * + * @file bsec_interface.h + * + * @brief + * Contains the API for BSEC + * + */ + + +#ifndef __BSEC_INTERFACE_H__ +#define __BSEC_INTERFACE_H__ + +#include "bsec_datatypes.h" + +#ifdef __cplusplus + extern "C" { +#endif + + + /*! @addtogroup bsec_interface BSEC C Interface + * @brief Interfaces of BSEC signal processing library + * + * ### Interface usage + * + * The following provides a short overview on the typical operation sequence for BSEC. + * + * - Initialization of the library + * + * | Steps | Function | + * |---------------------------------------------------------------------|--------------------------| + * | Initialization of library | bsec_init() | + * | Update configuration settings (optional) | bsec_set_configuration() | + * | Restore the state of the library (optional) | bsec_set_state() | + * + * + * - The following function is called to enable output signals and define their sampling rate / operation mode. + * + * | Steps | Function | + * |---------------------------------------------|----------------------------| + * | Enable library outputs with specified mode | bsec_update_subscription() | + * + * + * - This table describes the main processing loop. + * + * | Steps | Function | + * |-------------------------------------------|----------------------------------| + * | Retrieve sensor settings to be used | bsec_sensor_control() | + * | Configure sensor and trigger measurement | See BME680 API and example codes | + * | Read results from sensor | See BME680 API and example codes | + * | Perform signal processing | bsec_do_steps() | + * + * + * - Before shutting down the system, the current state of BSEC can be retrieved and can then be used during + * re-initalization to continue processing. + * + * | Steps | Function | + * |----------------------------------------|-------------------| + * | To retrieve the current library state | bsec_get_state() | + * + * + * + * ### Configuration and state + * + * Values of variables belonging to a BSEC instance are divided into two groups: + * - Values **not updated by processing** of signals belong to the **configuration group**. If available, BSEC can be + * configured before use with a customer specific configuration string. + * - Values **updated during processing** are member of the **state group**. Saving and restoring of the state of BSEC + * is necessary to maintain previously estimated sensor models and baseline information which is important for best + * performance of the gas sensor outputs. + * + * @note BSEC library consists of adaptive algorithms which models the gas sensor which improves its performance over + * the time. These will be lost if library is initialised due to system reset. In order to avoid this situation + * library state shall be stored in non volatile memory so that it can be loaded after system reset. + * + * + * @{ + */ + + +/*! + * @brief Return the version information of BSEC library + * + * @param [out] bsec_version_p pointer to struct which is to be populated with the version information + * + * @return Zero if successful, otherwise an error code + * + * See also: bsec_version_t + * + \code{.c} + // Example // + bsec_version_t version; + bsec_get_version(&version); + printf("BSEC version: %d.%d.%d.%d",version.major, version.minor, version.major_bugfix, version.minor_bugfix); + + \endcode +*/ + +bsec_library_return_t bsec_get_version(bsec_version_t * bsec_version_p); + + +/*! + * @brief Initialize the library + * + * Initialization and reset of BSEC is performed by calling bsec_init(). Calling this function sets up the relation + * among all internal modules, initializes run-time dependent library states and resets the configuration and state + * of all BSEC signal processing modules to defaults. + * + * Before any further use, the library must be initialized. This ensure that all memory and states are in defined + * conditions prior to processing any data. + * + * @return Zero if successful, otherwise an error code + * + \code{.c} + + // Initialize BSEC library before further use + bsec_init(); + + \endcode +*/ + +bsec_library_return_t bsec_init(void); + +/*! + * @brief Subscribe to library virtual sensors outputs + * + * Use bsec_update_subscription() to instruct BSEC which of the processed output signals are requested at which sample rates. + * See ::bsec_virtual_sensor_t for available library outputs. + * + * Based on the requested virtual sensors outputs, BSEC will provide information about the required physical sensor input signals + * (see ::bsec_physical_sensor_t) with corresponding sample rates. This information is purely informational as bsec_sensor_control() + * will ensure the sensor is operated in the required manner. To disable a virtual sensor, set the sample rate to BSEC_SAMPLE_RATE_DISABLED. + * + * The subscription update using bsec_update_subscription() is apart from the signal processing one of the the most + * important functions. It allows to enable the desired library outputs. The function determines which physical input + * sensor signals are required at which sample rate to produce the virtual output sensor signals requested by the user. + * When this function returns with success, the requested outputs are called subscribed. A very important feature is the + * retaining of already subscribed outputs. Further outputs can be requested or disabled both individually and + * group-wise in addition to already subscribed outputs without changing them unless a change of already subscribed + * outputs is requested. + * + * @note The state of the library concerning the subscribed outputs cannot be retained among reboots. + * + * The interface of bsec_update_subscription() requires the usage of arrays of sensor configuration structures. + * Such a structure has the fields sensor identifier and sample rate. These fields have the properties: + * - Output signals of virtual sensors must be requested using unique identifiers (Member of ::bsec_virtual_sensor_t) + * - Different sets of identifiers are available for inputs of physical sensors and outputs of virtual sensors + * - Identifiers are unique values defined by the library, not from external + * - Sample rates must be provided as value of + * - An allowed sample rate for continuously sampled signals + * - 65535.0f (BSEC_SAMPLE_RATE_DISABLED) to turn off outputs and identify disabled inputs + * + * @note The same sensor identifiers are also used within the functions bsec_do_steps(). + * + * The usage principles of bsec_update_subscription() are: + * - Differential updates (i.e., only asking for outputs that the user would like to change) is supported. + * - Invalid requests of outputs are ignored. Also if one of the requested outputs is unavailable, all the requests + * are ignored. At the same time, a warning is returned. + * - To disable BSEC, all outputs shall be turned off. Only enabled (subscribed) outputs have to be disabled while + * already disabled outputs do not have to be disabled explicitly. + * + * @param[in] requested_virtual_sensors Pointer to array of requested virtual sensor (output) configurations for the library + * @param[in] n_requested_virtual_sensors Number of virtual sensor structs pointed by requested_virtual_sensors + * @param[out] required_sensor_settings Pointer to array of required physical sensor configurations for the library + * @param[in,out] n_required_sensor_settings [in] Size of allocated required_sensor_settings array, [out] number of sensor configurations returned + * + * @return Zero when successful, otherwise an error code + * + * @sa bsec_sensor_configuration_t + * @sa bsec_physical_sensor_t + * @sa bsec_virtual_sensor_t + * + \code{.c} + // Example // + + // Change 3 virtual sensors (switch IAQ and raw temperature -> on / pressure -> off) + bsec_sensor_configuration_t requested_virtual_sensors[3]; + uint8_t n_requested_virtual_sensors = 3; + + requested_virtual_sensors[0].sensor_id = BSEC_OUTPUT_IAQ_ESTIMATE; + requested_virtual_sensors[0].sample_rate = BSEC_SAMPLE_RATE_ULP; + requested_virtual_sensors[1].sensor_id = BSEC_OUTPUT_RAW_TEMPERATURE; + requested_virtual_sensors[1].sample_rate = BSEC_SAMPLE_RATE_ULP; + requested_virtual_sensors[2].sensor_id = BSEC_OUTPUT_RAW_PRESSURE; + requested_virtual_sensors[2].sample_rate = BSEC_SAMPLE_RATE_DISABLED; + + // Allocate a struct for the returned phyisical sensor settings + bsec_sensor_configuration_t required_sensor_settings[BSEC_MAX_PHYSICAL_SENSOR]; + uint8_t n_required_sensor_settings = BSEC_MAX_PHYSICAL_SENSOR; + + // Call bsec_update_subscription() to enable/disable the requested virtual sensors + bsec_update_subscription(requested_virtual_sensors, n_requested_virtual_sensors, required_sensor_settings, &n_required_sensor_settings); + \endcode + * + */ +bsec_library_return_t bsec_update_subscription(const bsec_sensor_configuration_t * const requested_virtual_sensors, + const uint8_t n_requested_virtual_sensors, bsec_sensor_configuration_t * required_sensor_settings, + uint8_t * n_required_sensor_settings); + + +/*! + * @brief Main signal processing function of BSEC + * + * + * Processing of the input signals and returning of output samples is performed by bsec_do_steps(). + * - The samples of all library inputs must be passed with unique identifiers representing the input signals from + * physical sensors where the order of these inputs can be chosen arbitrary. However, all input have to be provided + * within the same time period as they are read. A sequential provision to the library might result in undefined + * behaviour. + * - The samples of all library outputs are returned with unique identifiers corresponding to the output signals of + * virtual sensors where the order of the returned outputs may be arbitrary. + * - The samples of all input as well as output signals of physical as well as virtual sensors use the same + * representation in memory with the following fields: + * - Sensor identifier: + * - For inputs: required to identify the input signal from a physical sensor + * - For output: overwritten by bsec_do_steps() to identify the returned signal from a virtual sensor + * - Time stamp of the sample + * + * Calling bsec_do_steps() requires the samples of the input signals to be provided along with their time stamp when + * they are recorded and only when they are acquired. Repetition of samples with the same time stamp are ignored and + * result in a warning. Repetition of values of samples which are not acquired anew by a sensor result in deviations + * of the computed output signals. Concerning the returned output samples, an important feature is, that a value is + * returned for an output only when a new occurrence has been computed. A sample of an output signal is returned only + * once. + * + * + * @param[in] inputs Array of input data samples. Each array element represents a sample of a different physical sensor. + * @param[in] n_inputs Number of passed input data structs. + * @param[out] outputs Array of output data samples. Each array element represents a sample of a different virtual sensor. + * @param[in,out] n_outputs [in] Number of allocated output structs, [out] number of outputs returned + * + * @return Zero when successful, otherwise an error code + * + + \code{.c} + // Example // + + // Allocate input and output memory + bsec_input_t input[3]; + uint8_t n_input = 3; + bsec_output_t output[2]; + uint8_t n_output=2; + + bsec_library_return_t status; + + // Populate the input structs, assuming the we have timestamp (ts), + // gas sensor resistance (R), temperature (T), and humidity (rH) available + // as input variables + input[0].sensor_id = BSEC_INPUT_GASRESISTOR; + input[0].signal = R; + input[0].time_stamp= ts; + input[1].sensor_id = BSEC_INPUT_TEMPERATURE; + input[1].signal = T; + input[1].time_stamp= ts; + input[2].sensor_id = BSEC_INPUT_HUMIDITY; + input[2].signal = rH; + input[2].time_stamp= ts; + + + // Invoke main processing BSEC function + status = bsec_do_steps( input, n_input, output, &n_output ); + + // Iterature through the BSEC output data, if the call succeeded + if(status == BSEC_OK) + { + for(int i = 0; i < n_output; i++) + { + switch(output[i].sensor_id) + { + case BSEC_OUTPUT_IAQ_ESTIMATE: + // Retrieve the IAQ results from output[i].signal + // and do something with the data + break; + case BSEC_OUTPUT_AMBIENT_TEMPERATURE: + // Retrieve the ambient temperature results from output[i].signal + // and do something with the data + break; + + } + } + } + + \endcode + */ + +bsec_library_return_t bsec_do_steps(const bsec_input_t * const inputs, const uint8_t n_inputs, bsec_output_t * outputs, uint8_t * n_outputs); + + +/*! + * @brief Reset a particular virtual sensor output + * + * This function allows specific virtual sensor outputs to be reset. The meaning of "reset" depends on the specific + * output. In case of the IAQ output, reset means zeroing the output to the current ambient conditions. + * + * @param[in] sensor_id Virtual sensor to be reset + * + * @return Zero when successful, otherwise an error code + * + * + \code{.c} + // Example // + bsec_reset_output(BSEC_OUTPUT_IAQ_ESTIMATE); + + \endcode + */ + +bsec_library_return_t bsec_reset_output(uint8_t sensor_id); + + +/*! + * @brief Update algorithm configuration parameters + * + * BSEC uses a default configuration for the modules and common settings. The initial configuration can be customized + * by bsec_set_configuration(). This is an optional step. + * + * @note A work buffer with sufficient size is required and has to be provided by the function caller to decompose + * the serialization and apply it to the library and its modules. Please use #BSEC_MAX_PROPERTY_BLOB_SIZE for allotting + * the required size. + * + * @param[in] serialized_settings Settings serialized to a binary blob + * @param[in] n_serialized_settings Size of the settings blob + * @param[in,out] work_buffer Work buffer used to parse the blob + * @param[in] n_work_buffer_size Length of the work buffer available for parsing the blob + * + * @return Zero when successful, otherwise an error code + * + \code{.c} + // Example // + + // Allocate variables + uint8_t serialized_settings[BSEC_MAX_PROPERTY_BLOB_SIZE]; + uint32_t n_serialized_settings_max = BSEC_MAX_PROPERTY_BLOB_SIZE; + uint8_t work_buffer[BSEC_MAX_PROPERTY_BLOB_SIZE]; + uint32_t n_work_buffer = BSEC_MAX_PROPERTY_BLOB_SIZE; + + // Here we will load a provided config string into serialized_settings + + // Apply the configuration + bsec_set_configuration(serialized_settings, n_serialized_settings_max, work_buffer, n_work_buffer); + + \endcode + */ + +bsec_library_return_t bsec_set_configuration(const uint8_t * const serialized_settings, + const uint32_t n_serialized_settings, uint8_t * work_buffer, + const uint32_t n_work_buffer_size); + + +/*! + * @brief Restore the internal state of the library + * + * BSEC uses a default state for all signal processing modules and the BSEC module. To ensure optimal performance, + * especially of the gas sensor functionality, it is recommended to retrieve the state using bsec_get_state() + * before unloading the library, storing it in some form of non-volatile memory, and setting it using bsec_set_state() + * before resuming further operation of the library. + * + * @note A work buffer with sufficient size is required and has to be provided by the function caller to decompose the + * serialization and apply it to the library and its modules. Please use #BSEC_MAX_PROPERTY_BLOB_SIZE for allotting the + * required size. + * + * @param[in] serialized_state States serialized to a binary blob + * @param[in] n_serialized_state Size of the state blob + * @param[in,out] work_buffer Work buffer used to parse the blob + * @param[in] n_work_buffer_size Length of the work buffer available for parsing the blob + * + * @return Zero when successful, otherwise an error code + * + \code{.c} + // Example // + + // Allocate variables + uint8_t serialized_state[BSEC_MAX_PROPERTY_BLOB_SIZE]; + uint32_t n_serialized_state = BSEC_MAX_PROPERTY_BLOB_SIZE; + uint8_t work_buffer_state[BSEC_MAX_PROPERTY_BLOB_SIZE]; + uint32_t n_work_buffer_size = BSEC_MAX_PROPERTY_BLOB_SIZE; + + // Here we will load a state string from a previous use of BSEC + + // Apply the previous state to the current BSEC session + bsec_set_state(serialized_state, n_serialized_state, work_buffer_state, n_work_buffer_size); + + \endcode +*/ + +bsec_library_return_t bsec_set_state(const uint8_t * const serialized_state, const uint32_t n_serialized_state, + uint8_t * work_buffer, const uint32_t n_work_buffer_size); + + +/*! + * @brief Retrieve the current library configuration + * + * BSEC allows to retrieve the current configuration using bsec_get_configuration(). Returns a binary blob encoding + * the current configuration parameters of the library in a format compatible with bsec_set_configuration(). + * + * @note The function bsec_get_configuration() is required to be used for debugging purposes only. + * @note A work buffer with sufficient size is required and has to be provided by the function caller to decompose the + * serialization and apply it to the library and its modules. Please use #BSEC_MAX_PROPERTY_BLOB_SIZE for allotting the + * required size. + * + * + * @param[in] config_id Identifier for a specific set of configuration settings to be returned; + * shall be zero to retrieve all configuration settings. + * @param[out] serialized_settings Buffer to hold the serialized config blob + * @param[in] n_serialized_settings_max Maximum available size for the serialized settings + * @param[in,out] work_buffer Work buffer used to parse the binary blob + * @param[in] n_work_buffer Length of the work buffer available for parsing the blob + * @param[out] n_serialized_settings Actual size of the returned serialized configuration blob + * + * @return Zero when successful, otherwise an error code + * + \code{.c} + // Example // + + // Allocate variables + uint8_t serialized_settings[BSEC_MAX_PROPERTY_BLOB_SIZE]; + uint32_t n_serialized_settings_max = BSEC_MAX_PROPERTY_BLOB_SIZE; + uint8_t work_buffer[BSEC_MAX_PROPERTY_BLOB_SIZE]; + uint32_t n_work_buffer = BSEC_MAX_PROPERTY_BLOB_SIZE; + uint32_t n_serialized_settings = 0; + + // Configuration of BSEC algorithm is stored in 'serialized_settings' + bsec_get_configuration(0, serialized_settings, n_serialized_settings_max, work_buffer, n_work_buffer, &n_serialized_settings); + + \endcode + */ + +bsec_library_return_t bsec_get_configuration(const uint8_t config_id, uint8_t * serialized_settings, const uint32_t n_serialized_settings_max, + uint8_t * work_buffer, const uint32_t n_work_buffer, uint32_t * n_serialized_settings); + + +/*! + *@brief Retrieve the current internal library state + * + * BSEC allows to retrieve the current states of all signal processing modules and the BSEC module using + * bsec_get_state(). This allows a restart of the processing after a reboot of the system by calling bsec_set_state(). + * + * @note A work buffer with sufficient size is required and has to be provided by the function caller to decompose the + * serialization and apply it to the library and its modules. Please use #BSEC_MAX_PROPERTY_BLOB_SIZE for allotting the + * required size. + * + * + * @param[in] state_set_id Identifier for a specific set of states to be returned; shall be + * zero to retrieve all states. + * @param[out] serialized_state Buffer to hold the serialized config blob + * @param[in] n_serialized_state_max Maximum available size for the serialized states + * @param[in,out] work_buffer Work buffer used to parse the blob + * @param[in] n_work_buffer Length of the work buffer available for parsing the blob + * @param[out] n_serialized_state Actual size of the returned serialized blob + * + * @return Zero when successful, otherwise an error code + * + \code{.c} + // Example // + + // Allocate variables + uint8_t serialized_state[BSEC_MAX_PROPERTY_BLOB_SIZE]; + uint32_t n_serialized_state_max=BSEC_MAX_PROPERTY_BLOB_SIZE; + uint32_t n_serialized_state = BSEC_MAX_PROPERTY_BLOB_SIZE; + uint8_t work_buffer_state[BSEC_MAX_PROPERTY_BLOB_SIZE]; + uint32_t n_work_buffer_size = BSEC_MAX_PROPERTY_BLOB_SIZE; + + // Algorithm state is stored in 'serialized_state' + bsec_get_state(0, serialized_state, n_serialized_state_max, work_buffer_state, n_work_buffer_size, &n_serialized_state); + + \endcode + */ + +bsec_library_return_t bsec_get_state(const uint8_t state_set_id, uint8_t * serialized_state, + const uint32_t n_serialized_state_max, uint8_t * work_buffer, const uint32_t n_work_buffer, + uint32_t * n_serialized_state); + +/*! + * @brief Retrieve BMExxx sensor instructions + * + * The bsec_sensor_control() interface is a key feature of BSEC, as it allows an easy way for the signal processing + * library to control the operation of the BME sensor. This is important since gas sensor behaviour is mainly + * determined by how the integrated heater is configured. To ensure an easy integration of BSEC into any system, + * bsec_sensor_control() will provide the caller with information about the current sensor configuration that is + * necessary to fulfill the input requirements derived from the current outputs requested via + * bsec_update_subscription(). + * + * In practice the use of this function shall be as follows: + * - Call bsec_sensor_control() which returns a bsec_bme_settings_t struct. + * - Based on the information contained in this struct, the sensor is configured and a forced-mode measurement is + * triggered if requested by bsec_sensor_control(). + * - Once this forced-mode measurement is complete, the signals specified in this struct shall be passed to + * bsec_do_steps() to perform the signal processing. + * - After processing, the process should sleep until the bsec_bme_settings_t::next_call timestamp is reached. + * + * + * @param [in] time_stamp Current timestamp in [ns] + * @param[out] sensor_settings Settings to be passed to API to operate sensor at this time instance + * + * @return Zero when successful, otherwise an error code + */ + +bsec_library_return_t bsec_sensor_control(const int64_t time_stamp, bsec_bme_settings_t *sensor_settings); + +/*@}*/ //BSEC Interface + +#ifdef __cplusplus + } +#endif + +#endif /* __BSEC_INTERFACE_H__ */ diff --git a/Drivers/BME680/libalgobsec.a b/Drivers/BME680/libalgobsec.a new file mode 100644 index 0000000000000000000000000000000000000000..1c4165e2349193479b4e1d5fe364e81c654eefad GIT binary patch literal 218762 zcmeFa349dCnKxYBGt!JkClbd92HYbC819h}LfFI}ji4=Y83T5(jjho!LIXMm9az|o zB@Wv%_Bz731hx~LI0;}UONhy4-wj!OBx@2UD{zvvgOgWwh;g#c#@;v%@#`;opQpO2 zr@A#Wni2Vu{e7PbTGjume?4_{b#+&DJJQ={KP)3sqT`(}5=l5@l1}8@Mk2d^OXT9eXveBnB5(REk?SCC=hZ|$ z0RExx6ZzOKBA+fx?)b%OBENGjk^j$s6HC@FiN)1OEc4eB%ksB~rK+r^refo|n)!HcQr#(u57!rwFA2dT)r4QXqRXQ>KH+QXqKsPU4&vle08gS zp@oPp+OJsv^v+OwV{LtCWeD$qP-{KwpCb}zm5P=~E0Ea!HOWa{)!G^E++9O^XGLqn zO6UOW2GB&Zcs&$26%DK*>uN?ztutb#uOBtN&WM@5Vbt_GBWC*0sOfb^%=C?;rq>xU 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zO_{bzqbbt{HJUQ*cR_R9%j;66ouri~EyH5a&U^SL_vWisH*NYMFCYwBd6M0+M2g#-_hk#_9GRPOvt%RC1bISG-W*%RGMqFb=)e@$;hQI zLC~yJ%rqVsA+74b;vnSB9>fF5rS#KAd37MUv`@qF9(YiGHRoTs=Ry!}~KJlYT*jua3>K{?(O5 z?eVtpyWq;At}N=xqOL4zd=?xcn=6aPeAPP|#+5}~SycOU^mEGS&auYrA48NyDbt-y z7Tqt0gw`L*qWd(OBl$0CG-XlF|HQ&;Cv>}F%AyaTkYin5m$K+U^QRbA|1)Gx45J4t zZ{pO`(!UsQDMhi8!o(>SDNF3WTE{H~os2w5 zzu)oX$qJmW>VTvuLI>i%9BRxO?Q2SsUecH zTTOS@!n$i=-LW59KG(h`yk zCm#f!W8HUKp2RSE&;ljSJv}8#-c+h0CFP0JRHnSb?klQ`C6XzbujD9VhbmJp1dr22 grflR5*+Jc-DO1jXO!=|`AyzoXx=i_=1Ty9S1JGR~fB*mh literal 0 HcmV?d00001 diff --git a/Inc/hw_i2c.h b/Inc/hw_i2c.h index 5eff566..c14deac 100644 --- a/Inc/hw_i2c.h +++ b/Inc/hw_i2c.h @@ -58,7 +58,8 @@ extern I2C_HandleTypeDef hi2c1; /* USER CODE END Private defines */ -void MX_I2C1_Init(void); +void HW_I2C_Init(void); +void HW_I2C_DeInit(void); /* USER CODE BEGIN Prototypes */ diff --git a/Makefile b/Makefile index 1bdfab4..0029dec 100644 --- a/Makefile +++ b/Makefile @@ -127,6 +127,8 @@ C_SOURCES = \ ./Src/system_stm32l0xx.c \ ./Src/stm32l0xx_it.c \ Src/voc_sensor.c \ +Src/payload_builder.c \ +Src/payload_parser.c \ Drivers/BME680/bme680.c @@ -206,7 +208,7 @@ ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffuncti CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections ifeq ($(DEBUG), 1) -CFLAGS += -ggdb -g -gdwarf-2 +CFLAGS += -ggdb -g -gdwarf-2 -DDEBUG=1 endif @@ -232,9 +234,9 @@ LDSCRIPT = STM32L073RZTx_FLASH.ld # libraries LIBS = -lc -lm -lnosys +# Drivers/BME680/libalgobsec.a LIBDIR = -LDFLAGS = $(MCU) -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections -# -specs=nano.specs +LDFLAGS = $(MCU) -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections -specs=nano.specs # default action: build all all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin diff --git a/Src/hw_i2c.c b/Src/hw_i2c.c index 834e4cd..91c1c93 100644 --- a/Src/hw_i2c.c +++ b/Src/hw_i2c.c @@ -63,7 +63,7 @@ static inline uint32_t setupTiming(void) I2C_HandleTypeDef hi2c1; /* I2C1 init function */ -void MX_I2C1_Init(void) +void HW_I2C_Init(void) { hi2c1.Instance = I2C1; hi2c1.Init.Timing = setupTiming(); //0x00000708; @@ -95,6 +95,13 @@ void MX_I2C1_Init(void) } + +/* I2C1 init function */ +void HW_I2C_DeInit(void) +{ + HAL_I2C_DeInit(&hi2c1); +} + void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) { diff --git a/Src/main.c b/Src/main.c index 4f07c41..a5574be 100755 --- a/Src/main.c +++ b/Src/main.c @@ -60,7 +60,6 @@ Maintainer: Miguel Luis, Gregory Cristian and Wael Guibene /* Includes ------------------------------------------------------------------*/ #include -#include #include "stm32l0xx_ll_i2c.h" #include "hw.h" #include "low_power.h" @@ -69,6 +68,7 @@ Maintainer: Miguel Luis, Gregory Cristian and Wael Guibene #include "timeServer.h" #include "vcom.h" #include "voc_sensor.h" +#include "payload_builder.h" /* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ @@ -76,9 +76,17 @@ Maintainer: Miguel Luis, Gregory Cristian and Wael Guibene #define LPP_APP_PORT 99 /*! - * Defines the application data transmission duty cycle. 5s, value in [ms]. + * Defines the application data transmission duty cycle. value in [ms]. */ -#define APP_TX_DUTYCYCLE 10000 +#if 0 +#define APP_TX_DUTYCYCLE (2*60*1000) +#define MEAS_TX_DELAY (15*1000) // offset of the first measurement (negative) to throw it off from sync with TX +#define MEAS_INTERVAL_MS (1*60*1000) +#else +#define APP_TX_DUTYCYCLE (15*60*1000) +#define MEAS_TX_DELAY ( 15*1000) // offset of the first measurement (negative) to throw it off from sync with TX +#define MEAS_INTERVAL_MS ( 5*60*1000) +#endif /*! * LoRaWAN Adaptive Data Rate * @note Please note that when ADR is enabled the end-device should be static @@ -92,7 +100,7 @@ Maintainer: Miguel Luis, Gregory Cristian and Wael Guibene * LoRaWAN application port * @note do not use 224. It is reserved for certification */ -#define LORAWAN_APP_PORT 42 +#define LORAWAN_APP_PORT 68 //2 /*! * Number of trials for the join request. @@ -132,193 +140,33 @@ static void OnTimerLedEvent( void ); *Initialises the Lora Parameters */ static LoRaParam_t LoRaParamInit = {TX_ON_TIMER, - APP_TX_DUTYCYCLE, - CLASS_A, - LORAWAN_ADR_ON, - DR_0, - LORAWAN_PUBLIC_NETWORK, - JOINREQ_NBTRIALS}; + APP_TX_DUTYCYCLE, + CLASS_A, + (bool)LORAWAN_ADR_ON, + DR_0, + (bool)LORAWAN_PUBLIC_NETWORK, + JOINREQ_NBTRIALS}; /* Private functions ---------------------------------------------------------*/ -#if 0 -typedef enum { - i2cSpeed_std, - i2cSpeed_fast, - i2cSpeed_fastPlus, - i2cSpeed_count, -} i2cSpeed_t; - -void i2cInit(I2C_TypeDef *i2c, i2cSpeed_t spd); - -#define I2C_7BIT_ADDR (0 << 31) -#define I2C_10BIT_ADDR (1 << 31) - -// Returns number of bytes written -uint32_t i2cWrite(I2C_TypeDef *i2c, uint32_t addr, uint8_t *txBuffer, - uint32_t len); - -// Returns number of bytes read -uint32_t i2cRead(I2C_TypeDef *i2c, uint8_t addr, uint8_t *rxBuffer, - uint32_t numBytes); - -#define I2C_READ 0 -#define I2C_WRITE 1 - -static uint32_t setupTiming(i2cSpeed_t spd, uint32_t clockFreq) { - (void) spd; - (void) clockFreq; - uint32_t presc = 0; - uint32_t sdadel = 2; - uint32_t scldel = 2; - uint32_t scll = 6; - uint32_t sclh = 7; - - return presc << 28 | - scldel << 20 | - sdadel << 16 | - sclh << 8 | - scll; -} - -void i2cInit(I2C_TypeDef *i2c, i2cSpeed_t spd) { - // Setup timing register - i2c->TIMINGR = setupTiming(spd, SystemCoreClock); - - // Reset state - i2c->CR1 &= ~I2C_CR1_PE; -} - -static uint32_t i2cSetup(uint32_t addr, uint8_t direction) { - uint32_t ret = 0; - if (addr & I2C_10BIT_ADDR) { - ret = (addr & 0x000003FF) | I2C_CR2_ADD10; - } else { - // 7 Bit Address - ret = (addr & 0x0000007F) << 1; - } - - if (direction == I2C_READ) { - ret |= I2C_CR2_RD_WRN; - if (addr & I2C_10BIT_ADDR) { - ret |= I2C_CR2_HEAD10R; - } - } - - return ret; -} - -// Will return the number of data bytes written to the device -uint32_t i2cWrite(I2C_TypeDef *i2c, uint32_t addr, uint8_t *txBuffer, - uint32_t len) { - - uint32_t numTxBytes = 0; - - i2c->CR1 &= ~I2C_CR1_PE; - i2c->CR2 = 0; - - i2c->CR2 = i2cSetup(addr, I2C_WRITE); - - if (len > 0xFF) { - i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD; - } else { - i2c->CR2 |= ((len & 0xFF) << 16) | I2C_CR2_AUTOEND; - } - i2c->CR1 |= I2C_CR1_PE; - i2c->CR2 |= I2C_CR2_START; - while(i2c->CR2 & I2C_CR2_START); - uint8_t done = 0; - uint32_t i = 0; - while (!done && i < 0x0000001F) { - i++; - if (i2c->ISR & I2C_ISR_NACKF) { - // Was not acknowledged, disable device and exit - done = 1; - } - - if (i2c->ISR & I2C_ISR_TXIS) { - // Device acknowledged and we must send the next byte - if (numTxBytes < len){ - i2c->TXDR = txBuffer[numTxBytes++]; - } - - i = 0; - - } - - if (i2c->ISR & I2C_ISR_TC) { - done = 1; - } - - if (i2c->ISR & I2C_ISR_TCR) { - i = 0; - if ((len - numTxBytes) > 0xFF) { - i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD; - } else { - i2c->CR2 &= ~(0x00FF0000 | I2C_CR2_RELOAD); - i2c->CR2 |= ((len - numTxBytes) & 0xFF) << 16 | - I2C_CR2_AUTOEND; - } - } - - } - i2c->CR1 &= ~I2C_CR1_PE; - return numTxBytes; -} - -uint32_t i2cRead(I2C_TypeDef *i2c, uint8_t addr, uint8_t *rxBuffer, - uint32_t numBytes) { - - uint32_t numRxBytes = 0; - - i2c->CR1 &= ~I2C_CR1_PE; - i2c->CR2 = 0; +static TimerEvent_t MeasurementStartTimer; +static struct bme680_field_data voc_data; - i2c->CR2 = i2cSetup(addr, I2C_READ); +void MeasurementStartTimerIrq(void) +{ + GPIOC->ODR |= 1<<7; + PRINTF("--- MEASUREMENT CALLBACK! --- \r\n"); - if (numBytes > 0xFF) { - i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD; - } else { - i2c->CR2 |= ((numBytes & 0xFF) << 16) | I2C_CR2_AUTOEND; - } - i2c->CR1 |= I2C_CR1_PE; - i2c->CR2 |= I2C_CR2_START; - - while(i2c->CR2 & I2C_CR2_START); - uint8_t done = 0; - uint32_t i = 0; - while (!done && i < 0x0000001F) { - i++; - - if (i2c->ISR & I2C_ISR_RXNE) { - // Device acknowledged and we must send the next byte - if (numRxBytes < numBytes){ - rxBuffer[numRxBytes++] = i2c->RXDR; - } - - i = 0; - } + TimerSetValue( &MeasurementStartTimer, MEAS_INTERVAL_MS ); + TimerReset(&MeasurementStartTimer); - if (i2c->ISR & I2C_ISR_TC) { - done = 1; - } + uint32_t duration = voc_start_measure(); + HAL_Delay(duration); // this is usually like 200 ms, not enough to worry about sleep + voc_read(&voc_data); - if (i2c->ISR & I2C_ISR_TCR) { - i = 0; - if ((numBytes - numRxBytes) > 0xFF) { - i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD; - } else { - i2c->CR2 &= ~(0x00FF0000 | I2C_CR2_RELOAD); - i2c->CR2 |= ((numBytes - numRxBytes) & 0xFF) << 16 | - I2C_CR2_AUTOEND; - } - } - - } - i2c->CR1 &= ~I2C_CR1_PE; - return numRxBytes; + // STUFF... + GPIOC->ODR &= ~(1<<7); } -#endif /** @@ -342,7 +190,6 @@ int main(void) /* Configure the hardware*/ HW_Init(); - MX_I2C1_Init(); // BLINKY GPIO_InitTypeDef initStruct = { 0 }; @@ -355,19 +202,20 @@ int main(void) /* USER CODE END 1 */ voc_init(); - while(1) { - GPIOC->ODR ^= 1<<7; - voc_measure(); - } -#if 0 - /* Configure the Lora Stack*/ lora_Init(&LoRaMainCallbacks, &LoRaParamInit); - PRINTF("starting!!!\n\r"); + TimerInit( &MeasurementStartTimer, MeasurementStartTimerIrq ); + TimerSetValue( &MeasurementStartTimer, MEAS_INTERVAL_MS - MEAS_TX_DELAY ); // first time with a delay, to get some offset + TimerStart( &MeasurementStartTimer ); + + PRINTF("Initial sensor measurement...\r\n"); + MeasurementStartTimerIrq(); /* main loop*/ + PRINTF("Main loop starting!!!\n\r"); while (1) { + GPIOC->ODR ^= 1<<7; /* run the LoRa class A state machine*/ lora_fsm(); @@ -377,6 +225,8 @@ int main(void) * and cortex will not enter low power anyway */ if (lora_getDeviceState() == DEVICE_STATE_SLEEP) { #ifndef LOW_POWER_DISABLE + + GPIOC->ODR &= ~(1<<7); // LED off LowPower_Handler(); #endif } @@ -385,40 +235,28 @@ int main(void) /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ } -#endif } static void LoraTxData(lora_AppData_t *AppData, FunctionalState *IsTxConfirmed) { - static uint8_t counter = 0; /* USER CODE BEGIN 3 */ PRINTF("Lora TX\r\n"); AppData->Port = LORAWAN_APP_PORT; *IsTxConfirmed = LORAWAN_CONFIRMED_MSG; - sprintf((char*)AppData->Buff, "HELLO-%02d", counter++); - AppData->BuffSize = 8; + PayloadBuilder pb = pb_start(AppData->Buff, AppData->BuffSize, true); + pb_i16(&pb, voc_data.temperature); // Cx100 + pb_u16(&pb, (uint16_t) (voc_data.humidity / 10)); // discard one place -> %x100 + pb_u16(&pb, (uint16_t) (voc_data.pressure - 85000)); // send offset from 850 hPa -> Pa + pb_u32(&pb, (uint16_t) (voc_data.gas_resistance)); // ohms, full size + AppData->BuffSize = (uint8_t) pb_length(&pb); /* USER CODE END 3 */ } static void LoraRxData(lora_AppData_t *AppData) { - /* USER CODE BEGIN 4 */ PRINTF("Lora RX\r\n"); - - switch (AppData->Port) { - case LORAWAN_APP_PORT: - - break; - case LPP_APP_PORT: { - - break; - } - default: - break; - } - /* USER CODE END 4 */ } /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Src/payload_builder.c b/Src/payload_builder.c new file mode 100644 index 0000000..b866566 --- /dev/null +++ b/Src/payload_builder.c @@ -0,0 +1,69 @@ +#include "main.h" +#include "payload_builder.h" + +#define check_capacity(pb_p, needed) \ + assert_param ((pb_p)->ptr + (needed) <= (pb_p)->capacity) + +/** Write uint8_t to the buffer */ +bool pb_u8(PayloadBuilder *pb, uint8_t byte) +{ + check_capacity(pb, sizeof(uint8_t)); + pb->buf[pb->ptr++] = byte; + return true; +} + +/** Write uint16_t to the buffer. */ +bool pb_u16(PayloadBuilder *pb, uint16_t word) +{ + check_capacity(pb, sizeof(uint16_t)); + if (pb->bigendian) { + pb->buf[pb->ptr++] = (uint8_t) ((word >> 8) & 0xFF); + pb->buf[pb->ptr++] = (uint8_t) (word & 0xFF); + } else { + pb->buf[pb->ptr++] = (uint8_t) (word & 0xFF); + pb->buf[pb->ptr++] = (uint8_t) ((word >> 8) & 0xFF); + } + return true; +} + +/** Write uint32_t to the buffer. */ +bool pb_u32(PayloadBuilder *pb, uint32_t word) +{ + check_capacity(pb, sizeof(uint32_t)); + if (pb->bigendian) { + pb->buf[pb->ptr++] = (uint8_t) ((word >> 24) & 0xFF); + pb->buf[pb->ptr++] = (uint8_t) ((word >> 16) & 0xFF); + pb->buf[pb->ptr++] = (uint8_t) ((word >> 8) & 0xFF); + pb->buf[pb->ptr++] = (uint8_t) (word & 0xFF); + } else { + pb->buf[pb->ptr++] = (uint8_t) (word & 0xFF); + pb->buf[pb->ptr++] = (uint8_t) ((word >> 8) & 0xFF); + pb->buf[pb->ptr++] = (uint8_t) ((word >> 16) & 0xFF); + pb->buf[pb->ptr++] = (uint8_t) ((word >> 24) & 0xFF); + } + return true; +} + +/** Write int8_t to the buffer. */ +bool pb_i8(PayloadBuilder *pb, int8_t byte) +{ + return pb_u8(pb, ((union conv8){.i8 = byte}).u8); +} + +/** Write int16_t to the buffer. */ +bool pb_i16(PayloadBuilder *pb, int16_t word) +{ + return pb_u16(pb, ((union conv16){.i16 = word}).u16); +} + +/** Write int32_t to the buffer. */ +bool pb_i32(PayloadBuilder *pb, int32_t word) +{ + return pb_u32(pb, ((union conv32){.i32 = word}).u32); +} + +/** Write 4-byte float to the buffer. */ +bool pb_float(PayloadBuilder *pb, float f) +{ + return pb_u32(pb, ((union conv32){.f32 = f}).u32); +} diff --git a/Src/payload_builder.h b/Src/payload_builder.h new file mode 100644 index 0000000..98df272 --- /dev/null +++ b/Src/payload_builder.h @@ -0,0 +1,50 @@ +#ifndef PAYLOAD_BUILDER_H +#define PAYLOAD_BUILDER_H + +#include +#include +#include +#include "type_coerce.h" + +/** + * This module can help you build payload arrays + * + * The builder performs bounds checking and prints error + * message on overflow for easy debugging. + */ + +typedef struct { + uint8_t *buf; + size_t ptr; + size_t capacity; + bool bigendian; +} PayloadBuilder; + +#define pb_start(buf, capacity, bigendian) ((PayloadBuilder){buf, 0, capacity, bigendian}) +#define pb_length(pb_p) ((pb_p)->ptr) + +/** Write uint8_t to the buffer */ +bool pb_u8(PayloadBuilder *pb, uint8_t byte); + +/** Write uint16_t to the buffer. */ +bool pb_u16(PayloadBuilder *pb, uint16_t word); + +/** Write uint32_t to the buffer. */ +bool pb_u32(PayloadBuilder *pb, uint32_t word); + +/** Write char (int8_t) to the buffer. */ +#define pb_char(pb, c) pb_i8(pb, c) + +/** Write int8_t to the buffer. */ +bool pb_i8(PayloadBuilder *pb, int8_t byte); + +/** Write int16_t to the buffer. */ +bool pb_i16(PayloadBuilder *pb, int16_t word); + +/** Write int32_t to the buffer. */ +bool pb_i32(PayloadBuilder *pb, int32_t word); + +/** Write 4-byte float to the buffer. */ +bool pb_float(PayloadBuilder *pb, float f); + +#endif // PAYLOAD_BUILDER_H diff --git a/Src/payload_parser.c b/Src/payload_parser.c new file mode 100644 index 0000000..d6ff613 --- /dev/null +++ b/Src/payload_parser.c @@ -0,0 +1,86 @@ +#include "main.h" +#include "payload_parser.h" + +#define check_capacity(pp_p, needed) \ + assert_param ((pp_p)->ptr + (needed) <= (pp_p)->len) + + +uint8_t pp_u8(PayloadParser *pp) +{ + check_capacity(pp, sizeof(uint8_t)); + + return pp->buf[pp->ptr++]; +} + +uint16_t pp_u16(PayloadParser *pp) +{ + check_capacity(pp, sizeof(uint16_t)); + uint16_t x = 0; + + if (pp->bigendian) { + x |= pp->buf[pp->ptr++] << 8; + x |= pp->buf[pp->ptr++]; + } else { + x |= pp->buf[pp->ptr++]; + x |= pp->buf[pp->ptr++] << 8; + } + return x; +} + +uint32_t pp_u32(PayloadParser *pp) +{ + check_capacity(pp, sizeof(uint32_t)); + uint32_t x = 0; + + if (pp->bigendian) { + x |= (uint32_t) (pp->buf[pp->ptr++] << 24); + x |= (uint32_t) (pp->buf[pp->ptr++] << 16); + x |= (uint32_t) (pp->buf[pp->ptr++] << 8); + x |= pp->buf[pp->ptr++]; + } else { + x |= pp->buf[pp->ptr++]; + x |= (uint32_t) (pp->buf[pp->ptr++] << 8); + x |= (uint32_t) (pp->buf[pp->ptr++] << 16); + x |= (uint32_t) (pp->buf[pp->ptr++] << 24); + } + return x; +} + +const uint8_t *pp_rest(PayloadParser *pp, size_t *length) +{ + int len = (int)(pp->len - pp->ptr); + if (len <= 0) { + if (length != NULL) *length = 0; + return NULL; + } + + if (length != NULL) { + *length = (size_t)len; + } + + return pp->buf + pp->ptr; // pointer arith +} + +/** Read int8_t from the payload. */ +int8_t pp_i8(PayloadParser *pp) +{ + return ((union conv8){.u8 = pp_u8(pp)}).i8; +} + +/** Read int16_t from the payload. */ +int16_t pp_i16(PayloadParser *pp) +{ + return ((union conv16){.u16 = pp_u16(pp)}).i16; +} + +/** Read int32_t from the payload. */ +int32_t pp_i32(PayloadParser *pp) +{ + return ((union conv32){.u32 = pp_u32(pp)}).i32; +} + +/** Read 4-byte float from the payload. */ +float pp_float(PayloadParser *pp) +{ + return ((union conv32){.u32 = pp_u32(pp)}).f32; +} diff --git a/Src/payload_parser.h b/Src/payload_parser.h new file mode 100644 index 0000000..ec014c3 --- /dev/null +++ b/Src/payload_parser.h @@ -0,0 +1,66 @@ +#ifndef PAYLOAD_PARSER_H +#define PAYLOAD_PARSER_H + +/** + * Paylod parser is used to extract values fron a byte buffer. + * + * It's a set of simple routines that help you extract data from + * a SBMP datagram payload. The payload parser should take care + * of endianness of the SBMP encoding. + * + * The parser functions will print an error if you reach the end of data, + * and return zero. This can help you with debugging. + */ + +#include +#include +#include +#include "type_coerce.h" + +typedef struct { + const uint8_t *buf; + size_t ptr; + size_t len; + bool bigendian; +} PayloadParser; + + +/** Start the parser. This is assigned to a local variable. */ +#define pp_start(buffer, length, bigendian) ((PayloadParser){buffer, 0, length, bigendian}) + +/** + * @brief Get the remainder of the buffer. + * + * Returns NULL and sets 'length' to 0 if there are no bytes left. + * + * @param pp + * @param length : here the buffer length will be stored. NULL to do not store. + * @return the remaining portion of the input buffer + */ +const uint8_t *pp_rest(PayloadParser *pp, size_t *length); + +/** Read uint8_t from the payload. */ +uint8_t pp_u8(PayloadParser *pp); + +/** Read uint16_t from the payload. */ +uint16_t pp_u16(PayloadParser *pp); + +/** Read uint32_t from the payload. */ +uint32_t pp_u32(PayloadParser *pp); + +/** Read char (int8_t) from the payload. */ +#define pp_char(pp) pp_i8(pp) + +/** Read int8_t from the payload. */ +int8_t pp_i8(PayloadParser *pp); + +/** Read int16_t from the payload. */ +int16_t pp_i16(PayloadParser *pp); + +/** Read int32_t from the payload. */ +int32_t pp_i32(PayloadParser *pp); + +/** Read 4-byte float from the payload. */ +float pp_float(PayloadParser *pp); + +#endif // PAYLOAD_PARSER_H diff --git a/Src/stm32l0xx_hw.c b/Src/stm32l0xx_hw.c index 1efc12d..31f70b8 100755 --- a/Src/stm32l0xx_hw.c +++ b/Src/stm32l0xx_hw.c @@ -21,42 +21,43 @@ Maintainer: Miguel Luis and Gregory Cristian ****************************************************************************** * @attention * - *

© Copyright (c) 2017 STMicroelectronics International N.V. + *

© Copyright (c) 2017 STMicroelectronics International N.V. * All rights reserved.

* - * Redistribution and use in source and binary forms, with or without + * Redistribution and use in source and binary forms, with or without * modification, are permitted, provided that the following conditions are met: * - * 1. Redistribution of source code must retain the above copyright notice, + * 1. Redistribution of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of other - * contributors to this software may be used to endorse or promote products + * 3. Neither the name of STMicroelectronics nor the names of other + * contributors to this software may be used to endorse or promote products * derived from this software without specific written permission. - * 4. This software, including modifications and/or derivative works of this + * 4. This software, including modifications and/or derivative works of this * software, must execute solely and exclusively on microcontroller or * microprocessor devices manufactured by or for STMicroelectronics. - * 5. Redistribution and use of this software other than as permitted under - * this license is void and will automatically terminate your rights under - * this license. + * 5. Redistribution and use of this software other than as permitted under + * this license is void and will automatically terminate your rights under + * this license. * - * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A + * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT + * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************** */ +#include #include "hw.h" #include "radio.h" #include "debug.h" @@ -115,11 +116,13 @@ void HW_Init( void ) // HW_AdcInit( ); Radio.IoInit( ); - + HW_SPI_Init( ); HW_RTC_Init( ); - + + HW_I2C_Init(); + vcom_Init( ); McuInitialized = true; @@ -134,11 +137,13 @@ void HW_Init( void ) void HW_DeInit( void ) { HW_SPI_DeInit( ); - + Radio.IoDeInit( ); - + + HW_I2C_DeInit(); + vcom_DeInit( ); - + McuInitialized = false; } @@ -150,9 +155,10 @@ void HW_DeInit( void ) static void HW_IoInit( void ) { HW_SPI_IoInit( ); - + HAL_I2C_MspInit(&hi2c1); + Radio.IoInit( ); - + vcom_IoInit( ); } @@ -164,9 +170,10 @@ static void HW_IoInit( void ) static void HW_IoDeInit( void ) { HW_SPI_IoDeInit( ); - + HAL_I2C_MspDeInit(&hi2c1); + Radio.IoDeInit( ); - + vcom_IoDeInit( ); } @@ -215,7 +222,7 @@ void SystemClock_Config( void ) /* Set Voltage scale1 as MCU will run at 32MHz */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - + /* Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 */ while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) != RESET) {}; @@ -273,10 +280,10 @@ void HW_EnterStopMode( void) DISABLE_IRQ( ); HW_IoDeInit( ); - + /*clear wake up flag*/ SET_BIT(PWR->CR, PWR_CR_CWUF); - + RESTORE_PRIMASK( ); /* Enter Stop Mode */ @@ -293,7 +300,7 @@ void HW_ExitStopMode( void) /* Disable IRQ while the MCU is not running on HSI */ BACKUP_PRIMASK(); - + DISABLE_IRQ( ); /* After wake-up from STOP reconfigure the system clock */ @@ -302,18 +309,18 @@ void HW_ExitStopMode( void) /* Wait till HSI is ready */ while( __HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET ) {} - + /* Enable PLL */ __HAL_RCC_PLL_ENABLE(); /* Wait till PLL is ready */ while( __HAL_RCC_GET_FLAG( RCC_FLAG_PLLRDY ) == RESET ) {} - + /* Select PLL as system clock source */ __HAL_RCC_SYSCLK_CONFIG ( RCC_SYSCLKSOURCE_PLLCLK ); - - /* Wait till PLL is used as system clock source */ + + /* Wait till PLL is used as system clock source */ while( __HAL_RCC_GET_SYSCLK_SOURCE( ) != RCC_SYSCLKSOURCE_STATUS_PLLCLK ) {} - + /*initilizes the peripherals*/ HW_IoInit( ); diff --git a/Src/type_coerce.h b/Src/type_coerce.h new file mode 100644 index 0000000..0c6c177 --- /dev/null +++ b/Src/type_coerce.h @@ -0,0 +1,25 @@ +#ifndef TYPE_COERCE_H +#define TYPE_COERCE_H + +#include +#include + +// Structs for conversion between types + +union conv8 { + uint8_t u8; + int8_t i8; +}; + +union conv16 { + uint16_t u16; + int16_t i16; +}; + +union conv32 { + uint32_t u32; + int32_t i32; + float f32; +}; + +#endif // TYPE_COERCE_H diff --git a/Src/voc_sensor.c b/Src/voc_sensor.c index bd647cf..9abe89f 100644 --- a/Src/voc_sensor.c +++ b/Src/voc_sensor.c @@ -119,7 +119,8 @@ static int8_t user_i2c_write(uint8_t dev_id, uint8_t reg_addr, uint8_t *reg_data * | Stop | - | * |------------+---------------------| */ - uint8_t data[64]; + static uint8_t data[64]; + data[0] = reg_addr; for (int i = 0; i < len; i++) { data[i+1] = reg_data[i]; @@ -169,7 +170,7 @@ void voc_init(void) assert_param(rslt == BME680_OK); } -void voc_measure(void) +uint32_t voc_start_measure(void) { /* Set the power mode */ int8_t rslt; @@ -181,17 +182,22 @@ void voc_measure(void) * measurement is complete */ uint16_t meas_period; bme680_get_profile_dur(&meas_period, &gas_sensor); - HAL_Delay(meas_period); /* Delay till the measurement is ready */ - struct bme680_field_data data; + meas_period += 10; // add some extra safety margin + + PRINTF("Measurement will take %d ms\r\n", meas_period); + + return meas_period; +} - rslt = bme680_get_sensor_data(&data, &gas_sensor); +void voc_read(struct bme680_field_data *data) +{ + /* Set the power mode */ + int8_t rslt; + rslt = bme680_get_sensor_data(data, &gas_sensor); assert_param(rslt == BME680_OK); - PRINTF("T: %.2f degC, P: %.2f hPa, H %.2f %%rH ", data.temperature / 100.0f, - data.pressure / 100.0f, data.humidity / 1000.0f ); + PRINTF("T: %d/100 degC, P: %d/100 hPa, H %d/1000 %%rH ", data->temperature, data->pressure, data->humidity ); /* Avoid using measurements from an unstable heating setup */ - if(data.status & BME680_GASM_VALID_MSK) - PRINTF(", G: %d ohms", data.gas_resistance); - + if(data->status & BME680_GASM_VALID_MSK) PRINTF(", G: %d ohms", data->gas_resistance); PRINTF("\r\n"); } diff --git a/Src/voc_sensor.h b/Src/voc_sensor.h index 247d00a..18cb2a1 100644 --- a/Src/voc_sensor.h +++ b/Src/voc_sensor.h @@ -10,6 +10,7 @@ extern struct bme680_dev gas_sensor; void voc_init(void); -void voc_measure(void); +uint32_t voc_start_measure(void); +void voc_read(struct bme680_field_data *data); #endif //PROJ_VOC_SENSOR_H diff --git a/build/LoRaMac.d b/build/LoRaMac.d deleted file mode 100644 index d370249..0000000 --- a/build/LoRaMac.d +++ /dev/null @@ -1,43 +0,0 @@ -build/LoRaMac.d: Middlewares/Third_Party/Lora/Mac/LoRaMac.c \ - Middlewares/Third_Party/Lora/Phy/radio.h \ - Middlewares/Third_Party/Lora/Utilities/timeServer.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Middlewares/Third_Party/Lora/Mac/LoRaMac.h \ - Middlewares/Third_Party/Lora/Mac/region/Region.h \ - Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h Inc/debug.h \ - Inc/hw_conf.h Inc/vcom.h Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h - -Middlewares/Third_Party/Lora/Phy/radio.h: - -Middlewares/Third_Party/Lora/Utilities/timeServer.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMac.h: - -Middlewares/Third_Party/Lora/Mac/region/Region.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h: - -Inc/debug.h: - -Inc/hw_conf.h: - -Inc/vcom.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h: diff --git a/build/LoRaMac.lst b/build/LoRaMac.lst deleted file mode 100644 index 8980de7..0000000 --- a/build/LoRaMac.lst +++ /dev/null @@ -1,13841 +0,0 @@ -ARM GAS /tmp/ccrFaSdZ.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "LoRaMac.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.ResetMacParameters,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 ResetMacParameters: - 23 .LFB104: - 24 .file 1 "./Middlewares/Third_Party/Lora/Mac/LoRaMac.c" - 1:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /* - 2:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** / _____) _ | | - 3:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** (C)2013 Semtech - 8:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ___ _____ _ ___ _ _____ ___ ___ ___ ___ - 9:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** / __|_ _/_\ / __| |/ / __/ _ \| _ \/ __| __| - 10:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** \__ \ | |/ _ \ (__| ' <| _| (_) | / (__| _| - 11:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** |___/ |_/_/ \_\___|_|\_\_| \___/|_|_\\___|___| - 12:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** embedded.connectivity.solutions=============== - 13:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 14:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Description: LoRa MAC layer implementation - 15:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 16:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 17:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 18:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Maintainer: Miguel Luis ( Semtech ), Gregory Cristian ( Semtech ) and Daniel Jaeckle ( STACKFORCE ) - 19:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 20:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 21:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 22:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include - 23:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include - 24:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include - 25:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include "radio.h" - 26:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include "timeServer.h" - 27:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include "LoRaMac.h" - 28:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include "region/Region.h" - 29:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include "LoRaMacCrypto.h" - 30:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 31:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include "debug.h" - 32:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #include "LoRaMacTest.h" - 33:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 34:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 2 - - - 35:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 36:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 37:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Maximum PHY layer payload size - 38:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 39:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #define LORAMAC_PHY_MAXPAYLOAD 255 - 40:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 41:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 42:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Maximum MAC commands buffer size - 43:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 44:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #define LORA_MAC_COMMAND_MAX_LENGTH 128 - 45:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 46:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 47:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Maximum length of the fOpts field - 48:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 49:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #define LORA_MAC_COMMAND_MAX_FOPTS_LENGTH 15 - 50:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 51:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 52:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac region. - 53:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 54:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static LoRaMacRegion_t LoRaMacRegion; - 55:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 56:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 57:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac duty cycle for the back-off procedure during the first hour. - 58:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 59:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #define BACKOFF_DC_1_HOUR 100 - 60:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 61:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 62:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac duty cycle for the back-off procedure during the next 10 hours. - 63:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 64:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #define BACKOFF_DC_10_HOURS 1000 - 65:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 66:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 67:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac duty cycle for the back-off procedure during the next 24 hours. - 68:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 69:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** #define BACKOFF_DC_24_HOURS 10000 - 70:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 71:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 72:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Device IEEE EUI - 73:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 74:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t *LoRaMacDevEui; - 75:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 76:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 77:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Application IEEE EUI - 78:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 79:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t *LoRaMacAppEui; - 80:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 81:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 82:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * AES encryption/decryption cipher application key - 83:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 84:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t *LoRaMacAppKey; - 85:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 86:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 87:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * AES encryption/decryption cipher network session key - 88:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 89:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t LoRaMacNwkSKey[] = - 90:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 91:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - ARM GAS /tmp/ccrFaSdZ.s page 3 - - - 92:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - 93:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** }; - 94:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 95:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 96:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * AES encryption/decryption cipher application session key - 97:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 98:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t LoRaMacAppSKey[] = - 99:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 100:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 101:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - 102:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** }; - 103:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 104:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 105:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Device nonce is a random value extracted by issuing a sequence of RSSI - 106:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * measurements - 107:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 108:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint16_t LoRaMacDevNonce; - 109:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 110:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 111:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Network ID ( 3 bytes ) - 112:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 113:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint32_t LoRaMacNetID; - 114:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 115:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 116:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Mote Address - 117:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 118:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint32_t LoRaMacDevAddr; - 119:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 120:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 121:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Multicast channels linked list - 122:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 123:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static MulticastParams_t *MulticastChannels = NULL; - 124:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 125:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 126:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Actual device class - 127:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 128:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static DeviceClass_t LoRaMacDeviceClass; - 129:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 130:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 131:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Indicates if the node is connected to a private or public network - 132:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool PublicNetwork; - 134:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 135:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 136:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Indicates if the node supports repeaters - 137:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 138:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool RepeaterSupport; - 139:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 140:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 141:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Buffer containing the data to be sent or received. - 142:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 143:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t LoRaMacBuffer[LORAMAC_PHY_MAXPAYLOAD]; - 144:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 145:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 146:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Length of packet in LoRaMacBuffer - 147:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 148:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint16_t LoRaMacBufferPktLen = 0; - ARM GAS /tmp/ccrFaSdZ.s page 4 - - - 149:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 150:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 151:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Length of the payload in LoRaMacBuffer - 152:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 153:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t LoRaMacTxPayloadLen = 0; - 154:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 155:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 156:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Buffer containing the upper layer data. - 157:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 158:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t LoRaMacRxPayload[LORAMAC_PHY_MAXPAYLOAD]; - 159:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 160:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 161:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMAC frame counter. Each time a packet is sent the counter is incremented. - 162:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Only the 16 LSB bits are sent - 163:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 164:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint32_t UpLinkCounter = 0; - 165:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 166:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 167:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMAC frame counter. Each time a packet is received the counter is incremented. - 168:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Only the 16 LSB bits are received - 169:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 170:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint32_t DownLinkCounter = 0; - 171:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 172:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 173:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * IsPacketCounterFixed enables the MIC field tests by fixing the - 174:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * UpLinkCounter value - 175:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 176:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool IsUpLinkCounterFixed = false; - 177:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 178:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 179:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Used for test purposes. Disables the opening of the reception windows. - 180:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 181:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool IsRxWindowsEnabled = true; - 182:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 183:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 184:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Indicates if the MAC layer has already joined a network. - 185:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 186:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool IsLoRaMacNetworkJoined = false; - 187:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 188:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 189:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac ADR control status - 190:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 191:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool AdrCtrlOn = false; - 192:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 193:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 194:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Counts the number of missed ADR acknowledgements - 195:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 196:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint32_t AdrAckCounter = 0; - 197:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 198:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 199:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * If the node has sent a FRAME_TYPE_DATA_CONFIRMED_UP this variable indicates - 200:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * if the nodes needs to manage the server acknowledgement. - 201:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 202:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool NodeAckRequested = false; - 203:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 204:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 205:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * If the server has sent a FRAME_TYPE_DATA_CONFIRMED_DOWN this variable indicates - ARM GAS /tmp/ccrFaSdZ.s page 5 - - - 206:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * if the ACK bit must be set for the next transmission - 207:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 208:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool SrvAckRequested = false; - 209:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 210:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 211:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Indicates if the MAC layer wants to send MAC commands - 212:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 213:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool MacCommandsInNextTx = false; - 214:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 215:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 216:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Contains the current MacCommandsBuffer index - 217:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 218:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t MacCommandsBufferIndex = 0; - 219:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 220:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 221:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Contains the current MacCommandsBuffer index for MAC commands to repeat - 222:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 223:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t MacCommandsBufferToRepeatIndex = 0; - 224:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 225:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 226:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Buffer containing the MAC layer commands - 227:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 228:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t MacCommandsBuffer[LORA_MAC_COMMAND_MAX_LENGTH]; - 229:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 230:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 231:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Buffer containing the MAC layer commands which must be repeated - 232:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 233:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t MacCommandsBufferToRepeat[LORA_MAC_COMMAND_MAX_LENGTH]; - 234:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 235:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 236:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac parameters - 237:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 238:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams_t LoRaMacParams; - 239:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 240:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 241:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac default parameters - 242:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 243:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams_t LoRaMacParamsDefaults; - 244:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 245:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 246:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Uplink messages repetitions counter - 247:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 248:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t ChannelsNbRepCounter = 0; - 249:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 250:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 251:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Maximum duty cycle - 252:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \remark Possibility to shutdown the device. - 253:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 254:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t MaxDCycle = 0; - 255:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 256:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 257:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Aggregated duty cycle management - 258:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 259:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint16_t AggregatedDCycle; - 260:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static TimerTime_t AggregatedLastTxDoneTime; - 261:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static TimerTime_t AggregatedTimeOff; - 262:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 6 - - - 263:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 264:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Enables/Disables duty cycle management (Test only) - 265:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 266:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool DutyCycleOn; - 267:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 268:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 269:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Current channel index - 270:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 271:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t Channel; - 272:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 273:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 274:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Current channel index - 275:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 276:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t LastTxChannel; - 277:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 278:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 279:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Set to true, if the last uplink was a join request - 280:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 281:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool LastTxIsJoinRequest; - 282:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 283:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 284:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Stores the time at LoRaMac initialization. - 285:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 286:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \remark Used for the BACKOFF_DC computation. - 287:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 288:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static TimerTime_t LoRaMacInitializationTime = 0; - 289:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 290:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 291:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac internal states - 292:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 293:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** enum eLoRaMacState - 294:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 295:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LORAMAC_IDLE = 0x00000000, - 296:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LORAMAC_TX_RUNNING = 0x00000001, - 297:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LORAMAC_RX = 0x00000002, - 298:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LORAMAC_ACK_REQ = 0x00000004, - 299:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LORAMAC_ACK_RETRY = 0x00000008, - 300:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LORAMAC_TX_DELAYED = 0x00000010, - 301:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LORAMAC_TX_CONFIG = 0x00000020, - 302:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LORAMAC_RX_ABORT = 0x00000040, - 303:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** }; - 304:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 305:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 306:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac internal state - 307:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 308:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint32_t LoRaMacState = LORAMAC_IDLE; - 309:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 310:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 311:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac timer used to check the LoRaMacState (runs every second) - 312:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 313:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static TimerEvent_t MacStateCheckTimer; - 314:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 315:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 316:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac upper layer event functions - 317:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 318:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static LoRaMacPrimitives_t *LoRaMacPrimitives; - 319:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 7 - - - 320:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 321:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac upper layer callback functions - 322:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 323:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static LoRaMacCallback_t *LoRaMacCallbacks; - 324:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 325:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 326:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Radio events function pointer - 327:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 328:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static RadioEvents_t RadioEvents; - 329:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 330:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 331:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac duty cycle delayed Tx timer - 332:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 333:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static TimerEvent_t TxDelayedTimer; - 334:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 335:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 336:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac reception windows timers - 337:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 338:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static TimerEvent_t RxWindowTimer1; - 339:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static TimerEvent_t RxWindowTimer2; - 340:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 341:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 342:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac reception windows delay - 343:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \remark normal frame: RxWindowXDelay = ReceiveDelayX - RADIO_WAKEUP_TIME - 344:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * join frame : RxWindowXDelay = JoinAcceptDelayX - RADIO_WAKEUP_TIME - 345:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 346:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint32_t RxWindow1Delay; - 347:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint32_t RxWindow2Delay; - 348:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 349:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 350:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac Rx windows configuration - 351:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 352:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static RxConfigParams_t RxWindow1Config; - 353:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static RxConfigParams_t RxWindow2Config; - 354:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 355:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 356:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Acknowledge timeout timer. Used for packet retransmissions. - 357:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 358:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static TimerEvent_t AckTimeoutTimer; - 359:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 360:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 361:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Number of trials to get a frame acknowledged - 362:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 363:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t AckTimeoutRetries = 1; - 364:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 365:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 366:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Number of trials to get a frame acknowledged - 367:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 368:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t AckTimeoutRetriesCounter = 1; - 369:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 370:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 371:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Indicates if the AckTimeout timer has expired or not - 372:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 373:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool AckTimeoutRetry = false; - 374:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 375:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 376:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Last transmission time on air - ARM GAS /tmp/ccrFaSdZ.s page 8 - - - 377:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 378:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerTime_t TxTimeOnAir = 0; - 379:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 380:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 381:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Number of trials for the Join Request - 382:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 383:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t JoinRequestTrials; - 384:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 385:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 386:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Maximum number of trials for the Join Request - 387:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 388:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t MaxJoinRequestTrials; - 389:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 390:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 391:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Structure to hold an MCPS indication data. - 392:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 393:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static McpsIndication_t McpsIndication; - 394:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 395:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 396:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Structure to hold MCPS confirm data. - 397:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 398:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static McpsConfirm_t McpsConfirm; - 399:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 400:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 401:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Structure to hold MLME confirm data. - 402:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 403:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static MlmeConfirm_t MlmeConfirm; - 404:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 405:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 406:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * Holds the current rx window slot - 407:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 408:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t RxSlot = 0; - 409:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 410:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 411:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMac tx/rx operation state - 412:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 413:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags_t LoRaMacFlags; - 414:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 415:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 416:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function to be executed on Radio Tx Done event - 417:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 418:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioTxDone( void ); - 419:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 420:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 421:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief This function prepares the MAC to abort the execution of function - 422:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * OnRadioRxDone in case of a reception error. - 423:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 424:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void PrepareRxDoneAbort( void ); - 425:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 426:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 427:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function to be executed on Radio Rx Done event - 428:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 429:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioRxDone( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ); - 430:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 431:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 432:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function executed on Radio Tx Timeout event - 433:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - ARM GAS /tmp/ccrFaSdZ.s page 9 - - - 434:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioTxTimeout( void ); - 435:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 436:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 437:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function executed on Radio Rx error event - 438:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 439:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioRxError( void ); - 440:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 441:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 442:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function executed on Radio Rx Timeout event - 443:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 444:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioRxTimeout( void ); - 445:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 446:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 447:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function executed on Resend Frame timer event. - 448:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 449:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnMacStateCheckTimerEvent( void ); - 450:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 451:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 452:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function executed on duty cycle delayed Tx timer event - 453:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 454:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnTxDelayedTimerEvent( void ); - 455:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 456:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 457:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function executed on first Rx window timer event - 458:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 459:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRxWindow1TimerEvent( void ); - 460:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 461:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 462:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function executed on second Rx window timer event - 463:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 464:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRxWindow2TimerEvent( void ); - 465:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 466:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 467:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Function executed on AckTimeout timer event - 468:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 469:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnAckTimeoutTimerEvent( void ); - 470:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 471:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 472:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Initializes and opens the reception window - 473:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 474:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] rxContinuous Set to true, if the RX is in continuous mode - 475:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] maxRxWindow Maximum RX window timeout - 476:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 477:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void RxWindowSetup( bool rxContinuous, uint32_t maxRxWindow ); - 478:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 479:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 480:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Adds a new MAC command to be sent. - 481:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 482:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \Remark MAC layer internal function - 483:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 484:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [in] cmd MAC command to be added - 485:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * [MOTE_MAC_LINK_CHECK_REQ, - 486:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * MOTE_MAC_LINK_ADR_ANS, - 487:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * MOTE_MAC_DUTY_CYCLE_ANS, - 488:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * MOTE_MAC_RX2_PARAM_SET_ANS, - 489:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * MOTE_MAC_DEV_STATUS_ANS - 490:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * MOTE_MAC_NEW_CHANNEL_ANS] - ARM GAS /tmp/ccrFaSdZ.s page 10 - - - 491:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [in] p1 1st parameter ( optional depends on the command ) - 492:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [in] p2 2nd parameter ( optional depends on the command ) - 493:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 494:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \retval status Function status [0: OK, 1: Unknown command, 2: Buffer full] - 495:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 496:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static LoRaMacStatus_t AddMacCommand( uint8_t cmd, uint8_t p1, uint8_t p2 ); - 497:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 498:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 499:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Parses the MAC commands which must be repeated. - 500:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 501:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \Remark MAC layer internal function - 502:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 503:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] cmdBufIn Buffer which stores the MAC commands to send - 504:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] length Length of the input buffer to parse - 505:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [OUT] cmdBufOut Buffer which stores the MAC commands which must be - 506:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * repeated. - 507:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 508:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \retval Size of the MAC commands to repeat. - 509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 510:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t ParseMacCommandsToRepeat( uint8_t* cmdBufIn, uint8_t length, uint8_t* cmdBufOut ); - 511:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 512:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 513:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Validates if the payload fits into the frame, taking the datarate - 514:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * into account. - 515:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 516:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \details Refer to chapter 4.3.2 of the LoRaWAN specification, v1.0 - 517:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 518:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param lenN Length of the application payload. The length depends on the - 519:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * datarate and is region specific - 520:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 521:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param datarate Current datarate - 522:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 523:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param fOptsLen Length of the fOpts field - 524:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 525:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \retval [false: payload does not fit into the frame, true: payload fits into - 526:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * the frame] - 527:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 528:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool ValidatePayloadLength( uint8_t lenN, int8_t datarate, uint8_t fOptsLen ); - 529:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 530:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 531:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Decodes MAC commands in the fOpts field and in the payload - 532:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 533:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void ProcessMacCommands( uint8_t *payload, uint8_t macIndex, uint8_t commandsSize, uint8_t s - 534:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 535:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 536:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief LoRaMAC layer generic send frame - 537:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 538:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] macHdr MAC header field - 539:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] fPort MAC payload port - 540:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] fBuffer MAC data buffer to be sent - 541:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] fBufferSize MAC data buffer size - 542:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \retval status Status of the operation. - 543:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 544:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t Send( LoRaMacHeader_t *macHdr, uint8_t fPort, void *fBuffer, uint16_t fBufferSize ) - 545:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 546:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 547:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief LoRaMAC layer frame buffer initialization - ARM GAS /tmp/ccrFaSdZ.s page 11 - - - 548:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 549:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] macHdr MAC header field - 550:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] fCtrl MAC frame control field - 551:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] fOpts MAC commands buffer - 552:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] fPort MAC payload port - 553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] fBuffer MAC data buffer to be sent - 554:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] fBufferSize MAC data buffer size - 555:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \retval status Status of the operation. - 556:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 557:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t PrepareFrame( LoRaMacHeader_t *macHdr, LoRaMacFrameCtrl_t *fCtrl, uint8_t fPort, vo - 558:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 559:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /* - 560:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Schedules the frame according to the duty cycle - 561:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 562:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \retval Status of the operation - 563:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 564:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static LoRaMacStatus_t ScheduleTx( void ); - 565:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 566:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /* - 567:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Calculates the back-off time for the band of a channel. - 568:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 569:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] channel The last Tx channel index - 570:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 571:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void CalculateBackOff( uint8_t channel ); - 572:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 573:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 574:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief LoRaMAC layer prepared frame buffer transmission with channel specification - 575:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 576:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \remark PrepareFrame must be called at least once before calling this - 577:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * function. - 578:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 579:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] channel Channel to transmit on - 580:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \retval status Status of the operation. - 581:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 582:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t SendFrameOnChannel( uint8_t channel ); - 583:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 584:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 585:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Sets the radio in continuous transmission mode - 586:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 587:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \remark Uses the radio parameters set on the previous transmission. - 588:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 589:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] timeout Time in seconds while the radio is kept in continuous wave mode - 590:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \retval status Status of the operation. - 591:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 592:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t SetTxContinuousWave( uint16_t timeout ); - 593:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 594:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 595:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Sets the radio in continuous transmission mode - 596:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 597:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \remark Uses the radio parameters set on the previous transmission. - 598:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * - 599:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] timeout Time in seconds while the radio is kept in continuous wave mode - 600:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] frequency RF frequency to be set. - 601:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \param [IN] power RF output power to be set. - 602:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \retval status Status of the operation. - 603:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 604:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t SetTxContinuousWave1( uint16_t timeout, uint32_t frequency, uint8_t power ); - ARM GAS /tmp/ccrFaSdZ.s page 12 - - - 605:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 606:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /*! - 607:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * \brief Resets MAC specific parameters to default - 608:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** */ - 609:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void ResetMacParameters( void ); - 610:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 611:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioTxDone( void ) - 612:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 613:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 614:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PhyParam_t phyParam; - 615:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** SetBandTxDoneParams_t txDone; - 616:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerTime_t curTime = TimerGetCurrentTime( ); - 617:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 618:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) - 619:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 620:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Sleep( ); - 621:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 622:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else - 623:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 624:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** OnRxWindow2TimerEvent( ); - 625:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 626:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 627:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Setup timers - 628:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsRxWindowsEnabled == true ) - 629:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 630:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &RxWindowTimer1, RxWindow1Delay ); - 631:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &RxWindowTimer1 ); - 632:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) - 633:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 634:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &RxWindowTimer2, RxWindow2Delay ); - 635:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &RxWindowTimer2 ); - 636:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 637:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacDeviceClass == CLASS_C ) || ( NodeAckRequested == true ) ) - 638:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 639:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_ACK_TIMEOUT; - 640:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &AckTimeoutTimer, RxWindow2Delay + phyParam.Value ); - 642:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &AckTimeoutTimer ); - 643:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 644:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 645:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else - 646:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 647:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_OK; - 648:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX2_TIMEOUT; - 649:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 650:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacFlags.Value == 0 ) - 651:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 652:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsReq = 1; - 653:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 654:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; - 655:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 656:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 657:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Verify if the last uplink was a join request - 658:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacFlags.Bits.MlmeReq == 1 ) && ( MlmeConfirm.MlmeRequest == MLME_JOIN ) ) - 659:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 660:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LastTxIsJoinRequest = true; - 661:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - ARM GAS /tmp/ccrFaSdZ.s page 13 - - - 662:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else - 663:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 664:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LastTxIsJoinRequest = false; - 665:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 666:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 667:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Store last Tx channel - 668:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LastTxChannel = Channel; - 669:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update last tx done time for the current channel - 670:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txDone.Channel = Channel; - 671:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txDone.Joined = IsLoRaMacNetworkJoined; - 672:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txDone.LastTxDoneTime = curTime; - 673:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionSetBandTxDone( LoRaMacRegion, &txDone ); - 674:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update Aggregated last tx done time - 675:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AggregatedLastTxDoneTime = curTime; - 676:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 677:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( NodeAckRequested == false ) - 678:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 679:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_OK; - 680:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChannelsNbRepCounter++; - 681:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 682:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 683:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 684:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void PrepareRxDoneAbort( void ) - 685:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 686:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState |= LORAMAC_RX_ABORT; - 687:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 688:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( NodeAckRequested ) - 689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 690:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** OnAckTimeoutTimerEvent( ); - 691:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 692:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 693:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsInd = 1; - 694:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; - 695:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 696:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Trig OnMacCheckTimerEvent call as soon as possible - 697:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &MacStateCheckTimer, 1 ); - 698:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &MacStateCheckTimer ); - 699:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 700:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 701:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioRxDone( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ) - 702:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 703:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacHeader_t macHdr; - 704:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFrameCtrl_t fCtrl; - 705:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ApplyCFListParams_t applyCFList; - 706:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 707:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PhyParam_t phyParam; - 708:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** bool skipIndication = false; - 709:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 710:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t pktHeaderLen = 0; - 711:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint32_t address = 0; - 712:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t appPayloadStartIndex = 0; - 713:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t port = 0xFF; - 714:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t frameLen = 0; - 715:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint32_t mic = 0; - 716:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint32_t micRx = 0; - 717:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 718:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint16_t sequenceCounter = 0; - ARM GAS /tmp/ccrFaSdZ.s page 14 - - - 719:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint16_t sequenceCounterPrev = 0; - 720:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint16_t sequenceCounterDiff = 0; - 721:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint32_t downLinkCounter = 0; - 722:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 723:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MulticastParams_t *curMulticastParams = NULL; - 724:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t *nwkSKey = LoRaMacNwkSKey; - 725:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t *appSKey = LoRaMacAppSKey; - 726:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 727:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t multicast = 0; - 728:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 729:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** bool isMicOk = false; - 730:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 731:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; - 732:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Rssi = rssi; - 733:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Snr = snr; - 734:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.RxSlot = RxSlot; - 735:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Port = 0; - 736:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Multicast = 0; - 737:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.FramePending = 0; - 738:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Buffer = NULL; - 739:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.BufferSize = 0; - 740:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.RxData = false; - 741:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.AckReceived = false; - 742:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = 0; - 743:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.McpsIndication = MCPS_UNCONFIRMED; - 744:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 745:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Sleep( ); - 746:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &RxWindowTimer2 ); - 747:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 748:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Value = payload[pktHeaderLen++]; - 749:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 750:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( macHdr.Bits.MType ) - 751:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 752:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_JOIN_ACCEPT: - 753:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsLoRaMacNetworkJoined == true ) - 754:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 755:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_ERROR; - 756:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 757:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 758:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 759:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacJoinDecrypt( payload + 1, size - 1, LoRaMacAppKey, LoRaMacRxPayload + 1 ); - 760:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 761:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacRxPayload[0] = macHdr.Value; - 762:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 763:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacJoinComputeMic( LoRaMacRxPayload, size - LORAMAC_MFR_LEN, LoRaMacAppKey, &mic ); - 764:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 765:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( uint32_t )LoRaMacRxPayload[size - LORAMAC_MFR_LEN]; - 766:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )LoRaMacRxPayload[size - LORAMAC_MFR_LEN + 1] << 8 ); - 767:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )LoRaMacRxPayload[size - LORAMAC_MFR_LEN + 2] << 16 ); - 768:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )LoRaMacRxPayload[size - LORAMAC_MFR_LEN + 3] << 24 ); - 769:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 770:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( micRx == mic ) - 771:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 772:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacJoinComputeSKeys( LoRaMacAppKey, LoRaMacRxPayload + 1, LoRaMacDevNonce, LoRa - 773:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 774:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacNetID = ( uint32_t )LoRaMacRxPayload[4]; - 775:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacNetID |= ( ( uint32_t )LoRaMacRxPayload[5] << 8 ); - ARM GAS /tmp/ccrFaSdZ.s page 15 - - - 776:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacNetID |= ( ( uint32_t )LoRaMacRxPayload[6] << 16 ); - 777:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 778:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevAddr = ( uint32_t )LoRaMacRxPayload[7]; - 779:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevAddr |= ( ( uint32_t )LoRaMacRxPayload[8] << 8 ); - 780:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevAddr |= ( ( uint32_t )LoRaMacRxPayload[9] << 16 ); - 781:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevAddr |= ( ( uint32_t )LoRaMacRxPayload[10] << 24 ); - 782:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 783:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // DLSettings - 784:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx1DrOffset = ( LoRaMacRxPayload[11] >> 4 ) & 0x07; - 785:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel.Datarate = LoRaMacRxPayload[11] & 0x0F; - 786:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 787:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // RxDelay - 788:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay1 = ( LoRaMacRxPayload[12] & 0x0F ); - 789:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacParams.ReceiveDelay1 == 0 ) - 790:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 791:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay1 = 1; - 792:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 793:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay1 *= 1000; - 794:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay2 = LoRaMacParams.ReceiveDelay1 + 1000; - 795:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 796:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Apply CF list - 797:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** applyCFList.Payload = &LoRaMacRxPayload[13]; - 798:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Size of the regular payload is 12. Plus 1 byte MHDR and 4 bytes MIC - 799:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** applyCFList.Size = size - 17; - 800:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 801:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionApplyCFList( LoRaMacRegion, &applyCFList ); - 802:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 803:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_OK; - 804:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** IsLoRaMacNetworkJoined = true; - 805:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = LoRaMacParamsDefaults.ChannelsDatarate; - 806:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 807:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else - 808:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 809:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_JOIN_FAIL; - 810:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 811:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 812:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_DATA_CONFIRMED_DOWN: - 813:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_DATA_UNCONFIRMED_DOWN: - 814:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 815:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Check if the received payload size is valid - 816:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.UplinkDwellTime = LoRaMacParams.DownlinkDwellTime; - 817:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Datarate = McpsIndication.RxDatarate; - 818:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_PAYLOAD; - 819:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 820:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Get the maximum payload length - 821:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RepeaterSupport == true ) - 822:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 823:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_PAYLOAD_REPEATER; - 824:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 825:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 826:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MAX( 0, ( int16_t )( ( int16_t )size - ( int16_t )LORA_MAC_FRMPAYLOAD_OVERHEAD - 827:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 828:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_ERROR; - 829:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 830:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 831:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 832:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 16 - - - 833:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** address = payload[pktHeaderLen++]; - 834:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** address |= ( (uint32_t)payload[pktHeaderLen++] << 8 ); - 835:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** address |= ( (uint32_t)payload[pktHeaderLen++] << 16 ); - 836:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** address |= ( (uint32_t)payload[pktHeaderLen++] << 24 ); - 837:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 838:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( address != LoRaMacDevAddr ) - 839:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 840:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** curMulticastParams = MulticastChannels; - 841:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** while( curMulticastParams != NULL ) - 842:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 843:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( address == curMulticastParams->Address ) - 844:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 845:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** multicast = 1; - 846:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nwkSKey = curMulticastParams->NwkSKey; - 847:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** appSKey = curMulticastParams->AppSKey; - 848:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** downLinkCounter = curMulticastParams->DownLinkCounter; - 849:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 850:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 851:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** curMulticastParams = curMulticastParams->Next; - 852:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 853:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( multicast == 0 ) - 854:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 855:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // We are not the destination of this frame. - 856:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_ADDRESS_FAIL; - 857:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 858:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 859:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 860:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 861:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else - 862:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 863:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** multicast = 0; - 864:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nwkSKey = LoRaMacNwkSKey; - 865:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** appSKey = LoRaMacAppSKey; - 866:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** downLinkCounter = DownLinkCounter; - 867:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 868:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 869:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Value = payload[pktHeaderLen++]; - 870:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 871:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** sequenceCounter = ( uint16_t )payload[pktHeaderLen++]; - 872:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** sequenceCounter |= ( uint16_t )payload[pktHeaderLen++] << 8; - 873:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 874:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** appPayloadStartIndex = 8 + fCtrl.Bits.FOptsLen; - 875:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 876:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( uint32_t )payload[size - LORAMAC_MFR_LEN]; - 877:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )payload[size - LORAMAC_MFR_LEN + 1] << 8 ); - 878:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )payload[size - LORAMAC_MFR_LEN + 2] << 16 ); - 879:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )payload[size - LORAMAC_MFR_LEN + 3] << 24 ); - 880:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 881:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** sequenceCounterPrev = ( uint16_t )downLinkCounter; - 882:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** sequenceCounterDiff = ( sequenceCounter - sequenceCounterPrev ); - 883:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 884:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( sequenceCounterDiff < ( 1 << 15 ) ) - 885:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 886:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** downLinkCounter += sequenceCounterDiff; - 887:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacComputeMic( payload, size - LORAMAC_MFR_LEN, nwkSKey, address, DOWN_LINK - 888:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( micRx == mic ) - 889:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - ARM GAS /tmp/ccrFaSdZ.s page 17 - - - 890:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** isMicOk = true; - 891:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 892:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 893:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else - 894:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 895:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // check for sequence roll-over - 896:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint32_t downLinkCounterTmp = downLinkCounter + 0x10000 + ( int16_t )sequenceC - 897:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacComputeMic( payload, size - LORAMAC_MFR_LEN, nwkSKey, address, DOWN_LINK - 898:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( micRx == mic ) - 899:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 900:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** isMicOk = true; - 901:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** downLinkCounter = downLinkCounterTmp; - 902:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 903:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 904:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 905:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Check for a the maximum allowed counter difference - 906:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_FCNT_GAP; - 907:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 908:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( sequenceCounterDiff >= phyParam.Value ) - 909:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 910:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_DOWNLINK_TOO_MANY_FRAMES_LOSS - 911:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = downLinkCounter; - 912:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 913:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 914:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 915:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 916:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( isMicOk == true ) - 917:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 918:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_OK; - 919:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Multicast = multicast; - 920:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.FramePending = fCtrl.Bits.FPending; - 921:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Buffer = NULL; - 922:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.BufferSize = 0; - 923:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = downLinkCounter; - 924:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 925:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_OK; - 926:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 927:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AdrAckCounter = 0; - 928:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferToRepeatIndex = 0; - 929:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 930:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update 32 bits downlink counter - 931:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( multicast == 1 ) - 932:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 933:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.McpsIndication = MCPS_MULTICAST; - 934:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 935:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( curMulticastParams->DownLinkCounter == downLinkCounter ) && - 936:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( curMulticastParams->DownLinkCounter != 0 ) ) - 937:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 938:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_DOWNLINK_REPEATED; - 939:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = downLinkCounter; - 940:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 941:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 942:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 943:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** curMulticastParams->DownLinkCounter = downLinkCounter; - 944:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 945:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else - 946:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - ARM GAS /tmp/ccrFaSdZ.s page 18 - - - 947:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( macHdr.Bits.MType == FRAME_TYPE_DATA_CONFIRMED_DOWN ) - 948:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 949:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** SrvAckRequested = true; - 950:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.McpsIndication = MCPS_CONFIRMED; - 951:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 952:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( DownLinkCounter == downLinkCounter ) && - 953:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( DownLinkCounter != 0 ) ) - 954:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 955:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Duplicated confirmed downlink. Skip indication. - 956:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // In this case, the MAC layer shall accept the MAC commands - 957:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // which are included in the downlink retransmission. - 958:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // It should not provide the same frame to the application - 959:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // layer again. - 960:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** skipIndication = true; - 961:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 962:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 963:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else - 964:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 965:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** SrvAckRequested = false; - 966:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.McpsIndication = MCPS_UNCONFIRMED; - 967:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 968:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( DownLinkCounter == downLinkCounter ) && - 969:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( DownLinkCounter != 0 ) ) - 970:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 971:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_DOWNLINK_REPEATED - 972:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = downLinkCounter; - 973:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 974:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 975:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 976:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 977:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** DownLinkCounter = downLinkCounter; - 978:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 979:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 980:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // This must be done before parsing the payload and the MAC commands. - 981:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // We need to reset the MacCommandsBufferIndex here, since we need - 982:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // to take retransmissions and repetitions into account. Error cases - 983:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // will be handled in function OnMacStateCheckTimerEvent. - 984:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( McpsConfirm.McpsRequest == MCPS_CONFIRMED ) - 985:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 986:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( fCtrl.Bits.Ack == 1 ) - 987:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Reset MacCommandsBufferIndex when we have received an ACK. - 988:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; - 989:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 990:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 991:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else - 992:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Reset the variable if we have received any valid frame. - 993:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; - 994:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 995:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 996:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Process payload and MAC commands - 997:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( ( size - 4 ) - appPayloadStartIndex ) > 0 ) - 998:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 999:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** port = payload[appPayloadStartIndex++]; -1000:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** frameLen = ( size - 4 ) - appPayloadStartIndex; -1001:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1002:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Port = port; -1003:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 19 - - -1004:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( port == 0 ) -1005:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1006:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Only allow frames which do not have fOpts -1007:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( fCtrl.Bits.FOptsLen == 0 ) -1008:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1009:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacPayloadDecrypt( payload + appPayloadStartIndex, -1010:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** frameLen, -1011:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nwkSKey, -1012:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** address, -1013:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** DOWN_LINK, -1014:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** downLinkCounter, -1015:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacRxPayload ); -1016:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1017:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Decode frame payload MAC commands -1018:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ProcessMacCommands( LoRaMacRxPayload, 0, frameLen, snr ); -1019:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1020:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1021:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1022:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** skipIndication = true; -1023:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1024:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1025:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1026:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1027:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( fCtrl.Bits.FOptsLen > 0 ) -1028:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1029:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Decode Options field MAC commands. Omit the fPort. -1030:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ProcessMacCommands( payload, 8, appPayloadStartIndex - 1, snr ); -1031:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1032:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1033:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacPayloadDecrypt( payload + appPayloadStartIndex, -1034:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** frameLen, -1035:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** appSKey, -1036:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** address, -1037:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** DOWN_LINK, -1038:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** downLinkCounter, -1039:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacRxPayload ); -1040:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1041:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( skipIndication == false ) -1042:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1043:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Buffer = LoRaMacRxPayload; -1044:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.BufferSize = frameLen; -1045:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.RxData = true; -1046:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1047:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1048:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1049:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1050:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1051:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( fCtrl.Bits.FOptsLen > 0 ) -1052:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1053:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Decode Options field MAC commands -1054:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ProcessMacCommands( payload, 8, appPayloadStartIndex, snr ); -1055:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1056:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1057:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1058:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( skipIndication == false ) -1059:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1060:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Check if the frame is an acknowledgement - ARM GAS /tmp/ccrFaSdZ.s page 20 - - -1061:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( fCtrl.Bits.Ack == 1 ) -1062:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1063:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = true; -1064:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.AckReceived = true; -1065:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1066:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Stop the AckTimeout timer as no more retransmissions -1067:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // are needed. -1068:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &AckTimeoutTimer ); -1069:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1070:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1071:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1072:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; -1073:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1074:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( AckTimeoutRetriesCounter > AckTimeoutRetries ) -1075:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1076:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Stop the AckTimeout timer as no more retransmissions -1077:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // are needed. -1078:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &AckTimeoutTimer ); -1079:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1080:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1081:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1082:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Provide always an indication, skip the callback to the user application, -1083:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // in case of a confirmed downlink retransmission. -1084:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsInd = 1; -1085:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsIndSkip = skipIndication; -1086:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1087:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1088:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1089:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_MIC_FAIL; -1090:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1091:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); -1092:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; -1093:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1094:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1095:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1096:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_PROPRIETARY: -1097:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1098:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memcpy1( LoRaMacRxPayload, &payload[pktHeaderLen], size ); -1099:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1100:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.McpsIndication = MCPS_PROPRIETARY; -1101:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_OK; -1102:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Buffer = LoRaMacRxPayload; -1103:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.BufferSize = size - pktHeaderLen; -1104:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1105:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsInd = 1; -1106:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1107:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1108:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: -1109:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_ERROR; -1110:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); -1111:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1112:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1113:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; -1114:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1115:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Trig OnMacCheckTimerEvent call as soon as possible -1116:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &MacStateCheckTimer, 1 ); -1117:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &MacStateCheckTimer ); - ARM GAS /tmp/ccrFaSdZ.s page 21 - - -1118:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1119:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1120:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioTxTimeout( void ) -1121:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1122:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) -1123:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1124:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Sleep( ); -1125:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1126:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1127:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1128:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** OnRxWindow2TimerEvent( ); -1129:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1130:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1131:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_TX_TIMEOUT; -1132:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_TX_TIMEOUT; -1133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; -1134:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1135:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1136:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioRxError( void ) -1137:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1138:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) -1139:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1140:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Sleep( ); -1141:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1142:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1143:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1144:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** OnRxWindow2TimerEvent( ); -1145:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1146:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1147:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RxSlot == 0 ) -1148:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1149:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( NodeAckRequested == true ) -1150:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1151:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX1_ERROR; -1152:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1153:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX1_ERROR; -1154:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1155:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( TimerGetElapsedTime( AggregatedLastTxDoneTime ) >= RxWindow2Delay ) -1156:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1157:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; -1158:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1159:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1160:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1161:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1162:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( NodeAckRequested == true ) -1163:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1164:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX2_ERROR; -1165:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1166:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX2_ERROR; -1167:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; -1168:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1169:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1170:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1171:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRadioRxTimeout( void ) -1172:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1173:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) -1174:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - ARM GAS /tmp/ccrFaSdZ.s page 22 - - -1175:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Sleep( ); -1176:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1177:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1178:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1179:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** OnRxWindow2TimerEvent( ); -1180:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1181:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1182:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RxSlot == 0 ) -1183:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1184:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( NodeAckRequested == true ) -1185:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1186:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX1_TIMEOUT; -1187:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1188:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX1_TIMEOUT; -1189:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1190:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( TimerGetElapsedTime( AggregatedLastTxDoneTime ) >= RxWindow2Delay ) -1191:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1192:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; -1193:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1194:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1195:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1196:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1197:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( NodeAckRequested == true ) -1198:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1199:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX2_TIMEOUT; -1200:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1201:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX2_TIMEOUT; -1202:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1203:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) -1204:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1205:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; -1206:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1207:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1208:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1209:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1210:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnMacStateCheckTimerEvent( void ) -1211:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1212:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; -1213:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PhyParam_t phyParam; -1214:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** bool txTimeout = false; -1215:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1216:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &MacStateCheckTimer ); -1217:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1218:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacFlags.Bits.MacDone == 1 ) -1219:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1220:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_RX_ABORT ) == LORAMAC_RX_ABORT ) -1221:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1222:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_RX_ABORT; -1223:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; -1224:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1225:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1226:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacFlags.Bits.MlmeReq == 1 ) || ( ( LoRaMacFlags.Bits.McpsReq == 1 ) ) ) -1227:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1228:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( McpsConfirm.Status == LORAMAC_EVENT_INFO_STATUS_TX_TIMEOUT ) || -1229:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( MlmeConfirm.Status == LORAMAC_EVENT_INFO_STATUS_TX_TIMEOUT ) ) -1230:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1231:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Stop transmit cycle due to tx timeout. - ARM GAS /tmp/ccrFaSdZ.s page 23 - - -1232:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; -1233:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; -1234:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.NbRetries = AckTimeoutRetriesCounter; -1235:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; -1236:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.TxTimeOnAir = 0; -1237:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txTimeout = true; -1238:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1239:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1240:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1241:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( NodeAckRequested == false ) && ( txTimeout == false ) ) -1242:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1243:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacFlags.Bits.MlmeReq == 1 ) || ( ( LoRaMacFlags.Bits.McpsReq == 1 ) ) ) -1244:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1245:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacFlags.Bits.MlmeReq == 1 ) && ( MlmeConfirm.MlmeRequest == MLME_JOIN ) -1246:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Procedure for the join request -1247:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.NbRetries = JoinRequestTrials; -1248:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1249:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MlmeConfirm.Status == LORAMAC_EVENT_INFO_STATUS_OK ) -1250:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Node joined successfully -1251:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** UpLinkCounter = 0; -1252:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChannelsNbRepCounter = 0; -1253:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; -1254:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1255:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1256:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1257:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( JoinRequestTrials >= MaxJoinRequestTrials ) -1258:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1259:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; -1260:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1261:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1262:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1263:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 0; -1264:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Sends the same frame again -1265:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** OnTxDelayedTimerEvent( ); -1266:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1267:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1268:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1269:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1270:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Procedure for all other frames -1271:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( ChannelsNbRepCounter >= LoRaMacParams.ChannelsNbRep ) || ( LoRaMacFlags.B -1272:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1273:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacFlags.Bits.McpsInd == 0 ) -1274:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { // Maximum repetitions without downlink. Reset MacCommandsBufferIndex. -1275:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Only process the case when the MAC did not receive a downlink. -1276:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; -1277:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AdrAckCounter++; -1278:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1279:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1280:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChannelsNbRepCounter = 0; -1281:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1282:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsUpLinkCounterFixed == false ) -1283:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1284:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** UpLinkCounter++; -1285:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1286:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1287:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; -1288:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - ARM GAS /tmp/ccrFaSdZ.s page 24 - - -1289:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1290:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1291:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 0; -1292:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Sends the same frame again -1293:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** OnTxDelayedTimerEvent( ); -1294:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1295:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1296:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1297:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1298:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1299:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacFlags.Bits.McpsInd == 1 ) -1300:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Procedure if we received a frame -1301:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( McpsConfirm.AckReceived == true ) || ( AckTimeoutRetriesCounter > AckTimeoutRetri -1302:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1303:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetry = false; -1304:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; -1305:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsUpLinkCounterFixed == false ) -1306:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1307:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** UpLinkCounter++; -1308:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1309:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.NbRetries = AckTimeoutRetriesCounter; -1310:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1311:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; -1312:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1313:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1314:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1315:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( AckTimeoutRetry == true ) && ( ( LoRaMacState & LORAMAC_TX_DELAYED ) == 0 ) ) -1316:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Retransmissions procedure for confirmed uplinks -1317:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetry = false; -1318:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( AckTimeoutRetriesCounter < AckTimeoutRetries ) && ( AckTimeoutRetriesCounter <= M -1319:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1320:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetriesCounter++; -1321:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1322:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( AckTimeoutRetriesCounter % 2 ) == 1 ) -1323:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1324:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_NEXT_LOWER_TX_DR; -1325:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; -1326:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Datarate = LoRaMacParams.ChannelsDatarate; -1327:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); -1328:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = phyParam.Value; -1329:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1330:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Try to send the frame again -1331:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ScheduleTx( ) == LORAMAC_STATUS_OK ) -1332:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1333:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 0; -1334:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1335:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1336:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1337:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // The DR is not applicable for the payload size -1338:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_TX_DR_PAYLOAD_SIZE_ERROR; -1339:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1340:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; -1341:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; -1342:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; -1343:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; -1344:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.NbRetries = AckTimeoutRetriesCounter; -1345:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Datarate = LoRaMacParams.ChannelsDatarate; - ARM GAS /tmp/ccrFaSdZ.s page 25 - - -1346:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsUpLinkCounterFixed == false ) -1347:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1348:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** UpLinkCounter++; -1349:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1350:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1351:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1352:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1353:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1354:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionInitDefaults( LoRaMacRegion, INIT_TYPE_RESTORE ); -1355:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1356:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; -1357:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1358:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; -1359:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; -1360:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; -1361:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.NbRetries = AckTimeoutRetriesCounter; -1362:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsUpLinkCounterFixed == false ) -1363:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1364:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** UpLinkCounter++; -1365:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1366:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1367:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1368:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1369:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Handle reception for Class B and Class C -1370:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_RX ) == LORAMAC_RX ) -1371:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1372:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_RX; -1373:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1374:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacState == LORAMAC_IDLE ) -1375:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1376:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacFlags.Bits.McpsReq == 1 ) -1377:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1378:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacPrimitives->MacMcpsConfirm( &McpsConfirm ); -1379:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsReq = 0; -1380:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1381:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1382:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacFlags.Bits.MlmeReq == 1 ) -1383:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1384:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacPrimitives->MacMlmeConfirm( &MlmeConfirm ); -1385:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 0; -1386:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1387:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1388:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Procedure done. Reset variables. -1389:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 0; -1390:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1391:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1392:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1393:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Operation not finished restart timer -1394:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &MacStateCheckTimer, MAC_STATE_CHECK_TIMEOUT ); -1395:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &MacStateCheckTimer ); -1396:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1397:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1398:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacFlags.Bits.McpsInd == 1 ) -1399:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1400:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass == CLASS_C ) -1401:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Activate RX2 window for Class C -1402:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** OnRxWindow2TimerEvent( ); - ARM GAS /tmp/ccrFaSdZ.s page 26 - - -1403:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1404:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacFlags.Bits.McpsIndSkip == 0 ) -1405:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1406:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacPrimitives->MacMcpsIndication( &McpsIndication ); -1407:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1408:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsIndSkip = 0; -1409:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsInd = 0; -1410:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1411:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1412:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1413:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnTxDelayedTimerEvent( void ) -1414:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1415:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacHeader_t macHdr; -1416:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFrameCtrl_t fCtrl; -1417:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AlternateDrParams_t altDr; -1418:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1419:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &TxDelayedTimer ); -1420:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_DELAYED; -1421:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1422:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacFlags.Bits.MlmeReq == 1 ) && ( MlmeConfirm.MlmeRequest == MLME_JOIN ) ) -1423:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1424:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ResetMacParameters( ); -1425:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1426:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** altDr.NbTrials = JoinRequestTrials + 1; -1427:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = RegionAlternateDr( LoRaMacRegion, &altDr ); -1428:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1429:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Value = 0; -1430:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Bits.MType = FRAME_TYPE_JOIN_REQ; -1431:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1432:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Value = 0; -1433:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Bits.Adr = AdrCtrlOn; -1434:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1435:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** /* In case of join request retransmissions, the stack must prepare -1436:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * the frame again, because the network server keeps track of the random -1437:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** * LoRaMacDevNonce values to prevent reply attacks. */ -1438:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareFrame( &macHdr, &fCtrl, 0, NULL, 0 ); -1439:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1440:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1441:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ScheduleTx( ); -1442:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1443:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1444:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRxWindow1TimerEvent( void ) -1445:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1446:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &RxWindowTimer1 ); -1447:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxSlot = 0; -1448:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1449:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.Channel = Channel; -1450:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.DrOffset = LoRaMacParams.Rx1DrOffset; -1451:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.DownlinkDwellTime = LoRaMacParams.DownlinkDwellTime; -1452:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.RepeaterSupport = RepeaterSupport; -1453:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.RxContinuous = false; -1454:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.Window = RxSlot; -1455:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1456:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass == CLASS_C ) -1457:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1458:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Standby( ); -1459:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - ARM GAS /tmp/ccrFaSdZ.s page 27 - - -1460:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1461:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionRxConfig( LoRaMacRegion, &RxWindow1Config, ( int8_t* )&McpsIndication.RxDatarate ); -1462:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindowSetup( RxWindow1Config.RxContinuous, LoRaMacParams.MaxRxWindow ); -1463:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1464:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1465:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnRxWindow2TimerEvent( void ) -1466:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1467:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &RxWindowTimer2 ); -1468:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1469:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.Channel = Channel; -1470:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.Frequency = LoRaMacParams.Rx2Channel.Frequency; -1471:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.DownlinkDwellTime = LoRaMacParams.DownlinkDwellTime; -1472:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.RepeaterSupport = RepeaterSupport; -1473:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.Window = 1; -1474:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1475:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) -1476:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1477:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.RxContinuous = false; -1478:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1479:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1480:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1481:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.RxContinuous = true; -1482:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1483:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1484:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionRxConfig( LoRaMacRegion, &RxWindow2Config, ( int8_t* )&McpsIndication.RxDatarate ) == -1485:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1486:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindowSetup( RxWindow2Config.RxContinuous, LoRaMacParams.MaxRxWindow ); -1487:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxSlot = RxWindow2Config.Window; -1488:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1489:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1490:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1491:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void OnAckTimeoutTimerEvent( void ) -1492:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1493:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &AckTimeoutTimer ); -1494:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1495:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( NodeAckRequested == true ) -1496:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1497:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetry = true; -1498:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_ACK_REQ; -1499:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1500:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass == CLASS_C ) -1501:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1502:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; -1503:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1504:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1505:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1506:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void RxWindowSetup( bool rxContinuous, uint32_t maxRxWindow ) -1507:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1508:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( rxContinuous == false ) -1509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1510:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Rx( maxRxWindow ); -1511:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1512:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1513:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1514:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Rx( 0 ); // Continuous mode -1515:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1516:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - ARM GAS /tmp/ccrFaSdZ.s page 28 - - -1517:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1518:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static bool ValidatePayloadLength( uint8_t lenN, int8_t datarate, uint8_t fOptsLen ) -1519:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1520:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; -1521:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PhyParam_t phyParam; -1522:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint16_t maxN = 0; -1523:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint16_t payloadSize = 0; -1524:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1525:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Setup PHY request -1526:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; -1527:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Datarate = datarate; -1528:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_PAYLOAD; -1529:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1530:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Get the maximum payload length -1531:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RepeaterSupport == true ) -1532:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1533:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_PAYLOAD_REPEATER; -1534:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1535:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); -1536:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** maxN = phyParam.Value; -1537:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1538:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Calculate the resulting payload size -1539:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** payloadSize = ( lenN + fOptsLen ); -1540:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1541:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Validation of the application payload size -1542:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( payloadSize <= maxN ) && ( payloadSize <= LORAMAC_PHY_MAXPAYLOAD ) ) -1543:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1544:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return true; -1545:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1546:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return false; -1547:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1548:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1549:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static LoRaMacStatus_t AddMacCommand( uint8_t cmd, uint8_t p1, uint8_t p2 ) -1550:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1551:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t status = LORAMAC_STATUS_BUSY; -1552:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // The maximum buffer length must take MAC commands to re-send into account. -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t bufLen = LORA_MAC_COMMAND_MAX_LENGTH - MacCommandsBufferToRepeatIndex; -1554:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1555:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( cmd ) -1556:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1557:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_LINK_CHECK_REQ: -1558:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex < bufLen ) -1559:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1560:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = cmd; -1561:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // No payload for this command -1562:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; -1563:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1564:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1565:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_LINK_ADR_ANS: -1566:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex < ( bufLen - 1 ) ) -1567:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1568:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = cmd; -1569:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Margin -1570:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = p1; -1571:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; -1572:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1573:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - ARM GAS /tmp/ccrFaSdZ.s page 29 - - -1574:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_DUTY_CYCLE_ANS: -1575:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex < bufLen ) -1576:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1577:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = cmd; -1578:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // No payload for this answer -1579:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; -1580:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1581:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1582:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_RX_PARAM_SETUP_ANS: -1583:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex < ( bufLen - 1 ) ) -1584:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1585:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = cmd; -1586:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Status: Datarate ACK, Channel ACK -1587:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = p1; -1588:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; -1589:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1590:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1591:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_DEV_STATUS_ANS: -1592:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex < ( bufLen - 2 ) ) -1593:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1594:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = cmd; -1595:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // 1st byte Battery -1596:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // 2nd byte Margin -1597:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = p1; -1598:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = p2; -1599:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; -1600:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1601:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1602:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_NEW_CHANNEL_ANS: -1603:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex < ( bufLen - 1 ) ) -1604:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1605:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = cmd; -1606:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Status: Datarate range OK, Channel frequency OK -1607:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = p1; -1608:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; -1609:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1610:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1611:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_RX_TIMING_SETUP_ANS: -1612:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex < bufLen ) -1613:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1614:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = cmd; -1615:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // No payload for this answer -1616:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; -1617:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1618:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1619:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_TX_PARAM_SETUP_ANS: -1620:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex < bufLen ) -1621:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1622:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = cmd; -1623:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // No payload for this answer -1624:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; -1625:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1626:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1627:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_DL_CHANNEL_ANS: -1628:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex < bufLen ) -1629:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1630:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = cmd; - ARM GAS /tmp/ccrFaSdZ.s page 30 - - -1631:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Status: Uplink frequency exists, Channel frequency OK -1632:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = p1; -1633:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; -1634:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1635:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1636:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: -1637:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_SERVICE_UNKNOWN; -1638:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1639:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( status == LORAMAC_STATUS_OK ) -1640:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsInNextTx = true; -1642:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1643:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return status; -1644:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1645:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1646:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static uint8_t ParseMacCommandsToRepeat( uint8_t* cmdBufIn, uint8_t length, uint8_t* cmdBufOut ) -1647:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1648:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t i = 0; -1649:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t cmdCount = 0; -1650:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1651:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( cmdBufIn == NULL ) || ( cmdBufOut == NULL ) ) -1652:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1653:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return 0; -1654:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1655:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1656:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** for( i = 0; i < length; i++ ) -1657:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1658:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( cmdBufIn[i] ) -1659:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1660:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // STICKY -1661:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_DL_CHANNEL_ANS: -1662:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_RX_PARAM_SETUP_ANS: -1663:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { // 1 byte payload -1664:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cmdBufOut[cmdCount++] = cmdBufIn[i++]; -1665:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cmdBufOut[cmdCount++] = cmdBufIn[i]; -1666:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1667:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1668:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_RX_TIMING_SETUP_ANS: -1669:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { // 0 byte payload -1670:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cmdBufOut[cmdCount++] = cmdBufIn[i]; -1671:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1672:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1673:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // NON-STICKY -1674:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_DEV_STATUS_ANS: -1675:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { // 2 bytes payload -1676:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** i += 2; -1677:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1678:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1679:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_LINK_ADR_ANS: -1680:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_NEW_CHANNEL_ANS: -1681:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { // 1 byte payload -1682:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** i++; -1683:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1684:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1685:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_TX_PARAM_SETUP_ANS: -1686:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_DUTY_CYCLE_ANS: -1687:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MOTE_MAC_LINK_CHECK_REQ: - ARM GAS /tmp/ccrFaSdZ.s page 31 - - -1688:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { // 0 byte payload -1689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1690:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1691:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: -1692:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1693:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1694:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1695:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1696:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return cmdCount; -1697:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1698:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1699:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void ProcessMacCommands( uint8_t *payload, uint8_t macIndex, uint8_t commandsSize, uint8_t s -1700:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1701:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t status = 0; -1702:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1703:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** while( macIndex < commandsSize ) -1704:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1705:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Decode Frame MAC commands -1706:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( payload[macIndex++] ) -1707:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1708:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_LINK_CHECK_ANS: -1709:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_OK; -1710:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.DemodMargin = payload[macIndex++]; -1711:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.NbGateways = payload[macIndex++]; -1712:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1713:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_LINK_ADR_REQ: -1714:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1715:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LinkAdrReqParams_t linkAdrReq; -1716:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** int8_t linkAdrDatarate = DR_0; -1717:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** int8_t linkAdrTxPower = TX_POWER_0; -1718:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t linkAdrNbRep = 0; -1719:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t linkAdrNbBytesParsed = 0; -1720:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1721:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Fill parameter structure -1722:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.Payload = &payload[macIndex - 1]; -1723:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.PayloadSize = commandsSize - ( macIndex - 1 ); -1724:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.AdrEnabled = AdrCtrlOn; -1725:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; -1726:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.CurrentDatarate = LoRaMacParams.ChannelsDatarate; -1727:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.CurrentTxPower = LoRaMacParams.ChannelsTxPower; -1728:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.CurrentNbRep = LoRaMacParams.ChannelsNbRep; -1729:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1730:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Process the ADR requests -1731:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = RegionLinkAdrReq( LoRaMacRegion, &linkAdrReq, &linkAdrDatarate, -1732:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** &linkAdrTxPower, &linkAdrNbRep, &linkAdrNbBytesParse -1733:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1734:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( status & 0x07 ) == 0x07 ) -1735:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1736:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = linkAdrDatarate; -1737:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsTxPower = linkAdrTxPower; -1738:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsNbRep = linkAdrNbRep; -1739:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1740:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1741:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Add the answers to the buffer -1742:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** for( uint8_t i = 0; i < ( linkAdrNbBytesParsed / 5 ); i++ ) -1743:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1744:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_LINK_ADR_ANS, status, 0 ); - ARM GAS /tmp/ccrFaSdZ.s page 32 - - -1745:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1746:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update MAC index -1747:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macIndex += linkAdrNbBytesParsed - 1; -1748:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1749:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1750:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_DUTY_CYCLE_REQ: -1751:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MaxDCycle = payload[macIndex++]; -1752:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AggregatedDCycle = 1 << MaxDCycle; -1753:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_DUTY_CYCLE_ANS, 0, 0 ); -1754:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1755:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_RX_PARAM_SETUP_REQ: -1756:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1757:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxParamSetupReqParams_t rxParamSetupReq; -1758:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = 0x07; -1759:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1760:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.DrOffset = ( payload[macIndex] >> 4 ) & 0x07; -1761:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.Datarate = payload[macIndex] & 0x0F; -1762:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macIndex++; -1763:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1764:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.Frequency = ( uint32_t )payload[macIndex++]; -1765:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.Frequency |= ( uint32_t )payload[macIndex++] << 8; -1766:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.Frequency |= ( uint32_t )payload[macIndex++] << 16; -1767:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.Frequency *= 100; -1768:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1769:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Perform request on region -1770:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = RegionRxParamSetupReq( LoRaMacRegion, &rxParamSetupReq ); -1771:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1772:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( status & 0x07 ) == 0x07 ) -1773:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1774:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel.Datarate = rxParamSetupReq.Datarate; -1775:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel.Frequency = rxParamSetupReq.Frequency; -1776:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx1DrOffset = rxParamSetupReq.DrOffset; -1777:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1778:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_RX_PARAM_SETUP_ANS, status, 0 ); -1779:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1780:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1781:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_DEV_STATUS_REQ: -1782:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1783:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t batteryLevel = BAT_LEVEL_NO_MEASURE; -1784:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacCallbacks != NULL ) && ( LoRaMacCallbacks->GetBatteryLevel != NULL -1785:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1786:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** batteryLevel = LoRaMacCallbacks->GetBatteryLevel( ); -1787:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1788:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_DEV_STATUS_ANS, batteryLevel, snr ); -1789:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1790:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1791:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_NEW_CHANNEL_REQ: -1792:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1793:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NewChannelReqParams_t newChannelReq; -1794:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChannelParams_t chParam; -1795:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = 0x03; -1796:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1797:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** newChannelReq.ChannelId = payload[macIndex++]; -1798:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** newChannelReq.NewChannel = &chParam; -1799:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1800:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.Frequency = ( uint32_t )payload[macIndex++]; -1801:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.Frequency |= ( uint32_t )payload[macIndex++] << 8; - ARM GAS /tmp/ccrFaSdZ.s page 33 - - -1802:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.Frequency |= ( uint32_t )payload[macIndex++] << 16; -1803:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.Frequency *= 100; -1804:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.Rx1Frequency = 0; -1805:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.DrRange.Value = payload[macIndex++]; -1806:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1807:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = RegionNewChannelReq( LoRaMacRegion, &newChannelReq ); -1808:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1809:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_NEW_CHANNEL_ANS, status, 0 ); -1810:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1811:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1812:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_RX_TIMING_SETUP_REQ: -1813:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1814:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t delay = payload[macIndex++] & 0x0F; -1815:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1816:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( delay == 0 ) -1817:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1818:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** delay++; -1819:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1820:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay1 = delay * 1000; -1821:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay2 = LoRaMacParams.ReceiveDelay1 + 1000; -1822:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_RX_TIMING_SETUP_ANS, 0, 0 ); -1823:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1824:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1825:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_TX_PARAM_SETUP_REQ: -1826:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1827:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TxParamSetupReqParams_t txParamSetupReq; -1828:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t eirpDwellTime = payload[macIndex++]; -1829:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1830:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txParamSetupReq.UplinkDwellTime = 0; -1831:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txParamSetupReq.DownlinkDwellTime = 0; -1832:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1833:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( eirpDwellTime & 0x20 ) == 0x20 ) -1834:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1835:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txParamSetupReq.DownlinkDwellTime = 1; -1836:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1837:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( eirpDwellTime & 0x10 ) == 0x10 ) -1838:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1839:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txParamSetupReq.UplinkDwellTime = 1; -1840:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1841:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txParamSetupReq.MaxEirp = eirpDwellTime & 0x0F; -1842:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1843:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Check the status for correctness -1844:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionTxParamSetupReq( LoRaMacRegion, &txParamSetupReq ) != -1 ) -1845:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1846:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Accept command -1847:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.UplinkDwellTime = txParamSetupReq.UplinkDwellTime; -1848:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.DownlinkDwellTime = txParamSetupReq.DownlinkDwellTime; -1849:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MaxEirp = LoRaMacMaxEirpTable[txParamSetupReq.MaxEirp]; -1850:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Add command response -1851:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_TX_PARAM_SETUP_ANS, 0, 0 ); -1852:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1853:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1854:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1855:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_DL_CHANNEL_REQ: -1856:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1857:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** DlChannelReqParams_t dlChannelReq; -1858:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = 0x03; - ARM GAS /tmp/ccrFaSdZ.s page 34 - - -1859:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1860:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** dlChannelReq.ChannelId = payload[macIndex++]; -1861:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** dlChannelReq.Rx1Frequency = ( uint32_t )payload[macIndex++]; -1862:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** dlChannelReq.Rx1Frequency |= ( uint32_t )payload[macIndex++] << 8; -1863:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** dlChannelReq.Rx1Frequency |= ( uint32_t )payload[macIndex++] << 16; -1864:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** dlChannelReq.Rx1Frequency *= 100; -1865:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1866:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = RegionDlChannelReq( LoRaMacRegion, &dlChannelReq ); -1867:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1868:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_DL_CHANNEL_ANS, status, 0 ); -1869:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1870:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -1871:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: -1872:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Unknown command. ABORT MAC commands processing -1873:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; -1874:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1875:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1876:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1877:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1878:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t Send( LoRaMacHeader_t *macHdr, uint8_t fPort, void *fBuffer, uint16_t fBufferSize ) -1879:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1880:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFrameCtrl_t fCtrl; -1881:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t status = LORAMAC_STATUS_PARAMETER_INVALID; -1882:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1883:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Value = 0; -1884:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Bits.FOptsLen = 0; -1885:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Bits.FPending = 0; -1886:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Bits.Ack = false; -1887:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Bits.AdrAckReq = false; -1888:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Bits.Adr = AdrCtrlOn; -1889:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1890:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Prepare the frame -1891:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = PrepareFrame( macHdr, &fCtrl, fPort, fBuffer, fBufferSize ); -1892:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1893:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Validate status -1894:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( status != LORAMAC_STATUS_OK ) -1895:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1896:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return status; -1897:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1898:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1899:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Reset confirm parameters -1900:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.NbRetries = 0; -1901:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; -1902:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.UpLinkCounter = UpLinkCounter; -1903:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1904:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = ScheduleTx( ); -1905:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1906:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return status; -1907:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1908:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1909:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static LoRaMacStatus_t ScheduleTx( void ) -1910:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1911:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerTime_t dutyCycleTimeOff = 0; -1912:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NextChanParams_t nextChan; -1913:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1914:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Check if the device is off -1915:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MaxDCycle == 255 ) - ARM GAS /tmp/ccrFaSdZ.s page 35 - - -1916:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1917:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_DEVICE_OFF; -1918:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1919:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MaxDCycle == 0 ) -1920:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1921:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AggregatedTimeOff = 0; -1922:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1923:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1924:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update Backoff -1925:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** CalculateBackOff( LastTxChannel ); -1926:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1927:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.AggrTimeOff = AggregatedTimeOff; -1928:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.Datarate = LoRaMacParams.ChannelsDatarate; -1929:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.DutyCycleEnabled = DutyCycleOn; -1930:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.Joined = IsLoRaMacNetworkJoined; -1931:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.LastAggrTx = AggregatedLastTxDoneTime; -1932:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1933:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Select channel -1934:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** while( RegionNextChannel( LoRaMacRegion, &nextChan, &Channel, &dutyCycleTimeOff, &AggregatedTim -1935:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1936:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Set the default datarate -1937:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = LoRaMacParamsDefaults.ChannelsDatarate; -1938:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update datarate in the function parameters -1939:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.Datarate = LoRaMacParams.ChannelsDatarate; -1940:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1941:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1942:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Compute Rx1 windows parameters -1943:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionComputeRxWindowParameters( LoRaMacRegion, -1944:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionApplyDrOffset( LoRaMacRegion, LoRaMacParams.DownlinkDwel -1945:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MinRxSymbols, -1946:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.SystemMaxRxError, -1947:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** &RxWindow1Config ); -1948:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Compute Rx2 windows parameters -1949:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionComputeRxWindowParameters( LoRaMacRegion, -1950:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel.Datarate, -1951:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MinRxSymbols, -1952:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.SystemMaxRxError, -1953:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** &RxWindow2Config ); -1954:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1955:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsLoRaMacNetworkJoined == false ) -1956:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1957:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Delay = LoRaMacParams.JoinAcceptDelay1 + RxWindow1Config.WindowOffset; -1958:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Delay = LoRaMacParams.JoinAcceptDelay2 + RxWindow2Config.WindowOffset; -1959:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1960:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1961:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1962:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ValidatePayloadLength( LoRaMacTxPayloadLen, LoRaMacParams.ChannelsDatarate, MacCommands -1963:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1964:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_LENGTH_ERROR; -1965:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1966:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Delay = LoRaMacParams.ReceiveDelay1 + RxWindow1Config.WindowOffset; -1967:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Delay = LoRaMacParams.ReceiveDelay2 + RxWindow2Config.WindowOffset; -1968:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1969:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1970:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Schedule transmission of frame -1971:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( dutyCycleTimeOff == 0 ) -1972:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - ARM GAS /tmp/ccrFaSdZ.s page 36 - - -1973:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Try to send now -1974:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return SendFrameOnChannel( Channel ); -1975:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1976:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -1977:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1978:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Send later - prepare timer -1979:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState |= LORAMAC_TX_DELAYED; -1980:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &TxDelayedTimer, dutyCycleTimeOff ); -1981:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &TxDelayedTimer ); -1982:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1983:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; -1984:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1985:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -1986:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1987:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void CalculateBackOff( uint8_t channel ) -1988:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -1989:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** CalcBackOffParams_t calcBackOff; -1990:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1991:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.Joined = IsLoRaMacNetworkJoined; -1992:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.DutyCycleEnabled = DutyCycleOn; -1993:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.Channel = channel; -1994:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.ElapsedTime = TimerGetElapsedTime( LoRaMacInitializationTime ); -1995:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.TxTimeOnAir = TxTimeOnAir; -1996:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.LastTxIsJoinRequest = LastTxIsJoinRequest; -1997:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -1998:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update regional back-off -1999:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionCalcBackOff( LoRaMacRegion, &calcBackOff ); -2000:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2001:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update aggregated time-off -2002:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AggregatedTimeOff = AggregatedTimeOff + ( TxTimeOnAir * AggregatedDCycle - TxTimeOnAir ); -2003:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2004:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2005:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** static void ResetMacParameters( void ) -2006:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 25 .loc 1 2006 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 0000 70B5 push {r4, r5, r6, lr} - 30 .LCFI0: - 31 .cfi_def_cfa_offset 16 - 32 .cfi_offset 4, -16 - 33 .cfi_offset 5, -12 - 34 .cfi_offset 6, -8 - 35 .cfi_offset 14, -4 -2007:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** IsLoRaMacNetworkJoined = false; - 36 .loc 1 2007 0 - 37 0002 0023 movs r3, #0 - 38 0004 244A ldr r2, .L4 - 39 0006 1370 strb r3, [r2] -2008:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2009:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Counters -2010:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** UpLinkCounter = 0; - 40 .loc 1 2010 0 - 41 0008 244A ldr r2, .L4+4 - 42 000a 1360 str r3, [r2] -2011:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** DownLinkCounter = 0; - ARM GAS /tmp/ccrFaSdZ.s page 37 - - - 43 .loc 1 2011 0 - 44 000c 244A ldr r2, .L4+8 - 45 000e 1360 str r3, [r2] -2012:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AdrAckCounter = 0; - 46 .loc 1 2012 0 - 47 0010 244A ldr r2, .L4+12 - 48 0012 1360 str r3, [r2] -2013:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2014:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChannelsNbRepCounter = 0; - 49 .loc 1 2014 0 - 50 0014 244A ldr r2, .L4+16 - 51 0016 1370 strb r3, [r2] -2015:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2016:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetries = 1; - 52 .loc 1 2016 0 - 53 0018 0122 movs r2, #1 - 54 001a 2449 ldr r1, .L4+20 - 55 001c 0A70 strb r2, [r1] -2017:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetriesCounter = 1; - 56 .loc 1 2017 0 - 57 001e 2449 ldr r1, .L4+24 - 58 0020 0A70 strb r2, [r1] -2018:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetry = false; - 59 .loc 1 2018 0 - 60 0022 2449 ldr r1, .L4+28 - 61 0024 0B70 strb r3, [r1] -2019:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2020:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MaxDCycle = 0; - 62 .loc 1 2020 0 - 63 0026 2449 ldr r1, .L4+32 - 64 0028 0B70 strb r3, [r1] -2021:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AggregatedDCycle = 1; - 65 .loc 1 2021 0 - 66 002a 2449 ldr r1, .L4+36 - 67 002c 0A80 strh r2, [r1] -2022:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2023:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; - 68 .loc 1 2023 0 - 69 002e 244A ldr r2, .L4+40 - 70 0030 1370 strb r3, [r2] -2024:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferToRepeatIndex = 0; - 71 .loc 1 2024 0 - 72 0032 244A ldr r2, .L4+44 - 73 0034 1370 strb r3, [r2] -2025:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2026:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** IsRxWindowsEnabled = true; - 74 .loc 1 2026 0 - 75 0036 0121 movs r1, #1 - 76 0038 234A ldr r2, .L4+48 - 77 003a 1170 strb r1, [r2] -2027:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2028:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsTxPower = LoRaMacParamsDefaults.ChannelsTxPower; - 78 .loc 1 2028 0 - 79 003c 2349 ldr r1, .L4+52 - 80 003e 0020 movs r0, #0 - 81 0040 0856 ldrsb r0, [r1, r0] - 82 0042 234A ldr r2, .L4+56 - ARM GAS /tmp/ccrFaSdZ.s page 38 - - - 83 0044 1070 strb r0, [r2] -2029:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = LoRaMacParamsDefaults.ChannelsDatarate; - 84 .loc 1 2029 0 - 85 0046 0120 movs r0, #1 - 86 0048 0856 ldrsb r0, [r1, r0] - 87 004a 5070 strb r0, [r2, #1] -2030:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx1DrOffset = LoRaMacParamsDefaults.Rx1DrOffset; - 88 .loc 1 2030 0 - 89 004c 2120 movs r0, #33 - 90 004e 0C5C ldrb r4, [r1, r0] - 91 0050 1454 strb r4, [r2, r0] -2031:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel = LoRaMacParamsDefaults.Rx2Channel; - 92 .loc 1 2031 0 - 93 0052 1000 movs r0, r2 - 94 0054 2430 adds r0, r0, #36 - 95 0056 0C00 movs r4, r1 - 96 0058 2434 adds r4, r4, #36 - 97 005a 60CC ldmia r4!, {r5, r6} - 98 005c 60C0 stmia r0!, {r5, r6} -2032:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.UplinkDwellTime = LoRaMacParamsDefaults.UplinkDwellTime; - 99 .loc 1 2032 0 - 100 005e 2C20 movs r0, #44 - 101 0060 0C5C ldrb r4, [r1, r0] - 102 0062 1454 strb r4, [r2, r0] -2033:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.DownlinkDwellTime = LoRaMacParamsDefaults.DownlinkDwellTime; - 103 .loc 1 2033 0 - 104 0064 0130 adds r0, r0, #1 - 105 0066 0C5C ldrb r4, [r1, r0] - 106 0068 1454 strb r4, [r2, r0] -2034:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MaxEirp = LoRaMacParamsDefaults.MaxEirp; - 107 .loc 1 2034 0 - 108 006a 086B ldr r0, [r1, #48] - 109 006c 1063 str r0, [r2, #48] -2035:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.AntennaGain = LoRaMacParamsDefaults.AntennaGain; - 110 .loc 1 2035 0 - 111 006e 496B ldr r1, [r1, #52] - 112 0070 5163 str r1, [r2, #52] -2036:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2037:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; - 113 .loc 1 2037 0 - 114 0072 184A ldr r2, .L4+60 - 115 0074 1370 strb r3, [r2] -2038:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** SrvAckRequested = false; - 116 .loc 1 2038 0 - 117 0076 184A ldr r2, .L4+64 - 118 0078 1370 strb r3, [r2] -2039:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsInNextTx = false; - 119 .loc 1 2039 0 - 120 007a 184A ldr r2, .L4+68 - 121 007c 1370 strb r3, [r2] -2040:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2041:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Reset Multicast downlink counters -2042:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MulticastParams_t *cur = MulticastChannels; - 122 .loc 1 2042 0 - 123 007e 184B ldr r3, .L4+72 - 124 0080 1B68 ldr r3, [r3] - 125 .LVL0: - ARM GAS /tmp/ccrFaSdZ.s page 39 - - -2043:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** while( cur != NULL ) - 126 .loc 1 2043 0 - 127 0082 02E0 b .L2 - 128 .L3: -2044:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2045:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cur->DownLinkCounter = 0; - 129 .loc 1 2045 0 - 130 0084 0022 movs r2, #0 - 131 0086 5A62 str r2, [r3, #36] -2046:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cur = cur->Next; - 132 .loc 1 2046 0 - 133 0088 9B6A ldr r3, [r3, #40] - 134 .LVL1: - 135 .L2: -2043:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** while( cur != NULL ) - 136 .loc 1 2043 0 - 137 008a 002B cmp r3, #0 - 138 008c FAD1 bne .L3 -2047:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2048:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2049:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Initialize channel index. -2050:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Channel = 0; - 139 .loc 1 2050 0 - 140 008e 154A ldr r2, .L4+76 - 141 0090 1370 strb r3, [r2] -2051:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LastTxChannel = Channel; - 142 .loc 1 2051 0 - 143 0092 154A ldr r2, .L4+80 - 144 0094 1370 strb r3, [r2] -2052:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 145 .loc 1 2052 0 - 146 @ sp needed - 147 0096 70BD pop {r4, r5, r6, pc} - 148 .L5: - 149 .align 2 - 150 .L4: - 151 0098 00000000 .word .LANCHOR0 - 152 009c 00000000 .word .LANCHOR1 - 153 00a0 00000000 .word .LANCHOR2 - 154 00a4 00000000 .word .LANCHOR3 - 155 00a8 00000000 .word .LANCHOR4 - 156 00ac 00000000 .word .LANCHOR5 - 157 00b0 00000000 .word .LANCHOR6 - 158 00b4 00000000 .word .LANCHOR7 - 159 00b8 00000000 .word .LANCHOR8 - 160 00bc 00000000 .word .LANCHOR9 - 161 00c0 00000000 .word .LANCHOR10 - 162 00c4 00000000 .word .LANCHOR11 - 163 00c8 00000000 .word .LANCHOR12 - 164 00cc 00000000 .word .LANCHOR13 - 165 00d0 00000000 .word .LANCHOR14 - 166 00d4 00000000 .word .LANCHOR15 - 167 00d8 00000000 .word .LANCHOR16 - 168 00dc 00000000 .word .LANCHOR17 - 169 00e0 00000000 .word .LANCHOR18 - 170 00e4 00000000 .word .LANCHOR19 - 171 00e8 00000000 .word .LANCHOR20 - ARM GAS /tmp/ccrFaSdZ.s page 40 - - - 172 .cfi_endproc - 173 .LFE104: - 175 .section .text.ValidatePayloadLength,"ax",%progbits - 176 .align 1 - 177 .syntax unified - 178 .code 16 - 179 .thumb_func - 180 .fpu softvfp - 182 ValidatePayloadLength: - 183 .LFB97: -1519:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 184 .loc 1 1519 0 - 185 .cfi_startproc - 186 @ args = 0, pretend = 0, frame = 8 - 187 @ frame_needed = 0, uses_anonymous_args = 0 - 188 .LVL2: - 189 0000 30B5 push {r4, r5, lr} - 190 .LCFI1: - 191 .cfi_def_cfa_offset 12 - 192 .cfi_offset 4, -12 - 193 .cfi_offset 5, -8 - 194 .cfi_offset 14, -4 - 195 0002 83B0 sub sp, sp, #12 - 196 .LCFI2: - 197 .cfi_def_cfa_offset 24 - 198 0004 0500 movs r5, r0 - 199 0006 1400 movs r4, r2 - 200 .LVL3: -1526:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Datarate = datarate; - 201 .loc 1 1526 0 - 202 0008 104A ldr r2, .L11 - 203 .LVL4: - 204 000a 2C23 movs r3, #44 - 205 000c D25C ldrb r2, [r2, r3] - 206 000e 01AB add r3, sp, #4 - 207 0010 9A70 strb r2, [r3, #2] -1527:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_PAYLOAD; - 208 .loc 1 1527 0 - 209 0012 5970 strb r1, [r3, #1] -1528:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 210 .loc 1 1528 0 - 211 0014 0922 movs r2, #9 - 212 0016 1A70 strb r2, [r3] -1531:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 213 .loc 1 1531 0 - 214 0018 0D4B ldr r3, .L11+4 - 215 001a 1B78 ldrb r3, [r3] - 216 001c 002B cmp r3, #0 - 217 001e 02D0 beq .L7 -1533:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 218 .loc 1 1533 0 - 219 0020 01AB add r3, sp, #4 - 220 0022 0132 adds r2, r2, #1 - 221 0024 1A70 strb r2, [r3] - 222 .L7: -1535:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** maxN = phyParam.Value; - 223 .loc 1 1535 0 - ARM GAS /tmp/ccrFaSdZ.s page 41 - - - 224 0026 0B4B ldr r3, .L11+8 - 225 0028 1878 ldrb r0, [r3] - 226 .LVL5: - 227 002a 01A9 add r1, sp, #4 - 228 .LVL6: - 229 002c FFF7FEFF bl RegionGetPhyParam - 230 .LVL7: -1536:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 231 .loc 1 1536 0 - 232 0030 80B2 uxth r0, r0 - 233 .LVL8: -1539:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 234 .loc 1 1539 0 - 235 0032 6419 adds r4, r4, r5 - 236 .LVL9: -1542:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 237 .loc 1 1542 0 - 238 0034 A042 cmp r0, r4 - 239 0036 03D3 bcc .L9 -1542:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 240 .loc 1 1542 0 is_stmt 0 discriminator 1 - 241 0038 FF2C cmp r4, #255 - 242 003a 04D9 bls .L10 -1546:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 243 .loc 1 1546 0 is_stmt 1 - 244 003c 0020 movs r0, #0 - 245 .LVL10: - 246 003e 00E0 b .L8 - 247 .LVL11: - 248 .L9: - 249 0040 0020 movs r0, #0 - 250 .LVL12: - 251 .L8: -1547:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 252 .loc 1 1547 0 - 253 0042 03B0 add sp, sp, #12 - 254 @ sp needed - 255 .LVL13: - 256 0044 30BD pop {r4, r5, pc} - 257 .LVL14: - 258 .L10: -1544:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 259 .loc 1 1544 0 - 260 0046 0120 movs r0, #1 - 261 .LVL15: - 262 0048 FBE7 b .L8 - 263 .L12: - 264 004a C046 .align 2 - 265 .L11: - 266 004c 00000000 .word .LANCHOR14 - 267 0050 00000000 .word .LANCHOR21 - 268 0054 00000000 .word .LANCHOR22 - 269 .cfi_endproc - 270 .LFE97: - 272 .section .text.OnAckTimeoutTimerEvent,"ax",%progbits - 273 .align 1 - 274 .syntax unified - ARM GAS /tmp/ccrFaSdZ.s page 42 - - - 275 .code 16 - 276 .thumb_func - 277 .fpu softvfp - 279 OnAckTimeoutTimerEvent: - 280 .LFB95: -1492:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &AckTimeoutTimer ); - 281 .loc 1 1492 0 - 282 .cfi_startproc - 283 @ args = 0, pretend = 0, frame = 0 - 284 @ frame_needed = 0, uses_anonymous_args = 0 - 285 0000 10B5 push {r4, lr} - 286 .LCFI3: - 287 .cfi_def_cfa_offset 8 - 288 .cfi_offset 4, -8 - 289 .cfi_offset 14, -4 -1493:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 290 .loc 1 1493 0 - 291 0002 0D48 ldr r0, .L17 - 292 0004 FFF7FEFF bl TimerStop - 293 .LVL16: -1495:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 294 .loc 1 1495 0 - 295 0008 0C4B ldr r3, .L17+4 - 296 000a 1B78 ldrb r3, [r3] - 297 000c 002B cmp r3, #0 - 298 000e 07D0 beq .L14 -1497:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_ACK_REQ; - 299 .loc 1 1497 0 - 300 0010 0B4B ldr r3, .L17+8 - 301 0012 0122 movs r2, #1 - 302 0014 1A70 strb r2, [r3] -1498:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 303 .loc 1 1498 0 - 304 0016 0B4A ldr r2, .L17+12 - 305 0018 0423 movs r3, #4 - 306 001a 1168 ldr r1, [r2] - 307 001c 9943 bics r1, r3 - 308 001e 1160 str r1, [r2] - 309 .L14: -1500:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 310 .loc 1 1500 0 - 311 0020 094B ldr r3, .L17+16 - 312 0022 1B78 ldrb r3, [r3] - 313 0024 022B cmp r3, #2 - 314 0026 00D0 beq .L16 - 315 .L13: -1504:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 316 .loc 1 1504 0 - 317 @ sp needed - 318 0028 10BD pop {r4, pc} - 319 .L16: -1502:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 320 .loc 1 1502 0 - 321 002a 084A ldr r2, .L17+20 - 322 002c 1378 ldrb r3, [r2] - 323 002e 1021 movs r1, #16 - 324 0030 0B43 orrs r3, r1 - ARM GAS /tmp/ccrFaSdZ.s page 43 - - - 325 0032 1370 strb r3, [r2] -1504:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 326 .loc 1 1504 0 - 327 0034 F8E7 b .L13 - 328 .L18: - 329 0036 C046 .align 2 - 330 .L17: - 331 0038 00000000 .word .LANCHOR23 - 332 003c 00000000 .word .LANCHOR15 - 333 0040 00000000 .word .LANCHOR7 - 334 0044 00000000 .word .LANCHOR24 - 335 0048 00000000 .word .LANCHOR25 - 336 004c 00000000 .word .LANCHOR26 - 337 .cfi_endproc - 338 .LFE95: - 340 .section .text.PrepareRxDoneAbort,"ax",%progbits - 341 .align 1 - 342 .syntax unified - 343 .code 16 - 344 .thumb_func - 345 .fpu softvfp - 347 PrepareRxDoneAbort: - 348 .LFB86: - 685:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState |= LORAMAC_RX_ABORT; - 349 .loc 1 685 0 - 350 .cfi_startproc - 351 @ args = 0, pretend = 0, frame = 0 - 352 @ frame_needed = 0, uses_anonymous_args = 0 - 353 0000 10B5 push {r4, lr} - 354 .LCFI4: - 355 .cfi_def_cfa_offset 8 - 356 .cfi_offset 4, -8 - 357 .cfi_offset 14, -4 - 686:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 358 .loc 1 686 0 - 359 0002 0E4A ldr r2, .L22 - 360 0004 4023 movs r3, #64 - 361 0006 1168 ldr r1, [r2] - 362 0008 0B43 orrs r3, r1 - 363 000a 1360 str r3, [r2] - 688:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 364 .loc 1 688 0 - 365 000c 0C4B ldr r3, .L22+4 - 366 000e 1B78 ldrb r3, [r3] - 367 0010 002B cmp r3, #0 - 368 0012 0FD1 bne .L21 - 369 .L20: - 693:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; - 370 .loc 1 693 0 - 371 0014 0B4A ldr r2, .L22+8 - 372 0016 1378 ldrb r3, [r2] - 694:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 373 .loc 1 694 0 - 374 0018 0221 movs r1, #2 - 375 001a 0B43 orrs r3, r1 - 376 001c 1021 movs r1, #16 - 377 001e 0B43 orrs r3, r1 - ARM GAS /tmp/ccrFaSdZ.s page 44 - - - 378 0020 1370 strb r3, [r2] - 697:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &MacStateCheckTimer ); - 379 .loc 1 697 0 - 380 0022 094C ldr r4, .L22+12 - 381 0024 0121 movs r1, #1 - 382 0026 2000 movs r0, r4 - 383 0028 FFF7FEFF bl TimerSetValue - 384 .LVL17: - 698:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 385 .loc 1 698 0 - 386 002c 2000 movs r0, r4 - 387 002e FFF7FEFF bl TimerStart - 388 .LVL18: - 699:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 389 .loc 1 699 0 - 390 @ sp needed - 391 0032 10BD pop {r4, pc} - 392 .L21: - 690:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 393 .loc 1 690 0 - 394 0034 FFF7FEFF bl OnAckTimeoutTimerEvent - 395 .LVL19: - 396 0038 ECE7 b .L20 - 397 .L23: - 398 003a C046 .align 2 - 399 .L22: - 400 003c 00000000 .word .LANCHOR24 - 401 0040 00000000 .word .LANCHOR15 - 402 0044 00000000 .word .LANCHOR26 - 403 0048 00000000 .word .LANCHOR27 - 404 .cfi_endproc - 405 .LFE86: - 407 .global __aeabi_uidiv - 408 .global __aeabi_ui2f - 409 .section .text.ProcessMacCommands,"ax",%progbits - 410 .align 1 - 411 .syntax unified - 412 .code 16 - 413 .thumb_func - 414 .fpu softvfp - 416 ProcessMacCommands: - 417 .LFB100: -1700:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t status = 0; - 418 .loc 1 1700 0 - 419 .cfi_startproc - 420 @ args = 0, pretend = 0, frame = 32 - 421 @ frame_needed = 0, uses_anonymous_args = 0 - 422 .LVL20: - 423 0000 F0B5 push {r4, r5, r6, r7, lr} - 424 .LCFI5: - 425 .cfi_def_cfa_offset 20 - 426 .cfi_offset 4, -20 - 427 .cfi_offset 5, -16 - 428 .cfi_offset 6, -12 - 429 .cfi_offset 7, -8 - 430 .cfi_offset 14, -4 - 431 0002 D646 mov lr, r10 - ARM GAS /tmp/ccrFaSdZ.s page 45 - - - 432 0004 4F46 mov r7, r9 - 433 0006 4646 mov r6, r8 - 434 0008 C0B5 push {r6, r7, lr} - 435 .LCFI6: - 436 .cfi_def_cfa_offset 32 - 437 .cfi_offset 8, -32 - 438 .cfi_offset 9, -28 - 439 .cfi_offset 10, -24 - 440 000a 8AB0 sub sp, sp, #40 - 441 .LCFI7: - 442 .cfi_def_cfa_offset 72 - 443 000c 0700 movs r7, r0 - 444 000e 0C00 movs r4, r1 - 445 0010 1500 movs r5, r2 - 446 0012 0393 str r3, [sp, #12] - 447 .LVL21: - 448 .L25: -1703:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 449 .loc 1 1703 0 - 450 0014 AC42 cmp r4, r5 - 451 0016 00D3 bcc .LCB387 - 452 0018 09E2 b .L24 @long jump - 453 .LCB387: -1706:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 454 .loc 1 1706 0 - 455 001a 661C adds r6, r4, #1 - 456 001c F6B2 uxtb r6, r6 - 457 .LVL22: - 458 001e 3B5D ldrb r3, [r7, r4] - 459 0020 0A2B cmp r3, #10 - 460 0022 00D9 bls .LCB393 - 461 0024 03E2 b .L24 @long jump - 462 .LCB393: - 463 0026 9B00 lsls r3, r3, #2 - 464 0028 DA4A ldr r2, .L58 - 465 002a D358 ldr r3, [r2, r3] - 466 002c 9F46 mov pc, r3 - 467 .section .rodata.ProcessMacCommands,"a",%progbits - 468 .align 2 - 469 .L28: - 470 0000 2E040000 .word .L24 - 471 0004 2E040000 .word .L24 - 472 0008 2E000000 .word .L27 - 473 000c 46000000 .word .L29 - 474 0010 2C010000 .word .L30 - 475 0014 68010000 .word .L31 - 476 0018 FA010000 .word .L32 - 477 001c 50020000 .word .L33 - 478 0020 C4020000 .word .L34 - 479 0024 14030000 .word .L35 - 480 0028 C8030000 .word .L36 - 481 .section .text.ProcessMacCommands - 482 .L27: -1709:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.DemodMargin = payload[macIndex++]; - 483 .loc 1 1709 0 - 484 002e DA4B ldr r3, .L58+4 - 485 0030 0022 movs r2, #0 - ARM GAS /tmp/ccrFaSdZ.s page 46 - - - 486 0032 5A70 strb r2, [r3, #1] -1710:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.NbGateways = payload[macIndex++]; - 487 .loc 1 1710 0 - 488 0034 A21C adds r2, r4, #2 - 489 0036 D2B2 uxtb r2, r2 - 490 .LVL23: - 491 0038 B95D ldrb r1, [r7, r6] - 492 003a 1972 strb r1, [r3, #8] -1711:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 493 .loc 1 1711 0 - 494 003c 0334 adds r4, r4, #3 - 495 003e E4B2 uxtb r4, r4 - 496 .LVL24: - 497 0040 BA5C ldrb r2, [r7, r2] - 498 0042 5A72 strb r2, [r3, #9] -1712:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_LINK_ADR_REQ: - 499 .loc 1 1712 0 - 500 0044 E6E7 b .L25 - 501 .LVL25: - 502 .L29: - 503 .LBB34: -1716:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** int8_t linkAdrTxPower = TX_POWER_0; - 504 .loc 1 1716 0 - 505 0046 0922 movs r2, #9 - 506 0048 02AB add r3, sp, #8 - 507 004a 9C46 mov ip, r3 - 508 004c 6244 add r2, r2, ip - 509 004e 0021 movs r1, #0 - 510 0050 1170 strb r1, [r2] -1717:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t linkAdrNbRep = 0; - 511 .loc 1 1717 0 - 512 0052 0A23 movs r3, #10 - 513 0054 6046 mov r0, ip - 514 0056 6344 add r3, r3, ip - 515 0058 9C46 mov ip, r3 - 516 005a 1970 strb r1, [r3] -1718:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t linkAdrNbBytesParsed = 0; - 517 .loc 1 1718 0 - 518 005c 0B24 movs r4, #11 - 519 005e 8046 mov r8, r0 - 520 0060 4444 add r4, r4, r8 - 521 0062 2170 strb r1, [r4] -1719:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 522 .loc 1 1719 0 - 523 0064 0173 strb r1, [r0, #12] -1722:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.PayloadSize = commandsSize - ( macIndex - 1 ); - 524 .loc 1 1722 0 - 525 0066 701E subs r0, r6, #1 - 526 0068 3818 adds r0, r7, r0 - 527 006a 07A9 add r1, sp, #28 - 528 006c 0790 str r0, [sp, #28] -1723:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.AdrEnabled = AdrCtrlOn; - 529 .loc 1 1723 0 - 530 006e A81B subs r0, r5, r6 - 531 0070 0130 adds r0, r0, #1 - 532 0072 0871 strb r0, [r1, #4] -1724:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; - ARM GAS /tmp/ccrFaSdZ.s page 47 - - - 533 .loc 1 1724 0 - 534 0074 C948 ldr r0, .L58+8 - 535 0076 0078 ldrb r0, [r0] - 536 0078 8871 strb r0, [r1, #6] -1725:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.CurrentDatarate = LoRaMacParams.ChannelsDatarate; - 537 .loc 1 1725 0 - 538 007a C948 ldr r0, .L58+12 - 539 007c 2C23 movs r3, #44 - 540 007e C35C ldrb r3, [r0, r3] - 541 0080 4B71 strb r3, [r1, #5] -1726:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.CurrentTxPower = LoRaMacParams.ChannelsTxPower; - 542 .loc 1 1726 0 - 543 0082 0123 movs r3, #1 - 544 0084 C356 ldrsb r3, [r0, r3] - 545 0086 CB71 strb r3, [r1, #7] -1727:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** linkAdrReq.CurrentNbRep = LoRaMacParams.ChannelsNbRep; - 546 .loc 1 1727 0 - 547 0088 0023 movs r3, #0 - 548 008a C356 ldrsb r3, [r0, r3] - 549 008c 0B72 strb r3, [r1, #8] -1728:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 550 .loc 1 1728 0 - 551 008e 2023 movs r3, #32 - 552 0090 C05C ldrb r0, [r0, r3] - 553 0092 4872 strb r0, [r1, #9] -1731:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** &linkAdrTxPower, &linkAdrNbRep, &linkAdrNbBytesParse - 554 .loc 1 1731 0 - 555 0094 C348 ldr r0, .L58+16 - 556 0096 0078 ldrb r0, [r0] - 557 0098 05AB add r3, sp, #20 - 558 009a 0193 str r3, [sp, #4] - 559 009c 0094 str r4, [sp] - 560 009e 6346 mov r3, ip - 561 00a0 FFF7FEFF bl RegionLinkAdrReq - 562 .LVL26: - 563 00a4 0300 movs r3, r0 - 564 00a6 8246 mov r10, r0 - 565 .LVL27: -1734:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 566 .loc 1 1734 0 - 567 00a8 0720 movs r0, #7 - 568 00aa 1840 ands r0, r3 - 569 00ac 0728 cmp r0, #7 - 570 00ae 01D0 beq .L55 - 571 .LVL28: - 572 .L38: - 573 .LBE34: -1700:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t status = 0; - 574 .loc 1 1700 0 discriminator 1 - 575 00b0 0024 movs r4, #0 - 576 00b2 12E0 b .L40 - 577 .LVL29: - 578 .L55: - 579 .LBB38: -1736:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsTxPower = linkAdrTxPower; - 580 .loc 1 1736 0 - 581 00b4 BA4B ldr r3, .L58+12 - ARM GAS /tmp/ccrFaSdZ.s page 48 - - - 582 .LVL30: - 583 00b6 0922 movs r2, #9 - 584 00b8 02A9 add r1, sp, #8 - 585 00ba 8C46 mov ip, r1 - 586 00bc 6244 add r2, r2, ip - 587 00be 1278 ldrb r2, [r2] - 588 00c0 5A70 strb r2, [r3, #1] -1737:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsNbRep = linkAdrNbRep; - 589 .loc 1 1737 0 - 590 00c2 0A22 movs r2, #10 - 591 00c4 6244 add r2, r2, ip - 592 00c6 1278 ldrb r2, [r2] - 593 00c8 1A70 strb r2, [r3] -1738:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 594 .loc 1 1738 0 - 595 00ca 0B22 movs r2, #11 - 596 00cc 6244 add r2, r2, ip - 597 00ce 1178 ldrb r1, [r2] - 598 00d0 2022 movs r2, #32 - 599 00d2 9954 strb r1, [r3, r2] - 600 00d4 ECE7 b .L38 - 601 .LVL31: - 602 .L39: - 603 .LBB35: -1742:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 604 .loc 1 1742 0 - 605 00d6 0134 adds r4, r4, #1 - 606 .LVL32: - 607 00d8 E4B2 uxtb r4, r4 - 608 .LVL33: - 609 .L40: -1742:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 610 .loc 1 1742 0 is_stmt 0 discriminator 1 - 611 00da 05AB add r3, sp, #20 - 612 00dc 1B78 ldrb r3, [r3] - 613 00de 9846 mov r8, r3 - 614 00e0 0521 movs r1, #5 - 615 00e2 1800 movs r0, r3 - 616 00e4 FFF7FEFF bl __aeabi_uidiv - 617 .LVL34: - 618 00e8 C0B2 uxtb r0, r0 - 619 00ea A042 cmp r0, r4 - 620 00ec 18D9 bls .L56 - 621 .LVL35: - 622 .LBB36: - 623 .LBB37: -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 624 .loc 1 1553 0 is_stmt 1 - 625 00ee AE4B ldr r3, .L58+20 - 626 00f0 1A78 ldrb r2, [r3] - 627 00f2 8023 movs r3, #128 - 628 00f4 5B42 rsbs r3, r3, #0 - 629 00f6 9B1A subs r3, r3, r2 - 630 00f8 DBB2 uxtb r3, r3 - 631 .LVL36: -1566:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 632 .loc 1 1566 0 - ARM GAS /tmp/ccrFaSdZ.s page 49 - - - 633 00fa AC4A ldr r2, .L58+24 - 634 00fc 1278 ldrb r2, [r2] - 635 00fe 013B subs r3, r3, #1 - 636 .LVL37: - 637 0100 9A42 cmp r2, r3 - 638 0102 E8DA bge .L39 -1568:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Margin - 639 .loc 1 1568 0 - 640 0104 531C adds r3, r2, #1 - 641 .LVL38: - 642 0106 DBB2 uxtb r3, r3 - 643 0108 A949 ldr r1, .L58+28 - 644 010a 0320 movs r0, #3 - 645 010c 8854 strb r0, [r1, r2] -1570:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; - 646 .loc 1 1570 0 - 647 010e 0232 adds r2, r2, #2 - 648 0110 A648 ldr r0, .L58+24 - 649 0112 0270 strb r2, [r0] - 650 0114 5246 mov r2, r10 - 651 0116 CA54 strb r2, [r1, r3] - 652 .LVL39: -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 653 .loc 1 1641 0 - 654 0118 A64B ldr r3, .L58+32 - 655 011a 0122 movs r2, #1 - 656 011c 1A70 strb r2, [r3] - 657 011e DAE7 b .L39 - 658 .LVL40: - 659 .L56: - 660 .LBE37: - 661 .LBE36: - 662 .LBE35: -1747:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 663 .loc 1 1747 0 - 664 0120 3400 movs r4, r6 - 665 .LVL41: - 666 0122 4444 add r4, r4, r8 - 667 0124 E4B2 uxtb r4, r4 - 668 0126 013C subs r4, r4, #1 - 669 0128 E4B2 uxtb r4, r4 - 670 .LVL42: - 671 .LBE38: -1749:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_DUTY_CYCLE_REQ: - 672 .loc 1 1749 0 - 673 012a 73E7 b .L25 - 674 .LVL43: - 675 .L30: -1751:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AggregatedDCycle = 1 << MaxDCycle; - 676 .loc 1 1751 0 - 677 012c 0234 adds r4, r4, #2 - 678 012e E4B2 uxtb r4, r4 - 679 .LVL44: - 680 0130 BA5D ldrb r2, [r7, r6] - 681 0132 A14B ldr r3, .L58+36 - 682 0134 1A70 strb r2, [r3] -1752:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_DUTY_CYCLE_ANS, 0, 0 ); - ARM GAS /tmp/ccrFaSdZ.s page 50 - - - 683 .loc 1 1752 0 - 684 0136 0123 movs r3, #1 - 685 0138 9340 lsls r3, r3, r2 - 686 013a A04A ldr r2, .L58+40 - 687 013c 1380 strh r3, [r2] - 688 .LVL45: - 689 .LBB39: - 690 .LBB40: -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 691 .loc 1 1553 0 - 692 013e 9A4B ldr r3, .L58+20 - 693 0140 1A78 ldrb r2, [r3] - 694 0142 8023 movs r3, #128 - 695 0144 5B42 rsbs r3, r3, #0 - 696 0146 9B1A subs r3, r3, r2 - 697 0148 DBB2 uxtb r3, r3 - 698 .LVL46: -1575:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 699 .loc 1 1575 0 - 700 014a 984A ldr r2, .L58+24 - 701 014c 1278 ldrb r2, [r2] - 702 014e 9342 cmp r3, r2 - 703 0150 00D8 bhi .LCB629 - 704 0152 5FE7 b .L25 @long jump - 705 .LCB629: -1577:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // No payload for this answer - 706 .loc 1 1577 0 - 707 0154 511C adds r1, r2, #1 - 708 0156 954B ldr r3, .L58+24 - 709 .LVL47: - 710 0158 1970 strb r1, [r3] - 711 015a 954B ldr r3, .L58+28 - 712 015c 0421 movs r1, #4 - 713 015e 9954 strb r1, [r3, r2] - 714 .LVL48: -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 715 .loc 1 1641 0 - 716 0160 944B ldr r3, .L58+32 - 717 0162 0122 movs r2, #1 - 718 0164 1A70 strb r2, [r3] - 719 0166 55E7 b .L25 - 720 .LVL49: - 721 .L31: - 722 .LBE40: - 723 .LBE39: - 724 .LBB41: -1760:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.Datarate = payload[macIndex] & 0x0F; - 725 .loc 1 1760 0 - 726 0168 BA19 adds r2, r7, r6 - 727 016a 1378 ldrb r3, [r2] - 728 016c 1B09 lsrs r3, r3, #4 - 729 016e 0726 movs r6, #7 - 730 .LVL50: - 731 0170 3340 ands r3, r6 - 732 0172 07A9 add r1, sp, #28 - 733 0174 4B70 strb r3, [r1, #1] -1761:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macIndex++; - ARM GAS /tmp/ccrFaSdZ.s page 51 - - - 734 .loc 1 1761 0 - 735 0176 1278 ldrb r2, [r2] - 736 0178 52B2 sxtb r2, r2 - 737 017a 0F23 movs r3, #15 - 738 017c 1340 ands r3, r2 - 739 017e 0B70 strb r3, [r1] -1762:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 740 .loc 1 1762 0 - 741 0180 A31C adds r3, r4, #2 - 742 0182 DBB2 uxtb r3, r3 - 743 .LVL51: -1764:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.Frequency |= ( uint32_t )payload[macIndex++] << 8; - 744 .loc 1 1764 0 - 745 0184 E01C adds r0, r4, #3 - 746 0186 C0B2 uxtb r0, r0 - 747 .LVL52: - 748 0188 FB5C ldrb r3, [r7, r3] -1765:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.Frequency |= ( uint32_t )payload[macIndex++] << 16; - 749 .loc 1 1765 0 - 750 018a 221D adds r2, r4, #4 - 751 018c D2B2 uxtb r2, r2 - 752 .LVL53: - 753 018e 385C ldrb r0, [r7, r0] - 754 0190 0002 lsls r0, r0, #8 - 755 0192 0343 orrs r3, r0 -1766:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** rxParamSetupReq.Frequency *= 100; - 756 .loc 1 1766 0 - 757 0194 0534 adds r4, r4, #5 - 758 0196 E4B2 uxtb r4, r4 - 759 .LVL54: - 760 0198 BA5C ldrb r2, [r7, r2] - 761 019a 1204 lsls r2, r2, #16 - 762 019c 1343 orrs r3, r2 -1767:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 763 .loc 1 1767 0 - 764 019e 6422 movs r2, #100 - 765 01a0 5343 muls r3, r2 - 766 01a2 4B60 str r3, [r1, #4] -1770:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 767 .loc 1 1770 0 - 768 01a4 7F4B ldr r3, .L58+16 - 769 01a6 1878 ldrb r0, [r3] - 770 01a8 FFF7FEFF bl RegionRxParamSetupReq - 771 .LVL55: -1772:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 772 .loc 1 1772 0 - 773 01ac 0640 ands r6, r0 - 774 01ae 072E cmp r6, #7 - 775 01b0 18D0 beq .L57 - 776 .L42: - 777 .LVL56: - 778 .LBB42: - 779 .LBB43: -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 780 .loc 1 1553 0 - 781 01b2 7D4B ldr r3, .L58+20 - 782 01b4 1A78 ldrb r2, [r3] - ARM GAS /tmp/ccrFaSdZ.s page 52 - - - 783 01b6 8023 movs r3, #128 - 784 01b8 5B42 rsbs r3, r3, #0 - 785 01ba 9B1A subs r3, r3, r2 - 786 01bc DBB2 uxtb r3, r3 - 787 .LVL57: -1583:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 788 .loc 1 1583 0 - 789 01be 7B4A ldr r2, .L58+24 - 790 01c0 1278 ldrb r2, [r2] - 791 01c2 013B subs r3, r3, #1 - 792 .LVL58: - 793 01c4 9A42 cmp r2, r3 - 794 01c6 00DB blt .LCB721 - 795 01c8 24E7 b .L25 @long jump - 796 .LCB721: -1585:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Status: Datarate ACK, Channel ACK - 797 .loc 1 1585 0 - 798 01ca 531C adds r3, r2, #1 - 799 .LVL59: - 800 01cc DBB2 uxtb r3, r3 - 801 01ce 7849 ldr r1, .L58+28 - 802 01d0 0526 movs r6, #5 - 803 01d2 8E54 strb r6, [r1, r2] -1587:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; - 804 .loc 1 1587 0 - 805 01d4 0232 adds r2, r2, #2 - 806 01d6 754E ldr r6, .L58+24 - 807 01d8 3270 strb r2, [r6] - 808 01da C854 strb r0, [r1, r3] - 809 .LVL60: -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 810 .loc 1 1641 0 - 811 01dc 754B ldr r3, .L58+32 - 812 01de 0122 movs r2, #1 - 813 01e0 1A70 strb r2, [r3] - 814 .LVL61: - 815 .LBE43: - 816 .LBE42: - 817 .LBE41: -1780:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_DEV_STATUS_REQ: - 818 .loc 1 1780 0 - 819 01e2 17E7 b .L25 - 820 .LVL62: - 821 .L57: - 822 .LBB44: -1774:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel.Frequency = rxParamSetupReq.Frequency; - 823 .loc 1 1774 0 - 824 01e4 07AA add r2, sp, #28 - 825 01e6 1678 ldrb r6, [r2] - 826 01e8 6D4B ldr r3, .L58+12 - 827 01ea 2821 movs r1, #40 - 828 01ec 5E54 strb r6, [r3, r1] -1775:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx1DrOffset = rxParamSetupReq.DrOffset; - 829 .loc 1 1775 0 - 830 01ee 0899 ldr r1, [sp, #32] - 831 01f0 5962 str r1, [r3, #36] -1776:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - ARM GAS /tmp/ccrFaSdZ.s page 53 - - - 832 .loc 1 1776 0 - 833 01f2 5178 ldrb r1, [r2, #1] - 834 01f4 2122 movs r2, #33 - 835 01f6 9954 strb r1, [r3, r2] - 836 01f8 DBE7 b .L42 - 837 .LVL63: - 838 .L32: - 839 .LBE44: - 840 .LBB45: -1784:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 841 .loc 1 1784 0 - 842 01fa 714B ldr r3, .L58+44 - 843 01fc 1B68 ldr r3, [r3] - 844 01fe 002B cmp r3, #0 - 845 0200 22D0 beq .L52 -1784:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 846 .loc 1 1784 0 is_stmt 0 discriminator 1 - 847 0202 1B68 ldr r3, [r3] - 848 0204 002B cmp r3, #0 - 849 0206 21D0 beq .L53 -1786:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 850 .loc 1 1786 0 is_stmt 1 - 851 0208 9847 blx r3 - 852 .LVL64: - 853 .L44: - 854 .LBB46: - 855 .LBB47: -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 856 .loc 1 1553 0 - 857 020a 674B ldr r3, .L58+20 - 858 020c 1A78 ldrb r2, [r3] - 859 020e 8023 movs r3, #128 - 860 0210 5B42 rsbs r3, r3, #0 - 861 0212 9B1A subs r3, r3, r2 - 862 0214 DBB2 uxtb r3, r3 - 863 .LVL65: -1592:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 864 .loc 1 1592 0 - 865 0216 654A ldr r2, .L58+24 - 866 0218 1278 ldrb r2, [r2] - 867 021a 023B subs r3, r3, #2 - 868 .LVL66: - 869 021c 9A42 cmp r2, r3 - 870 021e 00DB blt .LCB803 - 871 0220 03E1 b .L54 @long jump - 872 .LCB803: -1594:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // 1st byte Battery - 873 .loc 1 1594 0 - 874 0222 541C adds r4, r2, #1 - 875 0224 E4B2 uxtb r4, r4 - 876 0226 6249 ldr r1, .L58+28 - 877 0228 0623 movs r3, #6 - 878 .LVL67: - 879 022a 8B54 strb r3, [r1, r2] -1597:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBuffer[MacCommandsBufferIndex++] = p2; - 880 .loc 1 1597 0 - 881 022c 931C adds r3, r2, #2 - ARM GAS /tmp/ccrFaSdZ.s page 54 - - - 882 022e DBB2 uxtb r3, r3 - 883 0230 0855 strb r0, [r1, r4] -1598:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; - 884 .loc 1 1598 0 - 885 0232 0332 adds r2, r2, #3 - 886 0234 5D48 ldr r0, .L58+24 - 887 .LVL68: - 888 0236 0270 strb r2, [r0] - 889 0238 6A46 mov r2, sp - 890 023a 127B ldrb r2, [r2, #12] - 891 023c CA54 strb r2, [r1, r3] - 892 .LVL69: -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 893 .loc 1 1641 0 - 894 023e 5D4B ldr r3, .L58+32 - 895 0240 0122 movs r2, #1 - 896 0242 1A70 strb r2, [r3] - 897 .LBE47: - 898 .LBE46: - 899 .LBE45: -1706:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 900 .loc 1 1706 0 - 901 0244 3400 movs r4, r6 - 902 0246 E5E6 b .L25 - 903 .LVL70: - 904 .L52: - 905 .LBB48: -1783:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacCallbacks != NULL ) && ( LoRaMacCallbacks->GetBatteryLevel != NULL - 906 .loc 1 1783 0 - 907 0248 FF20 movs r0, #255 - 908 024a DEE7 b .L44 - 909 .L53: - 910 024c FF20 movs r0, #255 - 911 024e DCE7 b .L44 - 912 .LVL71: - 913 .L33: - 914 .LBE48: - 915 .LBB49: -1797:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** newChannelReq.NewChannel = &chParam; - 916 .loc 1 1797 0 - 917 0250 A31C adds r3, r4, #2 - 918 0252 DBB2 uxtb r3, r3 - 919 .LVL72: - 920 0254 BA57 ldrsb r2, [r7, r6] - 921 0256 05A9 add r1, sp, #20 - 922 0258 0A71 strb r2, [r1, #4] -1798:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 923 .loc 1 1798 0 - 924 025a 07AA add r2, sp, #28 - 925 025c 0592 str r2, [sp, #20] -1800:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.Frequency |= ( uint32_t )payload[macIndex++] << 8; - 926 .loc 1 1800 0 - 927 025e E01C adds r0, r4, #3 - 928 0260 C0B2 uxtb r0, r0 - 929 .LVL73: - 930 0262 FB5C ldrb r3, [r7, r3] -1801:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.Frequency |= ( uint32_t )payload[macIndex++] << 16; - ARM GAS /tmp/ccrFaSdZ.s page 55 - - - 931 .loc 1 1801 0 - 932 0264 261D adds r6, r4, #4 - 933 0266 F6B2 uxtb r6, r6 - 934 .LVL74: - 935 0268 385C ldrb r0, [r7, r0] - 936 026a 0002 lsls r0, r0, #8 - 937 026c 0343 orrs r3, r0 -1802:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.Frequency *= 100; - 938 .loc 1 1802 0 - 939 026e 601D adds r0, r4, #5 - 940 0270 C0B2 uxtb r0, r0 - 941 .LVL75: - 942 0272 BE5D ldrb r6, [r7, r6] - 943 0274 3604 lsls r6, r6, #16 - 944 0276 3343 orrs r3, r6 -1803:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.Rx1Frequency = 0; - 945 .loc 1 1803 0 - 946 0278 6426 movs r6, #100 - 947 027a 7343 muls r3, r6 - 948 027c 0793 str r3, [sp, #28] -1804:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chParam.DrRange.Value = payload[macIndex++]; - 949 .loc 1 1804 0 - 950 027e 0023 movs r3, #0 - 951 0280 0893 str r3, [sp, #32] -1805:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 952 .loc 1 1805 0 - 953 0282 0634 adds r4, r4, #6 - 954 0284 E4B2 uxtb r4, r4 - 955 .LVL76: - 956 0286 3B56 ldrsb r3, [r7, r0] - 957 0288 1372 strb r3, [r2, #8] -1807:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 958 .loc 1 1807 0 - 959 028a 464B ldr r3, .L58+16 - 960 028c 1878 ldrb r0, [r3] - 961 028e FFF7FEFF bl RegionNewChannelReq - 962 .LVL77: - 963 .LBB50: - 964 .LBB51: -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 965 .loc 1 1553 0 - 966 0292 454B ldr r3, .L58+20 - 967 0294 1A78 ldrb r2, [r3] - 968 0296 8023 movs r3, #128 - 969 0298 5B42 rsbs r3, r3, #0 - 970 029a 9B1A subs r3, r3, r2 - 971 029c DBB2 uxtb r3, r3 - 972 .LVL78: -1603:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 973 .loc 1 1603 0 - 974 029e 434A ldr r2, .L58+24 - 975 02a0 1278 ldrb r2, [r2] - 976 02a2 013B subs r3, r3, #1 - 977 .LVL79: - 978 02a4 9A42 cmp r2, r3 - 979 02a6 00DB blt .LCB913 - 980 02a8 B4E6 b .L25 @long jump - ARM GAS /tmp/ccrFaSdZ.s page 56 - - - 981 .LCB913: -1605:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Status: Datarate range OK, Channel frequency OK - 982 .loc 1 1605 0 - 983 02aa 531C adds r3, r2, #1 - 984 .LVL80: - 985 02ac DBB2 uxtb r3, r3 - 986 02ae 4049 ldr r1, .L58+28 - 987 02b0 5D3E subs r6, r6, #93 - 988 02b2 8E54 strb r6, [r1, r2] -1607:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; - 989 .loc 1 1607 0 - 990 02b4 0232 adds r2, r2, #2 - 991 02b6 3D4E ldr r6, .L58+24 - 992 02b8 3270 strb r2, [r6] - 993 02ba C854 strb r0, [r1, r3] - 994 .LVL81: -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 995 .loc 1 1641 0 - 996 02bc 3D4B ldr r3, .L58+32 - 997 02be 0122 movs r2, #1 - 998 02c0 1A70 strb r2, [r3] - 999 .LVL82: - 1000 .LBE51: - 1001 .LBE50: - 1002 .LBE49: -1811:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_RX_TIMING_SETUP_REQ: - 1003 .loc 1 1811 0 - 1004 02c2 A7E6 b .L25 - 1005 .LVL83: - 1006 .L34: - 1007 .LBB52: -1814:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1008 .loc 1 1814 0 - 1009 02c4 0234 adds r4, r4, #2 - 1010 02c6 E4B2 uxtb r4, r4 - 1011 .LVL84: - 1012 02c8 BA5D ldrb r2, [r7, r6] - 1013 02ca 0F23 movs r3, #15 - 1014 02cc 1A40 ands r2, r3 - 1015 .LVL85: -1816:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1016 .loc 1 1816 0 - 1017 02ce 00D1 bne .L46 -1818:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1018 .loc 1 1818 0 - 1019 02d0 0132 adds r2, r2, #1 - 1020 .LVL86: - 1021 .L46: -1820:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay2 = LoRaMacParams.ReceiveDelay1 + 1000; - 1022 .loc 1 1820 0 - 1023 02d2 5301 lsls r3, r2, #5 - 1024 02d4 9B1A subs r3, r3, r2 - 1025 02d6 9B00 lsls r3, r3, #2 - 1026 02d8 9B18 adds r3, r3, r2 - 1027 02da DA00 lsls r2, r3, #3 - 1028 .LVL87: - 1029 02dc 304B ldr r3, .L58+12 - ARM GAS /tmp/ccrFaSdZ.s page 57 - - - 1030 02de 1A61 str r2, [r3, #16] -1821:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AddMacCommand( MOTE_MAC_RX_TIMING_SETUP_ANS, 0, 0 ); - 1031 .loc 1 1821 0 - 1032 02e0 FA21 movs r1, #250 - 1033 02e2 8900 lsls r1, r1, #2 - 1034 02e4 8C46 mov ip, r1 - 1035 02e6 6244 add r2, r2, ip - 1036 02e8 5A61 str r2, [r3, #20] - 1037 .LVL88: - 1038 .LBB53: - 1039 .LBB54: -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1040 .loc 1 1553 0 - 1041 02ea 2F4B ldr r3, .L58+20 - 1042 02ec 1A78 ldrb r2, [r3] - 1043 02ee 8023 movs r3, #128 - 1044 02f0 5B42 rsbs r3, r3, #0 - 1045 02f2 9B1A subs r3, r3, r2 - 1046 02f4 DBB2 uxtb r3, r3 - 1047 .LVL89: -1612:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1048 .loc 1 1612 0 - 1049 02f6 2D4A ldr r2, .L58+24 - 1050 02f8 1278 ldrb r2, [r2] - 1051 02fa 9342 cmp r3, r2 - 1052 02fc 00D8 bhi .LCB991 - 1053 02fe 89E6 b .L25 @long jump - 1054 .LCB991: -1614:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // No payload for this answer - 1055 .loc 1 1614 0 - 1056 0300 511C adds r1, r2, #1 - 1057 0302 2A4B ldr r3, .L58+24 - 1058 .LVL90: - 1059 0304 1970 strb r1, [r3] - 1060 0306 2A4B ldr r3, .L58+28 - 1061 0308 0821 movs r1, #8 - 1062 030a 9954 strb r1, [r3, r2] - 1063 .LVL91: -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1064 .loc 1 1641 0 - 1065 030c 294B ldr r3, .L58+32 - 1066 030e 0122 movs r2, #1 - 1067 0310 1A70 strb r2, [r3] - 1068 0312 7FE6 b .L25 - 1069 .LVL92: - 1070 .L35: - 1071 .LBE54: - 1072 .LBE53: - 1073 .LBE52: - 1074 .LBB55: -1828:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1075 .loc 1 1828 0 - 1076 0314 0234 adds r4, r4, #2 - 1077 0316 E4B2 uxtb r4, r4 - 1078 .LVL93: - 1079 0318 BA5D ldrb r2, [r7, r6] - 1080 .LVL94: - ARM GAS /tmp/ccrFaSdZ.s page 58 - - -1830:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txParamSetupReq.DownlinkDwellTime = 0; - 1081 .loc 1 1830 0 - 1082 031a 07AB add r3, sp, #28 - 1083 031c 0021 movs r1, #0 - 1084 031e 1970 strb r1, [r3] -1831:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1085 .loc 1 1831 0 - 1086 0320 5970 strb r1, [r3, #1] -1833:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1087 .loc 1 1833 0 - 1088 0322 9306 lsls r3, r2, #26 - 1089 0324 02D5 bpl .L47 -1835:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1090 .loc 1 1835 0 - 1091 0326 07AB add r3, sp, #28 - 1092 0328 0131 adds r1, r1, #1 - 1093 032a 5970 strb r1, [r3, #1] - 1094 .L47: -1837:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1095 .loc 1 1837 0 - 1096 032c D306 lsls r3, r2, #27 - 1097 032e 02D5 bpl .L48 -1839:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1098 .loc 1 1839 0 - 1099 0330 07AB add r3, sp, #28 - 1100 0332 0121 movs r1, #1 - 1101 0334 1970 strb r1, [r3] - 1102 .L48: -1841:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1103 .loc 1 1841 0 - 1104 0336 0F23 movs r3, #15 - 1105 0338 1340 ands r3, r2 - 1106 033a 07A9 add r1, sp, #28 - 1107 033c 8B70 strb r3, [r1, #2] -1844:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1108 .loc 1 1844 0 - 1109 033e 194B ldr r3, .L58+16 - 1110 0340 1878 ldrb r0, [r3] - 1111 0342 FFF7FEFF bl RegionTxParamSetupReq - 1112 .LVL95: - 1113 0346 431C adds r3, r0, #1 - 1114 0348 00D1 bne .LCB1060 - 1115 034a 63E6 b .L25 @long jump - 1116 .LCB1060: -1847:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.DownlinkDwellTime = txParamSetupReq.DownlinkDwellTime; - 1117 .loc 1 1847 0 - 1118 034c 07AB add r3, sp, #28 - 1119 034e 1978 ldrb r1, [r3] - 1120 0350 134E ldr r6, .L58+12 - 1121 0352 2C22 movs r2, #44 - 1122 0354 B154 strb r1, [r6, r2] -1848:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MaxEirp = LoRaMacMaxEirpTable[txParamSetupReq.MaxEirp]; - 1123 .loc 1 1848 0 - 1124 0356 5978 ldrb r1, [r3, #1] - 1125 0358 0132 adds r2, r2, #1 - 1126 035a B154 strb r1, [r6, r2] -1849:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Add command response - ARM GAS /tmp/ccrFaSdZ.s page 59 - - - 1127 .loc 1 1849 0 - 1128 035c 9B78 ldrb r3, [r3, #2] - 1129 035e 194A ldr r2, .L58+48 - 1130 0360 D05C ldrb r0, [r2, r3] - 1131 0362 FFF7FEFF bl __aeabi_ui2f - 1132 .LVL96: - 1133 0366 3063 str r0, [r6, #48] - 1134 .LVL97: - 1135 .LBB56: - 1136 .LBB57: -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1137 .loc 1 1553 0 - 1138 0368 0F4B ldr r3, .L58+20 - 1139 036a 1A78 ldrb r2, [r3] - 1140 036c 8023 movs r3, #128 - 1141 036e 5B42 rsbs r3, r3, #0 - 1142 0370 9B1A subs r3, r3, r2 - 1143 0372 DBB2 uxtb r3, r3 - 1144 .LVL98: -1620:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1145 .loc 1 1620 0 - 1146 0374 0D4A ldr r2, .L58+24 - 1147 0376 1278 ldrb r2, [r2] - 1148 0378 9342 cmp r3, r2 - 1149 037a 00D8 bhi .LCB1091 - 1150 037c 4AE6 b .L25 @long jump - 1151 .LCB1091: -1622:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // No payload for this answer - 1152 .loc 1 1622 0 - 1153 037e 511C adds r1, r2, #1 - 1154 0380 0A4B ldr r3, .L58+24 - 1155 .LVL99: - 1156 0382 1970 strb r1, [r3] - 1157 0384 0A4B ldr r3, .L58+28 - 1158 0386 0921 movs r1, #9 - 1159 0388 9954 strb r1, [r3, r2] - 1160 .LVL100: -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1161 .loc 1 1641 0 - 1162 038a 0A4B ldr r3, .L58+32 - 1163 038c 0122 movs r2, #1 - 1164 038e 1A70 strb r2, [r3] - 1165 .LBE57: - 1166 .LBE56: - 1167 .LBE55: -1854:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case SRV_MAC_DL_CHANNEL_REQ: - 1168 .loc 1 1854 0 - 1169 0390 40E6 b .L25 - 1170 .L59: - 1171 0392 C046 .align 2 - 1172 .L58: - 1173 0394 00000000 .word .L28 - 1174 0398 00000000 .word .LANCHOR28 - 1175 039c 00000000 .word .LANCHOR29 - 1176 03a0 00000000 .word .LANCHOR14 - 1177 03a4 00000000 .word .LANCHOR22 - 1178 03a8 00000000 .word .LANCHOR11 - ARM GAS /tmp/ccrFaSdZ.s page 60 - - - 1179 03ac 00000000 .word .LANCHOR10 - 1180 03b0 00000000 .word MacCommandsBuffer - 1181 03b4 00000000 .word .LANCHOR17 - 1182 03b8 00000000 .word .LANCHOR8 - 1183 03bc 00000000 .word .LANCHOR9 - 1184 03c0 00000000 .word .LANCHOR30 - 1185 03c4 00000000 .word .LANCHOR31 - 1186 .LVL101: - 1187 .L36: - 1188 .LBB58: -1860:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** dlChannelReq.Rx1Frequency = ( uint32_t )payload[macIndex++]; - 1189 .loc 1 1860 0 - 1190 03c8 A31C adds r3, r4, #2 - 1191 03ca DBB2 uxtb r3, r3 - 1192 .LVL102: - 1193 03cc BA5D ldrb r2, [r7, r6] - 1194 03ce 07A9 add r1, sp, #28 - 1195 03d0 0A70 strb r2, [r1] -1861:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** dlChannelReq.Rx1Frequency |= ( uint32_t )payload[macIndex++] << 8; - 1196 .loc 1 1861 0 - 1197 03d2 E01C adds r0, r4, #3 - 1198 03d4 C0B2 uxtb r0, r0 - 1199 .LVL103: - 1200 03d6 FB5C ldrb r3, [r7, r3] -1862:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** dlChannelReq.Rx1Frequency |= ( uint32_t )payload[macIndex++] << 16; - 1201 .loc 1 1862 0 - 1202 03d8 221D adds r2, r4, #4 - 1203 03da D2B2 uxtb r2, r2 - 1204 .LVL104: - 1205 03dc 385C ldrb r0, [r7, r0] - 1206 03de 0002 lsls r0, r0, #8 - 1207 03e0 0343 orrs r3, r0 -1863:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** dlChannelReq.Rx1Frequency *= 100; - 1208 .loc 1 1863 0 - 1209 03e2 0534 adds r4, r4, #5 - 1210 03e4 E4B2 uxtb r4, r4 - 1211 .LVL105: - 1212 03e6 BA5C ldrb r2, [r7, r2] - 1213 03e8 1204 lsls r2, r2, #16 - 1214 03ea 1343 orrs r3, r2 -1864:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1215 .loc 1 1864 0 - 1216 03ec 6422 movs r2, #100 - 1217 03ee 5343 muls r3, r2 - 1218 03f0 4B60 str r3, [r1, #4] -1866:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1219 .loc 1 1866 0 - 1220 03f2 124B ldr r3, .L60 - 1221 03f4 1878 ldrb r0, [r3] - 1222 03f6 FFF7FEFF bl RegionDlChannelReq - 1223 .LVL106: - 1224 .LBB59: - 1225 .LBB60: -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1226 .loc 1 1553 0 - 1227 03fa 114B ldr r3, .L60+4 - 1228 03fc 1A78 ldrb r2, [r3] - ARM GAS /tmp/ccrFaSdZ.s page 61 - - - 1229 03fe 8023 movs r3, #128 - 1230 0400 5B42 rsbs r3, r3, #0 - 1231 0402 9B1A subs r3, r3, r2 - 1232 0404 DBB2 uxtb r3, r3 - 1233 .LVL107: -1628:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1234 .loc 1 1628 0 - 1235 0406 0F4A ldr r2, .L60+8 - 1236 0408 1278 ldrb r2, [r2] - 1237 040a 9342 cmp r3, r2 - 1238 040c 00D8 bhi .LCB1184 - 1239 040e 01E6 b .L25 @long jump - 1240 .LCB1184: -1630:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Status: Uplink frequency exists, Channel frequency OK - 1241 .loc 1 1630 0 - 1242 0410 531C adds r3, r2, #1 - 1243 .LVL108: - 1244 0412 DBB2 uxtb r3, r3 - 1245 0414 0C49 ldr r1, .L60+12 - 1246 0416 0A26 movs r6, #10 - 1247 0418 8E54 strb r6, [r1, r2] -1632:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_OK; - 1248 .loc 1 1632 0 - 1249 041a 0232 adds r2, r2, #2 - 1250 041c 094E ldr r6, .L60+8 - 1251 041e 3270 strb r2, [r6] - 1252 0420 C854 strb r0, [r1, r3] - 1253 .LVL109: -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1254 .loc 1 1641 0 - 1255 0422 0A4B ldr r3, .L60+16 - 1256 0424 0122 movs r2, #1 - 1257 0426 1A70 strb r2, [r3] - 1258 .LVL110: - 1259 .LBE60: - 1260 .LBE59: - 1261 .LBE58: -1870:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: - 1262 .loc 1 1870 0 - 1263 0428 F4E5 b .L25 - 1264 .LVL111: - 1265 .L54: -1706:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1266 .loc 1 1706 0 - 1267 042a 3400 movs r4, r6 - 1268 042c F2E5 b .L25 - 1269 .LVL112: - 1270 .L24: -1876:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1271 .loc 1 1876 0 - 1272 042e 0AB0 add sp, sp, #40 - 1273 @ sp needed - 1274 .LVL113: - 1275 0430 1CBC pop {r2, r3, r4} - 1276 0432 9046 mov r8, r2 - 1277 0434 9946 mov r9, r3 - 1278 0436 A246 mov r10, r4 - ARM GAS /tmp/ccrFaSdZ.s page 62 - - - 1279 0438 F0BD pop {r4, r5, r6, r7, pc} - 1280 .L61: - 1281 043a C046 .align 2 - 1282 .L60: - 1283 043c 00000000 .word .LANCHOR22 - 1284 0440 00000000 .word .LANCHOR11 - 1285 0444 00000000 .word .LANCHOR10 - 1286 0448 00000000 .word MacCommandsBuffer - 1287 044c 00000000 .word .LANCHOR17 - 1288 .cfi_endproc - 1289 .LFE100: - 1291 .section .text.OnRadioRxDone,"ax",%progbits - 1292 .align 1 - 1293 .syntax unified - 1294 .code 16 - 1295 .thumb_func - 1296 .fpu softvfp - 1298 OnRadioRxDone: - 1299 .LFB87: - 702:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacHeader_t macHdr; - 1300 .loc 1 702 0 - 1301 .cfi_startproc - 1302 @ args = 0, pretend = 0, frame = 48 - 1303 @ frame_needed = 0, uses_anonymous_args = 0 - 1304 .LVL114: - 1305 0000 F0B5 push {r4, r5, r6, r7, lr} - 1306 .LCFI8: - 1307 .cfi_def_cfa_offset 20 - 1308 .cfi_offset 4, -20 - 1309 .cfi_offset 5, -16 - 1310 .cfi_offset 6, -12 - 1311 .cfi_offset 7, -8 - 1312 .cfi_offset 14, -4 - 1313 0002 DE46 mov lr, fp - 1314 0004 5746 mov r7, r10 - 1315 0006 4E46 mov r6, r9 - 1316 0008 4546 mov r5, r8 - 1317 000a E0B5 push {r5, r6, r7, lr} - 1318 .LCFI9: - 1319 .cfi_def_cfa_offset 36 - 1320 .cfi_offset 8, -36 - 1321 .cfi_offset 9, -32 - 1322 .cfi_offset 10, -28 - 1323 .cfi_offset 11, -24 - 1324 000c 91B0 sub sp, sp, #68 - 1325 .LCFI10: - 1326 .cfi_def_cfa_offset 104 - 1327 000e 0400 movs r4, r0 - 1328 0010 0E00 movs r6, r1 - 1329 .LVL115: - 715:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint32_t micRx = 0; - 1330 .loc 1 715 0 - 1331 0012 0020 movs r0, #0 - 1332 .LVL116: - 1333 0014 0C90 str r0, [sp, #48] - 1334 .LVL117: - 731:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Rssi = rssi; - ARM GAS /tmp/ccrFaSdZ.s page 63 - - - 1335 .loc 1 731 0 - 1336 0016 9049 ldr r1, .L126 - 1337 .LVL118: - 1338 0018 0871 strb r0, [r1, #4] - 732:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Snr = snr; - 1339 .loc 1 732 0 - 1340 001a 9049 ldr r1, .L126+4 - 1341 001c CA81 strh r2, [r1, #14] - 733:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.RxSlot = RxSlot; - 1342 .loc 1 733 0 - 1343 001e DDB2 uxtb r5, r3 - 1344 0020 0D74 strb r5, [r1, #16] - 734:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Port = 0; - 1345 .loc 1 734 0 - 1346 0022 8F4B ldr r3, .L126+8 - 1347 .LVL119: - 1348 0024 1B78 ldrb r3, [r3] - 1349 0026 4B74 strb r3, [r1, #17] - 735:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Multicast = 0; - 1350 .loc 1 735 0 - 1351 0028 C870 strb r0, [r1, #3] - 736:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.FramePending = 0; - 1352 .loc 1 736 0 - 1353 002a 8870 strb r0, [r1, #2] - 737:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Buffer = NULL; - 1354 .loc 1 737 0 - 1355 002c 4871 strb r0, [r1, #5] - 738:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.BufferSize = 0; - 1356 .loc 1 738 0 - 1357 002e 8860 str r0, [r1, #8] - 739:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.RxData = false; - 1358 .loc 1 739 0 - 1359 0030 0873 strb r0, [r1, #12] - 740:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.AckReceived = false; - 1360 .loc 1 740 0 - 1361 0032 4873 strb r0, [r1, #13] - 741:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = 0; - 1362 .loc 1 741 0 - 1363 0034 8874 strb r0, [r1, #18] - 742:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.McpsIndication = MCPS_UNCONFIRMED; - 1364 .loc 1 742 0 - 1365 0036 4861 str r0, [r1, #20] - 743:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1366 .loc 1 743 0 - 1367 0038 0870 strb r0, [r1] - 745:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &RxWindowTimer2 ); - 1368 .loc 1 745 0 - 1369 003a 8A4B ldr r3, .L126+12 - 1370 003c 5B6B ldr r3, [r3, #52] - 1371 003e 9847 blx r3 - 1372 .LVL120: - 746:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1373 .loc 1 746 0 - 1374 0040 8948 ldr r0, .L126+16 - 1375 0042 FFF7FEFF bl TimerStop - 1376 .LVL121: - 748:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 64 - - - 1377 .loc 1 748 0 - 1378 0046 2378 ldrb r3, [r4] - 1379 0048 9846 mov r8, r3 - 750:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1380 .loc 1 750 0 - 1381 004a 5B09 lsrs r3, r3, #5 - 1382 004c 032B cmp r3, #3 - 1383 004e 00D1 bne .LCB1344 - 1384 0050 B3E0 b .L64 @long jump - 1385 .LCB1344: - 1386 0052 2CD9 bls .L107 - 1387 0054 052B cmp r3, #5 - 1388 0056 00D1 bne .LCB1348 - 1389 0058 AFE0 b .L64 @long jump - 1390 .LCB1348: - 1391 005a 072B cmp r3, #7 - 1392 005c 00D0 beq .LCB1350 - 1393 005e ABE2 b .L63 @long jump - 1394 .LCB1350: -1098:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1395 .loc 1 1098 0 - 1396 0060 611C adds r1, r4, #1 - 1397 0062 824C ldr r4, .L126+20 - 1398 .LVL122: - 1399 0064 3200 movs r2, r6 - 1400 0066 2000 movs r0, r4 - 1401 0068 FFF7FEFF bl memcpy1 - 1402 .LVL123: -1100:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Status = LORAMAC_EVENT_INFO_STATUS_OK; - 1403 .loc 1 1100 0 - 1404 006c 7B4B ldr r3, .L126+4 - 1405 006e 0322 movs r2, #3 - 1406 0070 1A70 strb r2, [r3] -1101:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Buffer = LoRaMacRxPayload; - 1407 .loc 1 1101 0 - 1408 0072 0022 movs r2, #0 - 1409 0074 5A70 strb r2, [r3, #1] -1102:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.BufferSize = size - pktHeaderLen; - 1410 .loc 1 1102 0 - 1411 0076 9C60 str r4, [r3, #8] -1103:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1412 .loc 1 1103 0 - 1413 0078 013E subs r6, r6, #1 - 1414 007a 1E73 strb r6, [r3, #12] -1105:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 1415 .loc 1 1105 0 - 1416 007c 7C4A ldr r2, .L126+24 - 1417 007e 1378 ldrb r3, [r2] - 1418 0080 0221 movs r1, #2 - 1419 0082 0B43 orrs r3, r1 - 1420 0084 1370 strb r3, [r2] - 1421 .LVL124: - 1422 .L72: -1113:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1423 .loc 1 1113 0 discriminator 1 - 1424 0086 7A4A ldr r2, .L126+24 - 1425 0088 1378 ldrb r3, [r2] - ARM GAS /tmp/ccrFaSdZ.s page 65 - - - 1426 008a 1021 movs r1, #16 - 1427 008c 0B43 orrs r3, r1 - 1428 008e 1370 strb r3, [r2] -1116:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &MacStateCheckTimer ); - 1429 .loc 1 1116 0 discriminator 1 - 1430 0090 784C ldr r4, .L126+28 - 1431 0092 0121 movs r1, #1 - 1432 0094 2000 movs r0, r4 - 1433 0096 FFF7FEFF bl TimerSetValue - 1434 .LVL125: -1117:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1435 .loc 1 1117 0 discriminator 1 - 1436 009a 2000 movs r0, r4 - 1437 009c FFF7FEFF bl TimerStart - 1438 .LVL126: - 1439 .L62: -1118:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1440 .loc 1 1118 0 - 1441 00a0 11B0 add sp, sp, #68 - 1442 @ sp needed - 1443 00a2 3CBC pop {r2, r3, r4, r5} - 1444 00a4 9046 mov r8, r2 - 1445 00a6 9946 mov r9, r3 - 1446 00a8 A246 mov r10, r4 - 1447 00aa AB46 mov fp, r5 - 1448 00ac F0BD pop {r4, r5, r6, r7, pc} - 1449 .LVL127: - 1450 .L107: - 750:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1451 .loc 1 750 0 - 1452 00ae 012B cmp r3, #1 - 1453 00b0 00D0 beq .LCB1441 - 1454 00b2 81E2 b .L63 @long jump - 1455 .LCB1441: - 753:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1456 .loc 1 753 0 - 1457 00b4 704B ldr r3, .L126+32 - 1458 00b6 1B78 ldrb r3, [r3] - 1459 00b8 002B cmp r3, #0 - 1460 00ba 05D0 beq .L68 - 755:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 1461 .loc 1 755 0 - 1462 00bc 674B ldr r3, .L126+4 - 1463 00be 0122 movs r2, #1 - 1464 00c0 5A70 strb r2, [r3, #1] - 756:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 1465 .loc 1 756 0 - 1466 00c2 FFF7FEFF bl PrepareRxDoneAbort - 1467 .LVL128: - 757:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1468 .loc 1 757 0 - 1469 00c6 EBE7 b .L62 - 1470 .L68: - 759:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1471 .loc 1 759 0 - 1472 00c8 601C adds r0, r4, #1 - 1473 00ca 6C4C ldr r4, .L126+36 - ARM GAS /tmp/ccrFaSdZ.s page 66 - - - 1474 .LVL129: - 1475 00cc 6C4F ldr r7, .L126+40 - 1476 00ce 751E subs r5, r6, #1 - 1477 00d0 A9B2 uxth r1, r5 - 1478 00d2 2300 movs r3, r4 - 1479 00d4 3A68 ldr r2, [r7] - 1480 00d6 FFF7FEFF bl LoRaMacJoinDecrypt - 1481 .LVL130: - 761:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1482 .loc 1 761 0 - 1483 00da 013C subs r4, r4, #1 - 1484 00dc 4346 mov r3, r8 - 1485 00de 2370 strb r3, [r4] - 763:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1486 .loc 1 763 0 - 1487 00e0 3A68 ldr r2, [r7] - 1488 00e2 371F subs r7, r6, #4 - 1489 00e4 B9B2 uxth r1, r7 - 1490 00e6 0CAB add r3, sp, #48 - 1491 00e8 2000 movs r0, r4 - 1492 00ea FFF7FEFF bl LoRaMacJoinComputeMic - 1493 .LVL131: - 765:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )LoRaMacRxPayload[size - LORAMAC_MFR_LEN + 1] << 8 ); - 1494 .loc 1 765 0 - 1495 00ee E25D ldrb r2, [r4, r7] - 1496 .LVL132: - 766:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )LoRaMacRxPayload[size - LORAMAC_MFR_LEN + 2] << 16 ); - 1497 .loc 1 766 0 - 1498 00f0 F31E subs r3, r6, #3 - 1499 00f2 E35C ldrb r3, [r4, r3] - 1500 00f4 1B02 lsls r3, r3, #8 - 1501 00f6 1A43 orrs r2, r3 - 1502 .LVL133: - 767:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )LoRaMacRxPayload[size - LORAMAC_MFR_LEN + 3] << 24 ); - 1503 .loc 1 767 0 - 1504 00f8 B31E subs r3, r6, #2 - 1505 00fa E35C ldrb r3, [r4, r3] - 1506 00fc 1B04 lsls r3, r3, #16 - 1507 00fe 1A43 orrs r2, r3 - 1508 .LVL134: - 768:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1509 .loc 1 768 0 - 1510 0100 635D ldrb r3, [r4, r5] - 1511 0102 1B06 lsls r3, r3, #24 - 1512 0104 1343 orrs r3, r2 - 1513 .LVL135: - 770:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1514 .loc 1 770 0 - 1515 0106 0C9A ldr r2, [sp, #48] - 1516 0108 9A42 cmp r2, r3 - 1517 010a 03D0 beq .L108 - 809:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1518 .loc 1 809 0 - 1519 010c 5D4B ldr r3, .L126+44 - 1520 .LVL136: - 1521 010e 0722 movs r2, #7 - 1522 0110 5A70 strb r2, [r3, #1] - ARM GAS /tmp/ccrFaSdZ.s page 67 - - - 1523 0112 B8E7 b .L72 - 1524 .LVL137: - 1525 .L108: - 772:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1526 .loc 1 772 0 - 1527 0114 5C4B ldr r3, .L126+48 - 1528 .LVL138: - 1529 0116 1A88 ldrh r2, [r3] - 1530 0118 584C ldr r4, .L126+36 - 1531 .LVL139: - 1532 011a 594B ldr r3, .L126+40 - 1533 011c 1868 ldr r0, [r3] - 1534 011e 5B4B ldr r3, .L126+52 - 1535 0120 0093 str r3, [sp] - 1536 0122 5B4B ldr r3, .L126+56 - 1537 0124 2100 movs r1, r4 - 1538 0126 FFF7FEFF bl LoRaMacJoinComputeSKeys - 1539 .LVL140: - 774:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacNetID |= ( ( uint32_t )LoRaMacRxPayload[5] << 8 ); - 1540 .loc 1 774 0 - 1541 012a 611E subs r1, r4, #1 - 1542 012c E378 ldrb r3, [r4, #3] - 775:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacNetID |= ( ( uint32_t )LoRaMacRxPayload[6] << 16 ); - 1543 .loc 1 775 0 - 1544 012e 2279 ldrb r2, [r4, #4] - 1545 0130 1202 lsls r2, r2, #8 - 1546 0132 1343 orrs r3, r2 - 776:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1547 .loc 1 776 0 - 1548 0134 6279 ldrb r2, [r4, #5] - 1549 0136 1204 lsls r2, r2, #16 - 1550 0138 1343 orrs r3, r2 - 1551 013a 564A ldr r2, .L126+60 - 1552 013c 1360 str r3, [r2] - 778:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevAddr |= ( ( uint32_t )LoRaMacRxPayload[8] << 8 ); - 1553 .loc 1 778 0 - 1554 013e A379 ldrb r3, [r4, #6] - 779:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevAddr |= ( ( uint32_t )LoRaMacRxPayload[9] << 16 ); - 1555 .loc 1 779 0 - 1556 0140 E279 ldrb r2, [r4, #7] - 1557 0142 1202 lsls r2, r2, #8 - 1558 0144 1343 orrs r3, r2 - 780:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevAddr |= ( ( uint32_t )LoRaMacRxPayload[10] << 24 ); - 1559 .loc 1 780 0 - 1560 0146 227A ldrb r2, [r4, #8] - 1561 0148 1204 lsls r2, r2, #16 - 1562 014a 1343 orrs r3, r2 - 781:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1563 .loc 1 781 0 - 1564 014c 627A ldrb r2, [r4, #9] - 1565 014e 1206 lsls r2, r2, #24 - 1566 0150 1343 orrs r3, r2 - 1567 0152 514A ldr r2, .L126+64 - 1568 0154 1360 str r3, [r2] - 784:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel.Datarate = LoRaMacRxPayload[11] & 0x0F; - 1569 .loc 1 784 0 - 1570 0156 A27A ldrb r2, [r4, #10] - ARM GAS /tmp/ccrFaSdZ.s page 68 - - - 1571 0158 1009 lsrs r0, r2, #4 - 1572 015a 0723 movs r3, #7 - 1573 015c 0340 ands r3, r0 - 1574 015e 4F48 ldr r0, .L126+68 - 1575 0160 2124 movs r4, #33 - 1576 0162 0355 strb r3, [r0, r4] - 785:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1577 .loc 1 785 0 - 1578 0164 0F23 movs r3, #15 - 1579 0166 1A40 ands r2, r3 - 1580 0168 0734 adds r4, r4, #7 - 1581 016a 0255 strb r2, [r0, r4] - 788:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacParams.ReceiveDelay1 == 0 ) - 1582 .loc 1 788 0 - 1583 016c 0A7B ldrb r2, [r1, #12] - 1584 016e 1340 ands r3, r2 - 1585 0170 0361 str r3, [r0, #16] - 789:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1586 .loc 1 789 0 - 1587 0172 01D1 bne .L71 - 791:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1588 .loc 1 791 0 - 1589 0174 0122 movs r2, #1 - 1590 0176 0261 str r2, [r0, #16] - 1591 .L71: - 793:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay2 = LoRaMacParams.ReceiveDelay1 + 1000; - 1592 .loc 1 793 0 - 1593 0178 484C ldr r4, .L126+68 - 1594 017a 2269 ldr r2, [r4, #16] - 1595 017c 5301 lsls r3, r2, #5 - 1596 017e 9B1A subs r3, r3, r2 - 1597 0180 9B00 lsls r3, r3, #2 - 1598 0182 9B18 adds r3, r3, r2 - 1599 0184 DB00 lsls r3, r3, #3 - 1600 0186 2361 str r3, [r4, #16] - 794:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1601 .loc 1 794 0 - 1602 0188 FA22 movs r2, #250 - 1603 018a 9200 lsls r2, r2, #2 - 1604 018c 9446 mov ip, r2 - 1605 018e 6344 add r3, r3, ip - 1606 0190 6361 str r3, [r4, #20] - 797:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Size of the regular payload is 12. Plus 1 byte MHDR and 4 bytes MIC - 1607 .loc 1 797 0 - 1608 0192 0EA9 add r1, sp, #56 - 1609 0194 424B ldr r3, .L126+72 - 1610 0196 0E93 str r3, [sp, #56] - 799:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1611 .loc 1 799 0 - 1612 0198 113E subs r6, r6, #17 - 1613 019a 0E71 strb r6, [r1, #4] - 801:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1614 .loc 1 801 0 - 1615 019c 414B ldr r3, .L126+76 - 1616 019e 1878 ldrb r0, [r3] - 1617 01a0 FFF7FEFF bl RegionApplyCFList - 1618 .LVL141: - ARM GAS /tmp/ccrFaSdZ.s page 69 - - - 803:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** IsLoRaMacNetworkJoined = true; - 1619 .loc 1 803 0 - 1620 01a4 374B ldr r3, .L126+44 - 1621 01a6 0022 movs r2, #0 - 1622 01a8 5A70 strb r2, [r3, #1] - 804:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = LoRaMacParamsDefaults.ChannelsDatarate; - 1623 .loc 1 804 0 - 1624 01aa 334B ldr r3, .L126+32 - 1625 01ac 0132 adds r2, r2, #1 - 1626 01ae 1A70 strb r2, [r3] - 805:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1627 .loc 1 805 0 - 1628 01b0 3D4B ldr r3, .L126+80 - 1629 01b2 5B78 ldrb r3, [r3, #1] - 1630 01b4 5BB2 sxtb r3, r3 - 1631 01b6 6370 strb r3, [r4, #1] - 1632 01b8 65E7 b .L72 - 1633 .LVL142: - 1634 .L64: - 816:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Datarate = McpsIndication.RxDatarate; - 1635 .loc 1 816 0 - 1636 01ba 384A ldr r2, .L126+68 - 1637 01bc 2D23 movs r3, #45 - 1638 01be D25C ldrb r2, [r2, r3] - 1639 01c0 0DAB add r3, sp, #52 - 1640 01c2 9A70 strb r2, [r3, #2] - 817:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_PAYLOAD; - 1641 .loc 1 817 0 - 1642 01c4 254A ldr r2, .L126+4 - 1643 01c6 1279 ldrb r2, [r2, #4] - 1644 01c8 52B2 sxtb r2, r2 - 1645 01ca 5A70 strb r2, [r3, #1] - 818:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1646 .loc 1 818 0 - 1647 01cc 0922 movs r2, #9 - 1648 01ce 1A70 strb r2, [r3] - 821:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1649 .loc 1 821 0 - 1650 01d0 364B ldr r3, .L126+84 - 1651 01d2 1B78 ldrb r3, [r3] - 1652 01d4 002B cmp r3, #0 - 1653 01d6 02D0 beq .L73 - 823:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1654 .loc 1 823 0 - 1655 01d8 0DAB add r3, sp, #52 - 1656 01da 0132 adds r2, r2, #1 - 1657 01dc 1A70 strb r2, [r3] - 1658 .L73: - 825:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MAX( 0, ( int16_t )( ( int16_t )size - ( int16_t )LORA_MAC_FRMPAYLOAD_OVERHEAD - 1659 .loc 1 825 0 - 1660 01de 314B ldr r3, .L126+76 - 1661 01e0 1878 ldrb r0, [r3] - 1662 01e2 0DA9 add r1, sp, #52 - 1663 01e4 FFF7FEFF bl RegionGetPhyParam - 1664 .LVL143: - 826:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1665 .loc 1 826 0 - ARM GAS /tmp/ccrFaSdZ.s page 70 - - - 1666 01e8 3300 movs r3, r6 - 1667 01ea 0D3B subs r3, r3, #13 - 1668 01ec 1BB2 sxth r3, r3 - 1669 01ee 1A1C adds r2, r3, #0 - 1670 01f0 002B cmp r3, #0 - 1671 01f2 1CDB blt .L109 - 1672 .L74: - 1673 01f4 12B2 sxth r2, r2 - 1674 .LVL144: - 1675 01f6 8242 cmp r2, r0 - 1676 01f8 1BD8 bhi .L110 - 1677 .LVL145: - 833:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** address |= ( (uint32_t)payload[pktHeaderLen++] << 8 ); - 1678 .loc 1 833 0 - 1679 01fa 6378 ldrb r3, [r4, #1] - 1680 .LVL146: - 834:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** address |= ( (uint32_t)payload[pktHeaderLen++] << 16 ); - 1681 .loc 1 834 0 - 1682 01fc A278 ldrb r2, [r4, #2] - 1683 01fe 1202 lsls r2, r2, #8 - 1684 0200 1343 orrs r3, r2 - 1685 .LVL147: - 835:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** address |= ( (uint32_t)payload[pktHeaderLen++] << 24 ); - 1686 .loc 1 835 0 - 1687 0202 E278 ldrb r2, [r4, #3] - 1688 0204 1204 lsls r2, r2, #16 - 1689 0206 1343 orrs r3, r2 - 1690 .LVL148: - 836:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1691 .loc 1 836 0 - 1692 0208 2279 ldrb r2, [r4, #4] - 1693 020a 1206 lsls r2, r2, #24 - 1694 020c 1343 orrs r3, r2 - 1695 .LVL149: - 1696 020e 9946 mov r9, r3 - 1697 .LVL150: - 838:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1698 .loc 1 838 0 - 1699 0210 214B ldr r3, .L126+64 - 1700 .LVL151: - 1701 0212 1B68 ldr r3, [r3] - 1702 0214 4B45 cmp r3, r9 - 1703 0216 00D1 bne .LCB1669 - 1704 0218 02E1 b .L76 @long jump - 1705 .LCB1669: - 840:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** while( curMulticastParams != NULL ) - 1706 .loc 1 840 0 - 1707 021a 254B ldr r3, .L126+88 - 1708 021c 1F68 ldr r7, [r3] - 1709 .LVL152: - 1710 021e 4B46 mov r3, r9 - 1711 .L77: - 841:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1712 .loc 1 841 0 - 1713 0220 002F cmp r7, #0 - 1714 0222 47D0 beq .L111 - 843:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - ARM GAS /tmp/ccrFaSdZ.s page 71 - - - 1715 .loc 1 843 0 - 1716 0224 3A68 ldr r2, [r7] - 1717 0226 9A42 cmp r2, r3 - 1718 0228 09D0 beq .L112 - 851:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1719 .loc 1 851 0 - 1720 022a BF6A ldr r7, [r7, #40] - 1721 .LVL153: - 1722 022c F8E7 b .L77 - 1723 .LVL154: - 1724 .L109: - 826:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1725 .loc 1 826 0 - 1726 022e 0022 movs r2, #0 - 1727 0230 E0E7 b .L74 - 1728 .LVL155: - 1729 .L110: - 828:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 1730 .loc 1 828 0 - 1731 0232 0A4B ldr r3, .L126+4 - 1732 0234 0122 movs r2, #1 - 1733 0236 5A70 strb r2, [r3, #1] - 829:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 1734 .loc 1 829 0 - 1735 0238 FFF7FEFF bl PrepareRxDoneAbort - 1736 .LVL156: - 830:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1737 .loc 1 830 0 - 1738 023c 30E7 b .L62 - 1739 .LVL157: - 1740 .L112: - 1741 023e 9946 mov r9, r3 - 1742 .LVL158: - 846:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** appSKey = curMulticastParams->AppSKey; - 1743 .loc 1 846 0 - 1744 0240 3B1D adds r3, r7, #4 - 1745 .LVL159: - 1746 0242 0693 str r3, [sp, #24] - 1747 .LVL160: - 847:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** downLinkCounter = curMulticastParams->DownLinkCounter; - 1748 .loc 1 847 0 - 1749 0244 1423 movs r3, #20 - 1750 .LVL161: - 1751 0246 9C46 mov ip, r3 - 1752 0248 BC44 add ip, ip, r7 - 1753 024a 6346 mov r3, ip - 1754 024c 0A93 str r3, [sp, #40] - 1755 .LVL162: - 848:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 1756 .loc 1 848 0 - 1757 024e 7B6A ldr r3, [r7, #36] - 1758 .LVL163: - 1759 0250 0493 str r3, [sp, #16] - 1760 .LVL164: - 845:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nwkSKey = curMulticastParams->NwkSKey; - 1761 .loc 1 845 0 - 1762 0252 0123 movs r3, #1 - ARM GAS /tmp/ccrFaSdZ.s page 72 - - - 1763 .LVL165: - 1764 0254 0593 str r3, [sp, #20] - 849:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1765 .loc 1 849 0 - 1766 0256 36E0 b .L79 - 1767 .L127: - 1768 .align 2 - 1769 .L126: - 1770 0258 00000000 .word .LANCHOR34 - 1771 025c 00000000 .word .LANCHOR35 - 1772 0260 00000000 .word .LANCHOR36 - 1773 0264 00000000 .word Radio - 1774 0268 00000000 .word .LANCHOR37 - 1775 026c 00000000 .word LoRaMacRxPayload - 1776 0270 00000000 .word .LANCHOR26 - 1777 0274 00000000 .word .LANCHOR27 - 1778 0278 00000000 .word .LANCHOR0 - 1779 027c 01000000 .word LoRaMacRxPayload+1 - 1780 0280 00000000 .word .LANCHOR38 - 1781 0284 00000000 .word .LANCHOR28 - 1782 0288 00000000 .word .LANCHOR39 - 1783 028c 00000000 .word .LANCHOR32 - 1784 0290 00000000 .word .LANCHOR33 - 1785 0294 00000000 .word .LANCHOR40 - 1786 0298 00000000 .word .LANCHOR41 - 1787 029c 00000000 .word .LANCHOR14 - 1788 02a0 0D000000 .word LoRaMacRxPayload+13 - 1789 02a4 00000000 .word .LANCHOR22 - 1790 02a8 00000000 .word .LANCHOR13 - 1791 02ac 00000000 .word .LANCHOR21 - 1792 02b0 00000000 .word .LANCHOR18 - 1793 .LVL166: - 1794 .L111: - 1795 02b4 9946 mov r9, r3 - 727:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1796 .loc 1 727 0 - 1797 02b6 0023 movs r3, #0 - 1798 .LVL167: - 1799 02b8 0593 str r3, [sp, #20] - 725:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1800 .loc 1 725 0 - 1801 02ba C24B ldr r3, .L128 - 1802 02bc 0A93 str r3, [sp, #40] - 724:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t *appSKey = LoRaMacAppSKey; - 1803 .loc 1 724 0 - 1804 02be C24B ldr r3, .L128+4 - 1805 02c0 0693 str r3, [sp, #24] - 721:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1806 .loc 1 721 0 - 1807 02c2 0023 movs r3, #0 - 1808 02c4 0493 str r3, [sp, #16] - 1809 .LVL168: - 1810 .L79: - 853:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1811 .loc 1 853 0 - 1812 02c6 059B ldr r3, [sp, #20] - 1813 02c8 002B cmp r3, #0 - ARM GAS /tmp/ccrFaSdZ.s page 73 - - - 1814 02ca 00D1 bne .LCB1799 - 1815 02cc A2E0 b .L113 @long jump - 1816 .LCB1799: - 1817 .LVL169: - 1818 .L81: - 869:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1819 .loc 1 869 0 - 1820 02ce 6379 ldrb r3, [r4, #5] - 1821 02d0 9B46 mov fp, r3 - 1822 .LVL170: - 871:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** sequenceCounter |= ( uint16_t )payload[pktHeaderLen++] << 8; - 1823 .loc 1 871 0 - 1824 02d2 A279 ldrb r2, [r4, #6] - 1825 .LVL171: - 872:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1826 .loc 1 872 0 - 1827 02d4 E379 ldrb r3, [r4, #7] - 1828 02d6 1B02 lsls r3, r3, #8 - 1829 02d8 1A43 orrs r2, r3 - 1830 .LVL172: - 874:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1831 .loc 1 874 0 - 1832 02da 5B46 mov r3, fp - 1833 02dc 1807 lsls r0, r3, #28 - 1834 .LVL173: - 1835 02de 030F lsrs r3, r0, #28 - 1836 02e0 0B93 str r3, [sp, #44] - 1837 02e2 0833 adds r3, r3, #8 - 1838 02e4 0993 str r3, [sp, #36] - 1839 .LVL174: - 876:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )payload[size - LORAMAC_MFR_LEN + 1] << 8 ); - 1840 .loc 1 876 0 - 1841 02e6 A319 adds r3, r4, r6 - 1842 02e8 191F subs r1, r3, #4 - 1843 02ea 0878 ldrb r0, [r1] - 1844 .LVL175: - 877:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )payload[size - LORAMAC_MFR_LEN + 2] << 16 ); - 1845 .loc 1 877 0 - 1846 02ec D91E subs r1, r3, #3 - 1847 02ee 0978 ldrb r1, [r1] - 1848 02f0 0902 lsls r1, r1, #8 - 1849 02f2 0843 orrs r0, r1 - 1850 .LVL176: - 878:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** micRx |= ( ( uint32_t )payload[size - LORAMAC_MFR_LEN + 3] << 24 ); - 1851 .loc 1 878 0 - 1852 02f4 991E subs r1, r3, #2 - 1853 02f6 0978 ldrb r1, [r1] - 1854 02f8 0904 lsls r1, r1, #16 - 1855 02fa 0143 orrs r1, r0 - 1856 .LVL177: - 879:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1857 .loc 1 879 0 - 1858 02fc 013B subs r3, r3, #1 - 1859 02fe 1B78 ldrb r3, [r3] - 1860 0300 1B06 lsls r3, r3, #24 - 1861 0302 0B43 orrs r3, r1 - 1862 0304 0893 str r3, [sp, #32] - ARM GAS /tmp/ccrFaSdZ.s page 74 - - - 1863 .LVL178: - 881:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** sequenceCounterDiff = ( sequenceCounter - sequenceCounterPrev ); - 1864 .loc 1 881 0 - 1865 0306 0499 ldr r1, [sp, #16] - 1866 0308 8BB2 uxth r3, r1 - 1867 .LVL179: - 882:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1868 .loc 1 882 0 - 1869 030a D31A subs r3, r2, r3 - 1870 .LVL180: - 1871 030c 9AB2 uxth r2, r3 - 1872 .LVL181: - 1873 030e 0792 str r2, [sp, #28] - 1874 .LVL182: - 884:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1875 .loc 1 884 0 - 1876 0310 13B2 sxth r3, r2 - 1877 0312 002B cmp r3, #0 - 1878 0314 00DA bge .LCB1868 - 1879 0316 8EE0 b .L82 @long jump - 1880 .LCB1868: - 886:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacComputeMic( payload, size - LORAMAC_MFR_LEN, nwkSKey, address, DOWN_LINK - 1881 .loc 1 886 0 - 1882 0318 9446 mov ip, r2 - 1883 031a 6144 add r1, r1, ip - 1884 .LVL183: - 1885 031c 8A46 mov r10, r1 - 1886 .LVL184: - 887:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( micRx == mic ) - 1887 .loc 1 887 0 - 1888 031e 311F subs r1, r6, #4 - 1889 .LVL185: - 1890 0320 89B2 uxth r1, r1 - 1891 0322 0CAB add r3, sp, #48 - 1892 0324 0293 str r3, [sp, #8] - 1893 .LVL186: - 1894 0326 5246 mov r2, r10 - 1895 .LVL187: - 1896 0328 0192 str r2, [sp, #4] - 1897 032a 0123 movs r3, #1 - 1898 032c 0093 str r3, [sp] - 1899 032e 4B46 mov r3, r9 - 1900 0330 069A ldr r2, [sp, #24] - 1901 0332 2000 movs r0, r4 - 1902 0334 FFF7FEFF bl LoRaMacComputeMic - 1903 .LVL188: - 888:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1904 .loc 1 888 0 - 1905 0338 0C9A ldr r2, [sp, #48] - 1906 033a 089B ldr r3, [sp, #32] - 1907 033c 9A42 cmp r2, r3 - 1908 033e 00D1 bne .LCB1895 - 1909 0340 96E0 b .L100 @long jump - 1910 .LCB1895: - 729:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1911 .loc 1 729 0 - 1912 0342 0023 movs r3, #0 - ARM GAS /tmp/ccrFaSdZ.s page 75 - - - 1913 0344 0493 str r3, [sp, #16] - 1914 .LVL189: - 1915 .L83: - 906:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 1916 .loc 1 906 0 - 1917 0346 0DA9 add r1, sp, #52 - 1918 0348 1123 movs r3, #17 - 1919 034a 0B70 strb r3, [r1] - 907:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( sequenceCounterDiff >= phyParam.Value ) - 1920 .loc 1 907 0 - 1921 034c 9F4B ldr r3, .L128+8 - 1922 034e 1878 ldrb r0, [r3] - 1923 0350 FFF7FEFF bl RegionGetPhyParam - 1924 .LVL190: - 908:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1925 .loc 1 908 0 - 1926 0354 079B ldr r3, [sp, #28] - 1927 .LVL191: - 1928 0356 8342 cmp r3, r0 - 1929 0358 00D3 bcc .LCB1915 - 1930 035a 8FE0 b .L114 @long jump - 1931 .LCB1915: - 916:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1932 .loc 1 916 0 - 1933 035c 049B ldr r3, [sp, #16] - 1934 035e 002B cmp r3, #0 - 1935 0360 00D1 bne .LCB1918 - 1936 0362 23E1 b .L85 @long jump - 1937 .LCB1918: - 918:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Multicast = multicast; - 1938 .loc 1 918 0 - 1939 0364 9A4A ldr r2, .L128+12 - 1940 0366 0023 movs r3, #0 - 1941 0368 5370 strb r3, [r2, #1] - 919:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.FramePending = fCtrl.Bits.FPending; - 1942 .loc 1 919 0 - 1943 036a 0598 ldr r0, [sp, #20] - 1944 .LVL192: - 1945 036c 9070 strb r0, [r2, #2] - 920:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.Buffer = NULL; - 1946 .loc 1 920 0 - 1947 036e 5946 mov r1, fp - 1948 0370 C906 lsls r1, r1, #27 - 1949 0372 C90F lsrs r1, r1, #31 - 1950 0374 5171 strb r1, [r2, #5] - 921:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.BufferSize = 0; - 1951 .loc 1 921 0 - 1952 0376 9360 str r3, [r2, #8] - 922:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = downLinkCounter; - 1953 .loc 1 922 0 - 1954 0378 1373 strb r3, [r2, #12] - 923:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1955 .loc 1 923 0 - 1956 037a 5146 mov r1, r10 - 1957 037c 5161 str r1, [r2, #20] - 925:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1958 .loc 1 925 0 - ARM GAS /tmp/ccrFaSdZ.s page 76 - - - 1959 037e 954A ldr r2, .L128+16 - 1960 0380 5370 strb r3, [r2, #1] - 927:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferToRepeatIndex = 0; - 1961 .loc 1 927 0 - 1962 0382 954A ldr r2, .L128+20 - 1963 0384 1360 str r3, [r2] - 928:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1964 .loc 1 928 0 - 1965 0386 954A ldr r2, .L128+24 - 1966 0388 1370 strb r3, [r2] - 931:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1967 .loc 1 931 0 - 1968 038a 0128 cmp r0, #1 - 1969 038c 7ED0 beq .L115 - 947:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 1970 .loc 1 947 0 - 1971 038e 1F23 movs r3, #31 - 1972 0390 4246 mov r2, r8 - 1973 0392 9A43 bics r2, r3 - 1974 0394 1300 movs r3, r2 - 1975 0396 A02A cmp r2, #160 - 1976 0398 00D1 bne .LCB1947 - 1977 039a 89E0 b .L116 @long jump - 1978 .LCB1947: - 965:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.McpsIndication = MCPS_UNCONFIRMED; - 1979 .loc 1 965 0 - 1980 039c 0023 movs r3, #0 - 1981 039e 904A ldr r2, .L128+28 - 1982 03a0 1370 strb r3, [r2] - 966:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1983 .loc 1 966 0 - 1984 03a2 8B4A ldr r2, .L128+12 - 1985 03a4 1370 strb r3, [r2] - 968:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( DownLinkCounter != 0 ) ) - 1986 .loc 1 968 0 - 1987 03a6 8F4B ldr r3, .L128+32 - 1988 03a8 1B68 ldr r3, [r3] - 1989 03aa 5345 cmp r3, r10 - 1990 03ac 00D1 bne .LCB1956 - 1991 03ae 8EE0 b .L117 @long jump - 1992 .LCB1956: - 708:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 1993 .loc 1 708 0 - 1994 03b0 0027 movs r7, #0 - 1995 .LVL193: - 1996 .L90: - 977:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 1997 .loc 1 977 0 - 1998 03b2 8C4B ldr r3, .L128+32 - 1999 03b4 5246 mov r2, r10 - 2000 03b6 1A60 str r2, [r3] - 2001 .LVL194: - 2002 .L88: - 984:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2003 .loc 1 984 0 - 2004 03b8 864B ldr r3, .L128+16 - 2005 03ba 1B78 ldrb r3, [r3] - ARM GAS /tmp/ccrFaSdZ.s page 77 - - - 2006 03bc 012B cmp r3, #1 - 2007 03be 00D1 bne .LCB1973 - 2008 03c0 91E0 b .L118 @long jump - 2009 .LCB1973: - 993:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2010 .loc 1 993 0 - 2011 03c2 894B ldr r3, .L128+36 - 2012 03c4 0022 movs r2, #0 - 2013 03c6 1A70 strb r2, [r3] - 2014 .L92: - 997:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2015 .loc 1 997 0 - 2016 03c8 331F subs r3, r6, #4 - 2017 03ca 099A ldr r2, [sp, #36] - 2018 03cc 9B1A subs r3, r3, r2 - 2019 03ce 002B cmp r3, #0 - 2020 03d0 00DC bgt .LCB1983 - 2021 03d2 C4E0 b .L93 @long jump - 2022 .LCB1983: - 999:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** frameLen = ( size - 4 ) - appPayloadStartIndex; - 2023 .loc 1 999 0 - 2024 03d4 0B9B ldr r3, [sp, #44] - 2025 03d6 0921 movs r1, #9 - 2026 .LVL195: - 2027 03d8 8C46 mov ip, r1 - 2028 03da 6344 add r3, r3, ip - 2029 03dc 9846 mov r8, r3 - 2030 .LVL196: - 2031 03de A35C ldrb r3, [r4, r2] - 2032 .LVL197: -1000:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2033 .loc 1 1000 0 - 2034 03e0 4246 mov r2, r8 - 2035 03e2 B61A subs r6, r6, r2 - 2036 03e4 F6B2 uxtb r6, r6 - 2037 03e6 043E subs r6, r6, #4 - 2038 03e8 F6B2 uxtb r6, r6 - 2039 .LVL198: -1002:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2040 .loc 1 1002 0 - 2041 03ea 794A ldr r2, .L128+12 - 2042 03ec D370 strb r3, [r2, #3] -1004:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2043 .loc 1 1004 0 - 2044 03ee 002B cmp r3, #0 - 2045 03f0 00D0 beq .LCB2004 - 2046 03f2 94E0 b .L94 @long jump - 2047 .LCB2004: -1007:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2048 .loc 1 1007 0 - 2049 03f4 5B46 mov r3, fp - 2050 .LVL199: - 2051 03f6 1B07 lsls r3, r3, #28 - 2052 03f8 7DD0 beq .L119 -1022:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2053 .loc 1 1022 0 - 2054 03fa 049F ldr r7, [sp, #16] - ARM GAS /tmp/ccrFaSdZ.s page 78 - - - 2055 .LVL200: - 2056 .L95: -1084:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsIndSkip = skipIndication; - 2057 .loc 1 1084 0 - 2058 03fc 7B49 ldr r1, .L128+40 - 2059 03fe 0B78 ldrb r3, [r1] -1085:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2060 .loc 1 1085 0 - 2061 0400 0122 movs r2, #1 - 2062 0402 3A40 ands r2, r7 - 2063 0404 9200 lsls r2, r2, #2 - 2064 0406 0227 movs r7, #2 - 2065 0408 1F43 orrs r7, r3 - 2066 040a 0423 movs r3, #4 - 2067 040c 9F43 bics r7, r3 - 2068 040e 1743 orrs r7, r2 - 2069 0410 0F70 strb r7, [r1] -1095:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_PROPRIETARY: - 2070 .loc 1 1095 0 - 2071 0412 38E6 b .L72 - 2072 .LVL201: - 2073 .L113: - 856:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 2074 .loc 1 856 0 - 2075 0414 6E4B ldr r3, .L128+12 - 2076 0416 0B22 movs r2, #11 - 2077 0418 5A70 strb r2, [r3, #1] - 857:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 2078 .loc 1 857 0 - 2079 041a FFF7FEFF bl PrepareRxDoneAbort - 2080 .LVL202: - 858:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2081 .loc 1 858 0 - 2082 041e 3FE6 b .L62 - 2083 .LVL203: - 2084 .L76: - 866:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2085 .loc 1 866 0 - 2086 0420 704B ldr r3, .L128+32 - 2087 0422 1B68 ldr r3, [r3] - 2088 0424 0493 str r3, [sp, #16] - 2089 .LVL204: - 863:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nwkSKey = LoRaMacNwkSKey; - 2090 .loc 1 863 0 - 2091 0426 0023 movs r3, #0 - 2092 .LVL205: - 2093 0428 0593 str r3, [sp, #20] - 865:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** downLinkCounter = DownLinkCounter; - 2094 .loc 1 865 0 - 2095 042a 664B ldr r3, .L128 - 2096 042c 0A93 str r3, [sp, #40] - 864:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** appSKey = LoRaMacAppSKey; - 2097 .loc 1 864 0 - 2098 042e 664B ldr r3, .L128+4 - 2099 0430 0693 str r3, [sp, #24] - 723:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t *nwkSKey = LoRaMacNwkSKey; - 2100 .loc 1 723 0 - ARM GAS /tmp/ccrFaSdZ.s page 79 - - - 2101 0432 0027 movs r7, #0 - 2102 0434 4BE7 b .L81 - 2103 .LVL206: - 2104 .L82: - 2105 .LBB61: - 896:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacComputeMic( payload, size - LORAMAC_MFR_LEN, nwkSKey, address, DOWN_LINK - 2106 .loc 1 896 0 - 2107 0436 049A ldr r2, [sp, #16] - 2108 .LVL207: - 2109 0438 9446 mov ip, r2 - 2110 043a 6344 add r3, r3, ip - 2111 .LVL208: - 2112 043c 8021 movs r1, #128 - 2113 .LVL209: - 2114 043e 4902 lsls r1, r1, #9 - 2115 0440 8A46 mov r10, r1 - 2116 0442 9A44 add r10, r10, r3 - 2117 .LVL210: - 897:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( micRx == mic ) - 2118 .loc 1 897 0 - 2119 0444 311F subs r1, r6, #4 - 2120 0446 89B2 uxth r1, r1 - 2121 0448 0CAB add r3, sp, #48 - 2122 044a 0293 str r3, [sp, #8] - 2123 .LVL211: - 2124 044c 5346 mov r3, r10 - 2125 044e 0193 str r3, [sp, #4] - 2126 0450 0123 movs r3, #1 - 2127 0452 0093 str r3, [sp] - 2128 0454 4B46 mov r3, r9 - 2129 0456 069A ldr r2, [sp, #24] - 2130 0458 2000 movs r0, r4 - 2131 045a FFF7FEFF bl LoRaMacComputeMic - 2132 .LVL212: - 898:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2133 .loc 1 898 0 - 2134 045e 0C9B ldr r3, [sp, #48] - 2135 0460 0899 ldr r1, [sp, #32] - 2136 0462 8B42 cmp r3, r1 - 2137 0464 07D0 beq .L101 - 2138 0466 049A ldr r2, [sp, #16] - 2139 0468 9246 mov r10, r2 - 2140 .LVL213: - 2141 .LBE61: - 729:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2142 .loc 1 729 0 - 2143 046a 0023 movs r3, #0 - 2144 046c 0493 str r3, [sp, #16] - 2145 .LVL214: - 2146 046e 6AE7 b .L83 - 2147 .LVL215: - 2148 .L100: - 890:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2149 .loc 1 890 0 - 2150 0470 0123 movs r3, #1 - 2151 0472 0493 str r3, [sp, #16] - 2152 .LVL216: - ARM GAS /tmp/ccrFaSdZ.s page 80 - - - 2153 0474 67E7 b .L83 - 2154 .LVL217: - 2155 .L101: - 2156 .LBB62: - 900:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** downLinkCounter = downLinkCounterTmp; - 2157 .loc 1 900 0 - 2158 0476 0123 movs r3, #1 - 2159 0478 0493 str r3, [sp, #16] - 2160 .LVL218: - 2161 047a 64E7 b .L83 - 2162 .LVL219: - 2163 .L114: - 2164 .LBE62: - 910:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = downLinkCounter; - 2165 .loc 1 910 0 - 2166 047c 544B ldr r3, .L128+12 - 2167 047e 0A22 movs r2, #10 - 2168 0480 5A70 strb r2, [r3, #1] - 911:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 2169 .loc 1 911 0 - 2170 0482 5246 mov r2, r10 - 2171 0484 5A61 str r2, [r3, #20] - 912:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 2172 .loc 1 912 0 - 2173 0486 FFF7FEFF bl PrepareRxDoneAbort - 2174 .LVL220: - 913:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2175 .loc 1 913 0 - 2176 048a 09E6 b .L62 - 2177 .LVL221: - 2178 .L115: - 933:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2179 .loc 1 933 0 - 2180 048c 504B ldr r3, .L128+12 - 2181 048e 0222 movs r2, #2 - 2182 0490 1A70 strb r2, [r3] - 935:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( curMulticastParams->DownLinkCounter != 0 ) ) - 2183 .loc 1 935 0 - 2184 0492 7B6A ldr r3, [r7, #36] - 2185 0494 5345 cmp r3, r10 - 2186 0496 03D0 beq .L120 - 2187 .L87: - 943:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2188 .loc 1 943 0 - 2189 0498 5346 mov r3, r10 - 2190 049a 7B62 str r3, [r7, #36] - 708:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2191 .loc 1 708 0 - 2192 049c 0027 movs r7, #0 - 2193 .LVL222: - 2194 049e 8BE7 b .L88 - 2195 .LVL223: - 2196 .L120: - 935:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( curMulticastParams->DownLinkCounter != 0 ) ) - 2197 .loc 1 935 0 discriminator 1 - 2198 04a0 002B cmp r3, #0 - 2199 04a2 F9D0 beq .L87 - ARM GAS /tmp/ccrFaSdZ.s page 81 - - - 938:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = downLinkCounter; - 2200 .loc 1 938 0 - 2201 04a4 4A4B ldr r3, .L128+12 - 2202 04a6 0632 adds r2, r2, #6 - 2203 04a8 5A70 strb r2, [r3, #1] - 940:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 2204 .loc 1 940 0 - 2205 04aa FFF7FEFF bl PrepareRxDoneAbort - 2206 .LVL224: - 941:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2207 .loc 1 941 0 - 2208 04ae F7E5 b .L62 - 2209 .LVL225: - 2210 .L116: - 949:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.McpsIndication = MCPS_CONFIRMED; - 2211 .loc 1 949 0 - 2212 04b0 9F3B subs r3, r3, #159 - 2213 04b2 4B4A ldr r2, .L128+28 - 2214 04b4 1370 strb r3, [r2] - 950:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2215 .loc 1 950 0 - 2216 04b6 464A ldr r2, .L128+12 - 2217 04b8 1370 strb r3, [r2] - 952:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( DownLinkCounter != 0 ) ) - 2218 .loc 1 952 0 - 2219 04ba 4A4B ldr r3, .L128+32 - 2220 04bc 1B68 ldr r3, [r3] - 2221 04be 5345 cmp r3, r10 - 2222 04c0 01D0 beq .L121 - 708:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2223 .loc 1 708 0 - 2224 04c2 0027 movs r7, #0 - 2225 .LVL226: - 2226 04c4 75E7 b .L90 - 2227 .LVL227: - 2228 .L121: - 952:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( DownLinkCounter != 0 ) ) - 2229 .loc 1 952 0 discriminator 1 - 2230 04c6 002B cmp r3, #0 - 2231 04c8 0BD1 bne .L103 - 708:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2232 .loc 1 708 0 - 2233 04ca 0027 movs r7, #0 - 2234 .LVL228: - 2235 04cc 71E7 b .L90 - 2236 .LVL229: - 2237 .L117: - 968:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( DownLinkCounter != 0 ) ) - 2238 .loc 1 968 0 discriminator 1 - 2239 04ce 002B cmp r3, #0 - 2240 04d0 01D1 bne .L122 - 708:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2241 .loc 1 708 0 - 2242 04d2 0027 movs r7, #0 - 2243 .LVL230: - 2244 04d4 6DE7 b .L90 - 2245 .LVL231: - ARM GAS /tmp/ccrFaSdZ.s page 82 - - - 2246 .L122: - 971:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.DownLinkCounter = downLinkCounter; - 2247 .loc 1 971 0 - 2248 04d6 1300 movs r3, r2 - 2249 04d8 0822 movs r2, #8 - 2250 04da 5A70 strb r2, [r3, #1] - 973:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 2251 .loc 1 973 0 - 2252 04dc FFF7FEFF bl PrepareRxDoneAbort - 2253 .LVL232: - 974:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2254 .loc 1 974 0 - 2255 04e0 DEE5 b .L62 - 2256 .LVL233: - 2257 .L103: - 960:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2258 .loc 1 960 0 - 2259 04e2 049F ldr r7, [sp, #16] - 2260 .LVL234: - 2261 04e4 65E7 b .L90 - 2262 .LVL235: - 2263 .L118: - 986:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Reset MacCommandsBufferIndex when we have received an ACK. - 2264 .loc 1 986 0 - 2265 04e6 5B46 mov r3, fp - 2266 04e8 9B06 lsls r3, r3, #26 - 2267 04ea 00D4 bmi .LCB2283 - 2268 04ec 6CE7 b .L92 @long jump - 2269 .LCB2283: - 988:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2270 .loc 1 988 0 - 2271 04ee 3E4B ldr r3, .L128+36 - 2272 04f0 0022 movs r2, #0 - 2273 04f2 1A70 strb r2, [r3] - 2274 04f4 68E7 b .L92 - 2275 .LVL236: - 2276 .L119: -1009:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** frameLen, - 2277 .loc 1 1009 0 - 2278 04f6 2000 movs r0, r4 - 2279 04f8 4044 add r0, r0, r8 - 2280 04fa B1B2 uxth r1, r6 - 2281 04fc 3C4C ldr r4, .L128+44 - 2282 .LVL237: - 2283 04fe 0294 str r4, [sp, #8] - 2284 0500 5346 mov r3, r10 - 2285 0502 0193 str r3, [sp, #4] - 2286 0504 0123 movs r3, #1 - 2287 0506 0093 str r3, [sp] - 2288 0508 4B46 mov r3, r9 - 2289 050a 069A ldr r2, [sp, #24] - 2290 050c FFF7FEFF bl LoRaMacPayloadDecrypt - 2291 .LVL238: -1018:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2292 .loc 1 1018 0 - 2293 0510 2B00 movs r3, r5 - 2294 0512 3200 movs r2, r6 - ARM GAS /tmp/ccrFaSdZ.s page 83 - - - 2295 0514 0021 movs r1, #0 - 2296 0516 2000 movs r0, r4 - 2297 0518 FFF7FEFF bl ProcessMacCommands - 2298 .LVL239: - 2299 051c 22E0 b .L96 - 2300 .LVL240: - 2301 .L94: -1027:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2302 .loc 1 1027 0 - 2303 051e 5B46 mov r3, fp - 2304 .LVL241: - 2305 0520 1B07 lsls r3, r3, #28 - 2306 0522 15D1 bne .L123 - 2307 .LVL242: - 2308 .L97: -1033:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** frameLen, - 2309 .loc 1 1033 0 - 2310 0524 2000 movs r0, r4 - 2311 0526 4044 add r0, r0, r8 - 2312 0528 B1B2 uxth r1, r6 - 2313 052a 314B ldr r3, .L128+44 - 2314 052c 0293 str r3, [sp, #8] - 2315 052e 5346 mov r3, r10 - 2316 0530 0193 str r3, [sp, #4] - 2317 0532 0123 movs r3, #1 - 2318 0534 0093 str r3, [sp] - 2319 0536 4B46 mov r3, r9 - 2320 0538 0A9A ldr r2, [sp, #40] - 2321 053a FFF7FEFF bl LoRaMacPayloadDecrypt - 2322 .LVL243: -1041:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2323 .loc 1 1041 0 - 2324 053e 002F cmp r7, #0 - 2325 0540 10D1 bne .L96 -1043:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.BufferSize = frameLen; - 2326 .loc 1 1043 0 - 2327 0542 234B ldr r3, .L128+12 - 2328 0544 2A4A ldr r2, .L128+44 - 2329 0546 9A60 str r2, [r3, #8] -1044:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.RxData = true; - 2330 .loc 1 1044 0 - 2331 0548 1E73 strb r6, [r3, #12] -1045:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2332 .loc 1 1045 0 - 2333 054a 0122 movs r2, #1 - 2334 054c 5A73 strb r2, [r3, #13] - 2335 054e 09E0 b .L96 - 2336 .LVL244: - 2337 .L123: -1030:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2338 .loc 1 1030 0 - 2339 0550 2B00 movs r3, r5 - 2340 0552 099A ldr r2, [sp, #36] - 2341 0554 0821 movs r1, #8 - 2342 0556 2000 movs r0, r4 - 2343 0558 FFF7FEFF bl ProcessMacCommands - 2344 .LVL245: - ARM GAS /tmp/ccrFaSdZ.s page 84 - - - 2345 055c E2E7 b .L97 - 2346 .LVL246: - 2347 .L93: -1051:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2348 .loc 1 1051 0 - 2349 055e 5B46 mov r3, fp - 2350 0560 1B07 lsls r3, r3, #28 - 2351 0562 13D1 bne .L124 - 2352 .LVL247: - 2353 .L96: -1058:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2354 .loc 1 1058 0 - 2355 0564 002F cmp r7, #0 - 2356 0566 00D0 beq .LCB2397 - 2357 0568 48E7 b .L95 @long jump - 2358 .LCB2397: -1061:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2359 .loc 1 1061 0 - 2360 056a 5B46 mov r3, fp - 2361 056c 9B06 lsls r3, r3, #26 - 2362 056e 14D4 bmi .L125 -1072:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2363 .loc 1 1072 0 - 2364 0570 184B ldr r3, .L128+16 - 2365 0572 0022 movs r2, #0 - 2366 0574 1A71 strb r2, [r3, #4] -1074:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2367 .loc 1 1074 0 - 2368 0576 1F4B ldr r3, .L128+48 - 2369 0578 1A78 ldrb r2, [r3] - 2370 057a 1F4B ldr r3, .L128+52 - 2371 057c 1B78 ldrb r3, [r3] - 2372 057e 9A42 cmp r2, r3 - 2373 0580 00D8 bhi .LCB2412 - 2374 0582 3BE7 b .L95 @long jump - 2375 .LCB2412: -1078:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2376 .loc 1 1078 0 - 2377 0584 1D48 ldr r0, .L128+56 - 2378 0586 FFF7FEFF bl TimerStop - 2379 .LVL248: - 2380 058a 37E7 b .L95 - 2381 .LVL249: - 2382 .L124: -1054:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2383 .loc 1 1054 0 - 2384 058c 2B00 movs r3, r5 - 2385 058e 099A ldr r2, [sp, #36] - 2386 0590 0821 movs r1, #8 - 2387 .LVL250: - 2388 0592 2000 movs r0, r4 - 2389 0594 FFF7FEFF bl ProcessMacCommands - 2390 .LVL251: - 2391 0598 E4E7 b .L96 - 2392 .LVL252: - 2393 .L125: -1063:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsIndication.AckReceived = true; - ARM GAS /tmp/ccrFaSdZ.s page 85 - - - 2394 .loc 1 1063 0 - 2395 059a 0123 movs r3, #1 - 2396 059c 0D4A ldr r2, .L128+16 - 2397 059e 1371 strb r3, [r2, #4] -1064:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2398 .loc 1 1064 0 - 2399 05a0 0B4A ldr r2, .L128+12 - 2400 05a2 9374 strb r3, [r2, #18] -1068:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2401 .loc 1 1068 0 - 2402 05a4 1548 ldr r0, .L128+56 - 2403 05a6 FFF7FEFF bl TimerStop - 2404 .LVL253: - 2405 05aa 27E7 b .L95 - 2406 .LVL254: - 2407 .L85: -1089:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2408 .loc 1 1089 0 - 2409 05ac 084B ldr r3, .L128+12 - 2410 05ae 0C22 movs r2, #12 - 2411 05b0 5A70 strb r2, [r3, #1] -1091:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return; - 2412 .loc 1 1091 0 - 2413 05b2 FFF7FEFF bl PrepareRxDoneAbort - 2414 .LVL255: -1092:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2415 .loc 1 1092 0 - 2416 05b6 73E5 b .L62 - 2417 .LVL256: - 2418 .L63: -1109:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PrepareRxDoneAbort( ); - 2419 .loc 1 1109 0 - 2420 05b8 054B ldr r3, .L128+12 - 2421 05ba 0122 movs r2, #1 - 2422 05bc 5A70 strb r2, [r3, #1] -1110:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 2423 .loc 1 1110 0 - 2424 05be FFF7FEFF bl PrepareRxDoneAbort - 2425 .LVL257: -1111:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2426 .loc 1 1111 0 - 2427 05c2 60E5 b .L72 - 2428 .L129: - 2429 .align 2 - 2430 .L128: - 2431 05c4 00000000 .word .LANCHOR32 - 2432 05c8 00000000 .word .LANCHOR33 - 2433 05cc 00000000 .word .LANCHOR22 - 2434 05d0 00000000 .word .LANCHOR35 - 2435 05d4 00000000 .word .LANCHOR34 - 2436 05d8 00000000 .word .LANCHOR3 - 2437 05dc 00000000 .word .LANCHOR11 - 2438 05e0 00000000 .word .LANCHOR16 - 2439 05e4 00000000 .word .LANCHOR2 - 2440 05e8 00000000 .word .LANCHOR10 - 2441 05ec 00000000 .word .LANCHOR26 - 2442 05f0 00000000 .word LoRaMacRxPayload - ARM GAS /tmp/ccrFaSdZ.s page 86 - - - 2443 05f4 00000000 .word .LANCHOR6 - 2444 05f8 00000000 .word .LANCHOR5 - 2445 05fc 00000000 .word .LANCHOR23 - 2446 .cfi_endproc - 2447 .LFE87: - 2449 .section .text.OnRxWindow2TimerEvent,"ax",%progbits - 2450 .align 1 - 2451 .syntax unified - 2452 .code 16 - 2453 .thumb_func - 2454 .fpu softvfp - 2456 OnRxWindow2TimerEvent: - 2457 .LFB94: -1466:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &RxWindowTimer2 ); - 2458 .loc 1 1466 0 - 2459 .cfi_startproc - 2460 @ args = 0, pretend = 0, frame = 0 - 2461 @ frame_needed = 0, uses_anonymous_args = 0 - 2462 0000 10B5 push {r4, lr} - 2463 .LCFI11: - 2464 .cfi_def_cfa_offset 8 - 2465 .cfi_offset 4, -8 - 2466 .cfi_offset 14, -4 -1467:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2467 .loc 1 1467 0 - 2468 0002 1C48 ldr r0, .L136 - 2469 0004 FFF7FEFF bl TimerStop - 2470 .LVL258: -1469:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.Frequency = LoRaMacParams.Rx2Channel.Frequency; - 2471 .loc 1 1469 0 - 2472 0008 1B4B ldr r3, .L136+4 - 2473 000a 1C4A ldr r2, .L136+8 - 2474 000c 1278 ldrb r2, [r2] - 2475 000e 1A70 strb r2, [r3] -1470:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.DownlinkDwellTime = LoRaMacParams.DownlinkDwellTime; - 2476 .loc 1 1470 0 - 2477 0010 1B4A ldr r2, .L136+12 - 2478 0012 516A ldr r1, [r2, #36] - 2479 0014 5960 str r1, [r3, #4] -1471:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.RepeaterSupport = RepeaterSupport; - 2480 .loc 1 1471 0 - 2481 0016 2D21 movs r1, #45 - 2482 0018 525C ldrb r2, [r2, r1] - 2483 001a 1A74 strb r2, [r3, #16] -1472:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.Window = 1; - 2484 .loc 1 1472 0 - 2485 001c 194A ldr r2, .L136+16 - 2486 001e 1278 ldrb r2, [r2] - 2487 0020 5A74 strb r2, [r3, #17] -1473:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2488 .loc 1 1473 0 - 2489 0022 0122 movs r2, #1 - 2490 0024 DA74 strb r2, [r3, #19] -1475:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2491 .loc 1 1475 0 - 2492 0026 184B ldr r3, .L136+20 - 2493 0028 1B78 ldrb r3, [r3] - ARM GAS /tmp/ccrFaSdZ.s page 87 - - - 2494 002a 022B cmp r3, #2 - 2495 002c 19D0 beq .L131 -1477:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2496 .loc 1 1477 0 - 2497 002e 124B ldr r3, .L136+4 - 2498 0030 0022 movs r2, #0 - 2499 0032 9A74 strb r2, [r3, #18] - 2500 .L132: -1484:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2501 .loc 1 1484 0 - 2502 0034 154A ldr r2, .L136+24 - 2503 0036 164B ldr r3, .L136+28 - 2504 0038 1878 ldrb r0, [r3] - 2505 003a 0432 adds r2, r2, #4 - 2506 003c 0E49 ldr r1, .L136+4 - 2507 003e FFF7FEFF bl RegionRxConfig - 2508 .LVL259: - 2509 0042 0028 cmp r0, #0 - 2510 0044 0CD0 beq .L130 -1486:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxSlot = RxWindow2Config.Window; - 2511 .loc 1 1486 0 - 2512 0046 0C4B ldr r3, .L136+4 - 2513 0048 9B7C ldrb r3, [r3, #18] - 2514 004a 0D4A ldr r2, .L136+12 - 2515 004c D068 ldr r0, [r2, #12] - 2516 .LVL260: - 2517 .LBB63: - 2518 .LBB64: -1508:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2519 .loc 1 1508 0 - 2520 004e 002B cmp r3, #0 - 2521 0050 0BD1 bne .L134 -1510:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2522 .loc 1 1510 0 - 2523 0052 104B ldr r3, .L136+32 - 2524 .LVL261: - 2525 0054 DB6B ldr r3, [r3, #60] - 2526 0056 9847 blx r3 - 2527 .LVL262: - 2528 .L135: - 2529 .LBE64: - 2530 .LBE63: -1487:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2531 .loc 1 1487 0 - 2532 0058 074B ldr r3, .L136+4 - 2533 005a DA7C ldrb r2, [r3, #19] - 2534 005c 0E4B ldr r3, .L136+36 - 2535 005e 1A70 strb r2, [r3] - 2536 .L130: -1489:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2537 .loc 1 1489 0 - 2538 @ sp needed - 2539 0060 10BD pop {r4, pc} - 2540 .L131: -1481:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2541 .loc 1 1481 0 - 2542 0062 054B ldr r3, .L136+4 - ARM GAS /tmp/ccrFaSdZ.s page 88 - - - 2543 0064 0122 movs r2, #1 - 2544 0066 9A74 strb r2, [r3, #18] - 2545 0068 E4E7 b .L132 - 2546 .LVL263: - 2547 .L134: - 2548 .LBB66: - 2549 .LBB65: -1514:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2550 .loc 1 1514 0 - 2551 006a 0A4B ldr r3, .L136+32 - 2552 .LVL264: - 2553 006c DB6B ldr r3, [r3, #60] - 2554 006e 0020 movs r0, #0 - 2555 .LVL265: - 2556 0070 9847 blx r3 - 2557 .LVL266: - 2558 0072 F1E7 b .L135 - 2559 .L137: - 2560 .align 2 - 2561 .L136: - 2562 0074 00000000 .word .LANCHOR37 - 2563 0078 00000000 .word .LANCHOR42 - 2564 007c 00000000 .word .LANCHOR19 - 2565 0080 00000000 .word .LANCHOR14 - 2566 0084 00000000 .word .LANCHOR21 - 2567 0088 00000000 .word .LANCHOR25 - 2568 008c 00000000 .word .LANCHOR35 - 2569 0090 00000000 .word .LANCHOR22 - 2570 0094 00000000 .word Radio - 2571 0098 00000000 .word .LANCHOR36 - 2572 .LBE65: - 2573 .LBE66: - 2574 .cfi_endproc - 2575 .LFE94: - 2577 .section .text.OnRadioRxTimeout,"ax",%progbits - 2578 .align 1 - 2579 .syntax unified - 2580 .code 16 - 2581 .thumb_func - 2582 .fpu softvfp - 2584 OnRadioRxTimeout: - 2585 .LFB90: -1172:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) - 2586 .loc 1 1172 0 - 2587 .cfi_startproc - 2588 @ args = 0, pretend = 0, frame = 0 - 2589 @ frame_needed = 0, uses_anonymous_args = 0 - 2590 0000 10B5 push {r4, lr} - 2591 .LCFI12: - 2592 .cfi_def_cfa_offset 8 - 2593 .cfi_offset 4, -8 - 2594 .cfi_offset 14, -4 -1173:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2595 .loc 1 1173 0 - 2596 0002 1D4B ldr r3, .L145 - 2597 0004 1B78 ldrb r3, [r3] - 2598 0006 022B cmp r3, #2 - ARM GAS /tmp/ccrFaSdZ.s page 89 - - - 2599 0008 1ED0 beq .L139 -1175:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2600 .loc 1 1175 0 - 2601 000a 1C4B ldr r3, .L145+4 - 2602 000c 5B6B ldr r3, [r3, #52] - 2603 000e 9847 blx r3 - 2604 .LVL267: - 2605 .L140: -1182:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2606 .loc 1 1182 0 - 2607 0010 1B4B ldr r3, .L145+8 - 2608 0012 1B78 ldrb r3, [r3] - 2609 0014 002B cmp r3, #0 - 2610 0016 1AD1 bne .L141 -1184:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2611 .loc 1 1184 0 - 2612 0018 1A4B ldr r3, .L145+12 - 2613 001a 1B78 ldrb r3, [r3] - 2614 001c 002B cmp r3, #0 - 2615 001e 02D0 beq .L142 -1186:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2616 .loc 1 1186 0 - 2617 0020 194B ldr r3, .L145+16 - 2618 0022 0322 movs r2, #3 - 2619 0024 5A70 strb r2, [r3, #1] - 2620 .L142: -1188:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2621 .loc 1 1188 0 - 2622 0026 194B ldr r3, .L145+20 - 2623 0028 0322 movs r2, #3 - 2624 002a 5A70 strb r2, [r3, #1] -1190:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2625 .loc 1 1190 0 - 2626 002c 184B ldr r3, .L145+24 - 2627 002e 1868 ldr r0, [r3] - 2628 0030 FFF7FEFF bl TimerGetElapsedTime - 2629 .LVL268: - 2630 0034 174B ldr r3, .L145+28 - 2631 0036 1B68 ldr r3, [r3] - 2632 0038 9842 cmp r0, r3 - 2633 003a 1BD3 bcc .L138 -1192:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2634 .loc 1 1192 0 - 2635 003c 164A ldr r2, .L145+32 - 2636 003e 1378 ldrb r3, [r2] - 2637 0040 1021 movs r1, #16 - 2638 0042 0B43 orrs r3, r1 - 2639 0044 1370 strb r3, [r2] - 2640 0046 15E0 b .L138 - 2641 .L139: -1179:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2642 .loc 1 1179 0 - 2643 0048 FFF7FEFF bl OnRxWindow2TimerEvent - 2644 .LVL269: - 2645 004c E0E7 b .L140 - 2646 .L141: -1197:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - ARM GAS /tmp/ccrFaSdZ.s page 90 - - - 2647 .loc 1 1197 0 - 2648 004e 0D4B ldr r3, .L145+12 - 2649 0050 1B78 ldrb r3, [r3] - 2650 0052 002B cmp r3, #0 - 2651 0054 02D0 beq .L144 -1199:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2652 .loc 1 1199 0 - 2653 0056 0C4B ldr r3, .L145+16 - 2654 0058 0422 movs r2, #4 - 2655 005a 5A70 strb r2, [r3, #1] - 2656 .L144: -1201:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2657 .loc 1 1201 0 - 2658 005c 0B4B ldr r3, .L145+20 - 2659 005e 0422 movs r2, #4 - 2660 0060 5A70 strb r2, [r3, #1] -1203:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2661 .loc 1 1203 0 - 2662 0062 054B ldr r3, .L145 - 2663 0064 1B78 ldrb r3, [r3] - 2664 0066 022B cmp r3, #2 - 2665 0068 04D0 beq .L138 -1205:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2666 .loc 1 1205 0 - 2667 006a 0B4A ldr r2, .L145+32 - 2668 006c 1378 ldrb r3, [r2] - 2669 006e 1021 movs r1, #16 - 2670 0070 0B43 orrs r3, r1 - 2671 0072 1370 strb r3, [r2] - 2672 .L138: -1208:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2673 .loc 1 1208 0 - 2674 @ sp needed - 2675 0074 10BD pop {r4, pc} - 2676 .L146: - 2677 0076 C046 .align 2 - 2678 .L145: - 2679 0078 00000000 .word .LANCHOR25 - 2680 007c 00000000 .word Radio - 2681 0080 00000000 .word .LANCHOR36 - 2682 0084 00000000 .word .LANCHOR15 - 2683 0088 00000000 .word .LANCHOR34 - 2684 008c 00000000 .word .LANCHOR28 - 2685 0090 00000000 .word .LANCHOR43 - 2686 0094 00000000 .word .LANCHOR44 - 2687 0098 00000000 .word .LANCHOR26 - 2688 .cfi_endproc - 2689 .LFE90: - 2691 .section .text.OnRadioTxTimeout,"ax",%progbits - 2692 .align 1 - 2693 .syntax unified - 2694 .code 16 - 2695 .thumb_func - 2696 .fpu softvfp - 2698 OnRadioTxTimeout: - 2699 .LFB88: -1121:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) - ARM GAS /tmp/ccrFaSdZ.s page 91 - - - 2700 .loc 1 1121 0 - 2701 .cfi_startproc - 2702 @ args = 0, pretend = 0, frame = 0 - 2703 @ frame_needed = 0, uses_anonymous_args = 0 - 2704 0000 10B5 push {r4, lr} - 2705 .LCFI13: - 2706 .cfi_def_cfa_offset 8 - 2707 .cfi_offset 4, -8 - 2708 .cfi_offset 14, -4 -1122:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2709 .loc 1 1122 0 - 2710 0002 0A4B ldr r3, .L150 - 2711 0004 1B78 ldrb r3, [r3] - 2712 0006 022B cmp r3, #2 - 2713 0008 0DD0 beq .L148 -1124:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2714 .loc 1 1124 0 - 2715 000a 094B ldr r3, .L150+4 - 2716 000c 5B6B ldr r3, [r3, #52] - 2717 000e 9847 blx r3 - 2718 .LVL270: - 2719 .L149: -1131:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_TX_TIMEOUT; - 2720 .loc 1 1131 0 - 2721 0010 0223 movs r3, #2 - 2722 0012 084A ldr r2, .L150+8 - 2723 0014 5370 strb r3, [r2, #1] -1132:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; - 2724 .loc 1 1132 0 - 2725 0016 084A ldr r2, .L150+12 - 2726 0018 5370 strb r3, [r2, #1] -1133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2727 .loc 1 1133 0 - 2728 001a 084A ldr r2, .L150+16 - 2729 001c 1378 ldrb r3, [r2] - 2730 001e 1021 movs r1, #16 - 2731 0020 0B43 orrs r3, r1 - 2732 0022 1370 strb r3, [r2] -1134:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2733 .loc 1 1134 0 - 2734 @ sp needed - 2735 0024 10BD pop {r4, pc} - 2736 .L148: -1128:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2737 .loc 1 1128 0 - 2738 0026 FFF7FEFF bl OnRxWindow2TimerEvent - 2739 .LVL271: - 2740 002a F1E7 b .L149 - 2741 .L151: - 2742 .align 2 - 2743 .L150: - 2744 002c 00000000 .word .LANCHOR25 - 2745 0030 00000000 .word Radio - 2746 0034 00000000 .word .LANCHOR34 - 2747 0038 00000000 .word .LANCHOR28 - 2748 003c 00000000 .word .LANCHOR26 - 2749 .cfi_endproc - ARM GAS /tmp/ccrFaSdZ.s page 92 - - - 2750 .LFE88: - 2752 .section .text.OnRadioRxError,"ax",%progbits - 2753 .align 1 - 2754 .syntax unified - 2755 .code 16 - 2756 .thumb_func - 2757 .fpu softvfp - 2759 OnRadioRxError: - 2760 .LFB89: -1137:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) - 2761 .loc 1 1137 0 - 2762 .cfi_startproc - 2763 @ args = 0, pretend = 0, frame = 0 - 2764 @ frame_needed = 0, uses_anonymous_args = 0 - 2765 0000 10B5 push {r4, lr} - 2766 .LCFI14: - 2767 .cfi_def_cfa_offset 8 - 2768 .cfi_offset 4, -8 - 2769 .cfi_offset 14, -4 -1138:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2770 .loc 1 1138 0 - 2771 0002 1B4B ldr r3, .L159 - 2772 0004 1B78 ldrb r3, [r3] - 2773 0006 022B cmp r3, #2 - 2774 0008 1ED0 beq .L153 -1140:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2775 .loc 1 1140 0 - 2776 000a 1A4B ldr r3, .L159+4 - 2777 000c 5B6B ldr r3, [r3, #52] - 2778 000e 9847 blx r3 - 2779 .LVL272: - 2780 .L154: -1147:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2781 .loc 1 1147 0 - 2782 0010 194B ldr r3, .L159+8 - 2783 0012 1B78 ldrb r3, [r3] - 2784 0014 002B cmp r3, #0 - 2785 0016 1AD1 bne .L155 -1149:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2786 .loc 1 1149 0 - 2787 0018 184B ldr r3, .L159+12 - 2788 001a 1B78 ldrb r3, [r3] - 2789 001c 002B cmp r3, #0 - 2790 001e 02D0 beq .L156 -1151:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2791 .loc 1 1151 0 - 2792 0020 174B ldr r3, .L159+16 - 2793 0022 0522 movs r2, #5 - 2794 0024 5A70 strb r2, [r3, #1] - 2795 .L156: -1153:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2796 .loc 1 1153 0 - 2797 0026 174B ldr r3, .L159+20 - 2798 0028 0522 movs r2, #5 - 2799 002a 5A70 strb r2, [r3, #1] -1155:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2800 .loc 1 1155 0 - ARM GAS /tmp/ccrFaSdZ.s page 93 - - - 2801 002c 164B ldr r3, .L159+24 - 2802 002e 1868 ldr r0, [r3] - 2803 0030 FFF7FEFF bl TimerGetElapsedTime - 2804 .LVL273: - 2805 0034 154B ldr r3, .L159+28 - 2806 0036 1B68 ldr r3, [r3] - 2807 0038 9842 cmp r0, r3 - 2808 003a 17D3 bcc .L152 -1157:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2809 .loc 1 1157 0 - 2810 003c 144A ldr r2, .L159+32 - 2811 003e 1378 ldrb r3, [r2] - 2812 0040 1021 movs r1, #16 - 2813 0042 0B43 orrs r3, r1 - 2814 0044 1370 strb r3, [r2] - 2815 0046 11E0 b .L152 - 2816 .L153: -1144:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2817 .loc 1 1144 0 - 2818 0048 FFF7FEFF bl OnRxWindow2TimerEvent - 2819 .LVL274: - 2820 004c E0E7 b .L154 - 2821 .L155: -1162:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2822 .loc 1 1162 0 - 2823 004e 0B4B ldr r3, .L159+12 - 2824 0050 1B78 ldrb r3, [r3] - 2825 0052 002B cmp r3, #0 - 2826 0054 02D0 beq .L158 -1164:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2827 .loc 1 1164 0 - 2828 0056 0A4B ldr r3, .L159+16 - 2829 0058 0622 movs r2, #6 - 2830 005a 5A70 strb r2, [r3, #1] - 2831 .L158: -1166:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MacDone = 1; - 2832 .loc 1 1166 0 - 2833 005c 094B ldr r3, .L159+20 - 2834 005e 0622 movs r2, #6 - 2835 0060 5A70 strb r2, [r3, #1] -1167:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2836 .loc 1 1167 0 - 2837 0062 0B4A ldr r2, .L159+32 - 2838 0064 1378 ldrb r3, [r2] - 2839 0066 1021 movs r1, #16 - 2840 0068 0B43 orrs r3, r1 - 2841 006a 1370 strb r3, [r2] - 2842 .L152: -1169:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2843 .loc 1 1169 0 - 2844 @ sp needed - 2845 006c 10BD pop {r4, pc} - 2846 .L160: - 2847 006e C046 .align 2 - 2848 .L159: - 2849 0070 00000000 .word .LANCHOR25 - 2850 0074 00000000 .word Radio - ARM GAS /tmp/ccrFaSdZ.s page 94 - - - 2851 0078 00000000 .word .LANCHOR36 - 2852 007c 00000000 .word .LANCHOR15 - 2853 0080 00000000 .word .LANCHOR34 - 2854 0084 00000000 .word .LANCHOR28 - 2855 0088 00000000 .word .LANCHOR43 - 2856 008c 00000000 .word .LANCHOR44 - 2857 0090 00000000 .word .LANCHOR26 - 2858 .cfi_endproc - 2859 .LFE89: - 2861 .section .text.OnRadioTxDone,"ax",%progbits - 2862 .align 1 - 2863 .syntax unified - 2864 .code 16 - 2865 .thumb_func - 2866 .fpu softvfp - 2868 OnRadioTxDone: - 2869 .LFB85: - 612:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 2870 .loc 1 612 0 - 2871 .cfi_startproc - 2872 @ args = 0, pretend = 0, frame = 16 - 2873 @ frame_needed = 0, uses_anonymous_args = 0 - 2874 0000 30B5 push {r4, r5, lr} - 2875 .LCFI15: - 2876 .cfi_def_cfa_offset 12 - 2877 .cfi_offset 4, -12 - 2878 .cfi_offset 5, -8 - 2879 .cfi_offset 14, -4 - 2880 0002 85B0 sub sp, sp, #20 - 2881 .LCFI16: - 2882 .cfi_def_cfa_offset 32 - 616:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2883 .loc 1 616 0 - 2884 0004 FFF7FEFF bl TimerGetCurrentTime - 2885 .LVL275: - 2886 0008 0400 movs r4, r0 - 2887 .LVL276: - 618:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2888 .loc 1 618 0 - 2889 000a 3F4B ldr r3, .L174 - 2890 000c 1B78 ldrb r3, [r3] - 2891 000e 022B cmp r3, #2 - 2892 0010 25D0 beq .L162 - 620:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2893 .loc 1 620 0 - 2894 0012 3E4B ldr r3, .L174+4 - 2895 0014 5B6B ldr r3, [r3, #52] - 2896 0016 9847 blx r3 - 2897 .LVL277: - 2898 .L163: - 628:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2899 .loc 1 628 0 - 2900 0018 3D4B ldr r3, .L174+8 - 2901 001a 1B78 ldrb r3, [r3] - 2902 001c 002B cmp r3, #0 - 2903 001e 21D1 bne .L172 - 647:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_RX2_TIMEOUT; - ARM GAS /tmp/ccrFaSdZ.s page 95 - - - 2904 .loc 1 647 0 - 2905 0020 3C4B ldr r3, .L174+12 - 2906 0022 0022 movs r2, #0 - 2907 0024 5A70 strb r2, [r3, #1] - 648:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 2908 .loc 1 648 0 - 2909 0026 3C4B ldr r3, .L174+16 - 2910 0028 0432 adds r2, r2, #4 - 2911 002a 5A70 strb r2, [r3, #1] - 650:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2912 .loc 1 650 0 - 2913 002c 3B4B ldr r3, .L174+20 - 2914 002e 1B78 ldrb r3, [r3] - 2915 0030 002B cmp r3, #0 - 2916 0032 03D1 bne .L168 - 652:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2917 .loc 1 652 0 - 2918 0034 394A ldr r2, .L174+20 - 2919 0036 0121 movs r1, #1 - 2920 0038 0B43 orrs r3, r1 - 2921 003a 1370 strb r3, [r2] - 2922 .L168: - 654:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2923 .loc 1 654 0 - 2924 003c 374A ldr r2, .L174+20 - 2925 003e 1378 ldrb r3, [r2] - 2926 0040 1021 movs r1, #16 - 2927 0042 0B43 orrs r3, r1 - 2928 0044 1370 strb r3, [r2] - 2929 .L167: - 658:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2930 .loc 1 658 0 - 2931 0046 354B ldr r3, .L174+20 - 2932 0048 1B78 ldrb r3, [r3] - 2933 004a 1B07 lsls r3, r3, #28 - 2934 004c 3BD5 bpl .L169 - 658:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2935 .loc 1 658 0 is_stmt 0 discriminator 1 - 2936 004e 324B ldr r3, .L174+16 - 2937 0050 1B78 ldrb r3, [r3] - 2938 0052 002B cmp r3, #0 - 2939 0054 37D1 bne .L169 - 660:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2940 .loc 1 660 0 is_stmt 1 - 2941 0056 324B ldr r3, .L174+24 - 2942 0058 0122 movs r2, #1 - 2943 005a 1A70 strb r2, [r3] - 2944 005c 36E0 b .L170 - 2945 .LVL278: - 2946 .L162: - 624:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2947 .loc 1 624 0 - 2948 005e FFF7FEFF bl OnRxWindow2TimerEvent - 2949 .LVL279: - 2950 0062 D9E7 b .L163 - 2951 .L172: - 630:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &RxWindowTimer1 ); - ARM GAS /tmp/ccrFaSdZ.s page 96 - - - 2952 .loc 1 630 0 - 2953 0064 2F4B ldr r3, .L174+28 - 2954 0066 1968 ldr r1, [r3] - 2955 0068 2F4D ldr r5, .L174+32 - 2956 006a 2800 movs r0, r5 - 2957 006c FFF7FEFF bl TimerSetValue - 2958 .LVL280: - 631:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( LoRaMacDeviceClass != CLASS_C ) - 2959 .loc 1 631 0 - 2960 0070 2800 movs r0, r5 - 2961 0072 FFF7FEFF bl TimerStart - 2962 .LVL281: - 632:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2963 .loc 1 632 0 - 2964 0076 244B ldr r3, .L174 - 2965 0078 1B78 ldrb r3, [r3] - 2966 007a 022B cmp r3, #2 - 2967 007c 19D1 bne .L173 - 2968 .L165: - 637:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2969 .loc 1 637 0 - 2970 007e 224B ldr r3, .L174 - 2971 0080 1B78 ldrb r3, [r3] - 2972 0082 022B cmp r3, #2 - 2973 0084 03D0 beq .L166 - 637:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 2974 .loc 1 637 0 is_stmt 0 discriminator 1 - 2975 0086 294B ldr r3, .L174+36 - 2976 0088 1B78 ldrb r3, [r3] - 2977 008a 002B cmp r3, #0 - 2978 008c DBD0 beq .L167 - 2979 .L166: - 639:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 2980 .loc 1 639 0 is_stmt 1 - 2981 008e 03A9 add r1, sp, #12 - 2982 0090 1223 movs r3, #18 - 2983 0092 0B70 strb r3, [r1] - 640:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &AckTimeoutTimer, RxWindow2Delay + phyParam.Value ); - 2984 .loc 1 640 0 - 2985 0094 264B ldr r3, .L174+40 - 2986 0096 1878 ldrb r0, [r3] - 2987 0098 FFF7FEFF bl RegionGetPhyParam - 2988 .LVL282: - 641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &AckTimeoutTimer ); - 2989 .loc 1 641 0 - 2990 009c 254B ldr r3, .L174+44 - 2991 009e 1968 ldr r1, [r3] - 2992 .LVL283: - 2993 00a0 4118 adds r1, r0, r1 - 2994 00a2 254D ldr r5, .L174+48 - 2995 00a4 2800 movs r0, r5 - 2996 .LVL284: - 2997 00a6 FFF7FEFF bl TimerSetValue - 2998 .LVL285: - 642:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 2999 .loc 1 642 0 - 3000 00aa 2800 movs r0, r5 - ARM GAS /tmp/ccrFaSdZ.s page 97 - - - 3001 00ac FFF7FEFF bl TimerStart - 3002 .LVL286: - 3003 00b0 C9E7 b .L167 - 3004 .L173: - 634:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &RxWindowTimer2 ); - 3005 .loc 1 634 0 - 3006 00b2 204B ldr r3, .L174+44 - 3007 00b4 1968 ldr r1, [r3] - 3008 00b6 214D ldr r5, .L174+52 - 3009 00b8 2800 movs r0, r5 - 3010 00ba FFF7FEFF bl TimerSetValue - 3011 .LVL287: - 635:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3012 .loc 1 635 0 - 3013 00be 2800 movs r0, r5 - 3014 00c0 FFF7FEFF bl TimerStart - 3015 .LVL288: - 3016 00c4 DBE7 b .L165 - 3017 .L169: - 664:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3018 .loc 1 664 0 - 3019 00c6 164B ldr r3, .L174+24 - 3020 00c8 0022 movs r2, #0 - 3021 00ca 1A70 strb r2, [r3] - 3022 .L170: - 668:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update last tx done time for the current channel - 3023 .loc 1 668 0 - 3024 00cc 1C4B ldr r3, .L174+56 - 3025 00ce 1B78 ldrb r3, [r3] - 3026 00d0 1C4A ldr r2, .L174+60 - 3027 00d2 1370 strb r3, [r2] - 670:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txDone.Joined = IsLoRaMacNetworkJoined; - 3028 .loc 1 670 0 - 3029 00d4 01A9 add r1, sp, #4 - 3030 00d6 0B70 strb r3, [r1] - 671:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txDone.LastTxDoneTime = curTime; - 3031 .loc 1 671 0 - 3032 00d8 1B4B ldr r3, .L174+64 - 3033 00da 1B78 ldrb r3, [r3] - 3034 00dc 4B70 strb r3, [r1, #1] - 672:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionSetBandTxDone( LoRaMacRegion, &txDone ); - 3035 .loc 1 672 0 - 3036 00de 4C60 str r4, [r1, #4] - 673:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update Aggregated last tx done time - 3037 .loc 1 673 0 - 3038 00e0 134B ldr r3, .L174+40 - 3039 00e2 1878 ldrb r0, [r3] - 3040 00e4 FFF7FEFF bl RegionSetBandTxDone - 3041 .LVL289: - 675:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3042 .loc 1 675 0 - 3043 00e8 184B ldr r3, .L174+68 - 3044 00ea 1C60 str r4, [r3] - 677:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3045 .loc 1 677 0 - 3046 00ec 0F4B ldr r3, .L174+36 - 3047 00ee 1B78 ldrb r3, [r3] - ARM GAS /tmp/ccrFaSdZ.s page 98 - - - 3048 00f0 002B cmp r3, #0 - 3049 00f2 06D1 bne .L161 - 679:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChannelsNbRepCounter++; - 3050 .loc 1 679 0 - 3051 00f4 074B ldr r3, .L174+12 - 3052 00f6 0022 movs r2, #0 - 3053 00f8 5A70 strb r2, [r3, #1] - 680:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3054 .loc 1 680 0 - 3055 00fa 154A ldr r2, .L174+72 - 3056 00fc 1378 ldrb r3, [r2] - 3057 00fe 0133 adds r3, r3, #1 - 3058 0100 1370 strb r3, [r2] - 3059 .L161: - 682:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3060 .loc 1 682 0 - 3061 0102 05B0 add sp, sp, #20 - 3062 @ sp needed - 3063 .LVL290: - 3064 0104 30BD pop {r4, r5, pc} - 3065 .L175: - 3066 0106 C046 .align 2 - 3067 .L174: - 3068 0108 00000000 .word .LANCHOR25 - 3069 010c 00000000 .word Radio - 3070 0110 00000000 .word .LANCHOR12 - 3071 0114 00000000 .word .LANCHOR34 - 3072 0118 00000000 .word .LANCHOR28 - 3073 011c 00000000 .word .LANCHOR26 - 3074 0120 00000000 .word .LANCHOR47 - 3075 0124 00000000 .word .LANCHOR45 - 3076 0128 00000000 .word .LANCHOR46 - 3077 012c 00000000 .word .LANCHOR15 - 3078 0130 00000000 .word .LANCHOR22 - 3079 0134 00000000 .word .LANCHOR44 - 3080 0138 00000000 .word .LANCHOR23 - 3081 013c 00000000 .word .LANCHOR37 - 3082 0140 00000000 .word .LANCHOR19 - 3083 0144 00000000 .word .LANCHOR20 - 3084 0148 00000000 .word .LANCHOR0 - 3085 014c 00000000 .word .LANCHOR43 - 3086 0150 00000000 .word .LANCHOR4 - 3087 .cfi_endproc - 3088 .LFE85: - 3090 .section .text.OnRxWindow1TimerEvent,"ax",%progbits - 3091 .align 1 - 3092 .syntax unified - 3093 .code 16 - 3094 .thumb_func - 3095 .fpu softvfp - 3097 OnRxWindow1TimerEvent: - 3098 .LFB93: -1445:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStop( &RxWindowTimer1 ); - 3099 .loc 1 1445 0 - 3100 .cfi_startproc - 3101 @ args = 0, pretend = 0, frame = 0 - 3102 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccrFaSdZ.s page 99 - - - 3103 0000 10B5 push {r4, lr} - 3104 .LCFI17: - 3105 .cfi_def_cfa_offset 8 - 3106 .cfi_offset 4, -8 - 3107 .cfi_offset 14, -4 -1446:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxSlot = 0; - 3108 .loc 1 1446 0 - 3109 0002 1948 ldr r0, .L181 - 3110 0004 FFF7FEFF bl TimerStop - 3111 .LVL291: -1447:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3112 .loc 1 1447 0 - 3113 0008 0022 movs r2, #0 - 3114 000a 184B ldr r3, .L181+4 - 3115 000c 1A70 strb r2, [r3] -1449:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.DrOffset = LoRaMacParams.Rx1DrOffset; - 3116 .loc 1 1449 0 - 3117 000e 184B ldr r3, .L181+8 - 3118 0010 1849 ldr r1, .L181+12 - 3119 0012 0978 ldrb r1, [r1] - 3120 0014 1970 strb r1, [r3] -1450:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.DownlinkDwellTime = LoRaMacParams.DownlinkDwellTime; - 3121 .loc 1 1450 0 - 3122 0016 1849 ldr r1, .L181+16 - 3123 0018 2120 movs r0, #33 - 3124 001a 0856 ldrsb r0, [r1, r0] - 3125 001c D870 strb r0, [r3, #3] -1451:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.RepeaterSupport = RepeaterSupport; - 3126 .loc 1 1451 0 - 3127 001e 2D20 movs r0, #45 - 3128 0020 095C ldrb r1, [r1, r0] - 3129 0022 1974 strb r1, [r3, #16] -1452:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.RxContinuous = false; - 3130 .loc 1 1452 0 - 3131 0024 1549 ldr r1, .L181+20 - 3132 0026 0978 ldrb r1, [r1] - 3133 0028 5974 strb r1, [r3, #17] -1453:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow1Config.Window = RxSlot; - 3134 .loc 1 1453 0 - 3135 002a 9A74 strb r2, [r3, #18] -1454:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3136 .loc 1 1454 0 - 3137 002c DA74 strb r2, [r3, #19] -1456:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3138 .loc 1 1456 0 - 3139 002e 144B ldr r3, .L181+24 - 3140 0030 1B78 ldrb r3, [r3] - 3141 0032 022B cmp r3, #2 - 3142 0034 02D1 bne .L177 -1458:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3143 .loc 1 1458 0 - 3144 0036 134B ldr r3, .L181+28 - 3145 0038 9B6B ldr r3, [r3, #56] - 3146 003a 9847 blx r3 - 3147 .LVL292: - 3148 .L177: -1461:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindowSetup( RxWindow1Config.RxContinuous, LoRaMacParams.MaxRxWindow ); - ARM GAS /tmp/ccrFaSdZ.s page 100 - - - 3149 .loc 1 1461 0 - 3150 003c 124A ldr r2, .L181+32 - 3151 003e 0C4C ldr r4, .L181+8 - 3152 0040 124B ldr r3, .L181+36 - 3153 0042 1878 ldrb r0, [r3] - 3154 0044 0432 adds r2, r2, #4 - 3155 0046 2100 movs r1, r4 - 3156 0048 FFF7FEFF bl RegionRxConfig - 3157 .LVL293: -1462:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3158 .loc 1 1462 0 - 3159 004c A37C ldrb r3, [r4, #18] - 3160 004e 0A4A ldr r2, .L181+16 - 3161 0050 D068 ldr r0, [r2, #12] - 3162 .LVL294: - 3163 .LBB67: - 3164 .LBB68: -1508:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3165 .loc 1 1508 0 - 3166 0052 002B cmp r3, #0 - 3167 0054 04D0 beq .L180 -1514:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3168 .loc 1 1514 0 - 3169 0056 0B4B ldr r3, .L181+28 - 3170 .LVL295: - 3171 0058 DB6B ldr r3, [r3, #60] - 3172 005a 0020 movs r0, #0 - 3173 .LVL296: - 3174 005c 9847 blx r3 - 3175 .LVL297: - 3176 .L176: - 3177 .LBE68: - 3178 .LBE67: -1463:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3179 .loc 1 1463 0 - 3180 @ sp needed - 3181 005e 10BD pop {r4, pc} - 3182 .LVL298: - 3183 .L180: - 3184 .LBB70: - 3185 .LBB69: -1510:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3186 .loc 1 1510 0 - 3187 0060 084B ldr r3, .L181+28 - 3188 .LVL299: - 3189 0062 DB6B ldr r3, [r3, #60] - 3190 0064 9847 blx r3 - 3191 .LVL300: - 3192 0066 FAE7 b .L176 - 3193 .L182: - 3194 .align 2 - 3195 .L181: - 3196 0068 00000000 .word .LANCHOR46 - 3197 006c 00000000 .word .LANCHOR36 - 3198 0070 00000000 .word .LANCHOR48 - 3199 0074 00000000 .word .LANCHOR19 - 3200 0078 00000000 .word .LANCHOR14 - ARM GAS /tmp/ccrFaSdZ.s page 101 - - - 3201 007c 00000000 .word .LANCHOR21 - 3202 0080 00000000 .word .LANCHOR25 - 3203 0084 00000000 .word Radio - 3204 0088 00000000 .word .LANCHOR35 - 3205 008c 00000000 .word .LANCHOR22 - 3206 .LBE69: - 3207 .LBE70: - 3208 .cfi_endproc - 3209 .LFE93: - 3211 .section .text.PrepareFrame,"ax",%progbits - 3212 .align 1 - 3213 .global PrepareFrame - 3214 .syntax unified - 3215 .code 16 - 3216 .thumb_func - 3217 .fpu softvfp - 3219 PrepareFrame: - 3220 .LFB105: -2053:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2054:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t PrepareFrame( LoRaMacHeader_t *macHdr, LoRaMacFrameCtrl_t *fCtrl, uint8_t fPort, vo -2055:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3221 .loc 1 2055 0 - 3222 .cfi_startproc - 3223 @ args = 4, pretend = 0, frame = 24 - 3224 @ frame_needed = 0, uses_anonymous_args = 0 - 3225 .LVL301: - 3226 0000 F0B5 push {r4, r5, r6, r7, lr} - 3227 .LCFI18: - 3228 .cfi_def_cfa_offset 20 - 3229 .cfi_offset 4, -20 - 3230 .cfi_offset 5, -16 - 3231 .cfi_offset 6, -12 - 3232 .cfi_offset 7, -8 - 3233 .cfi_offset 14, -4 - 3234 0002 CE46 mov lr, r9 - 3235 0004 00B5 push {lr} - 3236 .LCFI19: - 3237 .cfi_def_cfa_offset 24 - 3238 .cfi_offset 9, -24 - 3239 0006 8AB0 sub sp, sp, #40 - 3240 .LCFI20: - 3241 .cfi_def_cfa_offset 64 - 3242 0008 0E00 movs r6, r1 - 3243 000a 0592 str r2, [sp, #20] - 3244 000c 1D00 movs r5, r3 - 3245 000e 10AB add r3, sp, #64 - 3246 .LVL302: - 3247 0010 1A88 ldrh r2, [r3] - 3248 .LVL303: -2056:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AdrNextParams_t adrNext; -2057:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint16_t i; -2058:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t pktHeaderLen = 0; -2059:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint32_t mic = 0; - 3249 .loc 1 2059 0 - 3250 0012 0023 movs r3, #0 - 3251 .LVL304: - 3252 0014 0693 str r3, [sp, #24] - ARM GAS /tmp/ccrFaSdZ.s page 102 - - - 3253 .LVL305: -2060:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** const void* payload = fBuffer; -2061:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t framePort = fPort; -2062:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2063:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen = 0; - 3254 .loc 1 2063 0 - 3255 0016 C949 ldr r1, .L220 - 3256 .LVL306: - 3257 0018 0B80 strh r3, [r1] -2064:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2065:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; - 3258 .loc 1 2065 0 - 3259 001a 0021 movs r1, #0 - 3260 001c C84B ldr r3, .L220+4 - 3261 001e 1970 strb r1, [r3] -2066:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2067:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( fBuffer == NULL ) - 3262 .loc 1 2067 0 - 3263 0020 002D cmp r5, #0 - 3264 0022 17D0 beq .L216 - 3265 .L184: - 3266 .LVL307: -2068:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2069:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBufferSize = 0; -2070:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2071:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2072:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacTxPayloadLen = fBufferSize; - 3267 .loc 1 2072 0 - 3268 0024 D2B2 uxtb r2, r2 - 3269 .LVL308: - 3270 0026 C74B ldr r3, .L220+8 - 3271 0028 1A70 strb r2, [r3] - 3272 .LVL309: -2073:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2074:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = macHdr->Value; - 3273 .loc 1 2074 0 - 3274 002a 0178 ldrb r1, [r0] - 3275 002c C64B ldr r3, .L220+12 - 3276 002e 1970 strb r1, [r3] -2075:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2076:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( macHdr->Bits.MType ) - 3277 .loc 1 2076 0 - 3278 0030 0378 ldrb r3, [r0] - 3279 0032 5B09 lsrs r3, r3, #5 - 3280 0034 022B cmp r3, #2 - 3281 0036 57D0 beq .L186 - 3282 0038 0ED9 bls .L217 - 3283 003a 042B cmp r3, #4 - 3284 003c 51D0 beq .L189 - 3285 003e 072B cmp r3, #7 - 3286 0040 00D0 beq .LCB3268 - 3287 0042 75E1 b .L209 @long jump - 3288 .LCB3268: -2077:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2078:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_JOIN_REQ: -2079:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen = pktHeaderLen; -2080:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 103 - - -2081:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memcpyr( LoRaMacBuffer + LoRaMacBufferPktLen, LoRaMacAppEui, 8 ); -2082:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen += 8; -2083:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memcpyr( LoRaMacBuffer + LoRaMacBufferPktLen, LoRaMacDevEui, 8 ); -2084:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen += 8; -2085:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2086:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevNonce = Radio.Random( ); -2087:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2088:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = LoRaMacDevNonce & 0xFF; -2089:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = ( LoRaMacDevNonce >> 8 ) & 0xFF; -2090:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2091:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacJoinComputeMic( LoRaMacBuffer, LoRaMacBufferPktLen & 0xFF, LoRaMacAppKey, &mic ) -2092:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2093:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = mic & 0xFF; -2094:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = ( mic >> 8 ) & 0xFF; -2095:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = ( mic >> 16 ) & 0xFF; -2096:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = ( mic >> 24 ) & 0xFF; -2097:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2098:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2099:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_DATA_CONFIRMED_UP: -2100:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = true; -2101:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** //Intentional fallthrough -2102:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_DATA_UNCONFIRMED_UP: -2103:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsLoRaMacNetworkJoined == false ) -2104:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2105:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_NO_NETWORK_JOINED; // No network has been joined yet -2106:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2107:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2108:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Adr next request -2109:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.UpdateChanMask = true; -2110:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.AdrEnabled = fCtrl->Bits.Adr; -2111:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.AdrAckCounter = AdrAckCounter; -2112:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.Datarate = LoRaMacParams.ChannelsDatarate; -2113:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.TxPower = LoRaMacParams.ChannelsTxPower; -2114:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; -2115:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2116:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl->Bits.AdrAckReq = RegionAdrNext( LoRaMacRegion, &adrNext, -2117:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** &LoRaMacParams.ChannelsDatarate, &LoRaMacParams. -2118:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2119:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( SrvAckRequested == true ) -2120:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2121:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** SrvAckRequested = false; -2122:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl->Bits.Ack = 1; -2123:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2124:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2125:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = ( LoRaMacDevAddr ) & 0xFF; -2126:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = ( LoRaMacDevAddr >> 8 ) & 0xFF; -2127:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = ( LoRaMacDevAddr >> 16 ) & 0xFF; -2128:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = ( LoRaMacDevAddr >> 24 ) & 0xFF; -2129:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2130:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = fCtrl->Value; -2131:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2132:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = UpLinkCounter & 0xFF; -2133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = ( UpLinkCounter >> 8 ) & 0xFF; -2134:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2135:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Copy the MAC commands which must be re-send into the MAC command buffer -2136:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memcpy1( &MacCommandsBuffer[MacCommandsBufferIndex], MacCommandsBufferToRepeat, MacComm -2137:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex += MacCommandsBufferToRepeatIndex; - ARM GAS /tmp/ccrFaSdZ.s page 104 - - -2138:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2139:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( payload != NULL ) && ( LoRaMacTxPayloadLen > 0 ) ) -2140:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2141:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsInNextTx == true ) -2142:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2143:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferIndex <= LORA_MAC_COMMAND_MAX_FOPTS_LENGTH ) -2144:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2145:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl->Bits.FOptsLen += MacCommandsBufferIndex; -2146:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2147:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update FCtrl field with new value of OptionsLength -2148:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[0x05] = fCtrl->Value; -2149:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** for( i = 0; i < MacCommandsBufferIndex; i++ ) -2150:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2151:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = MacCommandsBuffer[i]; -2152:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2153:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2154:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2155:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2156:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacTxPayloadLen = MacCommandsBufferIndex; -2157:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** payload = MacCommandsBuffer; -2158:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** framePort = 0; -2159:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2160:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2161:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2162:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2163:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2164:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( MacCommandsBufferIndex > 0 ) && ( MacCommandsInNextTx == true ) ) -2165:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2166:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacTxPayloadLen = MacCommandsBufferIndex; -2167:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** payload = MacCommandsBuffer; -2168:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** framePort = 0; -2169:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2170:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2171:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsInNextTx = false; -2172:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Store MAC commands which must be re-send in case the device does not receive a downl -2173:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferToRepeatIndex = ParseMacCommandsToRepeat( MacCommandsBuffer, MacComman -2174:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferToRepeatIndex > 0 ) -2175:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2176:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsInNextTx = true; -2177:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2178:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2179:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( payload != NULL ) && ( LoRaMacTxPayloadLen > 0 ) ) -2180:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2181:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = framePort; -2182:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2183:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( framePort == 0 ) -2184:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2185:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Reset buffer index as the mac commands are being sent on port 0 -2186:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; -2187:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacPayloadEncrypt( (uint8_t* ) payload, LoRaMacTxPayloadLen, LoRaMacNwkSKey -2188:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2189:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2190:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2191:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacPayloadEncrypt( (uint8_t* ) payload, LoRaMacTxPayloadLen, LoRaMacAppSKey -2192:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2193:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2194:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen = pktHeaderLen + LoRaMacTxPayloadLen; - ARM GAS /tmp/ccrFaSdZ.s page 105 - - -2195:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2196:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacComputeMic( LoRaMacBuffer, LoRaMacBufferPktLen, LoRaMacNwkSKey, LoRaMacDevAddr, -2197:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2198:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen + 0] = mic & 0xFF; -2199:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen + 1] = ( mic >> 8 ) & 0xFF; -2200:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen + 2] = ( mic >> 16 ) & 0xFF; -2201:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen + 3] = ( mic >> 24 ) & 0xFF; -2202:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2203:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen += LORAMAC_MFR_LEN; -2204:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2205:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2206:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_PROPRIETARY: -2207:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( fBuffer != NULL ) && ( LoRaMacTxPayloadLen > 0 ) ) - 3289 .loc 1 2207 0 - 3290 0044 002D cmp r5, #0 - 3291 0046 00D1 bne .LCB3270 - 3292 0048 76E1 b .L214 @long jump - 3293 .LCB3270: - 3294 .loc 1 2207 0 is_stmt 0 discriminator 1 - 3295 004a 002A cmp r2, #0 - 3296 004c 00D0 beq .LCB3272 - 3297 004e 63E1 b .L218 @long jump - 3298 .LCB3272: -2208:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2209:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memcpy1( LoRaMacBuffer + pktHeaderLen, ( uint8_t* ) fBuffer, LoRaMacTxPayloadLen ); -2210:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen = pktHeaderLen + LoRaMacTxPayloadLen; -2211:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2212:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2213:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: -2214:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_SERVICE_UNKNOWN; -2215:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2216:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2217:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; - 3299 .loc 1 2217 0 is_stmt 1 - 3300 0050 0020 movs r0, #0 - 3301 .LVL310: - 3302 0052 4CE1 b .L185 - 3303 .LVL311: - 3304 .L216: -2069:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3305 .loc 1 2069 0 - 3306 0054 0022 movs r2, #0 - 3307 0056 E5E7 b .L184 - 3308 .LVL312: - 3309 .L217: -2076:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3310 .loc 1 2076 0 - 3311 0058 002B cmp r3, #0 - 3312 005a 00D0 beq .LCB3291 - 3313 005c 68E1 b .L209 @long jump - 3314 .LCB3291: -2079:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3315 .loc 1 2079 0 - 3316 005e B74D ldr r5, .L220 - 3317 .LVL313: - 3318 0060 0123 movs r3, #1 - 3319 0062 2B80 strh r3, [r5] - ARM GAS /tmp/ccrFaSdZ.s page 106 - - -2081:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen += 8; - 3320 .loc 1 2081 0 - 3321 0064 B94B ldr r3, .L220+16 - 3322 0066 1968 ldr r1, [r3] - 3323 0068 B94C ldr r4, .L220+20 - 3324 006a 0822 movs r2, #8 - 3325 006c 2000 movs r0, r4 - 3326 .LVL314: - 3327 006e FFF7FEFF bl memcpyr - 3328 .LVL315: -2082:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memcpyr( LoRaMacBuffer + LoRaMacBufferPktLen, LoRaMacDevEui, 8 ); - 3329 .loc 1 2082 0 - 3330 0072 2888 ldrh r0, [r5] - 3331 0074 0830 adds r0, r0, #8 - 3332 0076 80B2 uxth r0, r0 - 3333 0078 2880 strh r0, [r5] -2083:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen += 8; - 3334 .loc 1 2083 0 - 3335 007a B64B ldr r3, .L220+24 - 3336 007c 1968 ldr r1, [r3] - 3337 007e 013C subs r4, r4, #1 - 3338 0080 0019 adds r0, r0, r4 - 3339 0082 0822 movs r2, #8 - 3340 0084 FFF7FEFF bl memcpyr - 3341 .LVL316: -2084:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3342 .loc 1 2084 0 - 3343 0088 2B88 ldrh r3, [r5] - 3344 008a 0833 adds r3, r3, #8 - 3345 008c 2B80 strh r3, [r5] -2086:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3346 .loc 1 2086 0 - 3347 008e B24B ldr r3, .L220+28 - 3348 0090 DB69 ldr r3, [r3, #28] - 3349 0092 9847 blx r3 - 3350 .LVL317: - 3351 0094 80B2 uxth r0, r0 - 3352 0096 B14B ldr r3, .L220+32 - 3353 0098 1880 strh r0, [r3] -2088:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = ( LoRaMacDevNonce >> 8 ) & 0xFF; - 3354 .loc 1 2088 0 - 3355 009a 2A88 ldrh r2, [r5] - 3356 009c 531C adds r3, r2, #1 - 3357 009e 9BB2 uxth r3, r3 - 3358 00a0 A054 strb r0, [r4, r2] -2089:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3359 .loc 1 2089 0 - 3360 00a2 591C adds r1, r3, #1 - 3361 00a4 89B2 uxth r1, r1 - 3362 00a6 2980 strh r1, [r5] - 3363 00a8 000A lsrs r0, r0, #8 - 3364 00aa E054 strb r0, [r4, r3] -2091:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3365 .loc 1 2091 0 - 3366 00ac AC4B ldr r3, .L220+36 - 3367 00ae 1A68 ldr r2, [r3] - 3368 00b0 FF23 movs r3, #255 - ARM GAS /tmp/ccrFaSdZ.s page 107 - - - 3369 00b2 1940 ands r1, r3 - 3370 00b4 06AB add r3, sp, #24 - 3371 00b6 2000 movs r0, r4 - 3372 00b8 FFF7FEFF bl LoRaMacJoinComputeMic - 3373 .LVL318: -2093:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = ( mic >> 8 ) & 0xFF; - 3374 .loc 1 2093 0 - 3375 00bc 069B ldr r3, [sp, #24] - 3376 00be 2988 ldrh r1, [r5] - 3377 00c0 4A1C adds r2, r1, #1 - 3378 00c2 92B2 uxth r2, r2 - 3379 00c4 6354 strb r3, [r4, r1] -2094:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = ( mic >> 16 ) & 0xFF; - 3380 .loc 1 2094 0 - 3381 00c6 180A lsrs r0, r3, #8 - 3382 00c8 511C adds r1, r2, #1 - 3383 00ca 89B2 uxth r1, r1 - 3384 00cc A054 strb r0, [r4, r2] -2095:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen++] = ( mic >> 24 ) & 0xFF; - 3385 .loc 1 2095 0 - 3386 00ce 180C lsrs r0, r3, #16 - 3387 00d0 4A1C adds r2, r1, #1 - 3388 00d2 92B2 uxth r2, r2 - 3389 00d4 6054 strb r0, [r4, r1] -2096:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3390 .loc 1 2096 0 - 3391 00d6 1B0E lsrs r3, r3, #24 - 3392 00d8 511C adds r1, r2, #1 - 3393 00da 2980 strh r1, [r5] - 3394 00dc A354 strb r3, [r4, r2] - 3395 .loc 1 2217 0 - 3396 00de 0020 movs r0, #0 -2098:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case FRAME_TYPE_DATA_CONFIRMED_UP: - 3397 .loc 1 2098 0 - 3398 00e0 05E1 b .L185 - 3399 .LVL319: - 3400 .L189: -2100:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** //Intentional fallthrough - 3401 .loc 1 2100 0 - 3402 00e2 974B ldr r3, .L220+4 - 3403 00e4 0122 movs r2, #1 - 3404 00e6 1A70 strb r2, [r3] - 3405 .L186: -2103:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3406 .loc 1 2103 0 - 3407 00e8 9E4B ldr r3, .L220+40 - 3408 00ea 1B78 ldrb r3, [r3] - 3409 00ec 002B cmp r3, #0 - 3410 00ee 00D1 bne .LCB3377 - 3411 00f0 20E1 b .L210 @long jump - 3412 .LCB3377: -2109:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.AdrEnabled = fCtrl->Bits.Adr; - 3413 .loc 1 2109 0 - 3414 00f2 07A9 add r1, sp, #28 - 3415 00f4 0123 movs r3, #1 - 3416 00f6 0B70 strb r3, [r1] -2110:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.AdrAckCounter = AdrAckCounter; - ARM GAS /tmp/ccrFaSdZ.s page 108 - - - 3417 .loc 1 2110 0 - 3418 00f8 3378 ldrb r3, [r6] - 3419 00fa DB09 lsrs r3, r3, #7 - 3420 00fc 4B70 strb r3, [r1, #1] -2111:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.Datarate = LoRaMacParams.ChannelsDatarate; - 3421 .loc 1 2111 0 - 3422 00fe 9A4F ldr r7, .L220+44 - 3423 0100 3B68 ldr r3, [r7] - 3424 0102 4B60 str r3, [r1, #4] -2112:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.TxPower = LoRaMacParams.ChannelsTxPower; - 3425 .loc 1 2112 0 - 3426 0104 994B ldr r3, .L220+48 - 3427 0106 0122 movs r2, #1 - 3428 0108 9A56 ldrsb r2, [r3, r2] - 3429 010a 0A72 strb r2, [r1, #8] -2113:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; - 3430 .loc 1 2113 0 - 3431 010c 0022 movs r2, #0 - 3432 010e 9A56 ldrsb r2, [r3, r2] - 3433 0110 4A72 strb r2, [r1, #9] -2114:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3434 .loc 1 2114 0 - 3435 0112 2C22 movs r2, #44 - 3436 0114 9A5C ldrb r2, [r3, r2] - 3437 0116 8A72 strb r2, [r1, #10] -2116:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** &LoRaMacParams.ChannelsDatarate, &LoRaMacParams. - 3438 .loc 1 2116 0 - 3439 0118 5A1C adds r2, r3, #1 - 3440 011a 9548 ldr r0, .L220+52 - 3441 .LVL320: - 3442 011c 0078 ldrb r0, [r0] - 3443 011e 0097 str r7, [sp] - 3444 0120 FFF7FEFF bl RegionAdrNext - 3445 .LVL321: - 3446 0124 0123 movs r3, #1 - 3447 0126 0340 ands r3, r0 - 3448 0128 9B01 lsls r3, r3, #6 - 3449 012a 3078 ldrb r0, [r6] - 3450 012c 4022 movs r2, #64 - 3451 012e 9043 bics r0, r2 - 3452 0130 1843 orrs r0, r3 - 3453 0132 3070 strb r0, [r6] -2119:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3454 .loc 1 2119 0 - 3455 0134 8F4B ldr r3, .L220+56 - 3456 0136 1B78 ldrb r3, [r3] - 3457 0138 002B cmp r3, #0 - 3458 013a 06D0 beq .L191 -2121:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl->Bits.Ack = 1; - 3459 .loc 1 2121 0 - 3460 013c 8D4B ldr r3, .L220+56 - 3461 013e 0022 movs r2, #0 - 3462 0140 1A70 strb r2, [r3] -2122:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3463 .loc 1 2122 0 - 3464 0142 C3B2 uxtb r3, r0 - 3465 0144 2022 movs r2, #32 - ARM GAS /tmp/ccrFaSdZ.s page 109 - - - 3466 0146 1343 orrs r3, r2 - 3467 0148 3370 strb r3, [r6] - 3468 .L191: -2125:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = ( LoRaMacDevAddr >> 8 ) & 0xFF; - 3469 .loc 1 2125 0 - 3470 014a 8B4B ldr r3, .L220+60 - 3471 014c 1A68 ldr r2, [r3] - 3472 .LVL322: - 3473 014e 7E4B ldr r3, .L220+12 - 3474 0150 5A70 strb r2, [r3, #1] -2126:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = ( LoRaMacDevAddr >> 16 ) & 0xFF; - 3475 .loc 1 2126 0 - 3476 0152 110A lsrs r1, r2, #8 - 3477 .LVL323: - 3478 0154 9970 strb r1, [r3, #2] -2127:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = ( LoRaMacDevAddr >> 24 ) & 0xFF; - 3479 .loc 1 2127 0 - 3480 0156 110C lsrs r1, r2, #16 - 3481 .LVL324: - 3482 0158 D970 strb r1, [r3, #3] -2128:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3483 .loc 1 2128 0 - 3484 015a 120E lsrs r2, r2, #24 - 3485 .LVL325: - 3486 015c 1A71 strb r2, [r3, #4] - 3487 .LVL326: -2130:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3488 .loc 1 2130 0 - 3489 015e 3278 ldrb r2, [r6] - 3490 0160 5A71 strb r2, [r3, #5] -2132:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[pktHeaderLen++] = ( UpLinkCounter >> 8 ) & 0xFF; - 3491 .loc 1 2132 0 - 3492 0162 864A ldr r2, .L220+64 - 3493 0164 1268 ldr r2, [r2] - 3494 .LVL327: - 3495 0166 9A71 strb r2, [r3, #6] -2133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3496 .loc 1 2133 0 - 3497 0168 120A lsrs r2, r2, #8 - 3498 .LVL328: - 3499 016a DA71 strb r2, [r3, #7] -2136:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex += MacCommandsBufferToRepeatIndex; - 3500 .loc 1 2136 0 - 3501 016c 844C ldr r4, .L220+68 - 3502 016e 2078 ldrb r0, [r4] - 3503 0170 844B ldr r3, .L220+72 - 3504 0172 9946 mov r9, r3 - 3505 0174 1A78 ldrb r2, [r3] - 3506 0176 844B ldr r3, .L220+76 - 3507 0178 C018 adds r0, r0, r3 - 3508 017a 8449 ldr r1, .L220+80 - 3509 017c FFF7FEFF bl memcpy1 - 3510 .LVL329: -2137:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3511 .loc 1 2137 0 - 3512 0180 2778 ldrb r7, [r4] - 3513 0182 4B46 mov r3, r9 - ARM GAS /tmp/ccrFaSdZ.s page 110 - - - 3514 0184 1B78 ldrb r3, [r3] - 3515 0186 FF18 adds r7, r7, r3 - 3516 0188 FFB2 uxtb r7, r7 - 3517 018a 2770 strb r7, [r4] -2139:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3518 .loc 1 2139 0 - 3519 018c 002D cmp r5, #0 - 3520 018e 2AD0 beq .L192 -2139:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3521 .loc 1 2139 0 is_stmt 0 discriminator 1 - 3522 0190 6C4B ldr r3, .L220+8 - 3523 0192 1B78 ldrb r3, [r3] - 3524 0194 002B cmp r3, #0 - 3525 0196 26D0 beq .L192 -2141:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3526 .loc 1 2141 0 is_stmt 1 - 3527 0198 7D4B ldr r3, .L220+84 - 3528 019a 1B78 ldrb r3, [r3] - 3529 019c 002B cmp r3, #0 - 3530 019e 2FD0 beq .L211 -2143:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3531 .loc 1 2143 0 - 3532 01a0 0F2F cmp r7, #15 - 3533 01a2 19D8 bhi .L194 -2145:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3534 .loc 1 2145 0 - 3535 01a4 3278 ldrb r2, [r6] - 3536 01a6 1307 lsls r3, r2, #28 - 3537 01a8 1B0F lsrs r3, r3, #28 - 3538 01aa FB18 adds r3, r7, r3 - 3539 01ac 0F21 movs r1, #15 - 3540 01ae 0B40 ands r3, r1 - 3541 01b0 8A43 bics r2, r1 - 3542 01b2 1343 orrs r3, r2 - 3543 01b4 3370 strb r3, [r6] -2148:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** for( i = 0; i < MacCommandsBufferIndex; i++ ) - 3544 .loc 1 2148 0 - 3545 01b6 644A ldr r2, .L220+12 - 3546 01b8 5371 strb r3, [r2, #5] - 3547 .LVL330: -2133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3548 .loc 1 2133 0 - 3549 01ba 0824 movs r4, #8 -2149:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3550 .loc 1 2149 0 - 3551 01bc 0023 movs r3, #0 - 3552 01be 07E0 b .L195 - 3553 .LVL331: - 3554 .L196: -2151:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3555 .loc 1 2151 0 discriminator 3 - 3556 01c0 621C adds r2, r4, #1 - 3557 .LVL332: - 3558 01c2 7149 ldr r1, .L220+76 - 3559 01c4 C85C ldrb r0, [r1, r3] - 3560 01c6 6049 ldr r1, .L220+12 - 3561 01c8 0855 strb r0, [r1, r4] - ARM GAS /tmp/ccrFaSdZ.s page 111 - - -2149:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3562 .loc 1 2149 0 discriminator 3 - 3563 01ca 0133 adds r3, r3, #1 - 3564 .LVL333: - 3565 01cc 9BB2 uxth r3, r3 - 3566 .LVL334: -2151:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3567 .loc 1 2151 0 discriminator 3 - 3568 01ce D4B2 uxtb r4, r2 - 3569 .LVL335: - 3570 .L195: -2149:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3571 .loc 1 2149 0 discriminator 1 - 3572 01d0 BAB2 uxth r2, r7 - 3573 01d2 9A42 cmp r2, r3 - 3574 01d4 F4D8 bhi .L196 - 3575 01d6 16E0 b .L193 - 3576 .LVL336: - 3577 .L194: -2156:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** payload = MacCommandsBuffer; - 3578 .loc 1 2156 0 - 3579 01d8 5A4B ldr r3, .L220+8 - 3580 01da 1F70 strb r7, [r3] - 3581 .LVL337: -2158:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3582 .loc 1 2158 0 - 3583 01dc 0023 movs r3, #0 - 3584 01de 0593 str r3, [sp, #20] -2157:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** framePort = 0; - 3585 .loc 1 2157 0 - 3586 01e0 694D ldr r5, .L220+76 - 3587 .LVL338: -2133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3588 .loc 1 2133 0 - 3589 01e2 0824 movs r4, #8 - 3590 01e4 0FE0 b .L193 - 3591 .LVL339: - 3592 .L192: -2164:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3593 .loc 1 2164 0 - 3594 01e6 002F cmp r7, #0 - 3595 01e8 0CD0 beq .L212 -2164:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3596 .loc 1 2164 0 is_stmt 0 discriminator 1 - 3597 01ea 694B ldr r3, .L220+84 - 3598 01ec 1B78 ldrb r3, [r3] - 3599 01ee 002B cmp r3, #0 - 3600 01f0 0FD0 beq .L213 -2166:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** payload = MacCommandsBuffer; - 3601 .loc 1 2166 0 is_stmt 1 - 3602 01f2 544B ldr r3, .L220+8 - 3603 01f4 1F70 strb r7, [r3] - 3604 .LVL340: -2168:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3605 .loc 1 2168 0 - 3606 01f6 0023 movs r3, #0 - 3607 01f8 0593 str r3, [sp, #20] - ARM GAS /tmp/ccrFaSdZ.s page 112 - - -2167:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** framePort = 0; - 3608 .loc 1 2167 0 - 3609 01fa 634D ldr r5, .L220+76 - 3610 .LVL341: -2133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3611 .loc 1 2133 0 - 3612 01fc 0824 movs r4, #8 - 3613 01fe 02E0 b .L193 - 3614 .LVL342: - 3615 .L211: - 3616 0200 0824 movs r4, #8 - 3617 0202 00E0 b .L193 - 3618 .L212: - 3619 0204 0824 movs r4, #8 - 3620 .LVL343: - 3621 .L193: -2171:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Store MAC commands which must be re-send in case the device does not receive a downl - 3622 .loc 1 2171 0 - 3623 0206 624B ldr r3, .L220+84 - 3624 0208 0022 movs r2, #0 - 3625 020a 1A70 strb r2, [r3] - 3626 .LVL344: - 3627 .LBB73: - 3628 .LBB74: -1649:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3629 .loc 1 1649 0 - 3630 020c 0026 movs r6, #0 - 3631 .LVL345: -1656:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3632 .loc 1 1656 0 - 3633 020e 0023 movs r3, #0 - 3634 0210 0EE0 b .L197 - 3635 .LVL346: - 3636 .L213: - 3637 .LBE74: - 3638 .LBE73: -2133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3639 .loc 1 2133 0 - 3640 0212 0824 movs r4, #8 - 3641 0214 F7E7 b .L193 - 3642 .LVL347: - 3643 .L201: - 3644 .LBB76: - 3645 .LBB75: -1664:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cmdBufOut[cmdCount++] = cmdBufIn[i]; - 3646 .loc 1 1664 0 - 3647 0216 0133 adds r3, r3, #1 - 3648 .LVL348: - 3649 0218 DBB2 uxtb r3, r3 - 3650 .LVL349: - 3651 021a 721C adds r2, r6, #1 - 3652 021c D2B2 uxtb r2, r2 - 3653 .LVL350: - 3654 021e 5B49 ldr r1, .L220+80 - 3655 0220 8855 strb r0, [r1, r6] -1665:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 3656 .loc 1 1665 0 - ARM GAS /tmp/ccrFaSdZ.s page 113 - - - 3657 0222 0236 adds r6, r6, #2 - 3658 0224 F6B2 uxtb r6, r6 - 3659 .LVL351: - 3660 0226 5848 ldr r0, .L220+76 - 3661 0228 C05C ldrb r0, [r0, r3] - 3662 022a 8854 strb r0, [r1, r2] - 3663 .LVL352: - 3664 .L198: -1656:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3665 .loc 1 1656 0 - 3666 022c 0133 adds r3, r3, #1 - 3667 .LVL353: - 3668 022e DBB2 uxtb r3, r3 - 3669 .LVL354: - 3670 .L197: - 3671 0230 9F42 cmp r7, r3 - 3672 0232 14D9 bls .L219 -1658:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3673 .loc 1 1658 0 - 3674 0234 544A ldr r2, .L220+76 - 3675 0236 D05C ldrb r0, [r2, r3] - 3676 0238 C21E subs r2, r0, #3 - 3677 023a D1B2 uxtb r1, r2 - 3678 023c 0729 cmp r1, #7 - 3679 023e F5D8 bhi .L198 - 3680 0240 8A00 lsls r2, r1, #2 - 3681 0242 5449 ldr r1, .L220+88 - 3682 0244 8A58 ldr r2, [r1, r2] - 3683 0246 9746 mov pc, r2 - 3684 .section .rodata.PrepareFrame,"a",%progbits - 3685 .align 2 - 3686 .L200: - 3687 0000 58020000 .word .L199 - 3688 0004 2C020000 .word .L198 - 3689 0008 16020000 .word .L201 - 3690 000c 52020000 .word .L202 - 3691 0010 58020000 .word .L199 - 3692 0014 48020000 .word .L203 - 3693 0018 2C020000 .word .L198 - 3694 001c 16020000 .word .L201 - 3695 .section .text.PrepareFrame - 3696 .L203: -1670:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 3697 .loc 1 1670 0 - 3698 0248 721C adds r2, r6, #1 - 3699 .LVL355: - 3700 024a 5049 ldr r1, .L220+80 - 3701 024c 8855 strb r0, [r1, r6] - 3702 024e D6B2 uxtb r6, r2 - 3703 0250 ECE7 b .L198 - 3704 .LVL356: - 3705 .L202: -1676:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 3706 .loc 1 1676 0 - 3707 0252 0233 adds r3, r3, #2 - 3708 .LVL357: - 3709 0254 DBB2 uxtb r3, r3 - ARM GAS /tmp/ccrFaSdZ.s page 114 - - - 3710 .LVL358: - 3711 0256 E9E7 b .L198 - 3712 .L199: -1682:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 3713 .loc 1 1682 0 - 3714 0258 0133 adds r3, r3, #1 - 3715 .LVL359: - 3716 025a DBB2 uxtb r3, r3 - 3717 .LVL360: - 3718 025c E6E7 b .L198 - 3719 .L219: - 3720 .LVL361: - 3721 .LBE75: - 3722 .LBE76: -2173:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MacCommandsBufferToRepeatIndex > 0 ) - 3723 .loc 1 2173 0 - 3724 025e 494B ldr r3, .L220+72 - 3725 0260 1E70 strb r6, [r3] -2174:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3726 .loc 1 2174 0 - 3727 0262 002E cmp r6, #0 - 3728 0264 02D0 beq .L205 -2176:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3729 .loc 1 2176 0 - 3730 0266 4A4B ldr r3, .L220+84 - 3731 0268 0122 movs r2, #1 - 3732 026a 1A70 strb r2, [r3] - 3733 .L205: -2179:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3734 .loc 1 2179 0 - 3735 026c 002D cmp r5, #0 - 3736 026e 1CD0 beq .L206 -2179:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3737 .loc 1 2179 0 is_stmt 0 discriminator 1 - 3738 0270 344B ldr r3, .L220+8 - 3739 0272 1978 ldrb r1, [r3] - 3740 0274 0029 cmp r1, #0 - 3741 0276 18D0 beq .L206 -2181:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3742 .loc 1 2181 0 is_stmt 1 - 3743 0278 661C adds r6, r4, #1 - 3744 027a F6B2 uxtb r6, r6 - 3745 .LVL362: - 3746 027c 324B ldr r3, .L220+12 - 3747 027e 059A ldr r2, [sp, #20] - 3748 0280 1A55 strb r2, [r3, r4] -2183:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3749 .loc 1 2183 0 - 3750 0282 002A cmp r2, #0 - 3751 0284 37D1 bne .L207 -2186:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacPayloadEncrypt( (uint8_t* ) payload, LoRaMacTxPayloadLen, LoRaMacNwkSKey - 3752 .loc 1 2186 0 - 3753 0286 0020 movs r0, #0 - 3754 0288 3D4B ldr r3, .L220+68 - 3755 028a 1870 strb r0, [r3] -2187:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3756 .loc 1 2187 0 - ARM GAS /tmp/ccrFaSdZ.s page 115 - - - 3757 028c 3A4B ldr r3, .L220+60 - 3758 028e 1B68 ldr r3, [r3] - 3759 0290 89B2 uxth r1, r1 - 3760 0292 2D4A ldr r2, .L220+12 - 3761 0294 B218 adds r2, r6, r2 - 3762 0296 0292 str r2, [sp, #8] - 3763 0298 384A ldr r2, .L220+64 - 3764 029a 1268 ldr r2, [r2] - 3765 029c 0192 str r2, [sp, #4] - 3766 029e 0090 str r0, [sp] - 3767 02a0 3D4A ldr r2, .L220+92 - 3768 02a2 2800 movs r0, r5 - 3769 02a4 FFF7FEFF bl LoRaMacPayloadEncrypt - 3770 .LVL363: -2181:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3771 .loc 1 2181 0 - 3772 02a8 3400 movs r4, r6 - 3773 .LVL364: - 3774 .L206: -2194:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3775 .loc 1 2194 0 - 3776 02aa 264B ldr r3, .L220+8 - 3777 02ac 1978 ldrb r1, [r3] - 3778 02ae 0919 adds r1, r1, r4 - 3779 02b0 224D ldr r5, .L220 - 3780 .LVL365: - 3781 02b2 2980 strh r1, [r5] -2196:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3782 .loc 1 2196 0 - 3783 02b4 304B ldr r3, .L220+60 - 3784 02b6 1B68 ldr r3, [r3] - 3785 02b8 234C ldr r4, .L220+12 - 3786 .LVL366: - 3787 02ba 06AA add r2, sp, #24 - 3788 02bc 0292 str r2, [sp, #8] - 3789 02be 2F4A ldr r2, .L220+64 - 3790 02c0 1268 ldr r2, [r2] - 3791 02c2 0192 str r2, [sp, #4] - 3792 02c4 0022 movs r2, #0 - 3793 02c6 0092 str r2, [sp] - 3794 02c8 334A ldr r2, .L220+92 - 3795 02ca 2000 movs r0, r4 - 3796 02cc FFF7FEFF bl LoRaMacComputeMic - 3797 .LVL367: -2198:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen + 1] = ( mic >> 8 ) & 0xFF; - 3798 .loc 1 2198 0 - 3799 02d0 069A ldr r2, [sp, #24] - 3800 02d2 2B88 ldrh r3, [r5] - 3801 02d4 E254 strb r2, [r4, r3] -2199:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen + 2] = ( mic >> 16 ) & 0xFF; - 3802 .loc 1 2199 0 - 3803 02d6 100A lsrs r0, r2, #8 - 3804 02d8 591C adds r1, r3, #1 - 3805 02da 6054 strb r0, [r4, r1] -2200:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBuffer[LoRaMacBufferPktLen + 3] = ( mic >> 24 ) & 0xFF; - 3806 .loc 1 2200 0 - 3807 02dc 100C lsrs r0, r2, #16 - ARM GAS /tmp/ccrFaSdZ.s page 116 - - - 3808 02de 991C adds r1, r3, #2 - 3809 02e0 6054 strb r0, [r4, r1] -2201:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3810 .loc 1 2201 0 - 3811 02e2 120E lsrs r2, r2, #24 - 3812 02e4 D91C adds r1, r3, #3 - 3813 02e6 6254 strb r2, [r4, r1] -2203:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3814 .loc 1 2203 0 - 3815 02e8 0433 adds r3, r3, #4 - 3816 02ea 2B80 strh r3, [r5] - 3817 .loc 1 2217 0 - 3818 02ec 0020 movs r0, #0 - 3819 .L185: -2218:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3820 .loc 1 2218 0 - 3821 02ee 0AB0 add sp, sp, #40 - 3822 @ sp needed - 3823 02f0 04BC pop {r2} - 3824 02f2 9146 mov r9, r2 - 3825 02f4 F0BD pop {r4, r5, r6, r7, pc} - 3826 .LVL368: - 3827 .L207: -2191:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3828 .loc 1 2191 0 - 3829 02f6 204B ldr r3, .L220+60 - 3830 02f8 1B68 ldr r3, [r3] - 3831 02fa 89B2 uxth r1, r1 - 3832 02fc 124A ldr r2, .L220+12 - 3833 02fe B218 adds r2, r6, r2 - 3834 0300 0292 str r2, [sp, #8] - 3835 0302 1E4A ldr r2, .L220+64 - 3836 0304 1268 ldr r2, [r2] - 3837 0306 0192 str r2, [sp, #4] - 3838 0308 0022 movs r2, #0 - 3839 030a 0092 str r2, [sp] - 3840 030c 234A ldr r2, .L220+96 - 3841 030e 2800 movs r0, r5 - 3842 0310 FFF7FEFF bl LoRaMacPayloadEncrypt - 3843 .LVL369: -2181:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 3844 .loc 1 2181 0 - 3845 0314 3400 movs r4, r6 - 3846 0316 C8E7 b .L206 - 3847 .LVL370: - 3848 .L218: -2209:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacBufferPktLen = pktHeaderLen + LoRaMacTxPayloadLen; - 3849 .loc 1 2209 0 - 3850 0318 92B2 uxth r2, r2 - 3851 031a 2900 movs r1, r5 - 3852 031c 0C48 ldr r0, .L220+20 - 3853 .LVL371: - 3854 031e FFF7FEFF bl memcpy1 - 3855 .LVL372: -2210:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3856 .loc 1 2210 0 - 3857 0322 084B ldr r3, .L220+8 - ARM GAS /tmp/ccrFaSdZ.s page 117 - - - 3858 0324 1B78 ldrb r3, [r3] - 3859 0326 0133 adds r3, r3, #1 - 3860 0328 044A ldr r2, .L220 - 3861 032a 1380 strh r3, [r2] -2217:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3862 .loc 1 2217 0 - 3863 032c 0020 movs r0, #0 - 3864 032e DEE7 b .L185 - 3865 .LVL373: - 3866 .L209: -2214:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3867 .loc 1 2214 0 - 3868 0330 0220 movs r0, #2 - 3869 .LVL374: - 3870 0332 DCE7 b .L185 - 3871 .LVL375: - 3872 .L210: -2105:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3873 .loc 1 2105 0 - 3874 0334 0720 movs r0, #7 - 3875 .LVL376: - 3876 0336 DAE7 b .L185 - 3877 .LVL377: - 3878 .L214: -2217:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 3879 .loc 1 2217 0 - 3880 0338 0020 movs r0, #0 - 3881 .LVL378: - 3882 033a D8E7 b .L185 - 3883 .L221: - 3884 .align 2 - 3885 .L220: - 3886 033c 00000000 .word .LANCHOR49 - 3887 0340 00000000 .word .LANCHOR15 - 3888 0344 00000000 .word .LANCHOR50 - 3889 0348 00000000 .word LoRaMacBuffer - 3890 034c 00000000 .word .LANCHOR51 - 3891 0350 01000000 .word LoRaMacBuffer+1 - 3892 0354 00000000 .word .LANCHOR52 - 3893 0358 00000000 .word Radio - 3894 035c 00000000 .word .LANCHOR39 - 3895 0360 00000000 .word .LANCHOR38 - 3896 0364 00000000 .word .LANCHOR0 - 3897 0368 00000000 .word .LANCHOR3 - 3898 036c 00000000 .word .LANCHOR14 - 3899 0370 00000000 .word .LANCHOR22 - 3900 0374 00000000 .word .LANCHOR16 - 3901 0378 00000000 .word .LANCHOR41 - 3902 037c 00000000 .word .LANCHOR1 - 3903 0380 00000000 .word .LANCHOR10 - 3904 0384 00000000 .word .LANCHOR11 - 3905 0388 00000000 .word MacCommandsBuffer - 3906 038c 00000000 .word MacCommandsBufferToRepeat - 3907 0390 00000000 .word .LANCHOR17 - 3908 0394 00000000 .word .L200 - 3909 0398 00000000 .word .LANCHOR33 - 3910 039c 00000000 .word .LANCHOR32 - ARM GAS /tmp/ccrFaSdZ.s page 118 - - - 3911 .cfi_endproc - 3912 .LFE105: - 3914 .section .text.SendFrameOnChannel,"ax",%progbits - 3915 .align 1 - 3916 .global SendFrameOnChannel - 3917 .syntax unified - 3918 .code 16 - 3919 .thumb_func - 3920 .fpu softvfp - 3922 SendFrameOnChannel: - 3923 .LFB106: -2219:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2220:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t SendFrameOnChannel( uint8_t channel ) -2221:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 3924 .loc 1 2221 0 - 3925 .cfi_startproc - 3926 @ args = 0, pretend = 0, frame = 24 - 3927 @ frame_needed = 0, uses_anonymous_args = 0 - 3928 .LVL379: - 3929 0000 70B5 push {r4, r5, r6, lr} - 3930 .LCFI21: - 3931 .cfi_def_cfa_offset 16 - 3932 .cfi_offset 4, -16 - 3933 .cfi_offset 5, -12 - 3934 .cfi_offset 6, -8 - 3935 .cfi_offset 14, -4 - 3936 0002 86B0 sub sp, sp, #24 - 3937 .LCFI22: - 3938 .cfi_def_cfa_offset 40 -2222:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TxConfigParams_t txConfig; -2223:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** int8_t txPower = 0; - 3939 .loc 1 2223 0 - 3940 0004 6B46 mov r3, sp - 3941 0006 DD1D adds r5, r3, #7 - 3942 0008 0023 movs r3, #0 - 3943 000a 2B70 strb r3, [r5] -2224:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2225:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txConfig.Channel = channel; - 3944 .loc 1 2225 0 - 3945 000c 02A9 add r1, sp, #8 - 3946 000e 0870 strb r0, [r1] -2226:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txConfig.Datarate = LoRaMacParams.ChannelsDatarate; - 3947 .loc 1 2226 0 - 3948 0010 1F4C ldr r4, .L224 - 3949 0012 0123 movs r3, #1 - 3950 0014 E356 ldrsb r3, [r4, r3] - 3951 0016 4B70 strb r3, [r1, #1] -2227:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txConfig.TxPower = LoRaMacParams.ChannelsTxPower; - 3952 .loc 1 2227 0 - 3953 0018 0023 movs r3, #0 - 3954 001a E356 ldrsb r3, [r4, r3] - 3955 001c 8B70 strb r3, [r1, #2] -2228:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txConfig.MaxEirp = LoRaMacParams.MaxEirp; - 3956 .loc 1 2228 0 - 3957 001e 236B ldr r3, [r4, #48] - 3958 0020 4B60 str r3, [r1, #4] -2229:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txConfig.AntennaGain = LoRaMacParams.AntennaGain; - ARM GAS /tmp/ccrFaSdZ.s page 119 - - - 3959 .loc 1 2229 0 - 3960 0022 636B ldr r3, [r4, #52] - 3961 0024 8B60 str r3, [r1, #8] -2230:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txConfig.PktLen = LoRaMacBufferPktLen; - 3962 .loc 1 2230 0 - 3963 0026 1B4B ldr r3, .L224+4 - 3964 0028 1B88 ldrh r3, [r3] - 3965 002a 8B81 strh r3, [r1, #12] -2231:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2232:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** DBG_PRINTF( "\n\r*** seqTx= %d *****\n\r", UpLinkCounter ); -2233:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2234:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionTxConfig( LoRaMacRegion, &txConfig, &txPower, &TxTimeOnAir ); - 3966 .loc 1 2234 0 - 3967 002c 1A4E ldr r6, .L224+8 - 3968 002e 1B4B ldr r3, .L224+12 - 3969 0030 1878 ldrb r0, [r3] - 3970 .LVL380: - 3971 0032 3300 movs r3, r6 - 3972 0034 2A00 movs r2, r5 - 3973 0036 FFF7FEFF bl RegionTxConfig - 3974 .LVL381: -2235:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2236:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_ERROR; - 3975 .loc 1 2236 0 - 3976 003a 194A ldr r2, .L224+16 - 3977 003c 0121 movs r1, #1 - 3978 003e 5170 strb r1, [r2, #1] -2237:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_ERROR; - 3979 .loc 1 2237 0 - 3980 0040 184B ldr r3, .L224+20 - 3981 0042 5970 strb r1, [r3, #1] -2238:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Datarate = LoRaMacParams.ChannelsDatarate; - 3982 .loc 1 2238 0 - 3983 0044 6178 ldrb r1, [r4, #1] - 3984 0046 9970 strb r1, [r3, #2] -2239:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.TxPower = txPower; - 3985 .loc 1 2239 0 - 3986 0048 2978 ldrb r1, [r5] - 3987 004a D970 strb r1, [r3, #3] -2240:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2241:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Store the time on air -2242:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.TxTimeOnAir = TxTimeOnAir; - 3988 .loc 1 2242 0 - 3989 004c 3168 ldr r1, [r6] - 3990 004e 9960 str r1, [r3, #8] -2243:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.TxTimeOnAir = TxTimeOnAir; - 3991 .loc 1 2243 0 - 3992 0050 5160 str r1, [r2, #4] -2244:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2245:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Starts the MAC layer status check timer -2246:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &MacStateCheckTimer, MAC_STATE_CHECK_TIMEOUT ); - 3993 .loc 1 2246 0 - 3994 0052 FA21 movs r1, #250 - 3995 0054 144C ldr r4, .L224+24 - 3996 0056 8900 lsls r1, r1, #2 - 3997 0058 2000 movs r0, r4 - 3998 005a FFF7FEFF bl TimerSetValue - ARM GAS /tmp/ccrFaSdZ.s page 120 - - - 3999 .LVL382: -2247:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &MacStateCheckTimer ); - 4000 .loc 1 2247 0 - 4001 005e 2000 movs r0, r4 - 4002 0060 FFF7FEFF bl TimerStart - 4003 .LVL383: -2248:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2249:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsLoRaMacNetworkJoined == false ) - 4004 .loc 1 2249 0 - 4005 0064 114B ldr r3, .L224+28 - 4006 0066 1B78 ldrb r3, [r3] - 4007 0068 002B cmp r3, #0 - 4008 006a 03D1 bne .L223 -2250:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2251:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** JoinRequestTrials++; - 4009 .loc 1 2251 0 - 4010 006c 104A ldr r2, .L224+32 - 4011 006e 1378 ldrb r3, [r2] - 4012 0070 0133 adds r3, r3, #1 - 4013 0072 1370 strb r3, [r2] - 4014 .L223: -2252:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2253:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2254:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Send now -2255:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Send( LoRaMacBuffer, LoRaMacBufferPktLen ); - 4015 .loc 1 2255 0 - 4016 0074 0F4B ldr r3, .L224+36 - 4017 0076 1B6B ldr r3, [r3, #48] - 4018 0078 064A ldr r2, .L224+4 - 4019 007a 1178 ldrb r1, [r2] - 4020 007c 0E48 ldr r0, .L224+40 - 4021 007e 9847 blx r3 - 4022 .LVL384: -2256:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2257:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState |= LORAMAC_TX_RUNNING; - 4023 .loc 1 2257 0 - 4024 0080 0E4A ldr r2, .L224+44 - 4025 0082 0123 movs r3, #1 - 4026 0084 1168 ldr r1, [r2] - 4027 0086 0B43 orrs r3, r1 - 4028 0088 1360 str r3, [r2] -2258:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2259:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; -2260:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4029 .loc 1 2260 0 - 4030 008a 0020 movs r0, #0 - 4031 008c 06B0 add sp, sp, #24 - 4032 @ sp needed - 4033 008e 70BD pop {r4, r5, r6, pc} - 4034 .L225: - 4035 .align 2 - 4036 .L224: - 4037 0090 00000000 .word .LANCHOR14 - 4038 0094 00000000 .word .LANCHOR49 - 4039 0098 00000000 .word .LANCHOR53 - 4040 009c 00000000 .word .LANCHOR22 - 4041 00a0 00000000 .word .LANCHOR28 - ARM GAS /tmp/ccrFaSdZ.s page 121 - - - 4042 00a4 00000000 .word .LANCHOR34 - 4043 00a8 00000000 .word .LANCHOR27 - 4044 00ac 00000000 .word .LANCHOR0 - 4045 00b0 00000000 .word .LANCHOR54 - 4046 00b4 00000000 .word Radio - 4047 00b8 00000000 .word LoRaMacBuffer - 4048 00bc 00000000 .word .LANCHOR24 - 4049 .cfi_endproc - 4050 .LFE106: - 4052 .section .text.ScheduleTx,"ax",%progbits - 4053 .align 1 - 4054 .syntax unified - 4055 .code 16 - 4056 .thumb_func - 4057 .fpu softvfp - 4059 ScheduleTx: - 4060 .LFB102: -1910:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerTime_t dutyCycleTimeOff = 0; - 4061 .loc 1 1910 0 - 4062 .cfi_startproc - 4063 @ args = 0, pretend = 0, frame = 32 - 4064 @ frame_needed = 0, uses_anonymous_args = 0 - 4065 0000 F0B5 push {r4, r5, r6, r7, lr} - 4066 .LCFI23: - 4067 .cfi_def_cfa_offset 20 - 4068 .cfi_offset 4, -20 - 4069 .cfi_offset 5, -16 - 4070 .cfi_offset 6, -12 - 4071 .cfi_offset 7, -8 - 4072 .cfi_offset 14, -4 - 4073 0002 8BB0 sub sp, sp, #44 - 4074 .LCFI24: - 4075 .cfi_def_cfa_offset 64 -1911:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NextChanParams_t nextChan; - 4076 .loc 1 1911 0 - 4077 0004 0023 movs r3, #0 - 4078 0006 0993 str r3, [sp, #36] -1915:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4079 .loc 1 1915 0 - 4080 0008 584B ldr r3, .L237 - 4081 000a 1B78 ldrb r3, [r3] - 4082 000c FF2B cmp r3, #255 - 4083 000e 00D1 bne .LCB4064 - 4084 0010 A8E0 b .L234 @long jump - 4085 .LCB4064: -1919:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4086 .loc 1 1919 0 - 4087 0012 002B cmp r3, #0 - 4088 0014 02D1 bne .L228 -1921:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4089 .loc 1 1921 0 - 4090 0016 564B ldr r3, .L237+4 - 4091 0018 0022 movs r2, #0 - 4092 001a 1A60 str r2, [r3] - 4093 .L228: -1925:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4094 .loc 1 1925 0 - ARM GAS /tmp/ccrFaSdZ.s page 122 - - - 4095 001c 554B ldr r3, .L237+8 - 4096 001e 1B78 ldrb r3, [r3] - 4097 .LVL385: - 4098 .LBB79: - 4099 .LBB80: -1991:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.DutyCycleEnabled = DutyCycleOn; - 4100 .loc 1 1991 0 - 4101 0020 03AC add r4, sp, #12 - 4102 0022 554D ldr r5, .L237+12 - 4103 0024 2A78 ldrb r2, [r5] - 4104 0026 2270 strb r2, [r4] -1992:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.Channel = channel; - 4105 .loc 1 1992 0 - 4106 0028 544E ldr r6, .L237+16 - 4107 002a 3278 ldrb r2, [r6] - 4108 002c A270 strb r2, [r4, #2] -1993:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.ElapsedTime = TimerGetElapsedTime( LoRaMacInitializationTime ); - 4109 .loc 1 1993 0 - 4110 002e E370 strb r3, [r4, #3] -1994:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.TxTimeOnAir = TxTimeOnAir; - 4111 .loc 1 1994 0 - 4112 0030 534B ldr r3, .L237+20 - 4113 .LVL386: - 4114 0032 1868 ldr r0, [r3] - 4115 0034 FFF7FEFF bl TimerGetElapsedTime - 4116 .LVL387: - 4117 0038 6060 str r0, [r4, #4] -1995:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** calcBackOff.LastTxIsJoinRequest = LastTxIsJoinRequest; - 4118 .loc 1 1995 0 - 4119 003a 524F ldr r7, .L237+24 - 4120 003c 3B68 ldr r3, [r7] - 4121 003e A360 str r3, [r4, #8] -1996:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4122 .loc 1 1996 0 - 4123 0040 514B ldr r3, .L237+28 - 4124 0042 1B78 ldrb r3, [r3] - 4125 0044 6370 strb r3, [r4, #1] -1999:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4126 .loc 1 1999 0 - 4127 0046 514B ldr r3, .L237+32 - 4128 0048 1878 ldrb r0, [r3] - 4129 004a 2100 movs r1, r4 - 4130 004c FFF7FEFF bl RegionCalcBackOff - 4131 .LVL388: -2002:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4132 .loc 1 2002 0 - 4133 0050 4F4B ldr r3, .L237+36 - 4134 0052 1A88 ldrh r2, [r3] - 4135 0054 013A subs r2, r2, #1 - 4136 0056 3B68 ldr r3, [r7] - 4137 0058 5343 muls r3, r2 - 4138 005a 454A ldr r2, .L237+4 - 4139 005c 1168 ldr r1, [r2] - 4140 005e 8C46 mov ip, r1 - 4141 0060 6344 add r3, r3, ip - 4142 0062 1360 str r3, [r2] - 4143 .LBE80: - ARM GAS /tmp/ccrFaSdZ.s page 123 - - - 4144 .LBE79: -1927:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.Datarate = LoRaMacParams.ChannelsDatarate; - 4145 .loc 1 1927 0 - 4146 0064 06AA add r2, sp, #24 - 4147 0066 0693 str r3, [sp, #24] -1928:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.DutyCycleEnabled = DutyCycleOn; - 4148 .loc 1 1928 0 - 4149 0068 4A4B ldr r3, .L237+40 - 4150 006a 5B78 ldrb r3, [r3, #1] - 4151 006c 5BB2 sxtb r3, r3 - 4152 006e 1372 strb r3, [r2, #8] -1929:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.Joined = IsLoRaMacNetworkJoined; - 4153 .loc 1 1929 0 - 4154 0070 3378 ldrb r3, [r6] - 4155 0072 9372 strb r3, [r2, #10] -1930:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** nextChan.LastAggrTx = AggregatedLastTxDoneTime; - 4156 .loc 1 1930 0 - 4157 0074 2B78 ldrb r3, [r5] - 4158 0076 5372 strb r3, [r2, #9] -1931:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4159 .loc 1 1931 0 - 4160 0078 474B ldr r3, .L237+44 - 4161 007a 1B68 ldr r3, [r3] - 4162 007c 0793 str r3, [sp, #28] -1934:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4163 .loc 1 1934 0 - 4164 007e 06E0 b .L229 - 4165 .L230: -1937:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Update datarate in the function parameters - 4166 .loc 1 1937 0 - 4167 0080 464B ldr r3, .L237+48 - 4168 0082 5B78 ldrb r3, [r3, #1] - 4169 0084 5BB2 sxtb r3, r3 - 4170 0086 434A ldr r2, .L237+40 - 4171 0088 5370 strb r3, [r2, #1] -1939:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4172 .loc 1 1939 0 - 4173 008a 06AA add r2, sp, #24 - 4174 008c 1372 strb r3, [r2, #8] - 4175 .L229: -1934:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4176 .loc 1 1934 0 - 4177 008e 3F4B ldr r3, .L237+32 - 4178 0090 1878 ldrb r0, [r3] - 4179 0092 374B ldr r3, .L237+4 - 4180 0094 0093 str r3, [sp] - 4181 0096 09AB add r3, sp, #36 - 4182 0098 414A ldr r2, .L237+52 - 4183 009a 06A9 add r1, sp, #24 - 4184 009c FFF7FEFF bl RegionNextChannel - 4185 .LVL389: - 4186 00a0 0028 cmp r0, #0 - 4187 00a2 EDD0 beq .L230 -1943:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionApplyDrOffset( LoRaMacRegion, LoRaMacParams.DownlinkDwel - 4188 .loc 1 1943 0 - 4189 00a4 394E ldr r6, .L237+32 - 4190 00a6 3578 ldrb r5, [r6] - ARM GAS /tmp/ccrFaSdZ.s page 124 - - -1944:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MinRxSymbols, - 4191 .loc 1 1944 0 - 4192 00a8 3A4C ldr r4, .L237+40 - 4193 00aa 2123 movs r3, #33 - 4194 00ac E356 ldrsb r3, [r4, r3] - 4195 00ae 0122 movs r2, #1 - 4196 00b0 A256 ldrsb r2, [r4, r2] - 4197 00b2 2D21 movs r1, #45 - 4198 00b4 615C ldrb r1, [r4, r1] - 4199 00b6 2800 movs r0, r5 - 4200 00b8 FFF7FEFF bl RegionApplyDrOffset - 4201 .LVL390: -1943:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionApplyDrOffset( LoRaMacRegion, LoRaMacParams.DownlinkDwel - 4202 .loc 1 1943 0 - 4203 00bc 6368 ldr r3, [r4, #4] - 4204 00be 227A ldrb r2, [r4, #8] - 4205 00c0 41B2 sxtb r1, r0 - 4206 00c2 3848 ldr r0, .L237+56 - 4207 00c4 0090 str r0, [sp] - 4208 00c6 2800 movs r0, r5 - 4209 00c8 FFF7FEFF bl RegionComputeRxWindowParameters - 4210 .LVL391: -1949:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel.Datarate, - 4211 .loc 1 1949 0 - 4212 00cc 6368 ldr r3, [r4, #4] - 4213 00ce 227A ldrb r2, [r4, #8] - 4214 00d0 2821 movs r1, #40 - 4215 00d2 6156 ldrsb r1, [r4, r1] - 4216 00d4 3078 ldrb r0, [r6] - 4217 00d6 344C ldr r4, .L237+60 - 4218 00d8 0094 str r4, [sp] - 4219 00da FFF7FEFF bl RegionComputeRxWindowParameters - 4220 .LVL392: -1955:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4221 .loc 1 1955 0 - 4222 00de 264B ldr r3, .L237+12 - 4223 00e0 1B78 ldrb r3, [r3] - 4224 00e2 002B cmp r3, #0 - 4225 00e4 1FD1 bne .L231 -1957:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Delay = LoRaMacParams.JoinAcceptDelay2 + RxWindow2Config.WindowOffset; - 4226 .loc 1 1957 0 - 4227 00e6 2B4A ldr r2, .L237+40 - 4228 00e8 2E4B ldr r3, .L237+56 - 4229 00ea DB68 ldr r3, [r3, #12] - 4230 00ec 9169 ldr r1, [r2, #24] - 4231 00ee 8C46 mov ip, r1 - 4232 00f0 6344 add r3, r3, ip - 4233 00f2 2E49 ldr r1, .L237+64 - 4234 00f4 0B60 str r3, [r1] -1958:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4235 .loc 1 1958 0 - 4236 00f6 D369 ldr r3, [r2, #28] - 4237 00f8 2B4A ldr r2, .L237+60 - 4238 00fa D268 ldr r2, [r2, #12] - 4239 00fc 9B18 adds r3, r3, r2 - 4240 00fe 2C4A ldr r2, .L237+68 - 4241 0100 1360 str r3, [r2] - ARM GAS /tmp/ccrFaSdZ.s page 125 - - - 4242 .L232: -1971:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4243 .loc 1 1971 0 - 4244 0102 0999 ldr r1, [sp, #36] - 4245 0104 0029 cmp r1, #0 - 4246 0106 28D0 beq .L236 -1979:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &TxDelayedTimer, dutyCycleTimeOff ); - 4247 .loc 1 1979 0 - 4248 0108 2A4A ldr r2, .L237+72 - 4249 010a 1023 movs r3, #16 - 4250 010c 1068 ldr r0, [r2] - 4251 010e 0343 orrs r3, r0 - 4252 0110 1360 str r3, [r2] -1980:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &TxDelayedTimer ); - 4253 .loc 1 1980 0 - 4254 0112 294C ldr r4, .L237+76 - 4255 0114 2000 movs r0, r4 - 4256 0116 FFF7FEFF bl TimerSetValue - 4257 .LVL393: -1981:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4258 .loc 1 1981 0 - 4259 011a 2000 movs r0, r4 - 4260 011c FFF7FEFF bl TimerStart - 4261 .LVL394: -1983:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4262 .loc 1 1983 0 - 4263 0120 0020 movs r0, #0 - 4264 .L227: -1985:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4265 .loc 1 1985 0 - 4266 0122 0BB0 add sp, sp, #44 - 4267 @ sp needed - 4268 0124 F0BD pop {r4, r5, r6, r7, pc} - 4269 .L231: -1962:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4270 .loc 1 1962 0 - 4271 0126 254B ldr r3, .L237+80 - 4272 0128 1A78 ldrb r2, [r3] - 4273 012a 1A4B ldr r3, .L237+40 - 4274 012c 0121 movs r1, #1 - 4275 012e 5956 ldrsb r1, [r3, r1] - 4276 0130 234B ldr r3, .L237+84 - 4277 0132 1878 ldrb r0, [r3] - 4278 0134 FFF7FEFF bl ValidatePayloadLength - 4279 .LVL395: - 4280 0138 0028 cmp r0, #0 - 4281 013a 15D0 beq .L235 -1966:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Delay = LoRaMacParams.ReceiveDelay2 + RxWindow2Config.WindowOffset; - 4282 .loc 1 1966 0 - 4283 013c 154A ldr r2, .L237+40 - 4284 013e 194B ldr r3, .L237+56 - 4285 0140 DB68 ldr r3, [r3, #12] - 4286 0142 1169 ldr r1, [r2, #16] - 4287 0144 8C46 mov ip, r1 - 4288 0146 6344 add r3, r3, ip - 4289 0148 1849 ldr r1, .L237+64 - 4290 014a 0B60 str r3, [r1] - ARM GAS /tmp/ccrFaSdZ.s page 126 - - -1967:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4291 .loc 1 1967 0 - 4292 014c 5369 ldr r3, [r2, #20] - 4293 014e 164A ldr r2, .L237+60 - 4294 0150 D268 ldr r2, [r2, #12] - 4295 0152 9B18 adds r3, r3, r2 - 4296 0154 164A ldr r2, .L237+68 - 4297 0156 1360 str r3, [r2] - 4298 0158 D3E7 b .L232 - 4299 .L236: -1974:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4300 .loc 1 1974 0 - 4301 015a 114B ldr r3, .L237+52 - 4302 015c 1878 ldrb r0, [r3] - 4303 015e FFF7FEFF bl SendFrameOnChannel - 4304 .LVL396: - 4305 0162 DEE7 b .L227 - 4306 .L234: -1917:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4307 .loc 1 1917 0 - 4308 0164 0920 movs r0, #9 - 4309 0166 DCE7 b .L227 - 4310 .L235: -1964:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4311 .loc 1 1964 0 - 4312 0168 0820 movs r0, #8 - 4313 016a DAE7 b .L227 - 4314 .L238: - 4315 .align 2 - 4316 .L237: - 4317 016c 00000000 .word .LANCHOR8 - 4318 0170 00000000 .word .LANCHOR55 - 4319 0174 00000000 .word .LANCHOR20 - 4320 0178 00000000 .word .LANCHOR0 - 4321 017c 00000000 .word .LANCHOR56 - 4322 0180 00000000 .word .LANCHOR57 - 4323 0184 00000000 .word .LANCHOR53 - 4324 0188 00000000 .word .LANCHOR47 - 4325 018c 00000000 .word .LANCHOR22 - 4326 0190 00000000 .word .LANCHOR9 - 4327 0194 00000000 .word .LANCHOR14 - 4328 0198 00000000 .word .LANCHOR43 - 4329 019c 00000000 .word .LANCHOR13 - 4330 01a0 00000000 .word .LANCHOR19 - 4331 01a4 00000000 .word .LANCHOR48 - 4332 01a8 00000000 .word .LANCHOR42 - 4333 01ac 00000000 .word .LANCHOR45 - 4334 01b0 00000000 .word .LANCHOR44 - 4335 01b4 00000000 .word .LANCHOR24 - 4336 01b8 00000000 .word .LANCHOR58 - 4337 01bc 00000000 .word .LANCHOR10 - 4338 01c0 00000000 .word .LANCHOR50 - 4339 .cfi_endproc - 4340 .LFE102: - 4342 .section .text.Send,"ax",%progbits - 4343 .align 1 - 4344 .global Send - ARM GAS /tmp/ccrFaSdZ.s page 127 - - - 4345 .syntax unified - 4346 .code 16 - 4347 .thumb_func - 4348 .fpu softvfp - 4350 Send: - 4351 .LFB101: -1879:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFrameCtrl_t fCtrl; - 4352 .loc 1 1879 0 - 4353 .cfi_startproc - 4354 @ args = 0, pretend = 0, frame = 8 - 4355 @ frame_needed = 0, uses_anonymous_args = 0 - 4356 .LVL397: - 4357 0000 30B5 push {r4, r5, lr} - 4358 .LCFI25: - 4359 .cfi_def_cfa_offset 12 - 4360 .cfi_offset 4, -12 - 4361 .cfi_offset 5, -8 - 4362 .cfi_offset 14, -4 - 4363 0002 85B0 sub sp, sp, #20 - 4364 .LCFI26: - 4365 .cfi_def_cfa_offset 32 - 4366 0004 0D00 movs r5, r1 - 4367 .LVL398: -1883:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Bits.FOptsLen = 0; - 4368 .loc 1 1883 0 - 4369 0006 03A9 add r1, sp, #12 - 4370 .LVL399: -1888:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4371 .loc 1 1888 0 - 4372 0008 0B4C ldr r4, .L242 - 4373 000a 2478 ldrb r4, [r4] - 4374 000c E401 lsls r4, r4, #7 - 4375 000e 0C70 strb r4, [r1] -1891:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4376 .loc 1 1891 0 - 4377 0010 0093 str r3, [sp] - 4378 0012 1300 movs r3, r2 - 4379 .LVL400: - 4380 0014 2A00 movs r2, r5 - 4381 .LVL401: - 4382 0016 FFF7FEFF bl PrepareFrame - 4383 .LVL402: -1894:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4384 .loc 1 1894 0 - 4385 001a 0028 cmp r0, #0 - 4386 001c 01D0 beq .L241 - 4387 .LVL403: - 4388 .L240: -1907:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4389 .loc 1 1907 0 - 4390 001e 05B0 add sp, sp, #20 - 4391 @ sp needed - 4392 0020 30BD pop {r4, r5, pc} - 4393 .LVL404: - 4394 .L241: -1900:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; - 4395 .loc 1 1900 0 - ARM GAS /tmp/ccrFaSdZ.s page 128 - - - 4396 0022 064B ldr r3, .L242+4 - 4397 0024 0022 movs r2, #0 - 4398 0026 5A71 strb r2, [r3, #5] -1901:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.UpLinkCounter = UpLinkCounter; - 4399 .loc 1 1901 0 - 4400 0028 1A71 strb r2, [r3, #4] -1902:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4401 .loc 1 1902 0 - 4402 002a 054A ldr r2, .L242+8 - 4403 002c 1268 ldr r2, [r2] - 4404 002e DA60 str r2, [r3, #12] -1904:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4405 .loc 1 1904 0 - 4406 0030 FFF7FEFF bl ScheduleTx - 4407 .LVL405: -1906:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4408 .loc 1 1906 0 - 4409 0034 F3E7 b .L240 - 4410 .L243: - 4411 0036 C046 .align 2 - 4412 .L242: - 4413 0038 00000000 .word .LANCHOR29 - 4414 003c 00000000 .word .LANCHOR34 - 4415 0040 00000000 .word .LANCHOR1 - 4416 .cfi_endproc - 4417 .LFE101: - 4419 .section .text.OnTxDelayedTimerEvent,"ax",%progbits - 4420 .align 1 - 4421 .syntax unified - 4422 .code 16 - 4423 .thumb_func - 4424 .fpu softvfp - 4426 OnTxDelayedTimerEvent: - 4427 .LFB92: -1414:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacHeader_t macHdr; - 4428 .loc 1 1414 0 - 4429 .cfi_startproc - 4430 @ args = 0, pretend = 0, frame = 16 - 4431 @ frame_needed = 0, uses_anonymous_args = 0 - 4432 0000 00B5 push {lr} - 4433 .LCFI27: - 4434 .cfi_def_cfa_offset 4 - 4435 .cfi_offset 14, -4 - 4436 0002 87B0 sub sp, sp, #28 - 4437 .LCFI28: - 4438 .cfi_def_cfa_offset 32 -1419:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_DELAYED; - 4439 .loc 1 1419 0 - 4440 0004 1748 ldr r0, .L247 - 4441 0006 FFF7FEFF bl TimerStop - 4442 .LVL406: -1420:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4443 .loc 1 1420 0 - 4444 000a 174A ldr r2, .L247+4 - 4445 000c 1023 movs r3, #16 - 4446 000e 1168 ldr r1, [r2] - 4447 0010 9943 bics r1, r3 - ARM GAS /tmp/ccrFaSdZ.s page 129 - - - 4448 0012 1160 str r1, [r2] -1422:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4449 .loc 1 1422 0 - 4450 0014 154B ldr r3, .L247+8 - 4451 0016 1B78 ldrb r3, [r3] - 4452 0018 1B07 lsls r3, r3, #28 - 4453 001a 03D5 bpl .L245 -1422:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4454 .loc 1 1422 0 is_stmt 0 discriminator 1 - 4455 001c 144B ldr r3, .L247+12 - 4456 001e 1B78 ldrb r3, [r3] - 4457 0020 002B cmp r3, #0 - 4458 0022 03D0 beq .L246 - 4459 .L245: -1441:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4460 .loc 1 1441 0 is_stmt 1 - 4461 0024 FFF7FEFF bl ScheduleTx - 4462 .LVL407: -1442:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4463 .loc 1 1442 0 - 4464 0028 07B0 add sp, sp, #28 - 4465 @ sp needed - 4466 002a 00BD pop {pc} - 4467 .L246: -1424:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4468 .loc 1 1424 0 - 4469 002c FFF7FEFF bl ResetMacParameters - 4470 .LVL408: -1426:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = RegionAlternateDr( LoRaMacRegion, &altDr ); - 4471 .loc 1 1426 0 - 4472 0030 104B ldr r3, .L247+16 - 4473 0032 1B78 ldrb r3, [r3] - 4474 0034 0133 adds r3, r3, #1 - 4475 0036 03A9 add r1, sp, #12 - 4476 0038 0B80 strh r3, [r1] -1427:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4477 .loc 1 1427 0 - 4478 003a 0F4B ldr r3, .L247+20 - 4479 003c 1878 ldrb r0, [r3] - 4480 003e FFF7FEFF bl RegionAlternateDr - 4481 .LVL409: - 4482 0042 0E4B ldr r3, .L247+24 - 4483 0044 5870 strb r0, [r3, #1] -1429:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Bits.MType = FRAME_TYPE_JOIN_REQ; - 4484 .loc 1 1429 0 - 4485 0046 05A8 add r0, sp, #20 -1430:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4486 .loc 1 1430 0 - 4487 0048 0023 movs r3, #0 - 4488 004a 0370 strb r3, [r0] -1432:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fCtrl.Bits.Adr = AdrCtrlOn; - 4489 .loc 1 1432 0 - 4490 004c 04A9 add r1, sp, #16 -1433:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4491 .loc 1 1433 0 - 4492 004e 0C4B ldr r3, .L247+28 - 4493 0050 1B78 ldrb r3, [r3] - ARM GAS /tmp/ccrFaSdZ.s page 130 - - - 4494 0052 DB01 lsls r3, r3, #7 - 4495 0054 0B70 strb r3, [r1] -1438:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4496 .loc 1 1438 0 - 4497 0056 0023 movs r3, #0 - 4498 0058 0093 str r3, [sp] - 4499 005a 0022 movs r2, #0 - 4500 005c FFF7FEFF bl PrepareFrame - 4501 .LVL410: - 4502 0060 E0E7 b .L245 - 4503 .L248: - 4504 0062 C046 .align 2 - 4505 .L247: - 4506 0064 00000000 .word .LANCHOR58 - 4507 0068 00000000 .word .LANCHOR24 - 4508 006c 00000000 .word .LANCHOR26 - 4509 0070 00000000 .word .LANCHOR28 - 4510 0074 00000000 .word .LANCHOR54 - 4511 0078 00000000 .word .LANCHOR22 - 4512 007c 00000000 .word .LANCHOR14 - 4513 0080 00000000 .word .LANCHOR29 - 4514 .cfi_endproc - 4515 .LFE92: - 4517 .section .text.OnMacStateCheckTimerEvent,"ax",%progbits - 4518 .align 1 - 4519 .syntax unified - 4520 .code 16 - 4521 .thumb_func - 4522 .fpu softvfp - 4524 OnMacStateCheckTimerEvent: - 4525 .LFB91: -1211:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 4526 .loc 1 1211 0 - 4527 .cfi_startproc - 4528 @ args = 0, pretend = 0, frame = 8 - 4529 @ frame_needed = 0, uses_anonymous_args = 0 - 4530 0000 10B5 push {r4, lr} - 4531 .LCFI29: - 4532 .cfi_def_cfa_offset 8 - 4533 .cfi_offset 4, -8 - 4534 .cfi_offset 14, -4 - 4535 0002 82B0 sub sp, sp, #8 - 4536 .LCFI30: - 4537 .cfi_def_cfa_offset 16 - 4538 .LVL411: -1216:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4539 .loc 1 1216 0 - 4540 0004 B748 ldr r0, .L280 - 4541 0006 FFF7FEFF bl TimerStop - 4542 .LVL412: -1218:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4543 .loc 1 1218 0 - 4544 000a B74B ldr r3, .L280+4 - 4545 000c 1B78 ldrb r3, [r3] - 4546 000e DA06 lsls r2, r3, #27 - 4547 0010 00D4 bmi .LCB4513 - 4548 0012 12E1 b .L250 @long jump - ARM GAS /tmp/ccrFaSdZ.s page 131 - - - 4549 .LCB4513: -1220:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4550 .loc 1 1220 0 - 4551 0014 B54A ldr r2, .L280+8 - 4552 0016 1268 ldr r2, [r2] - 4553 0018 5106 lsls r1, r2, #25 - 4554 001a 05D5 bpl .L251 -1222:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; - 4555 .loc 1 1222 0 - 4556 001c 4021 movs r1, #64 - 4557 001e 8A43 bics r2, r1 -1223:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4558 .loc 1 1223 0 - 4559 0020 3F39 subs r1, r1, #63 - 4560 0022 8A43 bics r2, r1 - 4561 0024 B149 ldr r1, .L280+8 - 4562 0026 0A60 str r2, [r1] - 4563 .L251: -1226:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4564 .loc 1 1226 0 - 4565 0028 0922 movs r2, #9 - 4566 002a 1A40 ands r2, r3 - 4567 002c 19D0 beq .L276 -1228:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( MlmeConfirm.Status == LORAMAC_EVENT_INFO_STATUS_TX_TIMEOUT ) ) - 4568 .loc 1 1228 0 - 4569 002e B049 ldr r1, .L280+12 - 4570 0030 4978 ldrb r1, [r1, #1] - 4571 0032 0229 cmp r1, #2 - 4572 0034 05D0 beq .L253 -1229:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4573 .loc 1 1229 0 discriminator 1 - 4574 0036 AF49 ldr r1, .L280+16 - 4575 0038 4978 ldrb r1, [r1, #1] -1228:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( MlmeConfirm.Status == LORAMAC_EVENT_INFO_STATUS_TX_TIMEOUT ) ) - 4576 .loc 1 1228 0 discriminator 1 - 4577 003a 0229 cmp r1, #2 - 4578 003c 01D0 beq .L253 -1214:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4579 .loc 1 1214 0 - 4580 003e 0020 movs r0, #0 - 4581 0040 10E0 b .L252 - 4582 .L253: -1232:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; - 4583 .loc 1 1232 0 - 4584 0042 AA48 ldr r0, .L280+8 - 4585 0044 0121 movs r1, #1 - 4586 0046 0468 ldr r4, [r0] - 4587 0048 8C43 bics r4, r1 - 4588 004a 0460 str r4, [r0] -1233:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.NbRetries = AckTimeoutRetriesCounter; - 4589 .loc 1 1233 0 - 4590 004c 0020 movs r0, #0 - 4591 004e AA49 ldr r1, .L280+20 - 4592 0050 0870 strb r0, [r1] -1234:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; - 4593 .loc 1 1234 0 - 4594 0052 A749 ldr r1, .L280+12 - ARM GAS /tmp/ccrFaSdZ.s page 132 - - - 4595 0054 A94C ldr r4, .L280+24 - 4596 0056 2478 ldrb r4, [r4] - 4597 0058 4C71 strb r4, [r1, #5] -1235:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.TxTimeOnAir = 0; - 4598 .loc 1 1235 0 - 4599 005a 0871 strb r0, [r1, #4] -1236:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txTimeout = true; - 4600 .loc 1 1236 0 - 4601 005c 8860 str r0, [r1, #8] - 4602 .LVL413: -1237:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4603 .loc 1 1237 0 - 4604 005e 0130 adds r0, r0, #1 - 4605 0060 00E0 b .L252 - 4606 .LVL414: - 4607 .L276: -1214:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4608 .loc 1 1214 0 - 4609 0062 0020 movs r0, #0 - 4610 .LVL415: - 4611 .L252: -1241:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4612 .loc 1 1241 0 - 4613 0064 A649 ldr r1, .L280+28 - 4614 0066 0978 ldrb r1, [r1] - 4615 0068 0029 cmp r1, #0 - 4616 006a 4ED1 bne .L254 -1241:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4617 .loc 1 1241 0 is_stmt 0 discriminator 1 - 4618 006c 0028 cmp r0, #0 - 4619 006e 4CD1 bne .L254 -1243:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4620 .loc 1 1243 0 is_stmt 1 - 4621 0070 002A cmp r2, #0 - 4622 0072 4AD0 beq .L254 -1245:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Procedure for the join request - 4623 .loc 1 1245 0 - 4624 0074 1A07 lsls r2, r3, #28 - 4625 0076 26D5 bpl .L255 -1245:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Procedure for the join request - 4626 .loc 1 1245 0 is_stmt 0 discriminator 1 - 4627 0078 9E4A ldr r2, .L280+16 - 4628 007a 1278 ldrb r2, [r2] - 4629 007c 002A cmp r2, #0 - 4630 007e 22D1 bne .L255 -1247:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4631 .loc 1 1247 0 is_stmt 1 - 4632 0080 A04B ldr r3, .L280+32 - 4633 0082 1A78 ldrb r2, [r3] - 4634 0084 9B4B ldr r3, .L280+16 - 4635 0086 9A72 strb r2, [r3, #10] -1249:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Node joined successfully - 4636 .loc 1 1249 0 - 4637 0088 5B78 ldrb r3, [r3, #1] - 4638 008a 002B cmp r3, #0 - 4639 008c 09D1 bne .L256 -1251:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChannelsNbRepCounter = 0; - ARM GAS /tmp/ccrFaSdZ.s page 133 - - - 4640 .loc 1 1251 0 - 4641 008e 9E4A ldr r2, .L280+36 - 4642 0090 1360 str r3, [r2] -1252:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; - 4643 .loc 1 1252 0 - 4644 0092 9E4A ldr r2, .L280+40 - 4645 0094 1370 strb r3, [r2] -1253:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4646 .loc 1 1253 0 - 4647 0096 954A ldr r2, .L280+8 - 4648 0098 0133 adds r3, r3, #1 - 4649 009a 1168 ldr r1, [r2] - 4650 009c 9943 bics r1, r3 - 4651 009e 1160 str r1, [r2] - 4652 00a0 33E0 b .L254 - 4653 .L256: -1257:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4654 .loc 1 1257 0 - 4655 00a2 9B4B ldr r3, .L280+44 - 4656 00a4 1B78 ldrb r3, [r3] - 4657 00a6 9A42 cmp r2, r3 - 4658 00a8 05D3 bcc .L257 -1259:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4659 .loc 1 1259 0 - 4660 00aa 904A ldr r2, .L280+8 - 4661 00ac 0123 movs r3, #1 - 4662 00ae 1168 ldr r1, [r2] - 4663 00b0 9943 bics r1, r3 - 4664 00b2 1160 str r1, [r2] - 4665 00b4 29E0 b .L254 - 4666 .L257: -1263:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Sends the same frame again - 4667 .loc 1 1263 0 - 4668 00b6 8C4A ldr r2, .L280+4 - 4669 00b8 1378 ldrb r3, [r2] - 4670 00ba 1021 movs r1, #16 - 4671 00bc 8B43 bics r3, r1 - 4672 00be 1370 strb r3, [r2] -1265:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4673 .loc 1 1265 0 - 4674 00c0 FFF7FEFF bl OnTxDelayedTimerEvent - 4675 .LVL416: - 4676 00c4 21E0 b .L254 - 4677 .LVL417: - 4678 .L255: -1271:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4679 .loc 1 1271 0 - 4680 00c6 9349 ldr r1, .L280+48 - 4681 00c8 2022 movs r2, #32 - 4682 00ca 895C ldrb r1, [r1, r2] - 4683 00cc 8F4A ldr r2, .L280+40 - 4684 00ce 1278 ldrb r2, [r2] - 4685 00d0 9142 cmp r1, r2 - 4686 00d2 01D9 bls .L258 -1271:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4687 .loc 1 1271 0 is_stmt 0 discriminator 1 - 4688 00d4 9A07 lsls r2, r3, #30 - ARM GAS /tmp/ccrFaSdZ.s page 134 - - - 4689 00d6 5FD5 bpl .L259 - 4690 .L258: -1273:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { // Maximum repetitions without downlink. Reset MacCommandsBufferIndex. - 4691 .loc 1 1273 0 is_stmt 1 - 4692 00d8 9B07 lsls r3, r3, #30 - 4693 00da 06D4 bmi .L260 -1276:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AdrAckCounter++; - 4694 .loc 1 1276 0 - 4695 00dc 864B ldr r3, .L280+20 - 4696 00de 0022 movs r2, #0 - 4697 00e0 1A70 strb r2, [r3] -1277:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4698 .loc 1 1277 0 - 4699 00e2 8D4A ldr r2, .L280+52 - 4700 00e4 1368 ldr r3, [r2] - 4701 00e6 0133 adds r3, r3, #1 - 4702 00e8 1360 str r3, [r2] - 4703 .L260: -1280:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4704 .loc 1 1280 0 - 4705 00ea 884B ldr r3, .L280+40 - 4706 00ec 0022 movs r2, #0 - 4707 00ee 1A70 strb r2, [r3] -1282:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4708 .loc 1 1282 0 - 4709 00f0 8A4B ldr r3, .L280+56 - 4710 00f2 1B78 ldrb r3, [r3] - 4711 00f4 002B cmp r3, #0 - 4712 00f6 03D1 bne .L261 -1284:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4713 .loc 1 1284 0 - 4714 00f8 834A ldr r2, .L280+36 - 4715 00fa 1368 ldr r3, [r2] - 4716 00fc 0133 adds r3, r3, #1 - 4717 00fe 1360 str r3, [r2] - 4718 .L261: -1287:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4719 .loc 1 1287 0 - 4720 0100 7A4A ldr r2, .L280+8 - 4721 0102 0123 movs r3, #1 - 4722 0104 1168 ldr r1, [r2] - 4723 0106 9943 bics r1, r3 - 4724 0108 1160 str r1, [r2] - 4725 .LVL418: - 4726 .L254: -1299:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Procedure if we received a frame - 4727 .loc 1 1299 0 - 4728 010a 774B ldr r3, .L280+4 - 4729 010c 1B78 ldrb r3, [r3] - 4730 010e 9B07 lsls r3, r3, #30 - 4731 0110 1FD5 bpl .L262 -1301:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4732 .loc 1 1301 0 - 4733 0112 774B ldr r3, .L280+12 - 4734 0114 1B79 ldrb r3, [r3, #4] - 4735 0116 002B cmp r3, #0 - 4736 0118 05D1 bne .L263 - ARM GAS /tmp/ccrFaSdZ.s page 135 - - -1301:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4737 .loc 1 1301 0 is_stmt 0 discriminator 1 - 4738 011a 784B ldr r3, .L280+24 - 4739 011c 1A78 ldrb r2, [r3] - 4740 011e 804B ldr r3, .L280+60 - 4741 0120 1B78 ldrb r3, [r3] - 4742 0122 9A42 cmp r2, r3 - 4743 0124 15D9 bls .L262 - 4744 .L263: -1303:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; - 4745 .loc 1 1303 0 is_stmt 1 - 4746 0126 0023 movs r3, #0 - 4747 0128 7E4A ldr r2, .L280+64 - 4748 012a 1370 strb r3, [r2] -1304:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsUpLinkCounterFixed == false ) - 4749 .loc 1 1304 0 - 4750 012c 744A ldr r2, .L280+28 - 4751 012e 1370 strb r3, [r2] -1305:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4752 .loc 1 1305 0 - 4753 0130 7A4B ldr r3, .L280+56 - 4754 0132 1B78 ldrb r3, [r3] - 4755 0134 002B cmp r3, #0 - 4756 0136 03D1 bne .L264 -1307:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4757 .loc 1 1307 0 - 4758 0138 734A ldr r2, .L280+36 - 4759 013a 1368 ldr r3, [r2] - 4760 013c 0133 adds r3, r3, #1 - 4761 013e 1360 str r3, [r2] - 4762 .L264: -1309:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4763 .loc 1 1309 0 - 4764 0140 6E4B ldr r3, .L280+24 - 4765 0142 1A78 ldrb r2, [r3] - 4766 0144 6A4B ldr r3, .L280+12 - 4767 0146 5A71 strb r2, [r3, #5] -1311:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4768 .loc 1 1311 0 - 4769 0148 684A ldr r2, .L280+8 - 4770 014a 0123 movs r3, #1 - 4771 014c 1168 ldr r1, [r2] - 4772 014e 9943 bics r1, r3 - 4773 0150 1160 str r1, [r2] - 4774 .L262: -1315:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Retransmissions procedure for confirmed uplinks - 4775 .loc 1 1315 0 - 4776 0152 744B ldr r3, .L280+64 - 4777 0154 1B78 ldrb r3, [r3] - 4778 0156 002B cmp r3, #0 - 4779 0158 6FD0 beq .L250 -1315:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Retransmissions procedure for confirmed uplinks - 4780 .loc 1 1315 0 is_stmt 0 discriminator 1 - 4781 015a 644B ldr r3, .L280+8 - 4782 015c 1B68 ldr r3, [r3] - 4783 015e DB06 lsls r3, r3, #27 - 4784 0160 6BD4 bmi .L250 - ARM GAS /tmp/ccrFaSdZ.s page 136 - - -1317:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( AckTimeoutRetriesCounter < AckTimeoutRetries ) && ( AckTimeoutRetriesCounter <= M - 4785 .loc 1 1317 0 is_stmt 1 - 4786 0162 704B ldr r3, .L280+64 - 4787 0164 0022 movs r2, #0 - 4788 0166 1A70 strb r2, [r3] -1318:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4789 .loc 1 1318 0 - 4790 0168 644B ldr r3, .L280+24 - 4791 016a 1B78 ldrb r3, [r3] - 4792 016c 6C4A ldr r2, .L280+60 - 4793 016e 1278 ldrb r2, [r2] - 4794 0170 9342 cmp r3, r2 - 4795 0172 46D2 bcs .L265 -1318:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4796 .loc 1 1318 0 is_stmt 0 discriminator 1 - 4797 0174 082B cmp r3, #8 - 4798 0176 44D8 bhi .L265 -1320:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4799 .loc 1 1320 0 is_stmt 1 - 4800 0178 0133 adds r3, r3, #1 - 4801 017a DBB2 uxtb r3, r3 - 4802 017c 5F4A ldr r2, .L280+24 - 4803 017e 1370 strb r3, [r2] -1322:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4804 .loc 1 1322 0 - 4805 0180 DB07 lsls r3, r3, #31 - 4806 0182 11D4 bmi .L278 - 4807 .LVL419: - 4808 .L266: -1331:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4809 .loc 1 1331 0 - 4810 0184 FFF7FEFF bl ScheduleTx - 4811 .LVL420: - 4812 0188 0028 cmp r0, #0 - 4813 018a 1DD1 bne .L267 -1333:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4814 .loc 1 1333 0 - 4815 018c 564A ldr r2, .L280+4 - 4816 018e 1378 ldrb r3, [r2] - 4817 0190 1021 movs r1, #16 - 4818 0192 8B43 bics r3, r1 - 4819 0194 1370 strb r3, [r2] - 4820 0196 50E0 b .L250 - 4821 .LVL421: - 4822 .L259: -1291:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Sends the same frame again - 4823 .loc 1 1291 0 - 4824 0198 534A ldr r2, .L280+4 - 4825 019a 1378 ldrb r3, [r2] - 4826 019c 1021 movs r1, #16 - 4827 019e 8B43 bics r3, r1 - 4828 01a0 1370 strb r3, [r2] -1293:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4829 .loc 1 1293 0 - 4830 01a2 FFF7FEFF bl OnTxDelayedTimerEvent - 4831 .LVL422: - 4832 01a6 B0E7 b .L254 - ARM GAS /tmp/ccrFaSdZ.s page 137 - - - 4833 .L278: -1324:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; - 4834 .loc 1 1324 0 - 4835 01a8 01A9 add r1, sp, #4 - 4836 01aa 2023 movs r3, #32 - 4837 01ac 0B70 strb r3, [r1] -1325:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Datarate = LoRaMacParams.ChannelsDatarate; - 4838 .loc 1 1325 0 - 4839 01ae 594C ldr r4, .L280+48 - 4840 01b0 0C33 adds r3, r3, #12 - 4841 01b2 E35C ldrb r3, [r4, r3] - 4842 01b4 8B70 strb r3, [r1, #2] -1326:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 4843 .loc 1 1326 0 - 4844 01b6 0123 movs r3, #1 - 4845 01b8 E356 ldrsb r3, [r4, r3] - 4846 01ba 4B70 strb r3, [r1, #1] -1327:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = phyParam.Value; - 4847 .loc 1 1327 0 - 4848 01bc 5A4B ldr r3, .L280+68 - 4849 01be 1878 ldrb r0, [r3] - 4850 01c0 FFF7FEFF bl RegionGetPhyParam - 4851 .LVL423: -1328:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4852 .loc 1 1328 0 - 4853 01c4 6070 strb r0, [r4, #1] - 4854 01c6 DDE7 b .L266 - 4855 .L267: -1338:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4856 .loc 1 1338 0 - 4857 01c8 494B ldr r3, .L280+12 - 4858 01ca 0922 movs r2, #9 - 4859 01cc 5A70 strb r2, [r3, #1] -1340:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState &= ~LORAMAC_TX_RUNNING; - 4860 .loc 1 1340 0 - 4861 01ce 0022 movs r2, #0 - 4862 01d0 4949 ldr r1, .L280+20 - 4863 01d2 0A70 strb r2, [r1] -1341:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; - 4864 .loc 1 1341 0 - 4865 01d4 4548 ldr r0, .L280+8 - 4866 01d6 0121 movs r1, #1 - 4867 01d8 0468 ldr r4, [r0] - 4868 01da 8C43 bics r4, r1 - 4869 01dc 0460 str r4, [r0] -1342:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; - 4870 .loc 1 1342 0 - 4871 01de 4849 ldr r1, .L280+28 - 4872 01e0 0A70 strb r2, [r1] -1343:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.NbRetries = AckTimeoutRetriesCounter; - 4873 .loc 1 1343 0 - 4874 01e2 1A71 strb r2, [r3, #4] -1344:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Datarate = LoRaMacParams.ChannelsDatarate; - 4875 .loc 1 1344 0 - 4876 01e4 454A ldr r2, .L280+24 - 4877 01e6 1278 ldrb r2, [r2] - 4878 01e8 5A71 strb r2, [r3, #5] - ARM GAS /tmp/ccrFaSdZ.s page 138 - - -1345:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsUpLinkCounterFixed == false ) - 4879 .loc 1 1345 0 - 4880 01ea 4A4A ldr r2, .L280+48 - 4881 01ec 5278 ldrb r2, [r2, #1] - 4882 01ee 9A70 strb r2, [r3, #2] -1346:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4883 .loc 1 1346 0 - 4884 01f0 4A4B ldr r3, .L280+56 - 4885 01f2 1B78 ldrb r3, [r3] - 4886 01f4 002B cmp r3, #0 - 4887 01f6 20D1 bne .L250 -1348:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4888 .loc 1 1348 0 - 4889 01f8 434A ldr r2, .L280+36 - 4890 01fa 1368 ldr r3, [r2] - 4891 01fc 0133 adds r3, r3, #1 - 4892 01fe 1360 str r3, [r2] - 4893 0200 1BE0 b .L250 - 4894 .L265: -1354:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4895 .loc 1 1354 0 - 4896 0202 494B ldr r3, .L280+68 - 4897 0204 1878 ldrb r0, [r3] - 4898 0206 0121 movs r1, #1 - 4899 0208 FFF7FEFF bl RegionInitDefaults - 4900 .LVL424: -1356:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 4901 .loc 1 1356 0 - 4902 020c 374A ldr r2, .L280+8 - 4903 020e 0123 movs r3, #1 - 4904 0210 1168 ldr r1, [r2] - 4905 0212 9943 bics r1, r3 - 4906 0214 1160 str r1, [r2] -1358:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; - 4907 .loc 1 1358 0 - 4908 0216 0023 movs r3, #0 - 4909 0218 374A ldr r2, .L280+20 - 4910 021a 1370 strb r3, [r2] -1359:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.AckReceived = false; - 4911 .loc 1 1359 0 - 4912 021c 384A ldr r2, .L280+28 - 4913 021e 1370 strb r3, [r2] -1360:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.NbRetries = AckTimeoutRetriesCounter; - 4914 .loc 1 1360 0 - 4915 0220 334A ldr r2, .L280+12 - 4916 0222 1371 strb r3, [r2, #4] -1361:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( IsUpLinkCounterFixed == false ) - 4917 .loc 1 1361 0 - 4918 0224 354B ldr r3, .L280+24 - 4919 0226 1B78 ldrb r3, [r3] - 4920 0228 5371 strb r3, [r2, #5] -1362:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4921 .loc 1 1362 0 - 4922 022a 3C4B ldr r3, .L280+56 - 4923 022c 1B78 ldrb r3, [r3] - 4924 022e 002B cmp r3, #0 - 4925 0230 03D1 bne .L250 - ARM GAS /tmp/ccrFaSdZ.s page 139 - - -1364:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4926 .loc 1 1364 0 - 4927 0232 354A ldr r2, .L280+36 - 4928 0234 1368 ldr r3, [r2] - 4929 0236 0133 adds r3, r3, #1 - 4930 0238 1360 str r3, [r2] - 4931 .L250: -1370:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4932 .loc 1 1370 0 - 4933 023a 2C4B ldr r3, .L280+8 - 4934 023c 1B68 ldr r3, [r3] - 4935 023e 9A07 lsls r2, r3, #30 - 4936 0240 03D5 bpl .L268 -1372:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4937 .loc 1 1372 0 - 4938 0242 0222 movs r2, #2 - 4939 0244 9343 bics r3, r2 - 4940 0246 294A ldr r2, .L280+8 - 4941 0248 1360 str r3, [r2] - 4942 .L268: -1374:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4943 .loc 1 1374 0 - 4944 024a 284B ldr r3, .L280+8 - 4945 024c 1B68 ldr r3, [r3] - 4946 024e 002B cmp r3, #0 - 4947 0250 3AD1 bne .L269 -1376:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4948 .loc 1 1376 0 - 4949 0252 254B ldr r3, .L280+4 - 4950 0254 1B78 ldrb r3, [r3] - 4951 0256 DB07 lsls r3, r3, #31 - 4952 0258 09D5 bpl .L270 -1378:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsReq = 0; - 4953 .loc 1 1378 0 - 4954 025a 344B ldr r3, .L280+72 - 4955 025c 1B68 ldr r3, [r3] - 4956 025e 1B68 ldr r3, [r3] - 4957 0260 2348 ldr r0, .L280+12 - 4958 0262 9847 blx r3 - 4959 .LVL425: -1379:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4960 .loc 1 1379 0 - 4961 0264 204A ldr r2, .L280+4 - 4962 0266 1378 ldrb r3, [r2] - 4963 0268 0121 movs r1, #1 - 4964 026a 8B43 bics r3, r1 - 4965 026c 1370 strb r3, [r2] - 4966 .L270: -1382:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4967 .loc 1 1382 0 - 4968 026e 1E4B ldr r3, .L280+4 - 4969 0270 1B78 ldrb r3, [r3] - 4970 0272 1B07 lsls r3, r3, #28 - 4971 0274 09D5 bpl .L271 -1384:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 0; - 4972 .loc 1 1384 0 - 4973 0276 2D4B ldr r3, .L280+72 - ARM GAS /tmp/ccrFaSdZ.s page 140 - - - 4974 0278 1B68 ldr r3, [r3] - 4975 027a 9B68 ldr r3, [r3, #8] - 4976 027c 1D48 ldr r0, .L280+16 - 4977 027e 9847 blx r3 - 4978 .LVL426: -1385:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4979 .loc 1 1385 0 - 4980 0280 194A ldr r2, .L280+4 - 4981 0282 1378 ldrb r3, [r2] - 4982 0284 0821 movs r1, #8 - 4983 0286 8B43 bics r3, r1 - 4984 0288 1370 strb r3, [r2] - 4985 .L271: -1389:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 4986 .loc 1 1389 0 - 4987 028a 174A ldr r2, .L280+4 - 4988 028c 1378 ldrb r3, [r2] - 4989 028e 1021 movs r1, #16 - 4990 0290 8B43 bics r3, r1 - 4991 0292 1370 strb r3, [r2] - 4992 .L272: -1398:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 4993 .loc 1 1398 0 - 4994 0294 144B ldr r3, .L280+4 - 4995 0296 1B78 ldrb r3, [r3] - 4996 0298 9B07 lsls r3, r3, #30 - 4997 029a 13D5 bpl .L249 -1400:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** {// Activate RX2 window for Class C - 4998 .loc 1 1400 0 - 4999 029c 244B ldr r3, .L280+76 - 5000 029e 1B78 ldrb r3, [r3] - 5001 02a0 022B cmp r3, #2 - 5002 02a2 1BD0 beq .L279 - 5003 .L274: -1404:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 5004 .loc 1 1404 0 - 5005 02a4 104B ldr r3, .L280+4 - 5006 02a6 1B78 ldrb r3, [r3] - 5007 02a8 5B07 lsls r3, r3, #29 - 5008 02aa 04D4 bmi .L275 -1406:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5009 .loc 1 1406 0 - 5010 02ac 1F4B ldr r3, .L280+72 - 5011 02ae 1B68 ldr r3, [r3] - 5012 02b0 5B68 ldr r3, [r3, #4] - 5013 02b2 2048 ldr r0, .L280+80 - 5014 02b4 9847 blx r3 - 5015 .LVL427: - 5016 .L275: -1408:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsInd = 0; - 5017 .loc 1 1408 0 - 5018 02b6 0C4A ldr r2, .L280+4 - 5019 02b8 1378 ldrb r3, [r2] -1409:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5020 .loc 1 1409 0 - 5021 02ba 0421 movs r1, #4 - 5022 02bc 8B43 bics r3, r1 - ARM GAS /tmp/ccrFaSdZ.s page 141 - - - 5023 02be 0239 subs r1, r1, #2 - 5024 02c0 8B43 bics r3, r1 - 5025 02c2 1370 strb r3, [r2] - 5026 .L249: -1411:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 5027 .loc 1 1411 0 - 5028 02c4 02B0 add sp, sp, #8 - 5029 @ sp needed - 5030 02c6 10BD pop {r4, pc} - 5031 .L269: -1394:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &MacStateCheckTimer ); - 5032 .loc 1 1394 0 - 5033 02c8 FA21 movs r1, #250 - 5034 02ca 064C ldr r4, .L280 - 5035 02cc 8900 lsls r1, r1, #2 - 5036 02ce 2000 movs r0, r4 - 5037 02d0 FFF7FEFF bl TimerSetValue - 5038 .LVL428: -1395:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5039 .loc 1 1395 0 - 5040 02d4 2000 movs r0, r4 - 5041 02d6 FFF7FEFF bl TimerStart - 5042 .LVL429: - 5043 02da DBE7 b .L272 - 5044 .L279: -1402:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5045 .loc 1 1402 0 - 5046 02dc FFF7FEFF bl OnRxWindow2TimerEvent - 5047 .LVL430: - 5048 02e0 E0E7 b .L274 - 5049 .L281: - 5050 02e2 C046 .align 2 - 5051 .L280: - 5052 02e4 00000000 .word .LANCHOR27 - 5053 02e8 00000000 .word .LANCHOR26 - 5054 02ec 00000000 .word .LANCHOR24 - 5055 02f0 00000000 .word .LANCHOR34 - 5056 02f4 00000000 .word .LANCHOR28 - 5057 02f8 00000000 .word .LANCHOR10 - 5058 02fc 00000000 .word .LANCHOR6 - 5059 0300 00000000 .word .LANCHOR15 - 5060 0304 00000000 .word .LANCHOR54 - 5061 0308 00000000 .word .LANCHOR1 - 5062 030c 00000000 .word .LANCHOR4 - 5063 0310 00000000 .word .LANCHOR59 - 5064 0314 00000000 .word .LANCHOR14 - 5065 0318 00000000 .word .LANCHOR3 - 5066 031c 00000000 .word .LANCHOR60 - 5067 0320 00000000 .word .LANCHOR5 - 5068 0324 00000000 .word .LANCHOR7 - 5069 0328 00000000 .word .LANCHOR22 - 5070 032c 00000000 .word .LANCHOR61 - 5071 0330 00000000 .word .LANCHOR25 - 5072 0334 00000000 .word .LANCHOR35 - 5073 .cfi_endproc - 5074 .LFE91: - 5076 .section .text.SetTxContinuousWave,"ax",%progbits - ARM GAS /tmp/ccrFaSdZ.s page 142 - - - 5077 .align 1 - 5078 .global SetTxContinuousWave - 5079 .syntax unified - 5080 .code 16 - 5081 .thumb_func - 5082 .fpu softvfp - 5084 SetTxContinuousWave: - 5085 .LFB107: -2261:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2262:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t SetTxContinuousWave( uint16_t timeout ) -2263:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 5086 .loc 1 2263 0 - 5087 .cfi_startproc - 5088 @ args = 0, pretend = 0, frame = 24 - 5089 @ frame_needed = 0, uses_anonymous_args = 0 - 5090 .LVL431: - 5091 0000 10B5 push {r4, lr} - 5092 .LCFI31: - 5093 .cfi_def_cfa_offset 8 - 5094 .cfi_offset 4, -8 - 5095 .cfi_offset 14, -4 - 5096 0002 86B0 sub sp, sp, #24 - 5097 .LCFI32: - 5098 .cfi_def_cfa_offset 32 -2264:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ContinuousWaveParams_t continuousWave; -2265:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2266:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** continuousWave.Channel = Channel; - 5099 .loc 1 2266 0 - 5100 0004 134B ldr r3, .L283 - 5101 0006 1B78 ldrb r3, [r3] - 5102 0008 02AA add r2, sp, #8 - 5103 000a 1370 strb r3, [r2] -2267:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** continuousWave.Datarate = LoRaMacParams.ChannelsDatarate; - 5104 .loc 1 2267 0 - 5105 000c 124B ldr r3, .L283+4 - 5106 000e 0122 movs r2, #1 - 5107 0010 9A56 ldrsb r2, [r3, r2] - 5108 0012 02A9 add r1, sp, #8 - 5109 0014 4A70 strb r2, [r1, #1] -2268:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** continuousWave.TxPower = LoRaMacParams.ChannelsTxPower; - 5110 .loc 1 2268 0 - 5111 0016 0022 movs r2, #0 - 5112 0018 9A56 ldrsb r2, [r3, r2] - 5113 001a 8A70 strb r2, [r1, #2] -2269:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** continuousWave.MaxEirp = LoRaMacParams.MaxEirp; - 5114 .loc 1 2269 0 - 5115 001c 1A6B ldr r2, [r3, #48] - 5116 001e 0392 str r2, [sp, #12] -2270:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** continuousWave.AntennaGain = LoRaMacParams.AntennaGain; - 5117 .loc 1 2270 0 - 5118 0020 5B6B ldr r3, [r3, #52] - 5119 0022 0193 str r3, [sp, #4] - 5120 0024 0493 str r3, [sp, #16] -2271:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** continuousWave.Timeout = timeout; - 5121 .loc 1 2271 0 - 5122 0026 8881 strh r0, [r1, #12] -2272:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 143 - - -2273:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionSetContinuousWave( LoRaMacRegion, &continuousWave ); - 5123 .loc 1 2273 0 - 5124 0028 0C4B ldr r3, .L283+8 - 5125 002a 1878 ldrb r0, [r3] - 5126 .LVL432: - 5127 002c FFF7FEFF bl RegionSetContinuousWave - 5128 .LVL433: -2274:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2275:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Starts the MAC layer status check timer -2276:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &MacStateCheckTimer, MAC_STATE_CHECK_TIMEOUT ); - 5129 .loc 1 2276 0 - 5130 0030 FA21 movs r1, #250 - 5131 0032 0B4C ldr r4, .L283+12 - 5132 0034 8900 lsls r1, r1, #2 - 5133 0036 2000 movs r0, r4 - 5134 0038 FFF7FEFF bl TimerSetValue - 5135 .LVL434: -2277:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &MacStateCheckTimer ); - 5136 .loc 1 2277 0 - 5137 003c 2000 movs r0, r4 - 5138 003e FFF7FEFF bl TimerStart - 5139 .LVL435: -2278:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2279:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState |= LORAMAC_TX_RUNNING; - 5140 .loc 1 2279 0 - 5141 0042 084A ldr r2, .L283+16 - 5142 0044 0123 movs r3, #1 - 5143 0046 1168 ldr r1, [r2] - 5144 0048 0B43 orrs r3, r1 - 5145 004a 1360 str r3, [r2] -2280:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2281:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; -2282:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5146 .loc 1 2282 0 - 5147 004c 0020 movs r0, #0 - 5148 004e 06B0 add sp, sp, #24 - 5149 @ sp needed - 5150 0050 10BD pop {r4, pc} - 5151 .L284: - 5152 0052 C046 .align 2 - 5153 .L283: - 5154 0054 00000000 .word .LANCHOR19 - 5155 0058 00000000 .word .LANCHOR14 - 5156 005c 00000000 .word .LANCHOR22 - 5157 0060 00000000 .word .LANCHOR27 - 5158 0064 00000000 .word .LANCHOR24 - 5159 .cfi_endproc - 5160 .LFE107: - 5162 .section .text.SetTxContinuousWave1,"ax",%progbits - 5163 .align 1 - 5164 .global SetTxContinuousWave1 - 5165 .syntax unified - 5166 .code 16 - 5167 .thumb_func - 5168 .fpu softvfp - 5170 SetTxContinuousWave1: - 5171 .LFB108: - ARM GAS /tmp/ccrFaSdZ.s page 144 - - -2283:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2284:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t SetTxContinuousWave1( uint16_t timeout, uint32_t frequency, uint8_t power ) -2285:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 5172 .loc 1 2285 0 - 5173 .cfi_startproc - 5174 @ args = 0, pretend = 0, frame = 0 - 5175 @ frame_needed = 0, uses_anonymous_args = 0 - 5176 .LVL436: - 5177 0000 10B5 push {r4, lr} - 5178 .LCFI33: - 5179 .cfi_def_cfa_offset 8 - 5180 .cfi_offset 4, -8 - 5181 .cfi_offset 14, -4 - 5182 0002 0400 movs r4, r0 - 5183 0004 0800 movs r0, r1 - 5184 .LVL437: -2286:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.SetTxContinuousWave( frequency, power, timeout ); - 5185 .loc 1 2286 0 - 5186 0006 0A4B ldr r3, .L286 - 5187 0008 5B6C ldr r3, [r3, #68] - 5188 000a 51B2 sxtb r1, r2 - 5189 .LVL438: - 5190 000c 2200 movs r2, r4 - 5191 .LVL439: - 5192 000e 9847 blx r3 - 5193 .LVL440: -2287:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2288:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Starts the MAC layer status check timer -2289:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &MacStateCheckTimer, MAC_STATE_CHECK_TIMEOUT ); - 5194 .loc 1 2289 0 - 5195 0010 FA21 movs r1, #250 - 5196 0012 084C ldr r4, .L286+4 - 5197 0014 8900 lsls r1, r1, #2 - 5198 0016 2000 movs r0, r4 - 5199 0018 FFF7FEFF bl TimerSetValue - 5200 .LVL441: -2290:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerStart( &MacStateCheckTimer ); - 5201 .loc 1 2290 0 - 5202 001c 2000 movs r0, r4 - 5203 001e FFF7FEFF bl TimerStart - 5204 .LVL442: -2291:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2292:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState |= LORAMAC_TX_RUNNING; - 5205 .loc 1 2292 0 - 5206 0022 054A ldr r2, .L286+8 - 5207 0024 0123 movs r3, #1 - 5208 0026 1168 ldr r1, [r2] - 5209 0028 0B43 orrs r3, r1 - 5210 002a 1360 str r3, [r2] -2293:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2294:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; -2295:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5211 .loc 1 2295 0 - 5212 002c 0020 movs r0, #0 - 5213 @ sp needed - 5214 002e 10BD pop {r4, pc} - 5215 .L287: - ARM GAS /tmp/ccrFaSdZ.s page 145 - - - 5216 .align 2 - 5217 .L286: - 5218 0030 00000000 .word Radio - 5219 0034 00000000 .word .LANCHOR27 - 5220 0038 00000000 .word .LANCHOR24 - 5221 .cfi_endproc - 5222 .LFE108: - 5224 .section .text.LoRaMacInitialization,"ax",%progbits - 5225 .align 1 - 5226 .global LoRaMacInitialization - 5227 .syntax unified - 5228 .code 16 - 5229 .thumb_func - 5230 .fpu softvfp - 5232 LoRaMacInitialization: - 5233 .LFB109: -2296:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2297:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacInitialization( LoRaMacPrimitives_t *primitives, LoRaMacCallback_t *callback -2298:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 5234 .loc 1 2298 0 - 5235 .cfi_startproc - 5236 @ args = 0, pretend = 0, frame = 8 - 5237 @ frame_needed = 0, uses_anonymous_args = 0 - 5238 .LVL443: - 5239 0000 F0B5 push {r4, r5, r6, r7, lr} - 5240 .LCFI34: - 5241 .cfi_def_cfa_offset 20 - 5242 .cfi_offset 4, -20 - 5243 .cfi_offset 5, -16 - 5244 .cfi_offset 6, -12 - 5245 .cfi_offset 7, -8 - 5246 .cfi_offset 14, -4 - 5247 0002 83B0 sub sp, sp, #12 - 5248 .LCFI35: - 5249 .cfi_def_cfa_offset 32 - 5250 0004 0400 movs r4, r0 - 5251 0006 0E00 movs r6, r1 - 5252 0008 1500 movs r5, r2 -2299:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; -2300:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PhyParam_t phyParam; -2301:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2302:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( primitives == NULL ) - 5253 .loc 1 2302 0 - 5254 000a 0028 cmp r0, #0 - 5255 000c 00D1 bne .LCB5188 - 5256 000e EFE0 b .L290 @long jump - 5257 .LCB5188: -2303:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2304:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -2305:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2306:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2307:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( primitives->MacMcpsConfirm == NULL ) || - 5258 .loc 1 2307 0 - 5259 0010 0368 ldr r3, [r0] - 5260 0012 002B cmp r3, #0 - 5261 0014 00D1 bne .LCB5192 - 5262 0016 EDE0 b .L291 @long jump - ARM GAS /tmp/ccrFaSdZ.s page 146 - - - 5263 .LCB5192: - 5264 .loc 1 2307 0 is_stmt 0 discriminator 1 - 5265 0018 4368 ldr r3, [r0, #4] - 5266 001a 002B cmp r3, #0 - 5267 001c 00D1 bne .LCB5196 - 5268 001e EBE0 b .L292 @long jump - 5269 .LCB5196: -2308:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( primitives->MacMcpsIndication == NULL ) || - 5270 .loc 1 2308 0 is_stmt 1 - 5271 0020 8368 ldr r3, [r0, #8] - 5272 0022 002B cmp r3, #0 - 5273 0024 00D1 bne .LCB5200 - 5274 0026 E9E0 b .L293 @long jump - 5275 .LCB5200: -2309:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( primitives->MacMlmeConfirm == NULL ) ) -2310:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2311:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -2312:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2313:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Verify if the region is supported -2314:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionIsActive( region ) == false ) - 5276 .loc 1 2314 0 - 5277 0028 1000 movs r0, r2 - 5278 .LVL444: - 5279 002a FFF7FEFF bl RegionIsActive - 5280 .LVL445: - 5281 002e 0028 cmp r0, #0 - 5282 0030 00D1 bne .LCB5208 - 5283 0032 E5E0 b .L294 @long jump - 5284 .LCB5208: -2315:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2316:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_REGION_NOT_SUPPORTED; -2317:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2318:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2319:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacPrimitives = primitives; - 5285 .loc 1 2319 0 - 5286 0034 734B ldr r3, .L295 - 5287 0036 1C60 str r4, [r3] -2320:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacCallbacks = callbacks; - 5288 .loc 1 2320 0 - 5289 0038 734B ldr r3, .L295+4 - 5290 003a 1E60 str r6, [r3] -2321:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacRegion = region; - 5291 .loc 1 2321 0 - 5292 003c 734E ldr r6, .L295+8 - 5293 .LVL446: - 5294 003e 3570 strb r5, [r6] -2322:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2323:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Value = 0; - 5295 .loc 1 2323 0 - 5296 0040 0023 movs r3, #0 - 5297 0042 734A ldr r2, .L295+12 - 5298 0044 1370 strb r3, [r2] -2324:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2325:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDeviceClass = CLASS_A; - 5299 .loc 1 2325 0 - 5300 0046 734A ldr r2, .L295+16 - 5301 0048 1370 strb r3, [r2] - ARM GAS /tmp/ccrFaSdZ.s page 147 - - -2326:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacState = LORAMAC_IDLE; - 5302 .loc 1 2326 0 - 5303 004a 734A ldr r2, .L295+20 - 5304 004c 1360 str r3, [r2] -2327:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2328:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** JoinRequestTrials = 0; - 5305 .loc 1 2328 0 - 5306 004e 734A ldr r2, .L295+24 - 5307 0050 1370 strb r3, [r2] -2329:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MaxJoinRequestTrials = 1; - 5308 .loc 1 2329 0 - 5309 0052 0127 movs r7, #1 - 5310 0054 724A ldr r2, .L295+28 - 5311 0056 1770 strb r7, [r2] -2330:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RepeaterSupport = false; - 5312 .loc 1 2330 0 - 5313 0058 724A ldr r2, .L295+32 - 5314 005a 1370 strb r3, [r2] -2331:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2332:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Reset duty cycle times -2333:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AggregatedLastTxDoneTime = 0; - 5315 .loc 1 2333 0 - 5316 005c 724A ldr r2, .L295+36 - 5317 005e 1360 str r3, [r2] -2334:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AggregatedTimeOff = 0; - 5318 .loc 1 2334 0 - 5319 0060 724A ldr r2, .L295+40 - 5320 0062 1360 str r3, [r2] -2335:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2336:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Reset to defaults -2337:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DUTY_CYCLE; - 5321 .loc 1 2337 0 - 5322 0064 01AC add r4, sp, #4 - 5323 .LVL447: - 5324 0066 0B33 adds r3, r3, #11 - 5325 0068 2370 strb r3, [r4] -2338:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5326 .loc 1 2338 0 - 5327 006a 2100 movs r1, r4 - 5328 006c 2800 movs r0, r5 - 5329 006e FFF7FEFF bl RegionGetPhyParam - 5330 .LVL448: -2339:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** DutyCycleOn = ( bool ) phyParam.Value; - 5331 .loc 1 2339 0 - 5332 0072 431E subs r3, r0, #1 - 5333 0074 9841 sbcs r0, r0, r3 - 5334 .LVL449: - 5335 0076 6E4B ldr r3, .L295+44 - 5336 0078 1870 strb r0, [r3] -2340:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2341:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_TX_POWER; - 5337 .loc 1 2341 0 - 5338 007a 0823 movs r3, #8 - 5339 007c 2370 strb r3, [r4] -2342:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5340 .loc 1 2342 0 - 5341 007e 3078 ldrb r0, [r6] - ARM GAS /tmp/ccrFaSdZ.s page 148 - - - 5342 0080 2100 movs r1, r4 - 5343 0082 FFF7FEFF bl RegionGetPhyParam - 5344 .LVL450: -2343:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.ChannelsTxPower = phyParam.Value; - 5345 .loc 1 2343 0 - 5346 0086 6B4D ldr r5, .L295+48 - 5347 0088 2870 strb r0, [r5] -2344:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2345:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_TX_DR; - 5348 .loc 1 2345 0 - 5349 008a 0523 movs r3, #5 - 5350 008c 2370 strb r3, [r4] -2346:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5351 .loc 1 2346 0 - 5352 008e 3078 ldrb r0, [r6] - 5353 0090 2100 movs r1, r4 - 5354 0092 FFF7FEFF bl RegionGetPhyParam - 5355 .LVL451: -2347:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.ChannelsDatarate = phyParam.Value; - 5356 .loc 1 2347 0 - 5357 0096 6870 strb r0, [r5, #1] -2348:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2349:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_RX_WINDOW; - 5358 .loc 1 2349 0 - 5359 0098 0C23 movs r3, #12 - 5360 009a 2370 strb r3, [r4] -2350:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5361 .loc 1 2350 0 - 5362 009c 3078 ldrb r0, [r6] - 5363 009e 2100 movs r1, r4 - 5364 00a0 FFF7FEFF bl RegionGetPhyParam - 5365 .LVL452: -2351:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.MaxRxWindow = phyParam.Value; - 5366 .loc 1 2351 0 - 5367 00a4 E860 str r0, [r5, #12] -2352:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2353:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_RECEIVE_DELAY1; - 5368 .loc 1 2353 0 - 5369 00a6 0D23 movs r3, #13 - 5370 00a8 2370 strb r3, [r4] -2354:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5371 .loc 1 2354 0 - 5372 00aa 3078 ldrb r0, [r6] - 5373 .LVL453: - 5374 00ac 2100 movs r1, r4 - 5375 00ae FFF7FEFF bl RegionGetPhyParam - 5376 .LVL454: -2355:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.ReceiveDelay1 = phyParam.Value; - 5377 .loc 1 2355 0 - 5378 00b2 2861 str r0, [r5, #16] -2356:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2357:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_RECEIVE_DELAY2; - 5379 .loc 1 2357 0 - 5380 00b4 0E23 movs r3, #14 - 5381 00b6 2370 strb r3, [r4] -2358:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5382 .loc 1 2358 0 - ARM GAS /tmp/ccrFaSdZ.s page 149 - - - 5383 00b8 3078 ldrb r0, [r6] - 5384 .LVL455: - 5385 00ba 2100 movs r1, r4 - 5386 00bc FFF7FEFF bl RegionGetPhyParam - 5387 .LVL456: -2359:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.ReceiveDelay2 = phyParam.Value; - 5388 .loc 1 2359 0 - 5389 00c0 6861 str r0, [r5, #20] -2360:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2361:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_JOIN_ACCEPT_DELAY1; - 5390 .loc 1 2361 0 - 5391 00c2 0F23 movs r3, #15 - 5392 00c4 2370 strb r3, [r4] -2362:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5393 .loc 1 2362 0 - 5394 00c6 3078 ldrb r0, [r6] - 5395 .LVL457: - 5396 00c8 2100 movs r1, r4 - 5397 00ca FFF7FEFF bl RegionGetPhyParam - 5398 .LVL458: -2363:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.JoinAcceptDelay1 = phyParam.Value; - 5399 .loc 1 2363 0 - 5400 00ce A861 str r0, [r5, #24] -2364:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2365:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_JOIN_ACCEPT_DELAY2; - 5401 .loc 1 2365 0 - 5402 00d0 1023 movs r3, #16 - 5403 00d2 2370 strb r3, [r4] -2366:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5404 .loc 1 2366 0 - 5405 00d4 3078 ldrb r0, [r6] - 5406 .LVL459: - 5407 00d6 2100 movs r1, r4 - 5408 00d8 FFF7FEFF bl RegionGetPhyParam - 5409 .LVL460: -2367:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.JoinAcceptDelay2 = phyParam.Value; - 5410 .loc 1 2367 0 - 5411 00dc E861 str r0, [r5, #28] -2368:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2369:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_DR1_OFFSET; - 5412 .loc 1 2369 0 - 5413 00de 1323 movs r3, #19 - 5414 00e0 2370 strb r3, [r4] -2370:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5415 .loc 1 2370 0 - 5416 00e2 3078 ldrb r0, [r6] - 5417 .LVL461: - 5418 00e4 2100 movs r1, r4 - 5419 00e6 FFF7FEFF bl RegionGetPhyParam - 5420 .LVL462: -2371:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.Rx1DrOffset = phyParam.Value; - 5421 .loc 1 2371 0 - 5422 00ea 2123 movs r3, #33 - 5423 00ec E854 strb r0, [r5, r3] -2372:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2373:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_RX2_FREQUENCY; - 5424 .loc 1 2373 0 - ARM GAS /tmp/ccrFaSdZ.s page 150 - - - 5425 00ee 0D3B subs r3, r3, #13 - 5426 00f0 2370 strb r3, [r4] -2374:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5427 .loc 1 2374 0 - 5428 00f2 3078 ldrb r0, [r6] - 5429 00f4 2100 movs r1, r4 - 5430 00f6 FFF7FEFF bl RegionGetPhyParam - 5431 .LVL463: -2375:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.Rx2Channel.Frequency = phyParam.Value; - 5432 .loc 1 2375 0 - 5433 00fa 6862 str r0, [r5, #36] -2376:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2377:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_RX2_DR; - 5434 .loc 1 2377 0 - 5435 00fc 1523 movs r3, #21 - 5436 00fe 2370 strb r3, [r4] -2378:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5437 .loc 1 2378 0 - 5438 0100 3078 ldrb r0, [r6] - 5439 .LVL464: - 5440 0102 2100 movs r1, r4 - 5441 0104 FFF7FEFF bl RegionGetPhyParam - 5442 .LVL465: -2379:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.Rx2Channel.Datarate = phyParam.Value; - 5443 .loc 1 2379 0 - 5444 0108 2823 movs r3, #40 - 5445 010a E854 strb r0, [r5, r3] -2380:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2381:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_UPLINK_DWELL_TIME; - 5446 .loc 1 2381 0 - 5447 010c 0E3B subs r3, r3, #14 - 5448 010e 2370 strb r3, [r4] -2382:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5449 .loc 1 2382 0 - 5450 0110 3078 ldrb r0, [r6] - 5451 0112 2100 movs r1, r4 - 5452 0114 FFF7FEFF bl RegionGetPhyParam - 5453 .LVL466: -2383:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.UplinkDwellTime = phyParam.Value; - 5454 .loc 1 2383 0 - 5455 0118 2C23 movs r3, #44 - 5456 011a E854 strb r0, [r5, r3] -2384:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2385:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_DOWNLINK_DWELL_TIME; - 5457 .loc 1 2385 0 - 5458 011c 113B subs r3, r3, #17 - 5459 011e 2370 strb r3, [r4] -2386:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5460 .loc 1 2386 0 - 5461 0120 3078 ldrb r0, [r6] - 5462 0122 2100 movs r1, r4 - 5463 0124 FFF7FEFF bl RegionGetPhyParam - 5464 .LVL467: -2387:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.DownlinkDwellTime = phyParam.Value; - 5465 .loc 1 2387 0 - 5466 0128 2D23 movs r3, #45 - 5467 012a E854 strb r0, [r5, r3] - ARM GAS /tmp/ccrFaSdZ.s page 151 - - -2388:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2389:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_MAX_EIRP; - 5468 .loc 1 2389 0 - 5469 012c 113B subs r3, r3, #17 - 5470 012e 2370 strb r3, [r4] -2390:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5471 .loc 1 2390 0 - 5472 0130 3078 ldrb r0, [r6] - 5473 0132 2100 movs r1, r4 - 5474 0134 FFF7FEFF bl RegionGetPhyParam - 5475 .LVL468: -2391:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.MaxEirp = phyParam.fValue; - 5476 .loc 1 2391 0 - 5477 0138 2863 str r0, [r5, #48] -2392:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2393:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_ANTENNA_GAIN; - 5478 .loc 1 2393 0 - 5479 013a 1D23 movs r3, #29 - 5480 013c 2370 strb r3, [r4] -2394:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5481 .loc 1 2394 0 - 5482 013e 3078 ldrb r0, [r6] - 5483 0140 2100 movs r1, r4 - 5484 0142 FFF7FEFF bl RegionGetPhyParam - 5485 .LVL469: -2395:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.AntennaGain = phyParam.fValue; - 5486 .loc 1 2395 0 - 5487 0146 6863 str r0, [r5, #52] -2396:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2397:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionInitDefaults( LoRaMacRegion, INIT_TYPE_INIT ); - 5488 .loc 1 2397 0 - 5489 0148 3078 ldrb r0, [r6] - 5490 014a 0021 movs r1, #0 - 5491 014c FFF7FEFF bl RegionInitDefaults - 5492 .LVL470: -2398:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2399:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Init parameters which are not set in function ResetMacParameters -2400:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.ChannelsNbRep = 1; - 5493 .loc 1 2400 0 - 5494 0150 2022 movs r2, #32 - 5495 0152 AF54 strb r7, [r5, r2] -2401:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.SystemMaxRxError = 10; - 5496 .loc 1 2401 0 - 5497 0154 0A20 movs r0, #10 - 5498 0156 6860 str r0, [r5, #4] -2402:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.MinRxSymbols = 6; - 5499 .loc 1 2402 0 - 5500 0158 0621 movs r1, #6 - 5501 015a 2972 strb r1, [r5, #8] -2403:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2404:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.SystemMaxRxError = LoRaMacParamsDefaults.SystemMaxRxError; - 5502 .loc 1 2404 0 - 5503 015c 364B ldr r3, .L295+52 - 5504 015e 5860 str r0, [r3, #4] -2405:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MinRxSymbols = LoRaMacParamsDefaults.MinRxSymbols; - 5505 .loc 1 2405 0 - 5506 0160 1972 strb r1, [r3, #8] - ARM GAS /tmp/ccrFaSdZ.s page 152 - - -2406:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MaxRxWindow = LoRaMacParamsDefaults.MaxRxWindow; - 5507 .loc 1 2406 0 - 5508 0162 E968 ldr r1, [r5, #12] - 5509 0164 D960 str r1, [r3, #12] -2407:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay1 = LoRaMacParamsDefaults.ReceiveDelay1; - 5510 .loc 1 2407 0 - 5511 0166 2969 ldr r1, [r5, #16] - 5512 0168 1961 str r1, [r3, #16] -2408:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay2 = LoRaMacParamsDefaults.ReceiveDelay2; - 5513 .loc 1 2408 0 - 5514 016a 6969 ldr r1, [r5, #20] - 5515 016c 5961 str r1, [r3, #20] -2409:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.JoinAcceptDelay1 = LoRaMacParamsDefaults.JoinAcceptDelay1; - 5516 .loc 1 2409 0 - 5517 016e A969 ldr r1, [r5, #24] - 5518 0170 9961 str r1, [r3, #24] -2410:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.JoinAcceptDelay2 = LoRaMacParamsDefaults.JoinAcceptDelay2; - 5519 .loc 1 2410 0 - 5520 0172 E969 ldr r1, [r5, #28] - 5521 0174 D961 str r1, [r3, #28] -2411:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsNbRep = LoRaMacParamsDefaults.ChannelsNbRep; - 5522 .loc 1 2411 0 - 5523 0176 9F54 strb r7, [r3, r2] -2412:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2413:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ResetMacParameters( ); - 5524 .loc 1 2413 0 - 5525 0178 FFF7FEFF bl ResetMacParameters - 5526 .LVL471: -2414:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2415:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Initialize timers -2416:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerInit( &MacStateCheckTimer, OnMacStateCheckTimerEvent ); - 5527 .loc 1 2416 0 - 5528 017c 2F4C ldr r4, .L295+56 - 5529 017e 3049 ldr r1, .L295+60 - 5530 0180 2000 movs r0, r4 - 5531 0182 FFF7FEFF bl TimerInit - 5532 .LVL472: -2417:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerSetValue( &MacStateCheckTimer, MAC_STATE_CHECK_TIMEOUT ); - 5533 .loc 1 2417 0 - 5534 0186 FA21 movs r1, #250 - 5535 0188 8900 lsls r1, r1, #2 - 5536 018a 2000 movs r0, r4 - 5537 018c FFF7FEFF bl TimerSetValue - 5538 .LVL473: -2418:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2419:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerInit( &TxDelayedTimer, OnTxDelayedTimerEvent ); - 5539 .loc 1 2419 0 - 5540 0190 2C49 ldr r1, .L295+64 - 5541 0192 2D48 ldr r0, .L295+68 - 5542 0194 FFF7FEFF bl TimerInit - 5543 .LVL474: -2420:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerInit( &RxWindowTimer1, OnRxWindow1TimerEvent ); - 5544 .loc 1 2420 0 - 5545 0198 2C49 ldr r1, .L295+72 - 5546 019a 2D48 ldr r0, .L295+76 - 5547 019c FFF7FEFF bl TimerInit - 5548 .LVL475: - ARM GAS /tmp/ccrFaSdZ.s page 153 - - -2421:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerInit( &RxWindowTimer2, OnRxWindow2TimerEvent ); - 5549 .loc 1 2421 0 - 5550 01a0 2C49 ldr r1, .L295+80 - 5551 01a2 2D48 ldr r0, .L295+84 - 5552 01a4 FFF7FEFF bl TimerInit - 5553 .LVL476: -2422:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** TimerInit( &AckTimeoutTimer, OnAckTimeoutTimerEvent ); - 5554 .loc 1 2422 0 - 5555 01a8 2C49 ldr r1, .L295+88 - 5556 01aa 2D48 ldr r0, .L295+92 - 5557 01ac FFF7FEFF bl TimerInit - 5558 .LVL477: -2423:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2424:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Store the current initialization time -2425:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacInitializationTime = TimerGetCurrentTime( ); - 5559 .loc 1 2425 0 - 5560 01b0 FFF7FEFF bl TimerGetCurrentTime - 5561 .LVL478: - 5562 01b4 2B4B ldr r3, .L295+96 - 5563 01b6 1860 str r0, [r3] -2426:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2427:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Initialize Radio driver -2428:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RadioEvents.TxDone = OnRadioTxDone; - 5564 .loc 1 2428 0 - 5565 01b8 2B48 ldr r0, .L295+100 - 5566 01ba 2C4B ldr r3, .L295+104 - 5567 01bc 0360 str r3, [r0] -2429:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RadioEvents.RxDone = OnRadioRxDone; - 5568 .loc 1 2429 0 - 5569 01be 2C4B ldr r3, .L295+108 - 5570 01c0 8360 str r3, [r0, #8] -2430:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RadioEvents.RxError = OnRadioRxError; - 5571 .loc 1 2430 0 - 5572 01c2 2C4B ldr r3, .L295+112 - 5573 01c4 0361 str r3, [r0, #16] -2431:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RadioEvents.TxTimeout = OnRadioTxTimeout; - 5574 .loc 1 2431 0 - 5575 01c6 2C4B ldr r3, .L295+116 - 5576 01c8 4360 str r3, [r0, #4] -2432:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RadioEvents.RxTimeout = OnRadioRxTimeout; - 5577 .loc 1 2432 0 - 5578 01ca 2C4B ldr r3, .L295+120 - 5579 01cc C360 str r3, [r0, #12] -2433:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Init( &RadioEvents ); - 5580 .loc 1 2433 0 - 5581 01ce 2C4C ldr r4, .L295+124 - 5582 01d0 A368 ldr r3, [r4, #8] - 5583 01d2 9847 blx r3 - 5584 .LVL479: -2434:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2435:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Random seed initialization -2436:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** srand1( Radio.Random( ) ); - 5585 .loc 1 2436 0 - 5586 01d4 E369 ldr r3, [r4, #28] - 5587 01d6 9847 blx r3 - 5588 .LVL480: - 5589 01d8 FFF7FEFF bl srand1 - ARM GAS /tmp/ccrFaSdZ.s page 154 - - - 5590 .LVL481: -2437:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2438:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PublicNetwork = true; - 5591 .loc 1 2438 0 - 5592 01dc 294B ldr r3, .L295+128 - 5593 01de 1F70 strb r7, [r3] -2439:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.SetPublicNetwork( PublicNetwork ); - 5594 .loc 1 2439 0 - 5595 01e0 0120 movs r0, #1 - 5596 01e2 236E ldr r3, [r4, #96] - 5597 01e4 9847 blx r3 - 5598 .LVL482: -2440:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Sleep( ); - 5599 .loc 1 2440 0 - 5600 01e6 636B ldr r3, [r4, #52] - 5601 01e8 9847 blx r3 - 5602 .LVL483: -2441:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2442:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; - 5603 .loc 1 2442 0 - 5604 01ea 0020 movs r0, #0 - 5605 .L289: -2443:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5606 .loc 1 2443 0 - 5607 01ec 03B0 add sp, sp, #12 - 5608 @ sp needed - 5609 01ee F0BD pop {r4, r5, r6, r7, pc} - 5610 .LVL484: - 5611 .L290: -2304:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5612 .loc 1 2304 0 - 5613 01f0 0320 movs r0, #3 - 5614 .LVL485: - 5615 01f2 FBE7 b .L289 - 5616 .LVL486: - 5617 .L291: -2311:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5618 .loc 1 2311 0 - 5619 01f4 0320 movs r0, #3 - 5620 .LVL487: - 5621 01f6 F9E7 b .L289 - 5622 .LVL488: - 5623 .L292: - 5624 01f8 0320 movs r0, #3 - 5625 .LVL489: - 5626 01fa F7E7 b .L289 - 5627 .LVL490: - 5628 .L293: - 5629 01fc 0320 movs r0, #3 - 5630 .LVL491: - 5631 01fe F5E7 b .L289 - 5632 .LVL492: - 5633 .L294: -2316:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5634 .loc 1 2316 0 - 5635 0200 0A20 movs r0, #10 - 5636 0202 F3E7 b .L289 - ARM GAS /tmp/ccrFaSdZ.s page 155 - - - 5637 .L296: - 5638 .align 2 - 5639 .L295: - 5640 0204 00000000 .word .LANCHOR61 - 5641 0208 00000000 .word .LANCHOR30 - 5642 020c 00000000 .word .LANCHOR22 - 5643 0210 00000000 .word .LANCHOR26 - 5644 0214 00000000 .word .LANCHOR25 - 5645 0218 00000000 .word .LANCHOR24 - 5646 021c 00000000 .word .LANCHOR54 - 5647 0220 00000000 .word .LANCHOR59 - 5648 0224 00000000 .word .LANCHOR21 - 5649 0228 00000000 .word .LANCHOR43 - 5650 022c 00000000 .word .LANCHOR55 - 5651 0230 00000000 .word .LANCHOR56 - 5652 0234 00000000 .word .LANCHOR13 - 5653 0238 00000000 .word .LANCHOR14 - 5654 023c 00000000 .word .LANCHOR27 - 5655 0240 00000000 .word OnMacStateCheckTimerEvent - 5656 0244 00000000 .word OnTxDelayedTimerEvent - 5657 0248 00000000 .word .LANCHOR58 - 5658 024c 00000000 .word OnRxWindow1TimerEvent - 5659 0250 00000000 .word .LANCHOR46 - 5660 0254 00000000 .word OnRxWindow2TimerEvent - 5661 0258 00000000 .word .LANCHOR37 - 5662 025c 00000000 .word OnAckTimeoutTimerEvent - 5663 0260 00000000 .word .LANCHOR23 - 5664 0264 00000000 .word .LANCHOR57 - 5665 0268 00000000 .word .LANCHOR62 - 5666 026c 00000000 .word OnRadioTxDone - 5667 0270 00000000 .word OnRadioRxDone - 5668 0274 00000000 .word OnRadioRxError - 5669 0278 00000000 .word OnRadioTxTimeout - 5670 027c 00000000 .word OnRadioRxTimeout - 5671 0280 00000000 .word Radio - 5672 0284 00000000 .word .LANCHOR63 - 5673 .cfi_endproc - 5674 .LFE109: - 5676 .section .text.LoRaMacQueryTxPossible,"ax",%progbits - 5677 .align 1 - 5678 .global LoRaMacQueryTxPossible - 5679 .syntax unified - 5680 .code 16 - 5681 .thumb_func - 5682 .fpu softvfp - 5684 LoRaMacQueryTxPossible: - 5685 .LFB110: -2444:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2445:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacQueryTxPossible( uint8_t size, LoRaMacTxInfo_t* txInfo ) -2446:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 5686 .loc 1 2446 0 - 5687 .cfi_startproc - 5688 @ args = 0, pretend = 0, frame = 32 - 5689 @ frame_needed = 0, uses_anonymous_args = 0 - 5690 .LVL493: - 5691 0000 F0B5 push {r4, r5, r6, r7, lr} - 5692 .LCFI36: - ARM GAS /tmp/ccrFaSdZ.s page 156 - - - 5693 .cfi_def_cfa_offset 20 - 5694 .cfi_offset 4, -20 - 5695 .cfi_offset 5, -16 - 5696 .cfi_offset 6, -12 - 5697 .cfi_offset 7, -8 - 5698 .cfi_offset 14, -4 - 5699 0002 CE46 mov lr, r9 - 5700 0004 00B5 push {lr} - 5701 .LCFI37: - 5702 .cfi_def_cfa_offset 24 - 5703 .cfi_offset 9, -24 - 5704 0006 8AB0 sub sp, sp, #40 - 5705 .LCFI38: - 5706 .cfi_def_cfa_offset 64 - 5707 0008 0390 str r0, [sp, #12] - 5708 000a 0E00 movs r6, r1 -2447:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AdrNextParams_t adrNext; -2448:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; -2449:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PhyParam_t phyParam; -2450:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** int8_t datarate = LoRaMacParamsDefaults.ChannelsDatarate; - 5709 .loc 1 2450 0 - 5710 000c 344B ldr r3, .L305 - 5711 000e 0121 movs r1, #1 - 5712 .LVL494: - 5713 0010 5956 ldrsb r1, [r3, r1] - 5714 0012 0F22 movs r2, #15 - 5715 0014 02A8 add r0, sp, #8 - 5716 .LVL495: - 5717 0016 8446 mov ip, r0 - 5718 0018 6244 add r2, r2, ip - 5719 001a 1170 strb r1, [r2] -2451:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** int8_t txPower = LoRaMacParamsDefaults.ChannelsTxPower; - 5720 .loc 1 2451 0 - 5721 001c 0022 movs r2, #0 - 5722 001e 9A56 ldrsb r2, [r3, r2] - 5723 0020 0E23 movs r3, #14 - 5724 0022 6344 add r3, r3, ip - 5725 0024 1A70 strb r2, [r3] -2452:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t fOptLen = MacCommandsBufferIndex + MacCommandsBufferToRepeatIndex; - 5726 .loc 1 2452 0 - 5727 0026 2F4B ldr r3, .L305+4 - 5728 0028 1C78 ldrb r4, [r3] - 5729 002a 2F4B ldr r3, .L305+8 - 5730 002c 1B78 ldrb r3, [r3] - 5731 002e E418 adds r4, r4, r3 - 5732 0030 E4B2 uxtb r4, r4 - 5733 .LVL496: -2453:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2454:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( txInfo == NULL ) - 5734 .loc 1 2454 0 - 5735 0032 002E cmp r6, #0 - 5736 0034 52D0 beq .L302 -2455:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2456:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -2457:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2458:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2459:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Setup ADR request - ARM GAS /tmp/ccrFaSdZ.s page 157 - - -2460:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.UpdateChanMask = false; - 5737 .loc 1 2460 0 - 5738 0036 07A9 add r1, sp, #28 - 5739 0038 0023 movs r3, #0 - 5740 003a 0B70 strb r3, [r1] -2461:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.AdrEnabled = AdrCtrlOn; - 5741 .loc 1 2461 0 - 5742 003c 2B4B ldr r3, .L305+12 - 5743 003e 1B78 ldrb r3, [r3] - 5744 0040 4B70 strb r3, [r1, #1] -2462:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.AdrAckCounter = AdrAckCounter; - 5745 .loc 1 2462 0 - 5746 0042 2B4B ldr r3, .L305+16 - 5747 0044 1A68 ldr r2, [r3] - 5748 0046 4A60 str r2, [r1, #4] -2463:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.Datarate = LoRaMacParams.ChannelsDatarate; - 5749 .loc 1 2463 0 - 5750 0048 2A4F ldr r7, .L305+20 - 5751 004a 0122 movs r2, #1 - 5752 004c BA56 ldrsb r2, [r7, r2] - 5753 004e 0A72 strb r2, [r1, #8] -2464:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.TxPower = LoRaMacParams.ChannelsTxPower; - 5754 .loc 1 2464 0 - 5755 0050 0022 movs r2, #0 - 5756 0052 BA56 ldrsb r2, [r7, r2] - 5757 0054 4A72 strb r2, [r1, #9] -2465:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** adrNext.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; - 5758 .loc 1 2465 0 - 5759 0056 2C22 movs r2, #44 - 5760 0058 9146 mov r9, r2 - 5761 005a BA5C ldrb r2, [r7, r2] - 5762 005c 8A72 strb r2, [r1, #10] -2466:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2467:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // We call the function for information purposes only. We don't want to -2468:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // apply the datarate, the tx power and the ADR ack counter. -2469:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionAdrNext( LoRaMacRegion, &adrNext, &datarate, &txPower, &AdrAckCounter ); - 5763 .loc 1 2469 0 - 5764 005e 0F25 movs r5, #15 - 5765 0060 6544 add r5, r5, ip - 5766 0062 254A ldr r2, .L305+24 - 5767 0064 1078 ldrb r0, [r2] - 5768 0066 0093 str r3, [sp] - 5769 0068 0E23 movs r3, #14 - 5770 006a 6344 add r3, r3, ip - 5771 006c 2A00 movs r2, r5 - 5772 006e FFF7FEFF bl RegionAdrNext - 5773 .LVL497: -2470:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2471:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Setup PHY request -2472:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; - 5774 .loc 1 2472 0 - 5775 0072 4B46 mov r3, r9 - 5776 0074 FA5C ldrb r2, [r7, r3] - 5777 0076 06AB add r3, sp, #24 - 5778 0078 9A70 strb r2, [r3, #2] -2473:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Datarate = datarate; - 5779 .loc 1 2473 0 - ARM GAS /tmp/ccrFaSdZ.s page 158 - - - 5780 007a 2A78 ldrb r2, [r5] - 5781 007c 5A70 strb r2, [r3, #1] -2474:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_PAYLOAD; - 5782 .loc 1 2474 0 - 5783 007e 0922 movs r2, #9 - 5784 0080 1A70 strb r2, [r3] -2475:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2476:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Change request in case repeater is supported -2477:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RepeaterSupport == true ) - 5785 .loc 1 2477 0 - 5786 0082 1E4B ldr r3, .L305+28 - 5787 0084 1B78 ldrb r3, [r3] - 5788 0086 002B cmp r3, #0 - 5789 0088 02D0 beq .L299 -2478:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2479:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MAX_PAYLOAD_REPEATER; - 5790 .loc 1 2479 0 - 5791 008a 06AB add r3, sp, #24 - 5792 008c 0132 adds r2, r2, #1 - 5793 008e 1A70 strb r2, [r3] - 5794 .L299: -2480:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2481:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 5795 .loc 1 2481 0 - 5796 0090 194B ldr r3, .L305+24 - 5797 0092 1878 ldrb r0, [r3] - 5798 0094 06A9 add r1, sp, #24 - 5799 0096 FFF7FEFF bl RegionGetPhyParam - 5800 .LVL498: -2482:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txInfo->CurrentPayloadSize = phyParam.Value; - 5801 .loc 1 2482 0 - 5802 009a C0B2 uxtb r0, r0 - 5803 009c 7070 strb r0, [r6, #1] -2483:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2484:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Verify if the fOpts fit into the maximum payload -2485:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( txInfo->CurrentPayloadSize >= fOptLen ) - 5804 .loc 1 2485 0 - 5805 009e A042 cmp r0, r4 - 5806 00a0 12D3 bcc .L300 -2486:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2487:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txInfo->MaxPossiblePayload = txInfo->CurrentPayloadSize - fOptLen; - 5807 .loc 1 2487 0 - 5808 00a2 001B subs r0, r0, r4 - 5809 00a4 3070 strb r0, [r6] - 5810 .LVL499: - 5811 .L301: -2488:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2489:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2490:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2491:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** txInfo->MaxPossiblePayload = txInfo->CurrentPayloadSize; -2492:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // The fOpts don't fit into the maximum payload. Omit the MAC commands to -2493:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // ensure that another uplink is possible. -2494:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fOptLen = 0; -2495:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; -2496:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferToRepeatIndex = 0; -2497:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2498:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 159 - - -2499:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Verify if the fOpts and the payload fit into the maximum payload -2500:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ValidatePayloadLength( size, datarate, fOptLen ) == false ) - 5812 .loc 1 2500 0 - 5813 00a6 0F23 movs r3, #15 - 5814 00a8 02AA add r2, sp, #8 - 5815 00aa 9446 mov ip, r2 - 5816 00ac 6344 add r3, r3, ip - 5817 00ae 0021 movs r1, #0 - 5818 00b0 5956 ldrsb r1, [r3, r1] - 5819 00b2 2200 movs r2, r4 - 5820 00b4 0398 ldr r0, [sp, #12] - 5821 00b6 FFF7FEFF bl ValidatePayloadLength - 5822 .LVL500: - 5823 00ba 0028 cmp r0, #0 - 5824 00bc 0CD0 beq .L304 -2501:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2502:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_LENGTH_ERROR; -2503:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2504:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; - 5825 .loc 1 2504 0 - 5826 00be 0020 movs r0, #0 - 5827 .L298: -2505:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5828 .loc 1 2505 0 - 5829 00c0 0AB0 add sp, sp, #40 - 5830 @ sp needed - 5831 .LVL501: - 5832 .LVL502: - 5833 00c2 04BC pop {r2} - 5834 00c4 9146 mov r9, r2 - 5835 00c6 F0BD pop {r4, r5, r6, r7, pc} - 5836 .LVL503: - 5837 .L300: -2491:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // The fOpts don't fit into the maximum payload. Omit the MAC commands to - 5838 .loc 1 2491 0 - 5839 00c8 3070 strb r0, [r6] - 5840 .LVL504: -2495:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferToRepeatIndex = 0; - 5841 .loc 1 2495 0 - 5842 00ca 0023 movs r3, #0 - 5843 00cc 054A ldr r2, .L305+4 - 5844 00ce 1370 strb r3, [r2] -2496:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5845 .loc 1 2496 0 - 5846 00d0 054A ldr r2, .L305+8 - 5847 00d2 1370 strb r3, [r2] -2494:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MacCommandsBufferIndex = 0; - 5848 .loc 1 2494 0 - 5849 00d4 0024 movs r4, #0 - 5850 00d6 E6E7 b .L301 - 5851 .LVL505: - 5852 .L304: -2502:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5853 .loc 1 2502 0 - 5854 00d8 0830 adds r0, r0, #8 - 5855 00da F1E7 b .L298 - 5856 .L302: - ARM GAS /tmp/ccrFaSdZ.s page 160 - - -2456:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 5857 .loc 1 2456 0 - 5858 00dc 0320 movs r0, #3 - 5859 00de EFE7 b .L298 - 5860 .L306: - 5861 .align 2 - 5862 .L305: - 5863 00e0 00000000 .word .LANCHOR13 - 5864 00e4 00000000 .word .LANCHOR10 - 5865 00e8 00000000 .word .LANCHOR11 - 5866 00ec 00000000 .word .LANCHOR29 - 5867 00f0 00000000 .word .LANCHOR3 - 5868 00f4 00000000 .word .LANCHOR14 - 5869 00f8 00000000 .word .LANCHOR22 - 5870 00fc 00000000 .word .LANCHOR21 - 5871 .cfi_endproc - 5872 .LFE110: - 5874 .section .text.LoRaMacMibGetRequestConfirm,"ax",%progbits - 5875 .align 1 - 5876 .global LoRaMacMibGetRequestConfirm - 5877 .syntax unified - 5878 .code 16 - 5879 .thumb_func - 5880 .fpu softvfp - 5882 LoRaMacMibGetRequestConfirm: - 5883 .LFB111: -2506:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2507:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacMibGetRequestConfirm( MibRequestConfirm_t *mibGet ) -2508:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 5884 .loc 1 2508 0 - 5885 .cfi_startproc - 5886 @ args = 0, pretend = 0, frame = 8 - 5887 @ frame_needed = 0, uses_anonymous_args = 0 - 5888 .LVL506: - 5889 0000 10B5 push {r4, lr} - 5890 .LCFI39: - 5891 .cfi_def_cfa_offset 8 - 5892 .cfi_offset 4, -8 - 5893 .cfi_offset 14, -4 - 5894 0002 82B0 sub sp, sp, #8 - 5895 .LCFI40: - 5896 .cfi_def_cfa_offset 16 - 5897 0004 041E subs r4, r0, #0 - 5898 .LVL507: -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t status = LORAMAC_STATUS_OK; -2510:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; -2511:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PhyParam_t phyParam; -2512:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2513:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( mibGet == NULL ) - 5899 .loc 1 2513 0 - 5900 0006 00D1 bne .LCB5764 - 5901 0008 B3E0 b .L340 @long jump - 5902 .LCB5764: -2514:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2515:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -2516:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2517:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 161 - - -2518:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( mibGet->Type ) - 5903 .loc 1 2518 0 - 5904 000a 0378 ldrb r3, [r0] - 5905 000c 1D2B cmp r3, #29 - 5906 000e 00D9 bls .LCB5767 - 5907 0010 B2E0 b .L341 @long jump - 5908 .LCB5767: - 5909 0012 9B00 lsls r3, r3, #2 - 5910 0014 594A ldr r2, .L342 - 5911 0016 D358 ldr r3, [r2, r3] - 5912 0018 9F46 mov pc, r3 - 5913 .section .rodata.LoRaMacMibGetRequestConfirm,"a",%progbits - 5914 .align 2 - 5915 .L310: - 5916 0000 1A000000 .word .L309 - 5917 0004 24000000 .word .L311 - 5918 0008 2E000000 .word .L312 - 5919 000c 38000000 .word .L313 - 5920 0010 42000000 .word .L314 - 5921 0014 4C000000 .word .L315 - 5922 0018 54000000 .word .L316 - 5923 001c 5C000000 .word .L317 - 5924 0020 66000000 .word .L318 - 5925 0024 70000000 .word .L319 - 5926 0028 84000000 .word .L320 - 5927 002c 92000000 .word .L321 - 5928 0030 B4000000 .word .L322 - 5929 0034 A0000000 .word .L323 - 5930 0038 C8000000 .word .L324 - 5931 003c D4000000 .word .L325 - 5932 0040 DE000000 .word .L326 - 5933 0044 E8000000 .word .L327 - 5934 0048 F2000000 .word .L328 - 5935 004c FC000000 .word .L329 - 5936 0050 06010000 .word .L330 - 5937 0054 12010000 .word .L331 - 5938 0058 2A010000 .word .L332 - 5939 005c 1E010000 .word .L333 - 5940 0060 36010000 .word .L334 - 5941 0064 40010000 .word .L335 - 5942 0068 4A010000 .word .L336 - 5943 006c 54010000 .word .L337 - 5944 0070 5E010000 .word .L338 - 5945 0074 68010000 .word .L339 - 5946 .section .text.LoRaMacMibGetRequestConfirm - 5947 .L309: -2519:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2520:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_DEVICE_CLASS: -2521:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2522:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.Class = LoRaMacDeviceClass; - 5948 .loc 1 2522 0 - 5949 001a 594B ldr r3, .L342+4 - 5950 001c 1B78 ldrb r3, [r3] - 5951 001e 0371 strb r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 5952 .loc 1 2509 0 - 5953 0020 0020 movs r0, #0 - ARM GAS /tmp/ccrFaSdZ.s page 162 - - - 5954 .LVL508: -2523:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 5955 .loc 1 2523 0 - 5956 0022 A7E0 b .L308 - 5957 .LVL509: - 5958 .L311: -2524:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2525:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_NETWORK_JOINED: -2526:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2527:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.IsNetworkJoined = IsLoRaMacNetworkJoined; - 5959 .loc 1 2527 0 - 5960 0024 574B ldr r3, .L342+8 - 5961 0026 1B78 ldrb r3, [r3] - 5962 0028 0371 strb r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 5963 .loc 1 2509 0 - 5964 002a 0020 movs r0, #0 - 5965 .LVL510: -2528:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 5966 .loc 1 2528 0 - 5967 002c A2E0 b .L308 - 5968 .LVL511: - 5969 .L312: -2529:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2530:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_ADR: -2531:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2532:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.AdrEnable = AdrCtrlOn; - 5970 .loc 1 2532 0 - 5971 002e 564B ldr r3, .L342+12 - 5972 0030 1B78 ldrb r3, [r3] - 5973 0032 0371 strb r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 5974 .loc 1 2509 0 - 5975 0034 0020 movs r0, #0 - 5976 .LVL512: -2533:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 5977 .loc 1 2533 0 - 5978 0036 9DE0 b .L308 - 5979 .LVL513: - 5980 .L313: -2534:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2535:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_NET_ID: -2536:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2537:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.NetID = LoRaMacNetID; - 5981 .loc 1 2537 0 - 5982 0038 544B ldr r3, .L342+16 - 5983 003a 1B68 ldr r3, [r3] - 5984 003c 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 5985 .loc 1 2509 0 - 5986 003e 0020 movs r0, #0 - 5987 .LVL514: -2538:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 5988 .loc 1 2538 0 - 5989 0040 98E0 b .L308 - 5990 .LVL515: - 5991 .L314: - ARM GAS /tmp/ccrFaSdZ.s page 163 - - -2539:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2540:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_DEV_ADDR: -2541:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2542:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.DevAddr = LoRaMacDevAddr; - 5992 .loc 1 2542 0 - 5993 0042 534B ldr r3, .L342+20 - 5994 0044 1B68 ldr r3, [r3] - 5995 0046 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 5996 .loc 1 2509 0 - 5997 0048 0020 movs r0, #0 - 5998 .LVL516: -2543:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 5999 .loc 1 2543 0 - 6000 004a 93E0 b .L308 - 6001 .LVL517: - 6002 .L315: -2544:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2545:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_NWK_SKEY: -2546:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2547:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.NwkSKey = LoRaMacNwkSKey; - 6003 .loc 1 2547 0 - 6004 004c 514B ldr r3, .L342+24 - 6005 004e 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6006 .loc 1 2509 0 - 6007 0050 0020 movs r0, #0 - 6008 .LVL518: -2548:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6009 .loc 1 2548 0 - 6010 0052 8FE0 b .L308 - 6011 .LVL519: - 6012 .L316: -2549:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2550:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_APP_SKEY: -2551:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2552:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.AppSKey = LoRaMacAppSKey; - 6013 .loc 1 2552 0 - 6014 0054 504B ldr r3, .L342+28 - 6015 0056 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6016 .loc 1 2509 0 - 6017 0058 0020 movs r0, #0 - 6018 .LVL520: -2553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6019 .loc 1 2553 0 - 6020 005a 8BE0 b .L308 - 6021 .LVL521: - 6022 .L317: -2554:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2555:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_PUBLIC_NETWORK: -2556:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2557:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.EnablePublicNetwork = PublicNetwork; - 6023 .loc 1 2557 0 - 6024 005c 4F4B ldr r3, .L342+32 - 6025 005e 1B78 ldrb r3, [r3] - 6026 0060 0371 strb r3, [r0, #4] - ARM GAS /tmp/ccrFaSdZ.s page 164 - - -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6027 .loc 1 2509 0 - 6028 0062 0020 movs r0, #0 - 6029 .LVL522: -2558:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6030 .loc 1 2558 0 - 6031 0064 86E0 b .L308 - 6032 .LVL523: - 6033 .L318: -2559:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2560:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_REPEATER_SUPPORT: -2561:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2562:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.EnableRepeaterSupport = RepeaterSupport; - 6034 .loc 1 2562 0 - 6035 0066 4E4B ldr r3, .L342+36 - 6036 0068 1B78 ldrb r3, [r3] - 6037 006a 0371 strb r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6038 .loc 1 2509 0 - 6039 006c 0020 movs r0, #0 - 6040 .LVL524: -2563:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6041 .loc 1 2563 0 - 6042 006e 81E0 b .L308 - 6043 .LVL525: - 6044 .L319: -2564:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2565:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS: -2566:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2567:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_CHANNELS; - 6045 .loc 1 2567 0 - 6046 0070 01A9 add r1, sp, #4 - 6047 0072 1923 movs r3, #25 - 6048 0074 0B70 strb r3, [r1] -2568:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 6049 .loc 1 2568 0 - 6050 0076 4B4B ldr r3, .L342+40 - 6051 0078 1878 ldrb r0, [r3] - 6052 .LVL526: - 6053 007a FFF7FEFF bl RegionGetPhyParam - 6054 .LVL527: -2569:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2570:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ChannelList = phyParam.Channels; - 6055 .loc 1 2570 0 - 6056 007e 6060 str r0, [r4, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6057 .loc 1 2509 0 - 6058 0080 0020 movs r0, #0 - 6059 .LVL528: -2571:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6060 .loc 1 2571 0 - 6061 0082 77E0 b .L308 - 6062 .LVL529: - 6063 .L320: -2572:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2573:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_RX2_CHANNEL: -2574:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - ARM GAS /tmp/ccrFaSdZ.s page 165 - - -2575:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.Rx2Channel = LoRaMacParams.Rx2Channel; - 6064 .loc 1 2575 0 - 6065 0084 0434 adds r4, r4, #4 - 6066 0086 484B ldr r3, .L342+44 - 6067 0088 2433 adds r3, r3, #36 - 6068 008a 06CB ldmia r3!, {r1, r2} - 6069 008c 06C4 stmia r4!, {r1, r2} -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6070 .loc 1 2509 0 - 6071 008e 0020 movs r0, #0 - 6072 .LVL530: -2576:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6073 .loc 1 2576 0 - 6074 0090 70E0 b .L308 - 6075 .LVL531: - 6076 .L321: -2577:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2578:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_RX2_DEFAULT_CHANNEL: -2579:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2580:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.Rx2Channel = LoRaMacParamsDefaults.Rx2Channel; - 6077 .loc 1 2580 0 - 6078 0092 0434 adds r4, r4, #4 - 6079 0094 454B ldr r3, .L342+48 - 6080 0096 2433 adds r3, r3, #36 - 6081 0098 06CB ldmia r3!, {r1, r2} - 6082 009a 06C4 stmia r4!, {r1, r2} -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6083 .loc 1 2509 0 - 6084 009c 0020 movs r0, #0 - 6085 .LVL532: -2581:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6086 .loc 1 2581 0 - 6087 009e 69E0 b .L308 - 6088 .LVL533: - 6089 .L323: -2582:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2583:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_DEFAULT_MASK: -2584:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2585:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_CHANNELS_DEFAULT_MASK; - 6090 .loc 1 2585 0 - 6091 00a0 01A9 add r1, sp, #4 - 6092 00a2 1723 movs r3, #23 - 6093 00a4 0B70 strb r3, [r1] -2586:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 6094 .loc 1 2586 0 - 6095 00a6 3F4B ldr r3, .L342+40 - 6096 00a8 1878 ldrb r0, [r3] - 6097 .LVL534: - 6098 00aa FFF7FEFF bl RegionGetPhyParam - 6099 .LVL535: -2587:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2588:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ChannelsDefaultMask = phyParam.ChannelsMask; - 6100 .loc 1 2588 0 - 6101 00ae 6060 str r0, [r4, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6102 .loc 1 2509 0 - 6103 00b0 0020 movs r0, #0 - ARM GAS /tmp/ccrFaSdZ.s page 166 - - - 6104 .LVL536: -2589:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6105 .loc 1 2589 0 - 6106 00b2 5FE0 b .L308 - 6107 .LVL537: - 6108 .L322: -2590:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2591:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_MASK: -2592:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2593:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_CHANNELS_MASK; - 6109 .loc 1 2593 0 - 6110 00b4 01A9 add r1, sp, #4 - 6111 00b6 1623 movs r3, #22 - 6112 00b8 0B70 strb r3, [r1] -2594:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 6113 .loc 1 2594 0 - 6114 00ba 3A4B ldr r3, .L342+40 - 6115 00bc 1878 ldrb r0, [r3] - 6116 .LVL538: - 6117 00be FFF7FEFF bl RegionGetPhyParam - 6118 .LVL539: -2595:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2596:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ChannelsMask = phyParam.ChannelsMask; - 6119 .loc 1 2596 0 - 6120 00c2 6060 str r0, [r4, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6121 .loc 1 2509 0 - 6122 00c4 0020 movs r0, #0 - 6123 .LVL540: -2597:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6124 .loc 1 2597 0 - 6125 00c6 55E0 b .L308 - 6126 .LVL541: - 6127 .L324: -2598:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2599:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_NB_REP: -2600:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2601:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ChannelNbRep = LoRaMacParams.ChannelsNbRep; - 6128 .loc 1 2601 0 - 6129 00c8 374A ldr r2, .L342+44 - 6130 00ca 2023 movs r3, #32 - 6131 00cc D35C ldrb r3, [r2, r3] - 6132 00ce 0371 strb r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6133 .loc 1 2509 0 - 6134 00d0 0020 movs r0, #0 - 6135 .LVL542: -2602:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6136 .loc 1 2602 0 - 6137 00d2 4FE0 b .L308 - 6138 .LVL543: - 6139 .L325: -2603:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2604:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_MAX_RX_WINDOW_DURATION: -2605:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2606:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.MaxRxWindow = LoRaMacParams.MaxRxWindow; - 6140 .loc 1 2606 0 - ARM GAS /tmp/ccrFaSdZ.s page 167 - - - 6141 00d4 344B ldr r3, .L342+44 - 6142 00d6 DB68 ldr r3, [r3, #12] - 6143 00d8 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6144 .loc 1 2509 0 - 6145 00da 0020 movs r0, #0 - 6146 .LVL544: -2607:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6147 .loc 1 2607 0 - 6148 00dc 4AE0 b .L308 - 6149 .LVL545: - 6150 .L326: -2608:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2609:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_RECEIVE_DELAY_1: -2610:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2611:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ReceiveDelay1 = LoRaMacParams.ReceiveDelay1; - 6151 .loc 1 2611 0 - 6152 00de 324B ldr r3, .L342+44 - 6153 00e0 1B69 ldr r3, [r3, #16] - 6154 00e2 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6155 .loc 1 2509 0 - 6156 00e4 0020 movs r0, #0 - 6157 .LVL546: -2612:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6158 .loc 1 2612 0 - 6159 00e6 45E0 b .L308 - 6160 .LVL547: - 6161 .L327: -2613:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2614:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_RECEIVE_DELAY_2: -2615:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2616:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ReceiveDelay2 = LoRaMacParams.ReceiveDelay2; - 6162 .loc 1 2616 0 - 6163 00e8 2F4B ldr r3, .L342+44 - 6164 00ea 5B69 ldr r3, [r3, #20] - 6165 00ec 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6166 .loc 1 2509 0 - 6167 00ee 0020 movs r0, #0 - 6168 .LVL548: -2617:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6169 .loc 1 2617 0 - 6170 00f0 40E0 b .L308 - 6171 .LVL549: - 6172 .L328: -2618:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2619:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_JOIN_ACCEPT_DELAY_1: -2620:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2621:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.JoinAcceptDelay1 = LoRaMacParams.JoinAcceptDelay1; - 6173 .loc 1 2621 0 - 6174 00f2 2D4B ldr r3, .L342+44 - 6175 00f4 9B69 ldr r3, [r3, #24] - 6176 00f6 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6177 .loc 1 2509 0 - 6178 00f8 0020 movs r0, #0 - ARM GAS /tmp/ccrFaSdZ.s page 168 - - - 6179 .LVL550: -2622:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6180 .loc 1 2622 0 - 6181 00fa 3BE0 b .L308 - 6182 .LVL551: - 6183 .L329: -2623:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2624:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_JOIN_ACCEPT_DELAY_2: -2625:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2626:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.JoinAcceptDelay2 = LoRaMacParams.JoinAcceptDelay2; - 6184 .loc 1 2626 0 - 6185 00fc 2A4B ldr r3, .L342+44 - 6186 00fe DB69 ldr r3, [r3, #28] - 6187 0100 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6188 .loc 1 2509 0 - 6189 0102 0020 movs r0, #0 - 6190 .LVL552: -2627:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6191 .loc 1 2627 0 - 6192 0104 36E0 b .L308 - 6193 .LVL553: - 6194 .L330: -2628:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2629:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_DEFAULT_DATARATE: -2630:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2631:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ChannelsDefaultDatarate = LoRaMacParamsDefaults.ChannelsDatarate; - 6195 .loc 1 2631 0 - 6196 0106 294B ldr r3, .L342+48 - 6197 0108 5B78 ldrb r3, [r3, #1] - 6198 010a 5BB2 sxtb r3, r3 - 6199 010c 0371 strb r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6200 .loc 1 2509 0 - 6201 010e 0020 movs r0, #0 - 6202 .LVL554: -2632:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6203 .loc 1 2632 0 - 6204 0110 30E0 b .L308 - 6205 .LVL555: - 6206 .L331: -2633:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2634:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_DATARATE: -2635:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2636:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ChannelsDatarate = LoRaMacParams.ChannelsDatarate; - 6207 .loc 1 2636 0 - 6208 0112 254B ldr r3, .L342+44 - 6209 0114 5B78 ldrb r3, [r3, #1] - 6210 0116 5BB2 sxtb r3, r3 - 6211 0118 0371 strb r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6212 .loc 1 2509 0 - 6213 011a 0020 movs r0, #0 - 6214 .LVL556: -2637:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6215 .loc 1 2637 0 - 6216 011c 2AE0 b .L308 - ARM GAS /tmp/ccrFaSdZ.s page 169 - - - 6217 .LVL557: - 6218 .L333: -2638:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2639:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_DEFAULT_TX_POWER: -2640:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ChannelsDefaultTxPower = LoRaMacParamsDefaults.ChannelsTxPower; - 6219 .loc 1 2641 0 - 6220 011e 234B ldr r3, .L342+48 - 6221 0120 1B78 ldrb r3, [r3] - 6222 0122 5BB2 sxtb r3, r3 - 6223 0124 0371 strb r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6224 .loc 1 2509 0 - 6225 0126 0020 movs r0, #0 - 6226 .LVL558: -2642:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6227 .loc 1 2642 0 - 6228 0128 24E0 b .L308 - 6229 .LVL559: - 6230 .L332: -2643:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2644:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_TX_POWER: -2645:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2646:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.ChannelsTxPower = LoRaMacParams.ChannelsTxPower; - 6231 .loc 1 2646 0 - 6232 012a 1F4B ldr r3, .L342+44 - 6233 012c 1B78 ldrb r3, [r3] - 6234 012e 5BB2 sxtb r3, r3 - 6235 0130 0371 strb r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6236 .loc 1 2509 0 - 6237 0132 0020 movs r0, #0 - 6238 .LVL560: -2647:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6239 .loc 1 2647 0 - 6240 0134 1EE0 b .L308 - 6241 .LVL561: - 6242 .L334: -2648:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2649:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_UPLINK_COUNTER: -2650:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2651:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.UpLinkCounter = UpLinkCounter; - 6243 .loc 1 2651 0 - 6244 0136 1E4B ldr r3, .L342+52 - 6245 0138 1B68 ldr r3, [r3] - 6246 013a 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6247 .loc 1 2509 0 - 6248 013c 0020 movs r0, #0 - 6249 .LVL562: -2652:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6250 .loc 1 2652 0 - 6251 013e 19E0 b .L308 - 6252 .LVL563: - 6253 .L335: -2653:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2654:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_DOWNLINK_COUNTER: - ARM GAS /tmp/ccrFaSdZ.s page 170 - - -2655:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2656:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.DownLinkCounter = DownLinkCounter; - 6254 .loc 1 2656 0 - 6255 0140 1C4B ldr r3, .L342+56 - 6256 0142 1B68 ldr r3, [r3] - 6257 0144 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6258 .loc 1 2509 0 - 6259 0146 0020 movs r0, #0 - 6260 .LVL564: -2657:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6261 .loc 1 2657 0 - 6262 0148 14E0 b .L308 - 6263 .LVL565: - 6264 .L336: -2658:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2659:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_MULTICAST_CHANNEL: -2660:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2661:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.MulticastList = MulticastChannels; - 6265 .loc 1 2661 0 - 6266 014a 1B4B ldr r3, .L342+60 - 6267 014c 1B68 ldr r3, [r3] - 6268 014e 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6269 .loc 1 2509 0 - 6270 0150 0020 movs r0, #0 - 6271 .LVL566: -2662:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6272 .loc 1 2662 0 - 6273 0152 0FE0 b .L308 - 6274 .LVL567: - 6275 .L337: -2663:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2664:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_SYSTEM_MAX_RX_ERROR: -2665:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2666:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.SystemMaxRxError = LoRaMacParams.SystemMaxRxError; - 6276 .loc 1 2666 0 - 6277 0154 144B ldr r3, .L342+44 - 6278 0156 5B68 ldr r3, [r3, #4] - 6279 0158 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6280 .loc 1 2509 0 - 6281 015a 0020 movs r0, #0 - 6282 .LVL568: -2667:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6283 .loc 1 2667 0 - 6284 015c 0AE0 b .L308 - 6285 .LVL569: - 6286 .L338: -2668:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2669:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_MIN_RX_SYMBOLS: -2670:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2671:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.MinRxSymbols = LoRaMacParams.MinRxSymbols; - 6287 .loc 1 2671 0 - 6288 015e 124B ldr r3, .L342+44 - 6289 0160 1B7A ldrb r3, [r3, #8] - 6290 0162 0371 strb r3, [r0, #4] - ARM GAS /tmp/ccrFaSdZ.s page 171 - - -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6291 .loc 1 2509 0 - 6292 0164 0020 movs r0, #0 - 6293 .LVL570: -2672:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6294 .loc 1 2672 0 - 6295 0166 05E0 b .L308 - 6296 .LVL571: - 6297 .L339: -2673:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2674:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_ANTENNA_GAIN: -2675:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2676:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mibGet->Param.AntennaGain = LoRaMacParams.AntennaGain; - 6298 .loc 1 2676 0 - 6299 0168 0F4B ldr r3, .L342+44 - 6300 016a 5B6B ldr r3, [r3, #52] - 6301 016c 4360 str r3, [r0, #4] -2509:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; - 6302 .loc 1 2509 0 - 6303 016e 0020 movs r0, #0 - 6304 .LVL572: -2677:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6305 .loc 1 2677 0 - 6306 0170 00E0 b .L308 - 6307 .LVL573: - 6308 .L340: -2515:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 6309 .loc 1 2515 0 - 6310 0172 0320 movs r0, #3 - 6311 .LVL574: - 6312 .L308: -2678:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2679:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: -2680:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_SERVICE_UNKNOWN; -2681:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2682:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2683:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2684:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return status; -2685:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 6313 .loc 1 2685 0 - 6314 0174 02B0 add sp, sp, #8 - 6315 @ sp needed - 6316 0176 10BD pop {r4, pc} - 6317 .LVL575: - 6318 .L341: -2680:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6319 .loc 1 2680 0 - 6320 0178 0220 movs r0, #2 - 6321 .LVL576: - 6322 017a FBE7 b .L308 - 6323 .L343: - 6324 .align 2 - 6325 .L342: - 6326 017c 00000000 .word .L310 - 6327 0180 00000000 .word .LANCHOR25 - 6328 0184 00000000 .word .LANCHOR0 - 6329 0188 00000000 .word .LANCHOR29 - ARM GAS /tmp/ccrFaSdZ.s page 172 - - - 6330 018c 00000000 .word .LANCHOR40 - 6331 0190 00000000 .word .LANCHOR41 - 6332 0194 00000000 .word .LANCHOR33 - 6333 0198 00000000 .word .LANCHOR32 - 6334 019c 00000000 .word .LANCHOR63 - 6335 01a0 00000000 .word .LANCHOR21 - 6336 01a4 00000000 .word .LANCHOR22 - 6337 01a8 00000000 .word .LANCHOR14 - 6338 01ac 00000000 .word .LANCHOR13 - 6339 01b0 00000000 .word .LANCHOR1 - 6340 01b4 00000000 .word .LANCHOR2 - 6341 01b8 00000000 .word .LANCHOR18 - 6342 .cfi_endproc - 6343 .LFE111: - 6345 .section .text.LoRaMacMibSetRequestConfirm,"ax",%progbits - 6346 .align 1 - 6347 .global LoRaMacMibSetRequestConfirm - 6348 .syntax unified - 6349 .code 16 - 6350 .thumb_func - 6351 .fpu softvfp - 6353 LoRaMacMibSetRequestConfirm: - 6354 .LFB112: -2686:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2687:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacMibSetRequestConfirm( MibRequestConfirm_t *mibSet ) -2688:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 6355 .loc 1 2688 0 - 6356 .cfi_startproc - 6357 @ args = 0, pretend = 0, frame = 16 - 6358 @ frame_needed = 0, uses_anonymous_args = 0 - 6359 .LVL577: - 6360 0000 70B5 push {r4, r5, r6, lr} - 6361 .LCFI41: - 6362 .cfi_def_cfa_offset 16 - 6363 .cfi_offset 4, -16 - 6364 .cfi_offset 5, -12 - 6365 .cfi_offset 6, -8 - 6366 .cfi_offset 14, -4 - 6367 0002 86B0 sub sp, sp, #24 - 6368 .LCFI42: - 6369 .cfi_def_cfa_offset 40 - 6370 0004 041E subs r4, r0, #0 - 6371 .LVL578: -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t status = LORAMAC_STATUS_OK; -2690:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; -2691:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** VerifyParams_t verify; -2692:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2693:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( mibSet == NULL ) - 6372 .loc 1 2693 0 - 6373 0006 00D1 bne .LCB6177 - 6374 0008 6AE1 b .L379 @long jump - 6375 .LCB6177: -2694:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2695:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -2696:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2697:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_TX_RUNNING ) == LORAMAC_TX_RUNNING ) - 6376 .loc 1 2697 0 - ARM GAS /tmp/ccrFaSdZ.s page 173 - - - 6377 000a C54B ldr r3, .L400 - 6378 000c 1B68 ldr r3, [r3] - 6379 000e DB07 lsls r3, r3, #31 - 6380 0010 00D5 bpl .LCB6183 - 6381 0012 67E1 b .L380 @long jump - 6382 .LCB6183: -2698:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2699:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_BUSY; -2700:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2701:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2702:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( mibSet->Type ) - 6383 .loc 1 2702 0 - 6384 0014 0378 ldrb r3, [r0] - 6385 0016 1D2B cmp r3, #29 - 6386 0018 00D9 bls .LCB6186 - 6387 001a 66E1 b .L381 @long jump - 6388 .LCB6186: - 6389 001c 9B00 lsls r3, r3, #2 - 6390 001e C14A ldr r2, .L400+4 - 6391 0020 D358 ldr r3, [r2, r3] - 6392 0022 9F46 mov pc, r3 - 6393 .section .rodata.LoRaMacMibSetRequestConfirm,"a",%progbits - 6394 .align 2 - 6395 .L347: - 6396 0000 24000000 .word .L346 - 6397 0004 4E000000 .word .L348 - 6398 0008 58000000 .word .L349 - 6399 000c 62000000 .word .L350 - 6400 0010 6C000000 .word .L351 - 6401 0014 76000000 .word .L352 - 6402 0018 8A000000 .word .L353 - 6403 001c 9E000000 .word .L354 - 6404 0020 AE000000 .word .L355 - 6405 0024 EA020000 .word .L381 - 6406 0028 B8000000 .word .L356 - 6407 002c 66010000 .word .L357 - 6408 0030 B0010000 .word .L358 - 6409 0034 94010000 .word .L359 - 6410 0038 CC010000 .word .L360 - 6411 003c E2010000 .word .L361 - 6412 0040 EC010000 .word .L362 - 6413 0044 F6010000 .word .L363 - 6414 0048 00020000 .word .L364 - 6415 004c 0A020000 .word .L365 - 6416 0050 14020000 .word .L366 - 6417 0054 3A020000 .word .L367 - 6418 0058 82020000 .word .L368 - 6419 005c 5E020000 .word .L369 - 6420 0060 A6020000 .word .L370 - 6421 0064 B0020000 .word .L371 - 6422 0068 EA020000 .word .L381 - 6423 006c BA020000 .word .L372 - 6424 0070 C8020000 .word .L373 - 6425 0074 D6020000 .word .L374 - 6426 .section .text.LoRaMacMibSetRequestConfirm - 6427 .L346: -2703:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - ARM GAS /tmp/ccrFaSdZ.s page 174 - - -2704:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_DEVICE_CLASS: -2705:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2706:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDeviceClass = mibSet->Param.Class; - 6428 .loc 1 2706 0 - 6429 0024 0379 ldrb r3, [r0, #4] - 6430 0026 C04A ldr r2, .L400+8 - 6431 0028 1370 strb r3, [r2] -2707:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( LoRaMacDeviceClass ) - 6432 .loc 1 2707 0 - 6433 002a 002B cmp r3, #0 - 6434 002c 03D0 beq .L375 - 6435 002e 022B cmp r3, #2 - 6436 0030 06D0 beq .L376 -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6437 .loc 1 2689 0 - 6438 0032 0020 movs r0, #0 - 6439 .LVL579: - 6440 0034 57E1 b .L345 - 6441 .LVL580: - 6442 .L375: -2708:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2709:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case CLASS_A: -2710:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2711:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Set the radio into sleep to setup a defined state -2712:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.Sleep( ); - 6443 .loc 1 2712 0 - 6444 0036 BD4B ldr r3, .L400+12 - 6445 0038 5B6B ldr r3, [r3, #52] - 6446 003a 9847 blx r3 - 6447 .LVL581: -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6448 .loc 1 2689 0 - 6449 003c 0020 movs r0, #0 -2713:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6450 .loc 1 2713 0 - 6451 003e 52E1 b .L345 - 6452 .LVL582: - 6453 .L376: -2714:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2715:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case CLASS_B: -2716:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2717:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2718:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2719:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case CLASS_C: -2720:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2721:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Set the NodeAckRequested indicator to default -2722:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; - 6454 .loc 1 2722 0 - 6455 0040 BB4B ldr r3, .L400+16 - 6456 0042 0022 movs r2, #0 - 6457 0044 1A70 strb r2, [r3] -2723:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** OnRxWindow2TimerEvent( ); - 6458 .loc 1 2723 0 - 6459 0046 FFF7FEFF bl OnRxWindow2TimerEvent - 6460 .LVL583: -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6461 .loc 1 2689 0 - ARM GAS /tmp/ccrFaSdZ.s page 175 - - - 6462 004a 0020 movs r0, #0 -2724:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6463 .loc 1 2724 0 - 6464 004c 4BE1 b .L345 - 6465 .LVL584: - 6466 .L348: -2725:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2726:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2727:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2728:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2729:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_NETWORK_JOINED: -2730:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2731:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** IsLoRaMacNetworkJoined = mibSet->Param.IsNetworkJoined; - 6467 .loc 1 2731 0 - 6468 004e 0279 ldrb r2, [r0, #4] - 6469 0050 B84B ldr r3, .L400+20 - 6470 0052 1A70 strb r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6471 .loc 1 2689 0 - 6472 0054 0020 movs r0, #0 - 6473 .LVL585: -2732:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6474 .loc 1 2732 0 - 6475 0056 46E1 b .L345 - 6476 .LVL586: - 6477 .L349: -2733:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2734:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_ADR: -2735:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2736:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AdrCtrlOn = mibSet->Param.AdrEnable; - 6478 .loc 1 2736 0 - 6479 0058 0279 ldrb r2, [r0, #4] - 6480 005a B74B ldr r3, .L400+24 - 6481 005c 1A70 strb r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6482 .loc 1 2689 0 - 6483 005e 0020 movs r0, #0 - 6484 .LVL587: -2737:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6485 .loc 1 2737 0 - 6486 0060 41E1 b .L345 - 6487 .LVL588: - 6488 .L350: -2738:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2739:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_NET_ID: -2740:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2741:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacNetID = mibSet->Param.NetID; - 6489 .loc 1 2741 0 - 6490 0062 4268 ldr r2, [r0, #4] - 6491 0064 B54B ldr r3, .L400+28 - 6492 0066 1A60 str r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6493 .loc 1 2689 0 - 6494 0068 0020 movs r0, #0 - 6495 .LVL589: -2742:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6496 .loc 1 2742 0 - ARM GAS /tmp/ccrFaSdZ.s page 176 - - - 6497 006a 3CE1 b .L345 - 6498 .LVL590: - 6499 .L351: -2743:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2744:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_DEV_ADDR: -2745:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2746:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevAddr = mibSet->Param.DevAddr; - 6500 .loc 1 2746 0 - 6501 006c 4268 ldr r2, [r0, #4] - 6502 006e B44B ldr r3, .L400+32 - 6503 0070 1A60 str r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6504 .loc 1 2689 0 - 6505 0072 0020 movs r0, #0 - 6506 .LVL591: -2747:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6507 .loc 1 2747 0 - 6508 0074 37E1 b .L345 - 6509 .LVL592: - 6510 .L352: -2748:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2749:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_NWK_SKEY: -2750:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2751:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( mibSet->Param.NwkSKey != NULL ) - 6511 .loc 1 2751 0 - 6512 0076 4168 ldr r1, [r0, #4] - 6513 0078 0029 cmp r1, #0 - 6514 007a 00D1 bne .LCB6277 - 6515 007c 37E1 b .L383 @long jump - 6516 .LCB6277: -2752:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2753:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memcpy1( LoRaMacNwkSKey, mibSet->Param.NwkSKey, - 6517 .loc 1 2753 0 - 6518 007e 1022 movs r2, #16 - 6519 0080 B048 ldr r0, .L400+36 - 6520 .LVL593: - 6521 0082 FFF7FEFF bl memcpy1 - 6522 .LVL594: -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6523 .loc 1 2689 0 - 6524 0086 0020 movs r0, #0 - 6525 0088 2DE1 b .L345 - 6526 .LVL595: - 6527 .L353: -2754:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** sizeof( LoRaMacNwkSKey ) ); -2755:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2756:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2757:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2758:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2759:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2760:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2761:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2762:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_APP_SKEY: -2763:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2764:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( mibSet->Param.AppSKey != NULL ) - 6528 .loc 1 2764 0 - 6529 008a 4168 ldr r1, [r0, #4] - ARM GAS /tmp/ccrFaSdZ.s page 177 - - - 6530 008c 0029 cmp r1, #0 - 6531 008e 00D1 bne .LCB6291 - 6532 0090 2FE1 b .L384 @long jump - 6533 .LCB6291: -2765:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2766:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memcpy1( LoRaMacAppSKey, mibSet->Param.AppSKey, - 6534 .loc 1 2766 0 - 6535 0092 1022 movs r2, #16 - 6536 0094 AC48 ldr r0, .L400+40 - 6537 .LVL596: - 6538 0096 FFF7FEFF bl memcpy1 - 6539 .LVL597: -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6540 .loc 1 2689 0 - 6541 009a 0020 movs r0, #0 - 6542 009c 23E1 b .L345 - 6543 .LVL598: - 6544 .L354: -2767:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** sizeof( LoRaMacAppSKey ) ); -2768:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2769:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2770:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2771:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2772:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2773:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2774:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2775:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_PUBLIC_NETWORK: -2776:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2777:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PublicNetwork = mibSet->Param.EnablePublicNetwork; - 6545 .loc 1 2777 0 - 6546 009e 0079 ldrb r0, [r0, #4] - 6547 .LVL599: - 6548 00a0 AA4B ldr r3, .L400+44 - 6549 00a2 1870 strb r0, [r3] -2778:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Radio.SetPublicNetwork( PublicNetwork ); - 6550 .loc 1 2778 0 - 6551 00a4 A14B ldr r3, .L400+12 - 6552 00a6 1B6E ldr r3, [r3, #96] - 6553 00a8 9847 blx r3 - 6554 .LVL600: -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6555 .loc 1 2689 0 - 6556 00aa 0020 movs r0, #0 -2779:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6557 .loc 1 2779 0 - 6558 00ac 1BE1 b .L345 - 6559 .LVL601: - 6560 .L355: -2780:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2781:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_REPEATER_SUPPORT: -2782:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2783:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RepeaterSupport = mibSet->Param.EnableRepeaterSupport; - 6561 .loc 1 2783 0 - 6562 00ae 0279 ldrb r2, [r0, #4] - 6563 00b0 A74B ldr r3, .L400+48 - 6564 00b2 1A70 strb r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - ARM GAS /tmp/ccrFaSdZ.s page 178 - - - 6565 .loc 1 2689 0 - 6566 00b4 0020 movs r0, #0 - 6567 .LVL602: -2784:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6568 .loc 1 2784 0 - 6569 00b6 16E1 b .L345 - 6570 .LVL603: - 6571 .L356: -2785:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2786:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_RX2_CHANNEL: -2787:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2788:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DatarateParams.Datarate = mibSet->Param.Rx2Channel.Datarate; - 6572 .loc 1 2788 0 - 6573 00b8 0823 movs r3, #8 - 6574 00ba C356 ldrsb r3, [r0, r3] - 6575 00bc 03A9 add r1, sp, #12 - 6576 00be 0B70 strb r3, [r1] -2789:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DatarateParams.DownlinkDwellTime = LoRaMacParams.DownlinkDwellTime; - 6577 .loc 1 2789 0 - 6578 00c0 A44A ldr r2, .L400+52 - 6579 00c2 2D23 movs r3, #45 - 6580 00c4 D35C ldrb r3, [r2, r3] - 6581 00c6 4B70 strb r3, [r1, #1] -2790:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2791:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionVerify( LoRaMacRegion, &verify, PHY_RX_DR ) == true ) - 6582 .loc 1 2791 0 - 6583 00c8 A34B ldr r3, .L400+56 - 6584 00ca 1878 ldrb r0, [r3] - 6585 .LVL604: - 6586 00cc 0622 movs r2, #6 - 6587 00ce FFF7FEFF bl RegionVerify - 6588 .LVL605: - 6589 00d2 0028 cmp r0, #0 - 6590 00d4 00D1 bne .LCB6342 - 6591 00d6 0EE1 b .L385 @long jump - 6592 .LCB6342: -2792:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2793:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel = mibSet->Param.Rx2Channel; - 6593 .loc 1 2793 0 - 6594 00d8 9E4B ldr r3, .L400+52 - 6595 00da 2433 adds r3, r3, #36 - 6596 00dc 0434 adds r4, r4, #4 - 6597 .LVL606: - 6598 00de 06CC ldmia r4!, {r1, r2} - 6599 00e0 06C3 stmia r3!, {r1, r2} - 6600 .LVL607: -2794:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2795:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacDeviceClass == CLASS_C ) && ( IsLoRaMacNetworkJoined == true ) ) - 6601 .loc 1 2795 0 - 6602 00e2 914B ldr r3, .L400+8 - 6603 00e4 1B78 ldrb r3, [r3] - 6604 00e6 022B cmp r3, #2 - 6605 00e8 01D0 beq .L398 -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6606 .loc 1 2689 0 - 6607 00ea 0020 movs r0, #0 - 6608 00ec FBE0 b .L345 - ARM GAS /tmp/ccrFaSdZ.s page 179 - - - 6609 .L398: - 6610 .loc 1 2795 0 discriminator 1 - 6611 00ee 914B ldr r3, .L400+20 - 6612 00f0 1B78 ldrb r3, [r3] - 6613 00f2 002B cmp r3, #0 - 6614 00f4 01D1 bne .L399 -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6615 .loc 1 2689 0 - 6616 00f6 0020 movs r0, #0 - 6617 00f8 F5E0 b .L345 - 6618 .L399: -2796:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2797:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Compute Rx2 windows parameters -2798:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RegionComputeRxWindowParameters( LoRaMacRegion, -2799:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel.Datarate, - 6619 .loc 1 2799 0 - 6620 00fa 964D ldr r5, .L400+52 -2798:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.Rx2Channel.Datarate, - 6621 .loc 1 2798 0 - 6622 00fc 6B68 ldr r3, [r5, #4] - 6623 00fe 2A7A ldrb r2, [r5, #8] - 6624 0100 2821 movs r1, #40 - 6625 0102 6956 ldrsb r1, [r5, r1] - 6626 0104 944E ldr r6, .L400+56 - 6627 0106 3078 ldrb r0, [r6] - 6628 0108 944C ldr r4, .L400+60 - 6629 .LVL608: - 6630 010a 0094 str r4, [sp] - 6631 010c FFF7FEFF bl RegionComputeRxWindowParameters - 6632 .LVL609: -2800:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MinRxSymbols, -2801:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.SystemMaxRxError, -2802:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** &RxWindow2Config ); -2803:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2804:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.Channel = Channel; - 6633 .loc 1 2804 0 - 6634 0110 934B ldr r3, .L400+64 - 6635 0112 1B78 ldrb r3, [r3] - 6636 0114 2370 strb r3, [r4] -2805:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.Frequency = LoRaMacParams.Rx2Channel.Frequency; - 6637 .loc 1 2805 0 - 6638 0116 6B6A ldr r3, [r5, #36] - 6639 0118 6360 str r3, [r4, #4] -2806:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.DownlinkDwellTime = LoRaMacParams.DownlinkDwellTime; - 6640 .loc 1 2806 0 - 6641 011a 2D23 movs r3, #45 - 6642 011c EB5C ldrb r3, [r5, r3] - 6643 011e 2374 strb r3, [r4, #16] -2807:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.RepeaterSupport = RepeaterSupport; - 6644 .loc 1 2807 0 - 6645 0120 8B4B ldr r3, .L400+48 - 6646 0122 1B78 ldrb r3, [r3] - 6647 0124 6374 strb r3, [r4, #17] -2808:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.Window = 1; - 6648 .loc 1 2808 0 - 6649 0126 0123 movs r3, #1 - 6650 0128 E374 strb r3, [r4, #19] - ARM GAS /tmp/ccrFaSdZ.s page 180 - - -2809:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindow2Config.RxContinuous = true; - 6651 .loc 1 2809 0 - 6652 012a A374 strb r3, [r4, #18] -2810:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2811:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionRxConfig( LoRaMacRegion, &RxWindow2Config, ( int8_t* )&McpsIndication - 6653 .loc 1 2811 0 - 6654 012c 8D4A ldr r2, .L400+68 - 6655 012e 3078 ldrb r0, [r6] - 6656 0130 0432 adds r2, r2, #4 - 6657 0132 2100 movs r1, r4 - 6658 0134 FFF7FEFF bl RegionRxConfig - 6659 .LVL610: - 6660 0138 0028 cmp r0, #0 - 6661 013a 00D1 bne .LCB6402 - 6662 013c DDE0 b .L388 @long jump - 6663 .LCB6402: -2812:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2813:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxWindowSetup( RxWindow2Config.RxContinuous, LoRaMacParams.MaxRxWindow ); - 6664 .loc 1 2813 0 - 6665 013e 874B ldr r3, .L400+60 - 6666 0140 9B7C ldrb r3, [r3, #18] - 6667 0142 844A ldr r2, .L400+52 - 6668 0144 D068 ldr r0, [r2, #12] - 6669 .LVL611: - 6670 .LBB81: - 6671 .LBB82: -1508:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 6672 .loc 1 1508 0 - 6673 0146 002B cmp r3, #0 - 6674 0148 08D1 bne .L377 -1510:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 6675 .loc 1 1510 0 - 6676 014a 784B ldr r3, .L400+12 - 6677 .LVL612: - 6678 014c DB6B ldr r3, [r3, #60] - 6679 014e 9847 blx r3 - 6680 .LVL613: - 6681 .L378: - 6682 .LBE82: - 6683 .LBE81: -2814:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** RxSlot = RxWindow2Config.Window; - 6684 .loc 1 2814 0 - 6685 0150 824B ldr r3, .L400+60 - 6686 0152 DA7C ldrb r2, [r3, #19] - 6687 0154 844B ldr r3, .L400+72 - 6688 0156 1A70 strb r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6689 .loc 1 2689 0 - 6690 0158 0020 movs r0, #0 - 6691 015a C4E0 b .L345 - 6692 .LVL614: - 6693 .L377: - 6694 .LBB84: - 6695 .LBB83: -1514:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 6696 .loc 1 1514 0 - 6697 015c 734B ldr r3, .L400+12 - ARM GAS /tmp/ccrFaSdZ.s page 181 - - - 6698 .LVL615: - 6699 015e DB6B ldr r3, [r3, #60] - 6700 0160 0020 movs r0, #0 - 6701 .LVL616: - 6702 0162 9847 blx r3 - 6703 .LVL617: - 6704 0164 F4E7 b .L378 - 6705 .LVL618: - 6706 .L357: - 6707 .LBE83: - 6708 .LBE84: -2815:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2816:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2817:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2818:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2819:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2820:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2821:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2822:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2823:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2824:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2825:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2826:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2827:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2828:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_RX2_DEFAULT_CHANNEL: -2829:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2830:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DatarateParams.Datarate = mibSet->Param.Rx2Channel.Datarate; - 6709 .loc 1 2830 0 - 6710 0166 0823 movs r3, #8 - 6711 0168 C356 ldrsb r3, [r0, r3] - 6712 016a 03A9 add r1, sp, #12 - 6713 016c 0B70 strb r3, [r1] -2831:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DatarateParams.DownlinkDwellTime = LoRaMacParams.DownlinkDwellTime; - 6714 .loc 1 2831 0 - 6715 016e 794A ldr r2, .L400+52 - 6716 0170 2D23 movs r3, #45 - 6717 0172 D35C ldrb r3, [r2, r3] - 6718 0174 4B70 strb r3, [r1, #1] -2832:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2833:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionVerify( LoRaMacRegion, &verify, PHY_RX_DR ) == true ) - 6719 .loc 1 2833 0 - 6720 0176 784B ldr r3, .L400+56 - 6721 0178 1878 ldrb r0, [r3] - 6722 .LVL619: - 6723 017a 0622 movs r2, #6 - 6724 017c FFF7FEFF bl RegionVerify - 6725 .LVL620: - 6726 0180 0028 cmp r0, #0 - 6727 0182 00D1 bne .LCB6472 - 6728 0184 BBE0 b .L389 @long jump - 6729 .LCB6472: -2834:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2835:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.Rx2Channel = mibSet->Param.Rx2DefaultChannel; - 6730 .loc 1 2835 0 - 6731 0186 794B ldr r3, .L400+76 - 6732 0188 2433 adds r3, r3, #36 - 6733 018a 0434 adds r4, r4, #4 - ARM GAS /tmp/ccrFaSdZ.s page 182 - - - 6734 .LVL621: - 6735 018c 06CC ldmia r4!, {r1, r2} - 6736 018e 06C3 stmia r3!, {r1, r2} - 6737 .LVL622: -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6738 .loc 1 2689 0 - 6739 0190 0020 movs r0, #0 - 6740 0192 A8E0 b .L345 - 6741 .LVL623: - 6742 .L359: -2836:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2837:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2838:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2839:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2840:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2841:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2842:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2843:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_DEFAULT_MASK: -2844:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2845:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chanMaskSet.ChannelsMaskIn = mibSet->Param.ChannelsMask; - 6743 .loc 1 2845 0 - 6744 0194 4368 ldr r3, [r0, #4] - 6745 0196 0493 str r3, [sp, #16] - 6746 0198 04A9 add r1, sp, #16 -2846:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chanMaskSet.ChannelsMaskType = CHANNELS_DEFAULT_MASK; - 6747 .loc 1 2846 0 - 6748 019a 0123 movs r3, #1 - 6749 019c 0B71 strb r3, [r1, #4] -2847:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2848:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionChanMaskSet( LoRaMacRegion, &chanMaskSet ) == false ) - 6750 .loc 1 2848 0 - 6751 019e 6E4B ldr r3, .L400+56 - 6752 01a0 1878 ldrb r0, [r3] - 6753 .LVL624: - 6754 01a2 FFF7FEFF bl RegionChanMaskSet - 6755 .LVL625: - 6756 01a6 0028 cmp r0, #0 - 6757 01a8 00D1 bne .LCB6497 - 6758 01aa AAE0 b .L390 @long jump - 6759 .LCB6497: -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6760 .loc 1 2689 0 - 6761 01ac 0020 movs r0, #0 - 6762 01ae 9AE0 b .L345 - 6763 .LVL626: - 6764 .L358: -2849:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2850:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2851:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2852:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2853:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2854:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_MASK: -2855:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2856:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chanMaskSet.ChannelsMaskIn = mibSet->Param.ChannelsMask; - 6765 .loc 1 2856 0 - 6766 01b0 4368 ldr r3, [r0, #4] - 6767 01b2 0493 str r3, [sp, #16] - ARM GAS /tmp/ccrFaSdZ.s page 183 - - - 6768 01b4 04A9 add r1, sp, #16 -2857:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** chanMaskSet.ChannelsMaskType = CHANNELS_MASK; - 6769 .loc 1 2857 0 - 6770 01b6 0023 movs r3, #0 - 6771 01b8 0B71 strb r3, [r1, #4] -2858:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2859:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionChanMaskSet( LoRaMacRegion, &chanMaskSet ) == false ) - 6772 .loc 1 2859 0 - 6773 01ba 674B ldr r3, .L400+56 - 6774 01bc 1878 ldrb r0, [r3] - 6775 .LVL627: - 6776 01be FFF7FEFF bl RegionChanMaskSet - 6777 .LVL628: - 6778 01c2 0028 cmp r0, #0 - 6779 01c4 00D1 bne .LCB6516 - 6780 01c6 9EE0 b .L391 @long jump - 6781 .LCB6516: -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6782 .loc 1 2689 0 - 6783 01c8 0020 movs r0, #0 - 6784 01ca 8CE0 b .L345 - 6785 .LVL629: - 6786 .L360: -2860:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2861:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2862:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2863:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2864:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2865:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_NB_REP: -2866:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2867:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( mibSet->Param.ChannelNbRep >= 1 ) && - 6787 .loc 1 2867 0 - 6788 01cc 0279 ldrb r2, [r0, #4] - 6789 01ce 531E subs r3, r2, #1 - 6790 01d0 DBB2 uxtb r3, r3 - 6791 01d2 0E2B cmp r3, #14 - 6792 01d4 00D9 bls .LCB6527 - 6793 01d6 98E0 b .L392 @long jump - 6794 .LCB6527: -2868:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( mibSet->Param.ChannelNbRep <= 15 ) ) -2869:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2870:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsNbRep = mibSet->Param.ChannelNbRep; - 6795 .loc 1 2870 0 - 6796 01d8 5E49 ldr r1, .L400+52 - 6797 01da 2023 movs r3, #32 - 6798 01dc CA54 strb r2, [r1, r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6799 .loc 1 2689 0 - 6800 01de 0020 movs r0, #0 - 6801 .LVL630: - 6802 01e0 81E0 b .L345 - 6803 .LVL631: - 6804 .L361: -2871:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2872:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2873:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2874:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; - ARM GAS /tmp/ccrFaSdZ.s page 184 - - -2875:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2876:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2877:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2878:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_MAX_RX_WINDOW_DURATION: -2879:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2880:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MaxRxWindow = mibSet->Param.MaxRxWindow; - 6805 .loc 1 2880 0 - 6806 01e2 4268 ldr r2, [r0, #4] - 6807 01e4 5B4B ldr r3, .L400+52 - 6808 01e6 DA60 str r2, [r3, #12] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6809 .loc 1 2689 0 - 6810 01e8 0020 movs r0, #0 - 6811 .LVL632: -2881:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6812 .loc 1 2881 0 - 6813 01ea 7CE0 b .L345 - 6814 .LVL633: - 6815 .L362: -2882:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2883:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_RECEIVE_DELAY_1: -2884:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2885:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay1 = mibSet->Param.ReceiveDelay1; - 6816 .loc 1 2885 0 - 6817 01ec 4268 ldr r2, [r0, #4] - 6818 01ee 594B ldr r3, .L400+52 - 6819 01f0 1A61 str r2, [r3, #16] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6820 .loc 1 2689 0 - 6821 01f2 0020 movs r0, #0 - 6822 .LVL634: -2886:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6823 .loc 1 2886 0 - 6824 01f4 77E0 b .L345 - 6825 .LVL635: - 6826 .L363: -2887:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2888:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_RECEIVE_DELAY_2: -2889:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2890:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ReceiveDelay2 = mibSet->Param.ReceiveDelay2; - 6827 .loc 1 2890 0 - 6828 01f6 4268 ldr r2, [r0, #4] - 6829 01f8 564B ldr r3, .L400+52 - 6830 01fa 5A61 str r2, [r3, #20] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6831 .loc 1 2689 0 - 6832 01fc 0020 movs r0, #0 - 6833 .LVL636: -2891:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6834 .loc 1 2891 0 - 6835 01fe 72E0 b .L345 - 6836 .LVL637: - 6837 .L364: -2892:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2893:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_JOIN_ACCEPT_DELAY_1: -2894:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2895:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.JoinAcceptDelay1 = mibSet->Param.JoinAcceptDelay1; - ARM GAS /tmp/ccrFaSdZ.s page 185 - - - 6838 .loc 1 2895 0 - 6839 0200 4268 ldr r2, [r0, #4] - 6840 0202 544B ldr r3, .L400+52 - 6841 0204 9A61 str r2, [r3, #24] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6842 .loc 1 2689 0 - 6843 0206 0020 movs r0, #0 - 6844 .LVL638: -2896:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6845 .loc 1 2896 0 - 6846 0208 6DE0 b .L345 - 6847 .LVL639: - 6848 .L365: -2897:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2898:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_JOIN_ACCEPT_DELAY_2: -2899:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2900:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.JoinAcceptDelay2 = mibSet->Param.JoinAcceptDelay2; - 6849 .loc 1 2900 0 - 6850 020a 4268 ldr r2, [r0, #4] - 6851 020c 514B ldr r3, .L400+52 - 6852 020e DA61 str r2, [r3, #28] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6853 .loc 1 2689 0 - 6854 0210 0020 movs r0, #0 - 6855 .LVL640: -2901:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6856 .loc 1 2901 0 - 6857 0212 68E0 b .L345 - 6858 .LVL641: - 6859 .L366: -2902:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2903:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_DEFAULT_DATARATE: -2904:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2905:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DatarateParams.Datarate = mibSet->Param.ChannelsDefaultDatarate; - 6860 .loc 1 2905 0 - 6861 0214 0423 movs r3, #4 - 6862 0216 C356 ldrsb r3, [r0, r3] - 6863 0218 03A9 add r1, sp, #12 - 6864 021a 0B70 strb r3, [r1] -2906:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2907:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionVerify( LoRaMacRegion, &verify, PHY_DEF_TX_DR ) == true ) - 6865 .loc 1 2907 0 - 6866 021c 4E4B ldr r3, .L400+56 - 6867 021e 1878 ldrb r0, [r3] - 6868 .LVL642: - 6869 0220 0522 movs r2, #5 - 6870 0222 FFF7FEFF bl RegionVerify - 6871 .LVL643: - 6872 0226 0028 cmp r0, #0 - 6873 0228 00D1 bne .LCB6599 - 6874 022a 70E0 b .L393 @long jump - 6875 .LCB6599: -2908:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2909:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.ChannelsDatarate = verify.DatarateParams.Datarate; - 6876 .loc 1 2909 0 - 6877 022c 03AB add r3, sp, #12 - 6878 022e 0022 movs r2, #0 - ARM GAS /tmp/ccrFaSdZ.s page 186 - - - 6879 0230 9A56 ldrsb r2, [r3, r2] - 6880 0232 4E4B ldr r3, .L400+76 - 6881 0234 5A70 strb r2, [r3, #1] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6882 .loc 1 2689 0 - 6883 0236 0020 movs r0, #0 - 6884 0238 55E0 b .L345 - 6885 .LVL644: - 6886 .L367: -2910:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2911:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2912:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2913:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2914:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2915:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2916:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2917:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_DATARATE: -2918:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2919:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DatarateParams.Datarate = mibSet->Param.ChannelsDatarate; - 6887 .loc 1 2919 0 - 6888 023a 0423 movs r3, #4 - 6889 023c C356 ldrsb r3, [r0, r3] - 6890 023e 03A9 add r1, sp, #12 - 6891 0240 0B70 strb r3, [r1] -2920:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2921:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionVerify( LoRaMacRegion, &verify, PHY_TX_DR ) == true ) - 6892 .loc 1 2921 0 - 6893 0242 454B ldr r3, .L400+56 - 6894 0244 1878 ldrb r0, [r3] - 6895 .LVL645: - 6896 0246 0422 movs r2, #4 - 6897 0248 FFF7FEFF bl RegionVerify - 6898 .LVL646: - 6899 024c 0028 cmp r0, #0 - 6900 024e 60D0 beq .L394 -2922:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2923:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = verify.DatarateParams.Datarate; - 6901 .loc 1 2923 0 - 6902 0250 03AB add r3, sp, #12 - 6903 0252 0022 movs r2, #0 - 6904 0254 9A56 ldrsb r2, [r3, r2] - 6905 0256 3F4B ldr r3, .L400+52 - 6906 0258 5A70 strb r2, [r3, #1] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6907 .loc 1 2689 0 - 6908 025a 0020 movs r0, #0 - 6909 025c 43E0 b .L345 - 6910 .LVL647: - 6911 .L369: -2924:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2925:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2926:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2927:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2928:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2929:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2930:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2931:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_DEFAULT_TX_POWER: - ARM GAS /tmp/ccrFaSdZ.s page 187 - - -2932:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2933:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.TxPower = mibSet->Param.ChannelsDefaultTxPower; - 6912 .loc 1 2933 0 - 6913 025e 0423 movs r3, #4 - 6914 0260 C356 ldrsb r3, [r0, r3] - 6915 0262 03A9 add r1, sp, #12 - 6916 0264 0B70 strb r3, [r1] -2934:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2935:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionVerify( LoRaMacRegion, &verify, PHY_DEF_TX_POWER ) == true ) - 6917 .loc 1 2935 0 - 6918 0266 3C4B ldr r3, .L400+56 - 6919 0268 1878 ldrb r0, [r3] - 6920 .LVL648: - 6921 026a 0822 movs r2, #8 - 6922 026c FFF7FEFF bl RegionVerify - 6923 .LVL649: - 6924 0270 0028 cmp r0, #0 - 6925 0272 50D0 beq .L395 -2936:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2937:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParamsDefaults.ChannelsTxPower = verify.TxPower; - 6926 .loc 1 2937 0 - 6927 0274 03AB add r3, sp, #12 - 6928 0276 0022 movs r2, #0 - 6929 0278 9A56 ldrsb r2, [r3, r2] - 6930 027a 3C4B ldr r3, .L400+76 - 6931 027c 1A70 strb r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6932 .loc 1 2689 0 - 6933 027e 0020 movs r0, #0 - 6934 0280 31E0 b .L345 - 6935 .LVL650: - 6936 .L368: -2938:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2939:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2940:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2941:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2942:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2943:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2944:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2945:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_CHANNELS_TX_POWER: -2946:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2947:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.TxPower = mibSet->Param.ChannelsTxPower; - 6937 .loc 1 2947 0 - 6938 0282 0423 movs r3, #4 - 6939 0284 C356 ldrsb r3, [r0, r3] - 6940 0286 03A9 add r1, sp, #12 - 6941 0288 0B70 strb r3, [r1] -2948:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2949:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionVerify( LoRaMacRegion, &verify, PHY_TX_POWER ) == true ) - 6942 .loc 1 2949 0 - 6943 028a 334B ldr r3, .L400+56 - 6944 028c 1878 ldrb r0, [r3] - 6945 .LVL651: - 6946 028e 0722 movs r2, #7 - 6947 0290 FFF7FEFF bl RegionVerify - 6948 .LVL652: - 6949 0294 0028 cmp r0, #0 - ARM GAS /tmp/ccrFaSdZ.s page 188 - - - 6950 0296 40D0 beq .L396 -2950:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2951:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsTxPower = verify.TxPower; - 6951 .loc 1 2951 0 - 6952 0298 03AB add r3, sp, #12 - 6953 029a 0022 movs r2, #0 - 6954 029c 9A56 ldrsb r2, [r3, r2] - 6955 029e 2D4B ldr r3, .L400+52 - 6956 02a0 1A70 strb r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6957 .loc 1 2689 0 - 6958 02a2 0020 movs r0, #0 - 6959 02a4 1FE0 b .L345 - 6960 .LVL653: - 6961 .L370: -2952:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2953:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -2954:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2955:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_PARAMETER_INVALID; -2956:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2957:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2958:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2959:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_UPLINK_COUNTER: -2960:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2961:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** UpLinkCounter = mibSet->Param.UpLinkCounter; - 6962 .loc 1 2961 0 - 6963 02a6 4268 ldr r2, [r0, #4] - 6964 02a8 314B ldr r3, .L400+80 - 6965 02aa 1A60 str r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6966 .loc 1 2689 0 - 6967 02ac 0020 movs r0, #0 - 6968 .LVL654: -2962:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6969 .loc 1 2962 0 - 6970 02ae 1AE0 b .L345 - 6971 .LVL655: - 6972 .L371: -2963:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2964:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_DOWNLINK_COUNTER: -2965:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2966:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** DownLinkCounter = mibSet->Param.DownLinkCounter; - 6973 .loc 1 2966 0 - 6974 02b0 4268 ldr r2, [r0, #4] - 6975 02b2 304B ldr r3, .L400+84 - 6976 02b4 1A60 str r2, [r3] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6977 .loc 1 2689 0 - 6978 02b6 0020 movs r0, #0 - 6979 .LVL656: -2967:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6980 .loc 1 2967 0 - 6981 02b8 15E0 b .L345 - 6982 .LVL657: - 6983 .L372: -2968:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2969:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_SYSTEM_MAX_RX_ERROR: - ARM GAS /tmp/ccrFaSdZ.s page 189 - - -2970:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2971:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.SystemMaxRxError = LoRaMacParamsDefaults.SystemMaxRxError = mibSet->Param - 6984 .loc 1 2971 0 - 6985 02ba 4368 ldr r3, [r0, #4] - 6986 02bc 2B4A ldr r2, .L400+76 - 6987 02be 5360 str r3, [r2, #4] - 6988 02c0 244A ldr r2, .L400+52 - 6989 02c2 5360 str r3, [r2, #4] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 6990 .loc 1 2689 0 - 6991 02c4 0020 movs r0, #0 - 6992 .LVL658: -2972:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 6993 .loc 1 2972 0 - 6994 02c6 0EE0 b .L345 - 6995 .LVL659: - 6996 .L373: -2973:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2974:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_MIN_RX_SYMBOLS: -2975:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2976:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.MinRxSymbols = LoRaMacParamsDefaults.MinRxSymbols = mibSet->Param.MinRxSy - 6997 .loc 1 2976 0 - 6998 02c8 0379 ldrb r3, [r0, #4] - 6999 02ca 284A ldr r2, .L400+76 - 7000 02cc 1372 strb r3, [r2, #8] - 7001 02ce 214A ldr r2, .L400+52 - 7002 02d0 1372 strb r3, [r2, #8] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 7003 .loc 1 2689 0 - 7004 02d2 0020 movs r0, #0 - 7005 .LVL660: -2977:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 7006 .loc 1 2977 0 - 7007 02d4 07E0 b .L345 - 7008 .LVL661: - 7009 .L374: -2978:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2979:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MIB_ANTENNA_GAIN: -2980:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2981:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.AntennaGain = mibSet->Param.AntennaGain; - 7010 .loc 1 2981 0 - 7011 02d6 4268 ldr r2, [r0, #4] - 7012 02d8 1E4B ldr r3, .L400+52 - 7013 02da 5A63 str r2, [r3, #52] -2689:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChanMaskSetParams_t chanMaskSet; - 7014 .loc 1 2689 0 - 7015 02dc 0020 movs r0, #0 - 7016 .LVL662: -2982:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 7017 .loc 1 2982 0 - 7018 02de 02E0 b .L345 - 7019 .LVL663: - 7020 .L379: -2695:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7021 .loc 1 2695 0 - 7022 02e0 0320 movs r0, #3 - 7023 .LVL664: - ARM GAS /tmp/ccrFaSdZ.s page 190 - - - 7024 02e2 00E0 b .L345 - 7025 .LVL665: - 7026 .L380: -2699:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7027 .loc 1 2699 0 - 7028 02e4 0120 movs r0, #1 - 7029 .LVL666: - 7030 .L345: -2983:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2984:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: -2985:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = LORAMAC_STATUS_SERVICE_UNKNOWN; -2986:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -2987:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -2988:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2989:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return status; -2990:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7031 .loc 1 2990 0 - 7032 02e6 06B0 add sp, sp, #24 - 7033 @ sp needed - 7034 02e8 70BD pop {r4, r5, r6, pc} - 7035 .LVL667: - 7036 .L381: -2985:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 7037 .loc 1 2985 0 - 7038 02ea 0220 movs r0, #2 - 7039 .LVL668: - 7040 02ec FBE7 b .L345 - 7041 .LVL669: - 7042 .L383: -2758:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7043 .loc 1 2758 0 - 7044 02ee 0320 movs r0, #3 - 7045 .LVL670: - 7046 02f0 F9E7 b .L345 - 7047 .LVL671: - 7048 .L384: -2771:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7049 .loc 1 2771 0 - 7050 02f2 0320 movs r0, #3 - 7051 .LVL672: - 7052 02f4 F7E7 b .L345 - 7053 .L385: -2824:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7054 .loc 1 2824 0 - 7055 02f6 0320 movs r0, #3 - 7056 02f8 F5E7 b .L345 - 7057 .LVL673: - 7058 .L388: -2818:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7059 .loc 1 2818 0 - 7060 02fa 0320 movs r0, #3 - 7061 02fc F3E7 b .L345 - 7062 .LVL674: - 7063 .L389: -2839:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7064 .loc 1 2839 0 - 7065 02fe 0320 movs r0, #3 - ARM GAS /tmp/ccrFaSdZ.s page 191 - - - 7066 0300 F1E7 b .L345 - 7067 .L390: -2850:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7068 .loc 1 2850 0 - 7069 0302 0320 movs r0, #3 - 7070 0304 EFE7 b .L345 - 7071 .L391: -2861:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7072 .loc 1 2861 0 - 7073 0306 0320 movs r0, #3 - 7074 0308 EDE7 b .L345 - 7075 .LVL675: - 7076 .L392: -2874:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7077 .loc 1 2874 0 - 7078 030a 0320 movs r0, #3 - 7079 .LVL676: - 7080 030c EBE7 b .L345 - 7081 .L393: -2913:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7082 .loc 1 2913 0 - 7083 030e 0320 movs r0, #3 - 7084 0310 E9E7 b .L345 - 7085 .L394: -2927:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7086 .loc 1 2927 0 - 7087 0312 0320 movs r0, #3 - 7088 0314 E7E7 b .L345 - 7089 .L395: -2941:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7090 .loc 1 2941 0 - 7091 0316 0320 movs r0, #3 - 7092 0318 E5E7 b .L345 - 7093 .L396: -2955:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7094 .loc 1 2955 0 - 7095 031a 0320 movs r0, #3 - 7096 031c E3E7 b .L345 - 7097 .L401: - 7098 031e C046 .align 2 - 7099 .L400: - 7100 0320 00000000 .word .LANCHOR24 - 7101 0324 00000000 .word .L347 - 7102 0328 00000000 .word .LANCHOR25 - 7103 032c 00000000 .word Radio - 7104 0330 00000000 .word .LANCHOR15 - 7105 0334 00000000 .word .LANCHOR0 - 7106 0338 00000000 .word .LANCHOR29 - 7107 033c 00000000 .word .LANCHOR40 - 7108 0340 00000000 .word .LANCHOR41 - 7109 0344 00000000 .word .LANCHOR33 - 7110 0348 00000000 .word .LANCHOR32 - 7111 034c 00000000 .word .LANCHOR63 - 7112 0350 00000000 .word .LANCHOR21 - 7113 0354 00000000 .word .LANCHOR14 - 7114 0358 00000000 .word .LANCHOR22 - 7115 035c 00000000 .word .LANCHOR42 - ARM GAS /tmp/ccrFaSdZ.s page 192 - - - 7116 0360 00000000 .word .LANCHOR19 - 7117 0364 00000000 .word .LANCHOR35 - 7118 0368 00000000 .word .LANCHOR36 - 7119 036c 00000000 .word .LANCHOR13 - 7120 0370 00000000 .word .LANCHOR1 - 7121 0374 00000000 .word .LANCHOR2 - 7122 .cfi_endproc - 7123 .LFE112: - 7125 .section .text.LoRaMacChannelAdd,"ax",%progbits - 7126 .align 1 - 7127 .global LoRaMacChannelAdd - 7128 .syntax unified - 7129 .code 16 - 7130 .thumb_func - 7131 .fpu softvfp - 7133 LoRaMacChannelAdd: - 7134 .LFB113: -2991:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2992:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacChannelAdd( uint8_t id, ChannelParams_t params ) -2993:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7135 .loc 1 2993 0 - 7136 .cfi_startproc - 7137 @ args = 0, pretend = 0, frame = 24 - 7138 @ frame_needed = 0, uses_anonymous_args = 0 - 7139 .LVL677: - 7140 0000 00B5 push {lr} - 7141 .LCFI43: - 7142 .cfi_def_cfa_offset 4 - 7143 .cfi_offset 14, -4 - 7144 0002 87B0 sub sp, sp, #28 - 7145 .LCFI44: - 7146 .cfi_def_cfa_offset 32 - 7147 0004 0191 str r1, [sp, #4] - 7148 0006 0292 str r2, [sp, #8] - 7149 0008 0393 str r3, [sp, #12] -2994:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChannelAddParams_t channelAdd; -2995:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -2996:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Validate if the MAC is in a correct state -2997:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_TX_RUNNING ) == LORAMAC_TX_RUNNING ) - 7150 .loc 1 2997 0 - 7151 000a 094B ldr r3, .L406 - 7152 000c 1B68 ldr r3, [r3] - 7153 000e DA07 lsls r2, r3, #31 - 7154 0010 01D5 bpl .L403 -2998:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -2999:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_TX_CONFIG ) != LORAMAC_TX_CONFIG ) - 7155 .loc 1 2999 0 - 7156 0012 9B06 lsls r3, r3, #26 - 7157 0014 09D5 bpl .L405 - 7158 .L403: -3000:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3001:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_BUSY; -3002:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3003:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3004:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3005:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** channelAdd.NewChannel = ¶ms; - 7159 .loc 1 3005 0 - ARM GAS /tmp/ccrFaSdZ.s page 193 - - - 7160 0016 04A9 add r1, sp, #16 - 7161 0018 01AB add r3, sp, #4 - 7162 001a 0493 str r3, [sp, #16] -3006:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** channelAdd.ChannelId = id; - 7163 .loc 1 3006 0 - 7164 001c 0871 strb r0, [r1, #4] -3007:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3008:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return RegionChannelAdd( LoRaMacRegion, &channelAdd ); - 7165 .loc 1 3008 0 - 7166 001e 054B ldr r3, .L406+4 - 7167 0020 1878 ldrb r0, [r3] - 7168 .LVL678: - 7169 0022 FFF7FEFF bl RegionChannelAdd - 7170 .LVL679: - 7171 .L404: -3009:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7172 .loc 1 3009 0 - 7173 0026 07B0 add sp, sp, #28 - 7174 @ sp needed - 7175 0028 00BD pop {pc} - 7176 .LVL680: - 7177 .L405: -3001:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7178 .loc 1 3001 0 - 7179 002a 0120 movs r0, #1 - 7180 .LVL681: - 7181 002c FBE7 b .L404 - 7182 .L407: - 7183 002e C046 .align 2 - 7184 .L406: - 7185 0030 00000000 .word .LANCHOR24 - 7186 0034 00000000 .word .LANCHOR22 - 7187 .cfi_endproc - 7188 .LFE113: - 7190 .section .text.LoRaMacChannelRemove,"ax",%progbits - 7191 .align 1 - 7192 .global LoRaMacChannelRemove - 7193 .syntax unified - 7194 .code 16 - 7195 .thumb_func - 7196 .fpu softvfp - 7198 LoRaMacChannelRemove: - 7199 .LFB114: -3010:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3011:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacChannelRemove( uint8_t id ) -3012:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7200 .loc 1 3012 0 - 7201 .cfi_startproc - 7202 @ args = 0, pretend = 0, frame = 8 - 7203 @ frame_needed = 0, uses_anonymous_args = 0 - 7204 .LVL682: - 7205 0000 00B5 push {lr} - 7206 .LCFI45: - 7207 .cfi_def_cfa_offset 4 - 7208 .cfi_offset 14, -4 - 7209 0002 83B0 sub sp, sp, #12 - 7210 .LCFI46: - ARM GAS /tmp/ccrFaSdZ.s page 194 - - - 7211 .cfi_def_cfa_offset 16 -3013:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ChannelRemoveParams_t channelRemove; -3014:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3015:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_TX_RUNNING ) == LORAMAC_TX_RUNNING ) - 7212 .loc 1 3015 0 - 7213 0004 0A4B ldr r3, .L414 - 7214 0006 1B68 ldr r3, [r3] - 7215 0008 DA07 lsls r2, r3, #31 - 7216 000a 01D5 bpl .L409 -3016:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3017:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_TX_CONFIG ) != LORAMAC_TX_CONFIG ) - 7217 .loc 1 3017 0 - 7218 000c 9B06 lsls r3, r3, #26 - 7219 000e 0CD5 bpl .L411 - 7220 .L409: -3018:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3019:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_BUSY; -3020:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3021:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3022:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3023:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** channelRemove.ChannelId = id; - 7221 .loc 1 3023 0 - 7222 0010 01A9 add r1, sp, #4 - 7223 0012 0870 strb r0, [r1] -3024:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3025:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionChannelsRemove( LoRaMacRegion, &channelRemove ) == false ) - 7224 .loc 1 3025 0 - 7225 0014 074B ldr r3, .L414+4 - 7226 0016 1878 ldrb r0, [r3] - 7227 .LVL683: - 7228 0018 FFF7FEFF bl RegionChannelsRemove - 7229 .LVL684: - 7230 001c 0028 cmp r0, #0 - 7231 001e 02D0 beq .L413 -3026:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3027:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -3028:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3029:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; - 7232 .loc 1 3029 0 - 7233 0020 0020 movs r0, #0 - 7234 .L410: -3030:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7235 .loc 1 3030 0 - 7236 0022 03B0 add sp, sp, #12 - 7237 @ sp needed - 7238 0024 00BD pop {pc} - 7239 .L413: -3027:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7240 .loc 1 3027 0 - 7241 0026 0330 adds r0, r0, #3 - 7242 0028 FBE7 b .L410 - 7243 .LVL685: - 7244 .L411: -3019:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7245 .loc 1 3019 0 - 7246 002a 0120 movs r0, #1 - 7247 .LVL686: - ARM GAS /tmp/ccrFaSdZ.s page 195 - - - 7248 002c F9E7 b .L410 - 7249 .L415: - 7250 002e C046 .align 2 - 7251 .L414: - 7252 0030 00000000 .word .LANCHOR24 - 7253 0034 00000000 .word .LANCHOR22 - 7254 .cfi_endproc - 7255 .LFE114: - 7257 .section .text.LoRaMacMulticastChannelLink,"ax",%progbits - 7258 .align 1 - 7259 .global LoRaMacMulticastChannelLink - 7260 .syntax unified - 7261 .code 16 - 7262 .thumb_func - 7263 .fpu softvfp - 7265 LoRaMacMulticastChannelLink: - 7266 .LFB115: -3031:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3032:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacMulticastChannelLink( MulticastParams_t *channelParam ) -3033:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7267 .loc 1 3033 0 - 7268 .cfi_startproc - 7269 @ args = 0, pretend = 0, frame = 0 - 7270 @ frame_needed = 0, uses_anonymous_args = 0 - 7271 @ link register save eliminated. - 7272 .LVL687: -3034:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( channelParam == NULL ) - 7273 .loc 1 3034 0 - 7274 0000 0028 cmp r0, #0 - 7275 0002 13D0 beq .L419 -3035:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3036:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -3037:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3038:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_TX_RUNNING ) == LORAMAC_TX_RUNNING ) - 7276 .loc 1 3038 0 - 7277 0004 0B4B ldr r3, .L422 - 7278 0006 1B68 ldr r3, [r3] - 7279 0008 DB07 lsls r3, r3, #31 - 7280 000a 11D4 bmi .L420 -3039:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3040:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_BUSY; -3041:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3042:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3043:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Reset downlink counter -3044:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** channelParam->DownLinkCounter = 0; - 7281 .loc 1 3044 0 - 7282 000c 0023 movs r3, #0 - 7283 000e 4362 str r3, [r0, #36] -3045:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3046:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MulticastChannels == NULL ) - 7284 .loc 1 3046 0 - 7285 0010 094B ldr r3, .L422+4 - 7286 0012 1A68 ldr r2, [r3] - 7287 0014 002A cmp r2, #0 - 7288 0016 03D1 bne .L418 -3047:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3048:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // New node is the fist element - ARM GAS /tmp/ccrFaSdZ.s page 196 - - -3049:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MulticastChannels = channelParam; - 7289 .loc 1 3049 0 - 7290 0018 1860 str r0, [r3] -3050:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3051:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -3052:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3053:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MulticastParams_t *cur = MulticastChannels; -3054:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3055:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Search the last node in the list -3056:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** while( cur->Next != NULL ) -3057:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3058:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cur = cur->Next; -3059:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3060:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // This function always finds the last node -3061:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cur->Next = channelParam; -3062:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3063:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3064:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; - 7291 .loc 1 3064 0 - 7292 001a 0020 movs r0, #0 - 7293 .LVL688: - 7294 001c 09E0 b .L417 - 7295 .LVL689: - 7296 .L421: - 7297 .LBB85: -3058:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7298 .loc 1 3058 0 - 7299 001e 1A00 movs r2, r3 - 7300 .LVL690: - 7301 .L418: -3056:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7302 .loc 1 3056 0 - 7303 0020 936A ldr r3, [r2, #40] - 7304 0022 002B cmp r3, #0 - 7305 0024 FBD1 bne .L421 -3061:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7306 .loc 1 3061 0 - 7307 0026 9062 str r0, [r2, #40] - 7308 .LBE85: - 7309 .loc 1 3064 0 - 7310 0028 0020 movs r0, #0 - 7311 .LVL691: - 7312 002a 02E0 b .L417 - 7313 .LVL692: - 7314 .L419: -3036:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7315 .loc 1 3036 0 - 7316 002c 0320 movs r0, #3 - 7317 .LVL693: - 7318 002e 00E0 b .L417 - 7319 .LVL694: - 7320 .L420: -3040:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7321 .loc 1 3040 0 - 7322 0030 0120 movs r0, #1 - 7323 .LVL695: - 7324 .L417: - ARM GAS /tmp/ccrFaSdZ.s page 197 - - -3065:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7325 .loc 1 3065 0 - 7326 @ sp needed - 7327 0032 7047 bx lr - 7328 .L423: - 7329 .align 2 - 7330 .L422: - 7331 0034 00000000 .word .LANCHOR24 - 7332 0038 00000000 .word .LANCHOR18 - 7333 .cfi_endproc - 7334 .LFE115: - 7336 .section .text.LoRaMacMulticastChannelUnlink,"ax",%progbits - 7337 .align 1 - 7338 .global LoRaMacMulticastChannelUnlink - 7339 .syntax unified - 7340 .code 16 - 7341 .thumb_func - 7342 .fpu softvfp - 7344 LoRaMacMulticastChannelUnlink: - 7345 .LFB116: -3066:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3067:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacMulticastChannelUnlink( MulticastParams_t *channelParam ) -3068:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7346 .loc 1 3068 0 - 7347 .cfi_startproc - 7348 @ args = 0, pretend = 0, frame = 0 - 7349 @ frame_needed = 0, uses_anonymous_args = 0 - 7350 @ link register save eliminated. - 7351 .LVL696: -3069:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( channelParam == NULL ) - 7352 .loc 1 3069 0 - 7353 0000 0028 cmp r0, #0 - 7354 0002 1AD0 beq .L429 -3070:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3071:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -3072:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3073:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_TX_RUNNING ) == LORAMAC_TX_RUNNING ) - 7355 .loc 1 3073 0 - 7356 0004 104B ldr r3, .L433 - 7357 0006 1B68 ldr r3, [r3] - 7358 0008 DB07 lsls r3, r3, #31 - 7359 000a 18D4 bmi .L430 -3074:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3075:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_BUSY; -3076:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3077:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3078:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MulticastChannels != NULL ) - 7360 .loc 1 3078 0 - 7361 000c 0F4B ldr r3, .L433+4 - 7362 000e 1A68 ldr r2, [r3] - 7363 0010 002A cmp r2, #0 - 7364 0012 16D0 beq .L431 -3079:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3080:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( MulticastChannels == channelParam ) - 7365 .loc 1 3080 0 - 7366 0014 8242 cmp r2, r0 - 7367 0016 03D1 bne .L426 - ARM GAS /tmp/ccrFaSdZ.s page 198 - - -3081:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3082:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // First element -3083:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MulticastChannels = channelParam->Next; - 7368 .loc 1 3083 0 - 7369 0018 826A ldr r2, [r0, #40] - 7370 001a 1A60 str r2, [r3] - 7371 001c 09E0 b .L427 - 7372 .LVL697: - 7373 .L432: - 7374 .LBB86: -3084:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3085:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -3086:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3087:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MulticastParams_t *cur = MulticastChannels; -3088:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3089:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Search the node in the list -3090:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** while( cur->Next && cur->Next != channelParam ) -3091:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3092:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cur = cur->Next; - 7375 .loc 1 3092 0 - 7376 001e 1A00 movs r2, r3 - 7377 .LVL698: - 7378 .L426: -3090:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7379 .loc 1 3090 0 - 7380 0020 936A ldr r3, [r2, #40] - 7381 0022 002B cmp r3, #0 - 7382 0024 01D0 beq .L428 -3090:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7383 .loc 1 3090 0 is_stmt 0 discriminator 1 - 7384 0026 8342 cmp r3, r0 - 7385 0028 F9D1 bne .L432 - 7386 .L428: -3093:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3094:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // If we found the node, remove it -3095:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( cur->Next ) - 7387 .loc 1 3095 0 is_stmt 1 - 7388 002a 002B cmp r3, #0 - 7389 002c 01D0 beq .L427 -3096:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3097:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** cur->Next = channelParam->Next; - 7390 .loc 1 3097 0 - 7391 002e 836A ldr r3, [r0, #40] - 7392 0030 9362 str r3, [r2, #40] - 7393 .LVL699: - 7394 .L427: - 7395 .LBE86: -3098:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3099:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3100:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** channelParam->Next = NULL; - 7396 .loc 1 3100 0 - 7397 0032 0023 movs r3, #0 - 7398 0034 8362 str r3, [r0, #40] -3101:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3102:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3103:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_OK; - 7399 .loc 1 3103 0 - ARM GAS /tmp/ccrFaSdZ.s page 199 - - - 7400 0036 0020 movs r0, #0 - 7401 .LVL700: - 7402 0038 02E0 b .L425 - 7403 .LVL701: - 7404 .L429: -3071:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7405 .loc 1 3071 0 - 7406 003a 0320 movs r0, #3 - 7407 .LVL702: - 7408 003c 00E0 b .L425 - 7409 .LVL703: - 7410 .L430: -3075:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7411 .loc 1 3075 0 - 7412 003e 0120 movs r0, #1 - 7413 .LVL704: - 7414 .L425: -3104:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7415 .loc 1 3104 0 - 7416 @ sp needed - 7417 0040 7047 bx lr - 7418 .LVL705: - 7419 .L431: -3103:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7420 .loc 1 3103 0 - 7421 0042 0020 movs r0, #0 - 7422 .LVL706: - 7423 0044 FCE7 b .L425 - 7424 .L434: - 7425 0046 C046 .align 2 - 7426 .L433: - 7427 0048 00000000 .word .LANCHOR24 - 7428 004c 00000000 .word .LANCHOR18 - 7429 .cfi_endproc - 7430 .LFE116: - 7432 .section .text.LoRaMacMlmeRequest,"ax",%progbits - 7433 .align 1 - 7434 .global LoRaMacMlmeRequest - 7435 .syntax unified - 7436 .code 16 - 7437 .thumb_func - 7438 .fpu softvfp - 7440 LoRaMacMlmeRequest: - 7441 .LFB117: -3105:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3106:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacMlmeRequest( MlmeReq_t *mlmeRequest ) -3107:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7442 .loc 1 3107 0 - 7443 .cfi_startproc - 7444 @ args = 0, pretend = 0, frame = 16 - 7445 @ frame_needed = 0, uses_anonymous_args = 0 - 7446 .LVL707: - 7447 0000 30B5 push {r4, r5, lr} - 7448 .LCFI47: - 7449 .cfi_def_cfa_offset 12 - 7450 .cfi_offset 4, -12 - 7451 .cfi_offset 5, -8 - ARM GAS /tmp/ccrFaSdZ.s page 200 - - - 7452 .cfi_offset 14, -4 - 7453 0002 85B0 sub sp, sp, #20 - 7454 .LCFI48: - 7455 .cfi_def_cfa_offset 32 - 7456 0004 041E subs r4, r0, #0 - 7457 .LVL708: -3108:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t status = LORAMAC_STATUS_SERVICE_UNKNOWN; -3109:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacHeader_t macHdr; -3110:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AlternateDrParams_t altDr; -3111:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** VerifyParams_t verify; -3112:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; -3113:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PhyParam_t phyParam; -3114:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3115:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( mlmeRequest == NULL ) - 7458 .loc 1 3115 0 - 7459 0006 00D1 bne .LCB7174 - 7460 0008 B0E0 b .L444 @long jump - 7461 .LCB7174: -3116:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3117:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -3118:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3119:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_TX_RUNNING ) == LORAMAC_TX_RUNNING ) - 7462 .loc 1 3119 0 - 7463 000a 5E4B ldr r3, .L457 - 7464 000c 1B68 ldr r3, [r3] - 7465 000e DB07 lsls r3, r3, #31 - 7466 0010 02D5 bpl .L454 -3120:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3121:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_BUSY; - 7467 .loc 1 3121 0 - 7468 0012 0120 movs r0, #1 - 7469 .LVL709: - 7470 .L436: -3122:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3123:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3124:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memset1( ( uint8_t* ) &MlmeConfirm, 0, sizeof( MlmeConfirm ) ); -3125:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3126:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.Status = LORAMAC_EVENT_INFO_STATUS_ERROR; -3127:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3128:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( mlmeRequest->Type ) -3129:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3130:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MLME_JOIN: -3131:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3132:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( LoRaMacState & LORAMAC_TX_DELAYED ) == LORAMAC_TX_DELAYED ) -3133:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3134:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_BUSY; -3135:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3136:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3137:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( mlmeRequest->Req.Join.DevEui == NULL ) || -3138:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( mlmeRequest->Req.Join.AppEui == NULL ) || -3139:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( mlmeRequest->Req.Join.AppKey == NULL ) || -3140:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( mlmeRequest->Req.Join.NbTrials == 0 ) ) -3141:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3142:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -3143:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3144:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3145:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Verify the parameter NbTrials for the join procedure - ARM GAS /tmp/ccrFaSdZ.s page 201 - - -3146:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.NbJoinTrials = mlmeRequest->Req.Join.NbTrials; -3147:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3148:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionVerify( LoRaMacRegion, &verify, PHY_NB_JOIN_TRIALS ) == false ) -3149:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3150:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Value not supported, get default -3151:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_DEF_NB_JOIN_TRIALS; -3152:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); -3153:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mlmeRequest->Req.Join.NbTrials = ( uint8_t ) phyParam.Value; -3154:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3155:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3156:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 1; -3157:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.MlmeRequest = mlmeRequest->Type; -3158:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3159:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacDevEui = mlmeRequest->Req.Join.DevEui; -3160:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacAppEui = mlmeRequest->Req.Join.AppEui; -3161:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacAppKey = mlmeRequest->Req.Join.AppKey; -3162:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MaxJoinRequestTrials = mlmeRequest->Req.Join.NbTrials; -3163:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3164:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Reset variable JoinRequestTrials -3165:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** JoinRequestTrials = 0; -3166:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3167:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Setup header information -3168:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Value = 0; -3169:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Bits.MType = FRAME_TYPE_JOIN_REQ; -3170:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3171:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ResetMacParameters( ); -3172:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3173:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** altDr.NbTrials = JoinRequestTrials + 1; -3174:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3175:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = RegionAlternateDr( LoRaMacRegion, &altDr ); -3176:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3177:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = Send( &macHdr, 0, NULL, 0 ); -3178:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -3179:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3180:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MLME_LINK_CHECK: -3181:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3182:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 1; -3183:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // LoRaMac will send this command piggy-pack -3184:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.MlmeRequest = mlmeRequest->Type; -3185:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3186:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = AddMacCommand( MOTE_MAC_LINK_CHECK_REQ, 0, 0 ); -3187:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -3188:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3189:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MLME_TXCW: -3190:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3191:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.MlmeRequest = mlmeRequest->Type; -3192:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 1; -3193:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = SetTxContinuousWave( mlmeRequest->Req.TxCw.Timeout ); -3194:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -3195:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3196:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MLME_TXCW_1: -3197:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3198:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.MlmeRequest = mlmeRequest->Type; -3199:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 1; -3200:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = SetTxContinuousWave1( mlmeRequest->Req.TxCw.Timeout, mlmeRequest->Req.TxCw.Fre -3201:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -3202:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - ARM GAS /tmp/ccrFaSdZ.s page 202 - - -3203:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: -3204:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -3205:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3206:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3207:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( status != LORAMAC_STATUS_OK ) -3208:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3209:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; -3210:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 0; -3211:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3212:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3213:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return status; -3214:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7471 .loc 1 3214 0 - 7472 0014 05B0 add sp, sp, #20 - 7473 @ sp needed - 7474 0016 30BD pop {r4, r5, pc} - 7475 .LVL710: - 7476 .L454: -3124:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7477 .loc 1 3124 0 - 7478 0018 5B4D ldr r5, .L457+4 - 7479 001a 0C22 movs r2, #12 - 7480 001c 0021 movs r1, #0 - 7481 001e 2800 movs r0, r5 - 7482 .LVL711: - 7483 0020 FFF7FEFF bl memset1 - 7484 .LVL712: -3126:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7485 .loc 1 3126 0 - 7486 0024 0123 movs r3, #1 - 7487 0026 6B70 strb r3, [r5, #1] -3128:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7488 .loc 1 3128 0 - 7489 0028 2378 ldrb r3, [r4] - 7490 002a 012B cmp r3, #1 - 7491 002c 5CD0 beq .L438 - 7492 002e 002B cmp r3, #0 - 7493 0030 06D0 beq .L439 - 7494 0032 022B cmp r3, #2 - 7495 0034 77D0 beq .L440 - 7496 0036 032B cmp r3, #3 - 7497 0038 00D1 bne .LCB7217 - 7498 003a 8AE0 b .L441 @long jump - 7499 .LCB7217: -3108:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacHeader_t macHdr; - 7500 .loc 1 3108 0 - 7501 003c 0220 movs r0, #2 - 7502 003e 7FE0 b .L437 - 7503 .L439: -3132:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7504 .loc 1 3132 0 - 7505 0040 504B ldr r3, .L457 - 7506 0042 1B68 ldr r3, [r3] - 7507 0044 DB06 lsls r3, r3, #27 - 7508 0046 00D5 bpl .LCB7228 - 7509 0048 92E0 b .L447 @long jump - 7510 .LCB7228: - ARM GAS /tmp/ccrFaSdZ.s page 203 - - -3137:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( mlmeRequest->Req.Join.AppEui == NULL ) || - 7511 .loc 1 3137 0 - 7512 004a 6368 ldr r3, [r4, #4] - 7513 004c 002B cmp r3, #0 - 7514 004e 00D1 bne .LCB7232 - 7515 0050 90E0 b .L448 @long jump - 7516 .LCB7232: -3137:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( mlmeRequest->Req.Join.AppEui == NULL ) || - 7517 .loc 1 3137 0 is_stmt 0 discriminator 1 - 7518 0052 A368 ldr r3, [r4, #8] - 7519 0054 002B cmp r3, #0 - 7520 0056 00D1 bne .LCB7236 - 7521 0058 8EE0 b .L449 @long jump - 7522 .LCB7236: -3138:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( mlmeRequest->Req.Join.AppKey == NULL ) || - 7523 .loc 1 3138 0 is_stmt 1 - 7524 005a E368 ldr r3, [r4, #12] - 7525 005c 002B cmp r3, #0 - 7526 005e 00D1 bne .LCB7240 - 7527 0060 8CE0 b .L450 @long jump - 7528 .LCB7240: -3140:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7529 .loc 1 3140 0 - 7530 0062 237C ldrb r3, [r4, #16] -3139:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( mlmeRequest->Req.Join.NbTrials == 0 ) ) - 7531 .loc 1 3139 0 - 7532 0064 002B cmp r3, #0 - 7533 0066 00D1 bne .LCB7243 - 7534 0068 8AE0 b .L451 @long jump - 7535 .LCB7243: -3146:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7536 .loc 1 3146 0 - 7537 006a 01A9 add r1, sp, #4 - 7538 006c 0B70 strb r3, [r1] -3148:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7539 .loc 1 3148 0 - 7540 006e 474B ldr r3, .L457+8 - 7541 0070 1878 ldrb r0, [r3] - 7542 0072 1E22 movs r2, #30 - 7543 0074 FFF7FEFF bl RegionVerify - 7544 .LVL713: - 7545 0078 0028 cmp r0, #0 - 7546 007a 2BD0 beq .L455 - 7547 .LVL714: - 7548 .L442: -3156:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MlmeConfirm.MlmeRequest = mlmeRequest->Type; - 7549 .loc 1 3156 0 - 7550 007c 444A ldr r2, .L457+12 - 7551 007e 1378 ldrb r3, [r2] - 7552 0080 0821 movs r1, #8 - 7553 0082 0B43 orrs r3, r1 - 7554 0084 1370 strb r3, [r2] -3157:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7555 .loc 1 3157 0 - 7556 0086 2278 ldrb r2, [r4] - 7557 0088 3F4B ldr r3, .L457+4 - 7558 008a 1A70 strb r2, [r3] - ARM GAS /tmp/ccrFaSdZ.s page 204 - - -3159:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacAppEui = mlmeRequest->Req.Join.AppEui; - 7559 .loc 1 3159 0 - 7560 008c 414B ldr r3, .L457+16 - 7561 008e 6268 ldr r2, [r4, #4] - 7562 0090 1A60 str r2, [r3] -3160:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacAppKey = mlmeRequest->Req.Join.AppKey; - 7563 .loc 1 3160 0 - 7564 0092 414B ldr r3, .L457+20 - 7565 0094 A268 ldr r2, [r4, #8] - 7566 0096 1A60 str r2, [r3] -3161:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** MaxJoinRequestTrials = mlmeRequest->Req.Join.NbTrials; - 7567 .loc 1 3161 0 - 7568 0098 404B ldr r3, .L457+24 - 7569 009a E268 ldr r2, [r4, #12] - 7570 009c 1A60 str r2, [r3] -3162:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7571 .loc 1 3162 0 - 7572 009e 227C ldrb r2, [r4, #16] - 7573 00a0 3F4B ldr r3, .L457+28 - 7574 00a2 1A70 strb r2, [r3] -3165:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7575 .loc 1 3165 0 - 7576 00a4 3F4D ldr r5, .L457+32 - 7577 00a6 0023 movs r3, #0 - 7578 00a8 2B70 strb r3, [r5] -3168:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Bits.MType = FRAME_TYPE_JOIN_REQ; - 7579 .loc 1 3168 0 - 7580 00aa 03AC add r4, sp, #12 - 7581 .LVL715: -3169:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7582 .loc 1 3169 0 - 7583 00ac 2370 strb r3, [r4] -3171:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7584 .loc 1 3171 0 - 7585 00ae FFF7FEFF bl ResetMacParameters - 7586 .LVL716: -3173:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7587 .loc 1 3173 0 - 7588 00b2 2B78 ldrb r3, [r5] - 7589 00b4 0133 adds r3, r3, #1 - 7590 00b6 02A9 add r1, sp, #8 - 7591 00b8 0B80 strh r3, [r1] -3175:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7592 .loc 1 3175 0 - 7593 00ba 344B ldr r3, .L457+8 - 7594 00bc 1878 ldrb r0, [r3] - 7595 00be FFF7FEFF bl RegionAlternateDr - 7596 .LVL717: - 7597 00c2 394B ldr r3, .L457+36 - 7598 00c4 5870 strb r0, [r3, #1] -3177:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 7599 .loc 1 3177 0 - 7600 00c6 0023 movs r3, #0 - 7601 00c8 0022 movs r2, #0 - 7602 00ca 0021 movs r1, #0 - 7603 00cc 2000 movs r0, r4 - 7604 00ce FFF7FEFF bl Send - ARM GAS /tmp/ccrFaSdZ.s page 205 - - - 7605 .LVL718: -3178:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7606 .loc 1 3178 0 - 7607 00d2 32E0 b .L443 - 7608 .LVL719: - 7609 .L455: -3151:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 7610 .loc 1 3151 0 - 7611 00d4 1F23 movs r3, #31 - 7612 00d6 6A46 mov r2, sp - 7613 00d8 1370 strb r3, [r2] -3152:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** mlmeRequest->Req.Join.NbTrials = ( uint8_t ) phyParam.Value; - 7614 .loc 1 3152 0 - 7615 00da 2C4B ldr r3, .L457+8 - 7616 00dc 1878 ldrb r0, [r3] - 7617 00de 6946 mov r1, sp - 7618 00e0 FFF7FEFF bl RegionGetPhyParam - 7619 .LVL720: -3153:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7620 .loc 1 3153 0 - 7621 00e4 2074 strb r0, [r4, #16] - 7622 00e6 C9E7 b .L442 - 7623 .L438: -3182:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // LoRaMac will send this command piggy-pack - 7624 .loc 1 3182 0 - 7625 00e8 294A ldr r2, .L457+12 - 7626 00ea 1378 ldrb r3, [r2] - 7627 00ec 0821 movs r1, #8 - 7628 00ee 0B43 orrs r3, r1 - 7629 00f0 1370 strb r3, [r2] -3184:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7630 .loc 1 3184 0 - 7631 00f2 2278 ldrb r2, [r4] - 7632 00f4 244B ldr r3, .L457+4 - 7633 00f6 1A70 strb r2, [r3] - 7634 .LVL721: - 7635 .LBB87: - 7636 .LBB88: -1553:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7637 .loc 1 1553 0 - 7638 00f8 2C4B ldr r3, .L457+40 - 7639 00fa 1A78 ldrb r2, [r3] - 7640 00fc 8023 movs r3, #128 - 7641 00fe 5B42 rsbs r3, r3, #0 - 7642 0100 9B1A subs r3, r3, r2 - 7643 0102 DBB2 uxtb r3, r3 - 7644 .LVL722: -1558:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7645 .loc 1 1558 0 - 7646 0104 2A4A ldr r2, .L457+44 - 7647 0106 1278 ldrb r2, [r2] - 7648 0108 9342 cmp r3, r2 - 7649 010a 01D8 bhi .L456 -1551:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // The maximum buffer length must take MAC commands to re-send into account. - 7650 .loc 1 1551 0 - 7651 010c 0120 movs r0, #1 - 7652 010e 17E0 b .L437 - ARM GAS /tmp/ccrFaSdZ.s page 206 - - - 7653 .L456: -1560:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // No payload for this command - 7654 .loc 1 1560 0 - 7655 0110 511C adds r1, r2, #1 - 7656 0112 274B ldr r3, .L457+44 - 7657 .LVL723: - 7658 0114 1970 strb r1, [r3] - 7659 0116 274B ldr r3, .L457+48 - 7660 0118 0221 movs r1, #2 - 7661 011a 9954 strb r1, [r3, r2] - 7662 .LVL724: -1641:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7663 .loc 1 1641 0 - 7664 011c 264B ldr r3, .L457+52 - 7665 011e 0122 movs r2, #1 - 7666 0120 1A70 strb r2, [r3] - 7667 .LVL725: - 7668 0122 0020 movs r0, #0 - 7669 0124 76E7 b .L436 - 7670 .LVL726: - 7671 .L440: - 7672 .LBE88: - 7673 .LBE87: -3191:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 1; - 7674 .loc 1 3191 0 - 7675 0126 184A ldr r2, .L457+4 - 7676 0128 1370 strb r3, [r2] -3192:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = SetTxContinuousWave( mlmeRequest->Req.TxCw.Timeout ); - 7677 .loc 1 3192 0 - 7678 012a 194A ldr r2, .L457+12 - 7679 012c 1378 ldrb r3, [r2] - 7680 012e 0821 movs r1, #8 - 7681 0130 0B43 orrs r3, r1 - 7682 0132 1370 strb r3, [r2] -3193:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 7683 .loc 1 3193 0 - 7684 0134 A088 ldrh r0, [r4, #4] - 7685 0136 FFF7FEFF bl SetTxContinuousWave - 7686 .LVL727: - 7687 .L443: -3207:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7688 .loc 1 3207 0 - 7689 013a 0028 cmp r0, #0 - 7690 013c 00D1 bne .LCB7402 - 7691 013e 69E7 b .L436 @long jump - 7692 .LCB7402: - 7693 .LVL728: - 7694 .L437: -3209:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 0; - 7695 .loc 1 3209 0 - 7696 0140 1E4B ldr r3, .L457+56 - 7697 0142 0022 movs r2, #0 - 7698 0144 1A70 strb r2, [r3] -3210:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7699 .loc 1 3210 0 - 7700 0146 124A ldr r2, .L457+12 - 7701 0148 1378 ldrb r3, [r2] - ARM GAS /tmp/ccrFaSdZ.s page 207 - - - 7702 014a 0821 movs r1, #8 - 7703 014c 8B43 bics r3, r1 - 7704 014e 1370 strb r3, [r2] - 7705 0150 60E7 b .L436 - 7706 .LVL729: - 7707 .L441: -3198:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.MlmeReq = 1; - 7708 .loc 1 3198 0 - 7709 0152 0D4A ldr r2, .L457+4 - 7710 0154 1370 strb r3, [r2] -3199:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = SetTxContinuousWave1( mlmeRequest->Req.TxCw.Timeout, mlmeRequest->Req.TxCw.Fre - 7711 .loc 1 3199 0 - 7712 0156 0E4A ldr r2, .L457+12 - 7713 0158 1378 ldrb r3, [r2] - 7714 015a 0821 movs r1, #8 - 7715 015c 0B43 orrs r3, r1 - 7716 015e 1370 strb r3, [r2] -3200:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 7717 .loc 1 3200 0 - 7718 0160 A088 ldrh r0, [r4, #4] - 7719 0162 A168 ldr r1, [r4, #8] - 7720 0164 227B ldrb r2, [r4, #12] - 7721 0166 FFF7FEFF bl SetTxContinuousWave1 - 7722 .LVL730: -3201:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7723 .loc 1 3201 0 - 7724 016a E6E7 b .L443 - 7725 .LVL731: - 7726 .L444: -3117:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7727 .loc 1 3117 0 - 7728 016c 0320 movs r0, #3 - 7729 .LVL732: - 7730 016e 51E7 b .L436 - 7731 .L447: -3134:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7732 .loc 1 3134 0 - 7733 0170 0120 movs r0, #1 - 7734 0172 4FE7 b .L436 - 7735 .L448: -3142:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7736 .loc 1 3142 0 - 7737 0174 0320 movs r0, #3 - 7738 0176 4DE7 b .L436 - 7739 .L449: - 7740 0178 0320 movs r0, #3 - 7741 017a 4BE7 b .L436 - 7742 .L450: - 7743 017c 0320 movs r0, #3 - 7744 017e 49E7 b .L436 - 7745 .L451: - 7746 0180 0320 movs r0, #3 - 7747 0182 47E7 b .L436 - 7748 .L458: - 7749 .align 2 - 7750 .L457: - 7751 0184 00000000 .word .LANCHOR24 - ARM GAS /tmp/ccrFaSdZ.s page 208 - - - 7752 0188 00000000 .word .LANCHOR28 - 7753 018c 00000000 .word .LANCHOR22 - 7754 0190 00000000 .word .LANCHOR26 - 7755 0194 00000000 .word .LANCHOR52 - 7756 0198 00000000 .word .LANCHOR51 - 7757 019c 00000000 .word .LANCHOR38 - 7758 01a0 00000000 .word .LANCHOR59 - 7759 01a4 00000000 .word .LANCHOR54 - 7760 01a8 00000000 .word .LANCHOR14 - 7761 01ac 00000000 .word .LANCHOR11 - 7762 01b0 00000000 .word .LANCHOR10 - 7763 01b4 00000000 .word MacCommandsBuffer - 7764 01b8 00000000 .word .LANCHOR17 - 7765 01bc 00000000 .word .LANCHOR15 - 7766 .cfi_endproc - 7767 .LFE117: - 7769 .section .text.LoRaMacMcpsRequest,"ax",%progbits - 7770 .align 1 - 7771 .global LoRaMacMcpsRequest - 7772 .syntax unified - 7773 .code 16 - 7774 .thumb_func - 7775 .fpu softvfp - 7777 LoRaMacMcpsRequest: - 7778 .LFB118: -3215:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3216:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t LoRaMacMcpsRequest( McpsReq_t *mcpsRequest ) -3217:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7779 .loc 1 3217 0 - 7780 .cfi_startproc - 7781 @ args = 0, pretend = 0, frame = 16 - 7782 @ frame_needed = 0, uses_anonymous_args = 0 - 7783 .LVL733: - 7784 0000 F0B5 push {r4, r5, r6, r7, lr} - 7785 .LCFI49: - 7786 .cfi_def_cfa_offset 20 - 7787 .cfi_offset 4, -20 - 7788 .cfi_offset 5, -16 - 7789 .cfi_offset 6, -12 - 7790 .cfi_offset 7, -8 - 7791 .cfi_offset 14, -4 - 7792 0002 CE46 mov lr, r9 - 7793 0004 4746 mov r7, r8 - 7794 0006 80B5 push {r7, lr} - 7795 .LCFI50: - 7796 .cfi_def_cfa_offset 28 - 7797 .cfi_offset 8, -28 - 7798 .cfi_offset 9, -24 - 7799 0008 85B0 sub sp, sp, #20 - 7800 .LCFI51: - 7801 .cfi_def_cfa_offset 48 - 7802 000a 041E subs r4, r0, #0 - 7803 .LVL734: -3218:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** GetPhyParams_t getPhy; -3219:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** PhyParam_t phyParam; -3220:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacStatus_t status = LORAMAC_STATUS_SERVICE_UNKNOWN; -3221:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacHeader_t macHdr; - ARM GAS /tmp/ccrFaSdZ.s page 209 - - -3222:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** VerifyParams_t verify; -3223:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint8_t fPort = 0; -3224:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** void *fBuffer; -3225:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** uint16_t fBufferSize; -3226:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** int8_t datarate; -3227:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** bool readyToSend = false; -3228:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3229:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( mcpsRequest == NULL ) - 7804 .loc 1 3229 0 - 7805 000c 00D1 bne .LCB7518 - 7806 000e 96E0 b .L468 @long jump - 7807 .LCB7518: -3230:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3231:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -3232:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3233:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( ( ( LoRaMacState & LORAMAC_TX_RUNNING ) == LORAMAC_TX_RUNNING ) || - 7808 .loc 1 3233 0 - 7809 0010 1123 movs r3, #17 - 7810 0012 4E4A ldr r2, .L476 - 7811 0014 1268 ldr r2, [r2] - 7812 0016 1A42 tst r2, r3 - 7813 0018 05D0 beq .L474 -3234:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** ( ( LoRaMacState & LORAMAC_TX_DELAYED ) == LORAMAC_TX_DELAYED ) ) -3235:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3236:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_BUSY; - 7814 .loc 1 3236 0 - 7815 001a 0120 movs r0, #1 - 7816 .LVL735: - 7817 .L460: -3237:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3238:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3239:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Value = 0; -3240:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memset1 ( ( uint8_t* ) &McpsConfirm, 0, sizeof( McpsConfirm ) ); -3241:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_ERROR; -3242:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3243:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // AckTimeoutRetriesCounter must be reset every time a new request (unconfirmed or confirmed) i -3244:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetriesCounter = 1; -3245:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3246:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** switch( mcpsRequest->Type ) -3247:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3248:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MCPS_UNCONFIRMED: -3249:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3250:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** readyToSend = true; -3251:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetries = 1; -3252:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3253:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Bits.MType = FRAME_TYPE_DATA_UNCONFIRMED_UP; -3254:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fPort = mcpsRequest->Req.Unconfirmed.fPort; -3255:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBuffer = mcpsRequest->Req.Unconfirmed.fBuffer; -3256:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBufferSize = mcpsRequest->Req.Unconfirmed.fBufferSize; -3257:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** datarate = mcpsRequest->Req.Unconfirmed.Datarate; -3258:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -3259:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3260:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MCPS_CONFIRMED: -3261:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3262:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** readyToSend = true; -3263:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetries = mcpsRequest->Req.Confirmed.NbTrials; -3264:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - ARM GAS /tmp/ccrFaSdZ.s page 210 - - -3265:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Bits.MType = FRAME_TYPE_DATA_CONFIRMED_UP; -3266:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fPort = mcpsRequest->Req.Confirmed.fPort; -3267:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBuffer = mcpsRequest->Req.Confirmed.fBuffer; -3268:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBufferSize = mcpsRequest->Req.Confirmed.fBufferSize; -3269:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** datarate = mcpsRequest->Req.Confirmed.Datarate; -3270:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -3271:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3272:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** case MCPS_PROPRIETARY: -3273:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3274:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** readyToSend = true; -3275:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetries = 1; -3276:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3277:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** macHdr.Bits.MType = FRAME_TYPE_PROPRIETARY; -3278:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBuffer = mcpsRequest->Req.Proprietary.fBuffer; -3279:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBufferSize = mcpsRequest->Req.Proprietary.fBufferSize; -3280:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** datarate = mcpsRequest->Req.Proprietary.Datarate; -3281:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -3282:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3283:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** default: -3284:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; -3285:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3286:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3287:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Get the minimum possible datarate -3288:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.Attribute = PHY_MIN_TX_DR; -3289:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; -3290:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); -3291:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Apply the minimum possible datarate. -3292:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Some regions have limitations for the minimum datarate. -3293:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** datarate = MAX( datarate, phyParam.Value ); -3294:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3295:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( readyToSend == true ) -3296:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3297:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( AdrCtrlOn == false ) -3298:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3299:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DatarateParams.Datarate = datarate; -3300:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DatarateParams.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; -3301:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3302:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionVerify( LoRaMacRegion, &verify, PHY_TX_DR ) == true ) -3303:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3304:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacParams.ChannelsDatarate = verify.DatarateParams.Datarate; -3305:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3306:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -3307:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3308:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return LORAMAC_STATUS_PARAMETER_INVALID; -3309:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3310:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3311:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3312:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** status = Send( &macHdr, fPort, fBuffer, fBufferSize ); -3313:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( status == LORAMAC_STATUS_OK ) -3314:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3315:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.McpsRequest = mcpsRequest->Type; -3316:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsReq = 1; -3317:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3318:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** else -3319:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3320:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** NodeAckRequested = false; -3321:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - ARM GAS /tmp/ccrFaSdZ.s page 211 - - -3322:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3323:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3324:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** return status; -3325:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7818 .loc 1 3325 0 - 7819 001c 05B0 add sp, sp, #20 - 7820 @ sp needed - 7821 .LVL736: - 7822 001e 0CBC pop {r2, r3} - 7823 0020 9046 mov r8, r2 - 7824 0022 9946 mov r9, r3 - 7825 0024 F0BD pop {r4, r5, r6, r7, pc} - 7826 .LVL737: - 7827 .L474: -3239:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** memset1 ( ( uint8_t* ) &McpsConfirm, 0, sizeof( McpsConfirm ) ); - 7828 .loc 1 3239 0 - 7829 0026 02AB add r3, sp, #8 - 7830 0028 0022 movs r2, #0 - 7831 002a 1A70 strb r2, [r3] -3240:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** McpsConfirm.Status = LORAMAC_EVENT_INFO_STATUS_ERROR; - 7832 .loc 1 3240 0 - 7833 002c 484E ldr r6, .L476+4 - 7834 002e 1432 adds r2, r2, #20 - 7835 0030 0021 movs r1, #0 - 7836 0032 3000 movs r0, r6 - 7837 .LVL738: - 7838 0034 FFF7FEFF bl memset1 - 7839 .LVL739: -3241:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7840 .loc 1 3241 0 - 7841 0038 0123 movs r3, #1 - 7842 003a 7370 strb r3, [r6, #1] -3244:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7843 .loc 1 3244 0 - 7844 003c 454A ldr r2, .L476+8 - 7845 003e 1370 strb r3, [r2] -3246:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7846 .loc 1 3246 0 - 7847 0040 2378 ldrb r3, [r4] - 7848 0042 012B cmp r3, #1 - 7849 0044 4DD0 beq .L462 - 7850 0046 002B cmp r3, #0 - 7851 0048 05D0 beq .L463 - 7852 004a 032B cmp r3, #3 - 7853 004c 5CD0 beq .L464 -3227:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7854 .loc 1 3227 0 - 7855 004e 0026 movs r6, #0 -3223:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** void *fBuffer; - 7856 .loc 1 3223 0 - 7857 0050 0023 movs r3, #0 - 7858 0052 9946 mov r9, r3 - 7859 0054 11E0 b .L461 - 7860 .L463: - 7861 .LVL740: -3251:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7862 .loc 1 3251 0 - ARM GAS /tmp/ccrFaSdZ.s page 212 - - - 7863 0056 404B ldr r3, .L476+12 - 7864 0058 0122 movs r2, #1 - 7865 005a 1A70 strb r2, [r3] -3253:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fPort = mcpsRequest->Req.Unconfirmed.fPort; - 7866 .loc 1 3253 0 - 7867 005c 02AA add r2, sp, #8 - 7868 005e 1178 ldrb r1, [r2] - 7869 0060 1F23 movs r3, #31 - 7870 0062 0B40 ands r3, r1 - 7871 0064 4021 movs r1, #64 - 7872 0066 0B43 orrs r3, r1 - 7873 0068 1370 strb r3, [r2] -3254:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBuffer = mcpsRequest->Req.Unconfirmed.fBuffer; - 7874 .loc 1 3254 0 - 7875 006a 2379 ldrb r3, [r4, #4] - 7876 006c 9946 mov r9, r3 - 7877 .LVL741: -3255:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBufferSize = mcpsRequest->Req.Unconfirmed.fBufferSize; - 7878 .loc 1 3255 0 - 7879 006e A368 ldr r3, [r4, #8] - 7880 0070 9846 mov r8, r3 - 7881 .LVL742: -3256:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** datarate = mcpsRequest->Req.Unconfirmed.Datarate; - 7882 .loc 1 3256 0 - 7883 0072 A789 ldrh r7, [r4, #12] - 7884 .LVL743: -3257:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 7885 .loc 1 3257 0 - 7886 0074 0E25 movs r5, #14 - 7887 0076 6557 ldrsb r5, [r4, r5] - 7888 .LVL744: -3250:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetries = 1; - 7889 .loc 1 3250 0 - 7890 0078 0126 movs r6, #1 - 7891 .LVL745: - 7892 .L461: -3288:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** getPhy.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; - 7893 .loc 1 3288 0 - 7894 007a 03A9 add r1, sp, #12 - 7895 007c 0123 movs r3, #1 - 7896 007e 0B70 strb r3, [r1] -3289:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** phyParam = RegionGetPhyParam( LoRaMacRegion, &getPhy ); - 7897 .loc 1 3289 0 - 7898 0080 364A ldr r2, .L476+16 - 7899 0082 2B33 adds r3, r3, #43 - 7900 0084 D35C ldrb r3, [r2, r3] - 7901 0086 8B70 strb r3, [r1, #2] -3290:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** // Apply the minimum possible datarate. - 7902 .loc 1 3290 0 - 7903 0088 354B ldr r3, .L476+20 - 7904 008a 1878 ldrb r0, [r3] - 7905 008c FFF7FEFF bl RegionGetPhyParam - 7906 .LVL746: -3293:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7907 .loc 1 3293 0 - 7908 0090 2B00 movs r3, r5 - 7909 0092 8542 cmp r5, r0 - ARM GAS /tmp/ccrFaSdZ.s page 213 - - - 7910 0094 00D2 bcs .L465 - 7911 0096 0300 movs r3, r0 - 7912 .L465: - 7913 0098 5BB2 sxtb r3, r3 - 7914 .LVL747: -3295:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7915 .loc 1 3295 0 - 7916 009a 002E cmp r6, #0 - 7917 009c 51D0 beq .L471 -3297:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7918 .loc 1 3297 0 - 7919 009e 314A ldr r2, .L476+24 - 7920 00a0 1278 ldrb r2, [r2] - 7921 00a2 002A cmp r2, #0 - 7922 00a4 11D1 bne .L466 -3299:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DatarateParams.UplinkDwellTime = LoRaMacParams.UplinkDwellTime; - 7923 .loc 1 3299 0 - 7924 00a6 01A9 add r1, sp, #4 - 7925 00a8 0B70 strb r3, [r1] -3300:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7926 .loc 1 3300 0 - 7927 00aa 2C4A ldr r2, .L476+16 - 7928 00ac 2C23 movs r3, #44 - 7929 .LVL748: - 7930 00ae D35C ldrb r3, [r2, r3] - 7931 00b0 8B70 strb r3, [r1, #2] -3302:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7932 .loc 1 3302 0 - 7933 00b2 2B4B ldr r3, .L476+20 - 7934 00b4 1878 ldrb r0, [r3] - 7935 00b6 0422 movs r2, #4 - 7936 00b8 FFF7FEFF bl RegionVerify - 7937 .LVL749: - 7938 00bc 0028 cmp r0, #0 - 7939 00be 42D0 beq .L472 -3304:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7940 .loc 1 3304 0 - 7941 00c0 01AB add r3, sp, #4 - 7942 00c2 0022 movs r2, #0 - 7943 00c4 9A56 ldrsb r2, [r3, r2] - 7944 00c6 254B ldr r3, .L476+16 - 7945 00c8 5A70 strb r2, [r3, #1] - 7946 .L466: -3312:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( status == LORAMAC_STATUS_OK ) - 7947 .loc 1 3312 0 - 7948 00ca 3B00 movs r3, r7 - 7949 00cc 4246 mov r2, r8 - 7950 00ce 4946 mov r1, r9 - 7951 00d0 02A8 add r0, sp, #8 - 7952 00d2 FFF7FEFF bl Send - 7953 .LVL750: -3313:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 7954 .loc 1 3313 0 - 7955 00d6 0028 cmp r0, #0 - 7956 00d8 28D0 beq .L475 -3320:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7957 .loc 1 3320 0 - ARM GAS /tmp/ccrFaSdZ.s page 214 - - - 7958 00da 234B ldr r3, .L476+28 - 7959 00dc 0022 movs r2, #0 - 7960 00de 1A70 strb r2, [r3] - 7961 00e0 9CE7 b .L460 - 7962 .LVL751: - 7963 .L462: -3263:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7964 .loc 1 3263 0 - 7965 00e2 E27B ldrb r2, [r4, #15] - 7966 00e4 1C4B ldr r3, .L476+12 - 7967 00e6 1A70 strb r2, [r3] -3265:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fPort = mcpsRequest->Req.Confirmed.fPort; - 7968 .loc 1 3265 0 - 7969 00e8 02A9 add r1, sp, #8 - 7970 00ea 0A78 ldrb r2, [r1] - 7971 00ec 1F23 movs r3, #31 - 7972 00ee 1A40 ands r2, r3 - 7973 00f0 9F3B subs r3, r3, #159 - 7974 00f2 1343 orrs r3, r2 - 7975 00f4 0B70 strb r3, [r1] -3266:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBuffer = mcpsRequest->Req.Confirmed.fBuffer; - 7976 .loc 1 3266 0 - 7977 00f6 2379 ldrb r3, [r4, #4] - 7978 00f8 9946 mov r9, r3 - 7979 .LVL752: -3267:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBufferSize = mcpsRequest->Req.Confirmed.fBufferSize; - 7980 .loc 1 3267 0 - 7981 00fa A368 ldr r3, [r4, #8] - 7982 00fc 9846 mov r8, r3 - 7983 .LVL753: -3268:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** datarate = mcpsRequest->Req.Confirmed.Datarate; - 7984 .loc 1 3268 0 - 7985 00fe A789 ldrh r7, [r4, #12] - 7986 .LVL754: -3269:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 7987 .loc 1 3269 0 - 7988 0100 0E25 movs r5, #14 - 7989 0102 6557 ldrsb r5, [r4, r5] - 7990 .LVL755: -3262:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetries = mcpsRequest->Req.Confirmed.NbTrials; - 7991 .loc 1 3262 0 - 7992 0104 0126 movs r6, #1 -3270:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 7993 .loc 1 3270 0 - 7994 0106 B8E7 b .L461 - 7995 .LVL756: - 7996 .L464: -3275:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** - 7997 .loc 1 3275 0 - 7998 0108 134B ldr r3, .L476+12 - 7999 010a 0122 movs r2, #1 - 8000 010c 1A70 strb r2, [r3] -3277:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBuffer = mcpsRequest->Req.Proprietary.fBuffer; - 8001 .loc 1 3277 0 - 8002 010e 02AA add r2, sp, #8 - 8003 0110 1178 ldrb r1, [r2] - 8004 0112 2023 movs r3, #32 - ARM GAS /tmp/ccrFaSdZ.s page 215 - - - 8005 0114 5B42 rsbs r3, r3, #0 - 8006 0116 0B43 orrs r3, r1 - 8007 0118 1370 strb r3, [r2] -3278:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** fBufferSize = mcpsRequest->Req.Proprietary.fBufferSize; - 8008 .loc 1 3278 0 - 8009 011a 6368 ldr r3, [r4, #4] - 8010 011c 9846 mov r8, r3 - 8011 .LVL757: -3279:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** datarate = mcpsRequest->Req.Proprietary.Datarate; - 8012 .loc 1 3279 0 - 8013 011e 2789 ldrh r7, [r4, #8] - 8014 .LVL758: -3280:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** break; - 8015 .loc 1 3280 0 - 8016 0120 0A25 movs r5, #10 - 8017 0122 6557 ldrsb r5, [r4, r5] - 8018 .LVL759: -3274:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** AckTimeoutRetries = 1; - 8019 .loc 1 3274 0 - 8020 0124 0126 movs r6, #1 -3223:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** void *fBuffer; - 8021 .loc 1 3223 0 - 8022 0126 0023 movs r3, #0 - 8023 .LVL760: - 8024 0128 9946 mov r9, r3 -3281:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 8025 .loc 1 3281 0 - 8026 012a A6E7 b .L461 - 8027 .LVL761: - 8028 .L475: -3315:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacFlags.Bits.McpsReq = 1; - 8029 .loc 1 3315 0 - 8030 012c 2278 ldrb r2, [r4] - 8031 012e 084B ldr r3, .L476+4 - 8032 0130 1A70 strb r2, [r3] -3316:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 8033 .loc 1 3316 0 - 8034 0132 0E4A ldr r2, .L476+32 - 8035 0134 1378 ldrb r3, [r2] - 8036 0136 0121 movs r1, #1 - 8037 0138 0B43 orrs r3, r1 - 8038 013a 1370 strb r3, [r2] - 8039 013c 6EE7 b .L460 - 8040 .LVL762: - 8041 .L468: -3231:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 8042 .loc 1 3231 0 - 8043 013e 0320 movs r0, #3 - 8044 .LVL763: - 8045 0140 6CE7 b .L460 - 8046 .LVL764: - 8047 .L471: -3220:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** LoRaMacHeader_t macHdr; - 8048 .loc 1 3220 0 - 8049 0142 0220 movs r0, #2 - 8050 0144 6AE7 b .L460 - 8051 .LVL765: - ARM GAS /tmp/ccrFaSdZ.s page 216 - - - 8052 .L472: -3308:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 8053 .loc 1 3308 0 - 8054 0146 0320 movs r0, #3 - 8055 0148 68E7 b .L460 - 8056 .L477: - 8057 014a C046 .align 2 - 8058 .L476: - 8059 014c 00000000 .word .LANCHOR24 - 8060 0150 00000000 .word .LANCHOR34 - 8061 0154 00000000 .word .LANCHOR6 - 8062 0158 00000000 .word .LANCHOR5 - 8063 015c 00000000 .word .LANCHOR14 - 8064 0160 00000000 .word .LANCHOR22 - 8065 0164 00000000 .word .LANCHOR29 - 8066 0168 00000000 .word .LANCHOR15 - 8067 016c 00000000 .word .LANCHOR26 - 8068 .cfi_endproc - 8069 .LFE118: - 8071 .section .text.LoRaMacTestRxWindowsOn,"ax",%progbits - 8072 .align 1 - 8073 .global LoRaMacTestRxWindowsOn - 8074 .syntax unified - 8075 .code 16 - 8076 .thumb_func - 8077 .fpu softvfp - 8079 LoRaMacTestRxWindowsOn: - 8080 .LFB119: -3326:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3327:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** void LoRaMacTestRxWindowsOn( bool enable ) -3328:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 8081 .loc 1 3328 0 - 8082 .cfi_startproc - 8083 @ args = 0, pretend = 0, frame = 0 - 8084 @ frame_needed = 0, uses_anonymous_args = 0 - 8085 @ link register save eliminated. - 8086 .LVL766: -3329:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** IsRxWindowsEnabled = enable; - 8087 .loc 1 3329 0 - 8088 0000 014B ldr r3, .L479 - 8089 0002 1870 strb r0, [r3] -3330:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 8090 .loc 1 3330 0 - 8091 @ sp needed - 8092 0004 7047 bx lr - 8093 .L480: - 8094 0006 C046 .align 2 - 8095 .L479: - 8096 0008 00000000 .word .LANCHOR12 - 8097 .cfi_endproc - 8098 .LFE119: - 8100 .section .text.LoRaMacTestSetMic,"ax",%progbits - 8101 .align 1 - 8102 .global LoRaMacTestSetMic - 8103 .syntax unified - 8104 .code 16 - 8105 .thumb_func - ARM GAS /tmp/ccrFaSdZ.s page 217 - - - 8106 .fpu softvfp - 8108 LoRaMacTestSetMic: - 8109 .LFB120: -3331:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3332:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** void LoRaMacTestSetMic( uint16_t txPacketCounter ) -3333:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 8110 .loc 1 3333 0 - 8111 .cfi_startproc - 8112 @ args = 0, pretend = 0, frame = 0 - 8113 @ frame_needed = 0, uses_anonymous_args = 0 - 8114 @ link register save eliminated. - 8115 .LVL767: -3334:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** UpLinkCounter = txPacketCounter; - 8116 .loc 1 3334 0 - 8117 0000 024B ldr r3, .L482 - 8118 0002 1860 str r0, [r3] -3335:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** IsUpLinkCounterFixed = true; - 8119 .loc 1 3335 0 - 8120 0004 024B ldr r3, .L482+4 - 8121 0006 0122 movs r2, #1 - 8122 0008 1A70 strb r2, [r3] -3336:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 8123 .loc 1 3336 0 - 8124 @ sp needed - 8125 000a 7047 bx lr - 8126 .L483: - 8127 .align 2 - 8128 .L482: - 8129 000c 00000000 .word .LANCHOR1 - 8130 0010 00000000 .word .LANCHOR60 - 8131 .cfi_endproc - 8132 .LFE120: - 8134 .section .text.LoRaMacTestSetDutyCycleOn,"ax",%progbits - 8135 .align 1 - 8136 .global LoRaMacTestSetDutyCycleOn - 8137 .syntax unified - 8138 .code 16 - 8139 .thumb_func - 8140 .fpu softvfp - 8142 LoRaMacTestSetDutyCycleOn: - 8143 .LFB121: -3337:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3338:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** void LoRaMacTestSetDutyCycleOn( bool enable ) -3339:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 8144 .loc 1 3339 0 - 8145 .cfi_startproc - 8146 @ args = 0, pretend = 0, frame = 8 - 8147 @ frame_needed = 0, uses_anonymous_args = 0 - 8148 .LVL768: - 8149 0000 10B5 push {r4, lr} - 8150 .LCFI52: - 8151 .cfi_def_cfa_offset 8 - 8152 .cfi_offset 4, -8 - 8153 .cfi_offset 14, -4 - 8154 0002 82B0 sub sp, sp, #8 - 8155 .LCFI53: - 8156 .cfi_def_cfa_offset 16 - ARM GAS /tmp/ccrFaSdZ.s page 218 - - - 8157 0004 0400 movs r4, r0 -3340:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** VerifyParams_t verify; -3341:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3342:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** verify.DutyCycle = enable; - 8158 .loc 1 3342 0 - 8159 0006 01A9 add r1, sp, #4 - 8160 0008 0870 strb r0, [r1] -3343:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3344:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** if( RegionVerify( LoRaMacRegion, &verify, PHY_DUTY_CYCLE ) == true ) - 8161 .loc 1 3344 0 - 8162 000a 054B ldr r3, .L486 - 8163 000c 1878 ldrb r0, [r3] - 8164 .LVL769: - 8165 000e 0B22 movs r2, #11 - 8166 0010 FFF7FEFF bl RegionVerify - 8167 .LVL770: - 8168 0014 0028 cmp r0, #0 - 8169 0016 01D0 beq .L484 -3345:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { -3346:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** DutyCycleOn = enable; - 8170 .loc 1 3346 0 - 8171 0018 024B ldr r3, .L486+4 - 8172 001a 1C70 strb r4, [r3] - 8173 .L484: -3347:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } -3348:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 8174 .loc 1 3348 0 - 8175 001c 02B0 add sp, sp, #8 - 8176 @ sp needed - 8177 001e 10BD pop {r4, pc} - 8178 .L487: - 8179 .align 2 - 8180 .L486: - 8181 0020 00000000 .word .LANCHOR22 - 8182 0024 00000000 .word .LANCHOR56 - 8183 .cfi_endproc - 8184 .LFE121: - 8186 .section .text.LoRaMacTestSetChannel,"ax",%progbits - 8187 .align 1 - 8188 .global LoRaMacTestSetChannel - 8189 .syntax unified - 8190 .code 16 - 8191 .thumb_func - 8192 .fpu softvfp - 8194 LoRaMacTestSetChannel: - 8195 .LFB122: -3349:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** -3350:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** void LoRaMacTestSetChannel( uint8_t channel ) -3351:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** { - 8196 .loc 1 3351 0 - 8197 .cfi_startproc - 8198 @ args = 0, pretend = 0, frame = 0 - 8199 @ frame_needed = 0, uses_anonymous_args = 0 - 8200 @ link register save eliminated. - 8201 .LVL771: -3352:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** Channel = channel; - 8202 .loc 1 3352 0 - ARM GAS /tmp/ccrFaSdZ.s page 219 - - - 8203 0000 014B ldr r3, .L489 - 8204 0002 1870 strb r0, [r3] -3353:./Middlewares/Third_Party/Lora/Mac/LoRaMac.c **** } - 8205 .loc 1 3353 0 - 8206 @ sp needed - 8207 0004 7047 bx lr - 8208 .L490: - 8209 0006 C046 .align 2 - 8210 .L489: - 8211 0008 00000000 .word .LANCHOR19 - 8212 .cfi_endproc - 8213 .LFE122: - 8215 .global LoRaMacFlags - 8216 .global TxTimeOnAir - 8217 .global LoRaMacState - 8218 .global LoRaMacParamsDefaults - 8219 .global LoRaMacParams - 8220 .section .bss.AckTimeoutRetry,"aw",%nobits - 8221 .set .LANCHOR7,. + 0 - 8224 AckTimeoutRetry: - 8225 0000 00 .space 1 - 8226 .section .bss.AckTimeoutTimer,"aw",%nobits - 8227 .align 2 - 8228 .set .LANCHOR23,. + 0 - 8231 AckTimeoutTimer: - 8232 0000 00000000 .space 20 - 8232 00000000 - 8232 00000000 - 8232 00000000 - 8232 00000000 - 8233 .section .bss.AdrAckCounter,"aw",%nobits - 8234 .align 2 - 8235 .set .LANCHOR3,. + 0 - 8238 AdrAckCounter: - 8239 0000 00000000 .space 4 - 8240 .section .bss.AdrCtrlOn,"aw",%nobits - 8241 .set .LANCHOR29,. + 0 - 8244 AdrCtrlOn: - 8245 0000 00 .space 1 - 8246 .section .bss.AggregatedDCycle,"aw",%nobits - 8247 .align 1 - 8248 .set .LANCHOR9,. + 0 - 8251 AggregatedDCycle: - 8252 0000 0000 .space 2 - 8253 .section .bss.AggregatedLastTxDoneTime,"aw",%nobits - 8254 .align 2 - 8255 .set .LANCHOR43,. + 0 - 8258 AggregatedLastTxDoneTime: - 8259 0000 00000000 .space 4 - 8260 .section .bss.AggregatedTimeOff,"aw",%nobits - 8261 .align 2 - 8262 .set .LANCHOR55,. + 0 - 8265 AggregatedTimeOff: - 8266 0000 00000000 .space 4 - 8267 .section .bss.Channel,"aw",%nobits - 8268 .set .LANCHOR19,. + 0 - 8271 Channel: - ARM GAS /tmp/ccrFaSdZ.s page 220 - - - 8272 0000 00 .space 1 - 8273 .section .bss.ChannelsNbRepCounter,"aw",%nobits - 8274 .set .LANCHOR4,. + 0 - 8277 ChannelsNbRepCounter: - 8278 0000 00 .space 1 - 8279 .section .bss.DownLinkCounter,"aw",%nobits - 8280 .align 2 - 8281 .set .LANCHOR2,. + 0 - 8284 DownLinkCounter: - 8285 0000 00000000 .space 4 - 8286 .section .bss.DutyCycleOn,"aw",%nobits - 8287 .set .LANCHOR56,. + 0 - 8290 DutyCycleOn: - 8291 0000 00 .space 1 - 8292 .section .bss.IsLoRaMacNetworkJoined,"aw",%nobits - 8293 .set .LANCHOR0,. + 0 - 8296 IsLoRaMacNetworkJoined: - 8297 0000 00 .space 1 - 8298 .section .bss.IsUpLinkCounterFixed,"aw",%nobits - 8299 .set .LANCHOR60,. + 0 - 8302 IsUpLinkCounterFixed: - 8303 0000 00 .space 1 - 8304 .section .bss.JoinRequestTrials,"aw",%nobits - 8305 .set .LANCHOR54,. + 0 - 8308 JoinRequestTrials: - 8309 0000 00 .space 1 - 8310 .section .bss.LastTxChannel,"aw",%nobits - 8311 .set .LANCHOR20,. + 0 - 8314 LastTxChannel: - 8315 0000 00 .space 1 - 8316 .section .bss.LastTxIsJoinRequest,"aw",%nobits - 8317 .set .LANCHOR47,. + 0 - 8320 LastTxIsJoinRequest: - 8321 0000 00 .space 1 - 8322 .section .bss.LoRaMacAppEui,"aw",%nobits - 8323 .align 2 - 8324 .set .LANCHOR51,. + 0 - 8327 LoRaMacAppEui: - 8328 0000 00000000 .space 4 - 8329 .section .bss.LoRaMacAppKey,"aw",%nobits - 8330 .align 2 - 8331 .set .LANCHOR38,. + 0 - 8334 LoRaMacAppKey: - 8335 0000 00000000 .space 4 - 8336 .section .bss.LoRaMacAppSKey,"aw",%nobits - 8337 .align 2 - 8338 .set .LANCHOR32,. + 0 - 8341 LoRaMacAppSKey: - 8342 0000 00000000 .space 16 - 8342 00000000 - 8342 00000000 - 8342 00000000 - 8343 .section .bss.LoRaMacBuffer,"aw",%nobits - 8344 .align 2 - 8347 LoRaMacBuffer: - 8348 0000 00000000 .space 255 - 8348 00000000 - ARM GAS /tmp/ccrFaSdZ.s page 221 - - - 8348 00000000 - 8348 00000000 - 8348 00000000 - 8349 .section .bss.LoRaMacBufferPktLen,"aw",%nobits - 8350 .align 1 - 8351 .set .LANCHOR49,. + 0 - 8354 LoRaMacBufferPktLen: - 8355 0000 0000 .space 2 - 8356 .section .bss.LoRaMacCallbacks,"aw",%nobits - 8357 .align 2 - 8358 .set .LANCHOR30,. + 0 - 8361 LoRaMacCallbacks: - 8362 0000 00000000 .space 4 - 8363 .section .bss.LoRaMacDevAddr,"aw",%nobits - 8364 .align 2 - 8365 .set .LANCHOR41,. + 0 - 8368 LoRaMacDevAddr: - 8369 0000 00000000 .space 4 - 8370 .section .bss.LoRaMacDevEui,"aw",%nobits - 8371 .align 2 - 8372 .set .LANCHOR52,. + 0 - 8375 LoRaMacDevEui: - 8376 0000 00000000 .space 4 - 8377 .section .bss.LoRaMacDevNonce,"aw",%nobits - 8378 .align 1 - 8379 .set .LANCHOR39,. + 0 - 8382 LoRaMacDevNonce: - 8383 0000 0000 .space 2 - 8384 .section .bss.LoRaMacDeviceClass,"aw",%nobits - 8385 .set .LANCHOR25,. + 0 - 8388 LoRaMacDeviceClass: - 8389 0000 00 .space 1 - 8390 .section .bss.LoRaMacFlags,"aw",%nobits - 8391 .align 2 - 8392 .set .LANCHOR26,. + 0 - 8395 LoRaMacFlags: - 8396 0000 00 .space 1 - 8397 .section .bss.LoRaMacInitializationTime,"aw",%nobits - 8398 .align 2 - 8399 .set .LANCHOR57,. + 0 - 8402 LoRaMacInitializationTime: - 8403 0000 00000000 .space 4 - 8404 .section .bss.LoRaMacNetID,"aw",%nobits - 8405 .align 2 - 8406 .set .LANCHOR40,. + 0 - 8409 LoRaMacNetID: - 8410 0000 00000000 .space 4 - 8411 .section .bss.LoRaMacNwkSKey,"aw",%nobits - 8412 .align 2 - 8413 .set .LANCHOR33,. + 0 - 8416 LoRaMacNwkSKey: - 8417 0000 00000000 .space 16 - 8417 00000000 - 8417 00000000 - 8417 00000000 - 8418 .section .bss.LoRaMacParams,"aw",%nobits - 8419 .align 2 - ARM GAS /tmp/ccrFaSdZ.s page 222 - - - 8420 .set .LANCHOR14,. + 0 - 8423 LoRaMacParams: - 8424 0000 00000000 .space 56 - 8424 00000000 - 8424 00000000 - 8424 00000000 - 8424 00000000 - 8425 .section .bss.LoRaMacParamsDefaults,"aw",%nobits - 8426 .align 2 - 8427 .set .LANCHOR13,. + 0 - 8430 LoRaMacParamsDefaults: - 8431 0000 00000000 .space 56 - 8431 00000000 - 8431 00000000 - 8431 00000000 - 8431 00000000 - 8432 .section .bss.LoRaMacPrimitives,"aw",%nobits - 8433 .align 2 - 8434 .set .LANCHOR61,. + 0 - 8437 LoRaMacPrimitives: - 8438 0000 00000000 .space 4 - 8439 .section .bss.LoRaMacRegion,"aw",%nobits - 8440 .set .LANCHOR22,. + 0 - 8443 LoRaMacRegion: - 8444 0000 00 .space 1 - 8445 .section .bss.LoRaMacRxPayload,"aw",%nobits - 8446 .align 2 - 8449 LoRaMacRxPayload: - 8450 0000 00000000 .space 255 - 8450 00000000 - 8450 00000000 - 8450 00000000 - 8450 00000000 - 8451 .section .bss.LoRaMacState,"aw",%nobits - 8452 .align 2 - 8453 .set .LANCHOR24,. + 0 - 8456 LoRaMacState: - 8457 0000 00000000 .space 4 - 8458 .section .bss.LoRaMacTxPayloadLen,"aw",%nobits - 8459 .set .LANCHOR50,. + 0 - 8462 LoRaMacTxPayloadLen: - 8463 0000 00 .space 1 - 8464 .section .bss.MacCommandsBuffer,"aw",%nobits - 8465 .align 2 - 8468 MacCommandsBuffer: - 8469 0000 00000000 .space 128 - 8469 00000000 - 8469 00000000 - 8469 00000000 - 8469 00000000 - 8470 .section .bss.MacCommandsBufferIndex,"aw",%nobits - 8471 .set .LANCHOR10,. + 0 - 8474 MacCommandsBufferIndex: - 8475 0000 00 .space 1 - 8476 .section .bss.MacCommandsBufferToRepeat,"aw",%nobits - 8477 .align 2 - 8480 MacCommandsBufferToRepeat: - ARM GAS /tmp/ccrFaSdZ.s page 223 - - - 8481 0000 00000000 .space 128 - 8481 00000000 - 8481 00000000 - 8481 00000000 - 8481 00000000 - 8482 .section .bss.MacCommandsBufferToRepeatIndex,"aw",%nobits - 8483 .set .LANCHOR11,. + 0 - 8486 MacCommandsBufferToRepeatIndex: - 8487 0000 00 .space 1 - 8488 .section .bss.MacCommandsInNextTx,"aw",%nobits - 8489 .set .LANCHOR17,. + 0 - 8492 MacCommandsInNextTx: - 8493 0000 00 .space 1 - 8494 .section .bss.MacStateCheckTimer,"aw",%nobits - 8495 .align 2 - 8496 .set .LANCHOR27,. + 0 - 8499 MacStateCheckTimer: - 8500 0000 00000000 .space 20 - 8500 00000000 - 8500 00000000 - 8500 00000000 - 8500 00000000 - 8501 .section .bss.MaxDCycle,"aw",%nobits - 8502 .set .LANCHOR8,. + 0 - 8505 MaxDCycle: - 8506 0000 00 .space 1 - 8507 .section .bss.MaxJoinRequestTrials,"aw",%nobits - 8508 .set .LANCHOR59,. + 0 - 8511 MaxJoinRequestTrials: - 8512 0000 00 .space 1 - 8513 .section .bss.McpsConfirm,"aw",%nobits - 8514 .align 2 - 8515 .set .LANCHOR34,. + 0 - 8518 McpsConfirm: - 8519 0000 00000000 .space 20 - 8519 00000000 - 8519 00000000 - 8519 00000000 - 8519 00000000 - 8520 .section .bss.McpsIndication,"aw",%nobits - 8521 .align 2 - 8522 .set .LANCHOR35,. + 0 - 8525 McpsIndication: - 8526 0000 00000000 .space 24 - 8526 00000000 - 8526 00000000 - 8526 00000000 - 8526 00000000 - 8527 .section .bss.MlmeConfirm,"aw",%nobits - 8528 .align 2 - 8529 .set .LANCHOR28,. + 0 - 8532 MlmeConfirm: - 8533 0000 00000000 .space 12 - 8533 00000000 - 8533 00000000 - 8534 .section .bss.MulticastChannels,"aw",%nobits - 8535 .align 2 - ARM GAS /tmp/ccrFaSdZ.s page 224 - - - 8536 .set .LANCHOR18,. + 0 - 8539 MulticastChannels: - 8540 0000 00000000 .space 4 - 8541 .section .bss.NodeAckRequested,"aw",%nobits - 8542 .set .LANCHOR15,. + 0 - 8545 NodeAckRequested: - 8546 0000 00 .space 1 - 8547 .section .bss.PublicNetwork,"aw",%nobits - 8548 .set .LANCHOR63,. + 0 - 8551 PublicNetwork: - 8552 0000 00 .space 1 - 8553 .section .bss.RadioEvents,"aw",%nobits - 8554 .align 2 - 8555 .set .LANCHOR62,. + 0 - 8558 RadioEvents: - 8559 0000 00000000 .space 28 - 8559 00000000 - 8559 00000000 - 8559 00000000 - 8559 00000000 - 8560 .section .bss.RepeaterSupport,"aw",%nobits - 8561 .set .LANCHOR21,. + 0 - 8564 RepeaterSupport: - 8565 0000 00 .space 1 - 8566 .section .bss.RxSlot,"aw",%nobits - 8567 .set .LANCHOR36,. + 0 - 8570 RxSlot: - 8571 0000 00 .space 1 - 8572 .section .bss.RxWindow1Config,"aw",%nobits - 8573 .align 2 - 8574 .set .LANCHOR48,. + 0 - 8577 RxWindow1Config: - 8578 0000 00000000 .space 20 - 8578 00000000 - 8578 00000000 - 8578 00000000 - 8578 00000000 - 8579 .section .bss.RxWindow1Delay,"aw",%nobits - 8580 .align 2 - 8581 .set .LANCHOR45,. + 0 - 8584 RxWindow1Delay: - 8585 0000 00000000 .space 4 - 8586 .section .bss.RxWindow2Config,"aw",%nobits - 8587 .align 2 - 8588 .set .LANCHOR42,. + 0 - 8591 RxWindow2Config: - 8592 0000 00000000 .space 20 - 8592 00000000 - 8592 00000000 - 8592 00000000 - 8592 00000000 - 8593 .section .bss.RxWindow2Delay,"aw",%nobits - 8594 .align 2 - 8595 .set .LANCHOR44,. + 0 - 8598 RxWindow2Delay: - 8599 0000 00000000 .space 4 - 8600 .section .bss.RxWindowTimer1,"aw",%nobits - ARM GAS /tmp/ccrFaSdZ.s page 225 - - - 8601 .align 2 - 8602 .set .LANCHOR46,. + 0 - 8605 RxWindowTimer1: - 8606 0000 00000000 .space 20 - 8606 00000000 - 8606 00000000 - 8606 00000000 - 8606 00000000 - 8607 .section .bss.RxWindowTimer2,"aw",%nobits - 8608 .align 2 - 8609 .set .LANCHOR37,. + 0 - 8612 RxWindowTimer2: - 8613 0000 00000000 .space 20 - 8613 00000000 - 8613 00000000 - 8613 00000000 - 8613 00000000 - 8614 .section .bss.SrvAckRequested,"aw",%nobits - 8615 .set .LANCHOR16,. + 0 - 8618 SrvAckRequested: - 8619 0000 00 .space 1 - 8620 .section .bss.TxDelayedTimer,"aw",%nobits - 8621 .align 2 - 8622 .set .LANCHOR58,. + 0 - 8625 TxDelayedTimer: - 8626 0000 00000000 .space 20 - 8626 00000000 - 8626 00000000 - 8626 00000000 - 8626 00000000 - 8627 .section .bss.TxTimeOnAir,"aw",%nobits - 8628 .align 2 - 8629 .set .LANCHOR53,. + 0 - 8632 TxTimeOnAir: - 8633 0000 00000000 .space 4 - 8634 .section .bss.UpLinkCounter,"aw",%nobits - 8635 .align 2 - 8636 .set .LANCHOR1,. + 0 - 8639 UpLinkCounter: - 8640 0000 00000000 .space 4 - 8641 .section .data.AckTimeoutRetries,"aw",%progbits - 8642 .set .LANCHOR5,. + 0 - 8645 AckTimeoutRetries: - 8646 0000 01 .byte 1 - 8647 .section .data.AckTimeoutRetriesCounter,"aw",%progbits - 8648 .set .LANCHOR6,. + 0 - 8651 AckTimeoutRetriesCounter: - 8652 0000 01 .byte 1 - 8653 .section .data.IsRxWindowsEnabled,"aw",%progbits - 8654 .set .LANCHOR12,. + 0 - 8657 IsRxWindowsEnabled: - 8658 0000 01 .byte 1 - 8659 .section .rodata.LoRaMacMaxEirpTable,"a",%progbits - 8660 .align 2 - 8661 .set .LANCHOR31,. + 0 - 8664 LoRaMacMaxEirpTable: - 8665 0000 08 .byte 8 - ARM GAS /tmp/ccrFaSdZ.s page 226 - - - 8666 0001 0A .byte 10 - 8667 0002 0C .byte 12 - 8668 0003 0D .byte 13 - 8669 0004 0E .byte 14 - 8670 0005 10 .byte 16 - 8671 0006 12 .byte 18 - 8672 0007 14 .byte 20 - 8673 0008 15 .byte 21 - 8674 0009 18 .byte 24 - 8675 000a 1A .byte 26 - 8676 000b 1B .byte 27 - 8677 000c 1D .byte 29 - 8678 000d 1E .byte 30 - 8679 000e 21 .byte 33 - 8680 000f 24 .byte 36 - 8681 .text - 8682 .Letext0: - 8683 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 8684 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 8685 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 8686 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 8687 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 8688 .file 7 "/usr/arm-none-eabi/include/sys/_stdint.h" - 8689 .file 8 "Middlewares/Third_Party/Lora/Phy/radio.h" - 8690 .file 9 "/usr/arm-none-eabi/include/math.h" - 8691 .file 10 "Middlewares/Third_Party/Lora/Utilities/utilities.h" - 8692 .file 11 "Middlewares/Third_Party/Lora/Utilities/timeServer.h" - 8693 .file 12 "./Middlewares/Third_Party/Lora/Mac/LoRaMac.h" - 8694 .file 13 "./Middlewares/Third_Party/Lora/Mac/region/Region.h" - 8695 .file 14 "./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h" - ARM GAS /tmp/ccrFaSdZ.s page 227 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 LoRaMac.c - /tmp/ccrFaSdZ.s:16 .text.ResetMacParameters:0000000000000000 $t - /tmp/ccrFaSdZ.s:22 .text.ResetMacParameters:0000000000000000 ResetMacParameters - /tmp/ccrFaSdZ.s:151 .text.ResetMacParameters:0000000000000098 $d - /tmp/ccrFaSdZ.s:176 .text.ValidatePayloadLength:0000000000000000 $t - /tmp/ccrFaSdZ.s:182 .text.ValidatePayloadLength:0000000000000000 ValidatePayloadLength - /tmp/ccrFaSdZ.s:266 .text.ValidatePayloadLength:000000000000004c $d - /tmp/ccrFaSdZ.s:273 .text.OnAckTimeoutTimerEvent:0000000000000000 $t - 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/tmp/ccrFaSdZ.s:8571 .bss.RxSlot:0000000000000000 $d - /tmp/ccrFaSdZ.s:8573 .bss.RxWindow1Config:0000000000000000 $d - /tmp/ccrFaSdZ.s:8577 .bss.RxWindow1Config:0000000000000000 RxWindow1Config - /tmp/ccrFaSdZ.s:8580 .bss.RxWindow1Delay:0000000000000000 $d - /tmp/ccrFaSdZ.s:8584 .bss.RxWindow1Delay:0000000000000000 RxWindow1Delay - /tmp/ccrFaSdZ.s:8587 .bss.RxWindow2Config:0000000000000000 $d - /tmp/ccrFaSdZ.s:8591 .bss.RxWindow2Config:0000000000000000 RxWindow2Config - /tmp/ccrFaSdZ.s:8594 .bss.RxWindow2Delay:0000000000000000 $d - ARM GAS /tmp/ccrFaSdZ.s page 231 - - - /tmp/ccrFaSdZ.s:8598 .bss.RxWindow2Delay:0000000000000000 RxWindow2Delay - /tmp/ccrFaSdZ.s:8601 .bss.RxWindowTimer1:0000000000000000 $d - /tmp/ccrFaSdZ.s:8605 .bss.RxWindowTimer1:0000000000000000 RxWindowTimer1 - /tmp/ccrFaSdZ.s:8608 .bss.RxWindowTimer2:0000000000000000 $d - /tmp/ccrFaSdZ.s:8612 .bss.RxWindowTimer2:0000000000000000 RxWindowTimer2 - /tmp/ccrFaSdZ.s:8618 .bss.SrvAckRequested:0000000000000000 SrvAckRequested - /tmp/ccrFaSdZ.s:8619 .bss.SrvAckRequested:0000000000000000 $d - /tmp/ccrFaSdZ.s:8621 .bss.TxDelayedTimer:0000000000000000 $d - /tmp/ccrFaSdZ.s:8625 .bss.TxDelayedTimer:0000000000000000 TxDelayedTimer - /tmp/ccrFaSdZ.s:8628 .bss.TxTimeOnAir:0000000000000000 $d - /tmp/ccrFaSdZ.s:8635 .bss.UpLinkCounter:0000000000000000 $d - /tmp/ccrFaSdZ.s:8639 .bss.UpLinkCounter:0000000000000000 UpLinkCounter - /tmp/ccrFaSdZ.s:8645 .data.AckTimeoutRetries:0000000000000000 AckTimeoutRetries - /tmp/ccrFaSdZ.s:8651 .data.AckTimeoutRetriesCounter:0000000000000000 AckTimeoutRetriesCounter - /tmp/ccrFaSdZ.s:8657 .data.IsRxWindowsEnabled:0000000000000000 IsRxWindowsEnabled - /tmp/ccrFaSdZ.s:8660 .rodata.LoRaMacMaxEirpTable:0000000000000000 $d - /tmp/ccrFaSdZ.s:8664 .rodata.LoRaMacMaxEirpTable:0000000000000000 LoRaMacMaxEirpTable - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -RegionGetPhyParam -TimerStop -TimerSetValue -TimerStart -__aeabi_uidiv -__aeabi_ui2f -RegionLinkAdrReq -RegionRxParamSetupReq -RegionNewChannelReq -RegionTxParamSetupReq -RegionDlChannelReq -memcpy1 -LoRaMacJoinDecrypt -LoRaMacJoinComputeMic -LoRaMacJoinComputeSKeys -RegionApplyCFList -Radio -LoRaMacComputeMic -LoRaMacPayloadDecrypt -RegionRxConfig -TimerGetElapsedTime -TimerGetCurrentTime -RegionSetBandTxDone -memcpyr -RegionAdrNext -LoRaMacPayloadEncrypt -RegionTxConfig -RegionCalcBackOff -RegionNextChannel -RegionApplyDrOffset -RegionComputeRxWindowParameters -RegionAlternateDr -RegionInitDefaults -RegionSetContinuousWave -RegionIsActive -TimerInit -srand1 - ARM GAS /tmp/ccrFaSdZ.s page 232 - - -RegionVerify -RegionChanMaskSet -RegionChannelAdd -RegionChannelsRemove -memset1 diff --git a/build/LoRaMacCrypto.d b/build/LoRaMacCrypto.d deleted file mode 100644 index 8f9c502..0000000 --- a/build/LoRaMacCrypto.d +++ /dev/null @@ -1,31 +0,0 @@ -build/LoRaMacCrypto.d: Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Middlewares/Third_Party/Lora/Crypto/aes.h \ - Middlewares/Third_Party/Lora/Crypto/cmac.h \ - Middlewares/Third_Party/Lora/Crypto/aes.h \ - Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Middlewares/Third_Party/Lora/Crypto/aes.h: - -Middlewares/Third_Party/Lora/Crypto/cmac.h: - -Middlewares/Third_Party/Lora/Crypto/aes.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.h: diff --git a/build/LoRaMacCrypto.lst b/build/LoRaMacCrypto.lst deleted file mode 100644 index bc5fd56..0000000 --- a/build/LoRaMacCrypto.lst +++ /dev/null @@ -1,1053 +0,0 @@ -ARM GAS /tmp/ccDkMnY2.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "LoRaMacCrypto.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.LoRaMacComputeMic,"ax",%progbits - 16 .align 1 - 17 .global LoRaMacComputeMic - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 LoRaMacComputeMic: - 24 .LFB82: - 25 .file 1 "./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c" - 1:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** /* - 2:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** / _____) _ | | - 3:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** (C)2013 Semtech - 8:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** ___ _____ _ ___ _ _____ ___ ___ ___ ___ - 9:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** / __|_ _/_\ / __| |/ / __/ _ \| _ \/ __| __| - 10:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** \__ \ | |/ _ \ (__| ' <| _| (_) | / (__| _| - 11:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** |___/ |_/_/ \_\___|_|\_\_| \___/|_|_\\___|___| - 12:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** embedded.connectivity.solutions=============== - 13:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 14:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** Description: LoRa MAC layer implementation - 15:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 16:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 17:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 18:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** Maintainer: Miguel Luis ( Semtech ), Gregory Cristian ( Semtech ) and Daniel Jaeckle ( STACKFORCE ) - 19:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** */ - 20:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** #include - 21:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** #include - 22:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** #include "utilities.h" - 23:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 24:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** #include "aes.h" - 25:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** #include "cmac.h" - 26:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 27:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** #include "LoRaMacCrypto.h" - 28:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 29:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** /*! - 30:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * CMAC/AES Message Integrity Code (MIC) Block B0 size - 31:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** */ - 32:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** #define LORAMAC_MIC_BLOCK_B0_SIZE 16 - 33:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - ARM GAS /tmp/ccDkMnY2.s page 2 - - - 34:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** /*! - 35:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * MIC field computation initial data - 36:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** */ - 37:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** static uint8_t MicBlockB0[] = { 0x49, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 38:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - 39:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** }; - 40:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 41:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** /*! - 42:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * Contains the computed MIC field. - 43:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * - 44:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * \remark Only the 4 first bytes are used - 45:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** */ - 46:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** static uint8_t Mic[16]; - 47:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 48:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** /*! - 49:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * Encryption aBlock and sBlock - 50:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** */ - 51:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** static uint8_t aBlock[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 52:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - 53:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** }; - 54:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** static uint8_t sBlock[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 55:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - 56:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** }; - 57:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 58:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** /*! - 59:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * AES computation context variable - 60:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** */ - 61:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** static aes_context AesContext; - 62:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 63:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** /*! - 64:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * CMAC computation context variable - 65:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** */ - 66:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** static AES_CMAC_CTX AesCmacCtx[1]; - 67:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 68:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** /*! - 69:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * \brief Computes the LoRaMAC frame MIC field - 70:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * - 71:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * \param [IN] buffer Data buffer - 72:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * \param [IN] size Data buffer size - 73:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * \param [IN] key AES key to be used - 74:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * \param [IN] address Frame address - 75:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * \param [IN] dir Frame direction [0: uplink, 1: downlink] - 76:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * \param [IN] sequenceCounter Frame sequence counter - 77:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** * \param [OUT] mic Computed MIC field - 78:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** */ - 79:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** void LoRaMacComputeMic( const uint8_t *buffer, uint16_t size, const uint8_t *key, uint32_t address, - 80:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 26 .loc 1 80 0 - 27 .cfi_startproc - 28 @ args = 12, pretend = 0, frame = 8 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 .LVL0: - 31 0000 F0B5 push {r4, r5, r6, r7, lr} - 32 .LCFI0: - 33 .cfi_def_cfa_offset 20 - 34 .cfi_offset 4, -20 - 35 .cfi_offset 5, -16 - ARM GAS /tmp/ccDkMnY2.s page 3 - - - 36 .cfi_offset 6, -12 - 37 .cfi_offset 7, -8 - 38 .cfi_offset 14, -4 - 39 0002 83B0 sub sp, sp, #12 - 40 .LCFI1: - 41 .cfi_def_cfa_offset 32 - 42 0004 0190 str r0, [sp, #4] - 43 0006 0D00 movs r5, r1 - 44 0008 1600 movs r6, r2 - 45 000a 08AA add r2, sp, #32 - 46 .LVL1: - 47 000c 1278 ldrb r2, [r2] - 48 .LVL2: - 49 000e 0999 ldr r1, [sp, #36] - 50 .LVL3: - 81:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[5] = dir; - 51 .loc 1 81 0 - 52 0010 1B4C ldr r4, .L2 - 53 0012 6271 strb r2, [r4, #5] - 82:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 83:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[6] = ( address ) & 0xFF; - 54 .loc 1 83 0 - 55 0014 A371 strb r3, [r4, #6] - 84:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[7] = ( address >> 8 ) & 0xFF; - 56 .loc 1 84 0 - 57 0016 1A0A lsrs r2, r3, #8 - 58 0018 E271 strb r2, [r4, #7] - 85:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[8] = ( address >> 16 ) & 0xFF; - 59 .loc 1 85 0 - 60 001a 1A0C lsrs r2, r3, #16 - 61 001c 2272 strb r2, [r4, #8] - 86:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[9] = ( address >> 24 ) & 0xFF; - 62 .loc 1 86 0 - 63 001e 1B0E lsrs r3, r3, #24 - 64 .LVL4: - 65 0020 6372 strb r3, [r4, #9] - 87:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 88:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[10] = ( sequenceCounter ) & 0xFF; - 66 .loc 1 88 0 - 67 0022 A172 strb r1, [r4, #10] - 89:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[11] = ( sequenceCounter >> 8 ) & 0xFF; - 68 .loc 1 89 0 - 69 0024 0B0A lsrs r3, r1, #8 - 70 0026 E372 strb r3, [r4, #11] - 90:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[12] = ( sequenceCounter >> 16 ) & 0xFF; - 71 .loc 1 90 0 - 72 0028 0B0C lsrs r3, r1, #16 - 73 002a 2373 strb r3, [r4, #12] - 91:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[13] = ( sequenceCounter >> 24 ) & 0xFF; - 74 .loc 1 91 0 - 75 002c 090E lsrs r1, r1, #24 - 76 002e 6173 strb r1, [r4, #13] - 92:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 93:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** MicBlockB0[15] = size & 0xFF; - 77 .loc 1 93 0 - 78 0030 E573 strb r5, [r4, #15] - 94:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - ARM GAS /tmp/ccDkMnY2.s page 4 - - - 95:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** AES_CMAC_Init( AesCmacCtx ); - 79 .loc 1 95 0 - 80 0032 144F ldr r7, .L2+4 - 81 0034 3800 movs r0, r7 - 82 .LVL5: - 83 0036 FFF7FEFF bl AES_CMAC_Init - 84 .LVL6: - 96:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 97:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** AES_CMAC_SetKey( AesCmacCtx, key ); - 85 .loc 1 97 0 - 86 003a 3100 movs r1, r6 - 87 003c 3800 movs r0, r7 - 88 003e FFF7FEFF bl AES_CMAC_SetKey - 89 .LVL7: - 98:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 99:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** AES_CMAC_Update( AesCmacCtx, MicBlockB0, LORAMAC_MIC_BLOCK_B0_SIZE ); - 90 .loc 1 99 0 - 91 0042 1022 movs r2, #16 - 92 0044 2100 movs r1, r4 - 93 0046 3800 movs r0, r7 - 94 0048 FFF7FEFF bl AES_CMAC_Update - 95 .LVL8: - 100:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 101:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** AES_CMAC_Update( AesCmacCtx, buffer, size & 0xFF ); - 96 .loc 1 101 0 - 97 004c FF22 movs r2, #255 - 98 004e 2A40 ands r2, r5 - 99 0050 0199 ldr r1, [sp, #4] - 100 0052 3800 movs r0, r7 - 101 0054 FFF7FEFF bl AES_CMAC_Update - 102 .LVL9: - 102:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 103:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** AES_CMAC_Final( Mic, AesCmacCtx ); - 103 .loc 1 103 0 - 104 0058 0B4C ldr r4, .L2+8 - 105 005a 3900 movs r1, r7 - 106 005c 2000 movs r0, r4 - 107 005e FFF7FEFF bl AES_CMAC_Final - 108 .LVL10: - 104:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 105:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** *mic = ( uint32_t )( ( uint32_t )Mic[3] << 24 | ( uint32_t )Mic[2] << 16 | ( uint32_t )Mic[1] < - 109 .loc 1 105 0 - 110 0062 E378 ldrb r3, [r4, #3] - 111 0064 1B06 lsls r3, r3, #24 - 112 0066 A278 ldrb r2, [r4, #2] - 113 0068 1204 lsls r2, r2, #16 - 114 006a 1343 orrs r3, r2 - 115 006c 6278 ldrb r2, [r4, #1] - 116 006e 1202 lsls r2, r2, #8 - 117 0070 1343 orrs r3, r2 - 118 0072 2278 ldrb r2, [r4] - 119 0074 1343 orrs r3, r2 - 120 0076 0A9A ldr r2, [sp, #40] - 121 0078 1360 str r3, [r2] - 106:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 122 .loc 1 106 0 - 123 007a 03B0 add sp, sp, #12 - ARM GAS /tmp/ccDkMnY2.s page 5 - - - 124 @ sp needed - 125 .LVL11: - 126 007c F0BD pop {r4, r5, r6, r7, pc} - 127 .L3: - 128 007e C046 .align 2 - 129 .L2: - 130 0080 00000000 .word .LANCHOR0 - 131 0084 00000000 .word AesCmacCtx - 132 0088 00000000 .word .LANCHOR1 - 133 .cfi_endproc - 134 .LFE82: - 136 .section .text.LoRaMacPayloadEncrypt,"ax",%progbits - 137 .align 1 - 138 .global LoRaMacPayloadEncrypt - 139 .syntax unified - 140 .code 16 - 141 .thumb_func - 142 .fpu softvfp - 144 LoRaMacPayloadEncrypt: - 145 .LFB83: - 107:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 108:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** void LoRaMacPayloadEncrypt( const uint8_t *buffer, uint16_t size, const uint8_t *key, uint32_t addr - 109:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 146 .loc 1 109 0 - 147 .cfi_startproc - 148 @ args = 12, pretend = 0, frame = 8 - 149 @ frame_needed = 0, uses_anonymous_args = 0 - 150 .LVL12: - 151 0000 F0B5 push {r4, r5, r6, r7, lr} - 152 .LCFI2: - 153 .cfi_def_cfa_offset 20 - 154 .cfi_offset 4, -20 - 155 .cfi_offset 5, -16 - 156 .cfi_offset 6, -12 - 157 .cfi_offset 7, -8 - 158 .cfi_offset 14, -4 - 159 0002 DE46 mov lr, fp - 160 0004 4746 mov r7, r8 - 161 0006 80B5 push {r7, lr} - 162 .LCFI3: - 163 .cfi_def_cfa_offset 28 - 164 .cfi_offset 8, -28 - 165 .cfi_offset 11, -24 - 166 0008 83B0 sub sp, sp, #12 - 167 .LCFI4: - 168 .cfi_def_cfa_offset 40 - 169 000a 0400 movs r4, r0 - 170 000c 8846 mov r8, r1 - 171 000e 0192 str r2, [sp, #4] - 172 0010 1E00 movs r6, r3 - 173 0012 0AAB add r3, sp, #40 - 174 .LVL13: - 175 0014 1B78 ldrb r3, [r3] - 176 .LVL14: - 177 0016 9B46 mov fp, r3 - 178 0018 0B9D ldr r5, [sp, #44] - 179 001a 0C9F ldr r7, [sp, #48] - ARM GAS /tmp/ccDkMnY2.s page 6 - - - 180 .LVL15: - 110:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** uint16_t i; - 111:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** uint8_t bufferIndex = 0; - 112:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** uint16_t ctr = 1; - 113:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 114:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** memset1( AesContext.ksch, '\0', 240 ); - 181 .loc 1 114 0 - 182 001c F022 movs r2, #240 - 183 .LVL16: - 184 001e 0021 movs r1, #0 - 185 .LVL17: - 186 0020 2948 ldr r0, .L14 - 187 .LVL18: - 188 0022 FFF7FEFF bl memset1 - 189 .LVL19: - 115:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_set_key( key, 16, &AesContext ); - 190 .loc 1 115 0 - 191 0026 284A ldr r2, .L14 - 192 0028 1021 movs r1, #16 - 193 002a 0198 ldr r0, [sp, #4] - 194 002c FFF7FEFF bl aes_set_key - 195 .LVL20: - 116:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 117:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[5] = dir; - 196 .loc 1 117 0 - 197 0030 264B ldr r3, .L14+4 - 198 0032 5A46 mov r2, fp - 199 0034 5A71 strb r2, [r3, #5] - 118:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 119:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[6] = ( address ) & 0xFF; - 200 .loc 1 119 0 - 201 0036 9E71 strb r6, [r3, #6] - 120:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[7] = ( address >> 8 ) & 0xFF; - 202 .loc 1 120 0 - 203 0038 320A lsrs r2, r6, #8 - 204 003a DA71 strb r2, [r3, #7] - 121:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[8] = ( address >> 16 ) & 0xFF; - 205 .loc 1 121 0 - 206 003c 320C lsrs r2, r6, #16 - 207 003e 1A72 strb r2, [r3, #8] - 122:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[9] = ( address >> 24 ) & 0xFF; - 208 .loc 1 122 0 - 209 0040 320E lsrs r2, r6, #24 - 210 0042 5A72 strb r2, [r3, #9] - 123:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 124:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[10] = ( sequenceCounter ) & 0xFF; - 211 .loc 1 124 0 - 212 0044 9D72 strb r5, [r3, #10] - 125:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[11] = ( sequenceCounter >> 8 ) & 0xFF; - 213 .loc 1 125 0 - 214 0046 2A0A lsrs r2, r5, #8 - 215 0048 DA72 strb r2, [r3, #11] - 126:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[12] = ( sequenceCounter >> 16 ) & 0xFF; - 216 .loc 1 126 0 - 217 004a 2A0C lsrs r2, r5, #16 - 218 004c 1A73 strb r2, [r3, #12] - 127:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[13] = ( sequenceCounter >> 24 ) & 0xFF; - ARM GAS /tmp/ccDkMnY2.s page 7 - - - 219 .loc 1 127 0 - 220 004e 2D0E lsrs r5, r5, #24 - 221 0050 5D73 strb r5, [r3, #13] - 112:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 222 .loc 1 112 0 - 223 0052 0126 movs r6, #1 - 224 .LVL21: - 111:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** uint16_t ctr = 1; - 225 .loc 1 111 0 - 226 0054 0025 movs r5, #0 - 128:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 129:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** while( size >= 16 ) - 227 .loc 1 129 0 - 228 0056 0FE0 b .L5 - 229 .LVL22: - 230 .L7: - 130:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 131:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[15] = ( ( ctr ) & 0xFF ); - 132:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** ctr++; - 133:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_encrypt( aBlock, sBlock, &AesContext ); - 134:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** for( i = 0; i < 16; i++ ) - 135:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 136:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** encBuffer[bufferIndex + i] = buffer[bufferIndex + i] ^ sBlock[i]; - 231 .loc 1 136 0 discriminator 3 - 232 0058 E918 adds r1, r5, r3 - 233 005a 625C ldrb r2, [r4, r1] - 234 005c 1C48 ldr r0, .L14+8 - 235 005e C05C ldrb r0, [r0, r3] - 236 0060 4240 eors r2, r0 - 237 0062 7A54 strb r2, [r7, r1] - 134:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 238 .loc 1 134 0 discriminator 3 - 239 0064 0133 adds r3, r3, #1 - 240 .LVL23: - 241 0066 9BB2 uxth r3, r3 - 242 .LVL24: - 243 .L6: - 134:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 244 .loc 1 134 0 is_stmt 0 discriminator 1 - 245 0068 0F2B cmp r3, #15 - 246 006a F5D9 bls .L7 - 137:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 138:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** size -= 16; - 247 .loc 1 138 0 is_stmt 1 - 248 006c 4346 mov r3, r8 - 249 .LVL25: - 250 006e 103B subs r3, r3, #16 - 251 0070 9BB2 uxth r3, r3 - 252 0072 9846 mov r8, r3 - 253 .LVL26: - 139:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** bufferIndex += 16; - 254 .loc 1 139 0 - 255 0074 1035 adds r5, r5, #16 - 256 .LVL27: - 257 0076 EDB2 uxtb r5, r5 - 258 .LVL28: - 259 .L5: - ARM GAS /tmp/ccDkMnY2.s page 8 - - - 129:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 260 .loc 1 129 0 - 261 0078 4346 mov r3, r8 - 262 007a 0F2B cmp r3, #15 - 263 007c 09D9 bls .L12 - 131:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** ctr++; - 264 .loc 1 131 0 - 265 007e 1348 ldr r0, .L14+4 - 266 0080 C673 strb r6, [r0, #15] - 132:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_encrypt( aBlock, sBlock, &AesContext ); - 267 .loc 1 132 0 - 268 0082 0136 adds r6, r6, #1 - 269 .LVL29: - 270 0084 B6B2 uxth r6, r6 - 271 .LVL30: - 133:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** for( i = 0; i < 16; i++ ) - 272 .loc 1 133 0 - 273 0086 104A ldr r2, .L14 - 274 0088 1149 ldr r1, .L14+8 - 275 008a FFF7FEFF bl aes_encrypt - 276 .LVL31: - 134:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 277 .loc 1 134 0 - 278 008e 0023 movs r3, #0 - 279 0090 EAE7 b .L6 - 280 .LVL32: - 281 .L12: - 140:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 141:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 142:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** if( size > 0 ) - 282 .loc 1 142 0 - 283 0092 002B cmp r3, #0 - 284 0094 04D1 bne .L13 - 285 .L4: - 143:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 144:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aBlock[15] = ( ( ctr ) & 0xFF ); - 145:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_encrypt( aBlock, sBlock, &AesContext ); - 146:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** for( i = 0; i < size; i++ ) - 147:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 148:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** encBuffer[bufferIndex + i] = buffer[bufferIndex + i] ^ sBlock[i]; - 149:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 150:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 151:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 286 .loc 1 151 0 - 287 0096 03B0 add sp, sp, #12 - 288 @ sp needed - 289 .LVL33: - 290 .LVL34: - 291 .LVL35: - 292 .LVL36: - 293 0098 0CBC pop {r2, r3} - 294 009a 9046 mov r8, r2 - 295 009c 9B46 mov fp, r3 - 296 009e F0BD pop {r4, r5, r6, r7, pc} - 297 .LVL37: - 298 .L13: - 144:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_encrypt( aBlock, sBlock, &AesContext ); - ARM GAS /tmp/ccDkMnY2.s page 9 - - - 299 .loc 1 144 0 - 300 00a0 0A48 ldr r0, .L14+4 - 301 00a2 C673 strb r6, [r0, #15] - 145:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** for( i = 0; i < size; i++ ) - 302 .loc 1 145 0 - 303 00a4 084A ldr r2, .L14 - 304 00a6 0A49 ldr r1, .L14+8 - 305 00a8 FFF7FEFF bl aes_encrypt - 306 .LVL38: - 146:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 307 .loc 1 146 0 - 308 00ac 0023 movs r3, #0 - 309 00ae 07E0 b .L10 - 310 .LVL39: - 311 .L11: - 148:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 312 .loc 1 148 0 discriminator 3 - 313 00b0 E918 adds r1, r5, r3 - 314 00b2 625C ldrb r2, [r4, r1] - 315 00b4 0648 ldr r0, .L14+8 - 316 00b6 C05C ldrb r0, [r0, r3] - 317 00b8 4240 eors r2, r0 - 318 00ba 7A54 strb r2, [r7, r1] - 146:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 319 .loc 1 146 0 discriminator 3 - 320 00bc 0133 adds r3, r3, #1 - 321 .LVL40: - 322 00be 9BB2 uxth r3, r3 - 323 .LVL41: - 324 .L10: - 146:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 325 .loc 1 146 0 is_stmt 0 discriminator 1 - 326 00c0 9845 cmp r8, r3 - 327 00c2 F5D8 bhi .L11 - 328 00c4 E7E7 b .L4 - 329 .L15: - 330 00c6 C046 .align 2 - 331 .L14: - 332 00c8 00000000 .word AesContext - 333 00cc 00000000 .word .LANCHOR2 - 334 00d0 00000000 .word .LANCHOR3 - 335 .cfi_endproc - 336 .LFE83: - 338 .section .text.LoRaMacPayloadDecrypt,"ax",%progbits - 339 .align 1 - 340 .global LoRaMacPayloadDecrypt - 341 .syntax unified - 342 .code 16 - 343 .thumb_func - 344 .fpu softvfp - 346 LoRaMacPayloadDecrypt: - 347 .LFB84: - 152:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 153:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** void LoRaMacPayloadDecrypt( const uint8_t *buffer, uint16_t size, const uint8_t *key, uint32_t addr - 154:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 348 .loc 1 154 0 is_stmt 1 - 349 .cfi_startproc - ARM GAS /tmp/ccDkMnY2.s page 10 - - - 350 @ args = 12, pretend = 0, frame = 0 - 351 @ frame_needed = 0, uses_anonymous_args = 0 - 352 .LVL42: - 353 0000 30B5 push {r4, r5, lr} - 354 .LCFI5: - 355 .cfi_def_cfa_offset 12 - 356 .cfi_offset 4, -12 - 357 .cfi_offset 5, -8 - 358 .cfi_offset 14, -4 - 359 0002 85B0 sub sp, sp, #20 - 360 .LCFI6: - 361 .cfi_def_cfa_offset 32 - 362 0004 08AC add r4, sp, #32 - 363 .LVL43: - 364 0006 2478 ldrb r4, [r4] - 365 .LVL44: - 155:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** LoRaMacPayloadEncrypt( buffer, size, key, address, dir, sequenceCounter, decBuffer ); - 366 .loc 1 155 0 - 367 0008 0A9D ldr r5, [sp, #40] - 368 000a 0295 str r5, [sp, #8] - 369 000c 099D ldr r5, [sp, #36] - 370 000e 0195 str r5, [sp, #4] - 371 0010 0094 str r4, [sp] - 372 0012 FFF7FEFF bl LoRaMacPayloadEncrypt - 373 .LVL45: - 156:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 374 .loc 1 156 0 - 375 0016 05B0 add sp, sp, #20 - 376 @ sp needed - 377 0018 30BD pop {r4, r5, pc} - 378 .cfi_endproc - 379 .LFE84: - 381 .section .text.LoRaMacJoinComputeMic,"ax",%progbits - 382 .align 1 - 383 .global LoRaMacJoinComputeMic - 384 .syntax unified - 385 .code 16 - 386 .thumb_func - 387 .fpu softvfp - 389 LoRaMacJoinComputeMic: - 390 .LFB85: - 157:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 158:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** void LoRaMacJoinComputeMic( const uint8_t *buffer, uint16_t size, const uint8_t *key, uint32_t *mic - 159:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 391 .loc 1 159 0 - 392 .cfi_startproc - 393 @ args = 0, pretend = 0, frame = 8 - 394 @ frame_needed = 0, uses_anonymous_args = 0 - 395 .LVL46: - 396 0000 F0B5 push {r4, r5, r6, r7, lr} - 397 .LCFI7: - 398 .cfi_def_cfa_offset 20 - 399 .cfi_offset 4, -20 - 400 .cfi_offset 5, -16 - 401 .cfi_offset 6, -12 - 402 .cfi_offset 7, -8 - 403 .cfi_offset 14, -4 - ARM GAS /tmp/ccDkMnY2.s page 11 - - - 404 0002 83B0 sub sp, sp, #12 - 405 .LCFI8: - 406 .cfi_def_cfa_offset 32 - 407 0004 0190 str r0, [sp, #4] - 408 0006 0C00 movs r4, r1 - 409 0008 1700 movs r7, r2 - 410 000a 1E00 movs r6, r3 - 160:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** AES_CMAC_Init( AesCmacCtx ); - 411 .loc 1 160 0 - 412 000c 0F4D ldr r5, .L18 - 413 000e 2800 movs r0, r5 - 414 .LVL47: - 415 0010 FFF7FEFF bl AES_CMAC_Init - 416 .LVL48: - 161:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 162:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** AES_CMAC_SetKey( AesCmacCtx, key ); - 417 .loc 1 162 0 - 418 0014 3900 movs r1, r7 - 419 0016 2800 movs r0, r5 - 420 0018 FFF7FEFF bl AES_CMAC_SetKey - 421 .LVL49: - 163:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 164:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** AES_CMAC_Update( AesCmacCtx, buffer, size & 0xFF ); - 422 .loc 1 164 0 - 423 001c FF22 movs r2, #255 - 424 001e 2240 ands r2, r4 - 425 0020 0199 ldr r1, [sp, #4] - 426 0022 2800 movs r0, r5 - 427 0024 FFF7FEFF bl AES_CMAC_Update - 428 .LVL50: - 165:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 166:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** AES_CMAC_Final( Mic, AesCmacCtx ); - 429 .loc 1 166 0 - 430 0028 094C ldr r4, .L18+4 - 431 002a 2900 movs r1, r5 - 432 002c 2000 movs r0, r4 - 433 002e FFF7FEFF bl AES_CMAC_Final - 434 .LVL51: - 167:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 168:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** *mic = ( uint32_t )( ( uint32_t )Mic[3] << 24 | ( uint32_t )Mic[2] << 16 | ( uint32_t )Mic[1] < - 435 .loc 1 168 0 - 436 0032 E378 ldrb r3, [r4, #3] - 437 0034 1B06 lsls r3, r3, #24 - 438 0036 A278 ldrb r2, [r4, #2] - 439 0038 1204 lsls r2, r2, #16 - 440 003a 1343 orrs r3, r2 - 441 003c 6278 ldrb r2, [r4, #1] - 442 003e 1202 lsls r2, r2, #8 - 443 0040 1343 orrs r3, r2 - 444 0042 2278 ldrb r2, [r4] - 445 0044 1343 orrs r3, r2 - 446 0046 3360 str r3, [r6] - 169:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 447 .loc 1 169 0 - 448 0048 03B0 add sp, sp, #12 - 449 @ sp needed - 450 .LVL52: - ARM GAS /tmp/ccDkMnY2.s page 12 - - - 451 .LVL53: - 452 004a F0BD pop {r4, r5, r6, r7, pc} - 453 .L19: - 454 .align 2 - 455 .L18: - 456 004c 00000000 .word AesCmacCtx - 457 0050 00000000 .word .LANCHOR1 - 458 .cfi_endproc - 459 .LFE85: - 461 .section .text.LoRaMacJoinDecrypt,"ax",%progbits - 462 .align 1 - 463 .global LoRaMacJoinDecrypt - 464 .syntax unified - 465 .code 16 - 466 .thumb_func - 467 .fpu softvfp - 469 LoRaMacJoinDecrypt: - 470 .LFB86: - 170:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 171:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** void LoRaMacJoinDecrypt( const uint8_t *buffer, uint16_t size, const uint8_t *key, uint8_t *decBuff - 172:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 471 .loc 1 172 0 - 472 .cfi_startproc - 473 @ args = 0, pretend = 0, frame = 8 - 474 @ frame_needed = 0, uses_anonymous_args = 0 - 475 .LVL54: - 476 0000 F0B5 push {r4, r5, r6, r7, lr} - 477 .LCFI9: - 478 .cfi_def_cfa_offset 20 - 479 .cfi_offset 4, -20 - 480 .cfi_offset 5, -16 - 481 .cfi_offset 6, -12 - 482 .cfi_offset 7, -8 - 483 .cfi_offset 14, -4 - 484 0002 83B0 sub sp, sp, #12 - 485 .LCFI10: - 486 .cfi_def_cfa_offset 32 - 487 0004 0500 movs r5, r0 - 488 0006 0F00 movs r7, r1 - 489 0008 0192 str r2, [sp, #4] - 490 000a 1E00 movs r6, r3 - 173:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** memset1( AesContext.ksch, '\0', 240 ); - 491 .loc 1 173 0 - 492 000c 0D4C ldr r4, .L23 - 493 000e F022 movs r2, #240 - 494 .LVL55: - 495 0010 0021 movs r1, #0 - 496 .LVL56: - 497 0012 2000 movs r0, r4 - 498 .LVL57: - 499 0014 FFF7FEFF bl memset1 - 500 .LVL58: - 174:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_set_key( key, 16, &AesContext ); - 501 .loc 1 174 0 - 502 0018 2200 movs r2, r4 - 503 001a 1021 movs r1, #16 - 504 001c 0198 ldr r0, [sp, #4] - ARM GAS /tmp/ccDkMnY2.s page 13 - - - 505 001e FFF7FEFF bl aes_set_key - 506 .LVL59: - 175:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_encrypt( buffer, decBuffer, &AesContext ); - 507 .loc 1 175 0 - 508 0022 2200 movs r2, r4 - 509 0024 3100 movs r1, r6 - 510 0026 2800 movs r0, r5 - 511 0028 FFF7FEFF bl aes_encrypt - 512 .LVL60: - 176:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** // Check if optional CFList is included - 177:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** if( size >= 16 ) - 513 .loc 1 177 0 - 514 002c 0F2F cmp r7, #15 - 515 002e 01D8 bhi .L22 - 516 .L20: - 178:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 179:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_encrypt( buffer + 16, decBuffer + 16, &AesContext ); - 180:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 181:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 517 .loc 1 181 0 - 518 0030 03B0 add sp, sp, #12 - 519 @ sp needed - 520 .LVL61: - 521 .LVL62: - 522 0032 F0BD pop {r4, r5, r6, r7, pc} - 523 .LVL63: - 524 .L22: - 179:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 525 .loc 1 179 0 - 526 0034 3100 movs r1, r6 - 527 0036 1031 adds r1, r1, #16 - 528 0038 2800 movs r0, r5 - 529 003a 1030 adds r0, r0, #16 - 530 003c 014A ldr r2, .L23 - 531 003e FFF7FEFF bl aes_encrypt - 532 .LVL64: - 533 .loc 1 181 0 - 534 0042 F5E7 b .L20 - 535 .L24: - 536 .align 2 - 537 .L23: - 538 0044 00000000 .word AesContext - 539 .cfi_endproc - 540 .LFE86: - 542 .section .text.LoRaMacJoinComputeSKeys,"ax",%progbits - 543 .align 1 - 544 .global LoRaMacJoinComputeSKeys - 545 .syntax unified - 546 .code 16 - 547 .thumb_func - 548 .fpu softvfp - 550 LoRaMacJoinComputeSKeys: - 551 .LFB87: - 182:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 183:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** void LoRaMacJoinComputeSKeys( const uint8_t *key, const uint8_t *appNonce, uint16_t devNonce, uint8 - 184:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** { - 552 .loc 1 184 0 - ARM GAS /tmp/ccDkMnY2.s page 14 - - - 553 .cfi_startproc - 554 @ args = 4, pretend = 0, frame = 24 - 555 @ frame_needed = 0, uses_anonymous_args = 0 - 556 .LVL65: - 557 0000 F0B5 push {r4, r5, r6, r7, lr} - 558 .LCFI11: - 559 .cfi_def_cfa_offset 20 - 560 .cfi_offset 4, -20 - 561 .cfi_offset 5, -16 - 562 .cfi_offset 6, -12 - 563 .cfi_offset 7, -8 - 564 .cfi_offset 14, -4 - 565 0002 87B0 sub sp, sp, #28 - 566 .LCFI12: - 567 .cfi_def_cfa_offset 48 - 568 0004 0400 movs r4, r0 - 569 0006 0E00 movs r6, r1 - 570 0008 0093 str r3, [sp] - 571 000a 6846 mov r0, sp - 572 .LVL66: - 573 000c 871D adds r7, r0, #6 - 574 000e C280 strh r2, [r0, #6] - 575 .LVL67: - 185:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** uint8_t nonce[16]; - 186:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** uint8_t *pDevNonce = ( uint8_t * )&devNonce; - 187:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 188:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** memset1( AesContext.ksch, '\0', 240 ); - 576 .loc 1 188 0 - 577 0010 1F4D ldr r5, .L26 - 578 0012 F022 movs r2, #240 - 579 .LVL68: - 580 0014 0021 movs r1, #0 - 581 .LVL69: - 582 0016 2800 movs r0, r5 - 583 0018 FFF7FEFF bl memset1 - 584 .LVL70: - 189:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_set_key( key, 16, &AesContext ); - 585 .loc 1 189 0 - 586 001c 2A00 movs r2, r5 - 587 001e 1021 movs r1, #16 - 588 0020 2000 movs r0, r4 - 589 0022 FFF7FEFF bl aes_set_key - 590 .LVL71: - 190:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 191:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** memset1( nonce, 0, sizeof( nonce ) ); - 591 .loc 1 191 0 - 592 0026 02AC add r4, sp, #8 - 593 .LVL72: - 594 0028 1022 movs r2, #16 - 595 002a 0021 movs r1, #0 - 596 002c 2000 movs r0, r4 - 597 002e FFF7FEFF bl memset1 - 598 .LVL73: - 192:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** nonce[0] = 0x01; - 599 .loc 1 192 0 - 600 0032 0123 movs r3, #1 - 601 0034 2370 strb r3, [r4] - ARM GAS /tmp/ccDkMnY2.s page 15 - - - 193:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** memcpy1( nonce + 1, appNonce, 6 ); - 602 .loc 1 193 0 - 603 0036 0622 movs r2, #6 - 604 0038 3100 movs r1, r6 - 605 003a 0920 movs r0, #9 - 606 003c 6844 add r0, r0, sp - 607 003e FFF7FEFF bl memcpy1 - 608 .LVL74: - 194:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** memcpy1( nonce + 7, pDevNonce, 2 ); - 609 .loc 1 194 0 - 610 0042 0222 movs r2, #2 - 611 0044 3900 movs r1, r7 - 612 0046 0F20 movs r0, #15 - 613 0048 6844 add r0, r0, sp - 614 004a FFF7FEFF bl memcpy1 - 615 .LVL75: - 195:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_encrypt( nonce, nwkSKey, &AesContext ); - 616 .loc 1 195 0 - 617 004e 2A00 movs r2, r5 - 618 0050 0099 ldr r1, [sp] - 619 0052 2000 movs r0, r4 - 620 0054 FFF7FEFF bl aes_encrypt - 621 .LVL76: - 196:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** - 197:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** memset1( nonce, 0, sizeof( nonce ) ); - 622 .loc 1 197 0 - 623 0058 1022 movs r2, #16 - 624 005a 0021 movs r1, #0 - 625 005c 2000 movs r0, r4 - 626 005e FFF7FEFF bl memset1 - 627 .LVL77: - 198:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** nonce[0] = 0x02; - 628 .loc 1 198 0 - 629 0062 0223 movs r3, #2 - 630 0064 2370 strb r3, [r4] - 199:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** memcpy1( nonce + 1, appNonce, 6 ); - 631 .loc 1 199 0 - 632 0066 0622 movs r2, #6 - 633 0068 3100 movs r1, r6 - 634 006a 0733 adds r3, r3, #7 - 635 006c 6B44 add r3, r3, sp - 636 006e 1800 movs r0, r3 - 637 0070 FFF7FEFF bl memcpy1 - 638 .LVL78: - 200:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** memcpy1( nonce + 7, pDevNonce, 2 ); - 639 .loc 1 200 0 - 640 0074 0222 movs r2, #2 - 641 0076 3900 movs r1, r7 - 642 0078 0F23 movs r3, #15 - 643 007a 6B44 add r3, r3, sp - 644 007c 1800 movs r0, r3 - 645 007e FFF7FEFF bl memcpy1 - 646 .LVL79: - 201:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** aes_encrypt( nonce, appSKey, &AesContext ); - 647 .loc 1 201 0 - 648 0082 2A00 movs r2, r5 - 649 0084 0C99 ldr r1, [sp, #48] - ARM GAS /tmp/ccDkMnY2.s page 16 - - - 650 0086 2000 movs r0, r4 - 651 0088 FFF7FEFF bl aes_encrypt - 652 .LVL80: - 202:./Middlewares/Third_Party/Lora/Mac/LoRaMacCrypto.c **** } - 653 .loc 1 202 0 - 654 008c 07B0 add sp, sp, #28 - 655 .LVL81: - 656 @ sp needed - 657 .LVL82: - 658 .LVL83: - 659 008e F0BD pop {r4, r5, r6, r7, pc} - 660 .L27: - 661 .align 2 - 662 .L26: - 663 0090 00000000 .word AesContext - 664 .cfi_endproc - 665 .LFE87: - 667 .section .bss.AesCmacCtx,"aw",%nobits - 668 .align 2 - 671 AesCmacCtx: - 672 0000 00000000 .space 280 - 672 00000000 - 672 00000000 - 672 00000000 - 672 00000000 - 673 .section .bss.AesContext,"aw",%nobits - 674 .align 2 - 677 AesContext: - 678 0000 00000000 .space 241 - 678 00000000 - 678 00000000 - 678 00000000 - 678 00000000 - 679 .section .bss.Mic,"aw",%nobits - 680 .align 2 - 681 .set .LANCHOR1,. + 0 - 684 Mic: - 685 0000 00000000 .space 16 - 685 00000000 - 685 00000000 - 685 00000000 - 686 .section .bss.sBlock,"aw",%nobits - 687 .align 2 - 688 .set .LANCHOR3,. + 0 - 691 sBlock: - 692 0000 00000000 .space 16 - 692 00000000 - 692 00000000 - 692 00000000 - 693 .section .data.MicBlockB0,"aw",%progbits - 694 .align 2 - 695 .set .LANCHOR0,. + 0 - 698 MicBlockB0: - 699 0000 49 .byte 73 - 700 0001 00 .byte 0 - 701 0002 00 .byte 0 - 702 0003 00 .byte 0 - ARM GAS /tmp/ccDkMnY2.s page 17 - - - 703 0004 00 .byte 0 - 704 0005 00 .byte 0 - 705 0006 00 .byte 0 - 706 0007 00 .byte 0 - 707 0008 00 .byte 0 - 708 0009 00 .byte 0 - 709 000a 00 .byte 0 - 710 000b 00 .byte 0 - 711 000c 00 .byte 0 - 712 000d 00 .byte 0 - 713 000e 00 .byte 0 - 714 000f 00 .byte 0 - 715 .section .data.aBlock,"aw",%progbits - 716 .align 2 - 717 .set .LANCHOR2,. + 0 - 720 aBlock: - 721 0000 01 .byte 1 - 722 0001 00 .byte 0 - 723 0002 00 .byte 0 - 724 0003 00 .byte 0 - 725 0004 00 .byte 0 - 726 0005 00 .byte 0 - 727 0006 00 .byte 0 - 728 0007 00 .byte 0 - 729 0008 00 .byte 0 - 730 0009 00 .byte 0 - 731 000a 00 .byte 0 - 732 000b 00 .byte 0 - 733 000c 00 .byte 0 - 734 000d 00 .byte 0 - 735 000e 00 .byte 0 - 736 000f 00 .byte 0 - 737 .text - 738 .Letext0: - 739 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 740 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 741 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 742 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 743 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 744 .file 7 "/usr/arm-none-eabi/include/stdlib.h" - 745 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h" - 746 .file 9 "/usr/arm-none-eabi/include/math.h" - 747 .file 10 "Middlewares/Third_Party/Lora/Crypto/aes.h" - 748 .file 11 "Middlewares/Third_Party/Lora/Crypto/cmac.h" - 749 .file 12 "Middlewares/Third_Party/Lora/Utilities/utilities.h" - ARM GAS /tmp/ccDkMnY2.s page 18 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 LoRaMacCrypto.c - /tmp/ccDkMnY2.s:16 .text.LoRaMacComputeMic:0000000000000000 $t - /tmp/ccDkMnY2.s:23 .text.LoRaMacComputeMic:0000000000000000 LoRaMacComputeMic - /tmp/ccDkMnY2.s:130 .text.LoRaMacComputeMic:0000000000000080 $d - /tmp/ccDkMnY2.s:671 .bss.AesCmacCtx:0000000000000000 AesCmacCtx - /tmp/ccDkMnY2.s:137 .text.LoRaMacPayloadEncrypt:0000000000000000 $t - /tmp/ccDkMnY2.s:144 .text.LoRaMacPayloadEncrypt:0000000000000000 LoRaMacPayloadEncrypt - /tmp/ccDkMnY2.s:332 .text.LoRaMacPayloadEncrypt:00000000000000c8 $d - /tmp/ccDkMnY2.s:677 .bss.AesContext:0000000000000000 AesContext - /tmp/ccDkMnY2.s:339 .text.LoRaMacPayloadDecrypt:0000000000000000 $t - /tmp/ccDkMnY2.s:346 .text.LoRaMacPayloadDecrypt:0000000000000000 LoRaMacPayloadDecrypt - /tmp/ccDkMnY2.s:382 .text.LoRaMacJoinComputeMic:0000000000000000 $t - /tmp/ccDkMnY2.s:389 .text.LoRaMacJoinComputeMic:0000000000000000 LoRaMacJoinComputeMic - /tmp/ccDkMnY2.s:456 .text.LoRaMacJoinComputeMic:000000000000004c $d - /tmp/ccDkMnY2.s:462 .text.LoRaMacJoinDecrypt:0000000000000000 $t - /tmp/ccDkMnY2.s:469 .text.LoRaMacJoinDecrypt:0000000000000000 LoRaMacJoinDecrypt - /tmp/ccDkMnY2.s:538 .text.LoRaMacJoinDecrypt:0000000000000044 $d - /tmp/ccDkMnY2.s:543 .text.LoRaMacJoinComputeSKeys:0000000000000000 $t - /tmp/ccDkMnY2.s:550 .text.LoRaMacJoinComputeSKeys:0000000000000000 LoRaMacJoinComputeSKeys - /tmp/ccDkMnY2.s:663 .text.LoRaMacJoinComputeSKeys:0000000000000090 $d - /tmp/ccDkMnY2.s:668 .bss.AesCmacCtx:0000000000000000 $d - /tmp/ccDkMnY2.s:674 .bss.AesContext:0000000000000000 $d - /tmp/ccDkMnY2.s:680 .bss.Mic:0000000000000000 $d - /tmp/ccDkMnY2.s:684 .bss.Mic:0000000000000000 Mic - /tmp/ccDkMnY2.s:687 .bss.sBlock:0000000000000000 $d - /tmp/ccDkMnY2.s:691 .bss.sBlock:0000000000000000 sBlock - /tmp/ccDkMnY2.s:694 .data.MicBlockB0:0000000000000000 $d - /tmp/ccDkMnY2.s:698 .data.MicBlockB0:0000000000000000 MicBlockB0 - /tmp/ccDkMnY2.s:716 .data.aBlock:0000000000000000 $d - /tmp/ccDkMnY2.s:720 .data.aBlock:0000000000000000 aBlock - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -AES_CMAC_Init -AES_CMAC_SetKey -AES_CMAC_Update -AES_CMAC_Final -memset1 -aes_set_key -aes_encrypt -memcpy1 diff --git a/build/Region.d b/build/Region.d deleted file mode 100644 index b00fb95..0000000 --- a/build/Region.d +++ /dev/null @@ -1,34 +0,0 @@ -build/Region.d: Middlewares/Third_Party/Lora/Mac/region/Region.c \ - Middlewares/Third_Party/Lora/Mac/timer.h \ - Middlewares/Third_Party/Lora/Utilities/timeServer.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Middlewares/Third_Party/Lora/Mac/LoRaMac.h \ - Middlewares/Third_Party/Lora/Mac/region/Region.h \ - Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h - -Middlewares/Third_Party/Lora/Mac/timer.h: - -Middlewares/Third_Party/Lora/Utilities/timeServer.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMac.h: - -Middlewares/Third_Party/Lora/Mac/region/Region.h: - -Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h: diff --git a/build/Region.lst b/build/Region.lst deleted file mode 100644 index f38f42d..0000000 --- a/build/Region.lst +++ /dev/null @@ -1,2208 +0,0 @@ -ARM GAS /tmp/cciGOlRU.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "Region.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.RegionIsActive,"ax",%progbits - 16 .align 1 - 17 .global RegionIsActive - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 RegionIsActive: - 24 .LFB82: - 25 .file 1 "./Middlewares/Third_Party/Lora/Mac/region/Region.c" - 1:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** /* - 2:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** / _____) _ | | - 3:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** (C)2013 Semtech - 8:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** ___ _____ _ ___ _ _____ ___ ___ ___ ___ - 9:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** / __|_ _/_\ / __| |/ / __/ _ \| _ \/ __| __| - 10:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** \__ \ | |/ _ \ (__| ' <| _| (_) | / (__| _| - 11:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** |___/ |_/_/ \_\___|_|\_\_| \___/|_|_\\___|___| - 12:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** embedded.connectivity.solutions=============== - 13:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 14:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** Description: LoRa MAC region implementation - 15:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 16:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 17:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 18:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** Maintainer: Miguel Luis ( Semtech ), Gregory Cristian ( Semtech ) and Daniel Jaeckle ( STACKFORCE ) - 19:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** */ - 20:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include - 21:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include - 22:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include - 23:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 24:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "timer.h" - 25:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "LoRaMac.h" - 26:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 27:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 28:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 29:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** // Regional includes - 30:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "Region.h" - 31:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 32:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 33:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - ARM GAS /tmp/cciGOlRU.s page 2 - - - 34:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** // Setup regions - 35:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_AS923 - 36:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionAS923.h" - 37:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_CASE case LORAMAC_REGION_AS923: - 38:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_IS_ACTIVE( ) AS923_CASE { return true; } - 39:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_GET_PHY_PARAM( ) AS923_CASE { return RegionAS923GetPhyParam( getP - 40:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_SET_BAND_TX_DONE( ) AS923_CASE { RegionAS923SetBandTxDone( txDone ); - 41:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_INIT_DEFAULTS( ) AS923_CASE { RegionAS923InitDefaults( type ); br - 42:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_VERIFY( ) AS923_CASE { return RegionAS923Verify( verify, p - 43:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_APPLY_CF_LIST( ) AS923_CASE { RegionAS923ApplyCFList( applyCFList - 44:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_CHAN_MASK_SET( ) AS923_CASE { return RegionAS923ChanMaskSet( chan - 45:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_ADR_NEXT( ) AS923_CASE { return RegionAS923AdrNext( adrNext, - 46:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_COMPUTE_RX_WINDOW_PARAMETERS( ) AS923_CASE { RegionAS923ComputeRxWindowParameter - 47:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_RX_CONFIG( ) AS923_CASE { return RegionAS923RxConfig( rxConfi - 48:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_TX_CONFIG( ) AS923_CASE { return RegionAS923TxConfig( txConfi - 49:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_LINK_ADR_REQ( ) AS923_CASE { return RegionAS923LinkAdrReq( linkA - 50:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_RX_PARAM_SETUP_REQ( ) AS923_CASE { return RegionAS923RxParamSetupReq( - 51:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_NEW_CHANNEL_REQ( ) AS923_CASE { return RegionAS923NewChannelReq( ne - 52:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_TX_PARAM_SETUP_REQ( ) AS923_CASE { return RegionAS923TxParamSetupReq( - 53:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_DL_CHANNEL_REQ( ) AS923_CASE { return RegionAS923DlChannelReq( dlC - 54:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_ALTERNATE_DR( ) AS923_CASE { return RegionAS923AlternateDr( alte - 55:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_CALC_BACKOFF( ) AS923_CASE { RegionAS923CalcBackOff( calcBackOff - 56:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_NEXT_CHANNEL( ) AS923_CASE { return RegionAS923NextChannel( next - 57:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_CHANNEL_ADD( ) AS923_CASE { return RegionAS923ChannelAdd( chann - 58:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_CHANNEL_REMOVE( ) AS923_CASE { return RegionAS923ChannelsRemove( c - 59:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_SET_CONTINUOUS_WAVE( ) AS923_CASE { RegionAS923SetContinuousWave( conti - 60:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_APPLY_DR_OFFSET( ) AS923_CASE { return RegionAS923ApplyDrOffset( do - 61:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 62:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_IS_ACTIVE( ) - 63:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_GET_PHY_PARAM( ) - 64:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_SET_BAND_TX_DONE( ) - 65:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_INIT_DEFAULTS( ) - 66:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_VERIFY( ) - 67:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_APPLY_CF_LIST( ) - 68:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_CHAN_MASK_SET( ) - 69:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_ADR_NEXT( ) - 70:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_COMPUTE_RX_WINDOW_PARAMETERS( ) - 71:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_RX_CONFIG( ) - 72:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_TX_CONFIG( ) - 73:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_LINK_ADR_REQ( ) - 74:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_RX_PARAM_SETUP_REQ( ) - 75:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_NEW_CHANNEL_REQ( ) - 76:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_TX_PARAM_SETUP_REQ( ) - 77:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_DL_CHANNEL_REQ( ) - 78:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_ALTERNATE_DR( ) - 79:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_CALC_BACKOFF( ) - 80:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_NEXT_CHANNEL( ) - 81:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_CHANNEL_ADD( ) - 82:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_CHANNEL_REMOVE( ) - 83:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_SET_CONTINUOUS_WAVE( ) - 84:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AS923_APPLY_DR_OFFSET( ) - 85:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 86:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 87:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_AU915 - 88:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionAU915.h" - 89:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_CASE case LORAMAC_REGION_AU915: - 90:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_IS_ACTIVE( ) AU915_CASE { return true; } - ARM GAS /tmp/cciGOlRU.s page 3 - - - 91:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_GET_PHY_PARAM( ) AU915_CASE { return RegionAU915GetPhyParam( getP - 92:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_SET_BAND_TX_DONE( ) AU915_CASE { RegionAU915SetBandTxDone( txDone ); - 93:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_INIT_DEFAULTS( ) AU915_CASE { RegionAU915InitDefaults( type ); br - 94:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_VERIFY( ) AU915_CASE { return RegionAU915Verify( verify, p - 95:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_APPLY_CF_LIST( ) AU915_CASE { RegionAU915ApplyCFList( applyCFList - 96:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_CHAN_MASK_SET( ) AU915_CASE { return RegionAU915ChanMaskSet( chan - 97:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_ADR_NEXT( ) AU915_CASE { return RegionAU915AdrNext( adrNext, - 98:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_COMPUTE_RX_WINDOW_PARAMETERS( ) AU915_CASE { RegionAU915ComputeRxWindowParameter - 99:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_RX_CONFIG( ) AU915_CASE { return RegionAU915RxConfig( rxConfi - 100:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_TX_CONFIG( ) AU915_CASE { return RegionAU915TxConfig( txConfi - 101:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_LINK_ADR_REQ( ) AU915_CASE { return RegionAU915LinkAdrReq( linkA - 102:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_RX_PARAM_SETUP_REQ( ) AU915_CASE { return RegionAU915RxParamSetupReq( - 103:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_NEW_CHANNEL_REQ( ) AU915_CASE { return RegionAU915NewChannelReq( ne - 104:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_TX_PARAM_SETUP_REQ( ) AU915_CASE { return RegionAU915TxParamSetupReq( - 105:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_DL_CHANNEL_REQ( ) AU915_CASE { return RegionAU915DlChannelReq( dlC - 106:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_ALTERNATE_DR( ) AU915_CASE { return RegionAU915AlternateDr( alte - 107:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_CALC_BACKOFF( ) AU915_CASE { RegionAU915CalcBackOff( calcBackOff - 108:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_NEXT_CHANNEL( ) AU915_CASE { return RegionAU915NextChannel( next - 109:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_CHANNEL_ADD( ) AU915_CASE { return RegionAU915ChannelAdd( chann - 110:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_CHANNEL_REMOVE( ) AU915_CASE { return RegionAU915ChannelsRemove( c - 111:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_SET_CONTINUOUS_WAVE( ) AU915_CASE { RegionAU915SetContinuousWave( conti - 112:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_APPLY_DR_OFFSET( ) AU915_CASE { return RegionAU915ApplyDrOffset( do - 113:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 114:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_IS_ACTIVE( ) - 115:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_GET_PHY_PARAM( ) - 116:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_SET_BAND_TX_DONE( ) - 117:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_INIT_DEFAULTS( ) - 118:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_VERIFY( ) - 119:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_APPLY_CF_LIST( ) - 120:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_CHAN_MASK_SET( ) - 121:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_ADR_NEXT( ) - 122:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_COMPUTE_RX_WINDOW_PARAMETERS( ) - 123:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_RX_CONFIG( ) - 124:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_TX_CONFIG( ) - 125:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_LINK_ADR_REQ( ) - 126:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_RX_PARAM_SETUP_REQ( ) - 127:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_NEW_CHANNEL_REQ( ) - 128:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_TX_PARAM_SETUP_REQ( ) - 129:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_DL_CHANNEL_REQ( ) - 130:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_ALTERNATE_DR( ) - 131:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_CALC_BACKOFF( ) - 132:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_NEXT_CHANNEL( ) - 133:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_CHANNEL_ADD( ) - 134:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_CHANNEL_REMOVE( ) - 135:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_SET_CONTINUOUS_WAVE( ) - 136:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define AU915_APPLY_DR_OFFSET( ) - 137:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 138:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 139:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_CN470 - 140:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionCN470.h" - 141:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_CASE case LORAMAC_REGION_CN470: - 142:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_IS_ACTIVE( ) CN470_CASE { return true; } - 143:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_GET_PHY_PARAM( ) CN470_CASE { return RegionCN470GetPhyParam( getP - 144:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_SET_BAND_TX_DONE( ) CN470_CASE { RegionCN470SetBandTxDone( txDone ); - 145:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_INIT_DEFAULTS( ) CN470_CASE { RegionCN470InitDefaults( type ); br - 146:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_VERIFY( ) CN470_CASE { return RegionCN470Verify( verify, p - 147:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_APPLY_CF_LIST( ) CN470_CASE { RegionCN470ApplyCFList( applyCFList - ARM GAS /tmp/cciGOlRU.s page 4 - - - 148:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_CHAN_MASK_SET( ) CN470_CASE { return RegionCN470ChanMaskSet( chan - 149:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_ADR_NEXT( ) CN470_CASE { return RegionCN470AdrNext( adrNext, - 150:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_COMPUTE_RX_WINDOW_PARAMETERS( ) CN470_CASE { RegionCN470ComputeRxWindowParameter - 151:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_RX_CONFIG( ) CN470_CASE { return RegionCN470RxConfig( rxConfi - 152:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_TX_CONFIG( ) CN470_CASE { return RegionCN470TxConfig( txConfi - 153:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_LINK_ADR_REQ( ) CN470_CASE { return RegionCN470LinkAdrReq( linkA - 154:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_RX_PARAM_SETUP_REQ( ) CN470_CASE { return RegionCN470RxParamSetupReq( - 155:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_NEW_CHANNEL_REQ( ) CN470_CASE { return RegionCN470NewChannelReq( ne - 156:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_TX_PARAM_SETUP_REQ( ) CN470_CASE { return RegionCN470TxParamSetupReq( - 157:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_DL_CHANNEL_REQ( ) CN470_CASE { return RegionCN470DlChannelReq( dlC - 158:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_ALTERNATE_DR( ) CN470_CASE { return RegionCN470AlternateDr( alte - 159:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_CALC_BACKOFF( ) CN470_CASE { RegionCN470CalcBackOff( calcBackOff - 160:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_NEXT_CHANNEL( ) CN470_CASE { return RegionCN470NextChannel( next - 161:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_CHANNEL_ADD( ) CN470_CASE { return RegionCN470ChannelAdd( chann - 162:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_CHANNEL_REMOVE( ) CN470_CASE { return RegionCN470ChannelsRemove( c - 163:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_SET_CONTINUOUS_WAVE( ) CN470_CASE { RegionCN470SetContinuousWave( conti - 164:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_APPLY_DR_OFFSET( ) CN470_CASE { return RegionCN470ApplyDrOffset( do - 165:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 166:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_IS_ACTIVE( ) - 167:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_GET_PHY_PARAM( ) - 168:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_SET_BAND_TX_DONE( ) - 169:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_INIT_DEFAULTS( ) - 170:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_VERIFY( ) - 171:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_APPLY_CF_LIST( ) - 172:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_CHAN_MASK_SET( ) - 173:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_ADR_NEXT( ) - 174:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_COMPUTE_RX_WINDOW_PARAMETERS( ) - 175:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_RX_CONFIG( ) - 176:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_TX_CONFIG( ) - 177:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_LINK_ADR_REQ( ) - 178:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_RX_PARAM_SETUP_REQ( ) - 179:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_NEW_CHANNEL_REQ( ) - 180:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_TX_PARAM_SETUP_REQ( ) - 181:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_DL_CHANNEL_REQ( ) - 182:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_ALTERNATE_DR( ) - 183:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_CALC_BACKOFF( ) - 184:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_NEXT_CHANNEL( ) - 185:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_CHANNEL_ADD( ) - 186:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_CHANNEL_REMOVE( ) - 187:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_SET_CONTINUOUS_WAVE( ) - 188:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN470_APPLY_DR_OFFSET( ) - 189:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 190:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 191:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_CN779 - 192:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionCN779.h" - 193:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_CASE case LORAMAC_REGION_CN779: - 194:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_IS_ACTIVE( ) CN779_CASE { return true; } - 195:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_GET_PHY_PARAM( ) CN779_CASE { return RegionCN779GetPhyParam( getP - 196:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_SET_BAND_TX_DONE( ) CN779_CASE { RegionCN779SetBandTxDone( txDone ); - 197:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_INIT_DEFAULTS( ) CN779_CASE { RegionCN779InitDefaults( type ); br - 198:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_VERIFY( ) CN779_CASE { return RegionCN779Verify( verify, p - 199:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_APPLY_CF_LIST( ) CN779_CASE { RegionCN779ApplyCFList( applyCFList - 200:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_CHAN_MASK_SET( ) CN779_CASE { return RegionCN779ChanMaskSet( chan - 201:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_ADR_NEXT( ) CN779_CASE { return RegionCN779AdrNext( adrNext, - 202:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_COMPUTE_RX_WINDOW_PARAMETERS( ) CN779_CASE { RegionCN779ComputeRxWindowParameter - 203:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_RX_CONFIG( ) CN779_CASE { return RegionCN779RxConfig( rxConfi - 204:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_TX_CONFIG( ) CN779_CASE { return RegionCN779TxConfig( txConfi - ARM GAS /tmp/cciGOlRU.s page 5 - - - 205:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_LINK_ADR_REQ( ) CN779_CASE { return RegionCN779LinkAdrReq( linkA - 206:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_RX_PARAM_SETUP_REQ( ) CN779_CASE { return RegionCN779RxParamSetupReq( - 207:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_NEW_CHANNEL_REQ( ) CN779_CASE { return RegionCN779NewChannelReq( ne - 208:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_TX_PARAM_SETUP_REQ( ) CN779_CASE { return RegionCN779TxParamSetupReq( - 209:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_DL_CHANNEL_REQ( ) CN779_CASE { return RegionCN779DlChannelReq( dlC - 210:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_ALTERNATE_DR( ) CN779_CASE { return RegionCN779AlternateDr( alte - 211:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_CALC_BACKOFF( ) CN779_CASE { RegionCN779CalcBackOff( calcBackOff - 212:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_NEXT_CHANNEL( ) CN779_CASE { return RegionCN779NextChannel( next - 213:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_CHANNEL_ADD( ) CN779_CASE { return RegionCN779ChannelAdd( chann - 214:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_CHANNEL_REMOVE( ) CN779_CASE { return RegionCN779ChannelsRemove( c - 215:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_SET_CONTINUOUS_WAVE( ) CN779_CASE { RegionCN779SetContinuousWave( conti - 216:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_APPLY_DR_OFFSET( ) CN779_CASE { return RegionCN779ApplyDrOffset( do - 217:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 218:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_IS_ACTIVE( ) - 219:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_GET_PHY_PARAM( ) - 220:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_SET_BAND_TX_DONE( ) - 221:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_INIT_DEFAULTS( ) - 222:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_VERIFY( ) - 223:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_APPLY_CF_LIST( ) - 224:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_CHAN_MASK_SET( ) - 225:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_ADR_NEXT( ) - 226:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_COMPUTE_RX_WINDOW_PARAMETERS( ) - 227:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_RX_CONFIG( ) - 228:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_TX_CONFIG( ) - 229:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_LINK_ADR_REQ( ) - 230:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_RX_PARAM_SETUP_REQ( ) - 231:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_NEW_CHANNEL_REQ( ) - 232:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_TX_PARAM_SETUP_REQ( ) - 233:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_DL_CHANNEL_REQ( ) - 234:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_ALTERNATE_DR( ) - 235:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_CALC_BACKOFF( ) - 236:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_NEXT_CHANNEL( ) - 237:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_CHANNEL_ADD( ) - 238:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_CHANNEL_REMOVE( ) - 239:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_SET_CONTINUOUS_WAVE( ) - 240:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define CN779_APPLY_DR_OFFSET( ) - 241:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 242:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 243:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_EU433 - 244:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionEU433.h" - 245:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_CASE case LORAMAC_REGION_EU433: - 246:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_IS_ACTIVE( ) EU433_CASE { return true; } - 247:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_GET_PHY_PARAM( ) EU433_CASE { return RegionEU433GetPhyParam( getP - 248:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_SET_BAND_TX_DONE( ) EU433_CASE { RegionEU433SetBandTxDone( txDone ); - 249:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_INIT_DEFAULTS( ) EU433_CASE { RegionEU433InitDefaults( type ); br - 250:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_VERIFY( ) EU433_CASE { return RegionEU433Verify( verify, p - 251:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_APPLY_CF_LIST( ) EU433_CASE { RegionEU433ApplyCFList( applyCFList - 252:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_CHAN_MASK_SET( ) EU433_CASE { return RegionEU433ChanMaskSet( chan - 253:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_ADR_NEXT( ) EU433_CASE { return RegionEU433AdrNext( adrNext, - 254:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_COMPUTE_RX_WINDOW_PARAMETERS( ) EU433_CASE { RegionEU433ComputeRxWindowParameter - 255:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_RX_CONFIG( ) EU433_CASE { return RegionEU433RxConfig( rxConfi - 256:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_TX_CONFIG( ) EU433_CASE { return RegionEU433TxConfig( txConfi - 257:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_LINK_ADR_REQ( ) EU433_CASE { return RegionEU433LinkAdrReq( linkA - 258:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_RX_PARAM_SETUP_REQ( ) EU433_CASE { return RegionEU433RxParamSetupReq( - 259:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_NEW_CHANNEL_REQ( ) EU433_CASE { return RegionEU433NewChannelReq( ne - 260:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_TX_PARAM_SETUP_REQ( ) EU433_CASE { return RegionEU433TxParamSetupReq( - 261:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_DL_CHANNEL_REQ( ) EU433_CASE { return RegionEU433DlChannelReq( dlC - ARM GAS /tmp/cciGOlRU.s page 6 - - - 262:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_ALTERNATE_DR( ) EU433_CASE { return RegionEU433AlternateDr( alte - 263:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_CALC_BACKOFF( ) EU433_CASE { RegionEU433CalcBackOff( calcBackOff - 264:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_NEXT_CHANNEL( ) EU433_CASE { return RegionEU433NextChannel( next - 265:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_CHANNEL_ADD( ) EU433_CASE { return RegionEU433ChannelAdd( chann - 266:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_CHANNEL_REMOVE( ) EU433_CASE { return RegionEU433ChannelsRemove( c - 267:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_SET_CONTINUOUS_WAVE( ) EU433_CASE { RegionEU433SetContinuousWave( conti - 268:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_APPLY_DR_OFFSET( ) EU433_CASE { return RegionEU433ApplyDrOffset( do - 269:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 270:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_IS_ACTIVE( ) - 271:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_GET_PHY_PARAM( ) - 272:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_SET_BAND_TX_DONE( ) - 273:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_INIT_DEFAULTS( ) - 274:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_VERIFY( ) - 275:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_APPLY_CF_LIST( ) - 276:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_CHAN_MASK_SET( ) - 277:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_ADR_NEXT( ) - 278:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_COMPUTE_RX_WINDOW_PARAMETERS( ) - 279:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_RX_CONFIG( ) - 280:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_TX_CONFIG( ) - 281:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_LINK_ADR_REQ( ) - 282:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_RX_PARAM_SETUP_REQ( ) - 283:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_NEW_CHANNEL_REQ( ) - 284:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_TX_PARAM_SETUP_REQ( ) - 285:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_DL_CHANNEL_REQ( ) - 286:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_ALTERNATE_DR( ) - 287:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_CALC_BACKOFF( ) - 288:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_NEXT_CHANNEL( ) - 289:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_CHANNEL_ADD( ) - 290:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_CHANNEL_REMOVE( ) - 291:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_SET_CONTINUOUS_WAVE( ) - 292:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU433_APPLY_DR_OFFSET( ) - 293:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 294:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 295:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_EU868 - 296:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionEU868.h" - 297:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_CASE case LORAMAC_REGION_EU868: - 298:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_IS_ACTIVE( ) EU868_CASE { return true; } - 299:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_GET_PHY_PARAM( ) EU868_CASE { return RegionEU868GetPhyParam( getP - 300:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_SET_BAND_TX_DONE( ) EU868_CASE { RegionEU868SetBandTxDone( txDone ); - 301:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_INIT_DEFAULTS( ) EU868_CASE { RegionEU868InitDefaults( type ); br - 302:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_VERIFY( ) EU868_CASE { return RegionEU868Verify( verify, p - 303:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_APPLY_CF_LIST( ) EU868_CASE { RegionEU868ApplyCFList( applyCFList - 304:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_CHAN_MASK_SET( ) EU868_CASE { return RegionEU868ChanMaskSet( chan - 305:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_ADR_NEXT( ) EU868_CASE { return RegionEU868AdrNext( adrNext, - 306:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_COMPUTE_RX_WINDOW_PARAMETERS( ) EU868_CASE { RegionEU868ComputeRxWindowParameter - 307:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_RX_CONFIG( ) EU868_CASE { return RegionEU868RxConfig( rxConfi - 308:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_TX_CONFIG( ) EU868_CASE { return RegionEU868TxConfig( txConfi - 309:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_LINK_ADR_REQ( ) EU868_CASE { return RegionEU868LinkAdrReq( linkA - 310:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_RX_PARAM_SETUP_REQ( ) EU868_CASE { return RegionEU868RxParamSetupReq( - 311:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_NEW_CHANNEL_REQ( ) EU868_CASE { return RegionEU868NewChannelReq( ne - 312:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_TX_PARAM_SETUP_REQ( ) EU868_CASE { return RegionEU868TxParamSetupReq( - 313:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_DL_CHANNEL_REQ( ) EU868_CASE { return RegionEU868DlChannelReq( dlC - 314:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_ALTERNATE_DR( ) EU868_CASE { return RegionEU868AlternateDr( alte - 315:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_CALC_BACKOFF( ) EU868_CASE { RegionEU868CalcBackOff( calcBackOff - 316:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_NEXT_CHANNEL( ) EU868_CASE { return RegionEU868NextChannel( next - 317:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_CHANNEL_ADD( ) EU868_CASE { return RegionEU868ChannelAdd( chann - 318:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_CHANNEL_REMOVE( ) EU868_CASE { return RegionEU868ChannelsRemove( c - ARM GAS /tmp/cciGOlRU.s page 7 - - - 319:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_SET_CONTINUOUS_WAVE( ) EU868_CASE { RegionEU868SetContinuousWave( conti - 320:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_APPLY_DR_OFFSET( ) EU868_CASE { return RegionEU868ApplyDrOffset( do - 321:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 322:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_IS_ACTIVE( ) - 323:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_GET_PHY_PARAM( ) - 324:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_SET_BAND_TX_DONE( ) - 325:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_INIT_DEFAULTS( ) - 326:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_VERIFY( ) - 327:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_APPLY_CF_LIST( ) - 328:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_CHAN_MASK_SET( ) - 329:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_ADR_NEXT( ) - 330:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_COMPUTE_RX_WINDOW_PARAMETERS( ) - 331:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_RX_CONFIG( ) - 332:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_TX_CONFIG( ) - 333:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_LINK_ADR_REQ( ) - 334:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_RX_PARAM_SETUP_REQ( ) - 335:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_NEW_CHANNEL_REQ( ) - 336:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_TX_PARAM_SETUP_REQ( ) - 337:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_DL_CHANNEL_REQ( ) - 338:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_ALTERNATE_DR( ) - 339:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_CALC_BACKOFF( ) - 340:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_NEXT_CHANNEL( ) - 341:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_CHANNEL_ADD( ) - 342:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_CHANNEL_REMOVE( ) - 343:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_SET_CONTINUOUS_WAVE( ) - 344:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define EU868_APPLY_DR_OFFSET( ) - 345:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 346:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 347:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_KR920 - 348:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionKR920.h" - 349:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_CASE case LORAMAC_REGION_KR920: - 350:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_IS_ACTIVE( ) KR920_CASE { return true; } - 351:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_GET_PHY_PARAM( ) KR920_CASE { return RegionKR920GetPhyParam( getP - 352:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_SET_BAND_TX_DONE( ) KR920_CASE { RegionKR920SetBandTxDone( txDone ); - 353:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_INIT_DEFAULTS( ) KR920_CASE { RegionKR920InitDefaults( type ); br - 354:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_VERIFY( ) KR920_CASE { return RegionKR920Verify( verify, p - 355:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_APPLY_CF_LIST( ) KR920_CASE { RegionKR920ApplyCFList( applyCFList - 356:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_CHAN_MASK_SET( ) KR920_CASE { return RegionKR920ChanMaskSet( chan - 357:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_ADR_NEXT( ) KR920_CASE { return RegionKR920AdrNext( adrNext, - 358:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_COMPUTE_RX_WINDOW_PARAMETERS( ) KR920_CASE { RegionKR920ComputeRxWindowParameter - 359:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_RX_CONFIG( ) KR920_CASE { return RegionKR920RxConfig( rxConfi - 360:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_TX_CONFIG( ) KR920_CASE { return RegionKR920TxConfig( txConfi - 361:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_LINK_ADR_REQ( ) KR920_CASE { return RegionKR920LinkAdrReq( linkA - 362:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_RX_PARAM_SETUP_REQ( ) KR920_CASE { return RegionKR920RxParamSetupReq( - 363:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_NEW_CHANNEL_REQ( ) KR920_CASE { return RegionKR920NewChannelReq( ne - 364:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_TX_PARAM_SETUP_REQ( ) KR920_CASE { return RegionKR920TxParamSetupReq( - 365:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_DL_CHANNEL_REQ( ) KR920_CASE { return RegionKR920DlChannelReq( dlC - 366:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_ALTERNATE_DR( ) KR920_CASE { return RegionKR920AlternateDr( alte - 367:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_CALC_BACKOFF( ) KR920_CASE { RegionKR920CalcBackOff( calcBackOff - 368:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_NEXT_CHANNEL( ) KR920_CASE { return RegionKR920NextChannel( next - 369:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_CHANNEL_ADD( ) KR920_CASE { return RegionKR920ChannelAdd( chann - 370:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_CHANNEL_REMOVE( ) KR920_CASE { return RegionKR920ChannelsRemove( c - 371:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_SET_CONTINUOUS_WAVE( ) KR920_CASE { RegionKR920SetContinuousWave( conti - 372:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_APPLY_DR_OFFSET( ) KR920_CASE { return RegionKR920ApplyDrOffset( do - 373:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 374:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_IS_ACTIVE( ) - 375:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_GET_PHY_PARAM( ) - ARM GAS /tmp/cciGOlRU.s page 8 - - - 376:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_SET_BAND_TX_DONE( ) - 377:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_INIT_DEFAULTS( ) - 378:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_VERIFY( ) - 379:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_APPLY_CF_LIST( ) - 380:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_CHAN_MASK_SET( ) - 381:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_ADR_NEXT( ) - 382:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_COMPUTE_RX_WINDOW_PARAMETERS( ) - 383:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_RX_CONFIG( ) - 384:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_TX_CONFIG( ) - 385:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_LINK_ADR_REQ( ) - 386:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_RX_PARAM_SETUP_REQ( ) - 387:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_NEW_CHANNEL_REQ( ) - 388:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_TX_PARAM_SETUP_REQ( ) - 389:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_DL_CHANNEL_REQ( ) - 390:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_ALTERNATE_DR( ) - 391:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_CALC_BACKOFF( ) - 392:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_NEXT_CHANNEL( ) - 393:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_CHANNEL_ADD( ) - 394:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_CHANNEL_REMOVE( ) - 395:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_SET_CONTINUOUS_WAVE( ) - 396:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define KR920_APPLY_DR_OFFSET( ) - 397:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 398:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 399:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_IN865 - 400:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionIN865.h" - 401:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_CASE case LORAMAC_REGION_IN865: - 402:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_IS_ACTIVE( ) IN865_CASE { return true; } - 403:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_GET_PHY_PARAM( ) IN865_CASE { return RegionIN865GetPhyParam( getP - 404:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_SET_BAND_TX_DONE( ) IN865_CASE { RegionIN865SetBandTxDone( txDone ); - 405:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_INIT_DEFAULTS( ) IN865_CASE { RegionIN865InitDefaults( type ); br - 406:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_VERIFY( ) IN865_CASE { return RegionIN865Verify( verify, p - 407:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_APPLY_CF_LIST( ) IN865_CASE { RegionIN865ApplyCFList( applyCFList - 408:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_CHAN_MASK_SET( ) IN865_CASE { return RegionIN865ChanMaskSet( chan - 409:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_ADR_NEXT( ) IN865_CASE { return RegionIN865AdrNext( adrNext, - 410:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_COMPUTE_RX_WINDOW_PARAMETERS( ) IN865_CASE { RegionIN865ComputeRxWindowParameter - 411:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_RX_CONFIG( ) IN865_CASE { return RegionIN865RxConfig( rxConfi - 412:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_TX_CONFIG( ) IN865_CASE { return RegionIN865TxConfig( txConfi - 413:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_LINK_ADR_REQ( ) IN865_CASE { return RegionIN865LinkAdrReq( linkA - 414:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_RX_PARAM_SETUP_REQ( ) IN865_CASE { return RegionIN865RxParamSetupReq( - 415:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_NEW_CHANNEL_REQ( ) IN865_CASE { return RegionIN865NewChannelReq( ne - 416:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_TX_PARAM_SETUP_REQ( ) IN865_CASE { return RegionIN865TxParamSetupReq( - 417:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_DL_CHANNEL_REQ( ) IN865_CASE { return RegionIN865DlChannelReq( dlC - 418:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_ALTERNATE_DR( ) IN865_CASE { return RegionIN865AlternateDr( alte - 419:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_CALC_BACKOFF( ) IN865_CASE { RegionIN865CalcBackOff( calcBackOff - 420:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_NEXT_CHANNEL( ) IN865_CASE { return RegionIN865NextChannel( next - 421:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_CHANNEL_ADD( ) IN865_CASE { return RegionIN865ChannelAdd( chann - 422:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_CHANNEL_REMOVE( ) IN865_CASE { return RegionIN865ChannelsRemove( c - 423:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_SET_CONTINUOUS_WAVE( ) IN865_CASE { RegionIN865SetContinuousWave( conti - 424:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_APPLY_DR_OFFSET( ) IN865_CASE { return RegionIN865ApplyDrOffset( do - 425:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 426:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_IS_ACTIVE( ) - 427:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_GET_PHY_PARAM( ) - 428:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_SET_BAND_TX_DONE( ) - 429:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_INIT_DEFAULTS( ) - 430:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_VERIFY( ) - 431:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_APPLY_CF_LIST( ) - 432:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_CHAN_MASK_SET( ) - ARM GAS /tmp/cciGOlRU.s page 9 - - - 433:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_ADR_NEXT( ) - 434:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_COMPUTE_RX_WINDOW_PARAMETERS( ) - 435:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_RX_CONFIG( ) - 436:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_TX_CONFIG( ) - 437:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_LINK_ADR_REQ( ) - 438:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_RX_PARAM_SETUP_REQ( ) - 439:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_NEW_CHANNEL_REQ( ) - 440:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_TX_PARAM_SETUP_REQ( ) - 441:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_DL_CHANNEL_REQ( ) - 442:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_ALTERNATE_DR( ) - 443:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_CALC_BACKOFF( ) - 444:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_NEXT_CHANNEL( ) - 445:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_CHANNEL_ADD( ) - 446:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_CHANNEL_REMOVE( ) - 447:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_SET_CONTINUOUS_WAVE( ) - 448:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define IN865_APPLY_DR_OFFSET( ) - 449:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 450:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 451:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_US915 - 452:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionUS915.h" - 453:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_CASE case LORAMAC_REGION_US915: - 454:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_IS_ACTIVE( ) US915_CASE { return true; } - 455:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_GET_PHY_PARAM( ) US915_CASE { return RegionUS915GetPhyParam( getP - 456:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_SET_BAND_TX_DONE( ) US915_CASE { RegionUS915SetBandTxDone( txDone ); - 457:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_INIT_DEFAULTS( ) US915_CASE { RegionUS915InitDefaults( type ); br - 458:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_VERIFY( ) US915_CASE { return RegionUS915Verify( verify, p - 459:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_APPLY_CF_LIST( ) US915_CASE { RegionUS915ApplyCFList( applyCFList - 460:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_CHAN_MASK_SET( ) US915_CASE { return RegionUS915ChanMaskSet( chan - 461:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_ADR_NEXT( ) US915_CASE { return RegionUS915AdrNext( adrNext, - 462:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_COMPUTE_RX_WINDOW_PARAMETERS( ) US915_CASE { RegionUS915ComputeRxWindowParameter - 463:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_RX_CONFIG( ) US915_CASE { return RegionUS915RxConfig( rxConfi - 464:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_TX_CONFIG( ) US915_CASE { return RegionUS915TxConfig( txConfi - 465:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_LINK_ADR_REQ( ) US915_CASE { return RegionUS915LinkAdrReq( linkA - 466:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_RX_PARAM_SETUP_REQ( ) US915_CASE { return RegionUS915RxParamSetupReq( - 467:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_NEW_CHANNEL_REQ( ) US915_CASE { return RegionUS915NewChannelReq( ne - 468:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_TX_PARAM_SETUP_REQ( ) US915_CASE { return RegionUS915TxParamSetupReq( - 469:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_DL_CHANNEL_REQ( ) US915_CASE { return RegionUS915DlChannelReq( dlC - 470:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_ALTERNATE_DR( ) US915_CASE { return RegionUS915AlternateDr( alte - 471:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_CALC_BACKOFF( ) US915_CASE { RegionUS915CalcBackOff( calcBackOff - 472:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_NEXT_CHANNEL( ) US915_CASE { return RegionUS915NextChannel( next - 473:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_CHANNEL_ADD( ) US915_CASE { return RegionUS915ChannelAdd( chann - 474:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_CHANNEL_REMOVE( ) US915_CASE { return RegionUS915ChannelsRemove( c - 475:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_SET_CONTINUOUS_WAVE( ) US915_CASE { RegionUS915SetContinuousWave( conti - 476:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_APPLY_DR_OFFSET( ) US915_CASE { return RegionUS915ApplyDrOffset( do - 477:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 478:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_IS_ACTIVE( ) - 479:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_GET_PHY_PARAM( ) - 480:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_SET_BAND_TX_DONE( ) - 481:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_INIT_DEFAULTS( ) - 482:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_VERIFY( ) - 483:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_APPLY_CF_LIST( ) - 484:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_CHAN_MASK_SET( ) - 485:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_ADR_NEXT( ) - 486:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_COMPUTE_RX_WINDOW_PARAMETERS( ) - 487:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_RX_CONFIG( ) - 488:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_TX_CONFIG( ) - 489:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_LINK_ADR_REQ( ) - ARM GAS /tmp/cciGOlRU.s page 10 - - - 490:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_RX_PARAM_SETUP_REQ( ) - 491:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_NEW_CHANNEL_REQ( ) - 492:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_TX_PARAM_SETUP_REQ( ) - 493:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_DL_CHANNEL_REQ( ) - 494:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_ALTERNATE_DR( ) - 495:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_CALC_BACKOFF( ) - 496:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_NEXT_CHANNEL( ) - 497:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_CHANNEL_ADD( ) - 498:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_CHANNEL_REMOVE( ) - 499:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_SET_CONTINUOUS_WAVE( ) - 500:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_APPLY_DR_OFFSET( ) - 501:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 502:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 503:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #ifdef REGION_US915_HYBRID - 504:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #include "RegionUS915-Hybrid.h" - 505:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_CASE case LORAMAC_REGION_US915_HYBRID: - 506:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_IS_ACTIVE( ) US915_HYBRID_CASE { return true; } - 507:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_GET_PHY_PARAM( ) US915_HYBRID_CASE { return RegionUS915Hyb - 508:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_SET_BAND_TX_DONE( ) US915_HYBRID_CASE { RegionUS915HybridSetB - 509:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_INIT_DEFAULTS( ) US915_HYBRID_CASE { RegionUS915HybridInit - 510:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_VERIFY( ) US915_HYBRID_CASE { return RegionUS915Hyb - 511:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_APPLY_CF_LIST( ) US915_HYBRID_CASE { RegionUS915HybridAppl - 512:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_CHAN_MASK_SET( ) US915_HYBRID_CASE { return RegionUS915Hyb - 513:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_ADR_NEXT( ) US915_HYBRID_CASE { return RegionUS915Hyb - 514:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_COMPUTE_RX_WINDOW_PARAMETERS( ) US915_HYBRID_CASE { RegionUS915HybridComp - 515:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_RX_CONFIG( ) US915_HYBRID_CASE { return RegionUS915Hyb - 516:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_TX_CONFIG( ) US915_HYBRID_CASE { return RegionUS915Hyb - 517:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_LINK_ADR_REQ( ) US915_HYBRID_CASE { return RegionUS915Hyb - 518:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_RX_PARAM_SETUP_REQ( ) US915_HYBRID_CASE { return RegionUS915Hyb - 519:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_NEW_CHANNEL_REQ( ) US915_HYBRID_CASE { return RegionUS915Hyb - 520:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_TX_PARAM_SETUP_REQ( ) US915_HYBRID_CASE { return RegionUS915Hyb - 521:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_DL_CHANNEL_REQ( ) US915_HYBRID_CASE { return RegionUS915Hyb - 522:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_ALTERNATE_DR( ) US915_HYBRID_CASE { return RegionUS915Hyb - 523:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_CALC_BACKOFF( ) US915_HYBRID_CASE { RegionUS915HybridCalc - 524:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_NEXT_CHANNEL( ) US915_HYBRID_CASE { return RegionUS915Hyb - 525:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_CHANNEL_ADD( ) US915_HYBRID_CASE { return RegionUS915Hyb - 526:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_CHANNEL_REMOVE( ) US915_HYBRID_CASE { return RegionUS915Hyb - 527:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_SET_CONTINUOUS_WAVE( ) US915_HYBRID_CASE { RegionUS915HybridSetC - 528:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_APPLY_DR_OFFSET( ) US915_HYBRID_CASE { return RegionUS915Hyb - 529:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #else - 530:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_IS_ACTIVE( ) - 531:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_GET_PHY_PARAM( ) - 532:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_SET_BAND_TX_DONE( ) - 533:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_INIT_DEFAULTS( ) - 534:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_VERIFY( ) - 535:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_APPLY_CF_LIST( ) - 536:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_CHAN_MASK_SET( ) - 537:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_ADR_NEXT( ) - 538:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_COMPUTE_RX_WINDOW_PARAMETERS( ) - 539:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_RX_CONFIG( ) - 540:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_TX_CONFIG( ) - 541:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_LINK_ADR_REQ( ) - 542:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_RX_PARAM_SETUP_REQ( ) - 543:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_NEW_CHANNEL_REQ( ) - 544:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_TX_PARAM_SETUP_REQ( ) - 545:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_DL_CHANNEL_REQ( ) - 546:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_ALTERNATE_DR( ) - ARM GAS /tmp/cciGOlRU.s page 11 - - - 547:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_CALC_BACKOFF( ) - 548:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_NEXT_CHANNEL( ) - 549:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_CHANNEL_ADD( ) - 550:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_CHANNEL_REMOVE( ) - 551:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_SET_CONTINUOUS_WAVE( ) - 552:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #define US915_HYBRID_APPLY_DR_OFFSET( ) - 553:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** #endif - 554:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 555:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** bool RegionIsActive( LoRaMacRegion_t region ) - 556:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 26 .loc 1 556 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 @ link register save eliminated. - 31 .LVL0: - 557:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 32 .loc 1 557 0 - 33 0000 0528 cmp r0, #5 - 34 0002 01D0 beq .L6 - 558:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 559:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_IS_ACTIVE( ); - 560:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_IS_ACTIVE( ); - 561:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_IS_ACTIVE( ); - 562:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_IS_ACTIVE( ); - 563:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_IS_ACTIVE( ); - 564:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_IS_ACTIVE( ); - 565:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_IS_ACTIVE( ); - 566:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_IS_ACTIVE( ); - 567:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_IS_ACTIVE( ); - 568:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_IS_ACTIVE( ); - 569:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 570:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 571:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return false; - 35 .loc 1 571 0 - 36 0004 0020 movs r0, #0 - 37 .LVL1: - 38 .L2: - 572:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 573:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 574:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 39 .loc 1 574 0 - 40 @ sp needed - 41 0006 7047 bx lr - 42 .LVL2: - 43 .L6: - 564:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_IS_ACTIVE( ); - 44 .loc 1 564 0 - 45 0008 0438 subs r0, r0, #4 - 46 .LVL3: - 47 000a FCE7 b .L2 - 48 .cfi_endproc - 49 .LFE82: - 51 .section .text.RegionGetPhyParam,"ax",%progbits - 52 .align 1 - 53 .global RegionGetPhyParam - 54 .syntax unified - ARM GAS /tmp/cciGOlRU.s page 12 - - - 55 .code 16 - 56 .thumb_func - 57 .fpu softvfp - 59 RegionGetPhyParam: - 60 .LFB83: - 575:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 576:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** PhyParam_t RegionGetPhyParam( LoRaMacRegion_t region, GetPhyParams_t* getPhy ) - 577:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 61 .loc 1 577 0 - 62 .cfi_startproc - 63 @ args = 0, pretend = 0, frame = 0 - 64 @ frame_needed = 0, uses_anonymous_args = 0 - 65 .LVL4: - 66 0000 10B5 push {r4, lr} - 67 .LCFI0: - 68 .cfi_def_cfa_offset 8 - 69 .cfi_offset 4, -8 - 70 .cfi_offset 14, -4 - 578:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** PhyParam_t phyParam = { 0 }; - 579:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 71 .loc 1 579 0 - 72 0002 0528 cmp r0, #5 - 73 0004 01D0 beq .L12 - 580:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 581:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_GET_PHY_PARAM( ); - 582:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_GET_PHY_PARAM( ); - 583:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_GET_PHY_PARAM( ); - 584:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_GET_PHY_PARAM( ); - 585:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_GET_PHY_PARAM( ); - 586:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_GET_PHY_PARAM( ); - 587:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_GET_PHY_PARAM( ); - 588:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_GET_PHY_PARAM( ); - 589:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_GET_PHY_PARAM( ); - 590:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_GET_PHY_PARAM( ); - 591:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 592:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 593:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return phyParam; - 74 .loc 1 593 0 - 75 0006 0020 movs r0, #0 - 76 .LVL5: - 77 .L10: - 594:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 595:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 596:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 78 .loc 1 596 0 - 79 @ sp needed - 80 0008 10BD pop {r4, pc} - 81 .LVL6: - 82 .L12: - 586:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_GET_PHY_PARAM( ); - 83 .loc 1 586 0 - 84 000a 0800 movs r0, r1 - 85 .LVL7: - 86 000c FFF7FEFF bl RegionEU868GetPhyParam - 87 .LVL8: - 88 0010 FAE7 b .L10 - 89 .cfi_endproc - ARM GAS /tmp/cciGOlRU.s page 13 - - - 90 .LFE83: - 92 .section .text.RegionSetBandTxDone,"ax",%progbits - 93 .align 1 - 94 .global RegionSetBandTxDone - 95 .syntax unified - 96 .code 16 - 97 .thumb_func - 98 .fpu softvfp - 100 RegionSetBandTxDone: - 101 .LFB84: - 597:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 598:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** void RegionSetBandTxDone( LoRaMacRegion_t region, SetBandTxDoneParams_t* txDone ) - 599:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 102 .loc 1 599 0 - 103 .cfi_startproc - 104 @ args = 0, pretend = 0, frame = 0 - 105 @ frame_needed = 0, uses_anonymous_args = 0 - 106 .LVL9: - 107 0000 10B5 push {r4, lr} - 108 .LCFI1: - 109 .cfi_def_cfa_offset 8 - 110 .cfi_offset 4, -8 - 111 .cfi_offset 14, -4 - 600:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 112 .loc 1 600 0 - 113 0002 0528 cmp r0, #5 - 114 0004 00D0 beq .L16 - 115 .LVL10: - 116 .L13: - 601:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 602:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_SET_BAND_TX_DONE( ); - 603:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_SET_BAND_TX_DONE( ); - 604:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_SET_BAND_TX_DONE( ); - 605:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_SET_BAND_TX_DONE( ); - 606:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_SET_BAND_TX_DONE( ); - 607:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_SET_BAND_TX_DONE( ); - 608:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_SET_BAND_TX_DONE( ); - 609:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_SET_BAND_TX_DONE( ); - 610:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_SET_BAND_TX_DONE( ); - 611:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_SET_BAND_TX_DONE( ); - 612:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 613:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 614:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return; - 615:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 616:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 617:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 117 .loc 1 617 0 - 118 @ sp needed - 119 0006 10BD pop {r4, pc} - 120 .LVL11: - 121 .L16: - 607:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_SET_BAND_TX_DONE( ); - 122 .loc 1 607 0 - 123 0008 0800 movs r0, r1 - 124 .LVL12: - 125 000a FFF7FEFF bl RegionEU868SetBandTxDone - 126 .LVL13: - ARM GAS /tmp/cciGOlRU.s page 14 - - - 127 000e FAE7 b .L13 - 128 .cfi_endproc - 129 .LFE84: - 131 .section .text.RegionInitDefaults,"ax",%progbits - 132 .align 1 - 133 .global RegionInitDefaults - 134 .syntax unified - 135 .code 16 - 136 .thumb_func - 137 .fpu softvfp - 139 RegionInitDefaults: - 140 .LFB85: - 618:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 619:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** void RegionInitDefaults( LoRaMacRegion_t region, InitType_t type ) - 620:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 141 .loc 1 620 0 - 142 .cfi_startproc - 143 @ args = 0, pretend = 0, frame = 0 - 144 @ frame_needed = 0, uses_anonymous_args = 0 - 145 .LVL14: - 146 0000 10B5 push {r4, lr} - 147 .LCFI2: - 148 .cfi_def_cfa_offset 8 - 149 .cfi_offset 4, -8 - 150 .cfi_offset 14, -4 - 621:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 151 .loc 1 621 0 - 152 0002 0528 cmp r0, #5 - 153 0004 00D0 beq .L20 - 154 .LVL15: - 155 .L17: - 622:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 623:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_INIT_DEFAULTS( ); - 624:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_INIT_DEFAULTS( ); - 625:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_INIT_DEFAULTS( ); - 626:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_INIT_DEFAULTS( ); - 627:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_INIT_DEFAULTS( ); - 628:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_INIT_DEFAULTS( ); - 629:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_INIT_DEFAULTS( ); - 630:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_INIT_DEFAULTS( ); - 631:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_INIT_DEFAULTS( ); - 632:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_INIT_DEFAULTS( ); - 633:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 634:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 635:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** break; - 636:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 637:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 638:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 156 .loc 1 638 0 - 157 @ sp needed - 158 0006 10BD pop {r4, pc} - 159 .LVL16: - 160 .L20: - 628:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_INIT_DEFAULTS( ); - 161 .loc 1 628 0 - 162 0008 0800 movs r0, r1 - 163 .LVL17: - ARM GAS /tmp/cciGOlRU.s page 15 - - - 164 000a FFF7FEFF bl RegionEU868InitDefaults - 165 .LVL18: - 166 .loc 1 638 0 - 167 000e FAE7 b .L17 - 168 .cfi_endproc - 169 .LFE85: - 171 .section .text.RegionVerify,"ax",%progbits - 172 .align 1 - 173 .global RegionVerify - 174 .syntax unified - 175 .code 16 - 176 .thumb_func - 177 .fpu softvfp - 179 RegionVerify: - 180 .LFB86: - 639:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 640:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** bool RegionVerify( LoRaMacRegion_t region, VerifyParams_t* verify, PhyAttribute_t phyAttribute ) - 641:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 181 .loc 1 641 0 - 182 .cfi_startproc - 183 @ args = 0, pretend = 0, frame = 0 - 184 @ frame_needed = 0, uses_anonymous_args = 0 - 185 .LVL19: - 186 0000 10B5 push {r4, lr} - 187 .LCFI3: - 188 .cfi_def_cfa_offset 8 - 189 .cfi_offset 4, -8 - 190 .cfi_offset 14, -4 - 191 0002 0B00 movs r3, r1 - 642:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 192 .loc 1 642 0 - 193 0004 0528 cmp r0, #5 - 194 0006 01D0 beq .L26 - 643:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 644:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_VERIFY( ); - 645:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_VERIFY( ); - 646:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_VERIFY( ); - 647:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_VERIFY( ); - 648:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_VERIFY( ); - 649:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_VERIFY( ); - 650:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_VERIFY( ); - 651:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_VERIFY( ); - 652:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_VERIFY( ); - 653:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_VERIFY( ); - 654:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 655:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 656:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return false; - 195 .loc 1 656 0 - 196 0008 0020 movs r0, #0 - 197 .LVL20: - 198 .L22: - 657:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 658:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 659:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 199 .loc 1 659 0 - 200 @ sp needed - 201 000a 10BD pop {r4, pc} - ARM GAS /tmp/cciGOlRU.s page 16 - - - 202 .LVL21: - 203 .L26: - 649:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_VERIFY( ); - 204 .loc 1 649 0 - 205 000c 1100 movs r1, r2 - 206 .LVL22: - 207 000e 1800 movs r0, r3 - 208 .LVL23: - 209 0010 FFF7FEFF bl RegionEU868Verify - 210 .LVL24: - 211 0014 F9E7 b .L22 - 212 .cfi_endproc - 213 .LFE86: - 215 .section .text.RegionApplyCFList,"ax",%progbits - 216 .align 1 - 217 .global RegionApplyCFList - 218 .syntax unified - 219 .code 16 - 220 .thumb_func - 221 .fpu softvfp - 223 RegionApplyCFList: - 224 .LFB87: - 660:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 661:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** void RegionApplyCFList( LoRaMacRegion_t region, ApplyCFListParams_t* applyCFList ) - 662:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 225 .loc 1 662 0 - 226 .cfi_startproc - 227 @ args = 0, pretend = 0, frame = 0 - 228 @ frame_needed = 0, uses_anonymous_args = 0 - 229 .LVL25: - 230 0000 10B5 push {r4, lr} - 231 .LCFI4: - 232 .cfi_def_cfa_offset 8 - 233 .cfi_offset 4, -8 - 234 .cfi_offset 14, -4 - 663:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 235 .loc 1 663 0 - 236 0002 0528 cmp r0, #5 - 237 0004 00D0 beq .L30 - 238 .LVL26: - 239 .L27: - 664:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 665:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_APPLY_CF_LIST( ); - 666:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_APPLY_CF_LIST( ); - 667:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_APPLY_CF_LIST( ); - 668:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_APPLY_CF_LIST( ); - 669:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_APPLY_CF_LIST( ); - 670:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_APPLY_CF_LIST( ); - 671:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_APPLY_CF_LIST( ); - 672:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_APPLY_CF_LIST( ); - 673:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_APPLY_CF_LIST( ); - 674:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_APPLY_CF_LIST( ); - 675:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 676:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 677:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** break; - 678:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 679:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - ARM GAS /tmp/cciGOlRU.s page 17 - - - 680:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 240 .loc 1 680 0 - 241 @ sp needed - 242 0006 10BD pop {r4, pc} - 243 .LVL27: - 244 .L30: - 670:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_APPLY_CF_LIST( ); - 245 .loc 1 670 0 - 246 0008 0800 movs r0, r1 - 247 .LVL28: - 248 000a FFF7FEFF bl RegionEU868ApplyCFList - 249 .LVL29: - 250 .loc 1 680 0 - 251 000e FAE7 b .L27 - 252 .cfi_endproc - 253 .LFE87: - 255 .section .text.RegionChanMaskSet,"ax",%progbits - 256 .align 1 - 257 .global RegionChanMaskSet - 258 .syntax unified - 259 .code 16 - 260 .thumb_func - 261 .fpu softvfp - 263 RegionChanMaskSet: - 264 .LFB88: - 681:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 682:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** bool RegionChanMaskSet( LoRaMacRegion_t region, ChanMaskSetParams_t* chanMaskSet ) - 683:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 265 .loc 1 683 0 - 266 .cfi_startproc - 267 @ args = 0, pretend = 0, frame = 0 - 268 @ frame_needed = 0, uses_anonymous_args = 0 - 269 .LVL30: - 270 0000 10B5 push {r4, lr} - 271 .LCFI5: - 272 .cfi_def_cfa_offset 8 - 273 .cfi_offset 4, -8 - 274 .cfi_offset 14, -4 - 684:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 275 .loc 1 684 0 - 276 0002 0528 cmp r0, #5 - 277 0004 01D0 beq .L36 - 685:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 686:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_CHAN_MASK_SET( ); - 687:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_CHAN_MASK_SET( ); - 688:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_CHAN_MASK_SET( ); - 689:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_CHAN_MASK_SET( ); - 690:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_CHAN_MASK_SET( ); - 691:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_CHAN_MASK_SET( ); - 692:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_CHAN_MASK_SET( ); - 693:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_CHAN_MASK_SET( ); - 694:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_CHAN_MASK_SET( ); - 695:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_CHAN_MASK_SET( ); - 696:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 697:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 698:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return false; - 278 .loc 1 698 0 - ARM GAS /tmp/cciGOlRU.s page 18 - - - 279 0006 0020 movs r0, #0 - 280 .LVL31: - 281 .L32: - 699:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 700:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 701:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 282 .loc 1 701 0 - 283 @ sp needed - 284 0008 10BD pop {r4, pc} - 285 .LVL32: - 286 .L36: - 691:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_CHAN_MASK_SET( ); - 287 .loc 1 691 0 - 288 000a 0800 movs r0, r1 - 289 .LVL33: - 290 000c FFF7FEFF bl RegionEU868ChanMaskSet - 291 .LVL34: - 292 0010 FAE7 b .L32 - 293 .cfi_endproc - 294 .LFE88: - 296 .section .text.RegionAdrNext,"ax",%progbits - 297 .align 1 - 298 .global RegionAdrNext - 299 .syntax unified - 300 .code 16 - 301 .thumb_func - 302 .fpu softvfp - 304 RegionAdrNext: - 305 .LFB89: - 702:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 703:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** bool RegionAdrNext( LoRaMacRegion_t region, AdrNextParams_t* adrNext, int8_t* drOut, int8_t* txPowO - 704:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 306 .loc 1 704 0 - 307 .cfi_startproc - 308 @ args = 4, pretend = 0, frame = 0 - 309 @ frame_needed = 0, uses_anonymous_args = 0 - 310 .LVL35: - 311 0000 10B5 push {r4, lr} - 312 .LCFI6: - 313 .cfi_def_cfa_offset 8 - 314 .cfi_offset 4, -8 - 315 .cfi_offset 14, -4 - 316 0002 0C00 movs r4, r1 - 317 0004 1100 movs r1, r2 - 318 .LVL36: - 319 0006 1A00 movs r2, r3 - 320 .LVL37: - 705:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 321 .loc 1 705 0 - 322 0008 0528 cmp r0, #5 - 323 000a 01D0 beq .L42 - 706:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 707:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_ADR_NEXT( ); - 708:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_ADR_NEXT( ); - 709:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_ADR_NEXT( ); - 710:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_ADR_NEXT( ); - 711:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_ADR_NEXT( ); - ARM GAS /tmp/cciGOlRU.s page 19 - - - 712:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_ADR_NEXT( ); - 713:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_ADR_NEXT( ); - 714:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_ADR_NEXT( ); - 715:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_ADR_NEXT( ); - 716:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_ADR_NEXT( ); - 717:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 718:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 719:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return false; - 324 .loc 1 719 0 - 325 000c 0020 movs r0, #0 - 326 .LVL38: - 327 .L38: - 720:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 721:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 722:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 328 .loc 1 722 0 - 329 @ sp needed - 330 .LVL39: - 331 000e 10BD pop {r4, pc} - 332 .LVL40: - 333 .L42: - 712:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_ADR_NEXT( ); - 334 .loc 1 712 0 - 335 0010 029B ldr r3, [sp, #8] - 336 0012 2000 movs r0, r4 - 337 .LVL41: - 338 0014 FFF7FEFF bl RegionEU868AdrNext - 339 .LVL42: - 340 0018 F9E7 b .L38 - 341 .cfi_endproc - 342 .LFE89: - 344 .section .text.RegionComputeRxWindowParameters,"ax",%progbits - 345 .align 1 - 346 .global RegionComputeRxWindowParameters - 347 .syntax unified - 348 .code 16 - 349 .thumb_func - 350 .fpu softvfp - 352 RegionComputeRxWindowParameters: - 353 .LFB90: - 723:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 724:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** void RegionComputeRxWindowParameters( LoRaMacRegion_t region, int8_t datarate, uint8_t minRxSymbols - 725:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 354 .loc 1 725 0 - 355 .cfi_startproc - 356 @ args = 4, pretend = 0, frame = 0 - 357 @ frame_needed = 0, uses_anonymous_args = 0 - 358 .LVL43: - 359 0000 10B5 push {r4, lr} - 360 .LCFI7: - 361 .cfi_def_cfa_offset 8 - 362 .cfi_offset 4, -8 - 363 .cfi_offset 14, -4 - 364 0002 0C00 movs r4, r1 - 365 0004 1100 movs r1, r2 - 366 .LVL44: - 367 0006 1A00 movs r2, r3 - ARM GAS /tmp/cciGOlRU.s page 20 - - - 368 .LVL45: - 726:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 369 .loc 1 726 0 - 370 0008 0528 cmp r0, #5 - 371 000a 00D0 beq .L46 - 372 .LVL46: - 373 .L43: - 727:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 728:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_COMPUTE_RX_WINDOW_PARAMETERS( ); - 729:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_COMPUTE_RX_WINDOW_PARAMETERS( ); - 730:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_COMPUTE_RX_WINDOW_PARAMETERS( ); - 731:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_COMPUTE_RX_WINDOW_PARAMETERS( ); - 732:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_COMPUTE_RX_WINDOW_PARAMETERS( ); - 733:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_COMPUTE_RX_WINDOW_PARAMETERS( ); - 734:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_COMPUTE_RX_WINDOW_PARAMETERS( ); - 735:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_COMPUTE_RX_WINDOW_PARAMETERS( ); - 736:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_COMPUTE_RX_WINDOW_PARAMETERS( ); - 737:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_COMPUTE_RX_WINDOW_PARAMETERS( ); - 738:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 739:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 740:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** break; - 741:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 742:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 743:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 374 .loc 1 743 0 - 375 @ sp needed - 376 000c 10BD pop {r4, pc} - 377 .LVL47: - 378 .L46: - 733:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_COMPUTE_RX_WINDOW_PARAMETERS( ); - 379 .loc 1 733 0 - 380 000e 029B ldr r3, [sp, #8] - 381 0010 2000 movs r0, r4 - 382 .LVL48: - 383 0012 FFF7FEFF bl RegionEU868ComputeRxWindowParameters - 384 .LVL49: - 385 .loc 1 743 0 - 386 0016 F9E7 b .L43 - 387 .cfi_endproc - 388 .LFE90: - 390 .section .text.RegionRxConfig,"ax",%progbits - 391 .align 1 - 392 .global RegionRxConfig - 393 .syntax unified - 394 .code 16 - 395 .thumb_func - 396 .fpu softvfp - 398 RegionRxConfig: - 399 .LFB91: - 744:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 745:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** bool RegionRxConfig( LoRaMacRegion_t region, RxConfigParams_t* rxConfig, int8_t* datarate ) - 746:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 400 .loc 1 746 0 - 401 .cfi_startproc - 402 @ args = 0, pretend = 0, frame = 0 - 403 @ frame_needed = 0, uses_anonymous_args = 0 - 404 .LVL50: - ARM GAS /tmp/cciGOlRU.s page 21 - - - 405 0000 10B5 push {r4, lr} - 406 .LCFI8: - 407 .cfi_def_cfa_offset 8 - 408 .cfi_offset 4, -8 - 409 .cfi_offset 14, -4 - 410 0002 0B00 movs r3, r1 - 747:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 411 .loc 1 747 0 - 412 0004 0528 cmp r0, #5 - 413 0006 01D0 beq .L52 - 748:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 749:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_RX_CONFIG( ); - 750:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_RX_CONFIG( ); - 751:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_RX_CONFIG( ); - 752:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_RX_CONFIG( ); - 753:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_RX_CONFIG( ); - 754:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_RX_CONFIG( ); - 755:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_RX_CONFIG( ); - 756:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_RX_CONFIG( ); - 757:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_RX_CONFIG( ); - 758:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_RX_CONFIG( ); - 759:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 760:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 761:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return false; - 414 .loc 1 761 0 - 415 0008 0020 movs r0, #0 - 416 .LVL51: - 417 .L48: - 762:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 763:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 764:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 418 .loc 1 764 0 - 419 @ sp needed - 420 000a 10BD pop {r4, pc} - 421 .LVL52: - 422 .L52: - 754:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_RX_CONFIG( ); - 423 .loc 1 754 0 - 424 000c 1100 movs r1, r2 - 425 .LVL53: - 426 000e 1800 movs r0, r3 - 427 .LVL54: - 428 0010 FFF7FEFF bl RegionEU868RxConfig - 429 .LVL55: - 430 0014 F9E7 b .L48 - 431 .cfi_endproc - 432 .LFE91: - 434 .section .text.RegionTxConfig,"ax",%progbits - 435 .align 1 - 436 .global RegionTxConfig - 437 .syntax unified - 438 .code 16 - 439 .thumb_func - 440 .fpu softvfp - 442 RegionTxConfig: - 443 .LFB92: - 765:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - ARM GAS /tmp/cciGOlRU.s page 22 - - - 766:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** bool RegionTxConfig( LoRaMacRegion_t region, TxConfigParams_t* txConfig, int8_t* txPower, TimerTime - 767:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 444 .loc 1 767 0 - 445 .cfi_startproc - 446 @ args = 0, pretend = 0, frame = 0 - 447 @ frame_needed = 0, uses_anonymous_args = 0 - 448 .LVL56: - 449 0000 10B5 push {r4, lr} - 450 .LCFI9: - 451 .cfi_def_cfa_offset 8 - 452 .cfi_offset 4, -8 - 453 .cfi_offset 14, -4 - 454 0002 0C00 movs r4, r1 - 455 0004 1100 movs r1, r2 - 456 .LVL57: - 768:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 457 .loc 1 768 0 - 458 0006 0528 cmp r0, #5 - 459 0008 01D0 beq .L58 - 769:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 770:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_TX_CONFIG( ); - 771:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_TX_CONFIG( ); - 772:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_TX_CONFIG( ); - 773:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_TX_CONFIG( ); - 774:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_TX_CONFIG( ); - 775:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_TX_CONFIG( ); - 776:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_TX_CONFIG( ); - 777:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_TX_CONFIG( ); - 778:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_TX_CONFIG( ); - 779:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_TX_CONFIG( ); - 780:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 781:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 782:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return false; - 460 .loc 1 782 0 - 461 000a 0020 movs r0, #0 - 462 .LVL58: - 463 .L54: - 783:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 784:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 785:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 464 .loc 1 785 0 - 465 @ sp needed - 466 .LVL59: - 467 000c 10BD pop {r4, pc} - 468 .LVL60: - 469 .L58: - 775:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_TX_CONFIG( ); - 470 .loc 1 775 0 - 471 000e 1A00 movs r2, r3 - 472 0010 2000 movs r0, r4 - 473 .LVL61: - 474 0012 FFF7FEFF bl RegionEU868TxConfig - 475 .LVL62: - 476 0016 F9E7 b .L54 - 477 .cfi_endproc - 478 .LFE92: - 480 .section .text.RegionLinkAdrReq,"ax",%progbits - ARM GAS /tmp/cciGOlRU.s page 23 - - - 481 .align 1 - 482 .global RegionLinkAdrReq - 483 .syntax unified - 484 .code 16 - 485 .thumb_func - 486 .fpu softvfp - 488 RegionLinkAdrReq: - 489 .LFB93: - 786:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 787:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** uint8_t RegionLinkAdrReq( LoRaMacRegion_t region, LinkAdrReqParams_t* linkAdrReq, int8_t* drOut, in - 788:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 490 .loc 1 788 0 - 491 .cfi_startproc - 492 @ args = 8, pretend = 0, frame = 0 - 493 @ frame_needed = 0, uses_anonymous_args = 0 - 494 .LVL63: - 495 0000 10B5 push {r4, lr} - 496 .LCFI10: - 497 .cfi_def_cfa_offset 8 - 498 .cfi_offset 4, -8 - 499 .cfi_offset 14, -4 - 500 0002 82B0 sub sp, sp, #8 - 501 .LCFI11: - 502 .cfi_def_cfa_offset 16 - 503 0004 0C00 movs r4, r1 - 504 0006 1100 movs r1, r2 - 505 .LVL64: - 506 0008 1A00 movs r2, r3 - 507 .LVL65: - 789:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 508 .loc 1 789 0 - 509 000a 0528 cmp r0, #5 - 510 000c 02D0 beq .L64 - 790:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 791:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_LINK_ADR_REQ( ); - 792:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_LINK_ADR_REQ( ); - 793:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_LINK_ADR_REQ( ); - 794:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_LINK_ADR_REQ( ); - 795:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_LINK_ADR_REQ( ); - 796:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_LINK_ADR_REQ( ); - 797:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_LINK_ADR_REQ( ); - 798:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_LINK_ADR_REQ( ); - 799:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_LINK_ADR_REQ( ); - 800:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_LINK_ADR_REQ( ); - 801:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 802:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 803:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return 0; - 511 .loc 1 803 0 - 512 000e 0020 movs r0, #0 - 513 .LVL66: - 514 .L60: - 804:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 805:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 806:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 515 .loc 1 806 0 - 516 0010 02B0 add sp, sp, #8 - 517 @ sp needed - ARM GAS /tmp/cciGOlRU.s page 24 - - - 518 .LVL67: - 519 0012 10BD pop {r4, pc} - 520 .LVL68: - 521 .L64: - 796:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_LINK_ADR_REQ( ); - 522 .loc 1 796 0 - 523 0014 059B ldr r3, [sp, #20] - 524 0016 0093 str r3, [sp] - 525 0018 049B ldr r3, [sp, #16] - 526 001a 2000 movs r0, r4 - 527 .LVL69: - 528 001c FFF7FEFF bl RegionEU868LinkAdrReq - 529 .LVL70: - 530 0020 F6E7 b .L60 - 531 .cfi_endproc - 532 .LFE93: - 534 .section .text.RegionRxParamSetupReq,"ax",%progbits - 535 .align 1 - 536 .global RegionRxParamSetupReq - 537 .syntax unified - 538 .code 16 - 539 .thumb_func - 540 .fpu softvfp - 542 RegionRxParamSetupReq: - 543 .LFB94: - 807:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 808:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** uint8_t RegionRxParamSetupReq( LoRaMacRegion_t region, RxParamSetupReqParams_t* rxParamSetupReq ) - 809:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 544 .loc 1 809 0 - 545 .cfi_startproc - 546 @ args = 0, pretend = 0, frame = 0 - 547 @ frame_needed = 0, uses_anonymous_args = 0 - 548 .LVL71: - 549 0000 10B5 push {r4, lr} - 550 .LCFI12: - 551 .cfi_def_cfa_offset 8 - 552 .cfi_offset 4, -8 - 553 .cfi_offset 14, -4 - 810:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 554 .loc 1 810 0 - 555 0002 0528 cmp r0, #5 - 556 0004 01D0 beq .L70 - 811:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 812:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_RX_PARAM_SETUP_REQ( ); - 813:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_RX_PARAM_SETUP_REQ( ); - 814:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_RX_PARAM_SETUP_REQ( ); - 815:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_RX_PARAM_SETUP_REQ( ); - 816:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_RX_PARAM_SETUP_REQ( ); - 817:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_RX_PARAM_SETUP_REQ( ); - 818:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_RX_PARAM_SETUP_REQ( ); - 819:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_RX_PARAM_SETUP_REQ( ); - 820:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_RX_PARAM_SETUP_REQ( ); - 821:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_RX_PARAM_SETUP_REQ( ); - 822:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 823:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 824:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return 0; - 557 .loc 1 824 0 - ARM GAS /tmp/cciGOlRU.s page 25 - - - 558 0006 0020 movs r0, #0 - 559 .LVL72: - 560 .L66: - 825:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 826:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 827:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 561 .loc 1 827 0 - 562 @ sp needed - 563 0008 10BD pop {r4, pc} - 564 .LVL73: - 565 .L70: - 817:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_RX_PARAM_SETUP_REQ( ); - 566 .loc 1 817 0 - 567 000a 0800 movs r0, r1 - 568 .LVL74: - 569 000c FFF7FEFF bl RegionEU868RxParamSetupReq - 570 .LVL75: - 571 0010 FAE7 b .L66 - 572 .cfi_endproc - 573 .LFE94: - 575 .section .text.RegionNewChannelReq,"ax",%progbits - 576 .align 1 - 577 .global RegionNewChannelReq - 578 .syntax unified - 579 .code 16 - 580 .thumb_func - 581 .fpu softvfp - 583 RegionNewChannelReq: - 584 .LFB95: - 828:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 829:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** uint8_t RegionNewChannelReq( LoRaMacRegion_t region, NewChannelReqParams_t* newChannelReq ) - 830:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 585 .loc 1 830 0 - 586 .cfi_startproc - 587 @ args = 0, pretend = 0, frame = 0 - 588 @ frame_needed = 0, uses_anonymous_args = 0 - 589 .LVL76: - 590 0000 10B5 push {r4, lr} - 591 .LCFI13: - 592 .cfi_def_cfa_offset 8 - 593 .cfi_offset 4, -8 - 594 .cfi_offset 14, -4 - 831:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 595 .loc 1 831 0 - 596 0002 0528 cmp r0, #5 - 597 0004 01D0 beq .L76 - 832:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 833:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_NEW_CHANNEL_REQ( ); - 834:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_NEW_CHANNEL_REQ( ); - 835:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_NEW_CHANNEL_REQ( ); - 836:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_NEW_CHANNEL_REQ( ); - 837:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_NEW_CHANNEL_REQ( ); - 838:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_NEW_CHANNEL_REQ( ); - 839:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_NEW_CHANNEL_REQ( ); - 840:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_NEW_CHANNEL_REQ( ); - 841:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_NEW_CHANNEL_REQ( ); - 842:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_NEW_CHANNEL_REQ( ); - ARM GAS /tmp/cciGOlRU.s page 26 - - - 843:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 844:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 845:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return 0; - 598 .loc 1 845 0 - 599 0006 0020 movs r0, #0 - 600 .LVL77: - 601 .L72: - 846:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 847:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 848:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 602 .loc 1 848 0 - 603 @ sp needed - 604 0008 10BD pop {r4, pc} - 605 .LVL78: - 606 .L76: - 838:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_NEW_CHANNEL_REQ( ); - 607 .loc 1 838 0 - 608 000a 0800 movs r0, r1 - 609 .LVL79: - 610 000c FFF7FEFF bl RegionEU868NewChannelReq - 611 .LVL80: - 612 0010 FAE7 b .L72 - 613 .cfi_endproc - 614 .LFE95: - 616 .section .text.RegionTxParamSetupReq,"ax",%progbits - 617 .align 1 - 618 .global RegionTxParamSetupReq - 619 .syntax unified - 620 .code 16 - 621 .thumb_func - 622 .fpu softvfp - 624 RegionTxParamSetupReq: - 625 .LFB96: - 849:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 850:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** int8_t RegionTxParamSetupReq( LoRaMacRegion_t region, TxParamSetupReqParams_t* txParamSetupReq ) - 851:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 626 .loc 1 851 0 - 627 .cfi_startproc - 628 @ args = 0, pretend = 0, frame = 0 - 629 @ frame_needed = 0, uses_anonymous_args = 0 - 630 .LVL81: - 631 0000 10B5 push {r4, lr} - 632 .LCFI14: - 633 .cfi_def_cfa_offset 8 - 634 .cfi_offset 4, -8 - 635 .cfi_offset 14, -4 - 852:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 636 .loc 1 852 0 - 637 0002 0528 cmp r0, #5 - 638 0004 01D0 beq .L82 - 853:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 854:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_TX_PARAM_SETUP_REQ( ); - 855:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_TX_PARAM_SETUP_REQ( ); - 856:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_TX_PARAM_SETUP_REQ( ); - 857:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_TX_PARAM_SETUP_REQ( ); - 858:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_TX_PARAM_SETUP_REQ( ); - 859:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_TX_PARAM_SETUP_REQ( ); - ARM GAS /tmp/cciGOlRU.s page 27 - - - 860:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_TX_PARAM_SETUP_REQ( ); - 861:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_TX_PARAM_SETUP_REQ( ); - 862:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_TX_PARAM_SETUP_REQ( ); - 863:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_TX_PARAM_SETUP_REQ( ); - 864:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 865:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 866:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return 0; - 639 .loc 1 866 0 - 640 0006 0020 movs r0, #0 - 641 .LVL82: - 642 .L78: - 867:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 868:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 869:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 643 .loc 1 869 0 - 644 @ sp needed - 645 0008 10BD pop {r4, pc} - 646 .LVL83: - 647 .L82: - 859:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_TX_PARAM_SETUP_REQ( ); - 648 .loc 1 859 0 - 649 000a 0800 movs r0, r1 - 650 .LVL84: - 651 000c FFF7FEFF bl RegionEU868TxParamSetupReq - 652 .LVL85: - 653 0010 FAE7 b .L78 - 654 .cfi_endproc - 655 .LFE96: - 657 .section .text.RegionDlChannelReq,"ax",%progbits - 658 .align 1 - 659 .global RegionDlChannelReq - 660 .syntax unified - 661 .code 16 - 662 .thumb_func - 663 .fpu softvfp - 665 RegionDlChannelReq: - 666 .LFB97: - 870:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 871:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** uint8_t RegionDlChannelReq( LoRaMacRegion_t region, DlChannelReqParams_t* dlChannelReq ) - 872:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 667 .loc 1 872 0 - 668 .cfi_startproc - 669 @ args = 0, pretend = 0, frame = 0 - 670 @ frame_needed = 0, uses_anonymous_args = 0 - 671 .LVL86: - 672 0000 10B5 push {r4, lr} - 673 .LCFI15: - 674 .cfi_def_cfa_offset 8 - 675 .cfi_offset 4, -8 - 676 .cfi_offset 14, -4 - 873:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 677 .loc 1 873 0 - 678 0002 0528 cmp r0, #5 - 679 0004 01D0 beq .L88 - 874:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 875:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_DL_CHANNEL_REQ( ); - 876:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_DL_CHANNEL_REQ( ); - ARM GAS /tmp/cciGOlRU.s page 28 - - - 877:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_DL_CHANNEL_REQ( ); - 878:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_DL_CHANNEL_REQ( ); - 879:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_DL_CHANNEL_REQ( ); - 880:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_DL_CHANNEL_REQ( ); - 881:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_DL_CHANNEL_REQ( ); - 882:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_DL_CHANNEL_REQ( ); - 883:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_DL_CHANNEL_REQ( ); - 884:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_DL_CHANNEL_REQ( ); - 885:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 886:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 887:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return 0; - 680 .loc 1 887 0 - 681 0006 0020 movs r0, #0 - 682 .LVL87: - 683 .L84: - 888:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 889:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 890:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 684 .loc 1 890 0 - 685 @ sp needed - 686 0008 10BD pop {r4, pc} - 687 .LVL88: - 688 .L88: - 880:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_DL_CHANNEL_REQ( ); - 689 .loc 1 880 0 - 690 000a 0800 movs r0, r1 - 691 .LVL89: - 692 000c FFF7FEFF bl RegionEU868DlChannelReq - 693 .LVL90: - 694 0010 FAE7 b .L84 - 695 .cfi_endproc - 696 .LFE97: - 698 .section .text.RegionAlternateDr,"ax",%progbits - 699 .align 1 - 700 .global RegionAlternateDr - 701 .syntax unified - 702 .code 16 - 703 .thumb_func - 704 .fpu softvfp - 706 RegionAlternateDr: - 707 .LFB98: - 891:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 892:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** int8_t RegionAlternateDr( LoRaMacRegion_t region, AlternateDrParams_t* alternateDr ) - 893:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 708 .loc 1 893 0 - 709 .cfi_startproc - 710 @ args = 0, pretend = 0, frame = 0 - 711 @ frame_needed = 0, uses_anonymous_args = 0 - 712 .LVL91: - 713 0000 10B5 push {r4, lr} - 714 .LCFI16: - 715 .cfi_def_cfa_offset 8 - 716 .cfi_offset 4, -8 - 717 .cfi_offset 14, -4 - 894:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 718 .loc 1 894 0 - 719 0002 0528 cmp r0, #5 - ARM GAS /tmp/cciGOlRU.s page 29 - - - 720 0004 01D0 beq .L94 - 895:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 896:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_ALTERNATE_DR( ); - 897:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_ALTERNATE_DR( ); - 898:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_ALTERNATE_DR( ); - 899:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_ALTERNATE_DR( ); - 900:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_ALTERNATE_DR( ); - 901:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_ALTERNATE_DR( ); - 902:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_ALTERNATE_DR( ); - 903:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_ALTERNATE_DR( ); - 904:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_ALTERNATE_DR( ); - 905:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_ALTERNATE_DR( ); - 906:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 907:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 908:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return 0; - 721 .loc 1 908 0 - 722 0006 0020 movs r0, #0 - 723 .LVL92: - 724 .L90: - 909:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 910:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 911:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 725 .loc 1 911 0 - 726 @ sp needed - 727 0008 10BD pop {r4, pc} - 728 .LVL93: - 729 .L94: - 901:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_ALTERNATE_DR( ); - 730 .loc 1 901 0 - 731 000a 0800 movs r0, r1 - 732 .LVL94: - 733 000c FFF7FEFF bl RegionEU868AlternateDr - 734 .LVL95: - 735 0010 FAE7 b .L90 - 736 .cfi_endproc - 737 .LFE98: - 739 .section .text.RegionCalcBackOff,"ax",%progbits - 740 .align 1 - 741 .global RegionCalcBackOff - 742 .syntax unified - 743 .code 16 - 744 .thumb_func - 745 .fpu softvfp - 747 RegionCalcBackOff: - 748 .LFB99: - 912:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 913:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** void RegionCalcBackOff( LoRaMacRegion_t region, CalcBackOffParams_t* calcBackOff ) - 914:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 749 .loc 1 914 0 - 750 .cfi_startproc - 751 @ args = 0, pretend = 0, frame = 0 - 752 @ frame_needed = 0, uses_anonymous_args = 0 - 753 .LVL96: - 754 0000 10B5 push {r4, lr} - 755 .LCFI17: - 756 .cfi_def_cfa_offset 8 - 757 .cfi_offset 4, -8 - ARM GAS /tmp/cciGOlRU.s page 30 - - - 758 .cfi_offset 14, -4 - 915:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 759 .loc 1 915 0 - 760 0002 0528 cmp r0, #5 - 761 0004 00D0 beq .L98 - 762 .LVL97: - 763 .L95: - 916:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 917:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_CALC_BACKOFF( ); - 918:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_CALC_BACKOFF( ); - 919:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_CALC_BACKOFF( ); - 920:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_CALC_BACKOFF( ); - 921:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_CALC_BACKOFF( ); - 922:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_CALC_BACKOFF( ); - 923:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_CALC_BACKOFF( ); - 924:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_CALC_BACKOFF( ); - 925:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_CALC_BACKOFF( ); - 926:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_CALC_BACKOFF( ); - 927:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 928:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 929:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** break; - 930:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 931:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 932:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 764 .loc 1 932 0 - 765 @ sp needed - 766 0006 10BD pop {r4, pc} - 767 .LVL98: - 768 .L98: - 922:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_CALC_BACKOFF( ); - 769 .loc 1 922 0 - 770 0008 0800 movs r0, r1 - 771 .LVL99: - 772 000a FFF7FEFF bl RegionEU868CalcBackOff - 773 .LVL100: - 774 .loc 1 932 0 - 775 000e FAE7 b .L95 - 776 .cfi_endproc - 777 .LFE99: - 779 .section .text.RegionNextChannel,"ax",%progbits - 780 .align 1 - 781 .global RegionNextChannel - 782 .syntax unified - 783 .code 16 - 784 .thumb_func - 785 .fpu softvfp - 787 RegionNextChannel: - 788 .LFB100: - 933:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 934:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** bool RegionNextChannel( LoRaMacRegion_t region, NextChanParams_t* nextChanParams, uint8_t* channel, - 935:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 789 .loc 1 935 0 - 790 .cfi_startproc - 791 @ args = 4, pretend = 0, frame = 0 - 792 @ frame_needed = 0, uses_anonymous_args = 0 - 793 .LVL101: - 794 0000 10B5 push {r4, lr} - ARM GAS /tmp/cciGOlRU.s page 31 - - - 795 .LCFI18: - 796 .cfi_def_cfa_offset 8 - 797 .cfi_offset 4, -8 - 798 .cfi_offset 14, -4 - 799 0002 0C00 movs r4, r1 - 800 0004 1100 movs r1, r2 - 801 .LVL102: - 802 0006 1A00 movs r2, r3 - 803 .LVL103: - 936:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 804 .loc 1 936 0 - 805 0008 0528 cmp r0, #5 - 806 000a 01D0 beq .L104 - 937:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 938:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_NEXT_CHANNEL( ); - 939:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_NEXT_CHANNEL( ); - 940:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_NEXT_CHANNEL( ); - 941:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_NEXT_CHANNEL( ); - 942:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_NEXT_CHANNEL( ); - 943:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_NEXT_CHANNEL( ); - 944:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_NEXT_CHANNEL( ); - 945:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_NEXT_CHANNEL( ); - 946:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_NEXT_CHANNEL( ); - 947:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_NEXT_CHANNEL( ); - 948:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 949:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 950:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return false; - 807 .loc 1 950 0 - 808 000c 0020 movs r0, #0 - 809 .LVL104: - 810 .L100: - 951:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 952:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 953:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 811 .loc 1 953 0 - 812 @ sp needed - 813 .LVL105: - 814 000e 10BD pop {r4, pc} - 815 .LVL106: - 816 .L104: - 943:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_NEXT_CHANNEL( ); - 817 .loc 1 943 0 - 818 0010 029B ldr r3, [sp, #8] - 819 0012 2000 movs r0, r4 - 820 .LVL107: - 821 0014 FFF7FEFF bl RegionEU868NextChannel - 822 .LVL108: - 823 0018 F9E7 b .L100 - 824 .cfi_endproc - 825 .LFE100: - 827 .section .text.RegionChannelAdd,"ax",%progbits - 828 .align 1 - 829 .global RegionChannelAdd - 830 .syntax unified - 831 .code 16 - 832 .thumb_func - 833 .fpu softvfp - ARM GAS /tmp/cciGOlRU.s page 32 - - - 835 RegionChannelAdd: - 836 .LFB101: - 954:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 955:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** LoRaMacStatus_t RegionChannelAdd( LoRaMacRegion_t region, ChannelAddParams_t* channelAdd ) - 956:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 837 .loc 1 956 0 - 838 .cfi_startproc - 839 @ args = 0, pretend = 0, frame = 0 - 840 @ frame_needed = 0, uses_anonymous_args = 0 - 841 .LVL109: - 842 0000 10B5 push {r4, lr} - 843 .LCFI19: - 844 .cfi_def_cfa_offset 8 - 845 .cfi_offset 4, -8 - 846 .cfi_offset 14, -4 - 957:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 847 .loc 1 957 0 - 848 0002 0528 cmp r0, #5 - 849 0004 03D1 bne .L109 - 958:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 959:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_CHANNEL_ADD( ); - 960:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_CHANNEL_ADD( ); - 961:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_CHANNEL_ADD( ); - 962:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_CHANNEL_ADD( ); - 963:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_CHANNEL_ADD( ); - 964:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_CHANNEL_ADD( ); - 850 .loc 1 964 0 - 851 0006 0800 movs r0, r1 - 852 .LVL110: - 853 0008 FFF7FEFF bl RegionEU868ChannelAdd - 854 .LVL111: - 855 .L106: - 965:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_CHANNEL_ADD( ); - 966:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_CHANNEL_ADD( ); - 967:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_CHANNEL_ADD( ); - 968:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_CHANNEL_ADD( ); - 969:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 970:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 971:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return LORAMAC_STATUS_PARAMETER_INVALID; - 972:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 973:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 974:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 856 .loc 1 974 0 - 857 @ sp needed - 858 000c 10BD pop {r4, pc} - 859 .LVL112: - 860 .L109: - 971:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 861 .loc 1 971 0 - 862 000e 0320 movs r0, #3 - 863 .LVL113: - 864 0010 FCE7 b .L106 - 865 .cfi_endproc - 866 .LFE101: - 868 .section .text.RegionChannelsRemove,"ax",%progbits - 869 .align 1 - 870 .global RegionChannelsRemove - ARM GAS /tmp/cciGOlRU.s page 33 - - - 871 .syntax unified - 872 .code 16 - 873 .thumb_func - 874 .fpu softvfp - 876 RegionChannelsRemove: - 877 .LFB102: - 975:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 976:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** bool RegionChannelsRemove( LoRaMacRegion_t region, ChannelRemoveParams_t* channelRemove ) - 977:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 878 .loc 1 977 0 - 879 .cfi_startproc - 880 @ args = 0, pretend = 0, frame = 0 - 881 @ frame_needed = 0, uses_anonymous_args = 0 - 882 .LVL114: - 883 0000 10B5 push {r4, lr} - 884 .LCFI20: - 885 .cfi_def_cfa_offset 8 - 886 .cfi_offset 4, -8 - 887 .cfi_offset 14, -4 - 978:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 888 .loc 1 978 0 - 889 0002 0528 cmp r0, #5 - 890 0004 01D0 beq .L115 - 979:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 980:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_CHANNEL_REMOVE( ); - 981:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_CHANNEL_REMOVE( ); - 982:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_CHANNEL_REMOVE( ); - 983:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_CHANNEL_REMOVE( ); - 984:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_CHANNEL_REMOVE( ); - 985:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_CHANNEL_REMOVE( ); - 986:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_CHANNEL_REMOVE( ); - 987:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_CHANNEL_REMOVE( ); - 988:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_CHANNEL_REMOVE( ); - 989:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_CHANNEL_REMOVE( ); - 990:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: - 991:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 992:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return false; - 891 .loc 1 992 0 - 892 0006 0020 movs r0, #0 - 893 .LVL115: - 894 .L111: - 993:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 994:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 995:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 895 .loc 1 995 0 - 896 @ sp needed - 897 0008 10BD pop {r4, pc} - 898 .LVL116: - 899 .L115: - 985:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_CHANNEL_REMOVE( ); - 900 .loc 1 985 0 - 901 000a 0800 movs r0, r1 - 902 .LVL117: - 903 000c FFF7FEFF bl RegionEU868ChannelsRemove - 904 .LVL118: - 905 0010 FAE7 b .L111 - 906 .cfi_endproc - ARM GAS /tmp/cciGOlRU.s page 34 - - - 907 .LFE102: - 909 .section .text.RegionSetContinuousWave,"ax",%progbits - 910 .align 1 - 911 .global RegionSetContinuousWave - 912 .syntax unified - 913 .code 16 - 914 .thumb_func - 915 .fpu softvfp - 917 RegionSetContinuousWave: - 918 .LFB103: - 996:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** - 997:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** void RegionSetContinuousWave( LoRaMacRegion_t region, ContinuousWaveParams_t* continuousWave ) - 998:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 919 .loc 1 998 0 - 920 .cfi_startproc - 921 @ args = 0, pretend = 0, frame = 0 - 922 @ frame_needed = 0, uses_anonymous_args = 0 - 923 .LVL119: - 924 0000 10B5 push {r4, lr} - 925 .LCFI21: - 926 .cfi_def_cfa_offset 8 - 927 .cfi_offset 4, -8 - 928 .cfi_offset 14, -4 - 999:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 929 .loc 1 999 0 - 930 0002 0528 cmp r0, #5 - 931 0004 00D0 beq .L119 - 932 .LVL120: - 933 .L116: -1000:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { -1001:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_SET_CONTINUOUS_WAVE( ); -1002:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_SET_CONTINUOUS_WAVE( ); -1003:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_SET_CONTINUOUS_WAVE( ); -1004:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_SET_CONTINUOUS_WAVE( ); -1005:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_SET_CONTINUOUS_WAVE( ); -1006:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_SET_CONTINUOUS_WAVE( ); -1007:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_SET_CONTINUOUS_WAVE( ); -1008:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_SET_CONTINUOUS_WAVE( ); -1009:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_SET_CONTINUOUS_WAVE( ); -1010:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_SET_CONTINUOUS_WAVE( ); -1011:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: -1012:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { -1013:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** break; -1014:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } -1015:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } -1016:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 934 .loc 1 1016 0 - 935 @ sp needed - 936 0006 10BD pop {r4, pc} - 937 .LVL121: - 938 .L119: -1006:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_SET_CONTINUOUS_WAVE( ); - 939 .loc 1 1006 0 - 940 0008 0800 movs r0, r1 - 941 .LVL122: - 942 000a FFF7FEFF bl RegionEU868SetContinuousWave - 943 .LVL123: - ARM GAS /tmp/cciGOlRU.s page 35 - - - 944 .loc 1 1016 0 - 945 000e FAE7 b .L116 - 946 .cfi_endproc - 947 .LFE103: - 949 .section .text.RegionApplyDrOffset,"ax",%progbits - 950 .align 1 - 951 .global RegionApplyDrOffset - 952 .syntax unified - 953 .code 16 - 954 .thumb_func - 955 .fpu softvfp - 957 RegionApplyDrOffset: - 958 .LFB104: -1017:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** -1018:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** uint8_t RegionApplyDrOffset( LoRaMacRegion_t region, uint8_t downlinkDwellTime, int8_t dr, int8_t d -1019:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { - 959 .loc 1 1019 0 - 960 .cfi_startproc - 961 @ args = 0, pretend = 0, frame = 0 - 962 @ frame_needed = 0, uses_anonymous_args = 0 - 963 .LVL124: - 964 0000 10B5 push {r4, lr} - 965 .LCFI22: - 966 .cfi_def_cfa_offset 8 - 967 .cfi_offset 4, -8 - 968 .cfi_offset 14, -4 - 969 0002 0C00 movs r4, r1 - 970 0004 1100 movs r1, r2 - 971 .LVL125: -1020:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** switch( region ) - 972 .loc 1 1020 0 - 973 0006 0528 cmp r0, #5 - 974 0008 01D0 beq .L125 -1021:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { -1022:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AS923_APPLY_DR_OFFSET( ); -1023:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** AU915_APPLY_DR_OFFSET( ); -1024:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN470_APPLY_DR_OFFSET( ); -1025:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** CN779_APPLY_DR_OFFSET( ); -1026:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU433_APPLY_DR_OFFSET( ); -1027:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** EU868_APPLY_DR_OFFSET( ); -1028:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_APPLY_DR_OFFSET( ); -1029:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** IN865_APPLY_DR_OFFSET( ); -1030:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_APPLY_DR_OFFSET( ); -1031:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** US915_HYBRID_APPLY_DR_OFFSET( ); -1032:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** default: -1033:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** { -1034:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** return dr; - 975 .loc 1 1034 0 - 976 000a D0B2 uxtb r0, r2 - 977 .LVL126: - 978 .L123: -1035:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } -1036:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } -1037:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** } - 979 .loc 1 1037 0 - 980 @ sp needed - 981 000c 10BD pop {r4, pc} - ARM GAS /tmp/cciGOlRU.s page 36 - - - 982 .LVL127: - 983 .L125: -1027:./Middlewares/Third_Party/Lora/Mac/region/Region.c **** KR920_APPLY_DR_OFFSET( ); - 984 .loc 1 1027 0 - 985 000e 1A00 movs r2, r3 - 986 .LVL128: - 987 0010 2000 movs r0, r4 - 988 .LVL129: - 989 0012 FFF7FEFF bl RegionEU868ApplyDrOffset - 990 .LVL130: - 991 0016 F9E7 b .L123 - 992 .cfi_endproc - 993 .LFE104: - 995 .text - 996 .Letext0: - 997 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 998 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 999 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 1000 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 1001 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 1002 .file 7 "/usr/arm-none-eabi/include/sys/_stdint.h" - 1003 .file 8 "/usr/arm-none-eabi/include/math.h" - 1004 .file 9 "Middlewares/Third_Party/Lora/Utilities/utilities.h" - 1005 .file 10 "Middlewares/Third_Party/Lora/Mac/LoRaMac.h" - 1006 .file 11 "./Middlewares/Third_Party/Lora/Mac/region/Region.h" - 1007 .file 12 "./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h" - ARM GAS /tmp/cciGOlRU.s page 37 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 Region.c - /tmp/cciGOlRU.s:16 .text.RegionIsActive:0000000000000000 $t - /tmp/cciGOlRU.s:23 .text.RegionIsActive:0000000000000000 RegionIsActive - /tmp/cciGOlRU.s:52 .text.RegionGetPhyParam:0000000000000000 $t - /tmp/cciGOlRU.s:59 .text.RegionGetPhyParam:0000000000000000 RegionGetPhyParam - /tmp/cciGOlRU.s:93 .text.RegionSetBandTxDone:0000000000000000 $t - /tmp/cciGOlRU.s:100 .text.RegionSetBandTxDone:0000000000000000 RegionSetBandTxDone - /tmp/cciGOlRU.s:132 .text.RegionInitDefaults:0000000000000000 $t - /tmp/cciGOlRU.s:139 .text.RegionInitDefaults:0000000000000000 RegionInitDefaults - /tmp/cciGOlRU.s:172 .text.RegionVerify:0000000000000000 $t - /tmp/cciGOlRU.s:179 .text.RegionVerify:0000000000000000 RegionVerify - /tmp/cciGOlRU.s:216 .text.RegionApplyCFList:0000000000000000 $t - /tmp/cciGOlRU.s:223 .text.RegionApplyCFList:0000000000000000 RegionApplyCFList - /tmp/cciGOlRU.s:256 .text.RegionChanMaskSet:0000000000000000 $t - /tmp/cciGOlRU.s:263 .text.RegionChanMaskSet:0000000000000000 RegionChanMaskSet - /tmp/cciGOlRU.s:297 .text.RegionAdrNext:0000000000000000 $t - /tmp/cciGOlRU.s:304 .text.RegionAdrNext:0000000000000000 RegionAdrNext - /tmp/cciGOlRU.s:345 .text.RegionComputeRxWindowParameters:0000000000000000 $t - /tmp/cciGOlRU.s:352 .text.RegionComputeRxWindowParameters:0000000000000000 RegionComputeRxWindowParameters - /tmp/cciGOlRU.s:391 .text.RegionRxConfig:0000000000000000 $t - /tmp/cciGOlRU.s:398 .text.RegionRxConfig:0000000000000000 RegionRxConfig - /tmp/cciGOlRU.s:435 .text.RegionTxConfig:0000000000000000 $t - /tmp/cciGOlRU.s:442 .text.RegionTxConfig:0000000000000000 RegionTxConfig - /tmp/cciGOlRU.s:481 .text.RegionLinkAdrReq:0000000000000000 $t - /tmp/cciGOlRU.s:488 .text.RegionLinkAdrReq:0000000000000000 RegionLinkAdrReq - /tmp/cciGOlRU.s:535 .text.RegionRxParamSetupReq:0000000000000000 $t - /tmp/cciGOlRU.s:542 .text.RegionRxParamSetupReq:0000000000000000 RegionRxParamSetupReq - /tmp/cciGOlRU.s:576 .text.RegionNewChannelReq:0000000000000000 $t - /tmp/cciGOlRU.s:583 .text.RegionNewChannelReq:0000000000000000 RegionNewChannelReq - /tmp/cciGOlRU.s:617 .text.RegionTxParamSetupReq:0000000000000000 $t - /tmp/cciGOlRU.s:624 .text.RegionTxParamSetupReq:0000000000000000 RegionTxParamSetupReq - /tmp/cciGOlRU.s:658 .text.RegionDlChannelReq:0000000000000000 $t - /tmp/cciGOlRU.s:665 .text.RegionDlChannelReq:0000000000000000 RegionDlChannelReq - /tmp/cciGOlRU.s:699 .text.RegionAlternateDr:0000000000000000 $t - /tmp/cciGOlRU.s:706 .text.RegionAlternateDr:0000000000000000 RegionAlternateDr - /tmp/cciGOlRU.s:740 .text.RegionCalcBackOff:0000000000000000 $t - /tmp/cciGOlRU.s:747 .text.RegionCalcBackOff:0000000000000000 RegionCalcBackOff - /tmp/cciGOlRU.s:780 .text.RegionNextChannel:0000000000000000 $t - /tmp/cciGOlRU.s:787 .text.RegionNextChannel:0000000000000000 RegionNextChannel - /tmp/cciGOlRU.s:828 .text.RegionChannelAdd:0000000000000000 $t - /tmp/cciGOlRU.s:835 .text.RegionChannelAdd:0000000000000000 RegionChannelAdd - /tmp/cciGOlRU.s:869 .text.RegionChannelsRemove:0000000000000000 $t - /tmp/cciGOlRU.s:876 .text.RegionChannelsRemove:0000000000000000 RegionChannelsRemove - /tmp/cciGOlRU.s:910 .text.RegionSetContinuousWave:0000000000000000 $t - /tmp/cciGOlRU.s:917 .text.RegionSetContinuousWave:0000000000000000 RegionSetContinuousWave - /tmp/cciGOlRU.s:950 .text.RegionApplyDrOffset:0000000000000000 $t - /tmp/cciGOlRU.s:957 .text.RegionApplyDrOffset:0000000000000000 RegionApplyDrOffset - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -RegionEU868GetPhyParam -RegionEU868SetBandTxDone -RegionEU868InitDefaults -RegionEU868Verify -RegionEU868ApplyCFList -RegionEU868ChanMaskSet - ARM GAS /tmp/cciGOlRU.s page 38 - - -RegionEU868AdrNext -RegionEU868ComputeRxWindowParameters -RegionEU868RxConfig -RegionEU868TxConfig -RegionEU868LinkAdrReq -RegionEU868RxParamSetupReq -RegionEU868NewChannelReq -RegionEU868TxParamSetupReq -RegionEU868DlChannelReq -RegionEU868AlternateDr -RegionEU868CalcBackOff -RegionEU868NextChannel -RegionEU868ChannelAdd -RegionEU868ChannelsRemove -RegionEU868SetContinuousWave -RegionEU868ApplyDrOffset diff --git a/build/RegionCommon.d b/build/RegionCommon.d deleted file mode 100644 index 2d7645a..0000000 --- a/build/RegionCommon.d +++ /dev/null @@ -1,35 +0,0 @@ -build/RegionCommon.d: \ - Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c \ - Middlewares/Third_Party/Lora/Mac/timer.h \ - Middlewares/Third_Party/Lora/Utilities/timeServer.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h \ - Middlewares/Third_Party/Lora/Mac/LoRaMac.h \ - Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h - -Middlewares/Third_Party/Lora/Mac/timer.h: - -Middlewares/Third_Party/Lora/Utilities/timeServer.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMac.h: - -Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h: diff --git a/build/RegionCommon.lst b/build/RegionCommon.lst deleted file mode 100644 index f1119a8..0000000 --- a/build/RegionCommon.lst +++ /dev/null @@ -1,1997 +0,0 @@ -ARM GAS /tmp/ccAkEbCV.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "RegionCommon.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.RegionCommonGetJoinDc,"ax",%progbits - 16 .align 1 - 17 .global RegionCommonGetJoinDc - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 RegionCommonGetJoinDc: - 24 .LFB83: - 25 .file 1 "./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c" - 1:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** /* - 2:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** / _____) _ | | - 3:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** (C)2013 Semtech - 8:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** ___ _____ _ ___ _ _____ ___ ___ ___ ___ - 9:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** / __|_ _/_\ / __| |/ / __/ _ \| _ \/ __| __| - 10:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** \__ \ | |/ _ \ (__| ' <| _| (_) | / (__| _| - 11:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** |___/ |_/_/ \_\___|_|\_\_| \___/|_|_\\___|___| - 12:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** embedded.connectivity.solutions=============== - 13:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 14:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** Description: LoRa MAC common region implementation - 15:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 16:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 17:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 18:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** Maintainer: Miguel Luis ( Semtech ), Gregory Cristian ( Semtech ) and Daniel Jaeckle ( STACKFORCE ) - 19:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** */ - 20:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 21:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #include - 22:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #include - 23:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #include - 24:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #include - 25:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 26:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #include "timer.h" - 27:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #include "utilities.h" - 28:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #include "LoRaMac.h" - 29:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #include "RegionCommon.h" - 30:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 31:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 32:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 33:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #define BACKOFF_DC_1_HOUR 100 - ARM GAS /tmp/ccAkEbCV.s page 2 - - - 34:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #define BACKOFF_DC_10_HOURS 1000 - 35:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** #define BACKOFF_DC_24_HOURS 10000 - 36:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 37:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 38:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 39:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** static uint8_t CountChannels( uint16_t mask, uint8_t nbBits ) - 40:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 41:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t nbActiveBits = 0; - 42:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 43:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** for( uint8_t j = 0; j < nbBits; j++ ) - 44:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 45:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( ( mask & ( 1 << j ) ) == ( 1 << j ) ) - 46:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 47:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nbActiveBits++; - 48:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 49:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 50:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return nbActiveBits; - 51:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 52:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 53:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 54:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 55:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint16_t RegionCommonGetJoinDc( TimerTime_t elapsedTime ) - 56:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 26 .loc 1 56 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 @ link register save eliminated. - 31 .LVL0: - 57:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint16_t dutyCycle = 0; - 58:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 59:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( elapsedTime < 3600000 ) - 32 .loc 1 59 0 - 33 0000 064B ldr r3, .L6 - 34 0002 9842 cmp r0, r3 - 35 0004 07D9 bls .L3 - 60:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 61:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** dutyCycle = BACKOFF_DC_1_HOUR; - 62:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 63:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** else if( elapsedTime < ( 3600000 + 36000000 ) ) - 36 .loc 1 63 0 - 37 0006 064B ldr r3, .L6+4 - 38 0008 9842 cmp r0, r3 - 39 000a 01D9 bls .L5 - 64:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 65:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** dutyCycle = BACKOFF_DC_10_HOURS; - 66:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 67:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** else - 68:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 69:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** dutyCycle = BACKOFF_DC_24_HOURS; - 40 .loc 1 69 0 - 41 000c 0548 ldr r0, .L6+8 - 42 .LVL1: - 43 000e 03E0 b .L2 - 44 .LVL2: - 45 .L5: - 65:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - ARM GAS /tmp/ccAkEbCV.s page 3 - - - 46 .loc 1 65 0 - 47 0010 FA20 movs r0, #250 - 48 .LVL3: - 49 0012 8000 lsls r0, r0, #2 - 50 0014 00E0 b .L2 - 51 .LVL4: - 52 .L3: - 61:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 53 .loc 1 61 0 - 54 0016 6420 movs r0, #100 - 55 .LVL5: - 56 .L2: - 70:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 71:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return dutyCycle; - 72:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 57 .loc 1 72 0 - 58 @ sp needed - 59 0018 7047 bx lr - 60 .L7: - 61 001a C046 .align 2 - 62 .L6: - 63 001c 7FEE3600 .word 3599999 - 64 0020 7F3F5C02 .word 39599999 - 65 0024 10270000 .word 10000 - 66 .cfi_endproc - 67 .LFE83: - 69 .section .text.RegionCommonChanVerifyDr,"ax",%progbits - 70 .align 1 - 71 .global RegionCommonChanVerifyDr - 72 .syntax unified - 73 .code 16 - 74 .thumb_func - 75 .fpu softvfp - 77 RegionCommonChanVerifyDr: - 78 .LFB84: - 73:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 74:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** bool RegionCommonChanVerifyDr( uint8_t nbChannels, uint16_t* channelsMask, int8_t dr, int8_t minDr, - 75:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 79 .loc 1 75 0 - 80 .cfi_startproc - 81 @ args = 8, pretend = 0, frame = 0 - 82 @ frame_needed = 0, uses_anonymous_args = 0 - 83 .LVL6: - 84 0000 F0B5 push {r4, r5, r6, r7, lr} - 85 .LCFI0: - 86 .cfi_def_cfa_offset 20 - 87 .cfi_offset 4, -20 - 88 .cfi_offset 5, -16 - 89 .cfi_offset 6, -12 - 90 .cfi_offset 7, -8 - 91 .cfi_offset 14, -4 - 92 0002 CE46 mov lr, r9 - 93 0004 4746 mov r7, r8 - 94 0006 80B5 push {r7, lr} - 95 .LCFI1: - 96 .cfi_def_cfa_offset 28 - 97 .cfi_offset 8, -28 - ARM GAS /tmp/ccAkEbCV.s page 4 - - - 98 .cfi_offset 9, -24 - 99 0008 8046 mov r8, r0 - 100 000a 07AC add r4, sp, #28 - 101 .LVL7: - 102 000c 2478 ldrb r4, [r4] - 103 .LVL8: - 104 000e 64B2 sxtb r4, r4 - 105 0010 0898 ldr r0, [sp, #32] - 106 .LVL9: - 107 0012 8146 mov r9, r0 - 108 .LVL10: - 109 .LBB16: - 110 .LBB17: - 76:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( RegionCommonValueInRange( dr, minDr, maxDr ) == 0 ) - 77:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 78:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return false; - 79:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 80:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 81:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** for( uint8_t i = 0, k = 0; i < nbChannels; i += 16, k++ ) - 82:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 83:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** for( uint8_t j = 0; j < 16; j++ ) - 84:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 85:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( ( ( channelsMask[k] & ( 1 << j ) ) != 0 ) ) - 86:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** {// Check datarate validity for enabled channels - 87:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( RegionCommonValueInRange( dr, ( channels[i + j].DrRange.Fields.Min & 0x0F ), - 88:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** ( channels[i + j].DrRange.Fields.Max & 0x0F ) ) = - 89:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 90:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // At least 1 channel has been found we can return OK. - 91:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return true; - 92:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 93:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 94:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 95:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 96:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return false; - 97:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 98:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 99:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t RegionCommonValueInRange( int8_t value, int8_t min, int8_t max ) - 100:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 101:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( ( value >= min ) && ( value <= max ) ) - 111 .loc 1 101 0 - 112 0014 9A42 cmp r2, r3 - 113 0016 2DDB blt .L14 - 114 0018 A242 cmp r2, r4 - 115 001a 02DC bgt .L18 - 116 .LBE17: - 117 .LBE16: - 118 .LBB18: - 81:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 119 .loc 1 81 0 - 120 001c 0025 movs r5, #0 - 121 001e 0026 movs r6, #0 - 122 0020 22E0 b .L10 - 123 .L18: - 124 .LBE18: - 78:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 125 .loc 1 78 0 - 126 0022 0020 movs r0, #0 - ARM GAS /tmp/ccAkEbCV.s page 5 - - - 127 0024 27E0 b .L9 - 128 .LVL11: - 129 .L11: - 130 .LBB23: - 131 .LBB19: - 83:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 132 .loc 1 83 0 discriminator 2 - 133 0026 0133 adds r3, r3, #1 - 134 .LVL12: - 135 0028 DBB2 uxtb r3, r3 - 136 .LVL13: - 137 .L13: - 83:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 138 .loc 1 83 0 is_stmt 0 discriminator 1 - 139 002a 0F2B cmp r3, #15 - 140 002c 18D8 bhi .L19 - 85:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** {// Check datarate validity for enabled channels - 141 .loc 1 85 0 is_stmt 1 - 142 002e 6C00 lsls r4, r5, #1 - 143 0030 645A ldrh r4, [r4, r1] - 144 0032 1C41 asrs r4, r4, r3 - 145 0034 E007 lsls r0, r4, #31 - 146 0036 F6D5 bpl .L11 - 87:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** ( channels[i + j].DrRange.Fields.Max & 0x0F ) ) = - 147 .loc 1 87 0 - 148 0038 F018 adds r0, r6, r3 - 149 003a 4400 lsls r4, r0, #1 - 150 003c 2018 adds r0, r4, r0 - 151 003e 8400 lsls r4, r0, #2 - 152 0040 4C44 add r4, r4, r9 - 153 0042 277A ldrb r7, [r4, #8] - 154 0044 3C01 lsls r4, r7, #4 - 155 0046 64B2 sxtb r4, r4 - 156 0048 2411 asrs r4, r4, #4 - 157 004a 0F20 movs r0, #15 - 158 004c 0440 ands r4, r0 - 88:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 159 .loc 1 88 0 - 160 004e 7FB2 sxtb r7, r7 - 161 0050 3F11 asrs r7, r7, #4 - 87:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** ( channels[i + j].DrRange.Fields.Max & 0x0F ) ) = - 162 .loc 1 87 0 - 163 0052 0740 ands r7, r0 - 164 .LVL14: - 165 .LBB20: - 166 .LBB21: - 167 .loc 1 101 0 - 168 0054 9442 cmp r4, r2 - 169 0056 E6DC bgt .L11 - 170 0058 9742 cmp r7, r2 - 171 005a E4DB blt .L11 - 172 .LBE21: - 173 .LBE20: - 91:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 174 .loc 1 91 0 - 175 005c 0120 movs r0, #1 - 176 005e 0AE0 b .L9 - ARM GAS /tmp/ccAkEbCV.s page 6 - - - 177 .LVL15: - 178 .L19: - 179 .LBE19: - 81:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 180 .loc 1 81 0 discriminator 2 - 181 0060 1036 adds r6, r6, #16 - 182 .LVL16: - 183 0062 F6B2 uxtb r6, r6 - 184 .LVL17: - 185 0064 0135 adds r5, r5, #1 - 186 .LVL18: - 187 0066 EDB2 uxtb r5, r5 - 188 .LVL19: - 189 .L10: - 81:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 190 .loc 1 81 0 is_stmt 0 discriminator 1 - 191 0068 4645 cmp r6, r8 - 192 006a 01D2 bcs .L20 - 193 .LBB22: - 83:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 194 .loc 1 83 0 is_stmt 1 - 195 006c 0023 movs r3, #0 - 196 006e DCE7 b .L13 - 197 .L20: - 198 .LBE22: - 199 .LBE23: - 96:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 200 .loc 1 96 0 - 201 0070 0020 movs r0, #0 - 202 .LBB24: - 203 0072 00E0 b .L9 - 204 .LVL20: - 205 .L14: - 206 .LBE24: - 78:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 207 .loc 1 78 0 - 208 0074 0020 movs r0, #0 - 209 .LVL21: - 210 .L9: - 97:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 211 .loc 1 97 0 - 212 @ sp needed - 213 0076 0CBC pop {r2, r3} - 214 0078 9046 mov r8, r2 - 215 007a 9946 mov r9, r3 - 216 007c F0BD pop {r4, r5, r6, r7, pc} - 217 .cfi_endproc - 218 .LFE84: - 220 .section .text.RegionCommonValueInRange,"ax",%progbits - 221 .align 1 - 222 .global RegionCommonValueInRange - 223 .syntax unified - 224 .code 16 - 225 .thumb_func - 226 .fpu softvfp - 228 RegionCommonValueInRange: - 229 .LFB85: - ARM GAS /tmp/ccAkEbCV.s page 7 - - - 100:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( ( value >= min ) && ( value <= max ) ) - 230 .loc 1 100 0 - 231 .cfi_startproc - 232 @ args = 0, pretend = 0, frame = 0 - 233 @ frame_needed = 0, uses_anonymous_args = 0 - 234 @ link register save eliminated. - 235 .LVL22: - 236 .loc 1 101 0 - 237 0000 8842 cmp r0, r1 - 238 0002 03DB blt .L23 - 239 .loc 1 101 0 is_stmt 0 discriminator 1 - 240 0004 9042 cmp r0, r2 - 241 0006 03DD ble .L24 - 102:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 103:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return 1; - 104:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 105:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return 0; - 242 .loc 1 105 0 is_stmt 1 - 243 0008 0020 movs r0, #0 - 244 .LVL23: - 245 000a 00E0 b .L22 - 246 .LVL24: - 247 .L23: - 248 000c 0020 movs r0, #0 - 249 .LVL25: - 250 .L22: - 106:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 251 .loc 1 106 0 - 252 @ sp needed - 253 000e 7047 bx lr - 254 .LVL26: - 255 .L24: - 103:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 256 .loc 1 103 0 - 257 0010 0120 movs r0, #1 - 258 .LVL27: - 259 0012 FCE7 b .L22 - 260 .cfi_endproc - 261 .LFE85: - 263 .section .text.RegionCommonChanDisable,"ax",%progbits - 264 .align 1 - 265 .global RegionCommonChanDisable - 266 .syntax unified - 267 .code 16 - 268 .thumb_func - 269 .fpu softvfp - 271 RegionCommonChanDisable: - 272 .LFB86: - 107:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 108:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** bool RegionCommonChanDisable( uint16_t* channelsMask, uint8_t id, uint8_t maxChannels ) - 109:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 273 .loc 1 109 0 - 274 .cfi_startproc - 275 @ args = 0, pretend = 0, frame = 0 - 276 @ frame_needed = 0, uses_anonymous_args = 0 - 277 .LVL28: - 278 0000 10B5 push {r4, lr} - ARM GAS /tmp/ccAkEbCV.s page 8 - - - 279 .LCFI2: - 280 .cfi_def_cfa_offset 8 - 281 .cfi_offset 4, -8 - 282 .cfi_offset 14, -4 - 110:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t index = id / 16; - 283 .loc 1 110 0 - 284 0002 0B09 lsrs r3, r1, #4 - 285 .LVL29: - 111:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 112:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( ( index > ( maxChannels / 16 ) ) || ( id >= maxChannels ) ) - 286 .loc 1 112 0 - 287 0004 1409 lsrs r4, r2, #4 - 288 0006 9C42 cmp r4, r3 - 289 0008 0CD3 bcc .L27 - 290 .loc 1 112 0 is_stmt 0 discriminator 1 - 291 000a 9142 cmp r1, r2 - 292 000c 0CD2 bcs .L28 - 113:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 114:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return false; - 115:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 116:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 117:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Deactivate channel - 118:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** channelsMask[index] &= ~( 1 << ( id % 16 ) ); - 293 .loc 1 118 0 is_stmt 1 - 294 000e 5B00 lsls r3, r3, #1 - 295 .LVL30: - 296 0010 C318 adds r3, r0, r3 - 297 0012 0F22 movs r2, #15 - 298 .LVL31: - 299 0014 0A40 ands r2, r1 - 300 0016 0121 movs r1, #1 - 301 .LVL32: - 302 0018 9140 lsls r1, r1, r2 - 303 001a 1A88 ldrh r2, [r3] - 304 001c 8A43 bics r2, r1 - 305 001e 1A80 strh r2, [r3] - 119:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 120:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return true; - 306 .loc 1 120 0 - 307 0020 0120 movs r0, #1 - 308 .LVL33: - 309 0022 00E0 b .L26 - 310 .LVL34: - 311 .L27: - 114:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 312 .loc 1 114 0 - 313 0024 0020 movs r0, #0 - 314 .LVL35: - 315 .L26: - 121:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 316 .loc 1 121 0 - 317 @ sp needed - 318 0026 10BD pop {r4, pc} - 319 .LVL36: - 320 .L28: - 114:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 321 .loc 1 114 0 - ARM GAS /tmp/ccAkEbCV.s page 9 - - - 322 0028 0020 movs r0, #0 - 323 .LVL37: - 324 002a FCE7 b .L26 - 325 .cfi_endproc - 326 .LFE86: - 328 .section .text.RegionCommonCountChannels,"ax",%progbits - 329 .align 1 - 330 .global RegionCommonCountChannels - 331 .syntax unified - 332 .code 16 - 333 .thumb_func - 334 .fpu softvfp - 336 RegionCommonCountChannels: - 337 .LFB87: - 122:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 123:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t RegionCommonCountChannels( uint16_t* channelsMask, uint8_t startIdx, uint8_t stopIdx ) - 124:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 338 .loc 1 124 0 - 339 .cfi_startproc - 340 @ args = 0, pretend = 0, frame = 0 - 341 @ frame_needed = 0, uses_anonymous_args = 0 - 342 .LVL38: - 343 0000 F0B5 push {r4, r5, r6, r7, lr} - 344 .LCFI3: - 345 .cfi_def_cfa_offset 20 - 346 .cfi_offset 4, -20 - 347 .cfi_offset 5, -16 - 348 .cfi_offset 6, -12 - 349 .cfi_offset 7, -8 - 350 .cfi_offset 14, -4 - 351 0002 9446 mov ip, r2 - 352 .LVL39: - 125:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t nbChannels = 0; - 126:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 127:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( channelsMask == NULL ) - 353 .loc 1 127 0 - 354 0004 0028 cmp r0, #0 - 355 0006 19D0 beq .L36 - 125:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t nbChannels = 0; - 356 .loc 1 125 0 - 357 0008 0022 movs r2, #0 - 358 .LVL40: - 359 000a 10E0 b .L31 - 360 .LVL41: - 361 .L33: - 362 .LBB25: - 363 .LBB26: - 364 .LBB27: - 365 .LBB28: - 43:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 366 .loc 1 43 0 - 367 000c 0133 adds r3, r3, #1 - 368 .LVL42: - 369 000e DBB2 uxtb r3, r3 - 370 .LVL43: - 371 .L32: - 372 0010 0F2B cmp r3, #15 - ARM GAS /tmp/ccAkEbCV.s page 10 - - - 373 0012 08D8 bhi .L37 - 45:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 374 .loc 1 45 0 - 375 0014 0124 movs r4, #1 - 376 0016 9C40 lsls r4, r4, r3 - 377 0018 2500 movs r5, r4 - 378 001a 3D40 ands r5, r7 - 379 001c AC42 cmp r4, r5 - 380 001e F5D1 bne .L33 - 47:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 381 .loc 1 47 0 - 382 0020 0136 adds r6, r6, #1 - 383 .LVL44: - 384 0022 F6B2 uxtb r6, r6 - 385 .LVL45: - 386 0024 F2E7 b .L33 - 387 .L37: - 388 .LVL46: - 389 .LBE28: - 390 .LBE27: - 391 .LBE26: - 128:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 129:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return 0; - 130:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 131:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 132:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** for( uint8_t i = startIdx; i < stopIdx; i++ ) - 133:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 134:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nbChannels += CountChannels( channelsMask[i], 16 ); - 392 .loc 1 134 0 - 393 0026 9219 adds r2, r2, r6 - 394 .LVL47: - 395 0028 D2B2 uxtb r2, r2 - 396 .LVL48: - 132:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 397 .loc 1 132 0 - 398 002a 0131 adds r1, r1, #1 - 399 .LVL49: - 400 002c C9B2 uxtb r1, r1 - 401 .LVL50: - 402 .L31: - 132:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 403 .loc 1 132 0 is_stmt 0 discriminator 1 - 404 002e 6145 cmp r1, ip - 405 0030 05D2 bcs .L30 - 406 .loc 1 134 0 is_stmt 1 discriminator 3 - 407 0032 4B00 lsls r3, r1, #1 - 408 0034 C75A ldrh r7, [r0, r3] - 409 .LVL51: - 410 .LBB31: - 411 .LBB30: - 412 .LBB29: - 43:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 413 .loc 1 43 0 discriminator 3 - 414 0036 0023 movs r3, #0 - 415 .LBE29: - 41:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 416 .loc 1 41 0 discriminator 3 - ARM GAS /tmp/ccAkEbCV.s page 11 - - - 417 0038 0026 movs r6, #0 - 418 003a E9E7 b .L32 - 419 .LVL52: - 420 .L36: - 421 .LBE30: - 422 .LBE31: - 423 .LBE25: - 129:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 424 .loc 1 129 0 - 425 003c 0022 movs r2, #0 - 426 .LVL53: - 427 .L30: - 135:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 136:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 137:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return nbChannels; - 138:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 428 .loc 1 138 0 - 429 003e 1000 movs r0, r2 - 430 .LVL54: - 431 @ sp needed - 432 0040 F0BD pop {r4, r5, r6, r7, pc} - 433 .cfi_endproc - 434 .LFE87: - 436 .section .text.RegionCommonChanMaskCopy,"ax",%progbits - 437 .align 1 - 438 .global RegionCommonChanMaskCopy - 439 .syntax unified - 440 .code 16 - 441 .thumb_func - 442 .fpu softvfp - 444 RegionCommonChanMaskCopy: - 445 .LFB88: - 139:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 140:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** void RegionCommonChanMaskCopy( uint16_t* channelsMaskDest, uint16_t* channelsMaskSrc, uint8_t len ) - 141:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 446 .loc 1 141 0 - 447 .cfi_startproc - 448 @ args = 0, pretend = 0, frame = 0 - 449 @ frame_needed = 0, uses_anonymous_args = 0 - 450 .LVL55: - 451 0000 30B5 push {r4, r5, lr} - 452 .LCFI4: - 453 .cfi_def_cfa_offset 12 - 454 .cfi_offset 4, -12 - 455 .cfi_offset 5, -8 - 456 .cfi_offset 14, -4 - 142:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( ( channelsMaskDest != NULL ) && ( channelsMaskSrc != NULL ) ) - 457 .loc 1 142 0 - 458 0002 0028 cmp r0, #0 - 459 0004 0AD0 beq .L38 - 460 .loc 1 142 0 is_stmt 0 discriminator 1 - 461 0006 0029 cmp r1, #0 - 462 0008 08D0 beq .L38 - 463 .LBB32: - 143:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 144:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** for( uint8_t i = 0; i < len; i++ ) - 464 .loc 1 144 0 is_stmt 1 - ARM GAS /tmp/ccAkEbCV.s page 12 - - - 465 000a 0023 movs r3, #0 - 466 000c 04E0 b .L40 - 467 .LVL56: - 468 .L41: - 145:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 146:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** channelsMaskDest[i] = channelsMaskSrc[i]; - 469 .loc 1 146 0 discriminator 3 - 470 000e 5C00 lsls r4, r3, #1 - 471 0010 0D5B ldrh r5, [r1, r4] - 472 0012 0553 strh r5, [r0, r4] - 144:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 473 .loc 1 144 0 discriminator 3 - 474 0014 0133 adds r3, r3, #1 - 475 .LVL57: - 476 0016 DBB2 uxtb r3, r3 - 477 .LVL58: - 478 .L40: - 144:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 479 .loc 1 144 0 is_stmt 0 discriminator 1 - 480 0018 9342 cmp r3, r2 - 481 001a F8D3 bcc .L41 - 482 .LVL59: - 483 .L38: - 484 .LBE32: - 147:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 148:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 149:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 485 .loc 1 149 0 is_stmt 1 - 486 @ sp needed - 487 001c 30BD pop {r4, r5, pc} - 488 .cfi_endproc - 489 .LFE88: - 491 .section .text.RegionCommonSetBandTxDone,"ax",%progbits - 492 .align 1 - 493 .global RegionCommonSetBandTxDone - 494 .syntax unified - 495 .code 16 - 496 .thumb_func - 497 .fpu softvfp - 499 RegionCommonSetBandTxDone: - 500 .LFB89: - 150:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 151:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** void RegionCommonSetBandTxDone( bool joined, Band_t* band, TimerTime_t lastTxDone ) - 152:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 501 .loc 1 152 0 - 502 .cfi_startproc - 503 @ args = 0, pretend = 0, frame = 0 - 504 @ frame_needed = 0, uses_anonymous_args = 0 - 505 @ link register save eliminated. - 506 .LVL60: - 153:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( joined == true ) - 507 .loc 1 153 0 - 508 0000 0028 cmp r0, #0 - 509 0002 02D1 bne .L46 - 154:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 155:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** band->LastTxDoneTime = lastTxDone; - 156:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - ARM GAS /tmp/ccAkEbCV.s page 13 - - - 157:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** else - 158:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 159:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** band->LastTxDoneTime = lastTxDone; - 510 .loc 1 159 0 - 511 0004 8A60 str r2, [r1, #8] - 160:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** band->LastJoinTxDoneTime = lastTxDone; - 512 .loc 1 160 0 - 513 0006 4A60 str r2, [r1, #4] - 514 .L43: - 161:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 162:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 515 .loc 1 162 0 - 516 @ sp needed - 517 0008 7047 bx lr - 518 .L46: - 155:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 519 .loc 1 155 0 - 520 000a 8A60 str r2, [r1, #8] - 521 000c FCE7 b .L43 - 522 .cfi_endproc - 523 .LFE89: - 525 .section .text.RegionCommonUpdateBandTimeOff,"ax",%progbits - 526 .align 1 - 527 .global RegionCommonUpdateBandTimeOff - 528 .syntax unified - 529 .code 16 - 530 .thumb_func - 531 .fpu softvfp - 533 RegionCommonUpdateBandTimeOff: - 534 .LFB90: - 163:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 164:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** TimerTime_t RegionCommonUpdateBandTimeOff( bool joined, bool dutyCycle, Band_t* bands, uint8_t nbBa - 165:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 535 .loc 1 165 0 - 536 .cfi_startproc - 537 @ args = 0, pretend = 0, frame = 0 - 538 @ frame_needed = 0, uses_anonymous_args = 0 - 539 .LVL61: - 540 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 541 .LCFI5: - 542 .cfi_def_cfa_offset 24 - 543 .cfi_offset 3, -24 - 544 .cfi_offset 4, -20 - 545 .cfi_offset 5, -16 - 546 .cfi_offset 6, -12 - 547 .cfi_offset 7, -8 - 548 .cfi_offset 14, -4 - 549 0002 DE46 mov lr, fp - 550 0004 5746 mov r7, r10 - 551 0006 4E46 mov r6, r9 - 552 0008 4546 mov r5, r8 - 553 000a E0B5 push {r5, r6, r7, lr} - 554 .LCFI6: - 555 .cfi_def_cfa_offset 40 - 556 .cfi_offset 8, -40 - 557 .cfi_offset 9, -36 - 558 .cfi_offset 10, -32 - ARM GAS /tmp/ccAkEbCV.s page 14 - - - 559 .cfi_offset 11, -28 - 560 000c 8046 mov r8, r0 - 561 000e 0E00 movs r6, r1 - 562 0010 9146 mov r9, r2 - 563 0012 1F00 movs r7, r3 - 564 .LVL62: - 565 .LBB33: - 166:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** TimerTime_t nextTxDelay = ( TimerTime_t )( -1 ); - 167:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 168:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Update bands Time OFF - 169:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** for( uint8_t i = 0; i < nbBands; i++ ) - 566 .loc 1 169 0 - 567 0014 0024 movs r4, #0 - 568 .LBE33: - 166:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** TimerTime_t nextTxDelay = ( TimerTime_t )( -1 ); - 569 .loc 1 166 0 - 570 0016 0123 movs r3, #1 - 571 .LVL63: - 572 0018 5B42 rsbs r3, r3, #0 - 573 001a 9A46 mov r10, r3 - 574 .LBB35: - 575 .loc 1 169 0 - 576 001c 37E0 b .L48 - 577 .LVL64: - 578 .L66: - 579 .LBB34: - 170:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 171:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( joined == false ) - 172:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 173:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint32_t txDoneTime = MAX( TimerGetElapsedTime( bands[i].LastJoinTxDoneTime ), - 580 .loc 1 173 0 - 581 001e 2501 lsls r5, r4, #4 - 582 0020 4D44 add r5, r5, r9 - 583 0022 6868 ldr r0, [r5, #4] - 584 0024 FFF7FEFF bl TimerGetElapsedTime - 585 .LVL65: - 586 0028 8346 mov fp, r0 - 587 002a 002E cmp r6, #0 - 588 002c 12D1 bne .L61 - 589 002e 0020 movs r0, #0 - 590 .L50: - 591 .loc 1 173 0 is_stmt 0 discriminator 4 - 592 0030 8345 cmp fp, r0 - 593 0032 13D8 bhi .L62 - 594 .loc 1 173 0 discriminator 6 - 595 0034 002E cmp r6, #0 - 596 0036 15D1 bne .L63 - 597 .loc 1 173 0 - 598 0038 0020 movs r0, #0 - 599 .L52: - 600 .LVL66: - 174:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** ( dutyCycle == true ) ? TimerGetElapsedTime( bands[i].LastT - 175:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 176:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( bands[i].TimeOff <= txDoneTime ) - 601 .loc 1 176 0 is_stmt 1 discriminator 12 - 602 003a EB68 ldr r3, [r5, #12] - 603 003c 8342 cmp r3, r0 - ARM GAS /tmp/ccAkEbCV.s page 15 - - - 604 003e 01D8 bhi .L53 - 177:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 178:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** bands[i].TimeOff = 0; - 605 .loc 1 178 0 - 606 0040 0023 movs r3, #0 - 607 0042 EB60 str r3, [r5, #12] - 608 .L53: - 179:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 180:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( bands[i].TimeOff != 0 ) - 609 .loc 1 180 0 - 610 0044 EB68 ldr r3, [r5, #12] - 611 0046 002B cmp r3, #0 - 612 0048 1FD0 beq .L54 - 181:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 182:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nextTxDelay = MIN( bands[i].TimeOff - txDoneTime, nextTxDelay ); - 613 .loc 1 182 0 - 614 004a 1B1A subs r3, r3, r0 - 615 004c 9A45 cmp r10, r3 - 616 004e 1CD9 bls .L54 - 617 0050 9A46 mov r10, r3 - 618 .LVL67: - 619 0052 1AE0 b .L54 - 620 .LVL68: - 621 .L61: - 173:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** ( dutyCycle == true ) ? TimerGetElapsedTime( bands[i].LastT - 622 .loc 1 173 0 discriminator 1 - 623 0054 A868 ldr r0, [r5, #8] - 624 0056 FFF7FEFF bl TimerGetElapsedTime - 625 .LVL69: - 626 005a E9E7 b .L50 - 627 .L62: - 173:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** ( dutyCycle == true ) ? TimerGetElapsedTime( bands[i].LastT - 628 .loc 1 173 0 is_stmt 0 discriminator 5 - 629 005c 6868 ldr r0, [r5, #4] - 630 005e FFF7FEFF bl TimerGetElapsedTime - 631 .LVL70: - 632 0062 EAE7 b .L52 - 633 .L63: - 173:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** ( dutyCycle == true ) ? TimerGetElapsedTime( bands[i].LastT - 634 .loc 1 173 0 discriminator 8 - 635 0064 A868 ldr r0, [r5, #8] - 636 0066 FFF7FEFF bl TimerGetElapsedTime - 637 .LVL71: - 638 006a E6E7 b .L52 - 639 .L67: - 640 .LBE34: - 183:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 184:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 185:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** else - 186:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 187:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( dutyCycle == true ) - 188:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 189:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( bands[i].TimeOff <= TimerGetElapsedTime( bands[i].LastTxDoneTime ) ) - 641 .loc 1 189 0 is_stmt 1 - 642 006c 2501 lsls r5, r4, #4 - 643 006e 4D44 add r5, r5, r9 - 644 0070 EB68 ldr r3, [r5, #12] - ARM GAS /tmp/ccAkEbCV.s page 16 - - - 645 0072 9B46 mov fp, r3 - 646 0074 A868 ldr r0, [r5, #8] - 647 0076 FFF7FEFF bl TimerGetElapsedTime - 648 .LVL72: - 649 007a 8345 cmp fp, r0 - 650 007c 01D8 bhi .L57 - 190:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 191:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** bands[i].TimeOff = 0; - 651 .loc 1 191 0 - 652 007e 0023 movs r3, #0 - 653 0080 EB60 str r3, [r5, #12] - 654 .L57: - 192:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 193:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( bands[i].TimeOff != 0 ) - 655 .loc 1 193 0 - 656 0082 EB68 ldr r3, [r5, #12] - 657 0084 9B46 mov fp, r3 - 658 0086 002B cmp r3, #0 - 659 0088 0FD1 bne .L64 - 660 .LVL73: - 661 .L54: - 169:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 662 .loc 1 169 0 discriminator 2 - 663 008a 0134 adds r4, r4, #1 - 664 .LVL74: - 665 008c E4B2 uxtb r4, r4 - 666 .LVL75: - 667 .L48: - 169:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 668 .loc 1 169 0 is_stmt 0 discriminator 1 - 669 008e BC42 cmp r4, r7 - 670 0090 1BD2 bcs .L65 - 171:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 671 .loc 1 171 0 is_stmt 1 - 672 0092 4346 mov r3, r8 - 673 0094 002B cmp r3, #0 - 674 0096 C2D0 beq .L66 - 187:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 675 .loc 1 187 0 - 676 0098 002E cmp r6, #0 - 677 009a E7D1 bne .L67 - 678 .LVL76: - 194:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 195:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nextTxDelay = MIN( bands[i].TimeOff - TimerGetElapsedTime( bands[i].LastTxDoneT - 196:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nextTxDelay ); - 197:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 198:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 199:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** else - 200:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 201:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nextTxDelay = 0; - 202:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** bands[i].TimeOff = 0; - 679 .loc 1 202 0 - 680 009c 2301 lsls r3, r4, #4 - 681 009e 4B44 add r3, r3, r9 - 682 00a0 0022 movs r2, #0 - 683 00a2 DA60 str r2, [r3, #12] - 201:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** bands[i].TimeOff = 0; - ARM GAS /tmp/ccAkEbCV.s page 17 - - - 684 .loc 1 201 0 - 685 00a4 0023 movs r3, #0 - 686 00a6 9A46 mov r10, r3 - 687 00a8 EFE7 b .L54 - 688 .LVL77: - 689 .L64: - 195:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nextTxDelay ); - 690 .loc 1 195 0 - 691 00aa A868 ldr r0, [r5, #8] - 692 00ac FFF7FEFF bl TimerGetElapsedTime - 693 .LVL78: - 694 00b0 5B46 mov r3, fp - 695 00b2 181A subs r0, r3, r0 - 696 00b4 5045 cmp r0, r10 - 697 00b6 E8D2 bcs .L54 - 195:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nextTxDelay ); - 698 .loc 1 195 0 is_stmt 0 discriminator 1 - 699 00b8 EB68 ldr r3, [r5, #12] - 700 00ba 9A46 mov r10, r3 - 701 .LVL79: - 702 00bc A868 ldr r0, [r5, #8] - 703 00be FFF7FEFF bl TimerGetElapsedTime - 704 .LVL80: - 705 00c2 5346 mov r3, r10 - 706 00c4 1B1A subs r3, r3, r0 - 707 00c6 9A46 mov r10, r3 - 708 00c8 DFE7 b .L54 - 709 .LVL81: - 710 .L65: - 711 .LBE35: - 203:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 204:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 205:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 206:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return nextTxDelay; - 207:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 712 .loc 1 207 0 is_stmt 1 - 713 00ca 5046 mov r0, r10 - 714 @ sp needed - 715 .LVL82: - 716 .LVL83: - 717 .LVL84: - 718 00cc 3CBC pop {r2, r3, r4, r5} - 719 00ce 9046 mov r8, r2 - 720 00d0 9946 mov r9, r3 - 721 00d2 A246 mov r10, r4 - 722 00d4 AB46 mov fp, r5 - 723 00d6 F8BD pop {r3, r4, r5, r6, r7, pc} - 724 .cfi_endproc - 725 .LFE90: - 727 .section .text.RegionCommonParseLinkAdrReq,"ax",%progbits - 728 .align 1 - 729 .global RegionCommonParseLinkAdrReq - 730 .syntax unified - 731 .code 16 - 732 .thumb_func - 733 .fpu softvfp - 735 RegionCommonParseLinkAdrReq: - ARM GAS /tmp/ccAkEbCV.s page 18 - - - 736 .LFB91: - 208:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 209:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t RegionCommonParseLinkAdrReq( uint8_t* payload, RegionCommonLinkAdrParams_t* linkAdrParams ) - 210:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 737 .loc 1 210 0 - 738 .cfi_startproc - 739 @ args = 0, pretend = 0, frame = 0 - 740 @ frame_needed = 0, uses_anonymous_args = 0 - 741 .LVL85: - 742 0000 10B5 push {r4, lr} - 743 .LCFI7: - 744 .cfi_def_cfa_offset 8 - 745 .cfi_offset 4, -8 - 746 .cfi_offset 14, -4 - 747 .LVL86: - 211:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t retIndex = 0; - 212:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 213:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( payload[0] == SRV_MAC_LINK_ADR_REQ ) - 748 .loc 1 213 0 - 749 0002 0378 ldrb r3, [r0] - 750 0004 032B cmp r3, #3 - 751 0006 01D0 beq .L71 - 211:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t retIndex = 0; - 752 .loc 1 211 0 - 753 0008 0020 movs r0, #0 - 754 .LVL87: - 755 .L69: - 214:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 215:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Parse datarate and tx power - 216:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->Datarate = payload[1]; - 217:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->TxPower = linkAdrParams->Datarate & 0x0F; - 218:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->Datarate = ( linkAdrParams->Datarate >> 4 ) & 0x0F; - 219:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Parse ChMask - 220:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->ChMask = ( uint16_t )payload[2]; - 221:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->ChMask |= ( uint16_t )payload[3] << 8; - 222:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Parse ChMaskCtrl and nbRep - 223:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->NbRep = payload[4]; - 224:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->ChMaskCtrl = ( linkAdrParams->NbRep >> 4 ) & 0x07; - 225:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->NbRep &= 0x0F; - 226:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 227:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // LinkAdrReq has 4 bytes length + 1 byte CMD - 228:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** retIndex = 5; - 229:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 230:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return retIndex; - 231:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 756 .loc 1 231 0 - 757 @ sp needed - 758 000a 10BD pop {r4, pc} - 759 .LVL88: - 760 .L71: - 216:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->TxPower = linkAdrParams->Datarate & 0x0F; - 761 .loc 1 216 0 - 762 000c 4278 ldrb r2, [r0, #1] - 763 000e 54B2 sxtb r4, r2 - 217:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->Datarate = ( linkAdrParams->Datarate >> 4 ) & 0x0F; - 764 .loc 1 217 0 - 765 0010 0C33 adds r3, r3, #12 - ARM GAS /tmp/ccAkEbCV.s page 19 - - - 766 0012 1C40 ands r4, r3 - 767 0014 8C70 strb r4, [r1, #2] - 218:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Parse ChMask - 768 .loc 1 218 0 - 769 0016 1209 lsrs r2, r2, #4 - 770 0018 4A70 strb r2, [r1, #1] - 220:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->ChMask |= ( uint16_t )payload[3] << 8; - 771 .loc 1 220 0 - 772 001a 8278 ldrb r2, [r0, #2] - 773 001c 8A80 strh r2, [r1, #4] - 221:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Parse ChMaskCtrl and nbRep - 774 .loc 1 221 0 - 775 001e C478 ldrb r4, [r0, #3] - 776 0020 2402 lsls r4, r4, #8 - 777 0022 2243 orrs r2, r4 - 778 0024 8A80 strh r2, [r1, #4] - 223:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->ChMaskCtrl = ( linkAdrParams->NbRep >> 4 ) & 0x07; - 779 .loc 1 223 0 - 780 0026 0079 ldrb r0, [r0, #4] - 781 .LVL89: - 224:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** linkAdrParams->NbRep &= 0x0F; - 782 .loc 1 224 0 - 783 0028 0409 lsrs r4, r0, #4 - 784 002a 0722 movs r2, #7 - 785 002c 2240 ands r2, r4 - 786 002e CA70 strb r2, [r1, #3] - 225:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 787 .loc 1 225 0 - 788 0030 0340 ands r3, r0 - 789 0032 0B70 strb r3, [r1] - 790 .LVL90: - 228:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 791 .loc 1 228 0 - 792 0034 0520 movs r0, #5 - 793 0036 E8E7 b .L69 - 794 .cfi_endproc - 795 .LFE91: - 797 .section .text.RegionCommonLinkAdrReqVerifyParams,"ax",%progbits - 798 .align 1 - 799 .global RegionCommonLinkAdrReqVerifyParams - 800 .syntax unified - 801 .code 16 - 802 .thumb_func - 803 .fpu softvfp - 805 RegionCommonLinkAdrReqVerifyParams: - 806 .LFB92: - 232:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 233:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t RegionCommonLinkAdrReqVerifyParams( RegionCommonLinkAdrReqVerifyParams_t* verifyParams, int - 234:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 807 .loc 1 234 0 - 808 .cfi_startproc - 809 @ args = 0, pretend = 0, frame = 0 - 810 @ frame_needed = 0, uses_anonymous_args = 0 - 811 .LVL91: - 812 0000 F0B5 push {r4, r5, r6, r7, lr} - 813 .LCFI8: - 814 .cfi_def_cfa_offset 20 - ARM GAS /tmp/ccAkEbCV.s page 20 - - - 815 .cfi_offset 4, -20 - 816 .cfi_offset 5, -16 - 817 .cfi_offset 6, -12 - 818 .cfi_offset 7, -8 - 819 .cfi_offset 14, -4 - 820 0002 DE46 mov lr, fp - 821 0004 5746 mov r7, r10 - 822 0006 4E46 mov r6, r9 - 823 0008 4546 mov r5, r8 - 824 000a E0B5 push {r5, r6, r7, lr} - 825 .LCFI9: - 826 .cfi_def_cfa_offset 36 - 827 .cfi_offset 8, -36 - 828 .cfi_offset 9, -32 - 829 .cfi_offset 10, -28 - 830 .cfi_offset 11, -24 - 831 000c 83B0 sub sp, sp, #12 - 832 .LCFI10: - 833 .cfi_def_cfa_offset 48 - 834 000e 0400 movs r4, r0 - 835 0010 8B46 mov fp, r1 - 836 0012 9246 mov r10, r2 - 837 0014 9946 mov r9, r3 - 235:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t status = verifyParams->Status; - 838 .loc 1 235 0 - 839 0016 0578 ldrb r5, [r0] - 840 .LVL92: - 236:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** int8_t datarate = verifyParams->Datarate; - 841 .loc 1 236 0 - 842 0018 0223 movs r3, #2 - 843 .LVL93: - 844 001a C356 ldrsb r3, [r0, r3] - 845 001c 9846 mov r8, r3 - 846 .LVL94: - 237:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** int8_t txPower = verifyParams->TxPower; - 847 .loc 1 237 0 - 848 001e 0326 movs r6, #3 - 849 0020 8657 ldrsb r6, [r0, r6] - 850 .LVL95: - 238:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** int8_t nbRepetitions = verifyParams->NbRep; - 851 .loc 1 238 0 - 852 0022 0427 movs r7, #4 - 853 0024 C757 ldrsb r7, [r0, r7] - 854 .LVL96: - 239:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 240:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Handle the case when ADR is off. - 241:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( verifyParams->AdrEnabled == false ) - 855 .loc 1 241 0 - 856 0026 4378 ldrb r3, [r0, #1] - 857 0028 002B cmp r3, #0 - 858 002a 0CD1 bne .L73 - 242:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 243:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // When ADR is off, we are allowed to change the channels mask and the NbRep, - 244:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // if the datarate and the TX power of the LinkAdrReq are set to 0x0F. - 245:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( ( verifyParams->Datarate != 0x0F ) || ( verifyParams->TxPower != 0x0F ) ) - 859 .loc 1 245 0 - 860 002c 0223 movs r3, #2 - ARM GAS /tmp/ccAkEbCV.s page 21 - - - 861 002e C25E ldrsh r2, [r0, r3] - 862 .LVL97: - 863 0030 204B ldr r3, .L82 - 864 0032 9A42 cmp r2, r3 - 865 0034 02D0 beq .L74 - 866 .LVL98: - 246:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 247:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** status = 0; - 248:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nbRepetitions = verifyParams->CurrentNbRep; - 867 .loc 1 248 0 - 868 0036 0727 movs r7, #7 - 869 .LVL99: - 870 0038 C757 ldrsb r7, [r0, r7] - 871 .LVL100: - 247:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nbRepetitions = verifyParams->CurrentNbRep; - 872 .loc 1 247 0 - 873 003a 0025 movs r5, #0 - 874 .LVL101: - 875 .L74: - 249:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 250:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Get the current datarate and tx power - 251:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** datarate = verifyParams->CurrentDatarate; - 876 .loc 1 251 0 - 877 003c 0523 movs r3, #5 - 878 003e E356 ldrsb r3, [r4, r3] - 879 0040 9846 mov r8, r3 - 880 .LVL102: - 252:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** txPower = verifyParams->CurrentTxPower; - 881 .loc 1 252 0 - 882 0042 0626 movs r6, #6 - 883 .LVL103: - 884 0044 A657 ldrsb r6, [r4, r6] - 885 .LVL104: - 886 .L73: - 253:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 254:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 255:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( status != 0 ) - 887 .loc 1 255 0 - 888 0046 002D cmp r5, #0 - 889 0048 10D1 bne .L80 - 890 .LVL105: - 891 .L75: - 256:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 257:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Verify datarate. The variable phyParam. Value contains the minimum allowed datarate. - 258:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( RegionCommonChanVerifyDr( verifyParams->NbChannels, verifyParams->ChannelsMask, datarat - 259:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** verifyParams->MinDatarate, verifyParams->MaxDatarate, verifyP - 260:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 261:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** status &= 0xFD; // Datarate KO - 262:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 263:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 264:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Verify tx power - 265:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( RegionCommonValueInRange( txPower, verifyParams->MaxTxPower, verifyParams->MinTxPower ) - 266:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 267:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Verify if the maximum TX power is exceeded - 268:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( verifyParams->MaxTxPower > txPower ) - 269:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { // Apply maximum TX power. Accept TX power. - 270:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** txPower = verifyParams->MaxTxPower; - ARM GAS /tmp/ccAkEbCV.s page 22 - - - 271:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 272:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** else - 273:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 274:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** status &= 0xFB; // TxPower KO - 275:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 276:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 277:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 278:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 279:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // If the status is ok, verify the NbRep - 280:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( status == 0x07 ) - 892 .loc 1 280 0 - 893 004a 072D cmp r5, #7 - 894 004c 2DD0 beq .L81 - 895 .L78: - 281:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 282:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( nbRepetitions == 0 ) - 283:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { // Keep the current one - 284:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** nbRepetitions = verifyParams->CurrentNbRep; - 285:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 286:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 287:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 288:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Apply changes - 289:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** *dr = datarate; - 896 .loc 1 289 0 - 897 004e 5B46 mov r3, fp - 898 0050 4246 mov r2, r8 - 899 0052 1A70 strb r2, [r3] - 290:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** *txPow = txPower; - 900 .loc 1 290 0 - 901 0054 5346 mov r3, r10 - 902 0056 1E70 strb r6, [r3] - 291:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** *nbRep = nbRepetitions; - 903 .loc 1 291 0 - 904 0058 4B46 mov r3, r9 - 905 005a 1F70 strb r7, [r3] - 292:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 293:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return status; - 294:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 906 .loc 1 294 0 - 907 005c 2800 movs r0, r5 - 908 005e 03B0 add sp, sp, #12 - 909 @ sp needed - 910 .LVL106: - 911 .LVL107: - 912 .LVL108: - 913 .LVL109: - 914 .LVL110: - 915 .LVL111: - 916 .LVL112: - 917 .LVL113: - 918 0060 3CBC pop {r2, r3, r4, r5} - 919 0062 9046 mov r8, r2 - 920 0064 9946 mov r9, r3 - 921 0066 A246 mov r10, r4 - 922 0068 AB46 mov fp, r5 - 923 006a F0BD pop {r4, r5, r6, r7, pc} - 924 .LVL114: - ARM GAS /tmp/ccAkEbCV.s page 23 - - - 925 .L80: - 258:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** verifyParams->MinDatarate, verifyParams->MaxDatarate, verifyP - 926 .loc 1 258 0 - 927 006c 1023 movs r3, #16 - 928 006e E356 ldrsb r3, [r4, r3] - 929 0070 207A ldrb r0, [r4, #8] - 930 .LVL115: - 931 0072 6269 ldr r2, [r4, #20] - 932 0074 0192 str r2, [sp, #4] - 933 0076 1122 movs r2, #17 - 934 0078 A256 ldrsb r2, [r4, r2] - 935 007a 0092 str r2, [sp] - 936 007c 4246 mov r2, r8 - 937 007e E168 ldr r1, [r4, #12] - 938 .LVL116: - 939 0080 FFF7FEFF bl RegionCommonChanVerifyDr - 940 .LVL117: - 941 0084 0028 cmp r0, #0 - 942 0086 01D1 bne .L76 - 261:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 943 .loc 1 261 0 - 944 0088 0223 movs r3, #2 - 945 008a 9D43 bics r5, r3 - 946 .LVL118: - 947 .L76: - 265:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 948 .loc 1 265 0 - 949 008c 1923 movs r3, #25 - 950 008e E356 ldrsb r3, [r4, r3] - 951 0090 1822 movs r2, #24 - 952 0092 A256 ldrsb r2, [r4, r2] - 953 .LVL119: - 954 .LBB36: - 955 .LBB37: - 101:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 956 .loc 1 101 0 - 957 0094 B342 cmp r3, r6 - 958 0096 01DC bgt .L77 - 959 0098 B242 cmp r2, r6 - 960 009a D6DA bge .L75 - 961 .L77: - 962 .LVL120: - 963 .LBE37: - 964 .LBE36: - 268:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { // Apply maximum TX power. Accept TX power. - 965 .loc 1 268 0 - 966 009c B342 cmp r3, r6 - 967 009e 02DC bgt .L79 - 274:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 968 .loc 1 274 0 - 969 00a0 0423 movs r3, #4 - 970 00a2 9D43 bics r5, r3 - 971 .LVL121: - 972 00a4 D1E7 b .L75 - 973 .L79: - 270:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 974 .loc 1 270 0 - ARM GAS /tmp/ccAkEbCV.s page 24 - - - 975 00a6 1E00 movs r6, r3 - 976 .LVL122: - 977 00a8 CFE7 b .L75 - 978 .LVL123: - 979 .L81: - 282:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { // Keep the current one - 980 .loc 1 282 0 - 981 00aa 002F cmp r7, #0 - 982 00ac CFD1 bne .L78 - 284:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 983 .loc 1 284 0 - 984 00ae 0727 movs r7, #7 - 985 .LVL124: - 986 00b0 E757 ldrsb r7, [r4, r7] - 987 .LVL125: - 988 00b2 CCE7 b .L78 - 989 .L83: - 990 .align 2 - 991 .L82: - 992 00b4 0F0F0000 .word 3855 - 993 .cfi_endproc - 994 .LFE92: - 996 .global __aeabi_i2d - 997 .global __aeabi_ui2d - 998 .global __aeabi_ddiv - 999 .global __aeabi_dmul - 1000 .section .text.RegionCommonComputeSymbolTimeLoRa,"ax",%progbits - 1001 .align 1 - 1002 .global RegionCommonComputeSymbolTimeLoRa - 1003 .syntax unified - 1004 .code 16 - 1005 .thumb_func - 1006 .fpu softvfp - 1008 RegionCommonComputeSymbolTimeLoRa: - 1009 .LFB93: - 295:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 296:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** double RegionCommonComputeSymbolTimeLoRa( uint8_t phyDr, uint32_t bandwidth ) - 297:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 1010 .loc 1 297 0 - 1011 .cfi_startproc - 1012 @ args = 0, pretend = 0, frame = 0 - 1013 @ frame_needed = 0, uses_anonymous_args = 0 - 1014 .LVL126: - 1015 0000 D0B5 push {r4, r6, r7, lr} - 1016 .LCFI11: - 1017 .cfi_def_cfa_offset 16 - 1018 .cfi_offset 4, -16 - 1019 .cfi_offset 6, -12 - 1020 .cfi_offset 7, -8 - 1021 .cfi_offset 14, -4 - 1022 0002 0C00 movs r4, r1 - 298:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return ( ( double )( 1 << phyDr ) / ( double )bandwidth ) * 1000; - 1023 .loc 1 298 0 - 1024 0004 0123 movs r3, #1 - 1025 0006 8340 lsls r3, r3, r0 - 1026 0008 1800 movs r0, r3 - 1027 .LVL127: - ARM GAS /tmp/ccAkEbCV.s page 25 - - - 1028 000a FFF7FEFF bl __aeabi_i2d - 1029 .LVL128: - 1030 000e 0600 movs r6, r0 - 1031 0010 0F00 movs r7, r1 - 1032 0012 2000 movs r0, r4 - 1033 0014 FFF7FEFF bl __aeabi_ui2d - 1034 .LVL129: - 1035 0018 0200 movs r2, r0 - 1036 001a 0B00 movs r3, r1 - 1037 001c 3000 movs r0, r6 - 1038 001e 3900 movs r1, r7 - 1039 0020 FFF7FEFF bl __aeabi_ddiv - 1040 .LVL130: - 1041 0024 0022 movs r2, #0 - 1042 0026 024B ldr r3, .L85 - 1043 0028 FFF7FEFF bl __aeabi_dmul - 1044 .LVL131: - 299:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1045 .loc 1 299 0 - 1046 @ sp needed - 1047 .LVL132: - 1048 002c D0BD pop {r4, r6, r7, pc} - 1049 .L86: - 1050 002e C046 .align 2 - 1051 .L85: - 1052 0030 00408F40 .word 1083129856 - 1053 .cfi_endproc - 1054 .LFE93: - 1056 .section .text.RegionCommonComputeSymbolTimeFsk,"ax",%progbits - 1057 .align 1 - 1058 .global RegionCommonComputeSymbolTimeFsk - 1059 .syntax unified - 1060 .code 16 - 1061 .thumb_func - 1062 .fpu softvfp - 1064 RegionCommonComputeSymbolTimeFsk: - 1065 .LFB94: - 300:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 301:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** double RegionCommonComputeSymbolTimeFsk( uint8_t phyDr ) - 302:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 1066 .loc 1 302 0 - 1067 .cfi_startproc - 1068 @ args = 0, pretend = 0, frame = 0 - 1069 @ frame_needed = 0, uses_anonymous_args = 0 - 1070 .LVL133: - 1071 0000 10B5 push {r4, lr} - 1072 .LCFI12: - 1073 .cfi_def_cfa_offset 8 - 1074 .cfi_offset 4, -8 - 1075 .cfi_offset 14, -4 - 303:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return ( 8.0 / ( double )phyDr ); // 1 symbol equals 1 byte - 1076 .loc 1 303 0 - 1077 0002 FFF7FEFF bl __aeabi_ui2d - 1078 .LVL134: - 1079 0006 0200 movs r2, r0 - 1080 0008 0B00 movs r3, r1 - 1081 000a 0020 movs r0, #0 - ARM GAS /tmp/ccAkEbCV.s page 26 - - - 1082 000c 0149 ldr r1, .L88 - 1083 000e FFF7FEFF bl __aeabi_ddiv - 1084 .LVL135: - 304:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1085 .loc 1 304 0 - 1086 @ sp needed - 1087 0012 10BD pop {r4, pc} - 1088 .L89: - 1089 .align 2 - 1090 .L88: - 1091 0014 00002040 .word 1075838976 - 1092 .cfi_endproc - 1093 .LFE94: - 1095 .global __aeabi_dadd - 1096 .global __aeabi_d2uiz - 1097 .global __aeabi_dsub - 1098 .global __aeabi_d2iz - 1099 .section .text.RegionCommonComputeRxWindowParameters,"ax",%progbits - 1100 .align 1 - 1101 .global RegionCommonComputeRxWindowParameters - 1102 .syntax unified - 1103 .code 16 - 1104 .thumb_func - 1105 .fpu softvfp - 1107 RegionCommonComputeRxWindowParameters: - 1108 .LFB95: - 305:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 306:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** void RegionCommonComputeRxWindowParameters( double tSymbol, uint8_t minRxSymbols, uint32_t rxError, - 307:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 1109 .loc 1 307 0 - 1110 .cfi_startproc - 1111 @ args = 12, pretend = 0, frame = 8 - 1112 @ frame_needed = 0, uses_anonymous_args = 0 - 1113 .LVL136: - 1114 0000 F0B5 push {r4, r5, r6, r7, lr} - 1115 .LCFI13: - 1116 .cfi_def_cfa_offset 20 - 1117 .cfi_offset 4, -20 - 1118 .cfi_offset 5, -16 - 1119 .cfi_offset 6, -12 - 1120 .cfi_offset 7, -8 - 1121 .cfi_offset 14, -4 - 1122 0002 83B0 sub sp, sp, #12 - 1123 .LCFI14: - 1124 .cfi_def_cfa_offset 32 - 1125 0004 0400 movs r4, r0 - 1126 0006 0D00 movs r5, r1 - 1127 0008 1600 movs r6, r2 - 1128 000a 1F00 movs r7, r3 - 308:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** *windowTimeout = MAX( ( uint32_t )ceil( ( ( 2 * minRxSymbols - 8 ) * tSymbol + 2 * rxError ) / - 1129 .loc 1 308 0 - 1130 000c 101F subs r0, r2, #4 - 1131 .LVL137: - 1132 000e 4000 lsls r0, r0, #1 - 1133 0010 FFF7FEFF bl __aeabi_i2d - 1134 .LVL138: - 1135 0014 2200 movs r2, r4 - ARM GAS /tmp/ccAkEbCV.s page 27 - - - 1136 0016 2B00 movs r3, r5 - 1137 0018 FFF7FEFF bl __aeabi_dmul - 1138 .LVL139: - 1139 001c 0090 str r0, [sp] - 1140 001e 0191 str r1, [sp, #4] - 1141 0020 7800 lsls r0, r7, #1 - 1142 0022 FFF7FEFF bl __aeabi_ui2d - 1143 .LVL140: - 1144 0026 009A ldr r2, [sp] - 1145 0028 019B ldr r3, [sp, #4] - 1146 002a FFF7FEFF bl __aeabi_dadd - 1147 .LVL141: - 1148 002e 2200 movs r2, r4 - 1149 0030 2B00 movs r3, r5 - 1150 0032 FFF7FEFF bl __aeabi_ddiv - 1151 .LVL142: - 1152 0036 FFF7FEFF bl ceil - 1153 .LVL143: - 1154 003a FFF7FEFF bl __aeabi_d2uiz - 1155 .LVL144: - 1156 003e 8642 cmp r6, r0 - 1157 0040 00D2 bcs .L91 - 1158 0042 0600 movs r6, r0 - 1159 .L91: - 1160 0044 099B ldr r3, [sp, #36] - 1161 0046 1E60 str r6, [r3] - 309:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** *windowOffset = ( int32_t )ceil( ( 4.0 * tSymbol ) - ( ( *windowTimeout * tSymbol ) / 2.0 ) - w - 1162 .loc 1 309 0 - 1163 0048 0022 movs r2, #0 - 1164 004a 154B ldr r3, .L92 - 1165 004c 2000 movs r0, r4 - 1166 004e 2900 movs r1, r5 - 1167 0050 FFF7FEFF bl __aeabi_dmul - 1168 .LVL145: - 1169 0054 0090 str r0, [sp] - 1170 0056 0191 str r1, [sp, #4] - 1171 0058 3000 movs r0, r6 - 1172 005a FFF7FEFF bl __aeabi_ui2d - 1173 .LVL146: - 1174 005e 2200 movs r2, r4 - 1175 0060 2B00 movs r3, r5 - 1176 0062 FFF7FEFF bl __aeabi_dmul - 1177 .LVL147: - 1178 0066 0022 movs r2, #0 - 1179 0068 0E4B ldr r3, .L92+4 - 1180 006a FFF7FEFF bl __aeabi_dmul - 1181 .LVL148: - 1182 006e 0200 movs r2, r0 - 1183 0070 0B00 movs r3, r1 - 1184 0072 0098 ldr r0, [sp] - 1185 0074 0199 ldr r1, [sp, #4] - 1186 0076 FFF7FEFF bl __aeabi_dsub - 1187 .LVL149: - 1188 007a 0400 movs r4, r0 - 1189 007c 0D00 movs r5, r1 - 1190 007e 0898 ldr r0, [sp, #32] - 1191 0080 FFF7FEFF bl __aeabi_ui2d - ARM GAS /tmp/ccAkEbCV.s page 28 - - - 1192 .LVL150: - 1193 0084 0200 movs r2, r0 - 1194 0086 0B00 movs r3, r1 - 1195 0088 2000 movs r0, r4 - 1196 008a 2900 movs r1, r5 - 1197 008c FFF7FEFF bl __aeabi_dsub - 1198 .LVL151: - 1199 0090 FFF7FEFF bl ceil - 1200 .LVL152: - 1201 0094 FFF7FEFF bl __aeabi_d2iz - 1202 .LVL153: - 1203 0098 0A9B ldr r3, [sp, #40] - 1204 009a 1860 str r0, [r3] - 310:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1205 .loc 1 310 0 - 1206 009c 03B0 add sp, sp, #12 - 1207 @ sp needed - 1208 .LVL154: - 1209 009e F0BD pop {r4, r5, r6, r7, pc} - 1210 .L93: - 1211 .align 2 - 1212 .L92: - 1213 00a0 00001040 .word 1074790400 - 1214 00a4 0000E03F .word 1071644672 - 1215 .cfi_endproc - 1216 .LFE95: - 1218 .global __aeabi_ui2f - 1219 .global __aeabi_fsub - 1220 .global __aeabi_f2d - 1221 .section .text.RegionCommonComputeTxPower,"ax",%progbits - 1222 .align 1 - 1223 .global RegionCommonComputeTxPower - 1224 .syntax unified - 1225 .code 16 - 1226 .thumb_func - 1227 .fpu softvfp - 1229 RegionCommonComputeTxPower: - 1230 .LFB96: - 311:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 312:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** int8_t RegionCommonComputeTxPower( int8_t txPowerIndex, float maxEirp, float antennaGain ) - 313:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 1231 .loc 1 313 0 - 1232 .cfi_startproc - 1233 @ args = 0, pretend = 0, frame = 0 - 1234 @ frame_needed = 0, uses_anonymous_args = 0 - 1235 .LVL155: - 1236 0000 70B5 push {r4, r5, r6, lr} - 1237 .LCFI15: - 1238 .cfi_def_cfa_offset 16 - 1239 .cfi_offset 4, -16 - 1240 .cfi_offset 5, -12 - 1241 .cfi_offset 6, -8 - 1242 .cfi_offset 14, -4 - 1243 0002 0D1C adds r5, r1, #0 - 1244 0004 141C adds r4, r2, #0 - 1245 .LVL156: - 314:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** int8_t phyTxPower = 0; - ARM GAS /tmp/ccAkEbCV.s page 29 - - - 315:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 316:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** phyTxPower = ( int8_t )floor( ( maxEirp - ( txPowerIndex * 2U ) ) - antennaGain ); - 1246 .loc 1 316 0 - 1247 0006 4000 lsls r0, r0, #1 - 1248 .LVL157: - 1249 0008 FFF7FEFF bl __aeabi_ui2f - 1250 .LVL158: - 1251 000c 011C adds r1, r0, #0 - 1252 000e 281C adds r0, r5, #0 - 1253 0010 FFF7FEFF bl __aeabi_fsub - 1254 .LVL159: - 1255 0014 211C adds r1, r4, #0 - 1256 0016 FFF7FEFF bl __aeabi_fsub - 1257 .LVL160: - 1258 001a FFF7FEFF bl __aeabi_f2d - 1259 .LVL161: - 1260 001e FFF7FEFF bl floor - 1261 .LVL162: - 1262 0022 FFF7FEFF bl __aeabi_d2iz - 1263 .LVL163: - 1264 0026 40B2 sxtb r0, r0 - 1265 .LVL164: - 317:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 318:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** return phyTxPower; - 319:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1266 .loc 1 319 0 - 1267 @ sp needed - 1268 .LVL165: - 1269 .LVL166: - 1270 0028 70BD pop {r4, r5, r6, pc} - 1271 .cfi_endproc - 1272 .LFE96: - 1274 .section .text.RegionCommonCalcBackOff,"ax",%progbits - 1275 .align 1 - 1276 .global RegionCommonCalcBackOff - 1277 .syntax unified - 1278 .code 16 - 1279 .thumb_func - 1280 .fpu softvfp - 1282 RegionCommonCalcBackOff: - 1283 .LFB97: - 320:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 321:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** void RegionCommonCalcBackOff( RegionCommonCalcBackOffParams_t* calcBackOffParams ) - 322:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 1284 .loc 1 322 0 - 1285 .cfi_startproc - 1286 @ args = 0, pretend = 0, frame = 0 - 1287 @ frame_needed = 0, uses_anonymous_args = 0 - 1288 .LVL167: - 1289 0000 10B5 push {r4, lr} - 1290 .LCFI16: - 1291 .cfi_def_cfa_offset 8 - 1292 .cfi_offset 4, -8 - 1293 .cfi_offset 14, -4 - 323:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint8_t bandIdx = calcBackOffParams->Channels[calcBackOffParams->Channel].Band; - 1294 .loc 1 323 0 - 1295 0002 C27A ldrb r2, [r0, #11] - ARM GAS /tmp/ccAkEbCV.s page 30 - - - 1296 0004 5300 lsls r3, r2, #1 - 1297 0006 9B18 adds r3, r3, r2 - 1298 0008 9A00 lsls r2, r3, #2 - 1299 000a 0368 ldr r3, [r0] - 1300 000c 9C46 mov ip, r3 - 1301 000e 6244 add r2, r2, ip - 1302 0010 537A ldrb r3, [r2, #9] - 1303 .LVL168: - 324:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint16_t dutyCycle = calcBackOffParams->Bands[bandIdx].DCycle; - 1304 .loc 1 324 0 - 1305 0012 1B01 lsls r3, r3, #4 - 1306 .LVL169: - 1307 0014 4268 ldr r2, [r0, #4] - 1308 .LVL170: - 1309 0016 D218 adds r2, r2, r3 - 1310 0018 1188 ldrh r1, [r2] - 1311 .LVL171: - 325:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** uint16_t joinDutyCycle = 0; - 326:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 327:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Reset time-off to initial value. - 328:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** calcBackOffParams->Bands[bandIdx].TimeOff = 0; - 1312 .loc 1 328 0 - 1313 001a 0024 movs r4, #0 - 1314 001c D460 str r4, [r2, #12] - 1315 .LVL172: - 329:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** - 330:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( calcBackOffParams->Joined == false ) - 1316 .loc 1 330 0 - 1317 001e 427A ldrb r2, [r0, #9] - 1318 0020 002A cmp r2, #0 - 1319 0022 23D1 bne .L96 - 331:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 332:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Get the join duty cycle - 333:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** joinDutyCycle = RegionCommonGetJoinDc( calcBackOffParams->ElapsedTime ); - 1320 .loc 1 333 0 - 1321 0024 C268 ldr r2, [r0, #12] - 1322 .LVL173: - 1323 .LBB38: - 1324 .LBB39: - 59:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 1325 .loc 1 59 0 - 1326 0026 194C ldr r4, .L105 - 1327 0028 A242 cmp r2, r4 - 1328 002a 05D9 bls .L102 - 63:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 1329 .loc 1 63 0 - 1330 002c 184C ldr r4, .L105+4 - 1331 002e A242 cmp r2, r4 - 1332 0030 13D8 bhi .L103 - 65:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1333 .loc 1 65 0 - 1334 0032 FA24 movs r4, #250 - 1335 0034 A400 lsls r4, r4, #2 - 1336 0036 00E0 b .L97 - 1337 .L102: - 61:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1338 .loc 1 61 0 - ARM GAS /tmp/ccAkEbCV.s page 31 - - - 1339 0038 6424 movs r4, #100 - 1340 .L97: - 1341 .LVL174: - 1342 .LBE39: - 1343 .LBE38: - 334:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Apply the most restricting duty cycle - 335:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** dutyCycle = MAX( dutyCycle, joinDutyCycle ); - 1344 .loc 1 335 0 - 1345 003a 0A1C adds r2, r1, #0 - 1346 003c A142 cmp r1, r4 - 1347 003e 00D2 bcs .L98 - 1348 0040 221C adds r2, r4, #0 - 1349 .L98: - 1350 0042 92B2 uxth r2, r2 - 1351 .LVL175: - 336:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Reset the timeoff if the last frame was not a join request and when the duty cycle is no - 337:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( ( calcBackOffParams->DutyCycleEnabled == false ) && ( calcBackOffParams->LastTxIsJoinRe - 1352 .loc 1 337 0 - 1353 0044 817A ldrb r1, [r0, #10] - 1354 0046 0029 cmp r1, #0 - 1355 0048 09D1 bne .L99 - 1356 .loc 1 337 0 is_stmt 0 discriminator 1 - 1357 004a 017A ldrb r1, [r0, #8] - 1358 004c 0029 cmp r1, #0 - 1359 004e 06D1 bne .L99 - 338:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 339:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // This is the case when the duty cycle is off and the last uplink frame was not a join - 340:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // This could happen in case of a rejoin, e.g. in compliance test mode. - 341:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // In this special case we have to set the time off to 0, since the join duty cycle sha - 342:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // be applied after the first join request. - 343:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** calcBackOffParams->Bands[bandIdx].TimeOff = 0; - 1360 .loc 1 343 0 is_stmt 1 - 1361 0050 4268 ldr r2, [r0, #4] - 1362 .LVL176: - 1363 0052 D318 adds r3, r2, r3 - 1364 0054 0022 movs r2, #0 - 1365 0056 DA60 str r2, [r3, #12] - 1366 0058 07E0 b .L95 - 1367 .LVL177: - 1368 .L103: - 1369 .LBB41: - 1370 .LBB40: - 69:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1371 .loc 1 69 0 - 1372 005a 0E4C ldr r4, .L105+8 - 1373 005c EDE7 b .L97 - 1374 .LVL178: - 1375 .L99: - 1376 .LBE40: - 1377 .LBE41: - 344:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 345:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** else - 346:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 347:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** // Apply band time-off. - 348:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** calcBackOffParams->Bands[bandIdx].TimeOff = calcBackOffParams->TxTimeOnAir * dutyCycle - 1378 .loc 1 348 0 - 1379 005e 0469 ldr r4, [r0, #16] - ARM GAS /tmp/ccAkEbCV.s page 32 - - - 1380 0060 4168 ldr r1, [r0, #4] - 1381 0062 CB18 adds r3, r1, r3 - 1382 0064 013A subs r2, r2, #1 - 1383 .LVL179: - 1384 0066 6243 muls r2, r4 - 1385 .LVL180: - 1386 0068 DA60 str r2, [r3, #12] - 1387 .L95: - 349:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 350:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 351:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** else - 352:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 353:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** if( calcBackOffParams->DutyCycleEnabled == true ) - 354:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 355:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** calcBackOffParams->Bands[bandIdx].TimeOff = calcBackOffParams->TxTimeOnAir * dutyCycle - 356:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 357:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** else - 358:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 359:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** calcBackOffParams->Bands[bandIdx].TimeOff = 0; - 360:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 361:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 362:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1388 .loc 1 362 0 - 1389 @ sp needed - 1390 006a 10BD pop {r4, pc} - 1391 .LVL181: - 1392 .L96: - 353:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** { - 1393 .loc 1 353 0 - 1394 006c 827A ldrb r2, [r0, #10] - 1395 006e 002A cmp r2, #0 - 1396 0070 04D1 bne .L104 - 359:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1397 .loc 1 359 0 - 1398 0072 4268 ldr r2, [r0, #4] - 1399 0074 D318 adds r3, r2, r3 - 1400 0076 0022 movs r2, #0 - 1401 0078 DA60 str r2, [r3, #12] - 1402 .loc 1 362 0 - 1403 007a F6E7 b .L95 - 1404 .L104: - 355:./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.c **** } - 1405 .loc 1 355 0 - 1406 007c 0469 ldr r4, [r0, #16] - 1407 007e 4268 ldr r2, [r0, #4] - 1408 0080 D318 adds r3, r2, r3 - 1409 0082 0139 subs r1, r1, #1 - 1410 .LVL182: - 1411 0084 6143 muls r1, r4 - 1412 .LVL183: - 1413 0086 D960 str r1, [r3, #12] - 1414 0088 EFE7 b .L95 - 1415 .L106: - 1416 008a C046 .align 2 - 1417 .L105: - 1418 008c 7FEE3600 .word 3599999 - 1419 0090 7F3F5C02 .word 39599999 - ARM GAS /tmp/ccAkEbCV.s page 33 - - - 1420 0094 10270000 .word 10000 - 1421 .cfi_endproc - 1422 .LFE97: - 1424 .text - 1425 .Letext0: - 1426 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 1427 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 1428 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 1429 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 1430 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 1431 .file 7 "/usr/arm-none-eabi/include/sys/_stdint.h" - 1432 .file 8 "/usr/arm-none-eabi/include/math.h" - 1433 .file 9 "Middlewares/Third_Party/Lora/Utilities/utilities.h" - 1434 .file 10 "Middlewares/Third_Party/Lora/Mac/LoRaMac.h" - 1435 .file 11 "./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h" - 1436 .file 12 "Middlewares/Third_Party/Lora/Utilities/timeServer.h" - ARM GAS /tmp/ccAkEbCV.s page 34 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 RegionCommon.c - /tmp/ccAkEbCV.s:16 .text.RegionCommonGetJoinDc:0000000000000000 $t - /tmp/ccAkEbCV.s:23 .text.RegionCommonGetJoinDc:0000000000000000 RegionCommonGetJoinDc - /tmp/ccAkEbCV.s:63 .text.RegionCommonGetJoinDc:000000000000001c $d - /tmp/ccAkEbCV.s:70 .text.RegionCommonChanVerifyDr:0000000000000000 $t - /tmp/ccAkEbCV.s:77 .text.RegionCommonChanVerifyDr:0000000000000000 RegionCommonChanVerifyDr - /tmp/ccAkEbCV.s:221 .text.RegionCommonValueInRange:0000000000000000 $t - /tmp/ccAkEbCV.s:228 .text.RegionCommonValueInRange:0000000000000000 RegionCommonValueInRange - /tmp/ccAkEbCV.s:264 .text.RegionCommonChanDisable:0000000000000000 $t - /tmp/ccAkEbCV.s:271 .text.RegionCommonChanDisable:0000000000000000 RegionCommonChanDisable - /tmp/ccAkEbCV.s:329 .text.RegionCommonCountChannels:0000000000000000 $t - /tmp/ccAkEbCV.s:336 .text.RegionCommonCountChannels:0000000000000000 RegionCommonCountChannels - /tmp/ccAkEbCV.s:437 .text.RegionCommonChanMaskCopy:0000000000000000 $t - /tmp/ccAkEbCV.s:444 .text.RegionCommonChanMaskCopy:0000000000000000 RegionCommonChanMaskCopy - /tmp/ccAkEbCV.s:492 .text.RegionCommonSetBandTxDone:0000000000000000 $t - /tmp/ccAkEbCV.s:499 .text.RegionCommonSetBandTxDone:0000000000000000 RegionCommonSetBandTxDone - /tmp/ccAkEbCV.s:526 .text.RegionCommonUpdateBandTimeOff:0000000000000000 $t - /tmp/ccAkEbCV.s:533 .text.RegionCommonUpdateBandTimeOff:0000000000000000 RegionCommonUpdateBandTimeOff - /tmp/ccAkEbCV.s:728 .text.RegionCommonParseLinkAdrReq:0000000000000000 $t - /tmp/ccAkEbCV.s:735 .text.RegionCommonParseLinkAdrReq:0000000000000000 RegionCommonParseLinkAdrReq - /tmp/ccAkEbCV.s:798 .text.RegionCommonLinkAdrReqVerifyParams:0000000000000000 $t - /tmp/ccAkEbCV.s:805 .text.RegionCommonLinkAdrReqVerifyParams:0000000000000000 RegionCommonLinkAdrReqVerifyParams - /tmp/ccAkEbCV.s:992 .text.RegionCommonLinkAdrReqVerifyParams:00000000000000b4 $d - /tmp/ccAkEbCV.s:1001 .text.RegionCommonComputeSymbolTimeLoRa:0000000000000000 $t - /tmp/ccAkEbCV.s:1008 .text.RegionCommonComputeSymbolTimeLoRa:0000000000000000 RegionCommonComputeSymbolTimeLoRa - /tmp/ccAkEbCV.s:1052 .text.RegionCommonComputeSymbolTimeLoRa:0000000000000030 $d - /tmp/ccAkEbCV.s:1057 .text.RegionCommonComputeSymbolTimeFsk:0000000000000000 $t - /tmp/ccAkEbCV.s:1064 .text.RegionCommonComputeSymbolTimeFsk:0000000000000000 RegionCommonComputeSymbolTimeFsk - /tmp/ccAkEbCV.s:1091 .text.RegionCommonComputeSymbolTimeFsk:0000000000000014 $d - /tmp/ccAkEbCV.s:1100 .text.RegionCommonComputeRxWindowParameters:0000000000000000 $t - /tmp/ccAkEbCV.s:1107 .text.RegionCommonComputeRxWindowParameters:0000000000000000 RegionCommonComputeRxWindowParameters - /tmp/ccAkEbCV.s:1213 .text.RegionCommonComputeRxWindowParameters:00000000000000a0 $d - /tmp/ccAkEbCV.s:1222 .text.RegionCommonComputeTxPower:0000000000000000 $t - /tmp/ccAkEbCV.s:1229 .text.RegionCommonComputeTxPower:0000000000000000 RegionCommonComputeTxPower - /tmp/ccAkEbCV.s:1275 .text.RegionCommonCalcBackOff:0000000000000000 $t - /tmp/ccAkEbCV.s:1282 .text.RegionCommonCalcBackOff:0000000000000000 RegionCommonCalcBackOff - /tmp/ccAkEbCV.s:1418 .text.RegionCommonCalcBackOff:000000000000008c $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -TimerGetElapsedTime -__aeabi_i2d -__aeabi_ui2d -__aeabi_ddiv -__aeabi_dmul -__aeabi_dadd -__aeabi_d2uiz -__aeabi_dsub -__aeabi_d2iz -ceil -__aeabi_ui2f -__aeabi_fsub -__aeabi_f2d -floor diff --git a/build/RegionEU868.d b/build/RegionEU868.d deleted file mode 100644 index f70d056..0000000 --- a/build/RegionEU868.d +++ /dev/null @@ -1,51 +0,0 @@ -build/RegionEU868.d: \ - Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c \ - Middlewares/Third_Party/Lora/Phy/radio.h \ - Middlewares/Third_Party/Lora/Mac/timer.h \ - Middlewares/Third_Party/Lora/Utilities/timeServer.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Middlewares/Third_Party/Lora/Mac/LoRaMac.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h \ - Middlewares/Third_Party/Lora/Mac/region/Region.h \ - Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h \ - Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h Inc/debug.h \ - Inc/hw_conf.h Inc/vcom.h - -Middlewares/Third_Party/Lora/Phy/radio.h: - -Middlewares/Third_Party/Lora/Mac/timer.h: - -Middlewares/Third_Party/Lora/Utilities/timeServer.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMac.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Middlewares/Third_Party/Lora/Mac/region/Region.h: - -Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h: - -Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h: - -Inc/debug.h: - -Inc/hw_conf.h: - -Inc/vcom.h: diff --git a/build/RegionEU868.lst b/build/RegionEU868.lst deleted file mode 100644 index 86407fe..0000000 --- a/build/RegionEU868.lst +++ /dev/null @@ -1,4727 +0,0 @@ -ARM GAS /tmp/cczfoKrY.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "RegionEU868.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.VerifyTxFreq,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 VerifyTxFreq: - 23 .LFB88: - 24 .file 1 "./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c" - 1:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** /* - 2:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** / _____) _ | | - 3:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** (C)2013 Semtech - 8:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ___ _____ _ ___ _ _____ ___ ___ ___ ___ - 9:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** / __|_ _/_\ / __| |/ / __/ _ \| _ \/ __| __| - 10:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** \__ \ | |/ _ \ (__| ' <| _| (_) | / (__| _| - 11:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** |___/ |_/_/ \_\___|_|\_\_| \___/|_|_\\___|___| - 12:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** embedded.connectivity.solutions=============== - 13:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 14:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Description: LoRa MAC region EU868 implementation - 15:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 16:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 17:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 18:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Maintainer: Miguel Luis ( Semtech ), Gregory Cristian ( Semtech ) and Daniel Jaeckle ( STACKFORCE ) - 19:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** */ - 20:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include - 21:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include - 22:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include - 23:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include - 24:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 25:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include "radio.h" - 26:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include "timer.h" - 27:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include "LoRaMac.h" - 28:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 29:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include "utilities.h" - 30:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 31:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include "Region.h" - 32:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include "RegionCommon.h" - 33:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include "RegionEU868.h" - 34:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #include "debug.h" - ARM GAS /tmp/cczfoKrY.s page 2 - - - 35:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 36:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Definitions - 37:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** #define CHANNELS_MASK_SIZE 1 - 38:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 39:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Global attributes - 40:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** /*! - 41:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** * LoRaMAC channels - 42:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** */ - 43:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** static ChannelParams_t Channels[EU868_MAX_NB_CHANNELS]; - 44:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 45:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** /*! - 46:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** * LoRaMac bands - 47:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** */ - 48:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** static Band_t Bands[EU868_MAX_NB_BANDS] = - 49:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 50:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** EU868_BAND0, - 51:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** EU868_BAND1, - 52:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** EU868_BAND2, - 53:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** EU868_BAND3, - 54:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** EU868_BAND4, - 55:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** }; - 56:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 57:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** /*! - 58:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** * LoRaMac channels mask - 59:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** */ - 60:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** static uint16_t ChannelsMask[CHANNELS_MASK_SIZE]; - 61:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 62:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** /*! - 63:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** * LoRaMac channels default mask - 64:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** */ - 65:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** static uint16_t ChannelsDefaultMask[CHANNELS_MASK_SIZE]; - 66:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 67:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Static functions - 68:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** static int8_t GetNextLowerTxDr( int8_t dr, int8_t minDr ) - 69:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 70:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t nextLowerDr = 0; - 71:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 72:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( dr == minDr ) - 73:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 74:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** nextLowerDr = minDr; - 75:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 76:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 77:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 78:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** nextLowerDr = dr - 1; - 79:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 80:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return nextLowerDr; - 81:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 82:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 83:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** static uint32_t GetBandwidth( uint32_t drIndex ) - 84:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 85:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** switch( BandwidthsEU868[drIndex] ) - 86:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 87:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** default: - 88:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case 125000: - 89:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return 0; - 90:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case 250000: - 91:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return 1; - ARM GAS /tmp/cczfoKrY.s page 3 - - - 92:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case 500000: - 93:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return 2; - 94:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 95:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 96:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 97:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** static int8_t LimitTxPower( int8_t txPower, int8_t maxBandTxPower, int8_t datarate, uint16_t* chann - 98:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 99:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t txPowerResult = txPower; - 100:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 101:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Limit tx power to the band max - 102:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** txPowerResult = MAX( txPower, maxBandTxPower ); - 103:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 104:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return txPowerResult; - 105:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 106:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 107:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** static bool VerifyTxFreq( uint32_t freq, uint8_t *band ) - 108:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 25 .loc 1 108 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 .LVL0: - 30 0000 70B5 push {r4, r5, r6, lr} - 31 .LCFI0: - 32 .cfi_def_cfa_offset 16 - 33 .cfi_offset 4, -16 - 34 .cfi_offset 5, -12 - 35 .cfi_offset 6, -8 - 36 .cfi_offset 14, -4 - 37 0002 0400 movs r4, r0 - 38 0004 0D00 movs r5, r1 - 109:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Check radio driver support - 110:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( Radio.CheckRfFrequency( freq ) == false ) - 39 .loc 1 110 0 - 40 0006 1C4B ldr r3, .L14 - 41 0008 9B6A ldr r3, [r3, #40] - 42 000a 9847 blx r3 - 43 .LVL1: - 44 000c 0028 cmp r0, #0 - 45 000e 23D0 beq .L2 - 111:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 112:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return false; - 113:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 114:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 115:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Check frequency bands - 116:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( ( freq >= 863000000 ) && ( freq < 865000000 ) ) - 46 .loc 1 116 0 - 47 0010 1A4A ldr r2, .L14+4 - 48 0012 1B4B ldr r3, .L14+8 - 49 0014 E318 adds r3, r4, r3 - 50 0016 9342 cmp r3, r2 - 51 0018 1CD9 bls .L9 - 117:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 118:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *band = 2; - 119:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 120:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( freq >= 865000000 ) && ( freq <= 868000000 ) ) - 52 .loc 1 120 0 - ARM GAS /tmp/cczfoKrY.s page 4 - - - 53 001a 1A4A ldr r2, .L14+12 - 54 001c 1A4B ldr r3, .L14+16 - 55 001e E318 adds r3, r4, r3 - 56 0020 9342 cmp r3, r2 - 57 0022 1AD9 bls .L10 - 121:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 122:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *band = 0; - 123:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 124:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( freq > 868000000 ) && ( freq <= 868600000 ) ) - 58 .loc 1 124 0 - 59 0024 194A ldr r2, .L14+20 - 60 0026 1A4B ldr r3, .L14+24 - 61 0028 E318 adds r3, r4, r3 - 62 002a 9342 cmp r3, r2 - 63 002c 18D9 bls .L11 - 125:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 126:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *band = 1; - 127:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 128:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( freq >= 868700000 ) && ( freq <= 869200000 ) ) - 64 .loc 1 128 0 - 65 002e 194A ldr r2, .L14+28 - 66 0030 194B ldr r3, .L14+32 - 67 0032 E318 adds r3, r4, r3 - 68 0034 9342 cmp r3, r2 - 69 0036 16D9 bls .L12 - 129:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 130:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *band = 2; - 131:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 132:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( freq >= 869400000 ) && ( freq <= 869650000 ) ) - 70 .loc 1 132 0 - 71 0038 184A ldr r2, .L14+36 - 72 003a 194B ldr r3, .L14+40 - 73 003c E318 adds r3, r4, r3 - 74 003e 9342 cmp r3, r2 - 75 0040 14D9 bls .L13 - 133:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 134:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *band = 3; - 135:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 136:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( freq >= 869700000 ) && ( freq <= 870000000 ) ) - 76 .loc 1 136 0 - 77 0042 184B ldr r3, .L14+44 - 78 0044 9C46 mov ip, r3 - 79 0046 6444 add r4, r4, ip - 80 .LVL2: - 81 0048 174B ldr r3, .L14+48 - 82 004a 9C42 cmp r4, r3 - 83 004c 11D8 bhi .L8 - 137:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 138:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *band = 4; - 84 .loc 1 138 0 - 85 004e 0423 movs r3, #4 - 86 0050 2B70 strb r3, [r5] - 87 0052 01E0 b .L2 - 88 .LVL3: - 89 .L9: - 118:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 90 .loc 1 118 0 - ARM GAS /tmp/cczfoKrY.s page 5 - - - 91 0054 0223 movs r3, #2 - 92 0056 2B70 strb r3, [r5] - 93 .LVL4: - 94 .L2: - 139:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 140:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 141:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 142:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return false; - 143:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 144:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return true; - 145:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 95 .loc 1 145 0 - 96 @ sp needed - 97 .LVL5: - 98 0058 70BD pop {r4, r5, r6, pc} - 99 .LVL6: - 100 .L10: - 122:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 101 .loc 1 122 0 - 102 005a 0023 movs r3, #0 - 103 005c 2B70 strb r3, [r5] - 104 005e FBE7 b .L2 - 105 .L11: - 126:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 106 .loc 1 126 0 - 107 0060 0123 movs r3, #1 - 108 0062 2B70 strb r3, [r5] - 109 0064 F8E7 b .L2 - 110 .L12: - 130:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 111 .loc 1 130 0 - 112 0066 0223 movs r3, #2 - 113 0068 2B70 strb r3, [r5] - 114 006a F5E7 b .L2 - 115 .L13: - 134:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 116 .loc 1 134 0 - 117 006c 0323 movs r3, #3 - 118 006e 2B70 strb r3, [r5] - 119 0070 F2E7 b .L2 - 120 .LVL7: - 121 .L8: - 142:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 122 .loc 1 142 0 - 123 0072 0020 movs r0, #0 - 124 0074 F0E7 b .L2 - 125 .L15: - 126 0076 C046 .align 2 - 127 .L14: - 128 0078 00000000 .word Radio - 129 007c 7F841E00 .word 1999999 - 130 0080 40AA8FCC .word -863000000 - 131 0084 C0C62D00 .word 3000000 - 132 0088 C02571CC .word -865000000 - 133 008c BF270900 .word 599999 - 134 0090 FF5E43CC .word -868000001 - 135 0094 20A10700 .word 500000 - ARM GAS /tmp/cczfoKrY.s page 6 - - - 136 0098 A0B038CC .word -868700000 - 137 009c 90D00300 .word 250000 - 138 00a0 40022ECC .word -869400000 - 139 00a4 606E29CC .word -869700000 - 140 00a8 E0930400 .word 300000 - 141 .cfi_endproc - 142 .LFE88: - 144 .section .text.RegionEU868GetPhyParam,"ax",%progbits - 145 .align 1 - 146 .global RegionEU868GetPhyParam - 147 .syntax unified - 148 .code 16 - 149 .thumb_func - 150 .fpu softvfp - 152 RegionEU868GetPhyParam: - 153 .LFB90: - 146:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 147:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** static uint8_t CountNbOfEnabledChannels( bool joined, uint8_t datarate, uint16_t* channelsMask, Cha - 148:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 149:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t nbEnabledChannels = 0; - 150:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t delayTransmission = 0; - 151:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 152:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** for( uint8_t i = 0, k = 0; i < EU868_MAX_NB_CHANNELS; i += 16, k++ ) - 153:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 154:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** for( uint8_t j = 0; j < 16; j++ ) - 155:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 156:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( ( channelsMask[k] & ( 1 << j ) ) != 0 ) - 157:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 158:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( channels[i + j].Frequency == 0 ) - 159:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // Check if the channel is enabled - 160:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** continue; - 161:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 162:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( joined == false ) - 163:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 164:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( ( EU868_JOIN_CHANNELS & ( 1 << j ) ) == 0 ) - 165:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 166:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** continue; - 167:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 168:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 169:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( RegionCommonValueInRange( datarate, channels[i + j].DrRange.Fields.Min, - 170:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channels[i + j].DrRange.Fields.Max ) == false ) - 171:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // Check if the current channel selection supports the given datarate - 172:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** continue; - 173:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 174:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( bands[channels[i + j].Band].TimeOff > 0 ) - 175:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // Check if the band is available for transmission - 176:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** delayTransmission++; - 177:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** continue; - 178:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 179:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** enabledChannels[nbEnabledChannels++] = i + j; - 180:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 181:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 182:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 183:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 184:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *delayTx = delayTransmission; - 185:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return nbEnabledChannels; - 186:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - ARM GAS /tmp/cczfoKrY.s page 7 - - - 187:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 188:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** PhyParam_t RegionEU868GetPhyParam( GetPhyParams_t* getPhy ) - 189:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 154 .loc 1 189 0 - 155 .cfi_startproc - 156 @ args = 0, pretend = 0, frame = 0 - 157 @ frame_needed = 0, uses_anonymous_args = 0 - 158 .LVL8: - 159 0000 10B5 push {r4, lr} - 160 .LCFI1: - 161 .cfi_def_cfa_offset 8 - 162 .cfi_offset 4, -8 - 163 .cfi_offset 14, -4 - 164 0002 0200 movs r2, r0 - 190:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** PhyParam_t phyParam = { 0 }; - 165 .loc 1 190 0 - 166 0004 0020 movs r0, #0 - 167 .LVL9: - 191:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 192:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** switch( getPhy->Attribute ) - 168 .loc 1 192 0 - 169 0006 1378 ldrb r3, [r2] - 170 0008 093B subs r3, r3, #9 - 171 000a D9B2 uxtb r1, r3 - 172 000c 1729 cmp r1, #23 - 173 000e 0BD8 bhi .L17 - 174 0010 8B00 lsls r3, r1, #2 - 175 0012 2249 ldr r1, .L40 - 176 0014 CB58 ldr r3, [r1, r3] - 177 0016 9F46 mov pc, r3 - 178 .section .rodata.RegionEU868GetPhyParam,"a",%progbits - 179 .align 2 - 180 .L19: - 181 0000 2E000000 .word .L18 - 182 0004 38000000 .word .L20 - 183 0008 42000000 .word .L21 - 184 000c 46000000 .word .L22 - 185 0010 4A000000 .word .L23 - 186 0014 50000000 .word .L24 - 187 0018 56000000 .word .L25 - 188 001c 5A000000 .word .L26 - 189 0020 5E000000 .word .L27 - 190 0024 64000000 .word .L28 - 191 0028 28000000 .word .L17 - 192 002c 78000000 .word .L29 - 193 0030 28000000 .word .L17 - 194 0034 7C000000 .word .L30 - 195 0038 80000000 .word .L31 - 196 003c 84000000 .word .L32 - 197 0040 88000000 .word .L33 - 198 0044 28000000 .word .L17 - 199 0048 28000000 .word .L17 - 200 004c 8C000000 .word .L34 - 201 0050 92000000 .word .L35 - 202 0054 96000000 .word .L36 - 203 0058 96000000 .word .L36 - 204 005c 18000000 .word .L37 - ARM GAS /tmp/cczfoKrY.s page 8 - - - 205 .section .text.RegionEU868GetPhyParam - 206 .L37: - 193:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 194:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_MIN_RX_DR: - 195:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 196:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_RX_MIN_DATARATE; - 197:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 198:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 199:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_MIN_TX_DR: - 200:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 201:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_TX_MIN_DATARATE; - 202:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 203:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 204:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_TX_DR: - 205:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 206:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_DEFAULT_DATARATE; - 207:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 208:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 209:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_NEXT_LOWER_TX_DR: - 210:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 211:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = GetNextLowerTxDr( getPhy->Datarate, EU868_TX_MIN_DATARATE ); - 207 .loc 1 211 0 - 208 0018 0120 movs r0, #1 - 209 001a 1056 ldrsb r0, [r2, r0] - 210 .LVL10: - 211 .LBB14: - 212 .LBB15: - 72:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 213 .loc 1 72 0 - 214 001c 0028 cmp r0, #0 - 215 001e 04D0 beq .L39 - 78:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 216 .loc 1 78 0 - 217 0020 C0B2 uxtb r0, r0 - 218 0022 0138 subs r0, r0, #1 - 219 .LVL11: - 220 0024 C0B2 uxtb r0, r0 - 221 .LVL12: - 222 .L38: - 223 .LBE15: - 224 .LBE14: - 225 .loc 1 211 0 - 226 0026 40B2 sxtb r0, r0 - 227 .LVL13: - 228 .L17: - 212:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 213:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 214:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_TX_POWER: - 215:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 216:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_DEFAULT_TX_POWER; - 217:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 218:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 219:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_MAX_PAYLOAD: - 220:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 221:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = MaxPayloadOfDatarateEU868[getPhy->Datarate]; - 222:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 223:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - ARM GAS /tmp/cczfoKrY.s page 9 - - - 224:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_MAX_PAYLOAD_REPEATER: - 225:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 226:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = MaxPayloadOfDatarateRepeaterEU868[getPhy->Datarate]; - 227:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 228:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 229:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DUTY_CYCLE: - 230:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 231:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_DUTY_CYCLE_ENABLED; - 232:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 233:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 234:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_MAX_RX_WINDOW: - 235:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 236:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_MAX_RX_WINDOW; - 237:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 238:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 239:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_RECEIVE_DELAY1: - 240:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 241:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_RECEIVE_DELAY1; - 242:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 243:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 244:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_RECEIVE_DELAY2: - 245:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 246:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_RECEIVE_DELAY2; - 247:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 248:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 249:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_JOIN_ACCEPT_DELAY1: - 250:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 251:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_JOIN_ACCEPT_DELAY1; - 252:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 253:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 254:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_JOIN_ACCEPT_DELAY2: - 255:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 256:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_JOIN_ACCEPT_DELAY2; - 257:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 258:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 259:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_MAX_FCNT_GAP: - 260:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 261:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_MAX_FCNT_GAP; - 262:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 263:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 264:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_ACK_TIMEOUT: - 265:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 266:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = ( EU868_ACKTIMEOUT + randr( -EU868_ACK_TIMEOUT_RND, EU868_ACK_TIMEOUT_ - 267:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 268:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 269:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_DR1_OFFSET: - 270:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 271:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_DEFAULT_RX1_DR_OFFSET; - 272:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 273:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 274:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_RX2_FREQUENCY: - 275:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 276:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_RX_WND_2_FREQ; - 277:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 278:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 279:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_RX2_DR: - 280:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - ARM GAS /tmp/cczfoKrY.s page 10 - - - 281:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_RX_WND_2_DR; - 282:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 283:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 284:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_CHANNELS_MASK: - 285:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 286:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.ChannelsMask = ChannelsMask; - 287:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 288:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 289:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_CHANNELS_DEFAULT_MASK: - 290:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 291:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.ChannelsMask = ChannelsDefaultMask; - 292:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 293:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 294:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_MAX_NB_CHANNELS: - 295:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 296:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = EU868_MAX_NB_CHANNELS; - 297:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 298:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 299:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_CHANNELS: - 300:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 301:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Channels = Channels; - 302:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 303:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 304:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_UPLINK_DWELL_TIME: - 305:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_DOWNLINK_DWELL_TIME: - 306:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 307:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = 0; - 308:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 309:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 310:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_MAX_EIRP: - 311:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 312:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.fValue = EU868_DEFAULT_MAX_EIRP; - 313:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 314:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 315:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_ANTENNA_GAIN: - 316:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 317:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.fValue = EU868_DEFAULT_ANTENNA_GAIN; - 318:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 319:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 320:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_NB_JOIN_TRIALS: - 321:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_NB_JOIN_TRIALS: - 322:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 323:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam.Value = 48; - 324:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 325:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 326:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** default: - 327:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 328:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 329:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 330:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 331:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 332:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return phyParam; - 333:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 229 .loc 1 333 0 - 230 @ sp needed - 231 0028 10BD pop {r4, pc} - 232 .LVL14: - ARM GAS /tmp/cczfoKrY.s page 11 - - - 233 .L39: - 234 .LBB17: - 235 .LBB16: - 74:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 236 .loc 1 74 0 - 237 002a 0020 movs r0, #0 - 238 .LVL15: - 239 002c FBE7 b .L38 - 240 .LVL16: - 241 .L18: - 242 .LBE16: - 243 .LBE17: - 221:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 244 .loc 1 221 0 - 245 002e 0123 movs r3, #1 - 246 0030 D356 ldrsb r3, [r2, r3] - 247 0032 1B4A ldr r2, .L40+4 - 248 .LVL17: - 249 0034 D05C ldrb r0, [r2, r3] - 222:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 250 .loc 1 222 0 - 251 0036 F7E7 b .L17 - 252 .LVL18: - 253 .L20: - 226:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 254 .loc 1 226 0 - 255 0038 0123 movs r3, #1 - 256 003a D356 ldrsb r3, [r2, r3] - 257 003c 194A ldr r2, .L40+8 - 258 .LVL19: - 259 003e D05C ldrb r0, [r2, r3] - 227:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 260 .loc 1 227 0 - 261 0040 F2E7 b .L17 - 262 .LVL20: - 263 .L21: - 231:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 264 .loc 1 231 0 - 265 0042 0120 movs r0, #1 - 232:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 266 .loc 1 232 0 - 267 0044 F0E7 b .L17 - 268 .L22: - 236:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 269 .loc 1 236 0 - 270 0046 1848 ldr r0, .L40+12 - 237:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 271 .loc 1 237 0 - 272 0048 EEE7 b .L17 - 273 .L23: - 241:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 274 .loc 1 241 0 - 275 004a FA20 movs r0, #250 - 276 .LVL21: - 277 004c 8000 lsls r0, r0, #2 - 278 .LVL22: - 242:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - ARM GAS /tmp/cczfoKrY.s page 12 - - - 279 .loc 1 242 0 - 280 004e EBE7 b .L17 - 281 .L24: - 246:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 282 .loc 1 246 0 - 283 0050 FA20 movs r0, #250 - 284 .LVL23: - 285 0052 C000 lsls r0, r0, #3 - 286 .LVL24: - 247:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 287 .loc 1 247 0 - 288 0054 E8E7 b .L17 - 289 .L25: - 251:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 290 .loc 1 251 0 - 291 0056 1548 ldr r0, .L40+16 - 252:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 292 .loc 1 252 0 - 293 0058 E6E7 b .L17 - 294 .L26: - 256:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 295 .loc 1 256 0 - 296 005a 1548 ldr r0, .L40+20 - 257:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 297 .loc 1 257 0 - 298 005c E4E7 b .L17 - 299 .L27: - 261:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 300 .loc 1 261 0 - 301 005e 8020 movs r0, #128 - 302 .LVL25: - 303 0060 C001 lsls r0, r0, #7 - 304 .LVL26: - 262:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 305 .loc 1 262 0 - 306 0062 E1E7 b .L17 - 307 .L28: - 266:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 308 .loc 1 266 0 - 309 0064 FA21 movs r1, #250 - 310 0066 8900 lsls r1, r1, #2 - 311 0068 1248 ldr r0, .L40+24 - 312 006a FFF7FEFF bl randr - 313 .LVL27: - 314 006e FA23 movs r3, #250 - 315 0070 DB00 lsls r3, r3, #3 - 316 0072 9C46 mov ip, r3 - 317 0074 6044 add r0, r0, ip - 267:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 318 .loc 1 267 0 - 319 0076 D7E7 b .L17 - 320 .LVL28: - 321 .L29: - 276:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 322 .loc 1 276 0 - 323 0078 0F48 ldr r0, .L40+28 - 277:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - ARM GAS /tmp/cczfoKrY.s page 13 - - - 324 .loc 1 277 0 - 325 007a D5E7 b .L17 - 326 .L30: - 286:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 327 .loc 1 286 0 - 328 007c 0F48 ldr r0, .L40+32 - 287:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 329 .loc 1 287 0 - 330 007e D3E7 b .L17 - 331 .L31: - 291:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 332 .loc 1 291 0 - 333 0080 0F48 ldr r0, .L40+36 - 292:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 334 .loc 1 292 0 - 335 0082 D1E7 b .L17 - 336 .L32: - 296:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 337 .loc 1 296 0 - 338 0084 1020 movs r0, #16 - 297:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 339 .loc 1 297 0 - 340 0086 CFE7 b .L17 - 341 .L33: - 301:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 342 .loc 1 301 0 - 343 0088 0E48 ldr r0, .L40+40 - 302:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 344 .loc 1 302 0 - 345 008a CDE7 b .L17 - 346 .L34: - 312:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 347 .loc 1 312 0 - 348 008c 8320 movs r0, #131 - 349 .LVL29: - 350 008e C005 lsls r0, r0, #23 - 351 .LVL30: - 313:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 352 .loc 1 313 0 - 353 0090 CAE7 b .L17 - 354 .L35: - 317:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 355 .loc 1 317 0 - 356 0092 0D48 ldr r0, .L40+44 - 318:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 357 .loc 1 318 0 - 358 0094 C8E7 b .L17 - 359 .L36: - 323:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 360 .loc 1 323 0 - 361 0096 3020 movs r0, #48 - 324:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 362 .loc 1 324 0 - 363 0098 C6E7 b .L17 - 364 .L41: - 365 009a C046 .align 2 - 366 .L40: - ARM GAS /tmp/cczfoKrY.s page 14 - - - 367 009c 00000000 .word .L19 - 368 00a0 00000000 .word .LANCHOR0 - 369 00a4 00000000 .word .LANCHOR1 - 370 00a8 B80B0000 .word 3000 - 371 00ac 88130000 .word 5000 - 372 00b0 70170000 .word 6000 - 373 00b4 18FCFFFF .word -1000 - 374 00b8 08E6D333 .word 869525000 - 375 00bc 00000000 .word .LANCHOR2 - 376 00c0 00000000 .word .LANCHOR3 - 377 00c4 00000000 .word Channels - 378 00c8 9A990940 .word 1074370970 - 379 .cfi_endproc - 380 .LFE90: - 382 .section .text.RegionEU868SetBandTxDone,"ax",%progbits - 383 .align 1 - 384 .global RegionEU868SetBandTxDone - 385 .syntax unified - 386 .code 16 - 387 .thumb_func - 388 .fpu softvfp - 390 RegionEU868SetBandTxDone: - 391 .LFB91: - 334:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 335:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** void RegionEU868SetBandTxDone( SetBandTxDoneParams_t* txDone ) - 336:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 392 .loc 1 336 0 - 393 .cfi_startproc - 394 @ args = 0, pretend = 0, frame = 0 - 395 @ frame_needed = 0, uses_anonymous_args = 0 - 396 .LVL31: - 397 0000 10B5 push {r4, lr} - 398 .LCFI2: - 399 .cfi_def_cfa_offset 8 - 400 .cfi_offset 4, -8 - 401 .cfi_offset 14, -4 - 337:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionCommonSetBandTxDone( txDone->Joined, &Bands[Channels[txDone->Channel].Band], txDone->Last - 402 .loc 1 337 0 - 403 0002 0278 ldrb r2, [r0] - 404 0004 5300 lsls r3, r2, #1 - 405 0006 9B18 adds r3, r3, r2 - 406 0008 9A00 lsls r2, r3, #2 - 407 000a 054B ldr r3, .L43 - 408 000c 9B18 adds r3, r3, r2 - 409 000e 5B7A ldrb r3, [r3, #9] - 410 0010 4268 ldr r2, [r0, #4] - 411 0012 1B01 lsls r3, r3, #4 - 412 0014 0349 ldr r1, .L43+4 - 413 0016 C918 adds r1, r1, r3 - 414 0018 4078 ldrb r0, [r0, #1] - 415 .LVL32: - 416 001a FFF7FEFF bl RegionCommonSetBandTxDone - 417 .LVL33: - 338:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 418 .loc 1 338 0 - 419 @ sp needed - 420 001e 10BD pop {r4, pc} - ARM GAS /tmp/cczfoKrY.s page 15 - - - 421 .L44: - 422 .align 2 - 423 .L43: - 424 0020 00000000 .word Channels - 425 0024 00000000 .word .LANCHOR4 - 426 .cfi_endproc - 427 .LFE91: - 429 .section .text.RegionEU868InitDefaults,"ax",%progbits - 430 .align 1 - 431 .global RegionEU868InitDefaults - 432 .syntax unified - 433 .code 16 - 434 .thumb_func - 435 .fpu softvfp - 437 RegionEU868InitDefaults: - 438 .LFB92: - 339:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 340:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** void RegionEU868InitDefaults( InitType_t type ) - 341:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 439 .loc 1 341 0 - 440 .cfi_startproc - 441 @ args = 0, pretend = 0, frame = 0 - 442 @ frame_needed = 0, uses_anonymous_args = 0 - 443 .LVL34: - 444 0000 70B5 push {r4, r5, r6, lr} - 445 .LCFI3: - 446 .cfi_def_cfa_offset 16 - 447 .cfi_offset 4, -16 - 448 .cfi_offset 5, -12 - 449 .cfi_offset 6, -8 - 450 .cfi_offset 14, -4 - 342:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** switch( type ) - 451 .loc 1 342 0 - 452 0002 0028 cmp r0, #0 - 453 0004 02D0 beq .L47 - 454 0006 0128 cmp r0, #1 - 455 0008 14D0 beq .L48 - 456 .LVL35: - 457 .L45: - 343:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 344:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case INIT_TYPE_INIT: - 345:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 346:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Channels - 347:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Channels[0] = ( ChannelParams_t ) EU868_LC1; - 348:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Channels[1] = ( ChannelParams_t ) EU868_LC2; - 349:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Channels[2] = ( ChannelParams_t ) EU868_LC3; - 350:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 351:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Initialize the channels default mask - 352:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelsDefaultMask[0] = LC( 1 ) + LC( 2 ) + LC( 3 ); - 353:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Update the channels mask - 354:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionCommonChanMaskCopy( ChannelsMask, ChannelsDefaultMask, 1 ); - 355:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 356:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 357:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case INIT_TYPE_RESTORE: - 358:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 359:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Restore channels default mask - 360:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelsMask[0] |= ChannelsDefaultMask[0]; - ARM GAS /tmp/cczfoKrY.s page 16 - - - 361:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 362:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 363:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** default: - 364:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 365:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 366:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 367:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 368:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 458 .loc 1 368 0 - 459 @ sp needed - 460 000a 70BD pop {r4, r5, r6, pc} - 461 .LVL36: - 462 .L47: - 347:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Channels[1] = ( ChannelParams_t ) EU868_LC2; - 463 .loc 1 347 0 - 464 000c 0D4B ldr r3, .L49 - 465 000e 0E4A ldr r2, .L49+4 - 466 0010 1800 movs r0, r3 - 467 .LVL37: - 468 0012 1100 movs r1, r2 - 469 0014 70C9 ldmia r1!, {r4, r5, r6} - 470 0016 70C0 stmia r0!, {r4, r5, r6} - 348:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Channels[2] = ( ChannelParams_t ) EU868_LC3; - 471 .loc 1 348 0 - 472 0018 70C9 ldmia r1!, {r4, r5, r6} - 473 001a 70C0 stmia r0!, {r4, r5, r6} - 349:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 474 .loc 1 349 0 - 475 001c 1833 adds r3, r3, #24 - 476 001e 1832 adds r2, r2, #24 - 477 0020 13CA ldmia r2!, {r0, r1, r4} - 478 0022 13C3 stmia r3!, {r0, r1, r4} - 352:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Update the channels mask - 479 .loc 1 352 0 - 480 0024 0949 ldr r1, .L49+8 - 481 0026 0723 movs r3, #7 - 482 0028 0B80 strh r3, [r1] - 354:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 483 .loc 1 354 0 - 484 002a 0122 movs r2, #1 - 485 002c 0848 ldr r0, .L49+12 - 486 002e FFF7FEFF bl RegionCommonChanMaskCopy - 487 .LVL38: - 355:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 488 .loc 1 355 0 - 489 0032 EAE7 b .L45 - 490 .LVL39: - 491 .L48: - 360:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 492 .loc 1 360 0 - 493 0034 054B ldr r3, .L49+8 - 494 0036 1B88 ldrh r3, [r3] - 495 0038 054A ldr r2, .L49+12 - 496 003a 1188 ldrh r1, [r2] - 497 003c 0B43 orrs r3, r1 - 498 003e 1380 strh r3, [r2] - 499 .loc 1 368 0 - ARM GAS /tmp/cczfoKrY.s page 17 - - - 500 0040 E3E7 b .L45 - 501 .L50: - 502 0042 C046 .align 2 - 503 .L49: - 504 0044 00000000 .word Channels - 505 0048 00000000 .word .LANCHOR5 - 506 004c 00000000 .word .LANCHOR3 - 507 0050 00000000 .word .LANCHOR2 - 508 .cfi_endproc - 509 .LFE92: - 511 .section .text.RegionEU868Verify,"ax",%progbits - 512 .align 1 - 513 .global RegionEU868Verify - 514 .syntax unified - 515 .code 16 - 516 .thumb_func - 517 .fpu softvfp - 519 RegionEU868Verify: - 520 .LFB93: - 369:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 370:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool RegionEU868Verify( VerifyParams_t* verify, PhyAttribute_t phyAttribute ) - 371:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 521 .loc 1 371 0 - 522 .cfi_startproc - 523 @ args = 0, pretend = 0, frame = 0 - 524 @ frame_needed = 0, uses_anonymous_args = 0 - 525 .LVL40: - 526 0000 10B5 push {r4, lr} - 527 .LCFI4: - 528 .cfi_def_cfa_offset 8 - 529 .cfi_offset 4, -8 - 530 .cfi_offset 14, -4 - 372:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** switch( phyAttribute ) - 531 .loc 1 372 0 - 532 0002 0439 subs r1, r1, #4 - 533 .LVL41: - 534 0004 CBB2 uxtb r3, r1 - 535 0006 1A2B cmp r3, #26 - 536 0008 34D8 bhi .L60 - 537 000a 9900 lsls r1, r3, #2 - 538 000c 1A4B ldr r3, .L63 - 539 000e 5B58 ldr r3, [r3, r1] - 540 0010 9F46 mov pc, r3 - 541 .section .rodata.RegionEU868Verify,"a",%progbits - 542 .align 2 - 543 .L54: - 544 0000 16000000 .word .L53 - 545 0004 2A000000 .word .L55 - 546 0008 3E000000 .word .L56 - 547 000c 52000000 .word .L57 - 548 0010 52000000 .word .L57 - 549 0014 74000000 .word .L60 - 550 0018 74000000 .word .L60 - 551 001c 12000000 .word .L58 - 552 0020 74000000 .word .L60 - 553 0024 74000000 .word .L60 - 554 0028 74000000 .word .L60 - ARM GAS /tmp/cczfoKrY.s page 18 - - - 555 002c 74000000 .word .L60 - 556 0030 74000000 .word .L60 - 557 0034 74000000 .word .L60 - 558 0038 74000000 .word .L60 - 559 003c 74000000 .word .L60 - 560 0040 74000000 .word .L60 - 561 0044 74000000 .word .L60 - 562 0048 74000000 .word .L60 - 563 004c 74000000 .word .L60 - 564 0050 74000000 .word .L60 - 565 0054 74000000 .word .L60 - 566 0058 74000000 .word .L60 - 567 005c 74000000 .word .L60 - 568 0060 74000000 .word .L60 - 569 0064 74000000 .word .L60 - 570 0068 66000000 .word .L59 - 571 .section .text.RegionEU868Verify - 572 .L58: - 373:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 374:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_TX_DR: - 375:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 376:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return RegionCommonValueInRange( verify->DatarateParams.Datarate, EU868_TX_MIN_DATARATE - 377:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 378:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_TX_DR: - 379:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 380:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return RegionCommonValueInRange( verify->DatarateParams.Datarate, DR_0, DR_5 ); - 381:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 382:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_RX_DR: - 383:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 384:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return RegionCommonValueInRange( verify->DatarateParams.Datarate, EU868_RX_MIN_DATARATE - 385:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 386:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DEF_TX_POWER: - 387:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_TX_POWER: - 388:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 389:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Remark: switched min and max! - 390:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return RegionCommonValueInRange( verify->TxPower, EU868_MAX_TX_POWER, EU868_MIN_TX_POWE - 391:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 392:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_DUTY_CYCLE: - 393:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 394:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return EU868_DUTY_CYCLE_ENABLED; - 573 .loc 1 394 0 - 574 0012 0120 movs r0, #1 - 575 .LVL42: - 576 .L52: - 395:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 396:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case PHY_NB_JOIN_TRIALS: - 397:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 398:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( verify->NbJoinTrials < 48 ) - 399:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 400:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return false; - 401:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 402:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 403:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 404:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** default: - 405:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return false; - 406:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 407:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return true; - ARM GAS /tmp/cczfoKrY.s page 19 - - - 408:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 577 .loc 1 408 0 - 578 @ sp needed - 579 0014 10BD pop {r4, pc} - 580 .LVL43: - 581 .L53: - 376:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 582 .loc 1 376 0 - 583 0016 0078 ldrb r0, [r0] - 584 .LVL44: - 585 0018 40B2 sxtb r0, r0 - 586 001a 0722 movs r2, #7 - 587 001c 0021 movs r1, #0 - 588 001e FFF7FEFF bl RegionCommonValueInRange - 589 .LVL45: - 590 0022 431E subs r3, r0, #1 - 591 0024 9841 sbcs r0, r0, r3 - 592 0026 C0B2 uxtb r0, r0 - 593 0028 F4E7 b .L52 - 594 .LVL46: - 595 .L55: - 380:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 596 .loc 1 380 0 - 597 002a 0078 ldrb r0, [r0] - 598 .LVL47: - 599 002c 40B2 sxtb r0, r0 - 600 002e 0522 movs r2, #5 - 601 0030 0021 movs r1, #0 - 602 0032 FFF7FEFF bl RegionCommonValueInRange - 603 .LVL48: - 604 0036 431E subs r3, r0, #1 - 605 0038 9841 sbcs r0, r0, r3 - 606 003a C0B2 uxtb r0, r0 - 607 003c EAE7 b .L52 - 608 .LVL49: - 609 .L56: - 384:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 610 .loc 1 384 0 - 611 003e 0078 ldrb r0, [r0] - 612 .LVL50: - 613 0040 40B2 sxtb r0, r0 - 614 0042 0722 movs r2, #7 - 615 0044 0021 movs r1, #0 - 616 0046 FFF7FEFF bl RegionCommonValueInRange - 617 .LVL51: - 618 004a 431E subs r3, r0, #1 - 619 004c 9841 sbcs r0, r0, r3 - 620 004e C0B2 uxtb r0, r0 - 621 0050 E0E7 b .L52 - 622 .LVL52: - 623 .L57: - 390:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 624 .loc 1 390 0 - 625 0052 0078 ldrb r0, [r0] - 626 .LVL53: - 627 0054 40B2 sxtb r0, r0 - 628 0056 0722 movs r2, #7 - ARM GAS /tmp/cczfoKrY.s page 20 - - - 629 0058 0021 movs r1, #0 - 630 005a FFF7FEFF bl RegionCommonValueInRange - 631 .LVL54: - 632 005e 431E subs r3, r0, #1 - 633 0060 9841 sbcs r0, r0, r3 - 634 0062 C0B2 uxtb r0, r0 - 635 0064 D6E7 b .L52 - 636 .LVL55: - 637 .L59: - 398:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 638 .loc 1 398 0 - 639 0066 0378 ldrb r3, [r0] - 640 0068 2F2B cmp r3, #47 - 641 006a 01D9 bls .L62 - 407:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 642 .loc 1 407 0 - 643 006c 0120 movs r0, #1 - 644 .LVL56: - 645 006e D1E7 b .L52 - 646 .LVL57: - 647 .L62: - 400:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 648 .loc 1 400 0 - 649 0070 0020 movs r0, #0 - 650 .LVL58: - 651 0072 CFE7 b .L52 - 652 .LVL59: - 653 .L60: - 405:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 654 .loc 1 405 0 - 655 0074 0020 movs r0, #0 - 656 .LVL60: - 657 0076 CDE7 b .L52 - 658 .L64: - 659 .align 2 - 660 .L63: - 661 0078 00000000 .word .L54 - 662 .cfi_endproc - 663 .LFE93: - 665 .section .text.RegionEU868ChanMaskSet,"ax",%progbits - 666 .align 1 - 667 .global RegionEU868ChanMaskSet - 668 .syntax unified - 669 .code 16 - 670 .thumb_func - 671 .fpu softvfp - 673 RegionEU868ChanMaskSet: - 674 .LFB95: - 409:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 410:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** void RegionEU868ApplyCFList( ApplyCFListParams_t* applyCFList ) - 411:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 412:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelParams_t newChannel; - 413:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelAddParams_t channelAdd; - 414:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelRemoveParams_t channelRemove; - 415:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 416:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Setup default datarate range - 417:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.DrRange.Value = ( DR_5 << 4 ) | DR_0; - ARM GAS /tmp/cczfoKrY.s page 21 - - - 418:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 419:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Size of the optional CF list - 420:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( applyCFList->Size != 16 ) - 421:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 422:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return; - 423:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 424:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 425:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Last byte is RFU, don't take it into account - 426:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** for( uint8_t i = 0, chanIdx = EU868_NUMB_DEFAULT_CHANNELS; chanIdx < EU868_MAX_NB_CHANNELS; i+= - 427:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 428:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( chanIdx < ( EU868_NUMB_CHANNELS_CF_LIST + EU868_NUMB_DEFAULT_CHANNELS ) ) - 429:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 430:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Channel frequency - 431:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Frequency = (uint32_t) applyCFList->Payload[i]; - 432:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Frequency |= ( (uint32_t) applyCFList->Payload[i + 1] << 8 ); - 433:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Frequency |= ( (uint32_t) applyCFList->Payload[i + 2] << 16 ); - 434:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Frequency *= 100; - 435:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 436:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Initialize alternative frequency to 0 - 437:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Rx1Frequency = 0; - 438:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 439:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 440:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 441:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Frequency = 0; - 442:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.DrRange.Value = 0; - 443:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Rx1Frequency = 0; - 444:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 445:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 446:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( newChannel.Frequency != 0 ) - 447:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 448:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channelAdd.NewChannel = &newChannel; - 449:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channelAdd.ChannelId = chanIdx; - 450:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 451:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Try to add all channels - 452:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionEU868ChannelAdd( &channelAdd ); - 453:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 454:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 455:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 456:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channelRemove.ChannelId = chanIdx; - 457:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 458:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionEU868ChannelsRemove( &channelRemove ); - 459:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 460:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 461:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 462:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 463:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool RegionEU868ChanMaskSet( ChanMaskSetParams_t* chanMaskSet ) - 464:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 675 .loc 1 464 0 - 676 .cfi_startproc - 677 @ args = 0, pretend = 0, frame = 0 - 678 @ frame_needed = 0, uses_anonymous_args = 0 - 679 .LVL61: - 680 0000 10B5 push {r4, lr} - 681 .LCFI5: - 682 .cfi_def_cfa_offset 8 - 683 .cfi_offset 4, -8 - 684 .cfi_offset 14, -4 - ARM GAS /tmp/cczfoKrY.s page 22 - - - 465:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** switch( chanMaskSet->ChannelsMaskType ) - 685 .loc 1 465 0 - 686 0002 0379 ldrb r3, [r0, #4] - 687 0004 002B cmp r3, #0 - 688 0006 03D0 beq .L67 - 689 0008 012B cmp r3, #1 - 690 000a 08D0 beq .L68 - 466:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 467:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case CHANNELS_MASK: - 468:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 469:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionCommonChanMaskCopy( ChannelsMask, chanMaskSet->ChannelsMaskIn, 1 ); - 470:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 471:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 472:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case CHANNELS_DEFAULT_MASK: - 473:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 474:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionCommonChanMaskCopy( ChannelsDefaultMask, chanMaskSet->ChannelsMaskIn, 1 ); - 475:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 476:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 477:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** default: - 478:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return false; - 691 .loc 1 478 0 - 692 000c 0020 movs r0, #0 - 693 .LVL62: - 694 000e 05E0 b .L66 - 695 .LVL63: - 696 .L67: - 469:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 697 .loc 1 469 0 - 698 0010 0168 ldr r1, [r0] - 699 0012 0122 movs r2, #1 - 700 0014 0548 ldr r0, .L71 - 701 .LVL64: - 702 0016 FFF7FEFF bl RegionCommonChanMaskCopy - 703 .LVL65: - 479:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 480:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return true; - 704 .loc 1 480 0 - 705 001a 0120 movs r0, #1 - 706 .L66: - 481:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 707 .loc 1 481 0 - 708 @ sp needed - 709 001c 10BD pop {r4, pc} - 710 .LVL66: - 711 .L68: - 474:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 712 .loc 1 474 0 - 713 001e 0168 ldr r1, [r0] - 714 0020 0122 movs r2, #1 - 715 0022 0348 ldr r0, .L71+4 - 716 .LVL67: - 717 0024 FFF7FEFF bl RegionCommonChanMaskCopy - 718 .LVL68: - 480:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 719 .loc 1 480 0 - 720 0028 0120 movs r0, #1 - 475:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - ARM GAS /tmp/cczfoKrY.s page 23 - - - 721 .loc 1 475 0 - 722 002a F7E7 b .L66 - 723 .L72: - 724 .align 2 - 725 .L71: - 726 002c 00000000 .word .LANCHOR2 - 727 0030 00000000 .word .LANCHOR3 - 728 .cfi_endproc - 729 .LFE95: - 731 .section .text.RegionEU868AdrNext,"ax",%progbits - 732 .align 1 - 733 .global RegionEU868AdrNext - 734 .syntax unified - 735 .code 16 - 736 .thumb_func - 737 .fpu softvfp - 739 RegionEU868AdrNext: - 740 .LFB96: - 482:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 483:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool RegionEU868AdrNext( AdrNextParams_t* adrNext, int8_t* drOut, int8_t* txPowOut, uint32_t* adrAc - 484:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 741 .loc 1 484 0 - 742 .cfi_startproc - 743 @ args = 0, pretend = 0, frame = 8 - 744 @ frame_needed = 0, uses_anonymous_args = 0 - 745 .LVL69: - 746 0000 F0B5 push {r4, r5, r6, r7, lr} - 747 .LCFI6: - 748 .cfi_def_cfa_offset 20 - 749 .cfi_offset 4, -20 - 750 .cfi_offset 5, -16 - 751 .cfi_offset 6, -12 - 752 .cfi_offset 7, -8 - 753 .cfi_offset 14, -4 - 754 0002 C646 mov lr, r8 - 755 0004 00B5 push {lr} - 756 .LCFI7: - 757 .cfi_def_cfa_offset 24 - 758 .cfi_offset 8, -24 - 759 0006 82B0 sub sp, sp, #8 - 760 .LCFI8: - 761 .cfi_def_cfa_offset 32 - 762 0008 0400 movs r4, r0 - 763 000a 8846 mov r8, r1 - 764 000c 1700 movs r7, r2 - 765 .LVL70: - 485:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool adrAckReq = false; - 486:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t datarate = adrNext->Datarate; - 766 .loc 1 486 0 - 767 000e 0822 movs r2, #8 - 768 .LVL71: - 769 0010 8256 ldrsb r2, [r0, r2] - 770 .LVL72: - 487:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t txPower = adrNext->TxPower; - 771 .loc 1 487 0 - 772 0012 0926 movs r6, #9 - 773 0014 8657 ldrsb r6, [r0, r6] - ARM GAS /tmp/cczfoKrY.s page 24 - - - 774 .LVL73: - 488:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** GetPhyParams_t getPhy; - 489:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** PhyParam_t phyParam; - 490:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 491:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Report back the adr ack counter - 492:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *adrAckCounter = adrNext->AdrAckCounter; - 775 .loc 1 492 0 - 776 0016 4168 ldr r1, [r0, #4] - 777 .LVL74: - 778 0018 1960 str r1, [r3] - 493:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 494:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( adrNext->AdrEnabled == true ) - 779 .loc 1 494 0 - 780 001a 4578 ldrb r5, [r0, #1] - 781 001c 002D cmp r5, #0 - 782 001e 23D0 beq .L74 - 495:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 496:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( datarate == EU868_TX_MIN_DATARATE ) - 783 .loc 1 496 0 - 784 0020 002A cmp r2, #0 - 785 0022 1ED0 beq .L78 - 497:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 498:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *adrAckCounter = 0; - 499:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** adrAckReq = false; - 500:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 501:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 502:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 503:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( adrNext->AdrAckCounter >= EU868_ADR_ACK_LIMIT ) - 786 .loc 1 503 0 - 787 0024 4368 ldr r3, [r0, #4] - 788 .LVL75: - 789 0026 3F2B cmp r3, #63 - 790 0028 26D9 bls .L77 - 504:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 505:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** adrAckReq = true; - 506:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** txPower = EU868_MAX_TX_POWER; - 791 .loc 1 506 0 - 792 002a 0026 movs r6, #0 - 793 .LVL76: - 794 .L76: - 507:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 508:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 509:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 510:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** adrAckReq = false; - 511:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 512:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( adrNext->AdrAckCounter >= ( EU868_ADR_ACK_LIMIT + EU868_ADR_ACK_DELAY ) ) - 795 .loc 1 512 0 - 796 002c 5F2B cmp r3, #95 - 797 002e 1BD9 bls .L74 - 513:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 514:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( ( adrNext->AdrAckCounter % EU868_ADR_ACK_DELAY ) == 1 ) - 798 .loc 1 514 0 - 799 0030 1F21 movs r1, #31 - 800 0032 0B40 ands r3, r1 - 801 0034 012B cmp r3, #1 - 802 0036 17D1 bne .L74 - 515:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - ARM GAS /tmp/cczfoKrY.s page 25 - - - 516:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Decrease the datarate - 517:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** getPhy.Attribute = PHY_NEXT_LOWER_TX_DR; - 803 .loc 1 517 0 - 804 0038 01A8 add r0, sp, #4 - 805 .LVL77: - 806 003a 1F33 adds r3, r3, #31 - 807 003c 0370 strb r3, [r0] - 518:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** getPhy.Datarate = datarate; - 808 .loc 1 518 0 - 809 003e 4270 strb r2, [r0, #1] - 519:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** getPhy.UplinkDwellTime = adrNext->UplinkDwellTime; - 810 .loc 1 519 0 - 811 0040 A37A ldrb r3, [r4, #10] - 812 0042 8370 strb r3, [r0, #2] - 520:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam = RegionEU868GetPhyParam( &getPhy ); - 813 .loc 1 520 0 - 814 0044 FFF7FEFF bl RegionEU868GetPhyParam - 815 .LVL78: - 521:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** datarate = phyParam.Value; - 816 .loc 1 521 0 - 817 0048 42B2 sxtb r2, r0 - 818 .LVL79: - 522:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 523:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( datarate == EU868_TX_MIN_DATARATE ) - 819 .loc 1 523 0 - 820 004a 002A cmp r2, #0 - 821 004c 0CD1 bne .L74 - 822 .LVL80: - 524:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 525:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // We must set adrAckReq to false as soon as we reach the lowest datarate - 526:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** adrAckReq = false; - 527:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( adrNext->UpdateChanMask == true ) - 823 .loc 1 527 0 - 824 004e 2578 ldrb r5, [r4] - 825 0050 002D cmp r5, #0 - 826 0052 09D0 beq .L74 - 528:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 529:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Re-enable default channels - 530:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelsMask[0] |= LC( 1 ) + LC( 2 ) + LC( 3 ); - 827 .loc 1 530 0 - 828 0054 0949 ldr r1, .L79 - 829 0056 0B88 ldrh r3, [r1] - 830 0058 0720 movs r0, #7 - 831 005a 0343 orrs r3, r0 - 832 005c 0B80 strh r3, [r1] - 526:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( adrNext->UpdateChanMask == true ) - 833 .loc 1 526 0 - 834 005e 0025 movs r5, #0 - 835 0060 02E0 b .L74 - 836 .LVL81: - 837 .L78: - 498:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** adrAckReq = false; - 838 .loc 1 498 0 - 839 0062 0021 movs r1, #0 - 840 0064 1960 str r1, [r3] - 499:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 841 .loc 1 499 0 - ARM GAS /tmp/cczfoKrY.s page 26 - - - 842 0066 0025 movs r5, #0 - 843 .LVL82: - 844 .L74: - 531:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 532:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 533:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 534:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 535:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 536:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 537:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 538:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *drOut = datarate; - 845 .loc 1 538 0 - 846 0068 4346 mov r3, r8 - 847 006a 1A70 strb r2, [r3] - 539:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *txPowOut = txPower; - 848 .loc 1 539 0 - 849 006c 3E70 strb r6, [r7] - 540:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return adrAckReq; - 541:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 850 .loc 1 541 0 - 851 006e 2800 movs r0, r5 - 852 0070 02B0 add sp, sp, #8 - 853 @ sp needed - 854 .LVL83: - 855 .LVL84: - 856 .LVL85: - 857 .LVL86: - 858 .LVL87: - 859 0072 04BC pop {r2} - 860 0074 9046 mov r8, r2 - 861 0076 F0BD pop {r4, r5, r6, r7, pc} - 862 .LVL88: - 863 .L77: - 510:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 864 .loc 1 510 0 - 865 0078 0025 movs r5, #0 - 866 007a D7E7 b .L76 - 867 .L80: - 868 .align 2 - 869 .L79: - 870 007c 00000000 .word .LANCHOR2 - 871 .cfi_endproc - 872 .LFE96: - 874 .section .text.RegionEU868ComputeRxWindowParameters,"ax",%progbits - 875 .align 1 - 876 .global RegionEU868ComputeRxWindowParameters - 877 .syntax unified - 878 .code 16 - 879 .thumb_func - 880 .fpu softvfp - 882 RegionEU868ComputeRxWindowParameters: - 883 .LFB97: - 542:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 543:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** void RegionEU868ComputeRxWindowParameters( int8_t datarate, uint8_t minRxSymbols, uint32_t rxError, - 544:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 884 .loc 1 544 0 - 885 .cfi_startproc - ARM GAS /tmp/cczfoKrY.s page 27 - - - 886 @ args = 0, pretend = 0, frame = 8 - 887 @ frame_needed = 0, uses_anonymous_args = 0 - 888 .LVL89: - 889 0000 70B5 push {r4, r5, r6, lr} - 890 .LCFI9: - 891 .cfi_def_cfa_offset 16 - 892 .cfi_offset 4, -16 - 893 .cfi_offset 5, -12 - 894 .cfi_offset 6, -8 - 895 .cfi_offset 14, -4 - 896 0002 86B0 sub sp, sp, #24 - 897 .LCFI10: - 898 .cfi_def_cfa_offset 40 - 899 0004 0C00 movs r4, r1 - 900 0006 1500 movs r5, r2 - 901 0008 1E00 movs r6, r3 - 902 .LVL90: - 545:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** double tSymbol = 0.0; - 546:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint32_t radioWakeUpTime; - 547:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 548:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Get the datarate, perform a boundary check - 549:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** rxConfigParams->Datarate = MIN( datarate, EU868_RX_MAX_DATARATE ); - 903 .loc 1 549 0 - 904 000a 021C adds r2, r0, #0 - 905 .LVL91: - 906 000c 0728 cmp r0, #7 - 907 000e 00DD ble .L82 - 908 0010 0722 movs r2, #7 - 909 .L82: - 910 0012 53B2 sxtb r3, r2 - 911 .LVL92: - 912 0014 7270 strb r2, [r6, #1] - 913 .LVL93: - 914 .LBB18: - 915 .LBB19: - 85:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 916 .loc 1 85 0 - 917 0016 9900 lsls r1, r3, #2 - 918 .LVL94: - 919 0018 184A ldr r2, .L90 - 920 001a 8A58 ldr r2, [r1, r2] - 921 001c 1849 ldr r1, .L90+4 - 922 001e 8A42 cmp r2, r1 - 923 0020 22D0 beq .L88 - 924 0022 1849 ldr r1, .L90+8 - 925 0024 8A42 cmp r2, r1 - 926 0026 1DD0 beq .L85 - 89:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case 250000: - 927 .loc 1 89 0 - 928 0028 0022 movs r2, #0 - 929 .L84: - 930 .LVL95: - 931 .LBE19: - 932 .LBE18: - 550:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** rxConfigParams->Bandwidth = GetBandwidth( rxConfigParams->Datarate ); - 933 .loc 1 550 0 - 934 002a B270 strb r2, [r6, #2] - ARM GAS /tmp/cczfoKrY.s page 28 - - - 551:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 552:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( rxConfigParams->Datarate == DR_7 ) - 935 .loc 1 552 0 - 936 002c 072B cmp r3, #7 - 937 002e 1DD0 beq .L89 - 553:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // FSK - 554:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** tSymbol = RegionCommonComputeSymbolTimeFsk( DataratesEU868[rxConfigParams->Datarate] ); - 555:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 556:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 557:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // LoRa - 558:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** tSymbol = RegionCommonComputeSymbolTimeLoRa( DataratesEU868[rxConfigParams->Datarate], Band - 938 .loc 1 558 0 - 939 0030 154A ldr r2, .L90+12 - 940 0032 D05C ldrb r0, [r2, r3] - 941 .LVL96: - 942 0034 9B00 lsls r3, r3, #2 - 943 0036 114A ldr r2, .L90 - 944 0038 9958 ldr r1, [r3, r2] - 945 003a FFF7FEFF bl RegionCommonComputeSymbolTimeLoRa - 946 .LVL97: - 947 003e 0490 str r0, [sp, #16] - 948 0040 0591 str r1, [sp, #20] - 949 .LVL98: - 950 .L87: - 559:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 560:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 561:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** radioWakeUpTime = Radio.GetRadioWakeUpTime(); - 951 .loc 1 561 0 - 952 0042 124B ldr r3, .L90+16 - 953 0044 5B6E ldr r3, [r3, #100] - 954 0046 9847 blx r3 - 955 .LVL99: - 562:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionCommonComputeRxWindowParameters( tSymbol, minRxSymbols, rxError, radioWakeUpTime, &rxConf - 956 .loc 1 562 0 - 957 0048 3300 movs r3, r6 - 958 004a 0C33 adds r3, r3, #12 - 959 004c 0293 str r3, [sp, #8] - 960 004e 043B subs r3, r3, #4 - 961 0050 0193 str r3, [sp, #4] - 962 0052 0090 str r0, [sp] - 963 0054 2B00 movs r3, r5 - 964 0056 2200 movs r2, r4 - 965 0058 0498 ldr r0, [sp, #16] - 966 005a 0599 ldr r1, [sp, #20] - 967 .LVL100: - 968 005c FFF7FEFF bl RegionCommonComputeRxWindowParameters - 969 .LVL101: - 563:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 970 .loc 1 563 0 - 971 0060 06B0 add sp, sp, #24 - 972 @ sp needed - 973 .LVL102: - 974 .LVL103: - 975 0062 70BD pop {r4, r5, r6, pc} - 976 .LVL104: - 977 .L85: - 978 .LBB21: - ARM GAS /tmp/cczfoKrY.s page 29 - - - 979 .LBB20: - 93:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 980 .loc 1 93 0 - 981 0064 0222 movs r2, #2 - 982 0066 E0E7 b .L84 - 983 .L88: - 91:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case 500000: - 984 .loc 1 91 0 - 985 0068 0122 movs r2, #1 - 986 006a DEE7 b .L84 - 987 .LVL105: - 988 .L89: - 989 .LBE20: - 990 .LBE21: - 554:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 991 .loc 1 554 0 - 992 006c 064A ldr r2, .L90+12 - 993 006e D05C ldrb r0, [r2, r3] - 994 .LVL106: - 995 0070 FFF7FEFF bl RegionCommonComputeSymbolTimeFsk - 996 .LVL107: - 997 0074 0490 str r0, [sp, #16] - 998 0076 0591 str r1, [sp, #20] - 999 .LVL108: - 1000 0078 E3E7 b .L87 - 1001 .L91: - 1002 007a C046 .align 2 - 1003 .L90: - 1004 007c 00000000 .word .LANCHOR6 - 1005 0080 90D00300 .word 250000 - 1006 0084 20A10700 .word 500000 - 1007 0088 00000000 .word .LANCHOR7 - 1008 008c 00000000 .word Radio - 1009 .cfi_endproc - 1010 .LFE97: - 1012 .section .text.RegionEU868RxConfig,"ax",%progbits - 1013 .align 1 - 1014 .global RegionEU868RxConfig - 1015 .syntax unified - 1016 .code 16 - 1017 .thumb_func - 1018 .fpu softvfp - 1020 RegionEU868RxConfig: - 1021 .LFB98: - 564:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 565:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool RegionEU868RxConfig( RxConfigParams_t* rxConfig, int8_t* datarate ) - 566:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1022 .loc 1 566 0 - 1023 .cfi_startproc - 1024 @ args = 0, pretend = 0, frame = 8 - 1025 @ frame_needed = 0, uses_anonymous_args = 0 - 1026 .LVL109: - 1027 0000 F0B5 push {r4, r5, r6, r7, lr} - 1028 .LCFI11: - 1029 .cfi_def_cfa_offset 20 - 1030 .cfi_offset 4, -20 - 1031 .cfi_offset 5, -16 - ARM GAS /tmp/cczfoKrY.s page 30 - - - 1032 .cfi_offset 6, -12 - 1033 .cfi_offset 7, -8 - 1034 .cfi_offset 14, -4 - 1035 0002 8DB0 sub sp, sp, #52 - 1036 .LCFI12: - 1037 .cfi_def_cfa_offset 72 - 1038 0004 0400 movs r4, r0 - 1039 0006 0B91 str r1, [sp, #44] - 567:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RadioModems_t modem; - 568:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t dr = rxConfig->Datarate; - 1040 .loc 1 568 0 - 1041 0008 0126 movs r6, #1 - 1042 000a 8657 ldrsb r6, [r0, r6] - 1043 .LVL110: - 569:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t maxPayload = 0; - 570:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t phyDr = 0; - 571:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint32_t frequency = rxConfig->Frequency; - 1044 .loc 1 571 0 - 1045 000c 4768 ldr r7, [r0, #4] - 1046 .LVL111: - 572:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 573:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( Radio.GetStatus( ) != RF_IDLE ) - 1047 .loc 1 573 0 - 1048 000e 334B ldr r3, .L101 - 1049 0010 DB68 ldr r3, [r3, #12] - 1050 0012 9847 blx r3 - 1051 .LVL112: - 1052 0014 0028 cmp r0, #0 - 1053 0016 5ED1 bne .L99 - 574:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 575:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return false; - 576:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 577:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 578:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( rxConfig->Window == 0 ) - 1054 .loc 1 578 0 - 1055 0018 E37C ldrb r3, [r4, #19] - 1056 001a 002B cmp r3, #0 - 1057 001c 0BD1 bne .L94 - 579:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 580:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Apply window 1 frequency - 581:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** frequency = Channels[rxConfig->Channel].Frequency; - 1058 .loc 1 581 0 - 1059 001e 2178 ldrb r1, [r4] - 1060 0020 2F4A ldr r2, .L101+4 - 1061 0022 4B00 lsls r3, r1, #1 - 1062 0024 5F18 adds r7, r3, r1 - 1063 .LVL113: - 1064 0026 B800 lsls r0, r7, #2 - 1065 0028 0700 movs r7, r0 - 1066 002a 8058 ldr r0, [r0, r2] - 1067 .LVL114: - 582:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Apply the alternative RX 1 window frequency, if it is available - 583:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( Channels[rxConfig->Channel].Rx1Frequency != 0 ) - 1068 .loc 1 583 0 - 1069 002c D219 adds r2, r2, r7 - 1070 002e 5768 ldr r7, [r2, #4] - 1071 0030 002F cmp r7, #0 - ARM GAS /tmp/cczfoKrY.s page 31 - - - 1072 0032 00D1 bne .L94 - 581:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Apply the alternative RX 1 window frequency, if it is available - 1073 .loc 1 581 0 - 1074 0034 0700 movs r7, r0 - 1075 .LVL115: - 1076 .L94: - 584:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 585:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** frequency = Channels[rxConfig->Channel].Rx1Frequency; - 586:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 587:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 588:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 589:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Read the physical datarate from the datarates table - 590:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyDr = DataratesEU868[dr]; - 1077 .loc 1 590 0 - 1078 0036 2B4B ldr r3, .L101+8 - 1079 0038 9D57 ldrsb r5, [r3, r6] - 1080 .LVL116: - 591:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 592:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetChannel( frequency ); - 1081 .loc 1 592 0 - 1082 003a 284B ldr r3, .L101 - 1083 003c 5B69 ldr r3, [r3, #20] - 1084 003e 3800 movs r0, r7 - 1085 0040 9847 blx r3 - 1086 .LVL117: - 593:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 594:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Radio configuration - 595:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( dr == DR_7 ) - 1087 .loc 1 595 0 - 1088 0042 072E cmp r6, #7 - 1089 0044 26D0 beq .L100 - 1090 .LVL118: - 596:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 597:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** modem = MODEM_FSK; - 598:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetRxConfig( modem, 50000, phyDr * 1000, 0, 83333, 5, rxConfig->WindowTimeout, false, - 599:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 600:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 601:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 602:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** modem = MODEM_LORA; - 603:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetRxConfig( modem, rxConfig->Bandwidth, phyDr, 1, 0, 8, rxConfig->WindowTimeout, fal - 1091 .loc 1 603 0 - 1092 0046 254B ldr r3, .L101 - 1093 0048 1F6A ldr r7, [r3, #32] - 1094 .LVL119: - 1095 004a A178 ldrb r1, [r4, #2] - 1096 004c A37C ldrb r3, [r4, #18] - 1097 004e 0993 str r3, [sp, #36] - 1098 0050 0123 movs r3, #1 - 1099 0052 0893 str r3, [sp, #32] - 1100 0054 0023 movs r3, #0 - 1101 0056 0793 str r3, [sp, #28] - 1102 0058 0693 str r3, [sp, #24] - 1103 005a 0593 str r3, [sp, #20] - 1104 005c 0493 str r3, [sp, #16] - 1105 005e 0393 str r3, [sp, #12] - 1106 0060 A268 ldr r2, [r4, #8] - 1107 0062 92B2 uxth r2, r2 - ARM GAS /tmp/cczfoKrY.s page 32 - - - 1108 0064 0292 str r2, [sp, #8] - 1109 0066 0822 movs r2, #8 - 1110 0068 0192 str r2, [sp, #4] - 1111 006a 0093 str r3, [sp] - 1112 006c 0133 adds r3, r3, #1 - 1113 006e 2A00 movs r2, r5 - 1114 0070 0120 movs r0, #1 - 1115 0072 B847 blx r7 - 1116 .LVL120: - 602:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetRxConfig( modem, rxConfig->Bandwidth, phyDr, 1, 0, 8, rxConfig->WindowTimeout, fal - 1117 .loc 1 602 0 - 1118 0074 0120 movs r0, #1 - 1119 .LVL121: - 1120 .L96: - 604:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 605:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 606:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( rxConfig->RepeaterSupport == true ) - 1121 .loc 1 606 0 - 1122 0076 637C ldrb r3, [r4, #17] - 1123 0078 002B cmp r3, #0 - 1124 007a 29D0 beq .L97 - 607:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 608:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** maxPayload = MaxPayloadOfDatarateRepeaterEU868[dr]; - 1125 .loc 1 608 0 - 1126 007c 1A4B ldr r3, .L101+12 - 1127 007e 995D ldrb r1, [r3, r6] - 1128 .LVL122: - 1129 .L98: - 609:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 610:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 611:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 612:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** maxPayload = MaxPayloadOfDatarateEU868[dr]; - 613:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 614:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 615:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetMaxPayloadLength( modem, maxPayload + LORA_MAC_FRMPAYLOAD_OVERHEAD ); - 1130 .loc 1 615 0 - 1131 0080 164B ldr r3, .L101 - 1132 0082 DB6D ldr r3, [r3, #92] - 1133 0084 0D31 adds r1, r1, #13 - 1134 .LVL123: - 1135 0086 C9B2 uxtb r1, r1 - 1136 0088 9847 blx r3 - 1137 .LVL124: - 616:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** DBG_PRINTF( "RX on freq %d Hz at DR %d\n\r", frequency, dr ); - 617:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 618:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *datarate = (uint8_t) dr; - 1138 .loc 1 618 0 - 1139 008a 0B9B ldr r3, [sp, #44] - 1140 008c 1E70 strb r6, [r3] - 619:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return true; - 1141 .loc 1 619 0 - 1142 008e 0120 movs r0, #1 - 1143 .LVL125: - 1144 .L93: - 620:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1145 .loc 1 620 0 - 1146 0090 0DB0 add sp, sp, #52 - ARM GAS /tmp/cczfoKrY.s page 33 - - - 1147 @ sp needed - 1148 .LVL126: - 1149 .LVL127: - 1150 0092 F0BD pop {r4, r5, r6, r7, pc} - 1151 .LVL128: - 1152 .L100: - 598:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1153 .loc 1 598 0 - 1154 0094 114B ldr r3, .L101 - 1155 0096 1F6A ldr r7, [r3, #32] - 1156 .LVL129: - 1157 0098 6B01 lsls r3, r5, #5 - 1158 009a 5B1B subs r3, r3, r5 - 1159 009c 9B00 lsls r3, r3, #2 - 1160 009e 5B19 adds r3, r3, r5 - 1161 00a0 DA00 lsls r2, r3, #3 - 1162 00a2 A37C ldrb r3, [r4, #18] - 1163 00a4 0993 str r3, [sp, #36] - 1164 00a6 0023 movs r3, #0 - 1165 00a8 0893 str r3, [sp, #32] - 1166 00aa 0793 str r3, [sp, #28] - 1167 00ac 0693 str r3, [sp, #24] - 1168 00ae 0121 movs r1, #1 - 1169 00b0 0591 str r1, [sp, #20] - 1170 00b2 0493 str r3, [sp, #16] - 1171 00b4 0393 str r3, [sp, #12] - 1172 00b6 A368 ldr r3, [r4, #8] - 1173 00b8 9BB2 uxth r3, r3 - 1174 00ba 0293 str r3, [sp, #8] - 1175 00bc 0523 movs r3, #5 - 1176 00be 0193 str r3, [sp, #4] - 1177 00c0 0A4B ldr r3, .L101+16 - 1178 00c2 0093 str r3, [sp] - 1179 00c4 0023 movs r3, #0 - 1180 00c6 0A49 ldr r1, .L101+20 - 1181 00c8 0020 movs r0, #0 - 1182 00ca B847 blx r7 - 1183 .LVL130: - 597:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetRxConfig( modem, 50000, phyDr * 1000, 0, 83333, 5, rxConfig->WindowTimeout, false, - 1184 .loc 1 597 0 - 1185 00cc 0020 movs r0, #0 - 1186 00ce D2E7 b .L96 - 1187 .LVL131: - 1188 .L97: - 612:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1189 .loc 1 612 0 - 1190 00d0 084B ldr r3, .L101+24 - 1191 00d2 995D ldrb r1, [r3, r6] - 1192 .LVL132: - 1193 00d4 D4E7 b .L98 - 1194 .LVL133: - 1195 .L99: - 575:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1196 .loc 1 575 0 - 1197 00d6 0020 movs r0, #0 - 1198 00d8 DAE7 b .L93 - 1199 .L102: - ARM GAS /tmp/cczfoKrY.s page 34 - - - 1200 00da C046 .align 2 - 1201 .L101: - 1202 00dc 00000000 .word Radio - 1203 00e0 00000000 .word Channels - 1204 00e4 00000000 .word .LANCHOR7 - 1205 00e8 00000000 .word .LANCHOR1 - 1206 00ec 85450100 .word 83333 - 1207 00f0 50C30000 .word 50000 - 1208 00f4 00000000 .word .LANCHOR0 - 1209 .cfi_endproc - 1210 .LFE98: - 1212 .section .text.RegionEU868TxConfig,"ax",%progbits - 1213 .align 1 - 1214 .global RegionEU868TxConfig - 1215 .syntax unified - 1216 .code 16 - 1217 .thumb_func - 1218 .fpu softvfp - 1220 RegionEU868TxConfig: - 1221 .LFB99: - 621:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 622:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool RegionEU868TxConfig( TxConfigParams_t* txConfig, int8_t* txPower, TimerTime_t* txTimeOnAir ) - 623:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1222 .loc 1 623 0 - 1223 .cfi_startproc - 1224 @ args = 0, pretend = 0, frame = 8 - 1225 @ frame_needed = 0, uses_anonymous_args = 0 - 1226 .LVL134: - 1227 0000 F0B5 push {r4, r5, r6, r7, lr} - 1228 .LCFI13: - 1229 .cfi_def_cfa_offset 20 - 1230 .cfi_offset 4, -20 - 1231 .cfi_offset 5, -16 - 1232 .cfi_offset 6, -12 - 1233 .cfi_offset 7, -8 - 1234 .cfi_offset 14, -4 - 1235 0002 CE46 mov lr, r9 - 1236 0004 4746 mov r7, r8 - 1237 0006 80B5 push {r7, lr} - 1238 .LCFI14: - 1239 .cfi_def_cfa_offset 28 - 1240 .cfi_offset 8, -28 - 1241 .cfi_offset 9, -24 - 1242 0008 8DB0 sub sp, sp, #52 - 1243 .LCFI15: - 1244 .cfi_def_cfa_offset 80 - 1245 000a 0400 movs r4, r0 - 1246 000c 8846 mov r8, r1 - 1247 000e 9146 mov r9, r2 - 624:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RadioModems_t modem; - 625:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t phyDr = DataratesEU868[txConfig->Datarate]; - 1248 .loc 1 625 0 - 1249 0010 0123 movs r3, #1 - 1250 0012 C356 ldrsb r3, [r0, r3] - 1251 0014 3D4A ldr r2, .L112 - 1252 .LVL135: - 1253 0016 D756 ldrsb r7, [r2, r3] - ARM GAS /tmp/cczfoKrY.s page 35 - - - 1254 .LVL136: - 626:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t txPowerLimited = LimitTxPower( txConfig->TxPower, Bands[Channels[txConfig->Channel].Band - 1255 .loc 1 626 0 - 1256 0018 0220 movs r0, #2 - 1257 .LVL137: - 1258 001a 2056 ldrsb r0, [r4, r0] - 1259 001c 2178 ldrb r1, [r4] - 1260 .LVL138: - 1261 001e 4A00 lsls r2, r1, #1 - 1262 0020 5218 adds r2, r2, r1 - 1263 0022 9100 lsls r1, r2, #2 - 1264 0024 3A4A ldr r2, .L112+4 - 1265 0026 5218 adds r2, r2, r1 - 1266 0028 517A ldrb r1, [r2, #9] - 1267 002a 0901 lsls r1, r1, #4 - 1268 002c 394A ldr r2, .L112+8 - 1269 002e 5218 adds r2, r2, r1 - 1270 0030 9278 ldrb r2, [r2, #2] - 1271 0032 52B2 sxtb r2, r2 - 1272 .LVL139: - 1273 .LBB22: - 1274 .LBB23: - 102:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 1275 .loc 1 102 0 - 1276 0034 051C adds r5, r0, #0 - 1277 0036 9042 cmp r0, r2 - 1278 0038 00DA bge .L104 - 1279 003a 151C adds r5, r2, #0 - 1280 .L104: - 1281 003c 6DB2 sxtb r5, r5 - 1282 .LVL140: - 1283 .LBE23: - 1284 .LBE22: - 1285 .LBB24: - 1286 .LBB25: - 85:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1287 .loc 1 85 0 - 1288 003e 9B00 lsls r3, r3, #2 - 1289 .LVL141: - 1290 0040 354A ldr r2, .L112+12 - 1291 0042 9B58 ldr r3, [r3, r2] - 1292 0044 354A ldr r2, .L112+16 - 1293 0046 9342 cmp r3, r2 - 1294 0048 42D0 beq .L110 - 1295 004a 354A ldr r2, .L112+20 - 1296 004c 9342 cmp r3, r2 - 1297 004e 3CD0 beq .L107 - 89:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case 250000: - 1298 .loc 1 89 0 - 1299 0050 0023 movs r3, #0 - 1300 0052 0A93 str r3, [sp, #40] - 1301 .LVL142: - 1302 .L106: - 1303 .LBE25: - 1304 .LBE24: - 627:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint32_t bandwidth = GetBandwidth( txConfig->Datarate ); - 628:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t phyTxPower = 0; - ARM GAS /tmp/cczfoKrY.s page 36 - - - 629:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 630:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Calculate physical TX power - 631:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyTxPower = RegionCommonComputeTxPower( txPowerLimited, txConfig->MaxEirp, txConfig->AntennaGa - 1305 .loc 1 631 0 - 1306 0054 A268 ldr r2, [r4, #8] - 1307 0056 6168 ldr r1, [r4, #4] - 1308 0058 2800 movs r0, r5 - 1309 005a FFF7FEFF bl RegionCommonComputeTxPower - 1310 .LVL143: - 1311 005e 0B90 str r0, [sp, #44] - 1312 .LVL144: - 632:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 633:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Setup the radio frequency - 634:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetChannel( Channels[txConfig->Channel].Frequency ); - 1313 .loc 1 634 0 - 1314 0060 304B ldr r3, .L112+24 - 1315 0062 5969 ldr r1, [r3, #20] - 1316 0064 2278 ldrb r2, [r4] - 1317 0066 5300 lsls r3, r2, #1 - 1318 0068 9B18 adds r3, r3, r2 - 1319 006a 9A00 lsls r2, r3, #2 - 1320 006c 284B ldr r3, .L112+4 - 1321 006e D058 ldr r0, [r2, r3] - 1322 0070 8847 blx r1 - 1323 .LVL145: - 635:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 636:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( txConfig->Datarate == DR_7 ) - 1324 .loc 1 636 0 - 1325 0072 0123 movs r3, #1 - 1326 0074 E356 ldrsb r3, [r4, r3] - 1327 0076 072B cmp r3, #7 - 1328 0078 2DD0 beq .L111 - 1329 .LVL146: - 637:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // High Speed FSK channel - 638:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** modem = MODEM_FSK; - 639:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetTxConfig( modem, phyTxPower, 25000, bandwidth, phyDr * 1000, 0, 5, false, true, 0, - 640:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 641:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 642:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 643:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** modem = MODEM_LORA; - 644:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetTxConfig( modem, phyTxPower, 0, bandwidth, phyDr, 1, 8, false, true, 0, 0, false, - 1330 .loc 1 644 0 - 1331 007a 2A4B ldr r3, .L112+24 - 1332 007c 5E6A ldr r6, [r3, #36] - 1333 007e 2A4B ldr r3, .L112+28 - 1334 0080 0893 str r3, [sp, #32] - 1335 0082 0023 movs r3, #0 - 1336 0084 0793 str r3, [sp, #28] - 1337 0086 0693 str r3, [sp, #24] - 1338 0088 0593 str r3, [sp, #20] - 1339 008a 0122 movs r2, #1 - 1340 008c 0492 str r2, [sp, #16] - 1341 008e 0393 str r3, [sp, #12] - 1342 0090 0833 adds r3, r3, #8 - 1343 0092 0293 str r3, [sp, #8] - 1344 0094 0192 str r2, [sp, #4] - 1345 0096 0097 str r7, [sp] - ARM GAS /tmp/cczfoKrY.s page 37 - - - 1346 0098 0A9B ldr r3, [sp, #40] - 1347 009a 0022 movs r2, #0 - 1348 009c 0B99 ldr r1, [sp, #44] - 1349 009e 0120 movs r0, #1 - 1350 00a0 B047 blx r6 - 1351 .LVL147: - 643:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetTxConfig( modem, phyTxPower, 0, bandwidth, phyDr, 1, 8, false, true, 0, 0, false, - 1352 .loc 1 643 0 - 1353 00a2 0126 movs r6, #1 - 1354 .LVL148: - 1355 .L109: - 645:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 646:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** DBG_PRINTF( "TX on freq %d Hz at DR %d\n\r", Channels[txConfig->Channel].Frequency, txConfig->D - 647:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 648:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Setup maximum payload lenght of the radio driver - 649:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetMaxPayloadLength( modem, txConfig->PktLen ); - 1356 .loc 1 649 0 - 1357 00a4 1F4F ldr r7, .L112+24 - 1358 .LVL149: - 1359 00a6 217B ldrb r1, [r4, #12] - 1360 00a8 3000 movs r0, r6 - 1361 00aa FB6D ldr r3, [r7, #92] - 1362 00ac 9847 blx r3 - 1363 .LVL150: - 650:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Get the time-on-air of the next tx frame - 651:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *txTimeOnAir = Radio.TimeOnAir( modem, txConfig->PktLen ); - 1364 .loc 1 651 0 - 1365 00ae FB6A ldr r3, [r7, #44] - 1366 00b0 217B ldrb r1, [r4, #12] - 1367 00b2 3000 movs r0, r6 - 1368 00b4 9847 blx r3 - 1369 .LVL151: - 1370 00b6 4B46 mov r3, r9 - 1371 00b8 1860 str r0, [r3] - 652:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 653:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *txPower = txPowerLimited; - 1372 .loc 1 653 0 - 1373 00ba 4346 mov r3, r8 - 1374 00bc 1D70 strb r5, [r3] - 654:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return true; - 655:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1375 .loc 1 655 0 - 1376 00be 0120 movs r0, #1 - 1377 00c0 0DB0 add sp, sp, #52 - 1378 @ sp needed - 1379 .LVL152: - 1380 .LVL153: - 1381 .LVL154: - 1382 .LVL155: - 1383 00c2 0CBC pop {r2, r3} - 1384 00c4 9046 mov r8, r2 - 1385 00c6 9946 mov r9, r3 - 1386 00c8 F0BD pop {r4, r5, r6, r7, pc} - 1387 .LVL156: - 1388 .L107: - 1389 .LBB27: - 1390 .LBB26: - ARM GAS /tmp/cczfoKrY.s page 38 - - - 93:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1391 .loc 1 93 0 - 1392 00ca 0223 movs r3, #2 - 1393 00cc 0A93 str r3, [sp, #40] - 1394 .LVL157: - 1395 00ce C1E7 b .L106 - 1396 .LVL158: - 1397 .L110: - 91:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case 500000: - 1398 .loc 1 91 0 - 1399 00d0 0123 movs r3, #1 - 1400 .LVL159: - 1401 00d2 0A93 str r3, [sp, #40] - 1402 .LVL160: - 1403 00d4 BEE7 b .L106 - 1404 .LVL161: - 1405 .L111: - 1406 .LBE26: - 1407 .LBE27: - 639:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1408 .loc 1 639 0 - 1409 00d6 134B ldr r3, .L112+24 - 1410 00d8 5E6A ldr r6, [r3, #36] - 1411 00da 7B01 lsls r3, r7, #5 - 1412 00dc DB1B subs r3, r3, r7 - 1413 00de 9B00 lsls r3, r3, #2 - 1414 00e0 DB19 adds r3, r3, r7 - 1415 00e2 DA00 lsls r2, r3, #3 - 1416 00e4 104B ldr r3, .L112+28 - 1417 00e6 0893 str r3, [sp, #32] - 1418 00e8 0023 movs r3, #0 - 1419 00ea 0793 str r3, [sp, #28] - 1420 00ec 0693 str r3, [sp, #24] - 1421 00ee 0593 str r3, [sp, #20] - 1422 00f0 0121 movs r1, #1 - 1423 00f2 0491 str r1, [sp, #16] - 1424 00f4 0393 str r3, [sp, #12] - 1425 00f6 0431 adds r1, r1, #4 - 1426 00f8 0291 str r1, [sp, #8] - 1427 00fa 0193 str r3, [sp, #4] - 1428 00fc 0092 str r2, [sp] - 1429 00fe 0A9B ldr r3, [sp, #40] - 1430 0100 0A4A ldr r2, .L112+32 - 1431 0102 0B99 ldr r1, [sp, #44] - 1432 0104 0020 movs r0, #0 - 1433 0106 B047 blx r6 - 1434 .LVL162: - 638:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetTxConfig( modem, phyTxPower, 25000, bandwidth, phyDr * 1000, 0, 5, false, true, 0, - 1435 .loc 1 638 0 - 1436 0108 0026 movs r6, #0 - 1437 010a CBE7 b .L109 - 1438 .L113: - 1439 .align 2 - 1440 .L112: - 1441 010c 00000000 .word .LANCHOR7 - 1442 0110 00000000 .word Channels - 1443 0114 00000000 .word .LANCHOR4 - ARM GAS /tmp/cczfoKrY.s page 39 - - - 1444 0118 00000000 .word .LANCHOR6 - 1445 011c 90D00300 .word 250000 - 1446 0120 20A10700 .word 500000 - 1447 0124 00000000 .word Radio - 1448 0128 B80B0000 .word 3000 - 1449 012c A8610000 .word 25000 - 1450 .cfi_endproc - 1451 .LFE99: - 1453 .section .text.RegionEU868LinkAdrReq,"ax",%progbits - 1454 .align 1 - 1455 .global RegionEU868LinkAdrReq - 1456 .syntax unified - 1457 .code 16 - 1458 .thumb_func - 1459 .fpu softvfp - 1461 RegionEU868LinkAdrReq: - 1462 .LFB100: - 656:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 657:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t RegionEU868LinkAdrReq( LinkAdrReqParams_t* linkAdrReq, int8_t* drOut, int8_t* txPowOut, uin - 658:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1463 .loc 1 658 0 - 1464 .cfi_startproc - 1465 @ args = 4, pretend = 0, frame = 48 - 1466 @ frame_needed = 0, uses_anonymous_args = 0 - 1467 .LVL163: - 1468 0000 F0B5 push {r4, r5, r6, r7, lr} - 1469 .LCFI16: - 1470 .cfi_def_cfa_offset 20 - 1471 .cfi_offset 4, -20 - 1472 .cfi_offset 5, -16 - 1473 .cfi_offset 6, -12 - 1474 .cfi_offset 7, -8 - 1475 .cfi_offset 14, -4 - 1476 0002 D646 mov lr, r10 - 1477 0004 4F46 mov r7, r9 - 1478 0006 4646 mov r6, r8 - 1479 0008 C0B5 push {r6, r7, lr} - 1480 .LCFI17: - 1481 .cfi_def_cfa_offset 32 - 1482 .cfi_offset 8, -32 - 1483 .cfi_offset 9, -28 - 1484 .cfi_offset 10, -24 - 1485 000a 8CB0 sub sp, sp, #48 - 1486 .LCFI18: - 1487 .cfi_def_cfa_offset 80 - 1488 000c 0500 movs r5, r0 - 1489 000e 8946 mov r9, r1 - 1490 0010 9046 mov r8, r2 - 1491 0012 9A46 mov r10, r3 - 1492 .LVL164: - 659:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t status = 0x07; - 660:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionCommonLinkAdrParams_t linkAdrParams; - 661:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t nextIndex = 0; - 662:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t bytesProcessed = 0; - 663:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint16_t chMask = 0; - 1493 .loc 1 663 0 - 1494 0014 2623 movs r3, #38 - ARM GAS /tmp/cczfoKrY.s page 40 - - - 1495 .LVL165: - 1496 0016 6B44 add r3, r3, sp - 1497 0018 0022 movs r2, #0 - 1498 .LVL166: - 1499 001a 1A80 strh r2, [r3] - 662:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint16_t chMask = 0; - 1500 .loc 1 662 0 - 1501 001c 0024 movs r4, #0 - 659:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t status = 0x07; - 1502 .loc 1 659 0 - 1503 001e 0726 movs r6, #7 - 664:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** GetPhyParams_t getPhy; - 665:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** PhyParam_t phyParam; - 666:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionCommonLinkAdrReqVerifyParams_t linkAdrVerifyParams; - 667:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 668:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** while( bytesProcessed < linkAdrReq->PayloadSize ) - 1504 .loc 1 668 0 - 1505 0020 29E0 b .L115 - 1506 .LVL167: - 1507 .L152: - 1508 .LBB33: - 669:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 670:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Get ADR request parameters - 671:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** nextIndex = RegionCommonParseLinkAdrReq( &( linkAdrReq->Payload[bytesProcessed] ), &linkAdr - 672:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 673:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( nextIndex == 0 ) - 674:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; // break loop, since no more request has been found - 675:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 676:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Update bytes processed - 677:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bytesProcessed += nextIndex; - 678:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 679:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Revert status, as we only check the last ADR request for the channel mask KO - 680:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status = 0x07; - 681:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 682:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Setup temporary channels mask - 683:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** chMask = linkAdrParams.ChMask; - 684:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 685:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Verify channels mask - 686:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( ( linkAdrParams.ChMaskCtrl == 0 ) && ( chMask == 0 ) ) - 687:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 688:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFE; // Channel mask KO - 689:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 690:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( ( linkAdrParams.ChMaskCtrl >= 1 ) && ( linkAdrParams.ChMaskCtrl <= 5 )) || - 691:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ( linkAdrParams.ChMaskCtrl >= 7 ) ) - 692:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 693:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // RFU - 694:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFE; // Channel mask KO - 695:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 696:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 697:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 698:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** for( uint8_t i = 0; i < EU868_MAX_NB_CHANNELS; i++ ) - 1509 .loc 1 698 0 - 1510 0022 0023 movs r3, #0 - 1511 .LBE33: - 680:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 1512 .loc 1 680 0 - 1513 0024 0726 movs r6, #7 - ARM GAS /tmp/cczfoKrY.s page 41 - - - 1514 0026 0FE0 b .L119 - 1515 .LVL168: - 1516 .L151: - 1517 .LBB34: - 699:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 700:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( linkAdrParams.ChMaskCtrl == 6 ) - 701:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 702:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( Channels[i].Frequency != 0 ) - 1518 .loc 1 702 0 - 1519 0028 5A00 lsls r2, r3, #1 - 1520 002a D218 adds r2, r2, r3 - 1521 002c 9000 lsls r0, r2, #2 - 1522 002e 444A ldr r2, .L154 - 1523 0030 8258 ldr r2, [r0, r2] - 1524 0032 002A cmp r2, #0 - 1525 0034 06D0 beq .L121 - 703:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 704:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** chMask |= 1 << i; - 1526 .loc 1 704 0 - 1527 0036 0127 movs r7, #1 - 1528 0038 9F40 lsls r7, r7, r3 - 1529 003a 2620 movs r0, #38 - 1530 003c 6844 add r0, r0, sp - 1531 003e 0288 ldrh r2, [r0] - 1532 0040 3A43 orrs r2, r7 - 1533 0042 0280 strh r2, [r0] - 1534 .L121: - 698:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1535 .loc 1 698 0 discriminator 2 - 1536 0044 0133 adds r3, r3, #1 - 1537 .LVL169: - 1538 0046 DBB2 uxtb r3, r3 - 1539 .LVL170: - 1540 .L119: - 698:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1541 .loc 1 698 0 is_stmt 0 discriminator 1 - 1542 0048 0F2B cmp r3, #15 - 1543 004a 14D8 bhi .L115 - 700:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1544 .loc 1 700 0 is_stmt 1 - 1545 004c 0629 cmp r1, #6 - 1546 004e EBD0 beq .L151 - 705:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 706:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 707:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 708:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 709:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( ( ( chMask & ( 1 << i ) ) != 0 ) && - 1547 .loc 1 709 0 - 1548 0050 2622 movs r2, #38 - 1549 0052 6A44 add r2, r2, sp - 1550 0054 1288 ldrh r2, [r2] - 1551 0056 1A41 asrs r2, r2, r3 - 1552 0058 D207 lsls r2, r2, #31 - 1553 005a F3D5 bpl .L121 - 710:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ( Channels[i].Frequency == 0 ) ) - 1554 .loc 1 710 0 discriminator 1 - 1555 005c 5A00 lsls r2, r3, #1 - ARM GAS /tmp/cczfoKrY.s page 42 - - - 1556 005e D218 adds r2, r2, r3 - 1557 0060 9000 lsls r0, r2, #2 - 1558 0062 374A ldr r2, .L154 - 1559 0064 8258 ldr r2, [r0, r2] - 709:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ( Channels[i].Frequency == 0 ) ) - 1560 .loc 1 709 0 discriminator 1 - 1561 0066 002A cmp r2, #0 - 1562 0068 ECD1 bne .L121 - 711:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** {// Trying to enable an undefined channel - 712:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFE; // Channel mask KO - 1563 .loc 1 712 0 - 1564 006a 0132 adds r2, r2, #1 - 1565 006c 9643 bics r6, r2 - 1566 .LVL171: - 1567 006e E9E7 b .L121 - 1568 .LVL172: - 1569 .L147: - 1570 .LBE34: - 688:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1571 .loc 1 688 0 - 1572 0070 0626 movs r6, #6 - 1573 0072 00E0 b .L115 - 1574 .L148: - 694:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1575 .loc 1 694 0 - 1576 0074 0626 movs r6, #6 - 1577 .LVL173: - 1578 .L115: - 668:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1579 .loc 1 668 0 - 1580 0076 2B79 ldrb r3, [r5, #4] - 1581 0078 A342 cmp r3, r4 - 1582 007a 1AD9 bls .L116 - 671:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 1583 .loc 1 671 0 - 1584 007c 2B68 ldr r3, [r5] - 1585 007e 1819 adds r0, r3, r4 - 1586 0080 0AA9 add r1, sp, #40 - 1587 0082 FFF7FEFF bl RegionCommonParseLinkAdrReq - 1588 .LVL174: - 673:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; // break loop, since no more request has been found - 1589 .loc 1 673 0 - 1590 0086 0028 cmp r0, #0 - 1591 0088 13D0 beq .L116 - 677:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 1592 .loc 1 677 0 - 1593 008a 2418 adds r4, r4, r0 - 1594 .LVL175: - 1595 008c E4B2 uxtb r4, r4 - 1596 .LVL176: - 683:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 1597 .loc 1 683 0 - 1598 008e 0AAB add r3, sp, #40 - 1599 0090 9A88 ldrh r2, [r3, #4] - 1600 0092 2621 movs r1, #38 - 1601 0094 6944 add r1, r1, sp - 1602 0096 0A80 strh r2, [r1] - ARM GAS /tmp/cczfoKrY.s page 43 - - - 686:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1603 .loc 1 686 0 - 1604 0098 D978 ldrb r1, [r3, #3] - 1605 009a 0029 cmp r1, #0 - 1606 009c 01D1 bne .L117 - 686:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1607 .loc 1 686 0 is_stmt 0 discriminator 1 - 1608 009e 002A cmp r2, #0 - 1609 00a0 E6D0 beq .L147 - 1610 .L117: - 690:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ( linkAdrParams.ChMaskCtrl >= 7 ) ) - 1611 .loc 1 690 0 is_stmt 1 - 1612 00a2 4B1E subs r3, r1, #1 - 1613 00a4 DBB2 uxtb r3, r3 - 1614 00a6 042B cmp r3, #4 - 1615 00a8 E4D9 bls .L148 - 690:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ( linkAdrParams.ChMaskCtrl >= 7 ) ) - 1616 .loc 1 690 0 is_stmt 0 discriminator 1 - 1617 00aa 0629 cmp r1, #6 - 1618 00ac B9D9 bls .L152 - 694:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1619 .loc 1 694 0 is_stmt 1 - 1620 00ae 0626 movs r6, #6 - 1621 00b0 E1E7 b .L115 - 1622 .LVL177: - 1623 .L116: - 713:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 714:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 715:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 716:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 717:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 718:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 719:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Get the minimum possible datarate - 720:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** getPhy.Attribute = PHY_MIN_TX_DR; - 721:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** getPhy.UplinkDwellTime = linkAdrReq->UplinkDwellTime; - 722:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyParam = RegionEU868GetPhyParam( &getPhy ); - 723:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 724:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.Status = status; - 1624 .loc 1 724 0 - 1625 00b2 01A8 add r0, sp, #4 - 1626 00b4 0670 strb r6, [r0] - 725:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.AdrEnabled = linkAdrReq->AdrEnabled; - 1627 .loc 1 725 0 - 1628 00b6 AB79 ldrb r3, [r5, #6] - 1629 00b8 4370 strb r3, [r0, #1] - 726:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.Datarate = linkAdrParams.Datarate; - 1630 .loc 1 726 0 - 1631 00ba 0AAB add r3, sp, #40 - 1632 00bc 0122 movs r2, #1 - 1633 00be 9A56 ldrsb r2, [r3, r2] - 1634 00c0 8270 strb r2, [r0, #2] - 727:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.TxPower = linkAdrParams.TxPower; - 1635 .loc 1 727 0 - 1636 00c2 0222 movs r2, #2 - 1637 00c4 9A56 ldrsb r2, [r3, r2] - 1638 00c6 C270 strb r2, [r0, #3] - 728:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.NbRep = linkAdrParams.NbRep; - ARM GAS /tmp/cczfoKrY.s page 44 - - - 1639 .loc 1 728 0 - 1640 00c8 1A78 ldrb r2, [r3] - 1641 00ca 0271 strb r2, [r0, #4] - 729:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.CurrentDatarate = linkAdrReq->CurrentDatarate; - 1642 .loc 1 729 0 - 1643 00cc 0722 movs r2, #7 - 1644 00ce AA56 ldrsb r2, [r5, r2] - 1645 00d0 4271 strb r2, [r0, #5] - 730:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.CurrentTxPower = linkAdrReq->CurrentTxPower; - 1646 .loc 1 730 0 - 1647 00d2 0822 movs r2, #8 - 1648 00d4 AA56 ldrsb r2, [r5, r2] - 1649 00d6 8271 strb r2, [r0, #6] - 731:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.CurrentNbRep = linkAdrReq->CurrentNbRep; - 1650 .loc 1 731 0 - 1651 00d8 0922 movs r2, #9 - 1652 00da AA56 ldrsb r2, [r5, r2] - 1653 00dc C271 strb r2, [r0, #7] - 732:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.NbChannels = EU868_MAX_NB_CHANNELS; - 1654 .loc 1 732 0 - 1655 00de 1022 movs r2, #16 - 1656 00e0 0272 strb r2, [r0, #8] - 733:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.ChannelsMask = &chMask; - 1657 .loc 1 733 0 - 1658 00e2 1632 adds r2, r2, #22 - 1659 00e4 6A44 add r2, r2, sp - 1660 00e6 C260 str r2, [r0, #12] - 734:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.MinDatarate = ( int8_t )phyParam.Value; - 1661 .loc 1 734 0 - 1662 00e8 0022 movs r2, #0 - 1663 00ea 0274 strb r2, [r0, #16] - 735:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.MaxDatarate = EU868_TX_MAX_DATARATE; - 1664 .loc 1 735 0 - 1665 00ec 0732 adds r2, r2, #7 - 1666 00ee 4274 strb r2, [r0, #17] - 736:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.Channels = Channels; - 1667 .loc 1 736 0 - 1668 00f0 1349 ldr r1, .L154 - 1669 00f2 4161 str r1, [r0, #20] - 737:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.MinTxPower = EU868_MIN_TX_POWER; - 1670 .loc 1 737 0 - 1671 00f4 0276 strb r2, [r0, #24] - 738:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** linkAdrVerifyParams.MaxTxPower = EU868_MAX_TX_POWER; - 1672 .loc 1 738 0 - 1673 00f6 0022 movs r2, #0 - 1674 00f8 4276 strb r2, [r0, #25] - 739:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 740:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Verify the parameters and update, if necessary - 741:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status = RegionCommonLinkAdrReqVerifyParams( &linkAdrVerifyParams, &linkAdrParams.Datarate, &li - 1675 .loc 1 741 0 - 1676 00fa 2A32 adds r2, r2, #42 - 1677 00fc 6A44 add r2, r2, sp - 1678 00fe 2921 movs r1, #41 - 1679 0100 6944 add r1, r1, sp - 1680 0102 FFF7FEFF bl RegionCommonLinkAdrReqVerifyParams - 1681 .LVL178: - 742:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - ARM GAS /tmp/cczfoKrY.s page 45 - - - 743:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Update channelsMask if everything is correct - 744:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( status == 0x07 ) - 1682 .loc 1 744 0 - 1683 0106 0728 cmp r0, #7 - 1684 0108 13D0 beq .L153 - 1685 .L146: - 745:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 746:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Set the channels mask to a default value - 747:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** memset( ChannelsMask, 0, sizeof( ChannelsMask ) ); - 748:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Update the channels mask - 749:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelsMask[0] = chMask; - 750:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 751:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 752:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Update status variables - 753:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *drOut = linkAdrParams.Datarate; - 1686 .loc 1 753 0 - 1687 010a 0AAB add r3, sp, #40 - 1688 010c 0122 movs r2, #1 - 1689 010e 9A56 ldrsb r2, [r3, r2] - 1690 0110 4946 mov r1, r9 - 1691 0112 0A70 strb r2, [r1] - 754:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *txPowOut = linkAdrParams.TxPower; - 1692 .loc 1 754 0 - 1693 0114 0222 movs r2, #2 - 1694 0116 9A56 ldrsb r2, [r3, r2] - 1695 0118 4146 mov r1, r8 - 1696 011a 0A70 strb r2, [r1] - 755:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *nbRepOut = linkAdrParams.NbRep; - 1697 .loc 1 755 0 - 1698 011c 1B78 ldrb r3, [r3] - 1699 011e 5246 mov r2, r10 - 1700 0120 1370 strb r3, [r2] - 756:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *nbBytesParsed = bytesProcessed; - 1701 .loc 1 756 0 - 1702 0122 149B ldr r3, [sp, #80] - 1703 0124 1C70 strb r4, [r3] - 757:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 758:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return status; - 759:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1704 .loc 1 759 0 - 1705 0126 0CB0 add sp, sp, #48 - 1706 @ sp needed - 1707 .LVL179: - 1708 .LVL180: - 1709 .LVL181: - 1710 .LVL182: - 1711 .LVL183: - 1712 0128 1CBC pop {r2, r3, r4} - 1713 012a 9046 mov r8, r2 - 1714 012c 9946 mov r9, r3 - 1715 012e A246 mov r10, r4 - 1716 0130 F0BD pop {r4, r5, r6, r7, pc} - 1717 .L126: - 1718 .LVL184: - 1719 .L153: - 749:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1720 .loc 1 749 0 - ARM GAS /tmp/cczfoKrY.s page 46 - - - 1721 0132 2623 movs r3, #38 - 1722 0134 6B44 add r3, r3, sp - 1723 0136 1A88 ldrh r2, [r3] - 1724 0138 024B ldr r3, .L154+4 - 1725 013a 1A80 strh r2, [r3] - 1726 013c E5E7 b .L146 - 1727 .L155: - 1728 013e C046 .align 2 - 1729 .L154: - 1730 0140 00000000 .word Channels - 1731 0144 00000000 .word .LANCHOR2 - 1732 .cfi_endproc - 1733 .LFE100: - 1735 .section .text.RegionEU868RxParamSetupReq,"ax",%progbits - 1736 .align 1 - 1737 .global RegionEU868RxParamSetupReq - 1738 .syntax unified - 1739 .code 16 - 1740 .thumb_func - 1741 .fpu softvfp - 1743 RegionEU868RxParamSetupReq: - 1744 .LFB101: - 760:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 761:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t RegionEU868RxParamSetupReq( RxParamSetupReqParams_t* rxParamSetupReq ) - 762:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1745 .loc 1 762 0 - 1746 .cfi_startproc - 1747 @ args = 0, pretend = 0, frame = 0 - 1748 @ frame_needed = 0, uses_anonymous_args = 0 - 1749 .LVL185: - 1750 0000 70B5 push {r4, r5, r6, lr} - 1751 .LCFI19: - 1752 .cfi_def_cfa_offset 16 - 1753 .cfi_offset 4, -16 - 1754 .cfi_offset 5, -12 - 1755 .cfi_offset 6, -8 - 1756 .cfi_offset 14, -4 - 1757 0002 0500 movs r5, r0 - 1758 .LVL186: - 763:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t status = 0x07; - 764:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 765:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Verify radio frequency - 766:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( Radio.CheckRfFrequency( rxParamSetupReq->Frequency ) == false ) - 1759 .loc 1 766 0 - 1760 0004 0F4B ldr r3, .L161 - 1761 0006 9B6A ldr r3, [r3, #40] - 1762 0008 4068 ldr r0, [r0, #4] - 1763 .LVL187: - 1764 000a 9847 blx r3 - 1765 .LVL188: - 1766 000c 0028 cmp r0, #0 - 1767 000e 16D0 beq .L160 - 763:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t status = 0x07; - 1768 .loc 1 763 0 - 1769 0010 0724 movs r4, #7 - 1770 .L157: - 1771 .LVL189: - ARM GAS /tmp/cczfoKrY.s page 47 - - - 767:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 768:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFE; // Channel frequency KO - 769:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 770:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 771:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Verify datarate - 772:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( RegionCommonValueInRange( rxParamSetupReq->Datarate, EU868_RX_MIN_DATARATE, EU868_RX_MAX_DA - 1772 .loc 1 772 0 - 1773 0012 0020 movs r0, #0 - 1774 0014 2856 ldrsb r0, [r5, r0] - 1775 0016 0722 movs r2, #7 - 1776 0018 0021 movs r1, #0 - 1777 001a FFF7FEFF bl RegionCommonValueInRange - 1778 .LVL190: - 1779 001e 0028 cmp r0, #0 - 1780 0020 01D1 bne .L158 - 773:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 774:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFD; // Datarate KO - 1781 .loc 1 774 0 - 1782 0022 0223 movs r3, #2 - 1783 0024 9C43 bics r4, r3 - 1784 .LVL191: - 1785 .L158: - 775:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 776:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 777:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Verify datarate offset - 778:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( RegionCommonValueInRange( rxParamSetupReq->DrOffset, EU868_MIN_RX1_DR_OFFSET, EU868_MAX_RX1 - 1786 .loc 1 778 0 - 1787 0026 0120 movs r0, #1 - 1788 0028 2856 ldrsb r0, [r5, r0] - 1789 002a 0522 movs r2, #5 - 1790 002c 0021 movs r1, #0 - 1791 002e FFF7FEFF bl RegionCommonValueInRange - 1792 .LVL192: - 1793 0032 0028 cmp r0, #0 - 1794 0034 01D1 bne .L159 - 779:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 780:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFB; // Rx1DrOffset range KO - 1795 .loc 1 780 0 - 1796 0036 0423 movs r3, #4 - 1797 0038 9C43 bics r4, r3 - 1798 .LVL193: - 1799 .L159: - 781:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 782:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 783:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return status; - 784:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1800 .loc 1 784 0 - 1801 003a 2000 movs r0, r4 - 1802 @ sp needed - 1803 .LVL194: - 1804 .LVL195: - 1805 003c 70BD pop {r4, r5, r6, pc} - 1806 .LVL196: - 1807 .L160: - 768:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1808 .loc 1 768 0 - 1809 003e 0624 movs r4, #6 - ARM GAS /tmp/cczfoKrY.s page 48 - - - 1810 0040 E7E7 b .L157 - 1811 .L162: - 1812 0042 C046 .align 2 - 1813 .L161: - 1814 0044 00000000 .word Radio - 1815 .cfi_endproc - 1816 .LFE101: - 1818 .section .text.RegionEU868TxParamSetupReq,"ax",%progbits - 1819 .align 1 - 1820 .global RegionEU868TxParamSetupReq - 1821 .syntax unified - 1822 .code 16 - 1823 .thumb_func - 1824 .fpu softvfp - 1826 RegionEU868TxParamSetupReq: - 1827 .LFB103: - 785:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 786:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t RegionEU868NewChannelReq( NewChannelReqParams_t* newChannelReq ) - 787:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 788:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t status = 0x03; - 789:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelAddParams_t channelAdd; - 790:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelRemoveParams_t channelRemove; - 791:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 792:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( newChannelReq->NewChannel->Frequency == 0 ) - 793:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 794:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channelRemove.ChannelId = newChannelReq->ChannelId; - 795:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 796:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Remove - 797:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( RegionEU868ChannelsRemove( &channelRemove ) == false ) - 798:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 799:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFC; - 800:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 801:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 802:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 803:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 804:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channelAdd.NewChannel = newChannelReq->NewChannel; - 805:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channelAdd.ChannelId = newChannelReq->ChannelId; - 806:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 807:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** switch( RegionEU868ChannelAdd( &channelAdd ) ) - 808:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 809:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case LORAMAC_STATUS_OK: - 810:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 811:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 812:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 813:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case LORAMAC_STATUS_FREQUENCY_INVALID: - 814:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 815:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFE; - 816:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 817:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 818:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case LORAMAC_STATUS_DATARATE_INVALID: - 819:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 820:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFD; - 821:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 822:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 823:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** case LORAMAC_STATUS_FREQ_AND_DR_INVALID: - 824:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 825:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFC; - ARM GAS /tmp/cczfoKrY.s page 49 - - - 826:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 827:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 828:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** default: - 829:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 830:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFC; - 831:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 832:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 833:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 834:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 835:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 836:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return status; - 837:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 838:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 839:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t RegionEU868TxParamSetupReq( TxParamSetupReqParams_t* txParamSetupReq ) - 840:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1828 .loc 1 840 0 - 1829 .cfi_startproc - 1830 @ args = 0, pretend = 0, frame = 0 - 1831 @ frame_needed = 0, uses_anonymous_args = 0 - 1832 @ link register save eliminated. - 1833 .LVL197: - 841:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return -1; - 1834 .loc 1 841 0 - 1835 0000 0120 movs r0, #1 - 1836 .LVL198: - 842:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1837 .loc 1 842 0 - 1838 0002 4042 rsbs r0, r0, #0 - 1839 @ sp needed - 1840 0004 7047 bx lr - 1841 .cfi_endproc - 1842 .LFE103: - 1844 .section .text.RegionEU868DlChannelReq,"ax",%progbits - 1845 .align 1 - 1846 .global RegionEU868DlChannelReq - 1847 .syntax unified - 1848 .code 16 - 1849 .thumb_func - 1850 .fpu softvfp - 1852 RegionEU868DlChannelReq: - 1853 .LFB104: - 843:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 844:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t RegionEU868DlChannelReq( DlChannelReqParams_t* dlChannelReq ) - 845:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1854 .loc 1 845 0 - 1855 .cfi_startproc - 1856 @ args = 0, pretend = 0, frame = 8 - 1857 @ frame_needed = 0, uses_anonymous_args = 0 - 1858 .LVL199: - 1859 0000 10B5 push {r4, lr} - 1860 .LCFI20: - 1861 .cfi_def_cfa_offset 8 - 1862 .cfi_offset 4, -8 - 1863 .cfi_offset 14, -4 - 1864 0002 82B0 sub sp, sp, #8 - 1865 .LCFI21: - 1866 .cfi_def_cfa_offset 16 - ARM GAS /tmp/cczfoKrY.s page 50 - - - 1867 0004 0400 movs r4, r0 - 1868 .LVL200: - 846:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t status = 0x03; - 847:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t band = 0; - 1869 .loc 1 847 0 - 1870 0006 6B46 mov r3, sp - 1871 0008 D91D adds r1, r3, #7 - 1872 000a 0023 movs r3, #0 - 1873 000c 0B70 strb r3, [r1] - 848:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 849:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Verify if the frequency is supported - 850:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( VerifyTxFreq( dlChannelReq->Rx1Frequency, &band ) == false ) - 1874 .loc 1 850 0 - 1875 000e 4068 ldr r0, [r0, #4] - 1876 .LVL201: - 1877 0010 FFF7FEFF bl VerifyTxFreq - 1878 .LVL202: - 1879 0014 0028 cmp r0, #0 - 1880 0016 0ED0 beq .L168 - 846:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t status = 0x03; - 1881 .loc 1 846 0 - 1882 0018 0320 movs r0, #3 - 1883 .L165: - 1884 .LVL203: - 851:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 852:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFE; - 853:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 854:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 855:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Verify if an uplink frequency exists - 856:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( Channels[dlChannelReq->ChannelId].Frequency == 0 ) - 1885 .loc 1 856 0 - 1886 001a 2278 ldrb r2, [r4] - 1887 001c 5300 lsls r3, r2, #1 - 1888 001e 9B18 adds r3, r3, r2 - 1889 0020 9900 lsls r1, r3, #2 - 1890 0022 0A4B ldr r3, .L170 - 1891 0024 CB58 ldr r3, [r1, r3] - 1892 0026 002B cmp r3, #0 - 1893 0028 01D1 bne .L166 - 857:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 858:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** status &= 0xFD; - 1894 .loc 1 858 0 - 1895 002a 0233 adds r3, r3, #2 - 1896 002c 9843 bics r0, r3 - 1897 .LVL204: - 1898 .L166: - 859:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 860:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 861:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Apply Rx1 frequency, if the status is OK - 862:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( status == 0x03 ) - 1899 .loc 1 862 0 - 1900 002e 0328 cmp r0, #3 - 1901 0030 03D0 beq .L169 - 1902 .LVL205: - 1903 .L167: - 863:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 864:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Channels[dlChannelReq->ChannelId].Rx1Frequency = dlChannelReq->Rx1Frequency; - ARM GAS /tmp/cczfoKrY.s page 51 - - - 865:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 866:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 867:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return status; - 868:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1904 .loc 1 868 0 - 1905 0032 02B0 add sp, sp, #8 - 1906 @ sp needed - 1907 0034 10BD pop {r4, pc} - 1908 .LVL206: - 1909 .L168: - 852:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1910 .loc 1 852 0 - 1911 0036 0220 movs r0, #2 - 1912 0038 EFE7 b .L165 - 1913 .LVL207: - 1914 .L169: - 864:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1915 .loc 1 864 0 - 1916 003a 6468 ldr r4, [r4, #4] - 1917 .LVL208: - 1918 003c 5300 lsls r3, r2, #1 - 1919 003e 9A18 adds r2, r3, r2 - 1920 0040 9100 lsls r1, r2, #2 - 1921 0042 024B ldr r3, .L170 - 1922 0044 5B18 adds r3, r3, r1 - 1923 0046 5C60 str r4, [r3, #4] - 1924 0048 F3E7 b .L167 - 1925 .L171: - 1926 004a C046 .align 2 - 1927 .L170: - 1928 004c 00000000 .word Channels - 1929 .cfi_endproc - 1930 .LFE104: - 1932 .global __aeabi_uidivmod - 1933 .section .text.RegionEU868AlternateDr,"ax",%progbits - 1934 .align 1 - 1935 .global RegionEU868AlternateDr - 1936 .syntax unified - 1937 .code 16 - 1938 .thumb_func - 1939 .fpu softvfp - 1941 RegionEU868AlternateDr: - 1942 .LFB105: - 869:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 870:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t RegionEU868AlternateDr( AlternateDrParams_t* alternateDr ) - 871:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 1943 .loc 1 871 0 - 1944 .cfi_startproc - 1945 @ args = 0, pretend = 0, frame = 0 - 1946 @ frame_needed = 0, uses_anonymous_args = 0 - 1947 .LVL209: - 1948 0000 10B5 push {r4, lr} - 1949 .LCFI22: - 1950 .cfi_def_cfa_offset 8 - 1951 .cfi_offset 4, -8 - 1952 .cfi_offset 14, -4 - 1953 .LVL210: - ARM GAS /tmp/cczfoKrY.s page 52 - - - 872:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t datarate = 0; - 873:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 874:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( ( alternateDr->NbTrials % 48 ) == 0 ) - 1954 .loc 1 874 0 - 1955 0002 0488 ldrh r4, [r0] - 1956 0004 3021 movs r1, #48 - 1957 0006 2000 movs r0, r4 - 1958 .LVL211: - 1959 0008 FFF7FEFF bl __aeabi_uidivmod - 1960 .LVL212: - 1961 000c 89B2 uxth r1, r1 - 1962 000e 0029 cmp r1, #0 - 1963 0010 0ED0 beq .L174 - 875:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 876:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** datarate = DR_0; - 877:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 878:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( alternateDr->NbTrials % 32 ) == 0 ) - 1964 .loc 1 878 0 - 1965 0012 E306 lsls r3, r4, #27 - 1966 0014 0ED0 beq .L175 - 879:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 880:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** datarate = DR_1; - 881:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 882:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( alternateDr->NbTrials % 24 ) == 0 ) - 1967 .loc 1 882 0 - 1968 0016 1821 movs r1, #24 - 1969 0018 2000 movs r0, r4 - 1970 001a FFF7FEFF bl __aeabi_uidivmod - 1971 .LVL213: - 1972 001e 89B2 uxth r1, r1 - 1973 0020 0029 cmp r1, #0 - 1974 0022 09D0 beq .L176 - 883:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 884:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** datarate = DR_2; - 885:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 886:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( alternateDr->NbTrials % 16 ) == 0 ) - 1975 .loc 1 886 0 - 1976 0024 2307 lsls r3, r4, #28 - 1977 0026 09D0 beq .L177 - 887:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 888:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** datarate = DR_3; - 889:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 890:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else if( ( alternateDr->NbTrials % 8 ) == 0 ) - 1978 .loc 1 890 0 - 1979 0028 6307 lsls r3, r4, #29 - 1980 002a 09D1 bne .L178 - 891:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 892:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** datarate = DR_4; - 1981 .loc 1 892 0 - 1982 002c 0420 movs r0, #4 - 1983 002e 00E0 b .L173 - 1984 .L174: - 876:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1985 .loc 1 876 0 - 1986 0030 0020 movs r0, #0 - 1987 .L173: - 1988 .LVL214: - ARM GAS /tmp/cczfoKrY.s page 53 - - - 893:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 894:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 895:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 896:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** datarate = DR_5; - 897:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 898:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return datarate; - 899:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1989 .loc 1 899 0 - 1990 @ sp needed - 1991 0032 10BD pop {r4, pc} - 1992 .LVL215: - 1993 .L175: - 880:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1994 .loc 1 880 0 - 1995 0034 0120 movs r0, #1 - 1996 0036 FCE7 b .L173 - 1997 .L176: - 884:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 1998 .loc 1 884 0 - 1999 0038 0220 movs r0, #2 - 2000 003a FAE7 b .L173 - 2001 .L177: - 888:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2002 .loc 1 888 0 - 2003 003c 0320 movs r0, #3 - 2004 003e F8E7 b .L173 - 2005 .L178: - 896:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2006 .loc 1 896 0 - 2007 0040 0520 movs r0, #5 - 2008 0042 F6E7 b .L173 - 2009 .cfi_endproc - 2010 .LFE105: - 2012 .section .text.RegionEU868CalcBackOff,"ax",%progbits - 2013 .align 1 - 2014 .global RegionEU868CalcBackOff - 2015 .syntax unified - 2016 .code 16 - 2017 .thumb_func - 2018 .fpu softvfp - 2020 RegionEU868CalcBackOff: - 2021 .LFB106: - 900:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 901:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** void RegionEU868CalcBackOff( CalcBackOffParams_t* calcBackOff ) - 902:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2022 .loc 1 902 0 - 2023 .cfi_startproc - 2024 @ args = 0, pretend = 0, frame = 24 - 2025 @ frame_needed = 0, uses_anonymous_args = 0 - 2026 .LVL216: - 2027 0000 00B5 push {lr} - 2028 .LCFI23: - 2029 .cfi_def_cfa_offset 4 - 2030 .cfi_offset 14, -4 - 2031 0002 87B0 sub sp, sp, #28 - 2032 .LCFI24: - 2033 .cfi_def_cfa_offset 32 - ARM GAS /tmp/cczfoKrY.s page 54 - - - 903:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionCommonCalcBackOffParams_t calcBackOffParams; - 904:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 905:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** calcBackOffParams.Channels = Channels; - 2034 .loc 1 905 0 - 2035 0004 01AB add r3, sp, #4 - 2036 0006 0A4A ldr r2, .L180 - 2037 0008 0192 str r2, [sp, #4] - 906:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** calcBackOffParams.Bands = Bands; - 2038 .loc 1 906 0 - 2039 000a 0A4A ldr r2, .L180+4 - 2040 000c 0292 str r2, [sp, #8] - 907:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** calcBackOffParams.LastTxIsJoinRequest = calcBackOff->LastTxIsJoinRequest; - 2041 .loc 1 907 0 - 2042 000e 4278 ldrb r2, [r0, #1] - 2043 0010 1A72 strb r2, [r3, #8] - 908:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** calcBackOffParams.Joined = calcBackOff->Joined; - 2044 .loc 1 908 0 - 2045 0012 0278 ldrb r2, [r0] - 2046 0014 5A72 strb r2, [r3, #9] - 909:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** calcBackOffParams.DutyCycleEnabled = calcBackOff->DutyCycleEnabled; - 2047 .loc 1 909 0 - 2048 0016 8278 ldrb r2, [r0, #2] - 2049 0018 9A72 strb r2, [r3, #10] - 910:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** calcBackOffParams.Channel = calcBackOff->Channel; - 2050 .loc 1 910 0 - 2051 001a C278 ldrb r2, [r0, #3] - 2052 001c DA72 strb r2, [r3, #11] - 911:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** calcBackOffParams.ElapsedTime = calcBackOff->ElapsedTime; - 2053 .loc 1 911 0 - 2054 001e 4268 ldr r2, [r0, #4] - 2055 0020 0492 str r2, [sp, #16] - 912:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** calcBackOffParams.TxTimeOnAir = calcBackOff->TxTimeOnAir; - 2056 .loc 1 912 0 - 2057 0022 8268 ldr r2, [r0, #8] - 2058 0024 0592 str r2, [sp, #20] - 913:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 914:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** RegionCommonCalcBackOff( &calcBackOffParams ); - 2059 .loc 1 914 0 - 2060 0026 1800 movs r0, r3 - 2061 .LVL217: - 2062 0028 FFF7FEFF bl RegionCommonCalcBackOff - 2063 .LVL218: - 915:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2064 .loc 1 915 0 - 2065 002c 07B0 add sp, sp, #28 - 2066 @ sp needed - 2067 002e 00BD pop {pc} - 2068 .L181: - 2069 .align 2 - 2070 .L180: - 2071 0030 00000000 .word Channels - 2072 0034 00000000 .word .LANCHOR4 - 2073 .cfi_endproc - 2074 .LFE106: - 2076 .section .text.RegionEU868NextChannel,"ax",%progbits - 2077 .align 1 - 2078 .global RegionEU868NextChannel - ARM GAS /tmp/cczfoKrY.s page 55 - - - 2079 .syntax unified - 2080 .code 16 - 2081 .thumb_func - 2082 .fpu softvfp - 2084 RegionEU868NextChannel: - 2085 .LFB107: - 916:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 917:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool RegionEU868NextChannel( NextChanParams_t* nextChanParams, uint8_t* channel, TimerTime_t* time, - 918:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2086 .loc 1 918 0 - 2087 .cfi_startproc - 2088 @ args = 0, pretend = 0, frame = 32 - 2089 @ frame_needed = 0, uses_anonymous_args = 0 - 2090 .LVL219: - 2091 0000 F0B5 push {r4, r5, r6, r7, lr} - 2092 .LCFI25: - 2093 .cfi_def_cfa_offset 20 - 2094 .cfi_offset 4, -20 - 2095 .cfi_offset 5, -16 - 2096 .cfi_offset 6, -12 - 2097 .cfi_offset 7, -8 - 2098 .cfi_offset 14, -4 - 2099 0002 DE46 mov lr, fp - 2100 0004 5746 mov r7, r10 - 2101 0006 4E46 mov r6, r9 - 2102 0008 4546 mov r5, r8 - 2103 000a E0B5 push {r5, r6, r7, lr} - 2104 .LCFI26: - 2105 .cfi_def_cfa_offset 36 - 2106 .cfi_offset 8, -36 - 2107 .cfi_offset 9, -32 - 2108 .cfi_offset 10, -28 - 2109 .cfi_offset 11, -24 - 2110 000c 89B0 sub sp, sp, #36 - 2111 .LCFI27: - 2112 .cfi_def_cfa_offset 72 - 2113 000e 0400 movs r4, r0 - 2114 0010 0391 str r1, [sp, #12] - 2115 0012 9346 mov fp, r2 - 2116 0014 1E00 movs r6, r3 - 2117 .LVL220: - 919:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t nbEnabledChannels = 0; - 920:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t delayTx = 0; - 921:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t enabledChannels[EU868_MAX_NB_CHANNELS] = { 0 }; - 2118 .loc 1 921 0 - 2119 0016 1022 movs r2, #16 - 2120 .LVL221: - 2121 0018 0021 movs r1, #0 - 2122 .LVL222: - 2123 001a 04A8 add r0, sp, #16 - 2124 .LVL223: - 2125 001c FFF7FEFF bl memset - 2126 .LVL224: - 922:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** TimerTime_t nextTxDelay = 0; - 923:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 924:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( RegionCommonCountChannels( ChannelsMask, 0, 1 ) == 0 ) - 2127 .loc 1 924 0 - ARM GAS /tmp/cczfoKrY.s page 56 - - - 2128 0020 0122 movs r2, #1 - 2129 0022 0021 movs r1, #0 - 2130 0024 4A48 ldr r0, .L199 - 2131 0026 FFF7FEFF bl RegionCommonCountChannels - 2132 .LVL225: - 2133 002a 0028 cmp r0, #0 - 2134 002c 04D1 bne .L183 - 925:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // Reactivate default channels - 926:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelsMask[0] |= LC( 1 ) + LC( 2 ) + LC( 3 ); - 2135 .loc 1 926 0 - 2136 002e 484A ldr r2, .L199 - 2137 0030 1388 ldrh r3, [r2] - 2138 0032 0721 movs r1, #7 - 2139 0034 0B43 orrs r3, r1 - 2140 0036 1380 strh r3, [r2] - 2141 .L183: - 927:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 928:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 929:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( nextChanParams->AggrTimeOff <= TimerGetElapsedTime( nextChanParams->LastAggrTx ) ) - 2142 .loc 1 929 0 - 2143 0038 2568 ldr r5, [r4] - 2144 003a 6068 ldr r0, [r4, #4] - 2145 003c FFF7FEFF bl TimerGetElapsedTime - 2146 .LVL226: - 2147 0040 8542 cmp r5, r0 - 2148 0042 65D8 bhi .L184 - 930:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 931:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Reset Aggregated time off - 932:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *aggregatedTimeOff = 0; - 2149 .loc 1 932 0 - 2150 0044 0023 movs r3, #0 - 2151 0046 3360 str r3, [r6] - 933:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 934:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Update bands Time OFF - 935:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** nextTxDelay = RegionCommonUpdateBandTimeOff( nextChanParams->Joined, nextChanParams->DutyCy - 2152 .loc 1 935 0 - 2153 0048 607A ldrb r0, [r4, #9] - 2154 004a A17A ldrb r1, [r4, #10] - 2155 004c 0533 adds r3, r3, #5 - 2156 004e 414A ldr r2, .L199+4 - 2157 0050 FFF7FEFF bl RegionCommonUpdateBandTimeOff - 2158 .LVL227: - 2159 0054 0290 str r0, [sp, #8] - 2160 .LVL228: - 936:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 937:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Search how many channels are enabled - 938:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** nbEnabledChannels = CountNbOfEnabledChannels( nextChanParams->Joined, nextChanParams->Datar - 2161 .loc 1 938 0 - 2162 0056 637A ldrb r3, [r4, #9] - 2163 0058 9A46 mov r10, r3 - 2164 005a 0823 movs r3, #8 - 2165 005c E356 ldrsb r3, [r4, r3] - 2166 005e 0193 str r3, [sp, #4] - 2167 .LVL229: - 2168 .LBB39: - 2169 .LBB40: - 2170 .LBB41: - ARM GAS /tmp/cczfoKrY.s page 57 - - - 152:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2171 .loc 1 152 0 - 2172 0060 0026 movs r6, #0 - 2173 .LVL230: - 2174 0062 0027 movs r7, #0 - 2175 .LBE41: - 150:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2176 .loc 1 150 0 - 2177 0064 0023 movs r3, #0 - 2178 0066 9946 mov r9, r3 - 149:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t delayTransmission = 0; - 2179 .loc 1 149 0 - 2180 0068 9846 mov r8, r3 - 2181 .LVL231: - 2182 .L185: - 2183 .LBB43: - 152:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2184 .loc 1 152 0 - 2185 006a 0F2F cmp r7, #15 - 2186 006c 49D9 bls .L195 - 2187 .LVL232: - 2188 .LBE43: - 2189 .LBE40: - 2190 .LBE39: - 939:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelsMask, Channels, - 940:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Bands, enabledChannels, &delayTx ); - 941:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 942:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 943:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 944:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** delayTx++; - 945:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** nextTxDelay = nextChanParams->AggrTimeOff - TimerGetElapsedTime( nextChanParams->LastAggrTx - 946:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 947:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 948:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( nbEnabledChannels > 0 ) - 2191 .loc 1 948 0 - 2192 006e 4346 mov r3, r8 - 2193 0070 002B cmp r3, #0 - 2194 0072 55D0 beq .L192 - 949:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 950:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // We found a valid channel - 951:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *channel = enabledChannels[randr( 0, nbEnabledChannels - 1 )]; - 2195 .loc 1 951 0 - 2196 0074 4146 mov r1, r8 - 2197 0076 0139 subs r1, r1, #1 - 2198 0078 0020 movs r0, #0 - 2199 007a FFF7FEFF bl randr - 2200 .LVL233: - 2201 007e 04AB add r3, sp, #16 - 2202 0080 1B5C ldrb r3, [r3, r0] - 2203 0082 039A ldr r2, [sp, #12] - 2204 0084 1370 strb r3, [r2] - 952:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 953:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *time = 0; - 2205 .loc 1 953 0 - 2206 0086 0023 movs r3, #0 - 2207 0088 5A46 mov r2, fp - 2208 008a 1360 str r3, [r2] - ARM GAS /tmp/cczfoKrY.s page 58 - - - 954:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return true; - 2209 .loc 1 954 0 - 2210 008c 0120 movs r0, #1 - 2211 008e 53E0 b .L193 - 2212 .LVL234: - 2213 .L197: - 2214 .LBB46: - 2215 .LBB45: - 2216 .LBB44: - 2217 .LBB42: - 176:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** continue; - 2218 .loc 1 176 0 - 2219 0090 4B46 mov r3, r9 - 2220 0092 0133 adds r3, r3, #1 - 2221 0094 DBB2 uxtb r3, r3 - 2222 0096 9946 mov r9, r3 - 2223 .LVL235: - 2224 .L186: - 154:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2225 .loc 1 154 0 - 2226 0098 0134 adds r4, r4, #1 - 2227 .LVL236: - 2228 009a E4B2 uxtb r4, r4 - 2229 .LVL237: - 2230 .L190: - 2231 009c 0F2C cmp r4, #15 - 2232 009e 32D8 bhi .L196 - 156:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2233 .loc 1 156 0 - 2234 00a0 7300 lsls r3, r6, #1 - 2235 00a2 2B4A ldr r2, .L199 - 2236 00a4 9B5A ldrh r3, [r3, r2] - 2237 00a6 2341 asrs r3, r3, r4 - 2238 00a8 DB07 lsls r3, r3, #31 - 2239 00aa F5D5 bpl .L186 - 158:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // Check if the channel is enabled - 2240 .loc 1 158 0 - 2241 00ac 3919 adds r1, r7, r4 - 2242 00ae 4B00 lsls r3, r1, #1 - 2243 00b0 5B18 adds r3, r3, r1 - 2244 00b2 9900 lsls r1, r3, #2 - 2245 00b4 284D ldr r5, .L199+8 - 2246 00b6 4D19 adds r5, r1, r5 - 2247 00b8 2B68 ldr r3, [r5] - 2248 00ba 002B cmp r3, #0 - 2249 00bc ECD0 beq .L186 - 162:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2250 .loc 1 162 0 - 2251 00be 5346 mov r3, r10 - 2252 00c0 002B cmp r3, #0 - 2253 00c2 03D1 bne .L187 - 164:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2254 .loc 1 164 0 - 2255 00c4 0733 adds r3, r3, #7 - 2256 00c6 2341 asrs r3, r3, r4 - 2257 00c8 DB07 lsls r3, r3, #31 - 2258 00ca E5D5 bpl .L186 - ARM GAS /tmp/cczfoKrY.s page 59 - - - 2259 .L187: - 169:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channels[i + j].DrRange.Fields.Max ) == false ) - 2260 .loc 1 169 0 - 2261 00cc 2A7A ldrb r2, [r5, #8] - 2262 00ce 1101 lsls r1, r2, #4 - 2263 00d0 49B2 sxtb r1, r1 - 2264 00d2 0911 asrs r1, r1, #4 - 170:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // Check if the current channel selection supports the given datarate - 2265 .loc 1 170 0 - 2266 00d4 52B2 sxtb r2, r2 - 2267 00d6 1211 asrs r2, r2, #4 - 169:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channels[i + j].DrRange.Fields.Max ) == false ) - 2268 .loc 1 169 0 - 2269 00d8 0198 ldr r0, [sp, #4] - 2270 00da FFF7FEFF bl RegionCommonValueInRange - 2271 .LVL238: - 2272 00de 0028 cmp r0, #0 - 2273 00e0 DAD0 beq .L186 - 174:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { // Check if the band is available for transmission - 2274 .loc 1 174 0 - 2275 00e2 6A7A ldrb r2, [r5, #9] - 2276 00e4 1201 lsls r2, r2, #4 - 2277 00e6 1B4B ldr r3, .L199+4 - 2278 00e8 9B18 adds r3, r3, r2 - 2279 00ea DB68 ldr r3, [r3, #12] - 2280 00ec 002B cmp r3, #0 - 2281 00ee CFD1 bne .L197 - 179:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2282 .loc 1 179 0 - 2283 00f0 4346 mov r3, r8 - 2284 00f2 5A1C adds r2, r3, #1 - 2285 .LVL239: - 2286 00f4 E319 adds r3, r4, r7 - 2287 00f6 04A9 add r1, sp, #16 - 2288 .LVL240: - 2289 00f8 4046 mov r0, r8 - 2290 00fa 0B54 strb r3, [r1, r0] - 2291 00fc D3B2 uxtb r3, r2 - 2292 00fe 9846 mov r8, r3 - 2293 0100 CAE7 b .L186 - 2294 .LVL241: - 2295 .L195: - 154:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2296 .loc 1 154 0 - 2297 0102 0024 movs r4, #0 - 2298 0104 CAE7 b .L190 - 2299 .LVL242: - 2300 .L196: - 2301 .LBE42: - 152:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2302 .loc 1 152 0 - 2303 0106 1037 adds r7, r7, #16 - 2304 .LVL243: - 2305 0108 FFB2 uxtb r7, r7 - 2306 .LVL244: - 2307 010a 0136 adds r6, r6, #1 - 2308 .LVL245: - ARM GAS /tmp/cczfoKrY.s page 60 - - - 2309 010c F6B2 uxtb r6, r6 - 2310 .LVL246: - 2311 010e ACE7 b .L185 - 2312 .LVL247: - 2313 .L184: - 2314 .LBE44: - 2315 .LBE45: - 2316 .LBE46: - 945:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2317 .loc 1 945 0 - 2318 0110 2568 ldr r5, [r4] - 2319 0112 6068 ldr r0, [r4, #4] - 2320 0114 FFF7FEFF bl TimerGetElapsedTime - 2321 .LVL248: - 2322 0118 2B1A subs r3, r5, r0 - 2323 011a 0293 str r3, [sp, #8] - 2324 .LVL249: - 944:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** nextTxDelay = nextChanParams->AggrTimeOff - TimerGetElapsedTime( nextChanParams->LastAggrTx - 2325 .loc 1 944 0 - 2326 011c 0123 movs r3, #1 - 2327 .LVL250: - 2328 011e 9946 mov r9, r3 - 2329 .LVL251: - 2330 .L192: - 955:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 956:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** else - 957:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 958:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( delayTx > 0 ) - 2331 .loc 1 958 0 - 2332 0120 4B46 mov r3, r9 - 2333 0122 002B cmp r3, #0 - 2334 0124 0FD1 bne .L198 - 959:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 960:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Delay transmission due to AggregatedTimeOff or to a band time off - 961:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *time = nextTxDelay; - 962:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return true; - 963:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 964:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Datarate not supported by any channel, restore defaults - 965:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelsMask[0] |= LC( 1 ) + LC( 2 ) + LC( 3 ); - 2335 .loc 1 965 0 - 2336 0126 0A4A ldr r2, .L199 - 2337 0128 1388 ldrh r3, [r2] - 2338 012a 0721 movs r1, #7 - 2339 012c 0B43 orrs r3, r1 - 2340 012e 1380 strh r3, [r2] - 966:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** *time = 0; - 2341 .loc 1 966 0 - 2342 0130 0023 movs r3, #0 - 2343 0132 5A46 mov r2, fp - 2344 0134 1360 str r3, [r2] - 967:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return false; - 2345 .loc 1 967 0 - 2346 0136 0020 movs r0, #0 - 2347 .L193: - 2348 .LVL252: - 968:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 969:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - ARM GAS /tmp/cczfoKrY.s page 61 - - - 2349 .loc 1 969 0 - 2350 0138 09B0 add sp, sp, #36 - 2351 @ sp needed - 2352 .LVL253: - 2353 013a 3CBC pop {r2, r3, r4, r5} - 2354 013c 9046 mov r8, r2 - 2355 013e 9946 mov r9, r3 - 2356 0140 A246 mov r10, r4 - 2357 0142 AB46 mov fp, r5 - 2358 0144 F0BD pop {r4, r5, r6, r7, pc} - 2359 .LVL254: - 2360 .L198: - 961:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return true; - 2361 .loc 1 961 0 - 2362 0146 5B46 mov r3, fp - 2363 0148 029A ldr r2, [sp, #8] - 2364 014a 1A60 str r2, [r3] - 962:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2365 .loc 1 962 0 - 2366 014c 0120 movs r0, #1 - 2367 014e F3E7 b .L193 - 2368 .L200: - 2369 .align 2 - 2370 .L199: - 2371 0150 00000000 .word .LANCHOR2 - 2372 0154 00000000 .word .LANCHOR4 - 2373 0158 00000000 .word Channels - 2374 .cfi_endproc - 2375 .LFE107: - 2377 .section .text.RegionEU868ChannelAdd,"ax",%progbits - 2378 .align 1 - 2379 .global RegionEU868ChannelAdd - 2380 .syntax unified - 2381 .code 16 - 2382 .thumb_func - 2383 .fpu softvfp - 2385 RegionEU868ChannelAdd: - 2386 .LFB108: - 970:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 971:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** LoRaMacStatus_t RegionEU868ChannelAdd( ChannelAddParams_t* channelAdd ) - 972:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2387 .loc 1 972 0 - 2388 .cfi_startproc - 2389 @ args = 0, pretend = 0, frame = 8 - 2390 @ frame_needed = 0, uses_anonymous_args = 0 - 2391 .LVL255: - 2392 0000 F0B5 push {r4, r5, r6, r7, lr} - 2393 .LCFI28: - 2394 .cfi_def_cfa_offset 20 - 2395 .cfi_offset 4, -20 - 2396 .cfi_offset 5, -16 - 2397 .cfi_offset 6, -12 - 2398 .cfi_offset 7, -8 - 2399 .cfi_offset 14, -4 - 2400 0002 83B0 sub sp, sp, #12 - 2401 .LCFI29: - 2402 .cfi_def_cfa_offset 32 - ARM GAS /tmp/cczfoKrY.s page 62 - - - 2403 0004 0400 movs r4, r0 - 973:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t band = 0; - 2404 .loc 1 973 0 - 2405 0006 6B46 mov r3, sp - 2406 0008 0022 movs r2, #0 - 2407 000a DA71 strb r2, [r3, #7] - 2408 .LVL256: - 974:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool drInvalid = false; - 975:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool freqInvalid = false; - 976:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t id = channelAdd->ChannelId; - 2409 .loc 1 976 0 - 2410 000c 0579 ldrb r5, [r0, #4] - 2411 .LVL257: - 977:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 978:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( id >= EU868_MAX_NB_CHANNELS ) - 2412 .loc 1 978 0 - 2413 000e 0F2D cmp r5, #15 - 2414 0010 66D8 bhi .L211 - 979:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 980:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return LORAMAC_STATUS_PARAMETER_INVALID; - 981:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 982:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 983:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Validate the datarate range - 984:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( RegionCommonValueInRange( channelAdd->NewChannel->DrRange.Fields.Min, EU868_TX_MIN_DATARATE - 2415 .loc 1 984 0 - 2416 0012 0368 ldr r3, [r0] - 2417 0014 187A ldrb r0, [r3, #8] - 2418 .LVL258: - 2419 0016 0001 lsls r0, r0, #4 - 2420 0018 40B2 sxtb r0, r0 - 2421 001a 0011 asrs r0, r0, #4 - 2422 001c 0732 adds r2, r2, #7 - 2423 001e 0021 movs r1, #0 - 2424 0020 FFF7FEFF bl RegionCommonValueInRange - 2425 .LVL259: - 2426 0024 0028 cmp r0, #0 - 2427 0026 2CD0 beq .L212 - 974:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool freqInvalid = false; - 2428 .loc 1 974 0 - 2429 0028 0026 movs r6, #0 - 2430 .L203: - 2431 .LVL260: - 985:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 986:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** drInvalid = true; - 987:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 988:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( RegionCommonValueInRange( channelAdd->NewChannel->DrRange.Fields.Max, EU868_TX_MIN_DATARATE - 2432 .loc 1 988 0 - 2433 002a 2368 ldr r3, [r4] - 2434 002c 0820 movs r0, #8 - 2435 002e 1856 ldrsb r0, [r3, r0] - 2436 0030 0011 asrs r0, r0, #4 - 2437 0032 0722 movs r2, #7 - 2438 0034 0021 movs r1, #0 - 2439 0036 FFF7FEFF bl RegionCommonValueInRange - 2440 .LVL261: - 2441 003a 0028 cmp r0, #0 - 2442 003c 00D1 bne .L204 - ARM GAS /tmp/cczfoKrY.s page 63 - - - 989:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 990:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** drInvalid = true; - 2443 .loc 1 990 0 - 2444 003e 0126 movs r6, #1 - 2445 .LVL262: - 2446 .L204: - 991:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 992:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( channelAdd->NewChannel->DrRange.Fields.Min > channelAdd->NewChannel->DrRange.Fields.Max ) - 2447 .loc 1 992 0 - 2448 0040 2368 ldr r3, [r4] - 2449 0042 187A ldrb r0, [r3, #8] - 2450 0044 0301 lsls r3, r0, #4 - 2451 0046 5BB2 sxtb r3, r3 - 2452 0048 1B11 asrs r3, r3, #4 - 2453 004a 40B2 sxtb r0, r0 - 2454 004c 0011 asrs r0, r0, #4 - 2455 004e 8342 cmp r3, r0 - 2456 0050 00DD ble .L205 - 993:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 994:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** drInvalid = true; - 2457 .loc 1 994 0 - 2458 0052 0126 movs r6, #1 - 2459 .LVL263: - 2460 .L205: - 995:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 996:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 997:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Default channels don't accept all values - 998:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( id < EU868_NUMB_DEFAULT_CHANNELS ) - 2461 .loc 1 998 0 - 2462 0054 022D cmp r5, #2 - 2463 0056 18D8 bhi .L215 - 999:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1000:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Validate the datarate range for min: must be DR_0 -1001:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( channelAdd->NewChannel->DrRange.Fields.Min > DR_0 ) - 2464 .loc 1 1001 0 - 2465 0058 002B cmp r3, #0 - 2466 005a 00DD ble .L207 -1002:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1003:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** drInvalid = true; - 2467 .loc 1 1003 0 - 2468 005c 0126 movs r6, #1 - 2469 .LVL264: - 2470 .L207: -1004:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1005:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Validate the datarate range for max: must be DR_5 <= Max <= TX_MAX_DATARATE -1006:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( RegionCommonValueInRange( channelAdd->NewChannel->DrRange.Fields.Max, DR_5, EU868_TX_MA - 2471 .loc 1 1006 0 - 2472 005e 0722 movs r2, #7 - 2473 0060 0521 movs r1, #5 - 2474 0062 FFF7FEFF bl RegionCommonValueInRange - 2475 .LVL265: - 2476 0066 0028 cmp r0, #0 - 2477 0068 00D1 bne .L208 -1007:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1008:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** drInvalid = true; - 2478 .loc 1 1008 0 - 2479 006a 0126 movs r6, #1 - ARM GAS /tmp/cczfoKrY.s page 64 - - - 2480 .LVL266: - 2481 .L208: -1009:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1010:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // We are not allowed to change the frequency -1011:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( channelAdd->NewChannel->Frequency != Channels[id].Frequency ) - 2482 .loc 1 1011 0 - 2483 006c 2368 ldr r3, [r4] - 2484 006e 1968 ldr r1, [r3] - 2485 0070 6B00 lsls r3, r5, #1 - 2486 0072 5B19 adds r3, r3, r5 - 2487 0074 9A00 lsls r2, r3, #2 - 2488 0076 1F4B ldr r3, .L225 - 2489 0078 D358 ldr r3, [r2, r3] - 2490 007a 9942 cmp r1, r3 - 2491 007c 03D0 beq .L223 -1012:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1013:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** freqInvalid = true; - 2492 .loc 1 1013 0 - 2493 007e 0127 movs r7, #1 - 2494 0080 04E0 b .L206 - 2495 .LVL267: - 2496 .L212: - 986:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2497 .loc 1 986 0 - 2498 0082 0126 movs r6, #1 - 2499 0084 D1E7 b .L203 - 2500 .LVL268: - 2501 .L223: - 975:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t id = channelAdd->ChannelId; - 2502 .loc 1 975 0 - 2503 0086 0027 movs r7, #0 - 2504 0088 00E0 b .L206 - 2505 .L215: - 2506 008a 0027 movs r7, #0 - 2507 .L206: - 2508 .LVL269: -1014:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1015:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1016:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1017:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Check frequency -1018:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( freqInvalid == false ) - 2509 .loc 1 1018 0 - 2510 008c 002F cmp r7, #0 - 2511 008e 1DD0 beq .L224 - 2512 .LVL270: - 2513 .L209: -1019:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1020:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( VerifyTxFreq( channelAdd->NewChannel->Frequency, &band ) == false ) -1021:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1022:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** freqInvalid = true; -1023:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1024:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1025:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1026:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Check status -1027:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( ( drInvalid == true ) && ( freqInvalid == true ) ) - 2514 .loc 1 1027 0 - 2515 0090 002E cmp r6, #0 - ARM GAS /tmp/cczfoKrY.s page 65 - - - 2516 0092 01D0 beq .L210 - 2517 .loc 1 1027 0 is_stmt 0 discriminator 1 - 2518 0094 002F cmp r7, #0 - 2519 0096 26D1 bne .L220 - 2520 .L210: -1028:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1029:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return LORAMAC_STATUS_FREQ_AND_DR_INVALID; -1030:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1031:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( drInvalid == true ) - 2521 .loc 1 1031 0 is_stmt 1 - 2522 0098 002E cmp r6, #0 - 2523 009a 26D1 bne .L221 -1032:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1033:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return LORAMAC_STATUS_DATARATE_INVALID; -1034:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1035:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( freqInvalid == true ) - 2524 .loc 1 1035 0 - 2525 009c 002F cmp r7, #0 - 2526 009e 26D1 bne .L222 -1036:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1037:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return LORAMAC_STATUS_FREQUENCY_INVALID; -1038:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1039:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1040:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** memcpy( &(Channels[id]), channelAdd->NewChannel, sizeof( Channels[id] ) ); - 2527 .loc 1 1040 0 - 2528 00a0 6B00 lsls r3, r5, #1 - 2529 00a2 5B19 adds r3, r3, r5 - 2530 00a4 9E00 lsls r6, r3, #2 - 2531 .LVL271: - 2532 00a6 134B ldr r3, .L225 - 2533 00a8 F618 adds r6, r6, r3 - 2534 00aa 2168 ldr r1, [r4] - 2535 00ac 0C22 movs r2, #12 - 2536 00ae 3000 movs r0, r6 - 2537 00b0 FFF7FEFF bl memcpy - 2538 .LVL272: -1041:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Channels[id].Band = band; - 2539 .loc 1 1041 0 - 2540 00b4 6B46 mov r3, sp - 2541 00b6 0733 adds r3, r3, #7 - 2542 00b8 1B78 ldrb r3, [r3] - 2543 00ba 7372 strb r3, [r6, #9] -1042:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelsMask[0] |= ( 1 << id ); - 2544 .loc 1 1042 0 - 2545 00bc 0122 movs r2, #1 - 2546 00be AA40 lsls r2, r2, r5 - 2547 00c0 0D49 ldr r1, .L225+4 - 2548 00c2 0B88 ldrh r3, [r1] - 2549 00c4 1343 orrs r3, r2 - 2550 00c6 0B80 strh r3, [r1] -1043:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return LORAMAC_STATUS_OK; - 2551 .loc 1 1043 0 - 2552 00c8 0020 movs r0, #0 - 2553 00ca 0AE0 b .L202 - 2554 .LVL273: - 2555 .L224: -1020:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - ARM GAS /tmp/cczfoKrY.s page 66 - - - 2556 .loc 1 1020 0 - 2557 00cc 2368 ldr r3, [r4] - 2558 00ce 1868 ldr r0, [r3] - 2559 00d0 6B46 mov r3, sp - 2560 00d2 D91D adds r1, r3, #7 - 2561 00d4 FFF7FEFF bl VerifyTxFreq - 2562 .LVL274: - 2563 00d8 0028 cmp r0, #0 - 2564 00da D9D1 bne .L209 -1022:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2565 .loc 1 1022 0 - 2566 00dc 0137 adds r7, r7, #1 - 2567 .LVL275: - 2568 00de D7E7 b .L209 - 2569 .LVL276: - 2570 .L211: - 980:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2571 .loc 1 980 0 - 2572 00e0 0320 movs r0, #3 - 2573 .LVL277: - 2574 .L202: -1044:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2575 .loc 1 1044 0 - 2576 00e2 03B0 add sp, sp, #12 - 2577 @ sp needed - 2578 .LVL278: - 2579 .LVL279: - 2580 00e4 F0BD pop {r4, r5, r6, r7, pc} - 2581 .LVL280: - 2582 .L220: -1029:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2583 .loc 1 1029 0 - 2584 00e6 0620 movs r0, #6 - 2585 00e8 FBE7 b .L202 - 2586 .L221: -1033:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2587 .loc 1 1033 0 - 2588 00ea 0520 movs r0, #5 - 2589 00ec F9E7 b .L202 - 2590 .L222: -1037:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2591 .loc 1 1037 0 - 2592 00ee 0420 movs r0, #4 - 2593 00f0 F7E7 b .L202 - 2594 .L226: - 2595 00f2 C046 .align 2 - 2596 .L225: - 2597 00f4 00000000 .word Channels - 2598 00f8 00000000 .word .LANCHOR2 - 2599 .cfi_endproc - 2600 .LFE108: - 2602 .section .text.RegionEU868ChannelsRemove,"ax",%progbits - 2603 .align 1 - 2604 .global RegionEU868ChannelsRemove - 2605 .syntax unified - 2606 .code 16 - 2607 .thumb_func - ARM GAS /tmp/cczfoKrY.s page 67 - - - 2608 .fpu softvfp - 2610 RegionEU868ChannelsRemove: - 2611 .LFB109: -1045:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1046:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** bool RegionEU868ChannelsRemove( ChannelRemoveParams_t* channelRemove ) -1047:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2612 .loc 1 1047 0 - 2613 .cfi_startproc - 2614 @ args = 0, pretend = 0, frame = 0 - 2615 @ frame_needed = 0, uses_anonymous_args = 0 - 2616 .LVL281: - 2617 0000 10B5 push {r4, lr} - 2618 .LCFI30: - 2619 .cfi_def_cfa_offset 8 - 2620 .cfi_offset 4, -8 - 2621 .cfi_offset 14, -4 -1048:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t id = channelRemove->ChannelId; - 2622 .loc 1 1048 0 - 2623 0002 0478 ldrb r4, [r0] - 2624 .LVL282: -1049:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1050:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( id < EU868_NUMB_DEFAULT_CHANNELS ) - 2625 .loc 1 1050 0 - 2626 0004 022C cmp r4, #2 - 2627 0006 01D8 bhi .L230 -1051:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1052:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return false; - 2628 .loc 1 1052 0 - 2629 0008 0020 movs r0, #0 - 2630 .LVL283: - 2631 .L228: -1053:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1054:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1055:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Remove the channel from the list of channels -1056:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Channels[id] = ( ChannelParams_t ){ 0, 0, { 0 }, 0 }; -1057:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1058:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return RegionCommonChanDisable( ChannelsMask, id, EU868_MAX_NB_CHANNELS ); -1059:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2632 .loc 1 1059 0 - 2633 @ sp needed - 2634 .LVL284: - 2635 000a 10BD pop {r4, pc} - 2636 .LVL285: - 2637 .L230: -1056:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2638 .loc 1 1056 0 - 2639 000c 6300 lsls r3, r4, #1 - 2640 000e 1B19 adds r3, r3, r4 - 2641 0010 9A00 lsls r2, r3, #2 - 2642 0012 0648 ldr r0, .L231 - 2643 .LVL286: - 2644 0014 8018 adds r0, r0, r2 - 2645 0016 0C22 movs r2, #12 - 2646 0018 0021 movs r1, #0 - 2647 001a FFF7FEFF bl memset - 2648 .LVL287: -1058:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - ARM GAS /tmp/cczfoKrY.s page 68 - - - 2649 .loc 1 1058 0 - 2650 001e 1022 movs r2, #16 - 2651 0020 2100 movs r1, r4 - 2652 0022 0348 ldr r0, .L231+4 - 2653 0024 FFF7FEFF bl RegionCommonChanDisable - 2654 .LVL288: - 2655 0028 EFE7 b .L228 - 2656 .L232: - 2657 002a C046 .align 2 - 2658 .L231: - 2659 002c 00000000 .word Channels - 2660 0030 00000000 .word .LANCHOR2 - 2661 .cfi_endproc - 2662 .LFE109: - 2664 .section .text.RegionEU868ApplyCFList,"ax",%progbits - 2665 .align 1 - 2666 .global RegionEU868ApplyCFList - 2667 .syntax unified - 2668 .code 16 - 2669 .thumb_func - 2670 .fpu softvfp - 2672 RegionEU868ApplyCFList: - 2673 .LFB94: - 411:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelParams_t newChannel; - 2674 .loc 1 411 0 - 2675 .cfi_startproc - 2676 @ args = 0, pretend = 0, frame = 24 - 2677 @ frame_needed = 0, uses_anonymous_args = 0 - 2678 .LVL289: - 2679 0000 70B5 push {r4, r5, r6, lr} - 2680 .LCFI31: - 2681 .cfi_def_cfa_offset 16 - 2682 .cfi_offset 4, -16 - 2683 .cfi_offset 5, -12 - 2684 .cfi_offset 6, -8 - 2685 .cfi_offset 14, -4 - 2686 0002 86B0 sub sp, sp, #24 - 2687 .LCFI32: - 2688 .cfi_def_cfa_offset 40 - 2689 0004 0600 movs r6, r0 - 417:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2690 .loc 1 417 0 - 2691 0006 03AB add r3, sp, #12 - 2692 0008 5022 movs r2, #80 - 2693 000a 1A72 strb r2, [r3, #8] - 420:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2694 .loc 1 420 0 - 2695 000c 0379 ldrb r3, [r0, #4] - 2696 000e 102B cmp r3, #16 - 2697 0010 01D0 beq .L242 - 2698 .LVL290: - 2699 .L233: - 461:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2700 .loc 1 461 0 - 2701 0012 06B0 add sp, sp, #24 - 2702 @ sp needed - 2703 .LVL291: - ARM GAS /tmp/cczfoKrY.s page 69 - - - 2704 0014 70BD pop {r4, r5, r6, pc} - 2705 .LVL292: - 2706 .L242: - 2707 .LBB47: - 426:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2708 .loc 1 426 0 - 2709 0016 0324 movs r4, #3 - 2710 0018 0025 movs r5, #0 - 2711 001a 19E0 b .L235 - 2712 .LVL293: - 2713 .L243: - 431:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Frequency |= ( (uint32_t) applyCFList->Payload[i + 1] << 8 ); - 2714 .loc 1 431 0 - 2715 001c 3268 ldr r2, [r6] - 2716 001e 535D ldrb r3, [r2, r5] - 2717 0020 0393 str r3, [sp, #12] - 432:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Frequency |= ( (uint32_t) applyCFList->Payload[i + 2] << 16 ); - 2718 .loc 1 432 0 - 2719 0022 5219 adds r2, r2, r5 - 2720 0024 5178 ldrb r1, [r2, #1] - 2721 0026 0902 lsls r1, r1, #8 - 2722 0028 0B43 orrs r3, r1 - 2723 002a 0393 str r3, [sp, #12] - 433:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Frequency *= 100; - 2724 .loc 1 433 0 - 2725 002c 9278 ldrb r2, [r2, #2] - 2726 002e 1204 lsls r2, r2, #16 - 2727 0030 1343 orrs r3, r2 - 434:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2728 .loc 1 434 0 - 2729 0032 6422 movs r2, #100 - 2730 0034 5343 muls r3, r2 - 2731 0036 0393 str r3, [sp, #12] - 437:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2732 .loc 1 437 0 - 2733 0038 0023 movs r3, #0 - 2734 003a 0493 str r3, [sp, #16] - 2735 003c 11E0 b .L237 - 2736 .L238: - 456:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2737 .loc 1 456 0 - 2738 003e 6B46 mov r3, sp - 2739 0040 1C70 strb r4, [r3] - 458:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2740 .loc 1 458 0 - 2741 0042 6846 mov r0, sp - 2742 0044 FFF7FEFF bl RegionEU868ChannelsRemove - 2743 .LVL294: - 2744 .L239: - 426:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2745 .loc 1 426 0 discriminator 2 - 2746 0048 0335 adds r5, r5, #3 - 2747 .LVL295: - 2748 004a EDB2 uxtb r5, r5 - 2749 .LVL296: - 2750 004c 0134 adds r4, r4, #1 - 2751 .LVL297: - ARM GAS /tmp/cczfoKrY.s page 70 - - - 2752 004e E4B2 uxtb r4, r4 - 2753 .LVL298: - 2754 .L235: - 426:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2755 .loc 1 426 0 is_stmt 0 discriminator 1 - 2756 0050 0F2C cmp r4, #15 - 2757 0052 DED8 bhi .L233 - 428:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2758 .loc 1 428 0 is_stmt 1 - 2759 0054 072C cmp r4, #7 - 2760 0056 E1D9 bls .L243 - 441:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.DrRange.Value = 0; - 2761 .loc 1 441 0 - 2762 0058 03AA add r2, sp, #12 - 2763 005a 0023 movs r3, #0 - 2764 005c 0393 str r3, [sp, #12] - 442:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** newChannel.Rx1Frequency = 0; - 2765 .loc 1 442 0 - 2766 005e 1372 strb r3, [r2, #8] - 443:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2767 .loc 1 443 0 - 2768 0060 0493 str r3, [sp, #16] - 2769 .L237: - 446:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2770 .loc 1 446 0 - 2771 0062 039B ldr r3, [sp, #12] - 2772 0064 002B cmp r3, #0 - 2773 0066 EAD0 beq .L238 - 448:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channelAdd.ChannelId = chanIdx; - 2774 .loc 1 448 0 - 2775 0068 01A8 add r0, sp, #4 - 2776 006a 03AB add r3, sp, #12 - 2777 006c 0193 str r3, [sp, #4] - 449:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2778 .loc 1 449 0 - 2779 006e 0471 strb r4, [r0, #4] - 452:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2780 .loc 1 452 0 - 2781 0070 FFF7FEFF bl RegionEU868ChannelAdd - 2782 .LVL299: - 2783 0074 E8E7 b .L239 - 2784 .LBE47: - 2785 .cfi_endproc - 2786 .LFE94: - 2788 .section .text.RegionEU868NewChannelReq,"ax",%progbits - 2789 .align 1 - 2790 .global RegionEU868NewChannelReq - 2791 .syntax unified - 2792 .code 16 - 2793 .thumb_func - 2794 .fpu softvfp - 2796 RegionEU868NewChannelReq: - 2797 .LFB102: - 787:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t status = 0x03; - 2798 .loc 1 787 0 - 2799 .cfi_startproc - 2800 @ args = 0, pretend = 0, frame = 16 - ARM GAS /tmp/cczfoKrY.s page 71 - - - 2801 @ frame_needed = 0, uses_anonymous_args = 0 - 2802 .LVL300: - 2803 0000 00B5 push {lr} - 2804 .LCFI33: - 2805 .cfi_def_cfa_offset 4 - 2806 .cfi_offset 14, -4 - 2807 0002 85B0 sub sp, sp, #20 - 2808 .LCFI34: - 2809 .cfi_def_cfa_offset 24 - 2810 .LVL301: - 792:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2811 .loc 1 792 0 - 2812 0004 0368 ldr r3, [r0] - 2813 0006 1A68 ldr r2, [r3] - 2814 0008 002A cmp r2, #0 - 2815 000a 0BD1 bne .L245 - 794:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2816 .loc 1 794 0 - 2817 000c 0379 ldrb r3, [r0, #4] - 2818 000e 01A8 add r0, sp, #4 - 2819 .LVL302: - 2820 0010 0370 strb r3, [r0] - 797:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2821 .loc 1 797 0 - 2822 0012 FFF7FEFF bl RegionEU868ChannelsRemove - 2823 .LVL303: - 2824 0016 0028 cmp r0, #0 - 2825 0018 02D1 bne .L254 - 799:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2826 .loc 1 799 0 - 2827 001a 0020 movs r0, #0 - 2828 .LVL304: - 2829 .L246: - 837:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2830 .loc 1 837 0 - 2831 001c 05B0 add sp, sp, #20 - 2832 @ sp needed - 2833 001e 00BD pop {pc} - 2834 .LVL305: - 2835 .L254: - 788:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelAddParams_t channelAdd; - 2836 .loc 1 788 0 - 2837 0020 0320 movs r0, #3 - 2838 0022 FBE7 b .L246 - 2839 .LVL306: - 2840 .L245: - 804:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** channelAdd.ChannelId = newChannelReq->ChannelId; - 2841 .loc 1 804 0 - 2842 0024 02AA add r2, sp, #8 - 2843 0026 0293 str r3, [sp, #8] - 805:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2844 .loc 1 805 0 - 2845 0028 0379 ldrb r3, [r0, #4] - 2846 002a 1371 strb r3, [r2, #4] - 807:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2847 .loc 1 807 0 - 2848 002c 1000 movs r0, r2 - ARM GAS /tmp/cczfoKrY.s page 72 - - - 2849 .LVL307: - 2850 002e FFF7FEFF bl RegionEU868ChannelAdd - 2851 .LVL308: - 2852 0032 0428 cmp r0, #4 - 2853 0034 0ED0 beq .L253 - 2854 0036 05D9 bls .L255 - 2855 0038 0528 cmp r0, #5 - 2856 003a 07D0 beq .L250 - 2857 003c 0628 cmp r0, #6 - 2858 003e 07D1 bne .L247 - 2859 .LVL309: - 825:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 2860 .loc 1 825 0 - 2861 0040 0020 movs r0, #0 - 826:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2862 .loc 1 826 0 - 2863 0042 EBE7 b .L246 - 2864 .LVL310: - 2865 .L255: - 807:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2866 .loc 1 807 0 - 2867 0044 0028 cmp r0, #0 - 2868 0046 03D1 bne .L247 - 788:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** ChannelAddParams_t channelAdd; - 2869 .loc 1 788 0 - 2870 0048 0320 movs r0, #3 - 2871 004a E7E7 b .L246 - 2872 .L250: - 2873 .LVL311: - 820:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 2874 .loc 1 820 0 - 2875 004c 0120 movs r0, #1 - 821:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2876 .loc 1 821 0 - 2877 004e E5E7 b .L246 - 2878 .LVL312: - 2879 .L247: - 830:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 2880 .loc 1 830 0 - 2881 0050 0020 movs r0, #0 - 831:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2882 .loc 1 831 0 - 2883 0052 E3E7 b .L246 - 2884 .LVL313: - 2885 .L253: - 815:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** break; - 2886 .loc 1 815 0 - 2887 0054 0220 movs r0, #2 - 2888 0056 E1E7 b .L246 - 2889 .cfi_endproc - 2890 .LFE102: - 2892 .section .text.RegionEU868SetContinuousWave,"ax",%progbits - 2893 .align 1 - 2894 .global RegionEU868SetContinuousWave - 2895 .syntax unified - 2896 .code 16 - 2897 .thumb_func - ARM GAS /tmp/cczfoKrY.s page 73 - - - 2898 .fpu softvfp - 2900 RegionEU868SetContinuousWave: - 2901 .LFB110: -1060:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1061:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** void RegionEU868SetContinuousWave( ContinuousWaveParams_t* continuousWave ) -1062:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2902 .loc 1 1062 0 - 2903 .cfi_startproc - 2904 @ args = 0, pretend = 0, frame = 0 - 2905 @ frame_needed = 0, uses_anonymous_args = 0 - 2906 .LVL314: - 2907 0000 70B5 push {r4, r5, r6, lr} - 2908 .LCFI35: - 2909 .cfi_def_cfa_offset 16 - 2910 .cfi_offset 4, -16 - 2911 .cfi_offset 5, -12 - 2912 .cfi_offset 6, -8 - 2913 .cfi_offset 14, -4 - 2914 0002 0400 movs r4, r0 -1063:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t txPowerLimited = LimitTxPower( continuousWave->TxPower, Bands[Channels[continuousWave->C - 2915 .loc 1 1063 0 - 2916 0004 0225 movs r5, #2 - 2917 0006 4557 ldrsb r5, [r0, r5] - 2918 0008 0278 ldrb r2, [r0] - 2919 000a 5300 lsls r3, r2, #1 - 2920 000c 9B18 adds r3, r3, r2 - 2921 000e 9900 lsls r1, r3, #2 - 2922 0010 0E4B ldr r3, .L258 - 2923 0012 5B18 adds r3, r3, r1 - 2924 0014 597A ldrb r1, [r3, #9] - 2925 0016 0901 lsls r1, r1, #4 - 2926 0018 0D4B ldr r3, .L258+4 - 2927 001a 5B18 adds r3, r3, r1 - 2928 001c 9B78 ldrb r3, [r3, #2] - 2929 001e 5BB2 sxtb r3, r3 - 2930 .LVL315: - 2931 .LBB48: - 2932 .LBB49: - 102:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** - 2933 .loc 1 102 0 - 2934 0020 281C adds r0, r5, #0 - 2935 .LVL316: - 2936 0022 9D42 cmp r5, r3 - 2937 0024 00DA bge .L257 - 2938 0026 181C adds r0, r3, #0 - 2939 .L257: - 2940 0028 40B2 sxtb r0, r0 - 2941 .LVL317: - 2942 .LBE49: - 2943 .LBE48: -1064:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t phyTxPower = 0; -1065:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint32_t frequency = Channels[continuousWave->Channel].Frequency; - 2944 .loc 1 1065 0 - 2945 002a 5300 lsls r3, r2, #1 - 2946 002c 9B18 adds r3, r3, r2 - 2947 002e 9A00 lsls r2, r3, #2 - 2948 0030 064B ldr r3, .L258 - ARM GAS /tmp/cczfoKrY.s page 74 - - - 2949 0032 D558 ldr r5, [r2, r3] - 2950 .LVL318: -1066:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1067:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** // Calculate physical TX power -1068:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** phyTxPower = RegionCommonComputeTxPower( txPowerLimited, continuousWave->MaxEirp, continuousWav - 2951 .loc 1 1068 0 - 2952 0034 A268 ldr r2, [r4, #8] - 2953 0036 6168 ldr r1, [r4, #4] - 2954 0038 FFF7FEFF bl RegionCommonComputeTxPower - 2955 .LVL319: - 2956 003c 0100 movs r1, r0 - 2957 .LVL320: -1069:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1070:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** Radio.SetTxContinuousWave( frequency, phyTxPower, continuousWave->Timeout ); - 2958 .loc 1 1070 0 - 2959 003e 054B ldr r3, .L258+8 - 2960 0040 5B6C ldr r3, [r3, #68] - 2961 0042 A289 ldrh r2, [r4, #12] - 2962 0044 2800 movs r0, r5 - 2963 0046 9847 blx r3 - 2964 .LVL321: -1071:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 2965 .loc 1 1071 0 - 2966 @ sp needed - 2967 .LVL322: - 2968 .LVL323: - 2969 0048 70BD pop {r4, r5, r6, pc} - 2970 .L259: - 2971 004a C046 .align 2 - 2972 .L258: - 2973 004c 00000000 .word Channels - 2974 0050 00000000 .word .LANCHOR4 - 2975 0054 00000000 .word Radio - 2976 .cfi_endproc - 2977 .LFE110: - 2979 .section .text.RegionEU868ApplyDrOffset,"ax",%progbits - 2980 .align 1 - 2981 .global RegionEU868ApplyDrOffset - 2982 .syntax unified - 2983 .code 16 - 2984 .thumb_func - 2985 .fpu softvfp - 2987 RegionEU868ApplyDrOffset: - 2988 .LFB111: -1072:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1073:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** uint8_t RegionEU868ApplyDrOffset( uint8_t downlinkDwellTime, int8_t dr, int8_t drOffset ) -1074:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { - 2989 .loc 1 1074 0 - 2990 .cfi_startproc - 2991 @ args = 0, pretend = 0, frame = 0 - 2992 @ frame_needed = 0, uses_anonymous_args = 0 - 2993 @ link register save eliminated. - 2994 .LVL324: -1075:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** int8_t datarate = dr - drOffset; - 2995 .loc 1 1075 0 - 2996 0000 881A subs r0, r1, r2 - 2997 .LVL325: - ARM GAS /tmp/cczfoKrY.s page 75 - - - 2998 0002 40B2 sxtb r0, r0 - 2999 .LVL326: -1076:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** -1077:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** if( datarate < 0 ) - 3000 .loc 1 1077 0 - 3001 0004 0028 cmp r0, #0 - 3002 0006 01DB blt .L263 - 3003 .LVL327: - 3004 .L261: -1078:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** { -1079:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** datarate = DR_0; -1080:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } -1081:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** return datarate; - 3005 .loc 1 1081 0 - 3006 0008 C0B2 uxtb r0, r0 -1082:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 3007 .loc 1 1082 0 - 3008 @ sp needed - 3009 000a 7047 bx lr - 3010 .L263: -1079:./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.c **** } - 3011 .loc 1 1079 0 - 3012 000c 0020 movs r0, #0 - 3013 .LVL328: - 3014 000e FBE7 b .L261 - 3015 .cfi_endproc - 3016 .LFE111: - 3018 .section .rodata - 3019 .align 2 - 3020 .set .LANCHOR5,. + 0 - 3021 .LC0: - 3022 0000 A027BE33 .word 868100000 - 3023 0004 00000000 .word 0 - 3024 0008 50 .byte 80 - 3025 0009 01 .byte 1 - 3026 000a 0000 .space 2 - 3027 .LC1: - 3028 000c E034C133 .word 868300000 - 3029 0010 00000000 .word 0 - 3030 0014 50 .byte 80 - 3031 0015 01 .byte 1 - 3032 0016 0000 .space 2 - 3033 .LC2: - 3034 0018 2042C433 .word 868500000 - 3035 001c 00000000 .word 0 - 3036 0020 50 .byte 80 - 3037 0021 01 .byte 1 - 3038 0022 0000 .space 2 - 3039 .section .bss.Channels,"aw",%nobits - 3040 .align 2 - 3043 Channels: - 3044 0000 00000000 .space 192 - 3044 00000000 - 3044 00000000 - 3044 00000000 - 3044 00000000 - 3045 .section .bss.ChannelsDefaultMask,"aw",%nobits - ARM GAS /tmp/cczfoKrY.s page 76 - - - 3046 .align 2 - 3047 .set .LANCHOR3,. + 0 - 3050 ChannelsDefaultMask: - 3051 0000 0000 .space 2 - 3052 .section .bss.ChannelsMask,"aw",%nobits - 3053 .align 2 - 3054 .set .LANCHOR2,. + 0 - 3057 ChannelsMask: - 3058 0000 0000 .space 2 - 3059 .section .data.Bands,"aw",%progbits - 3060 .align 2 - 3061 .set .LANCHOR4,. + 0 - 3064 Bands: - 3065 0000 6400 .short 100 - 3066 0002 00 .byte 0 - 3067 0003 00 .space 1 - 3068 0004 00000000 .word 0 - 3069 0008 00000000 .word 0 - 3070 000c 00000000 .space 4 - 3071 0010 6400 .short 100 - 3072 0012 00 .byte 0 - 3073 0013 00 .space 1 - 3074 0014 00000000 .word 0 - 3075 0018 00000000 .word 0 - 3076 001c 00000000 .space 4 - 3077 0020 E803 .short 1000 - 3078 0022 00 .byte 0 - 3079 0023 00 .space 1 - 3080 0024 00000000 .word 0 - 3081 0028 00000000 .word 0 - 3082 002c 00000000 .space 4 - 3083 0030 0A00 .short 10 - 3084 0032 00 .byte 0 - 3085 0033 00 .space 1 - 3086 0034 00000000 .word 0 - 3087 0038 00000000 .word 0 - 3088 003c 00000000 .space 4 - 3089 0040 6400 .short 100 - 3090 0042 00 .byte 0 - 3091 0043 00 .space 1 - 3092 0044 00000000 .word 0 - 3093 0048 00000000 .word 0 - 3094 004c 00000000 .space 4 - 3095 .section .rodata.BandwidthsEU868,"a",%progbits - 3096 .align 2 - 3097 .set .LANCHOR6,. + 0 - 3100 BandwidthsEU868: - 3101 0000 48E80100 .word 125000 - 3102 0004 48E80100 .word 125000 - 3103 0008 48E80100 .word 125000 - 3104 000c 48E80100 .word 125000 - 3105 0010 48E80100 .word 125000 - 3106 0014 48E80100 .word 125000 - 3107 0018 90D00300 .word 250000 - 3108 001c 00000000 .word 0 - 3109 .section .rodata.DataratesEU868,"a",%progbits - 3110 .align 2 - ARM GAS /tmp/cczfoKrY.s page 77 - - - 3111 .set .LANCHOR7,. + 0 - 3114 DataratesEU868: - 3115 0000 0C .byte 12 - 3116 0001 0B .byte 11 - 3117 0002 0A .byte 10 - 3118 0003 09 .byte 9 - 3119 0004 08 .byte 8 - 3120 0005 07 .byte 7 - 3121 0006 07 .byte 7 - 3122 0007 32 .byte 50 - 3123 .section .rodata.MaxPayloadOfDatarateEU868,"a",%progbits - 3124 .align 2 - 3125 .set .LANCHOR0,. + 0 - 3128 MaxPayloadOfDatarateEU868: - 3129 0000 33 .byte 51 - 3130 0001 33 .byte 51 - 3131 0002 33 .byte 51 - 3132 0003 73 .byte 115 - 3133 0004 F2 .byte -14 - 3134 0005 F2 .byte -14 - 3135 0006 F2 .byte -14 - 3136 0007 F2 .byte -14 - 3137 .section .rodata.MaxPayloadOfDatarateRepeaterEU868,"a",%progbits - 3138 .align 2 - 3139 .set .LANCHOR1,. + 0 - 3142 MaxPayloadOfDatarateRepeaterEU868: - 3143 0000 33 .byte 51 - 3144 0001 33 .byte 51 - 3145 0002 33 .byte 51 - 3146 0003 73 .byte 115 - 3147 0004 DE .byte -34 - 3148 0005 DE .byte -34 - 3149 0006 DE .byte -34 - 3150 0007 DE .byte -34 - 3151 .text - 3152 .Letext0: - 3153 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 3154 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 3155 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 3156 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 3157 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 3158 .file 7 "/usr/arm-none-eabi/include/sys/_stdint.h" - 3159 .file 8 "/usr/arm-none-eabi/include/math.h" - 3160 .file 9 "Middlewares/Third_Party/Lora/Phy/radio.h" - 3161 .file 10 "Middlewares/Third_Party/Lora/Utilities/utilities.h" - 3162 .file 11 "Middlewares/Third_Party/Lora/Mac/LoRaMac.h" - 3163 .file 12 "./Middlewares/Third_Party/Lora/Mac/region/Region.h" - 3164 .file 13 "./Middlewares/Third_Party/Lora/Mac/region/RegionCommon.h" - 3165 .file 14 "./Middlewares/Third_Party/Lora/Mac/region/RegionEU868.h" - 3166 .file 15 "" - 3167 .file 16 "Middlewares/Third_Party/Lora/Utilities/timeServer.h" - ARM GAS /tmp/cczfoKrY.s page 78 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 RegionEU868.c - /tmp/cczfoKrY.s:16 .text.VerifyTxFreq:0000000000000000 $t - /tmp/cczfoKrY.s:22 .text.VerifyTxFreq:0000000000000000 VerifyTxFreq - /tmp/cczfoKrY.s:128 .text.VerifyTxFreq:0000000000000078 $d - /tmp/cczfoKrY.s:145 .text.RegionEU868GetPhyParam:0000000000000000 $t - /tmp/cczfoKrY.s:152 .text.RegionEU868GetPhyParam:0000000000000000 RegionEU868GetPhyParam - /tmp/cczfoKrY.s:179 .rodata.RegionEU868GetPhyParam:0000000000000000 $d - /tmp/cczfoKrY.s:367 .text.RegionEU868GetPhyParam:000000000000009c $d - /tmp/cczfoKrY.s:3043 .bss.Channels:0000000000000000 Channels - /tmp/cczfoKrY.s:383 .text.RegionEU868SetBandTxDone:0000000000000000 $t - /tmp/cczfoKrY.s:390 .text.RegionEU868SetBandTxDone:0000000000000000 RegionEU868SetBandTxDone - /tmp/cczfoKrY.s:424 .text.RegionEU868SetBandTxDone:0000000000000020 $d - /tmp/cczfoKrY.s:430 .text.RegionEU868InitDefaults:0000000000000000 $t - /tmp/cczfoKrY.s:437 .text.RegionEU868InitDefaults:0000000000000000 RegionEU868InitDefaults - /tmp/cczfoKrY.s:504 .text.RegionEU868InitDefaults:0000000000000044 $d - /tmp/cczfoKrY.s:512 .text.RegionEU868Verify:0000000000000000 $t - /tmp/cczfoKrY.s:519 .text.RegionEU868Verify:0000000000000000 RegionEU868Verify - /tmp/cczfoKrY.s:542 .rodata.RegionEU868Verify:0000000000000000 $d - /tmp/cczfoKrY.s:661 .text.RegionEU868Verify:0000000000000078 $d - /tmp/cczfoKrY.s:666 .text.RegionEU868ChanMaskSet:0000000000000000 $t - /tmp/cczfoKrY.s:673 .text.RegionEU868ChanMaskSet:0000000000000000 RegionEU868ChanMaskSet - /tmp/cczfoKrY.s:726 .text.RegionEU868ChanMaskSet:000000000000002c $d - /tmp/cczfoKrY.s:732 .text.RegionEU868AdrNext:0000000000000000 $t - /tmp/cczfoKrY.s:739 .text.RegionEU868AdrNext:0000000000000000 RegionEU868AdrNext - /tmp/cczfoKrY.s:870 .text.RegionEU868AdrNext:000000000000007c $d - /tmp/cczfoKrY.s:875 .text.RegionEU868ComputeRxWindowParameters:0000000000000000 $t - /tmp/cczfoKrY.s:882 .text.RegionEU868ComputeRxWindowParameters:0000000000000000 RegionEU868ComputeRxWindowParameters - /tmp/cczfoKrY.s:1004 .text.RegionEU868ComputeRxWindowParameters:000000000000007c $d - /tmp/cczfoKrY.s:1013 .text.RegionEU868RxConfig:0000000000000000 $t - /tmp/cczfoKrY.s:1020 .text.RegionEU868RxConfig:0000000000000000 RegionEU868RxConfig - /tmp/cczfoKrY.s:1202 .text.RegionEU868RxConfig:00000000000000dc $d - /tmp/cczfoKrY.s:1213 .text.RegionEU868TxConfig:0000000000000000 $t - /tmp/cczfoKrY.s:1220 .text.RegionEU868TxConfig:0000000000000000 RegionEU868TxConfig - /tmp/cczfoKrY.s:1441 .text.RegionEU868TxConfig:000000000000010c $d - /tmp/cczfoKrY.s:1454 .text.RegionEU868LinkAdrReq:0000000000000000 $t - /tmp/cczfoKrY.s:1461 .text.RegionEU868LinkAdrReq:0000000000000000 RegionEU868LinkAdrReq - /tmp/cczfoKrY.s:1730 .text.RegionEU868LinkAdrReq:0000000000000140 $d - /tmp/cczfoKrY.s:1736 .text.RegionEU868RxParamSetupReq:0000000000000000 $t - /tmp/cczfoKrY.s:1743 .text.RegionEU868RxParamSetupReq:0000000000000000 RegionEU868RxParamSetupReq - /tmp/cczfoKrY.s:1814 .text.RegionEU868RxParamSetupReq:0000000000000044 $d - /tmp/cczfoKrY.s:1819 .text.RegionEU868TxParamSetupReq:0000000000000000 $t - /tmp/cczfoKrY.s:1826 .text.RegionEU868TxParamSetupReq:0000000000000000 RegionEU868TxParamSetupReq - /tmp/cczfoKrY.s:1845 .text.RegionEU868DlChannelReq:0000000000000000 $t - /tmp/cczfoKrY.s:1852 .text.RegionEU868DlChannelReq:0000000000000000 RegionEU868DlChannelReq - /tmp/cczfoKrY.s:1928 .text.RegionEU868DlChannelReq:000000000000004c $d - /tmp/cczfoKrY.s:1934 .text.RegionEU868AlternateDr:0000000000000000 $t - /tmp/cczfoKrY.s:1941 .text.RegionEU868AlternateDr:0000000000000000 RegionEU868AlternateDr - /tmp/cczfoKrY.s:2013 .text.RegionEU868CalcBackOff:0000000000000000 $t - /tmp/cczfoKrY.s:2020 .text.RegionEU868CalcBackOff:0000000000000000 RegionEU868CalcBackOff - /tmp/cczfoKrY.s:2071 .text.RegionEU868CalcBackOff:0000000000000030 $d - /tmp/cczfoKrY.s:2077 .text.RegionEU868NextChannel:0000000000000000 $t - /tmp/cczfoKrY.s:2084 .text.RegionEU868NextChannel:0000000000000000 RegionEU868NextChannel - /tmp/cczfoKrY.s:2371 .text.RegionEU868NextChannel:0000000000000150 $d - /tmp/cczfoKrY.s:2378 .text.RegionEU868ChannelAdd:0000000000000000 $t - /tmp/cczfoKrY.s:2385 .text.RegionEU868ChannelAdd:0000000000000000 RegionEU868ChannelAdd - /tmp/cczfoKrY.s:2597 .text.RegionEU868ChannelAdd:00000000000000f4 $d - ARM GAS /tmp/cczfoKrY.s page 79 - - - /tmp/cczfoKrY.s:2603 .text.RegionEU868ChannelsRemove:0000000000000000 $t - /tmp/cczfoKrY.s:2610 .text.RegionEU868ChannelsRemove:0000000000000000 RegionEU868ChannelsRemove - /tmp/cczfoKrY.s:2659 .text.RegionEU868ChannelsRemove:000000000000002c $d - /tmp/cczfoKrY.s:2665 .text.RegionEU868ApplyCFList:0000000000000000 $t - /tmp/cczfoKrY.s:2672 .text.RegionEU868ApplyCFList:0000000000000000 RegionEU868ApplyCFList - /tmp/cczfoKrY.s:2789 .text.RegionEU868NewChannelReq:0000000000000000 $t - /tmp/cczfoKrY.s:2796 .text.RegionEU868NewChannelReq:0000000000000000 RegionEU868NewChannelReq - /tmp/cczfoKrY.s:2893 .text.RegionEU868SetContinuousWave:0000000000000000 $t - /tmp/cczfoKrY.s:2900 .text.RegionEU868SetContinuousWave:0000000000000000 RegionEU868SetContinuousWave - /tmp/cczfoKrY.s:2973 .text.RegionEU868SetContinuousWave:000000000000004c $d - /tmp/cczfoKrY.s:2980 .text.RegionEU868ApplyDrOffset:0000000000000000 $t - /tmp/cczfoKrY.s:2987 .text.RegionEU868ApplyDrOffset:0000000000000000 RegionEU868ApplyDrOffset - /tmp/cczfoKrY.s:3019 .rodata:0000000000000000 $d - /tmp/cczfoKrY.s:3040 .bss.Channels:0000000000000000 $d - /tmp/cczfoKrY.s:3046 .bss.ChannelsDefaultMask:0000000000000000 $d - /tmp/cczfoKrY.s:3050 .bss.ChannelsDefaultMask:0000000000000000 ChannelsDefaultMask - /tmp/cczfoKrY.s:3053 .bss.ChannelsMask:0000000000000000 $d - /tmp/cczfoKrY.s:3057 .bss.ChannelsMask:0000000000000000 ChannelsMask - /tmp/cczfoKrY.s:3060 .data.Bands:0000000000000000 $d - /tmp/cczfoKrY.s:3064 .data.Bands:0000000000000000 Bands - /tmp/cczfoKrY.s:3096 .rodata.BandwidthsEU868:0000000000000000 $d - /tmp/cczfoKrY.s:3100 .rodata.BandwidthsEU868:0000000000000000 BandwidthsEU868 - /tmp/cczfoKrY.s:3110 .rodata.DataratesEU868:0000000000000000 $d - /tmp/cczfoKrY.s:3114 .rodata.DataratesEU868:0000000000000000 DataratesEU868 - /tmp/cczfoKrY.s:3124 .rodata.MaxPayloadOfDatarateEU868:0000000000000000 $d - /tmp/cczfoKrY.s:3128 .rodata.MaxPayloadOfDatarateEU868:0000000000000000 MaxPayloadOfDatarateEU868 - /tmp/cczfoKrY.s:3138 .rodata.MaxPayloadOfDatarateRepeaterEU868:0000000000000000 $d - /tmp/cczfoKrY.s:3142 .rodata.MaxPayloadOfDatarateRepeaterEU868:0000000000000000 MaxPayloadOfDatarateRepeaterEU868 - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -Radio -randr -RegionCommonSetBandTxDone -RegionCommonChanMaskCopy -RegionCommonValueInRange -RegionCommonComputeSymbolTimeLoRa -RegionCommonComputeRxWindowParameters -RegionCommonComputeSymbolTimeFsk -RegionCommonComputeTxPower -RegionCommonParseLinkAdrReq -RegionCommonLinkAdrReqVerifyParams -__aeabi_uidivmod -RegionCommonCalcBackOff -memset -RegionCommonCountChannels -TimerGetElapsedTime -RegionCommonUpdateBandTimeOff -memcpy -RegionCommonChanDisable diff --git a/build/aes.d b/build/aes.d deleted file mode 100644 index 633a59a..0000000 --- a/build/aes.d +++ /dev/null @@ -1,4 +0,0 @@ -build/aes.d: Middlewares/Third_Party/Lora/Crypto/aes.c \ - Middlewares/Third_Party/Lora/Crypto/aes.h - -Middlewares/Third_Party/Lora/Crypto/aes.h: diff --git a/build/aes.lst b/build/aes.lst deleted file mode 100644 index aa21dd7..0000000 --- a/build/aes.lst +++ /dev/null @@ -1,2834 +0,0 @@ -ARM GAS /tmp/ccJ0d890.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "aes.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.xor_block,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 xor_block: - 23 .LFB2: - 24 .file 1 "./Middlewares/Third_Party/Lora/Crypto/aes.c" - 1:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* - 2:./Middlewares/Third_Party/Lora/Crypto/aes.c **** --------------------------------------------------------------------------- - 3:./Middlewares/Third_Party/Lora/Crypto/aes.c **** Copyright (c) 1998-2008, Brian Gladman, Worcester, UK. All rights reserved. - 4:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 5:./Middlewares/Third_Party/Lora/Crypto/aes.c **** LICENSE TERMS - 6:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 7:./Middlewares/Third_Party/Lora/Crypto/aes.c **** The redistribution and use of this software (with or without changes) - 8:./Middlewares/Third_Party/Lora/Crypto/aes.c **** is allowed without the payment of fees or royalties provided that: - 9:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 10:./Middlewares/Third_Party/Lora/Crypto/aes.c **** 1. source code distributions include the above copyright notice, this - 11:./Middlewares/Third_Party/Lora/Crypto/aes.c **** list of conditions and the following disclaimer; - 12:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 13:./Middlewares/Third_Party/Lora/Crypto/aes.c **** 2. binary distributions include the above copyright notice, this list - 14:./Middlewares/Third_Party/Lora/Crypto/aes.c **** of conditions and the following disclaimer in their documentation; - 15:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 16:./Middlewares/Third_Party/Lora/Crypto/aes.c **** 3. the name of the copyright holder is not used to endorse products - 17:./Middlewares/Third_Party/Lora/Crypto/aes.c **** built using this software without specific written permission. - 18:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 19:./Middlewares/Third_Party/Lora/Crypto/aes.c **** DISCLAIMER - 20:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 21:./Middlewares/Third_Party/Lora/Crypto/aes.c **** This software is provided 'as is' with no explicit or implied warranties - 22:./Middlewares/Third_Party/Lora/Crypto/aes.c **** in respect of its properties, including, but not limited to, correctness - 23:./Middlewares/Third_Party/Lora/Crypto/aes.c **** and/or fitness for purpose. - 24:./Middlewares/Third_Party/Lora/Crypto/aes.c **** --------------------------------------------------------------------------- - 25:./Middlewares/Third_Party/Lora/Crypto/aes.c **** Issue 09/09/2006 - 26:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 27:./Middlewares/Third_Party/Lora/Crypto/aes.c **** This is an AES implementation that uses only 8-bit byte operations on the - 28:./Middlewares/Third_Party/Lora/Crypto/aes.c **** cipher state (there are options to use 32-bit types if available). - 29:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 30:./Middlewares/Third_Party/Lora/Crypto/aes.c **** The combination of mix columns and byte substitution used here is based on - 31:./Middlewares/Third_Party/Lora/Crypto/aes.c **** that developed by Karl Malbrain. His contribution is acknowledged. - 32:./Middlewares/Third_Party/Lora/Crypto/aes.c **** */ - 33:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 34:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* define if you have a fast memcpy function on your system */ - ARM GAS /tmp/ccJ0d890.s page 2 - - - 35:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if 0 - 36:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # define HAVE_MEMCPY - 37:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # include - 38:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # if defined( _MSC_VER ) - 39:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # include - 40:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # pragma intrinsic( memcpy ) - 41:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # endif - 42:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 43:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 44:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 45:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #include - 46:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #include - 47:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 48:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* define if you have fast 32-bit types on your system */ - 49:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if 0 - 50:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # define HAVE_UINT_32T - 51:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 52:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 53:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* define if you don't want any tables */ - 54:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if 1 - 55:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # define USE_TABLES - 56:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 57:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 58:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* On Intel Core 2 duo VERSION_1 is faster */ - 59:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 60:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* alternative versions (test for performance on your system) */ - 61:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if 1 - 62:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # define VERSION_1 - 63:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 64:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 65:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #include "aes.h" - 66:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 67:./Middlewares/Third_Party/Lora/Crypto/aes.c **** //#if defined( HAVE_UINT_32T ) - 68:./Middlewares/Third_Party/Lora/Crypto/aes.c **** // typedef unsigned long uint32_t; - 69:./Middlewares/Third_Party/Lora/Crypto/aes.c **** //#endif - 70:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 71:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* functions for finite field multiplication in the AES Galois field */ - 72:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 73:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define WPOLY 0x011b - 74:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define BPOLY 0x1b - 75:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define DPOLY 0x008d - 76:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 77:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define f1(x) (x) - 78:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define f2(x) ((x << 1) ^ (((x >> 7) & 1) * WPOLY)) - 79:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define f4(x) ((x << 2) ^ (((x >> 6) & 1) * WPOLY) ^ (((x >> 6) & 2) * WPOLY)) - 80:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define f8(x) ((x << 3) ^ (((x >> 5) & 1) * WPOLY) ^ (((x >> 5) & 2) * WPOLY) \ - 81:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ^ (((x >> 5) & 4) * WPOLY)) - 82:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define d2(x) (((x) >> 1) ^ ((x) & 1 ? DPOLY : 0)) - 83:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 84:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define f3(x) (f2(x) ^ x) - 85:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define f9(x) (f8(x) ^ x) - 86:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define fb(x) (f8(x) ^ f2(x) ^ x) - 87:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define fd(x) (f8(x) ^ f4(x) ^ x) - 88:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define fe(x) (f8(x) ^ f4(x) ^ f2(x)) - 89:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 90:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( USE_TABLES ) - 91:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - ARM GAS /tmp/ccJ0d890.s page 3 - - - 92:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define sb_data(w) { /* S Box data values */ \ - 93:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x63), w(0x7c), w(0x77), w(0x7b), w(0xf2), w(0x6b), w(0x6f), w(0xc5),\ - 94:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x30), w(0x01), w(0x67), w(0x2b), w(0xfe), w(0xd7), w(0xab), w(0x76),\ - 95:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xca), w(0x82), w(0xc9), w(0x7d), w(0xfa), w(0x59), w(0x47), w(0xf0),\ - 96:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xad), w(0xd4), w(0xa2), w(0xaf), w(0x9c), w(0xa4), w(0x72), w(0xc0),\ - 97:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xb7), w(0xfd), w(0x93), w(0x26), w(0x36), w(0x3f), w(0xf7), w(0xcc),\ - 98:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x34), w(0xa5), w(0xe5), w(0xf1), w(0x71), w(0xd8), w(0x31), w(0x15),\ - 99:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x04), w(0xc7), w(0x23), w(0xc3), w(0x18), w(0x96), w(0x05), w(0x9a),\ - 100:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x07), w(0x12), w(0x80), w(0xe2), w(0xeb), w(0x27), w(0xb2), w(0x75),\ - 101:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x09), w(0x83), w(0x2c), w(0x1a), w(0x1b), w(0x6e), w(0x5a), w(0xa0),\ - 102:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x52), w(0x3b), w(0xd6), w(0xb3), w(0x29), w(0xe3), w(0x2f), w(0x84),\ - 103:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x53), w(0xd1), w(0x00), w(0xed), w(0x20), w(0xfc), w(0xb1), w(0x5b),\ - 104:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x6a), w(0xcb), w(0xbe), w(0x39), w(0x4a), w(0x4c), w(0x58), w(0xcf),\ - 105:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xd0), w(0xef), w(0xaa), w(0xfb), w(0x43), w(0x4d), w(0x33), w(0x85),\ - 106:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x45), w(0xf9), w(0x02), w(0x7f), w(0x50), w(0x3c), w(0x9f), w(0xa8),\ - 107:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x51), w(0xa3), w(0x40), w(0x8f), w(0x92), w(0x9d), w(0x38), w(0xf5),\ - 108:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xbc), w(0xb6), w(0xda), w(0x21), w(0x10), w(0xff), w(0xf3), w(0xd2),\ - 109:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xcd), w(0x0c), w(0x13), w(0xec), w(0x5f), w(0x97), w(0x44), w(0x17),\ - 110:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xc4), w(0xa7), w(0x7e), w(0x3d), w(0x64), w(0x5d), w(0x19), w(0x73),\ - 111:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x60), w(0x81), w(0x4f), w(0xdc), w(0x22), w(0x2a), w(0x90), w(0x88),\ - 112:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x46), w(0xee), w(0xb8), w(0x14), w(0xde), w(0x5e), w(0x0b), w(0xdb),\ - 113:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xe0), w(0x32), w(0x3a), w(0x0a), w(0x49), w(0x06), w(0x24), w(0x5c),\ - 114:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xc2), w(0xd3), w(0xac), w(0x62), w(0x91), w(0x95), w(0xe4), w(0x79),\ - 115:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xe7), w(0xc8), w(0x37), w(0x6d), w(0x8d), w(0xd5), w(0x4e), w(0xa9),\ - 116:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x6c), w(0x56), w(0xf4), w(0xea), w(0x65), w(0x7a), w(0xae), w(0x08),\ - 117:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xba), w(0x78), w(0x25), w(0x2e), w(0x1c), w(0xa6), w(0xb4), w(0xc6),\ - 118:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xe8), w(0xdd), w(0x74), w(0x1f), w(0x4b), w(0xbd), w(0x8b), w(0x8a),\ - 119:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x70), w(0x3e), w(0xb5), w(0x66), w(0x48), w(0x03), w(0xf6), w(0x0e),\ - 120:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x61), w(0x35), w(0x57), w(0xb9), w(0x86), w(0xc1), w(0x1d), w(0x9e),\ - 121:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xe1), w(0xf8), w(0x98), w(0x11), w(0x69), w(0xd9), w(0x8e), w(0x94),\ - 122:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x9b), w(0x1e), w(0x87), w(0xe9), w(0xce), w(0x55), w(0x28), w(0xdf),\ - 123:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x8c), w(0xa1), w(0x89), w(0x0d), w(0xbf), w(0xe6), w(0x42), w(0x68),\ - 124:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x41), w(0x99), w(0x2d), w(0x0f), w(0xb0), w(0x54), w(0xbb), w(0x16) } - 125:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 126:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define isb_data(w) { /* inverse S Box data values */ \ - 127:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x52), w(0x09), w(0x6a), w(0xd5), w(0x30), w(0x36), w(0xa5), w(0x38),\ - 128:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xbf), w(0x40), w(0xa3), w(0x9e), w(0x81), w(0xf3), w(0xd7), w(0xfb),\ - 129:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x7c), w(0xe3), w(0x39), w(0x82), w(0x9b), w(0x2f), w(0xff), w(0x87),\ - 130:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x34), w(0x8e), w(0x43), w(0x44), w(0xc4), w(0xde), w(0xe9), w(0xcb),\ - 131:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x54), w(0x7b), w(0x94), w(0x32), w(0xa6), w(0xc2), w(0x23), w(0x3d),\ - 132:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xee), w(0x4c), w(0x95), w(0x0b), w(0x42), w(0xfa), w(0xc3), w(0x4e),\ - 133:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x08), w(0x2e), w(0xa1), w(0x66), w(0x28), w(0xd9), w(0x24), w(0xb2),\ - 134:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x76), w(0x5b), w(0xa2), w(0x49), w(0x6d), w(0x8b), w(0xd1), w(0x25),\ - 135:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x72), w(0xf8), w(0xf6), w(0x64), w(0x86), w(0x68), w(0x98), w(0x16),\ - 136:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xd4), w(0xa4), w(0x5c), w(0xcc), w(0x5d), w(0x65), w(0xb6), w(0x92),\ - 137:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x6c), w(0x70), w(0x48), w(0x50), w(0xfd), w(0xed), w(0xb9), w(0xda),\ - 138:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x5e), w(0x15), w(0x46), w(0x57), w(0xa7), w(0x8d), w(0x9d), w(0x84),\ - 139:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x90), w(0xd8), w(0xab), w(0x00), w(0x8c), w(0xbc), w(0xd3), w(0x0a),\ - 140:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xf7), w(0xe4), w(0x58), w(0x05), w(0xb8), w(0xb3), w(0x45), w(0x06),\ - 141:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xd0), w(0x2c), w(0x1e), w(0x8f), w(0xca), w(0x3f), w(0x0f), w(0x02),\ - 142:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xc1), w(0xaf), w(0xbd), w(0x03), w(0x01), w(0x13), w(0x8a), w(0x6b),\ - 143:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x3a), w(0x91), w(0x11), w(0x41), w(0x4f), w(0x67), w(0xdc), w(0xea),\ - 144:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x97), w(0xf2), w(0xcf), w(0xce), w(0xf0), w(0xb4), w(0xe6), w(0x73),\ - 145:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x96), w(0xac), w(0x74), w(0x22), w(0xe7), w(0xad), w(0x35), w(0x85),\ - 146:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xe2), w(0xf9), w(0x37), w(0xe8), w(0x1c), w(0x75), w(0xdf), w(0x6e),\ - 147:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x47), w(0xf1), w(0x1a), w(0x71), w(0x1d), w(0x29), w(0xc5), w(0x89),\ - 148:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x6f), w(0xb7), w(0x62), w(0x0e), w(0xaa), w(0x18), w(0xbe), w(0x1b),\ - ARM GAS /tmp/ccJ0d890.s page 4 - - - 149:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xfc), w(0x56), w(0x3e), w(0x4b), w(0xc6), w(0xd2), w(0x79), w(0x20),\ - 150:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x9a), w(0xdb), w(0xc0), w(0xfe), w(0x78), w(0xcd), w(0x5a), w(0xf4),\ - 151:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x1f), w(0xdd), w(0xa8), w(0x33), w(0x88), w(0x07), w(0xc7), w(0x31),\ - 152:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xb1), w(0x12), w(0x10), w(0x59), w(0x27), w(0x80), w(0xec), w(0x5f),\ - 153:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x60), w(0x51), w(0x7f), w(0xa9), w(0x19), w(0xb5), w(0x4a), w(0x0d),\ - 154:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x2d), w(0xe5), w(0x7a), w(0x9f), w(0x93), w(0xc9), w(0x9c), w(0xef),\ - 155:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xa0), w(0xe0), w(0x3b), w(0x4d), w(0xae), w(0x2a), w(0xf5), w(0xb0),\ - 156:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xc8), w(0xeb), w(0xbb), w(0x3c), w(0x83), w(0x53), w(0x99), w(0x61),\ - 157:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x17), w(0x2b), w(0x04), w(0x7e), w(0xba), w(0x77), w(0xd6), w(0x26),\ - 158:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xe1), w(0x69), w(0x14), w(0x63), w(0x55), w(0x21), w(0x0c), w(0x7d) } - 159:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 160:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define mm_data(w) { /* basic data for forming finite field tables */ \ - 161:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x00), w(0x01), w(0x02), w(0x03), w(0x04), w(0x05), w(0x06), w(0x07),\ - 162:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x08), w(0x09), w(0x0a), w(0x0b), w(0x0c), w(0x0d), w(0x0e), w(0x0f),\ - 163:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x10), w(0x11), w(0x12), w(0x13), w(0x14), w(0x15), w(0x16), w(0x17),\ - 164:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x18), w(0x19), w(0x1a), w(0x1b), w(0x1c), w(0x1d), w(0x1e), w(0x1f),\ - 165:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x20), w(0x21), w(0x22), w(0x23), w(0x24), w(0x25), w(0x26), w(0x27),\ - 166:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x28), w(0x29), w(0x2a), w(0x2b), w(0x2c), w(0x2d), w(0x2e), w(0x2f),\ - 167:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x30), w(0x31), w(0x32), w(0x33), w(0x34), w(0x35), w(0x36), w(0x37),\ - 168:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x38), w(0x39), w(0x3a), w(0x3b), w(0x3c), w(0x3d), w(0x3e), w(0x3f),\ - 169:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x40), w(0x41), w(0x42), w(0x43), w(0x44), w(0x45), w(0x46), w(0x47),\ - 170:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x48), w(0x49), w(0x4a), w(0x4b), w(0x4c), w(0x4d), w(0x4e), w(0x4f),\ - 171:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x50), w(0x51), w(0x52), w(0x53), w(0x54), w(0x55), w(0x56), w(0x57),\ - 172:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x58), w(0x59), w(0x5a), w(0x5b), w(0x5c), w(0x5d), w(0x5e), w(0x5f),\ - 173:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x60), w(0x61), w(0x62), w(0x63), w(0x64), w(0x65), w(0x66), w(0x67),\ - 174:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x68), w(0x69), w(0x6a), w(0x6b), w(0x6c), w(0x6d), w(0x6e), w(0x6f),\ - 175:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x70), w(0x71), w(0x72), w(0x73), w(0x74), w(0x75), w(0x76), w(0x77),\ - 176:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x78), w(0x79), w(0x7a), w(0x7b), w(0x7c), w(0x7d), w(0x7e), w(0x7f),\ - 177:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x80), w(0x81), w(0x82), w(0x83), w(0x84), w(0x85), w(0x86), w(0x87),\ - 178:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x88), w(0x89), w(0x8a), w(0x8b), w(0x8c), w(0x8d), w(0x8e), w(0x8f),\ - 179:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x90), w(0x91), w(0x92), w(0x93), w(0x94), w(0x95), w(0x96), w(0x97),\ - 180:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0x98), w(0x99), w(0x9a), w(0x9b), w(0x9c), w(0x9d), w(0x9e), w(0x9f),\ - 181:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xa0), w(0xa1), w(0xa2), w(0xa3), w(0xa4), w(0xa5), w(0xa6), w(0xa7),\ - 182:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xa8), w(0xa9), w(0xaa), w(0xab), w(0xac), w(0xad), w(0xae), w(0xaf),\ - 183:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xb0), w(0xb1), w(0xb2), w(0xb3), w(0xb4), w(0xb5), w(0xb6), w(0xb7),\ - 184:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xb8), w(0xb9), w(0xba), w(0xbb), w(0xbc), w(0xbd), w(0xbe), w(0xbf),\ - 185:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xc0), w(0xc1), w(0xc2), w(0xc3), w(0xc4), w(0xc5), w(0xc6), w(0xc7),\ - 186:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xc8), w(0xc9), w(0xca), w(0xcb), w(0xcc), w(0xcd), w(0xce), w(0xcf),\ - 187:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xd0), w(0xd1), w(0xd2), w(0xd3), w(0xd4), w(0xd5), w(0xd6), w(0xd7),\ - 188:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xd8), w(0xd9), w(0xda), w(0xdb), w(0xdc), w(0xdd), w(0xde), w(0xdf),\ - 189:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xe0), w(0xe1), w(0xe2), w(0xe3), w(0xe4), w(0xe5), w(0xe6), w(0xe7),\ - 190:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xe8), w(0xe9), w(0xea), w(0xeb), w(0xec), w(0xed), w(0xee), w(0xef),\ - 191:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xf0), w(0xf1), w(0xf2), w(0xf3), w(0xf4), w(0xf5), w(0xf6), w(0xf7),\ - 192:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w(0xf8), w(0xf9), w(0xfa), w(0xfb), w(0xfc), w(0xfd), w(0xfe), w(0xff) } - 193:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 194:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static const uint8_t sbox[256] = sb_data(f1); - 195:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 196:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( AES_DEC_PREKEYED ) - 197:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static const uint8_t isbox[256] = isb_data(f1); - 198:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 199:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 200:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static const uint8_t gfm2_sbox[256] = sb_data(f2); - 201:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static const uint8_t gfm3_sbox[256] = sb_data(f3); - 202:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 203:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( AES_DEC_PREKEYED ) - 204:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static const uint8_t gfmul_9[256] = mm_data(f9); - 205:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static const uint8_t gfmul_b[256] = mm_data(fb); - ARM GAS /tmp/ccJ0d890.s page 5 - - - 206:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static const uint8_t gfmul_d[256] = mm_data(fd); - 207:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static const uint8_t gfmul_e[256] = mm_data(fe); - 208:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 209:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 210:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define s_box(x) sbox[(x)] - 211:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( AES_DEC_PREKEYED ) - 212:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define is_box(x) isbox[(x)] - 213:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 214:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm2_sb(x) gfm2_sbox[(x)] - 215:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm3_sb(x) gfm3_sbox[(x)] - 216:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( AES_DEC_PREKEYED ) - 217:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm_9(x) gfmul_9[(x)] - 218:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm_b(x) gfmul_b[(x)] - 219:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm_d(x) gfmul_d[(x)] - 220:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm_e(x) gfmul_e[(x)] - 221:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 222:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 223:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 224:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* this is the high bit of x right shifted by 1 */ - 225:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* position. Since the starting polynomial has */ - 226:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* 9 bits (0x11b), this right shift keeps the */ - 227:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* values of all top bits within a byte */ - 228:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 229:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static uint8_t hibit(const uint8_t x) - 230:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t r = (uint8_t)((x >> 1) | (x >> 2)); - 231:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 232:./Middlewares/Third_Party/Lora/Crypto/aes.c **** r |= (r >> 2); - 233:./Middlewares/Third_Party/Lora/Crypto/aes.c **** r |= (r >> 4); - 234:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return (r + 1) >> 1; - 235:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 236:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 237:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* return the inverse of the finite field element x */ - 238:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 239:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static uint8_t gf_inv(const uint8_t x) - 240:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t p1 = x, p2 = BPOLY, n1 = hibit(x), n2 = 0x80, v1 = 1, v2 = 0; - 241:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 242:./Middlewares/Third_Party/Lora/Crypto/aes.c **** if(x < 2) - 243:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return x; - 244:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 245:./Middlewares/Third_Party/Lora/Crypto/aes.c **** for( ; ; ) - 246:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 247:./Middlewares/Third_Party/Lora/Crypto/aes.c **** if(n1) - 248:./Middlewares/Third_Party/Lora/Crypto/aes.c **** while(n2 >= n1) /* divide polynomial p2 by p1 */ - 249:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 250:./Middlewares/Third_Party/Lora/Crypto/aes.c **** n2 /= n1; /* shift smaller polynomial left */ - 251:./Middlewares/Third_Party/Lora/Crypto/aes.c **** p2 ^= (p1 * n2) & 0xff; /* and remove from larger one */ - 252:./Middlewares/Third_Party/Lora/Crypto/aes.c **** v2 ^= (v1 * n2); /* shift accumulated value and */ - 253:./Middlewares/Third_Party/Lora/Crypto/aes.c **** n2 = hibit(p2); /* add into result */ - 254:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 255:./Middlewares/Third_Party/Lora/Crypto/aes.c **** else - 256:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return v1; - 257:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 258:./Middlewares/Third_Party/Lora/Crypto/aes.c **** if(n2) /* repeat with values swapped */ - 259:./Middlewares/Third_Party/Lora/Crypto/aes.c **** while(n1 >= n2) - 260:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 261:./Middlewares/Third_Party/Lora/Crypto/aes.c **** n1 /= n2; - 262:./Middlewares/Third_Party/Lora/Crypto/aes.c **** p1 ^= p2 * n1; - ARM GAS /tmp/ccJ0d890.s page 6 - - - 263:./Middlewares/Third_Party/Lora/Crypto/aes.c **** v1 ^= v2 * n1; - 264:./Middlewares/Third_Party/Lora/Crypto/aes.c **** n1 = hibit(p1); - 265:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 266:./Middlewares/Third_Party/Lora/Crypto/aes.c **** else - 267:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return v2; - 268:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 269:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 270:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 271:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* The forward and inverse affine transformations used in the S-box */ - 272:./Middlewares/Third_Party/Lora/Crypto/aes.c **** uint8_t fwd_affine(const uint8_t x) - 273:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 274:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( HAVE_UINT_32T ) - 275:./Middlewares/Third_Party/Lora/Crypto/aes.c **** uint32_t w = x; - 276:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w ^= (w << 1) ^ (w << 2) ^ (w << 3) ^ (w << 4); - 277:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return 0x63 ^ ((w ^ (w >> 8)) & 0xff); - 278:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 279:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return 0x63 ^ x ^ (x << 1) ^ (x << 2) ^ (x << 3) ^ (x << 4) - 280:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ^ (x >> 7) ^ (x >> 6) ^ (x >> 5) ^ (x >> 4); - 281:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 282:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 283:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 284:./Middlewares/Third_Party/Lora/Crypto/aes.c **** uint8_t inv_affine(const uint8_t x) - 285:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 286:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( HAVE_UINT_32T ) - 287:./Middlewares/Third_Party/Lora/Crypto/aes.c **** uint32_t w = x; - 288:./Middlewares/Third_Party/Lora/Crypto/aes.c **** w = (w << 1) ^ (w << 3) ^ (w << 6); - 289:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return 0x05 ^ ((w ^ (w >> 8)) & 0xff); - 290:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 291:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return 0x05 ^ (x << 1) ^ (x << 3) ^ (x << 6) - 292:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ^ (x >> 7) ^ (x >> 5) ^ (x >> 2); - 293:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 294:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 295:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 296:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define s_box(x) fwd_affine(gf_inv(x)) - 297:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define is_box(x) gf_inv(inv_affine(x)) - 298:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm2_sb(x) f2(s_box(x)) - 299:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm3_sb(x) f3(s_box(x)) - 300:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm_9(x) f9(x) - 301:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm_b(x) fb(x) - 302:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm_d(x) fd(x) - 303:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #define gfm_e(x) fe(x) - 304:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 305:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 306:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 307:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( HAVE_MEMCPY ) - 308:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # define block_copy_nn(d, s, l) memcpy(d, s, l) - 309:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # define block_copy(d, s) memcpy(d, s, N_BLOCK) - 310:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 311:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # define block_copy_nn(d, s, l) copy_block_nn(d, s, l) - 312:./Middlewares/Third_Party/Lora/Crypto/aes.c **** # define block_copy(d, s) copy_block(d, s) - 313:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 314:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 315:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void copy_block( void *d, const void *s ) - 316:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 317:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( HAVE_UINT_32T ) - 318:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 0] = ((uint32_t*)s)[ 0]; - 319:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 1] = ((uint32_t*)s)[ 1]; - ARM GAS /tmp/ccJ0d890.s page 7 - - - 320:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 2] = ((uint32_t*)s)[ 2]; - 321:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 3] = ((uint32_t*)s)[ 3]; - 322:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 323:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 0] = ((uint8_t*)s)[ 0]; - 324:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 1] = ((uint8_t*)s)[ 1]; - 325:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 2] = ((uint8_t*)s)[ 2]; - 326:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 3] = ((uint8_t*)s)[ 3]; - 327:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 4] = ((uint8_t*)s)[ 4]; - 328:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 5] = ((uint8_t*)s)[ 5]; - 329:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 6] = ((uint8_t*)s)[ 6]; - 330:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 7] = ((uint8_t*)s)[ 7]; - 331:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 8] = ((uint8_t*)s)[ 8]; - 332:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 9] = ((uint8_t*)s)[ 9]; - 333:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[10] = ((uint8_t*)s)[10]; - 334:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[11] = ((uint8_t*)s)[11]; - 335:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[12] = ((uint8_t*)s)[12]; - 336:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[13] = ((uint8_t*)s)[13]; - 337:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[14] = ((uint8_t*)s)[14]; - 338:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[15] = ((uint8_t*)s)[15]; - 339:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 340:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 341:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 342:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void copy_block_nn( uint8_t * d, const uint8_t *s, uint8_t nn ) - 343:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 344:./Middlewares/Third_Party/Lora/Crypto/aes.c **** while( nn-- ) - 345:./Middlewares/Third_Party/Lora/Crypto/aes.c **** //*((uint8_t*)d)++ = *((uint8_t*)s)++; - 346:./Middlewares/Third_Party/Lora/Crypto/aes.c **** *d++ = *s++; - 347:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 348:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 349:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void xor_block( void *d, const void *s ) - 350:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 25 .loc 1 350 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 @ link register save eliminated. - 30 .LVL0: - 351:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( HAVE_UINT_32T ) - 352:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 0] ^= ((uint32_t*)s)[ 0]; - 353:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 1] ^= ((uint32_t*)s)[ 1]; - 354:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 2] ^= ((uint32_t*)s)[ 2]; - 355:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 3] ^= ((uint32_t*)s)[ 3]; - 356:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 357:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 0] ^= ((uint8_t*)s)[ 0]; - 31 .loc 1 357 0 - 32 0000 0B78 ldrb r3, [r1] - 33 0002 0278 ldrb r2, [r0] - 34 0004 5340 eors r3, r2 - 35 0006 0370 strb r3, [r0] - 358:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 1] ^= ((uint8_t*)s)[ 1]; - 36 .loc 1 358 0 - 37 0008 4B78 ldrb r3, [r1, #1] - 38 000a 4278 ldrb r2, [r0, #1] - 39 000c 5340 eors r3, r2 - 40 000e 4370 strb r3, [r0, #1] - 359:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 2] ^= ((uint8_t*)s)[ 2]; - 41 .loc 1 359 0 - ARM GAS /tmp/ccJ0d890.s page 8 - - - 42 0010 8B78 ldrb r3, [r1, #2] - 43 0012 8278 ldrb r2, [r0, #2] - 44 0014 5340 eors r3, r2 - 45 0016 8370 strb r3, [r0, #2] - 360:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 3] ^= ((uint8_t*)s)[ 3]; - 46 .loc 1 360 0 - 47 0018 CB78 ldrb r3, [r1, #3] - 48 001a C278 ldrb r2, [r0, #3] - 49 001c 5340 eors r3, r2 - 50 001e C370 strb r3, [r0, #3] - 361:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 4] ^= ((uint8_t*)s)[ 4]; - 51 .loc 1 361 0 - 52 0020 0B79 ldrb r3, [r1, #4] - 53 0022 0279 ldrb r2, [r0, #4] - 54 0024 5340 eors r3, r2 - 55 0026 0371 strb r3, [r0, #4] - 362:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 5] ^= ((uint8_t*)s)[ 5]; - 56 .loc 1 362 0 - 57 0028 4B79 ldrb r3, [r1, #5] - 58 002a 4279 ldrb r2, [r0, #5] - 59 002c 5340 eors r3, r2 - 60 002e 4371 strb r3, [r0, #5] - 363:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 6] ^= ((uint8_t*)s)[ 6]; - 61 .loc 1 363 0 - 62 0030 8B79 ldrb r3, [r1, #6] - 63 0032 8279 ldrb r2, [r0, #6] - 64 0034 5340 eors r3, r2 - 65 0036 8371 strb r3, [r0, #6] - 364:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 7] ^= ((uint8_t*)s)[ 7]; - 66 .loc 1 364 0 - 67 0038 CB79 ldrb r3, [r1, #7] - 68 003a C279 ldrb r2, [r0, #7] - 69 003c 5340 eors r3, r2 - 70 003e C371 strb r3, [r0, #7] - 365:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 8] ^= ((uint8_t*)s)[ 8]; - 71 .loc 1 365 0 - 72 0040 0B7A ldrb r3, [r1, #8] - 73 0042 027A ldrb r2, [r0, #8] - 74 0044 5340 eors r3, r2 - 75 0046 0372 strb r3, [r0, #8] - 366:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 9] ^= ((uint8_t*)s)[ 9]; - 76 .loc 1 366 0 - 77 0048 4B7A ldrb r3, [r1, #9] - 78 004a 427A ldrb r2, [r0, #9] - 79 004c 5340 eors r3, r2 - 80 004e 4372 strb r3, [r0, #9] - 367:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[10] ^= ((uint8_t*)s)[10]; - 81 .loc 1 367 0 - 82 0050 8B7A ldrb r3, [r1, #10] - 83 0052 827A ldrb r2, [r0, #10] - 84 0054 5340 eors r3, r2 - 85 0056 8372 strb r3, [r0, #10] - 368:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[11] ^= ((uint8_t*)s)[11]; - 86 .loc 1 368 0 - 87 0058 CB7A ldrb r3, [r1, #11] - 88 005a C27A ldrb r2, [r0, #11] - 89 005c 5340 eors r3, r2 - ARM GAS /tmp/ccJ0d890.s page 9 - - - 90 005e C372 strb r3, [r0, #11] - 369:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[12] ^= ((uint8_t*)s)[12]; - 91 .loc 1 369 0 - 92 0060 0B7B ldrb r3, [r1, #12] - 93 0062 027B ldrb r2, [r0, #12] - 94 0064 5340 eors r3, r2 - 95 0066 0373 strb r3, [r0, #12] - 370:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[13] ^= ((uint8_t*)s)[13]; - 96 .loc 1 370 0 - 97 0068 4B7B ldrb r3, [r1, #13] - 98 006a 427B ldrb r2, [r0, #13] - 99 006c 5340 eors r3, r2 - 100 006e 4373 strb r3, [r0, #13] - 371:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[14] ^= ((uint8_t*)s)[14]; - 101 .loc 1 371 0 - 102 0070 8B7B ldrb r3, [r1, #14] - 103 0072 827B ldrb r2, [r0, #14] - 104 0074 5340 eors r3, r2 - 105 0076 8373 strb r3, [r0, #14] - 372:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[15] ^= ((uint8_t*)s)[15]; - 106 .loc 1 372 0 - 107 0078 CB7B ldrb r3, [r1, #15] - 108 007a C27B ldrb r2, [r0, #15] - 109 007c 5340 eors r3, r2 - 110 007e C373 strb r3, [r0, #15] - 373:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 374:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 111 .loc 1 374 0 - 112 @ sp needed - 113 0080 7047 bx lr - 114 .cfi_endproc - 115 .LFE2: - 117 .section .text.copy_and_key,"ax",%progbits - 118 .align 1 - 119 .syntax unified - 120 .code 16 - 121 .thumb_func - 122 .fpu softvfp - 124 copy_and_key: - 125 .LFB3: - 375:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 376:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void copy_and_key( void *d, const void *s, const void *k ) - 377:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 126 .loc 1 377 0 - 127 .cfi_startproc - 128 @ args = 0, pretend = 0, frame = 0 - 129 @ frame_needed = 0, uses_anonymous_args = 0 - 130 .LVL1: - 131 0000 10B5 push {r4, lr} - 132 .LCFI0: - 133 .cfi_def_cfa_offset 8 - 134 .cfi_offset 4, -8 - 135 .cfi_offset 14, -4 - 378:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( HAVE_UINT_32T ) - 379:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 0] = ((uint32_t*)s)[ 0] ^ ((uint32_t*)k)[ 0]; - 380:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 1] = ((uint32_t*)s)[ 1] ^ ((uint32_t*)k)[ 1]; - 381:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 2] = ((uint32_t*)s)[ 2] ^ ((uint32_t*)k)[ 2]; - ARM GAS /tmp/ccJ0d890.s page 10 - - - 382:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint32_t*)d)[ 3] = ((uint32_t*)s)[ 3] ^ ((uint32_t*)k)[ 3]; - 383:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #elif 1 - 384:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 0] = ((uint8_t*)s)[ 0] ^ ((uint8_t*)k)[ 0]; - 136 .loc 1 384 0 - 137 0002 0B78 ldrb r3, [r1] - 138 0004 1478 ldrb r4, [r2] - 139 0006 6340 eors r3, r4 - 140 0008 0370 strb r3, [r0] - 385:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 1] = ((uint8_t*)s)[ 1] ^ ((uint8_t*)k)[ 1]; - 141 .loc 1 385 0 - 142 000a 4B78 ldrb r3, [r1, #1] - 143 000c 5478 ldrb r4, [r2, #1] - 144 000e 6340 eors r3, r4 - 145 0010 4370 strb r3, [r0, #1] - 386:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 2] = ((uint8_t*)s)[ 2] ^ ((uint8_t*)k)[ 2]; - 146 .loc 1 386 0 - 147 0012 8B78 ldrb r3, [r1, #2] - 148 0014 9478 ldrb r4, [r2, #2] - 149 0016 6340 eors r3, r4 - 150 0018 8370 strb r3, [r0, #2] - 387:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 3] = ((uint8_t*)s)[ 3] ^ ((uint8_t*)k)[ 3]; - 151 .loc 1 387 0 - 152 001a CB78 ldrb r3, [r1, #3] - 153 001c D478 ldrb r4, [r2, #3] - 154 001e 6340 eors r3, r4 - 155 0020 C370 strb r3, [r0, #3] - 388:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 4] = ((uint8_t*)s)[ 4] ^ ((uint8_t*)k)[ 4]; - 156 .loc 1 388 0 - 157 0022 0B79 ldrb r3, [r1, #4] - 158 0024 1479 ldrb r4, [r2, #4] - 159 0026 6340 eors r3, r4 - 160 0028 0371 strb r3, [r0, #4] - 389:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 5] = ((uint8_t*)s)[ 5] ^ ((uint8_t*)k)[ 5]; - 161 .loc 1 389 0 - 162 002a 4B79 ldrb r3, [r1, #5] - 163 002c 5479 ldrb r4, [r2, #5] - 164 002e 6340 eors r3, r4 - 165 0030 4371 strb r3, [r0, #5] - 390:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 6] = ((uint8_t*)s)[ 6] ^ ((uint8_t*)k)[ 6]; - 166 .loc 1 390 0 - 167 0032 8B79 ldrb r3, [r1, #6] - 168 0034 9479 ldrb r4, [r2, #6] - 169 0036 6340 eors r3, r4 - 170 0038 8371 strb r3, [r0, #6] - 391:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 7] = ((uint8_t*)s)[ 7] ^ ((uint8_t*)k)[ 7]; - 171 .loc 1 391 0 - 172 003a CB79 ldrb r3, [r1, #7] - 173 003c D479 ldrb r4, [r2, #7] - 174 003e 6340 eors r3, r4 - 175 0040 C371 strb r3, [r0, #7] - 392:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 8] = ((uint8_t*)s)[ 8] ^ ((uint8_t*)k)[ 8]; - 176 .loc 1 392 0 - 177 0042 0B7A ldrb r3, [r1, #8] - 178 0044 147A ldrb r4, [r2, #8] - 179 0046 6340 eors r3, r4 - 180 0048 0372 strb r3, [r0, #8] - 393:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 9] = ((uint8_t*)s)[ 9] ^ ((uint8_t*)k)[ 9]; - ARM GAS /tmp/ccJ0d890.s page 11 - - - 181 .loc 1 393 0 - 182 004a 4B7A ldrb r3, [r1, #9] - 183 004c 547A ldrb r4, [r2, #9] - 184 004e 6340 eors r3, r4 - 185 0050 4372 strb r3, [r0, #9] - 394:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[10] = ((uint8_t*)s)[10] ^ ((uint8_t*)k)[10]; - 186 .loc 1 394 0 - 187 0052 8B7A ldrb r3, [r1, #10] - 188 0054 947A ldrb r4, [r2, #10] - 189 0056 6340 eors r3, r4 - 190 0058 8372 strb r3, [r0, #10] - 395:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[11] = ((uint8_t*)s)[11] ^ ((uint8_t*)k)[11]; - 191 .loc 1 395 0 - 192 005a CB7A ldrb r3, [r1, #11] - 193 005c D47A ldrb r4, [r2, #11] - 194 005e 6340 eors r3, r4 - 195 0060 C372 strb r3, [r0, #11] - 396:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[12] = ((uint8_t*)s)[12] ^ ((uint8_t*)k)[12]; - 196 .loc 1 396 0 - 197 0062 0B7B ldrb r3, [r1, #12] - 198 0064 147B ldrb r4, [r2, #12] - 199 0066 6340 eors r3, r4 - 200 0068 0373 strb r3, [r0, #12] - 397:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[13] = ((uint8_t*)s)[13] ^ ((uint8_t*)k)[13]; - 201 .loc 1 397 0 - 202 006a 4B7B ldrb r3, [r1, #13] - 203 006c 547B ldrb r4, [r2, #13] - 204 006e 6340 eors r3, r4 - 205 0070 4373 strb r3, [r0, #13] - 398:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[14] = ((uint8_t*)s)[14] ^ ((uint8_t*)k)[14]; - 206 .loc 1 398 0 - 207 0072 8B7B ldrb r3, [r1, #14] - 208 0074 947B ldrb r4, [r2, #14] - 209 0076 6340 eors r3, r4 - 210 0078 8373 strb r3, [r0, #14] - 399:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[15] = ((uint8_t*)s)[15] ^ ((uint8_t*)k)[15]; - 211 .loc 1 399 0 - 212 007a CB7B ldrb r3, [r1, #15] - 213 007c D27B ldrb r2, [r2, #15] - 214 .LVL2: - 215 007e 5340 eors r3, r2 - 216 0080 C373 strb r3, [r0, #15] - 400:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 401:./Middlewares/Third_Party/Lora/Crypto/aes.c **** block_copy(d, s); - 402:./Middlewares/Third_Party/Lora/Crypto/aes.c **** xor_block(d, k); - 403:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 404:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 217 .loc 1 404 0 - 218 @ sp needed - 219 0082 10BD pop {r4, pc} - 220 .cfi_endproc - 221 .LFE3: - 223 .global __aeabi_uidivmod - 224 .section .text.aes_set_key,"ax",%progbits - 225 .align 1 - 226 .global aes_set_key - 227 .syntax unified - ARM GAS /tmp/ccJ0d890.s page 12 - - - 228 .code 16 - 229 .thumb_func - 230 .fpu softvfp - 232 aes_set_key: - 233 .LFB7: - 405:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 406:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void add_round_key( uint8_t d[N_BLOCK], const uint8_t k[N_BLOCK] ) - 407:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 408:./Middlewares/Third_Party/Lora/Crypto/aes.c **** xor_block(d, k); - 409:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 410:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 411:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void shift_sub_rows( uint8_t st[N_BLOCK] ) - 412:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t tt; - 413:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 414:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 0] = s_box(st[ 0]); st[ 4] = s_box(st[ 4]); - 415:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 8] = s_box(st[ 8]); st[12] = s_box(st[12]); - 416:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 417:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = st[1]; st[ 1] = s_box(st[ 5]); st[ 5] = s_box(st[ 9]); - 418:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 9] = s_box(st[13]); st[13] = s_box( tt ); - 419:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 420:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = st[2]; st[ 2] = s_box(st[10]); st[10] = s_box( tt ); - 421:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = st[6]; st[ 6] = s_box(st[14]); st[14] = s_box( tt ); - 422:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 423:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = st[15]; st[15] = s_box(st[11]); st[11] = s_box(st[ 7]); - 424:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 7] = s_box(st[ 3]); st[ 3] = s_box( tt ); - 425:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 426:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 427:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( AES_DEC_PREKEYED ) - 428:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 429:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void inv_shift_sub_rows( uint8_t st[N_BLOCK] ) - 430:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t tt; - 431:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 432:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 0] = is_box(st[ 0]); st[ 4] = is_box(st[ 4]); - 433:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 8] = is_box(st[ 8]); st[12] = is_box(st[12]); - 434:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 435:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = st[13]; st[13] = is_box(st[9]); st[ 9] = is_box(st[5]); - 436:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 5] = is_box(st[1]); st[ 1] = is_box( tt ); - 437:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 438:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = st[2]; st[ 2] = is_box(st[10]); st[10] = is_box( tt ); - 439:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = st[6]; st[ 6] = is_box(st[14]); st[14] = is_box( tt ); - 440:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 441:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = st[3]; st[ 3] = is_box(st[ 7]); st[ 7] = is_box(st[11]); - 442:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[11] = is_box(st[15]); st[15] = is_box( tt ); - 443:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 444:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 445:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 446:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 447:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( VERSION_1 ) - 448:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void mix_sub_columns( uint8_t dt[N_BLOCK] ) - 449:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t st[N_BLOCK]; - 450:./Middlewares/Third_Party/Lora/Crypto/aes.c **** block_copy(st, dt); - 451:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 452:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void mix_sub_columns( uint8_t dt[N_BLOCK], uint8_t st[N_BLOCK] ) - 453:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 454:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 455:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 0] = gfm2_sb(st[0]) ^ gfm3_sb(st[5]) ^ s_box(st[10]) ^ s_box(st[15]); - 456:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 1] = s_box(st[0]) ^ gfm2_sb(st[5]) ^ gfm3_sb(st[10]) ^ s_box(st[15]); - ARM GAS /tmp/ccJ0d890.s page 13 - - - 457:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 2] = s_box(st[0]) ^ s_box(st[5]) ^ gfm2_sb(st[10]) ^ gfm3_sb(st[15]); - 458:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 3] = gfm3_sb(st[0]) ^ s_box(st[5]) ^ s_box(st[10]) ^ gfm2_sb(st[15]); - 459:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 460:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 4] = gfm2_sb(st[4]) ^ gfm3_sb(st[9]) ^ s_box(st[14]) ^ s_box(st[3]); - 461:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 5] = s_box(st[4]) ^ gfm2_sb(st[9]) ^ gfm3_sb(st[14]) ^ s_box(st[3]); - 462:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 6] = s_box(st[4]) ^ s_box(st[9]) ^ gfm2_sb(st[14]) ^ gfm3_sb(st[3]); - 463:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 7] = gfm3_sb(st[4]) ^ s_box(st[9]) ^ s_box(st[14]) ^ gfm2_sb(st[3]); - 464:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 465:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 8] = gfm2_sb(st[8]) ^ gfm3_sb(st[13]) ^ s_box(st[2]) ^ s_box(st[7]); - 466:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 9] = s_box(st[8]) ^ gfm2_sb(st[13]) ^ gfm3_sb(st[2]) ^ s_box(st[7]); - 467:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[10] = s_box(st[8]) ^ s_box(st[13]) ^ gfm2_sb(st[2]) ^ gfm3_sb(st[7]); - 468:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[11] = gfm3_sb(st[8]) ^ s_box(st[13]) ^ s_box(st[2]) ^ gfm2_sb(st[7]); - 469:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 470:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[12] = gfm2_sb(st[12]) ^ gfm3_sb(st[1]) ^ s_box(st[6]) ^ s_box(st[11]); - 471:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[13] = s_box(st[12]) ^ gfm2_sb(st[1]) ^ gfm3_sb(st[6]) ^ s_box(st[11]); - 472:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[14] = s_box(st[12]) ^ s_box(st[1]) ^ gfm2_sb(st[6]) ^ gfm3_sb(st[11]); - 473:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[15] = gfm3_sb(st[12]) ^ s_box(st[1]) ^ s_box(st[6]) ^ gfm2_sb(st[11]); - 474:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 475:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 476:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( AES_DEC_PREKEYED ) - 477:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 478:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( VERSION_1 ) - 479:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void inv_mix_sub_columns( uint8_t dt[N_BLOCK] ) - 480:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t st[N_BLOCK]; - 481:./Middlewares/Third_Party/Lora/Crypto/aes.c **** block_copy(st, dt); - 482:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 483:./Middlewares/Third_Party/Lora/Crypto/aes.c **** static void inv_mix_sub_columns( uint8_t dt[N_BLOCK], uint8_t st[N_BLOCK] ) - 484:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 485:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 486:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 0] = is_box(gfm_e(st[ 0]) ^ gfm_b(st[ 1]) ^ gfm_d(st[ 2]) ^ gfm_9(st[ 3])); - 487:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 5] = is_box(gfm_9(st[ 0]) ^ gfm_e(st[ 1]) ^ gfm_b(st[ 2]) ^ gfm_d(st[ 3])); - 488:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[10] = is_box(gfm_d(st[ 0]) ^ gfm_9(st[ 1]) ^ gfm_e(st[ 2]) ^ gfm_b(st[ 3])); - 489:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[15] = is_box(gfm_b(st[ 0]) ^ gfm_d(st[ 1]) ^ gfm_9(st[ 2]) ^ gfm_e(st[ 3])); - 490:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 491:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 4] = is_box(gfm_e(st[ 4]) ^ gfm_b(st[ 5]) ^ gfm_d(st[ 6]) ^ gfm_9(st[ 7])); - 492:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 9] = is_box(gfm_9(st[ 4]) ^ gfm_e(st[ 5]) ^ gfm_b(st[ 6]) ^ gfm_d(st[ 7])); - 493:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[14] = is_box(gfm_d(st[ 4]) ^ gfm_9(st[ 5]) ^ gfm_e(st[ 6]) ^ gfm_b(st[ 7])); - 494:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 3] = is_box(gfm_b(st[ 4]) ^ gfm_d(st[ 5]) ^ gfm_9(st[ 6]) ^ gfm_e(st[ 7])); - 495:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 496:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 8] = is_box(gfm_e(st[ 8]) ^ gfm_b(st[ 9]) ^ gfm_d(st[10]) ^ gfm_9(st[11])); - 497:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[13] = is_box(gfm_9(st[ 8]) ^ gfm_e(st[ 9]) ^ gfm_b(st[10]) ^ gfm_d(st[11])); - 498:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 2] = is_box(gfm_d(st[ 8]) ^ gfm_9(st[ 9]) ^ gfm_e(st[10]) ^ gfm_b(st[11])); - 499:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 7] = is_box(gfm_b(st[ 8]) ^ gfm_d(st[ 9]) ^ gfm_9(st[10]) ^ gfm_e(st[11])); - 500:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 501:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[12] = is_box(gfm_e(st[12]) ^ gfm_b(st[13]) ^ gfm_d(st[14]) ^ gfm_9(st[15])); - 502:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 1] = is_box(gfm_9(st[12]) ^ gfm_e(st[13]) ^ gfm_b(st[14]) ^ gfm_d(st[15])); - 503:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 6] = is_box(gfm_d(st[12]) ^ gfm_9(st[13]) ^ gfm_e(st[14]) ^ gfm_b(st[15])); - 504:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[11] = is_box(gfm_b(st[12]) ^ gfm_d(st[13]) ^ gfm_9(st[14]) ^ gfm_e(st[15])); - 505:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 506:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 507:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 508:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 509:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( AES_ENC_PREKEYED ) || defined( AES_DEC_PREKEYED ) - 510:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 511:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* Set the cipher key for the pre-keyed version */ - 512:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 513:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return_type aes_set_key( const uint8_t key[], length_type keylen, aes_context ctx[1] ) - ARM GAS /tmp/ccJ0d890.s page 14 - - - 514:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 234 .loc 1 514 0 - 235 .cfi_startproc - 236 @ args = 0, pretend = 0, frame = 8 - 237 @ frame_needed = 0, uses_anonymous_args = 0 - 238 .LVL3: - 239 0000 F0B5 push {r4, r5, r6, r7, lr} - 240 .LCFI1: - 241 .cfi_def_cfa_offset 20 - 242 .cfi_offset 4, -20 - 243 .cfi_offset 5, -16 - 244 .cfi_offset 6, -12 - 245 .cfi_offset 7, -8 - 246 .cfi_offset 14, -4 - 247 0002 DE46 mov lr, fp - 248 0004 5746 mov r7, r10 - 249 0006 4E46 mov r6, r9 - 250 0008 4546 mov r5, r8 - 251 000a E0B5 push {r5, r6, r7, lr} - 252 .LCFI2: - 253 .cfi_def_cfa_offset 36 - 254 .cfi_offset 8, -36 - 255 .cfi_offset 9, -32 - 256 .cfi_offset 10, -28 - 257 .cfi_offset 11, -24 - 258 000c 83B0 sub sp, sp, #12 - 259 .LCFI3: - 260 .cfi_def_cfa_offset 48 - 261 000e 0F00 movs r7, r1 - 262 0010 1400 movs r4, r2 - 515:./Middlewares/Third_Party/Lora/Crypto/aes.c **** uint8_t cc, rc, hi; - 516:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 517:./Middlewares/Third_Party/Lora/Crypto/aes.c **** switch( keylen ) - 263 .loc 1 517 0 - 264 0012 1829 cmp r1, #24 - 265 0014 08D0 beq .L5 - 266 0016 2029 cmp r1, #32 - 267 0018 06D0 beq .L5 - 268 001a 1029 cmp r1, #16 - 269 001c 04D0 beq .L5 - 518:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 519:./Middlewares/Third_Party/Lora/Crypto/aes.c **** case 16: - 520:./Middlewares/Third_Party/Lora/Crypto/aes.c **** case 24: - 521:./Middlewares/Third_Party/Lora/Crypto/aes.c **** case 32: - 522:./Middlewares/Third_Party/Lora/Crypto/aes.c **** break; - 523:./Middlewares/Third_Party/Lora/Crypto/aes.c **** default: - 524:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ctx->rnd = 0; - 270 .loc 1 524 0 - 271 001e F023 movs r3, #240 - 272 0020 0022 movs r2, #0 - 273 .LVL4: - 274 0022 E254 strb r2, [r4, r3] - 525:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return ( uint8_t )-1; - 275 .loc 1 525 0 - 276 0024 FF20 movs r0, #255 - 277 .LVL5: - 278 0026 77E0 b .L6 - ARM GAS /tmp/ccJ0d890.s page 15 - - - 279 .LVL6: - 280 .L5: - 526:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 527:./Middlewares/Third_Party/Lora/Crypto/aes.c **** block_copy_nn(ctx->ksch, key, keylen); - 281 .loc 1 527 0 - 282 0028 2100 movs r1, r4 - 283 .LVL7: - 284 002a 3A00 movs r2, r7 - 285 .LVL8: - 286 002c 04E0 b .L7 - 287 .LVL9: - 288 .L8: - 289 .LBB12: - 290 .LBB13: - 346:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 291 .loc 1 346 0 - 292 002e 0278 ldrb r2, [r0] - 293 0030 0A70 strb r2, [r1] - 344:./Middlewares/Third_Party/Lora/Crypto/aes.c **** //*((uint8_t*)d)++ = *((uint8_t*)s)++; - 294 .loc 1 344 0 - 295 0032 1A00 movs r2, r3 - 346:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 296 .loc 1 346 0 - 297 0034 0130 adds r0, r0, #1 - 298 .LVL10: - 299 0036 0131 adds r1, r1, #1 - 300 .LVL11: - 301 .L7: - 344:./Middlewares/Third_Party/Lora/Crypto/aes.c **** //*((uint8_t*)d)++ = *((uint8_t*)s)++; - 302 .loc 1 344 0 - 303 0038 531E subs r3, r2, #1 - 304 003a DBB2 uxtb r3, r3 - 305 .LVL12: - 306 003c 002A cmp r2, #0 - 307 003e F6D1 bne .L8 - 308 .LVL13: - 309 .LBE13: - 310 .LBE12: - 528:./Middlewares/Third_Party/Lora/Crypto/aes.c **** hi = (keylen + 28) << 2; - 311 .loc 1 528 0 - 312 0040 3B00 movs r3, r7 - 313 0042 1C33 adds r3, r3, #28 - 314 0044 DBB2 uxtb r3, r3 - 315 0046 9B00 lsls r3, r3, #2 - 316 0048 DBB2 uxtb r3, r3 - 317 004a 0093 str r3, [sp] - 318 .LVL14: - 529:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ctx->rnd = (hi >> 4) - 1; - 319 .loc 1 529 0 - 320 004c 1B09 lsrs r3, r3, #4 - 321 .LVL15: - 322 004e 013B subs r3, r3, #1 - 323 0050 F032 adds r2, r2, #240 - 324 0052 A354 strb r3, [r4, r2] - 325 .LVL16: - 530:./Middlewares/Third_Party/Lora/Crypto/aes.c **** for( cc = keylen, rc = 1; cc < hi; cc += 4 ) - 326 .loc 1 530 0 - ARM GAS /tmp/ccJ0d890.s page 16 - - - 327 0054 3D00 movs r5, r7 - 328 0056 0123 movs r3, #1 - 329 0058 0193 str r3, [sp, #4] - 330 005a 1DE0 b .L9 - 331 .LVL17: - 332 .L10: - 333 .LBB14: - 531:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t tt, t0, t1, t2, t3; - 532:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 533:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t0 = ctx->ksch[cc - 4]; - 534:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t1 = ctx->ksch[cc - 3]; - 535:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t2 = ctx->ksch[cc - 2]; - 536:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t3 = ctx->ksch[cc - 1]; - 537:./Middlewares/Third_Party/Lora/Crypto/aes.c **** if( cc % keylen == 0 ) - 538:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 539:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = t0; - 540:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t0 = s_box(t1) ^ rc; - 541:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t1 = s_box(t2); - 542:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t2 = s_box(t3); - 543:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t3 = s_box(tt); - 544:./Middlewares/Third_Party/Lora/Crypto/aes.c **** rc = f2(rc); - 545:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 546:./Middlewares/Third_Party/Lora/Crypto/aes.c **** else if( keylen > 24 && cc % keylen == 16 ) - 334 .loc 1 546 0 - 335 005c 182F cmp r7, #24 - 336 005e 01D9 bls .L11 - 337 .loc 1 546 0 is_stmt 0 discriminator 1 - 338 0060 1029 cmp r1, #16 - 339 0062 4AD0 beq .L13 - 340 .LVL18: - 341 .L11: - 547:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 548:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t0 = s_box(t0); - 549:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t1 = s_box(t1); - 550:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t2 = s_box(t2); - 551:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t3 = s_box(t3); - 552:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 553:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = cc - keylen; - 342 .loc 1 553 0 is_stmt 1 discriminator 2 - 343 0064 EB1B subs r3, r5, r7 - 344 0066 DBB2 uxtb r3, r3 - 345 .LVL19: - 554:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ctx->ksch[cc + 0] = ctx->ksch[tt + 0] ^ t0; - 346 .loc 1 554 0 discriminator 2 - 347 0068 E25C ldrb r2, [r4, r3] - 348 006a 5946 mov r1, fp - 349 006c 4A40 eors r2, r1 - 350 006e A255 strb r2, [r4, r6] - 555:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ctx->ksch[cc + 1] = ctx->ksch[tt + 1] ^ t1; - 351 .loc 1 555 0 discriminator 2 - 352 0070 5A1C adds r2, r3, #1 - 353 0072 A25C ldrb r2, [r4, r2] - 354 0074 711C adds r1, r6, #1 - 355 0076 5046 mov r0, r10 - 356 0078 4240 eors r2, r0 - 357 007a 6254 strb r2, [r4, r1] - 556:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ctx->ksch[cc + 2] = ctx->ksch[tt + 2] ^ t2; - ARM GAS /tmp/ccJ0d890.s page 17 - - - 358 .loc 1 556 0 discriminator 2 - 359 007c 9A1C adds r2, r3, #2 - 360 007e A25C ldrb r2, [r4, r2] - 361 0080 B11C adds r1, r6, #2 - 362 0082 4846 mov r0, r9 - 363 0084 4240 eors r2, r0 - 364 0086 6254 strb r2, [r4, r1] - 557:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ctx->ksch[cc + 3] = ctx->ksch[tt + 3] ^ t3; - 365 .loc 1 557 0 discriminator 2 - 366 0088 0333 adds r3, r3, #3 - 367 .LVL20: - 368 008a E35C ldrb r3, [r4, r3] - 369 .LVL21: - 370 008c 0336 adds r6, r6, #3 - 371 008e 4246 mov r2, r8 - 372 0090 5340 eors r3, r2 - 373 0092 A355 strb r3, [r4, r6] - 374 .LBE14: - 530:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t tt, t0, t1, t2, t3; - 375 .loc 1 530 0 discriminator 2 - 376 0094 0435 adds r5, r5, #4 - 377 .LVL22: - 378 0096 EDB2 uxtb r5, r5 - 379 .LVL23: - 380 .L9: - 530:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t tt, t0, t1, t2, t3; - 381 .loc 1 530 0 is_stmt 0 discriminator 1 - 382 0098 009B ldr r3, [sp] - 383 009a 9D42 cmp r5, r3 - 384 009c 3BD2 bcs .L14 - 385 .LBB15: - 533:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t1 = ctx->ksch[cc - 3]; - 386 .loc 1 533 0 is_stmt 1 - 387 009e 2E00 movs r6, r5 - 388 00a0 2B1F subs r3, r5, #4 - 389 00a2 E35C ldrb r3, [r4, r3] - 390 00a4 9B46 mov fp, r3 - 391 .LVL24: - 534:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t2 = ctx->ksch[cc - 2]; - 392 .loc 1 534 0 - 393 00a6 EB1E subs r3, r5, #3 - 394 00a8 E35C ldrb r3, [r4, r3] - 395 00aa 9A46 mov r10, r3 - 396 .LVL25: - 535:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t3 = ctx->ksch[cc - 1]; - 397 .loc 1 535 0 - 398 00ac AB1E subs r3, r5, #2 - 399 00ae E35C ldrb r3, [r4, r3] - 400 00b0 9946 mov r9, r3 - 401 .LVL26: - 536:./Middlewares/Third_Party/Lora/Crypto/aes.c **** if( cc % keylen == 0 ) - 402 .loc 1 536 0 - 403 00b2 6B1E subs r3, r5, #1 - 404 00b4 E35C ldrb r3, [r4, r3] - 405 00b6 9846 mov r8, r3 - 406 .LVL27: - 537:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - ARM GAS /tmp/ccJ0d890.s page 18 - - - 407 .loc 1 537 0 - 408 00b8 3900 movs r1, r7 - 409 00ba 2800 movs r0, r5 - 410 00bc FFF7FEFF bl __aeabi_uidivmod - 411 .LVL28: - 412 00c0 C9B2 uxtb r1, r1 - 413 00c2 0029 cmp r1, #0 - 414 00c4 CAD1 bne .L10 - 415 .LVL29: - 540:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t1 = s_box(t2); - 416 .loc 1 540 0 - 417 00c6 184B ldr r3, .L15 - 418 00c8 5246 mov r2, r10 - 419 00ca 9A5C ldrb r2, [r3, r2] - 420 00cc 0199 ldr r1, [sp, #4] - 421 00ce 4A40 eors r2, r1 - 422 .LVL30: - 541:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t2 = s_box(t3); - 423 .loc 1 541 0 - 424 00d0 4846 mov r0, r9 - 425 00d2 185C ldrb r0, [r3, r0] - 426 00d4 8246 mov r10, r0 - 427 .LVL31: - 542:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t3 = s_box(tt); - 428 .loc 1 542 0 - 429 00d6 4046 mov r0, r8 - 430 00d8 185C ldrb r0, [r3, r0] - 431 00da 8146 mov r9, r0 - 432 .LVL32: - 543:./Middlewares/Third_Party/Lora/Crypto/aes.c **** rc = f2(rc); - 433 .loc 1 543 0 - 434 00dc 5846 mov r0, fp - 435 00de 1B5C ldrb r3, [r3, r0] - 436 00e0 9846 mov r8, r3 - 437 .LVL33: - 544:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 438 .loc 1 544 0 - 439 00e2 0B00 movs r3, r1 - 440 00e4 4900 lsls r1, r1, #1 - 441 00e6 DB09 lsrs r3, r3, #7 - 442 00e8 5800 lsls r0, r3, #1 - 443 00ea 1B18 adds r3, r3, r0 - 444 00ec D800 lsls r0, r3, #3 - 445 00ee 1B18 adds r3, r3, r0 - 446 00f0 4B40 eors r3, r1 - 447 00f2 DBB2 uxtb r3, r3 - 448 00f4 0193 str r3, [sp, #4] - 449 .LVL34: - 540:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t1 = s_box(t2); - 450 .loc 1 540 0 - 451 00f6 9346 mov fp, r2 - 452 .LVL35: - 453 00f8 B4E7 b .L11 - 454 .LVL36: - 455 .L13: - 548:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t1 = s_box(t1); - 456 .loc 1 548 0 - ARM GAS /tmp/ccJ0d890.s page 19 - - - 457 00fa 0B4B ldr r3, .L15 - 458 00fc 5A46 mov r2, fp - 459 00fe 9A5C ldrb r2, [r3, r2] - 460 0100 9346 mov fp, r2 - 461 .LVL37: - 549:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t2 = s_box(t2); - 462 .loc 1 549 0 - 463 0102 5246 mov r2, r10 - 464 0104 9A5C ldrb r2, [r3, r2] - 465 0106 9246 mov r10, r2 - 466 .LVL38: - 550:./Middlewares/Third_Party/Lora/Crypto/aes.c **** t3 = s_box(t3); - 467 .loc 1 550 0 - 468 0108 4A46 mov r2, r9 - 469 010a 9A5C ldrb r2, [r3, r2] - 470 010c 9146 mov r9, r2 - 471 .LVL39: - 551:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 472 .loc 1 551 0 - 473 010e 4246 mov r2, r8 - 474 0110 9B5C ldrb r3, [r3, r2] - 475 0112 9846 mov r8, r3 - 476 .LVL40: - 477 0114 A6E7 b .L11 - 478 .LVL41: - 479 .L14: - 480 .LBE15: - 558:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 559:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return 0; - 481 .loc 1 559 0 - 482 0116 0020 movs r0, #0 - 483 .LVL42: - 484 .L6: - 560:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 485 .loc 1 560 0 - 486 0118 03B0 add sp, sp, #12 - 487 @ sp needed - 488 .LVL43: - 489 011a 3CBC pop {r2, r3, r4, r5} - 490 011c 9046 mov r8, r2 - 491 011e 9946 mov r9, r3 - 492 0120 A246 mov r10, r4 - 493 0122 AB46 mov fp, r5 - 494 0124 F0BD pop {r4, r5, r6, r7, pc} - 495 .L16: - 496 0126 C046 .align 2 - 497 .L15: - 498 0128 00000000 .word sbox - 499 .cfi_endproc - 500 .LFE7: - 502 .section .text.aes_encrypt,"ax",%progbits - 503 .align 1 - 504 .global aes_encrypt - 505 .syntax unified - 506 .code 16 - 507 .thumb_func - 508 .fpu softvfp - ARM GAS /tmp/ccJ0d890.s page 20 - - - 510 aes_encrypt: - 511 .LFB8: - 561:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 562:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 563:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 564:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( AES_ENC_PREKEYED ) - 565:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 566:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* Encrypt a single block of 16 bytes */ - 567:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 568:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return_type aes_encrypt( const uint8_t in[N_BLOCK], uint8_t out[N_BLOCK], const aes_context ctx[1] - 569:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 512 .loc 1 569 0 - 513 .cfi_startproc - 514 @ args = 0, pretend = 0, frame = 80 - 515 @ frame_needed = 0, uses_anonymous_args = 0 - 516 .LVL44: - 517 0000 F0B5 push {r4, r5, r6, r7, lr} - 518 .LCFI4: - 519 .cfi_def_cfa_offset 20 - 520 .cfi_offset 4, -20 - 521 .cfi_offset 5, -16 - 522 .cfi_offset 6, -12 - 523 .cfi_offset 7, -8 - 524 .cfi_offset 14, -4 - 525 0002 DE46 mov lr, fp - 526 0004 5746 mov r7, r10 - 527 0006 4E46 mov r6, r9 - 528 0008 4546 mov r5, r8 - 529 000a E0B5 push {r5, r6, r7, lr} - 530 .LCFI5: - 531 .cfi_def_cfa_offset 36 - 532 .cfi_offset 8, -36 - 533 .cfi_offset 9, -32 - 534 .cfi_offset 10, -28 - 535 .cfi_offset 11, -24 - 536 000c 95B0 sub sp, sp, #84 - 537 .LCFI6: - 538 .cfi_def_cfa_offset 120 - 539 000e 0F91 str r1, [sp, #60] - 540 0010 0D92 str r2, [sp, #52] - 570:./Middlewares/Third_Party/Lora/Crypto/aes.c **** if( ctx->rnd ) - 541 .loc 1 570 0 - 542 0012 F023 movs r3, #240 - 543 0014 D35C ldrb r3, [r2, r3] - 544 0016 002B cmp r3, #0 - 545 0018 00D1 bne .LCB519 - 546 001a 5CE1 b .L21 @long jump - 547 .LCB519: - 548 .LBB25: - 571:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 572:./Middlewares/Third_Party/Lora/Crypto/aes.c **** uint8_t s1[N_BLOCK], r; - 573:./Middlewares/Third_Party/Lora/Crypto/aes.c **** copy_and_key( s1, in, ctx->ksch ); - 549 .loc 1 573 0 - 550 001c 0E92 str r2, [sp, #56] - 551 001e 0100 movs r1, r0 - 552 .LVL45: - 553 0020 10A8 add r0, sp, #64 - ARM GAS /tmp/ccJ0d890.s page 21 - - - 554 .LVL46: - 555 0022 FFF7FEFF bl copy_and_key - 556 .LVL47: - 574:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 575:./Middlewares/Third_Party/Lora/Crypto/aes.c **** for( r = 1 ; r < ctx->rnd ; ++r ) - 557 .loc 1 575 0 - 558 0026 0123 movs r3, #1 - 559 0028 0693 str r3, [sp, #24] - 560 002a 08E1 b .L19 - 561 .LVL48: - 562 .L20: - 563 .LBB26: - 564 .LBB27: - 565 .LBB28: - 566 .LBB29: - 323:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 1] = ((uint8_t*)s)[ 1]; - 567 .loc 1 323 0 - 568 002c 10AB add r3, sp, #64 - 569 .LVL49: - 570 002e 1B78 ldrb r3, [r3] - 571 .LVL50: - 572 0030 9C46 mov ip, r3 - 324:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 2] = ((uint8_t*)s)[ 2]; - 573 .loc 1 324 0 - 574 0032 10AB add r3, sp, #64 - 575 .LVL51: - 576 0034 5F78 ldrb r7, [r3, #1] - 577 0036 0997 str r7, [sp, #36] - 325:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 3] = ((uint8_t*)s)[ 3]; - 578 .loc 1 325 0 - 579 0038 9B78 ldrb r3, [r3, #2] - 580 .LVL52: - 581 003a 0093 str r3, [sp] - 326:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 4] = ((uint8_t*)s)[ 4]; - 582 .loc 1 326 0 - 583 003c 10AA add r2, sp, #64 - 584 .LVL53: - 585 003e D278 ldrb r2, [r2, #3] - 586 .LVL54: - 587 0040 0792 str r2, [sp, #28] - 327:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 5] = ((uint8_t*)s)[ 5]; - 588 .loc 1 327 0 - 589 0042 10A9 add r1, sp, #64 - 590 .LVL55: - 591 0044 0979 ldrb r1, [r1, #4] - 592 .LVL56: - 593 0046 0191 str r1, [sp, #4] - 328:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 6] = ((uint8_t*)s)[ 6]; - 594 .loc 1 328 0 - 595 0048 10AE add r6, sp, #64 - 596 .LVL57: - 597 004a 7679 ldrb r6, [r6, #5] - 598 .LVL58: - 599 004c B146 mov r9, r6 - 329:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 7] = ((uint8_t*)s)[ 7]; - 600 .loc 1 329 0 - 601 004e 10AE add r6, sp, #64 - ARM GAS /tmp/ccJ0d890.s page 22 - - - 602 .LVL59: - 603 0050 B679 ldrb r6, [r6, #6] - 604 .LVL60: - 605 0052 0296 str r6, [sp, #8] - 330:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 8] = ((uint8_t*)s)[ 8]; - 606 .loc 1 330 0 - 607 0054 10AD add r5, sp, #64 - 608 .LVL61: - 609 0056 ED79 ldrb r5, [r5, #7] - 610 .LVL62: - 611 0058 0395 str r5, [sp, #12] - 331:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 9] = ((uint8_t*)s)[ 9]; - 612 .loc 1 331 0 - 613 005a 10AC add r4, sp, #64 - 614 .LVL63: - 615 005c 247A ldrb r4, [r4, #8] - 616 .LVL64: - 617 005e 0A94 str r4, [sp, #40] - 332:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[10] = ((uint8_t*)s)[10]; - 618 .loc 1 332 0 - 619 0060 10AB add r3, sp, #64 - 620 .LVL65: - 621 0062 5B7A ldrb r3, [r3, #9] - 622 .LVL66: - 623 0064 0B93 str r3, [sp, #44] - 333:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[11] = ((uint8_t*)s)[11]; - 624 .loc 1 333 0 - 625 0066 10AA add r2, sp, #64 - 626 .LVL67: - 627 0068 927A ldrb r2, [r2, #10] - 628 .LVL68: - 629 006a 9046 mov r8, r2 - 334:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[12] = ((uint8_t*)s)[12]; - 630 .loc 1 334 0 - 631 006c 10AA add r2, sp, #64 - 632 .LVL69: - 633 006e D27A ldrb r2, [r2, #11] - 634 .LVL70: - 635 0070 0892 str r2, [sp, #32] - 335:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[13] = ((uint8_t*)s)[13]; - 636 .loc 1 335 0 - 637 0072 10A9 add r1, sp, #64 - 638 .LVL71: - 639 0074 097B ldrb r1, [r1, #12] - 640 .LVL72: - 641 0076 0491 str r1, [sp, #16] - 336:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[14] = ((uint8_t*)s)[14]; - 642 .loc 1 336 0 - 643 0078 10A8 add r0, sp, #64 - 644 .LVL73: - 645 007a 407B ldrb r0, [r0, #13] - 646 .LVL74: - 647 007c 0590 str r0, [sp, #20] - 337:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[15] = ((uint8_t*)s)[15]; - 648 .loc 1 337 0 - 649 007e 10AB add r3, sp, #64 - 650 .LVL75: - ARM GAS /tmp/ccJ0d890.s page 23 - - - 651 0080 9E7B ldrb r6, [r3, #14] - 338:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 652 .loc 1 338 0 - 653 0082 DF7B ldrb r7, [r3, #15] - 654 .LVL76: - 655 .LBE29: - 656 .LBE28: - 455:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 1] = s_box(st[0]) ^ gfm2_sb(st[5]) ^ gfm3_sb(st[10]) ^ s_box(st[15]); - 657 .loc 1 455 0 - 658 0084 6346 mov r3, ip - 659 .LVL77: - 660 0086 954A ldr r2, .L22 - 661 0088 D45C ldrb r4, [r2, r3] - 662 008a 4B46 mov r3, r9 - 663 008c 944A ldr r2, .L22+4 - 664 008e D35C ldrb r3, [r2, r3] - 665 0090 9A46 mov r10, r3 - 666 0092 9449 ldr r1, .L22+8 - 667 0094 4346 mov r3, r8 - 668 0096 C85C ldrb r0, [r1, r3] - 669 0098 CD5D ldrb r5, [r1, r7] - 670 009a 5346 mov r3, r10 - 671 009c 5C40 eors r4, r3 - 672 009e 4440 eors r4, r0 - 673 00a0 0C95 str r5, [sp, #48] - 674 00a2 6C40 eors r4, r5 - 675 00a4 10AB add r3, sp, #64 - 676 .LVL78: - 677 00a6 1C70 strb r4, [r3] - 456:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 2] = s_box(st[0]) ^ s_box(st[5]) ^ gfm2_sb(st[10]) ^ gfm3_sb(st[15]); - 678 .loc 1 456 0 - 679 00a8 6346 mov r3, ip - 680 .LVL79: - 681 00aa CC5C ldrb r4, [r1, r3] - 682 00ac 4B46 mov r3, r9 - 683 00ae 8B4A ldr r2, .L22 - 684 00b0 D35C ldrb r3, [r2, r3] - 685 00b2 9B46 mov fp, r3 - 686 00b4 4346 mov r3, r8 - 687 00b6 8A4A ldr r2, .L22+4 - 688 00b8 D35C ldrb r3, [r2, r3] - 689 00ba 9A46 mov r10, r3 - 690 00bc 5B46 mov r3, fp - 691 00be 6340 eors r3, r4 - 692 00c0 9B46 mov fp, r3 - 693 00c2 5346 mov r3, r10 - 694 00c4 5D46 mov r5, fp - 695 00c6 6B40 eors r3, r5 - 696 00c8 0C9D ldr r5, [sp, #48] - 697 00ca 5D40 eors r5, r3 - 698 00cc 10AB add r3, sp, #64 - 699 .LVL80: - 700 00ce 5D70 strb r5, [r3, #1] - 457:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 3] = gfm3_sb(st[0]) ^ s_box(st[5]) ^ s_box(st[10]) ^ gfm2_sb(st[15]); - 701 .loc 1 457 0 - 702 00d0 4B46 mov r3, r9 - 703 .LVL81: - ARM GAS /tmp/ccJ0d890.s page 24 - - - 704 00d2 CD5C ldrb r5, [r1, r3] - 705 00d4 4346 mov r3, r8 - 706 00d6 814A ldr r2, .L22 - 707 00d8 D35C ldrb r3, [r2, r3] - 708 00da 9946 mov r9, r3 - 709 00dc 804B ldr r3, .L22+4 - 710 00de DB5D ldrb r3, [r3, r7] - 711 00e0 9846 mov r8, r3 - 712 00e2 6C40 eors r4, r5 - 713 00e4 4B46 mov r3, r9 - 714 00e6 5C40 eors r4, r3 - 715 00e8 4346 mov r3, r8 - 716 00ea 5C40 eors r4, r3 - 717 00ec 10AB add r3, sp, #64 - 718 .LVL82: - 719 00ee 9C70 strb r4, [r3, #2] - 458:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 720 .loc 1 458 0 - 721 00f0 6346 mov r3, ip - 722 .LVL83: - 723 00f2 7B4A ldr r2, .L22+4 - 724 00f4 D45C ldrb r4, [r2, r3] - 725 00f6 794B ldr r3, .L22 - 726 00f8 DF5D ldrb r7, [r3, r7] - 727 00fa 6540 eors r5, r4 - 728 00fc 4540 eors r5, r0 - 729 00fe 7D40 eors r5, r7 - 730 0100 10AB add r3, sp, #64 - 731 .LVL84: - 732 0102 DD70 strb r5, [r3, #3] - 460:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 5] = s_box(st[4]) ^ gfm2_sb(st[9]) ^ gfm3_sb(st[14]) ^ s_box(st[3]); - 733 .loc 1 460 0 - 734 0104 019C ldr r4, [sp, #4] - 735 0106 754B ldr r3, .L22 - 736 .LVL85: - 737 0108 1C5D ldrb r4, [r3, r4] - 738 010a 0B9A ldr r2, [sp, #44] - 739 010c 744B ldr r3, .L22+4 - 740 010e 9F5C ldrb r7, [r3, r2] - 741 0110 885D ldrb r0, [r1, r6] - 742 0112 079D ldr r5, [sp, #28] - 743 0114 4D5D ldrb r5, [r1, r5] - 744 0116 7C40 eors r4, r7 - 745 0118 4440 eors r4, r0 - 746 011a 6C40 eors r4, r5 - 747 011c 10AB add r3, sp, #64 - 748 .LVL86: - 749 011e 1C71 strb r4, [r3, #4] - 461:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 6] = s_box(st[4]) ^ s_box(st[9]) ^ gfm2_sb(st[14]) ^ gfm3_sb(st[3]); - 750 .loc 1 461 0 - 751 0120 019C ldr r4, [sp, #4] - 752 0122 0C5D ldrb r4, [r1, r4] - 753 0124 6D4B ldr r3, .L22 - 754 .LVL87: - 755 0126 9B5C ldrb r3, [r3, r2] - 756 0128 9C46 mov ip, r3 - 757 012a 6D4B ldr r3, .L22+4 - ARM GAS /tmp/ccJ0d890.s page 25 - - - 758 012c 9F5D ldrb r7, [r3, r6] - 759 012e 6346 mov r3, ip - 760 0130 6340 eors r3, r4 - 761 0132 5F40 eors r7, r3 - 762 0134 6F40 eors r7, r5 - 763 0136 10AB add r3, sp, #64 - 764 .LVL88: - 765 0138 5F71 strb r7, [r3, #5] - 462:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 7] = gfm3_sb(st[4]) ^ s_box(st[9]) ^ s_box(st[14]) ^ gfm2_sb(st[3]); - 766 .loc 1 462 0 - 767 013a 8D5C ldrb r5, [r1, r2] - 768 013c 674B ldr r3, .L22 - 769 .LVL89: - 770 013e 9F5D ldrb r7, [r3, r6] - 771 0140 079A ldr r2, [sp, #28] - 772 0142 674B ldr r3, .L22+4 - 773 0144 9E5C ldrb r6, [r3, r2] - 774 0146 6C40 eors r4, r5 - 775 0148 7C40 eors r4, r7 - 776 014a 7440 eors r4, r6 - 777 014c 10AB add r3, sp, #64 - 778 .LVL90: - 779 014e 9C71 strb r4, [r3, #6] - 463:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 780 .loc 1 463 0 - 781 0150 019C ldr r4, [sp, #4] - 782 0152 634B ldr r3, .L22+4 - 783 .LVL91: - 784 0154 1C5D ldrb r4, [r3, r4] - 785 0156 614B ldr r3, .L22 - 786 0158 9E5C ldrb r6, [r3, r2] - 787 015a 6540 eors r5, r4 - 788 015c 4540 eors r5, r0 - 789 015e 7540 eors r5, r6 - 790 0160 10AB add r3, sp, #64 - 791 .LVL92: - 792 0162 DD71 strb r5, [r3, #7] - 465:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[ 9] = s_box(st[8]) ^ gfm2_sb(st[13]) ^ gfm3_sb(st[2]) ^ s_box(st[7]); - 793 .loc 1 465 0 - 794 0164 0A9A ldr r2, [sp, #40] - 795 0166 5D4B ldr r3, .L22 - 796 .LVL93: - 797 0168 9C5C ldrb r4, [r3, r2] - 798 016a 059F ldr r7, [sp, #20] - 799 016c 5C4B ldr r3, .L22+4 - 800 016e DE5D ldrb r6, [r3, r7] - 801 0170 0098 ldr r0, [sp] - 802 0172 085C ldrb r0, [r1, r0] - 803 0174 039D ldr r5, [sp, #12] - 804 0176 4D5D ldrb r5, [r1, r5] - 805 0178 7440 eors r4, r6 - 806 017a 4440 eors r4, r0 - 807 017c 6C40 eors r4, r5 - 808 017e 10AB add r3, sp, #64 - 809 .LVL94: - 810 0180 1C72 strb r4, [r3, #8] - 466:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[10] = s_box(st[8]) ^ s_box(st[13]) ^ gfm2_sb(st[2]) ^ gfm3_sb(st[7]); - ARM GAS /tmp/ccJ0d890.s page 26 - - - 811 .loc 1 466 0 - 812 0182 8C5C ldrb r4, [r1, r2] - 813 0184 554B ldr r3, .L22 - 814 .LVL95: - 815 0186 DF5D ldrb r7, [r3, r7] - 816 0188 009E ldr r6, [sp] - 817 018a 554B ldr r3, .L22+4 - 818 018c 9E5D ldrb r6, [r3, r6] - 819 018e 6740 eors r7, r4 - 820 0190 7E40 eors r6, r7 - 821 0192 6E40 eors r6, r5 - 822 0194 10AB add r3, sp, #64 - 823 .LVL96: - 824 0196 5E72 strb r6, [r3, #9] - 467:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[11] = gfm3_sb(st[8]) ^ s_box(st[13]) ^ s_box(st[2]) ^ gfm2_sb(st[7]); - 825 .loc 1 467 0 - 826 0198 059D ldr r5, [sp, #20] - 827 019a 4D5D ldrb r5, [r1, r5] - 828 019c 009E ldr r6, [sp] - 829 019e 4F4B ldr r3, .L22 - 830 .LVL97: - 831 01a0 9F5D ldrb r7, [r3, r6] - 832 01a2 039E ldr r6, [sp, #12] - 833 01a4 4E4B ldr r3, .L22+4 - 834 01a6 9E5D ldrb r6, [r3, r6] - 835 01a8 6C40 eors r4, r5 - 836 01aa 7C40 eors r4, r7 - 837 01ac 7440 eors r4, r6 - 838 01ae 10AB add r3, sp, #64 - 839 .LVL98: - 840 01b0 9C72 strb r4, [r3, #10] - 468:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 841 .loc 1 468 0 - 842 01b2 4B4B ldr r3, .L22+4 - 843 .LVL99: - 844 01b4 9C5C ldrb r4, [r3, r2] - 845 01b6 039E ldr r6, [sp, #12] - 846 01b8 484B ldr r3, .L22 - 847 01ba 9E5D ldrb r6, [r3, r6] - 848 01bc 6540 eors r5, r4 - 849 01be 6840 eors r0, r5 - 850 01c0 7040 eors r0, r6 - 851 01c2 10AB add r3, sp, #64 - 852 .LVL100: - 853 01c4 D872 strb r0, [r3, #11] - 470:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[13] = s_box(st[12]) ^ gfm2_sb(st[1]) ^ gfm3_sb(st[6]) ^ s_box(st[11]); - 854 .loc 1 470 0 - 855 01c6 049C ldr r4, [sp, #16] - 856 01c8 444B ldr r3, .L22 - 857 .LVL101: - 858 01ca 1C5D ldrb r4, [r3, r4] - 859 01cc 099A ldr r2, [sp, #36] - 860 01ce 444B ldr r3, .L22+4 - 861 01d0 9E5C ldrb r6, [r3, r2] - 862 01d2 0298 ldr r0, [sp, #8] - 863 01d4 085C ldrb r0, [r1, r0] - 864 01d6 089D ldr r5, [sp, #32] - ARM GAS /tmp/ccJ0d890.s page 27 - - - 865 01d8 4D5D ldrb r5, [r1, r5] - 866 01da 7440 eors r4, r6 - 867 01dc 4440 eors r4, r0 - 868 01de 6C40 eors r4, r5 - 869 01e0 10AB add r3, sp, #64 - 870 .LVL102: - 871 01e2 1C73 strb r4, [r3, #12] - 471:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[14] = s_box(st[12]) ^ s_box(st[1]) ^ gfm2_sb(st[6]) ^ gfm3_sb(st[11]); - 872 .loc 1 471 0 - 873 01e4 049C ldr r4, [sp, #16] - 874 01e6 0C5D ldrb r4, [r1, r4] - 875 01e8 3C4B ldr r3, .L22 - 876 .LVL103: - 877 01ea 9F5C ldrb r7, [r3, r2] - 878 01ec 029E ldr r6, [sp, #8] - 879 01ee 3C4B ldr r3, .L22+4 - 880 01f0 9E5D ldrb r6, [r3, r6] - 881 01f2 6740 eors r7, r4 - 882 01f4 7E40 eors r6, r7 - 883 01f6 6E40 eors r6, r5 - 884 01f8 10AB add r3, sp, #64 - 885 .LVL104: - 886 01fa 5E73 strb r6, [r3, #13] - 472:./Middlewares/Third_Party/Lora/Crypto/aes.c **** dt[15] = gfm3_sb(st[12]) ^ s_box(st[1]) ^ s_box(st[6]) ^ gfm2_sb(st[11]); - 887 .loc 1 472 0 - 888 01fc 895C ldrb r1, [r1, r2] - 889 01fe 029E ldr r6, [sp, #8] - 890 0200 364B ldr r3, .L22 - 891 .LVL105: - 892 0202 9E5D ldrb r6, [r3, r6] - 893 0204 089F ldr r7, [sp, #32] - 894 0206 364B ldr r3, .L22+4 - 895 0208 DD5D ldrb r5, [r3, r7] - 896 020a 4C40 eors r4, r1 - 897 020c 7440 eors r4, r6 - 898 020e 6C40 eors r4, r5 - 899 0210 10AB add r3, sp, #64 - 900 .LVL106: - 901 0212 9C73 strb r4, [r3, #14] - 473:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 902 .loc 1 473 0 - 903 0214 049C ldr r4, [sp, #16] - 904 0216 324B ldr r3, .L22+4 - 905 .LVL107: - 906 0218 1A5D ldrb r2, [r3, r4] - 907 021a 304B ldr r3, .L22 - 908 021c DB5D ldrb r3, [r3, r7] - 909 021e 5140 eors r1, r2 - 910 0220 4840 eors r0, r1 - 911 0222 5840 eors r0, r3 - 912 0224 10AB add r3, sp, #64 - 913 .LVL108: - 914 0226 D873 strb r0, [r3, #15] - 915 .LVL109: - 916 .LBE27: - 917 .LBE26: - 576:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( VERSION_1 ) - ARM GAS /tmp/ccJ0d890.s page 28 - - - 577:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 578:./Middlewares/Third_Party/Lora/Crypto/aes.c **** mix_sub_columns( s1 ); - 579:./Middlewares/Third_Party/Lora/Crypto/aes.c **** add_round_key( s1, ctx->ksch + r * N_BLOCK); - 918 .loc 1 579 0 - 919 0228 069C ldr r4, [sp, #24] - 920 022a 2101 lsls r1, r4, #4 - 921 022c 0E9B ldr r3, [sp, #56] - 922 022e 9C46 mov ip, r3 - 923 0230 6144 add r1, r1, ip - 924 .LVL110: - 925 .LBB30: - 926 .LBB31: - 408:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 927 .loc 1 408 0 - 928 0232 10A8 add r0, sp, #64 - 929 .LVL111: - 930 0234 FFF7FEFF bl xor_block - 931 .LVL112: - 932 .LBE31: - 933 .LBE30: - 575:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( VERSION_1 ) - 934 .loc 1 575 0 - 935 0238 631C adds r3, r4, #1 - 936 023a DBB2 uxtb r3, r3 - 937 023c 0693 str r3, [sp, #24] - 938 .LVL113: - 939 .L19: - 575:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #if defined( VERSION_1 ) - 940 .loc 1 575 0 is_stmt 0 discriminator 1 - 941 023e F023 movs r3, #240 - 942 0240 0D9A ldr r2, [sp, #52] - 943 0242 D35C ldrb r3, [r2, r3] - 944 0244 069A ldr r2, [sp, #24] - 945 0246 9342 cmp r3, r2 - 946 0248 00D9 bls .LCB982 - 947 024a EFE6 b .L20 @long jump - 948 .LCB982: - 949 .LVL114: - 950 .LBB32: - 951 .LBB33: - 414:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 8] = s_box(st[ 8]); st[12] = s_box(st[12]); - 952 .loc 1 414 0 is_stmt 1 - 953 024c 10AB add r3, sp, #64 - 954 .LVL115: - 955 024e 1A78 ldrb r2, [r3] - 956 0250 244B ldr r3, .L22+8 - 957 .LVL116: - 958 0252 9A5C ldrb r2, [r3, r2] - 959 0254 10A9 add r1, sp, #64 - 960 .LVL117: - 961 0256 0A70 strb r2, [r1] - 962 0258 0A79 ldrb r2, [r1, #4] - 963 025a 9A5C ldrb r2, [r3, r2] - 964 025c 0A71 strb r2, [r1, #4] - 415:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 965 .loc 1 415 0 - 966 025e 0A7A ldrb r2, [r1, #8] - ARM GAS /tmp/ccJ0d890.s page 29 - - - 967 0260 9A5C ldrb r2, [r3, r2] - 968 0262 0A72 strb r2, [r1, #8] - 969 0264 0A7B ldrb r2, [r1, #12] - 970 0266 9A5C ldrb r2, [r3, r2] - 971 0268 0A73 strb r2, [r1, #12] - 417:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 9] = s_box(st[13]); st[13] = s_box( tt ); - 972 .loc 1 417 0 - 973 026a 4A78 ldrb r2, [r1, #1] - 974 .LVL118: - 975 026c 4979 ldrb r1, [r1, #5] - 976 .LVL119: - 977 026e 595C ldrb r1, [r3, r1] - 978 0270 10A8 add r0, sp, #64 - 979 .LVL120: - 980 0272 4170 strb r1, [r0, #1] - 981 0274 417A ldrb r1, [r0, #9] - 982 0276 595C ldrb r1, [r3, r1] - 983 0278 4171 strb r1, [r0, #5] - 418:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 984 .loc 1 418 0 - 985 027a 417B ldrb r1, [r0, #13] - 986 027c 595C ldrb r1, [r3, r1] - 987 027e 4172 strb r1, [r0, #9] - 988 0280 9A5C ldrb r2, [r3, r2] - 989 .LVL121: - 990 0282 4273 strb r2, [r0, #13] - 420:./Middlewares/Third_Party/Lora/Crypto/aes.c **** tt = st[6]; st[ 6] = s_box(st[14]); st[14] = s_box( tt ); - 991 .loc 1 420 0 - 992 0284 8278 ldrb r2, [r0, #2] - 993 .LVL122: - 994 0286 817A ldrb r1, [r0, #10] - 995 0288 595C ldrb r1, [r3, r1] - 996 028a 8170 strb r1, [r0, #2] - 997 028c 9A5C ldrb r2, [r3, r2] - 998 .LVL123: - 999 028e 8272 strb r2, [r0, #10] - 421:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 1000 .loc 1 421 0 - 1001 0290 8279 ldrb r2, [r0, #6] - 1002 .LVL124: - 1003 0292 817B ldrb r1, [r0, #14] - 1004 0294 595C ldrb r1, [r3, r1] - 1005 0296 8171 strb r1, [r0, #6] - 1006 0298 9A5C ldrb r2, [r3, r2] - 1007 .LVL125: - 1008 029a 8273 strb r2, [r0, #14] - 423:./Middlewares/Third_Party/Lora/Crypto/aes.c **** st[ 7] = s_box(st[ 3]); st[ 3] = s_box( tt ); - 1009 .loc 1 423 0 - 1010 029c C27B ldrb r2, [r0, #15] - 1011 .LVL126: - 1012 029e C17A ldrb r1, [r0, #11] - 1013 02a0 595C ldrb r1, [r3, r1] - 1014 02a2 C173 strb r1, [r0, #15] - 1015 02a4 C179 ldrb r1, [r0, #7] - 1016 02a6 595C ldrb r1, [r3, r1] - 1017 02a8 C172 strb r1, [r0, #11] - 424:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - ARM GAS /tmp/ccJ0d890.s page 30 - - - 1018 .loc 1 424 0 - 1019 02aa C178 ldrb r1, [r0, #3] - 1020 02ac 595C ldrb r1, [r3, r1] - 1021 02ae C171 strb r1, [r0, #7] - 1022 02b0 9B5C ldrb r3, [r3, r2] - 1023 02b2 C370 strb r3, [r0, #3] - 1024 .LVL127: - 1025 .LBE33: - 1026 .LBE32: - 580:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 581:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #else - 582:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { uint8_t s2[N_BLOCK]; - 583:./Middlewares/Third_Party/Lora/Crypto/aes.c **** mix_sub_columns( s2, s1 ); - 584:./Middlewares/Third_Party/Lora/Crypto/aes.c **** copy_and_key( s1, s2, ctx->ksch + r * N_BLOCK); - 585:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 586:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 587:./Middlewares/Third_Party/Lora/Crypto/aes.c **** shift_sub_rows( s1 ); - 588:./Middlewares/Third_Party/Lora/Crypto/aes.c **** copy_and_key( out, s1, ctx->ksch + r * N_BLOCK ); - 1027 .loc 1 588 0 - 1028 02b4 069B ldr r3, [sp, #24] - 1029 02b6 1A01 lsls r2, r3, #4 - 1030 02b8 0D9B ldr r3, [sp, #52] - 1031 02ba 9C46 mov ip, r3 - 1032 02bc 6244 add r2, r2, ip - 1033 02be 0100 movs r1, r0 - 1034 02c0 0F98 ldr r0, [sp, #60] - 1035 02c2 FFF7FEFF bl copy_and_key - 1036 .LVL128: - 1037 .LBE25: - 589:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 590:./Middlewares/Third_Party/Lora/Crypto/aes.c **** else - 591:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return ( uint8_t )-1; - 592:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return 0; - 1038 .loc 1 592 0 - 1039 02c6 0020 movs r0, #0 - 1040 .LVL129: - 1041 .L18: - 593:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 1042 .loc 1 593 0 - 1043 02c8 15B0 add sp, sp, #84 - 1044 @ sp needed - 1045 02ca 3CBC pop {r2, r3, r4, r5} - 1046 02cc 9046 mov r8, r2 - 1047 02ce 9946 mov r9, r3 - 1048 02d0 A246 mov r10, r4 - 1049 02d2 AB46 mov fp, r5 - 1050 02d4 F0BD pop {r4, r5, r6, r7, pc} - 1051 .LVL130: - 1052 .L21: - 591:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return 0; - 1053 .loc 1 591 0 - 1054 02d6 FF20 movs r0, #255 - 1055 .LVL131: - 1056 02d8 F6E7 b .L18 - 1057 .L23: - 1058 02da C046 .align 2 - 1059 .L22: - ARM GAS /tmp/ccJ0d890.s page 31 - - - 1060 02dc 00000000 .word gfm2_sbox - 1061 02e0 00000000 .word gfm3_sbox - 1062 02e4 00000000 .word sbox - 1063 .cfi_endproc - 1064 .LFE8: - 1066 .section .text.aes_cbc_encrypt,"ax",%progbits - 1067 .align 1 - 1068 .global aes_cbc_encrypt - 1069 .syntax unified - 1070 .code 16 - 1071 .thumb_func - 1072 .fpu softvfp - 1074 aes_cbc_encrypt: - 1075 .LFB9: - 594:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 595:./Middlewares/Third_Party/Lora/Crypto/aes.c **** /* CBC encrypt a number of blocks (input and return an IV) */ - 596:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 597:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return_type aes_cbc_encrypt( const uint8_t *in, uint8_t *out, - 598:./Middlewares/Third_Party/Lora/Crypto/aes.c **** int32_t n_block, uint8_t iv[N_BLOCK], const aes_context ctx[1] ) - 599:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 1076 .loc 1 599 0 - 1077 .cfi_startproc - 1078 @ args = 4, pretend = 0, frame = 0 - 1079 @ frame_needed = 0, uses_anonymous_args = 0 - 1080 .LVL132: - 1081 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 1082 .LCFI7: - 1083 .cfi_def_cfa_offset 24 - 1084 .cfi_offset 3, -24 - 1085 .cfi_offset 4, -20 - 1086 .cfi_offset 5, -16 - 1087 .cfi_offset 6, -12 - 1088 .cfi_offset 7, -8 - 1089 .cfi_offset 14, -4 - 1090 0002 0600 movs r6, r0 - 1091 0004 0D00 movs r5, r1 - 1092 0006 1C00 movs r4, r3 - 1093 .LVL133: - 1094 .L25: - 600:./Middlewares/Third_Party/Lora/Crypto/aes.c **** - 601:./Middlewares/Third_Party/Lora/Crypto/aes.c **** while(n_block--) - 1095 .loc 1 601 0 - 1096 0008 571E subs r7, r2, #1 - 1097 .LVL134: - 1098 000a 002A cmp r2, #0 - 1099 000c 2ED0 beq .L29 - 602:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 603:./Middlewares/Third_Party/Lora/Crypto/aes.c **** xor_block(iv, in); - 1100 .loc 1 603 0 - 1101 000e 3100 movs r1, r6 - 1102 0010 2000 movs r0, r4 - 1103 0012 FFF7FEFF bl xor_block - 1104 .LVL135: - 604:./Middlewares/Third_Party/Lora/Crypto/aes.c **** if(aes_encrypt(iv, iv, ctx) != EXIT_SUCCESS) - 1105 .loc 1 604 0 - 1106 0016 069A ldr r2, [sp, #24] - 1107 0018 2100 movs r1, r4 - ARM GAS /tmp/ccJ0d890.s page 32 - - - 1108 001a 2000 movs r0, r4 - 1109 001c FFF7FEFF bl aes_encrypt - 1110 .LVL136: - 1111 0020 0028 cmp r0, #0 - 1112 0022 25D1 bne .L28 - 1113 .LVL137: - 1114 .LBB34: - 1115 .LBB35: - 323:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 1] = ((uint8_t*)s)[ 1]; - 1116 .loc 1 323 0 - 1117 0024 2378 ldrb r3, [r4] - 1118 0026 2B70 strb r3, [r5] - 324:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 2] = ((uint8_t*)s)[ 2]; - 1119 .loc 1 324 0 - 1120 0028 6378 ldrb r3, [r4, #1] - 1121 002a 6B70 strb r3, [r5, #1] - 325:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 3] = ((uint8_t*)s)[ 3]; - 1122 .loc 1 325 0 - 1123 002c A378 ldrb r3, [r4, #2] - 1124 002e AB70 strb r3, [r5, #2] - 326:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 4] = ((uint8_t*)s)[ 4]; - 1125 .loc 1 326 0 - 1126 0030 E378 ldrb r3, [r4, #3] - 1127 0032 EB70 strb r3, [r5, #3] - 327:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 5] = ((uint8_t*)s)[ 5]; - 1128 .loc 1 327 0 - 1129 0034 2379 ldrb r3, [r4, #4] - 1130 0036 2B71 strb r3, [r5, #4] - 328:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 6] = ((uint8_t*)s)[ 6]; - 1131 .loc 1 328 0 - 1132 0038 6379 ldrb r3, [r4, #5] - 1133 003a 6B71 strb r3, [r5, #5] - 329:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 7] = ((uint8_t*)s)[ 7]; - 1134 .loc 1 329 0 - 1135 003c A379 ldrb r3, [r4, #6] - 1136 003e AB71 strb r3, [r5, #6] - 330:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 8] = ((uint8_t*)s)[ 8]; - 1137 .loc 1 330 0 - 1138 0040 E379 ldrb r3, [r4, #7] - 1139 0042 EB71 strb r3, [r5, #7] - 331:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[ 9] = ((uint8_t*)s)[ 9]; - 1140 .loc 1 331 0 - 1141 0044 237A ldrb r3, [r4, #8] - 1142 0046 2B72 strb r3, [r5, #8] - 332:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[10] = ((uint8_t*)s)[10]; - 1143 .loc 1 332 0 - 1144 0048 637A ldrb r3, [r4, #9] - 1145 004a 6B72 strb r3, [r5, #9] - 333:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[11] = ((uint8_t*)s)[11]; - 1146 .loc 1 333 0 - 1147 004c A37A ldrb r3, [r4, #10] - 1148 004e AB72 strb r3, [r5, #10] - 334:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[12] = ((uint8_t*)s)[12]; - 1149 .loc 1 334 0 - 1150 0050 E37A ldrb r3, [r4, #11] - 1151 0052 EB72 strb r3, [r5, #11] - 335:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[13] = ((uint8_t*)s)[13]; - ARM GAS /tmp/ccJ0d890.s page 33 - - - 1152 .loc 1 335 0 - 1153 0054 237B ldrb r3, [r4, #12] - 1154 0056 2B73 strb r3, [r5, #12] - 336:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[14] = ((uint8_t*)s)[14]; - 1155 .loc 1 336 0 - 1156 0058 637B ldrb r3, [r4, #13] - 1157 005a 6B73 strb r3, [r5, #13] - 337:./Middlewares/Third_Party/Lora/Crypto/aes.c **** ((uint8_t*)d)[15] = ((uint8_t*)s)[15]; - 1158 .loc 1 337 0 - 1159 005c A37B ldrb r3, [r4, #14] - 1160 005e AB73 strb r3, [r5, #14] - 338:./Middlewares/Third_Party/Lora/Crypto/aes.c **** #endif - 1161 .loc 1 338 0 - 1162 0060 E37B ldrb r3, [r4, #15] - 1163 0062 EB73 strb r3, [r5, #15] - 1164 .LVL138: - 1165 .LBE35: - 1166 .LBE34: - 605:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return EXIT_FAILURE; - 606:./Middlewares/Third_Party/Lora/Crypto/aes.c **** //memcpy(out, iv, N_BLOCK); - 607:./Middlewares/Third_Party/Lora/Crypto/aes.c **** block_copy(out, iv); - 608:./Middlewares/Third_Party/Lora/Crypto/aes.c **** in += N_BLOCK; - 1167 .loc 1 608 0 - 1168 0064 1036 adds r6, r6, #16 - 1169 .LVL139: - 609:./Middlewares/Third_Party/Lora/Crypto/aes.c **** out += N_BLOCK; - 1170 .loc 1 609 0 - 1171 0066 1035 adds r5, r5, #16 - 1172 .LVL140: - 601:./Middlewares/Third_Party/Lora/Crypto/aes.c **** { - 1173 .loc 1 601 0 - 1174 0068 3A00 movs r2, r7 - 1175 006a CDE7 b .L25 - 1176 .L29: - 610:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 611:./Middlewares/Third_Party/Lora/Crypto/aes.c **** return EXIT_SUCCESS; - 1177 .loc 1 611 0 - 1178 006c 0020 movs r0, #0 - 1179 .L26: - 612:./Middlewares/Third_Party/Lora/Crypto/aes.c **** } - 1180 .loc 1 612 0 - 1181 @ sp needed - 1182 .LVL141: - 1183 .LVL142: - 1184 .LVL143: - 1185 .LVL144: - 1186 006e F8BD pop {r3, r4, r5, r6, r7, pc} - 1187 .LVL145: - 1188 .L28: - 605:./Middlewares/Third_Party/Lora/Crypto/aes.c **** //memcpy(out, iv, N_BLOCK); - 1189 .loc 1 605 0 - 1190 0070 0120 movs r0, #1 - 1191 0072 FCE7 b .L26 - 1192 .cfi_endproc - 1193 .LFE9: - 1195 .section .rodata.gfm2_sbox,"a",%progbits - 1196 .align 2 - ARM GAS /tmp/ccJ0d890.s page 34 - - - 1199 gfm2_sbox: - 1200 0000 C6 .byte -58 - 1201 0001 F8 .byte -8 - 1202 0002 EE .byte -18 - 1203 0003 F6 .byte -10 - 1204 0004 FF .byte -1 - 1205 0005 D6 .byte -42 - 1206 0006 DE .byte -34 - 1207 0007 91 .byte -111 - 1208 0008 60 .byte 96 - 1209 0009 02 .byte 2 - 1210 000a CE .byte -50 - 1211 000b 56 .byte 86 - 1212 000c E7 .byte -25 - 1213 000d B5 .byte -75 - 1214 000e 4D .byte 77 - 1215 000f EC .byte -20 - 1216 0010 8F .byte -113 - 1217 0011 1F .byte 31 - 1218 0012 89 .byte -119 - 1219 0013 FA .byte -6 - 1220 0014 EF .byte -17 - 1221 0015 B2 .byte -78 - 1222 0016 8E .byte -114 - 1223 0017 FB .byte -5 - 1224 0018 41 .byte 65 - 1225 0019 B3 .byte -77 - 1226 001a 5F .byte 95 - 1227 001b 45 .byte 69 - 1228 001c 23 .byte 35 - 1229 001d 53 .byte 83 - 1230 001e E4 .byte -28 - 1231 001f 9B .byte -101 - 1232 0020 75 .byte 117 - 1233 0021 E1 .byte -31 - 1234 0022 3D .byte 61 - 1235 0023 4C .byte 76 - 1236 0024 6C .byte 108 - 1237 0025 7E .byte 126 - 1238 0026 F5 .byte -11 - 1239 0027 83 .byte -125 - 1240 0028 68 .byte 104 - 1241 0029 51 .byte 81 - 1242 002a D1 .byte -47 - 1243 002b F9 .byte -7 - 1244 002c E2 .byte -30 - 1245 002d AB .byte -85 - 1246 002e 62 .byte 98 - 1247 002f 2A .byte 42 - 1248 0030 08 .byte 8 - 1249 0031 95 .byte -107 - 1250 0032 46 .byte 70 - 1251 0033 9D .byte -99 - 1252 0034 30 .byte 48 - 1253 0035 37 .byte 55 - 1254 0036 0A .byte 10 - 1255 0037 2F .byte 47 - ARM GAS /tmp/ccJ0d890.s page 35 - - - 1256 0038 0E .byte 14 - 1257 0039 24 .byte 36 - 1258 003a 1B .byte 27 - 1259 003b DF .byte -33 - 1260 003c CD .byte -51 - 1261 003d 4E .byte 78 - 1262 003e 7F .byte 127 - 1263 003f EA .byte -22 - 1264 0040 12 .byte 18 - 1265 0041 1D .byte 29 - 1266 0042 58 .byte 88 - 1267 0043 34 .byte 52 - 1268 0044 36 .byte 54 - 1269 0045 DC .byte -36 - 1270 0046 B4 .byte -76 - 1271 0047 5B .byte 91 - 1272 0048 A4 .byte -92 - 1273 0049 76 .byte 118 - 1274 004a B7 .byte -73 - 1275 004b 7D .byte 125 - 1276 004c 52 .byte 82 - 1277 004d DD .byte -35 - 1278 004e 5E .byte 94 - 1279 004f 13 .byte 19 - 1280 0050 A6 .byte -90 - 1281 0051 B9 .byte -71 - 1282 0052 00 .byte 0 - 1283 0053 C1 .byte -63 - 1284 0054 40 .byte 64 - 1285 0055 E3 .byte -29 - 1286 0056 79 .byte 121 - 1287 0057 B6 .byte -74 - 1288 0058 D4 .byte -44 - 1289 0059 8D .byte -115 - 1290 005a 67 .byte 103 - 1291 005b 72 .byte 114 - 1292 005c 94 .byte -108 - 1293 005d 98 .byte -104 - 1294 005e B0 .byte -80 - 1295 005f 85 .byte -123 - 1296 0060 BB .byte -69 - 1297 0061 C5 .byte -59 - 1298 0062 4F .byte 79 - 1299 0063 ED .byte -19 - 1300 0064 86 .byte -122 - 1301 0065 9A .byte -102 - 1302 0066 66 .byte 102 - 1303 0067 11 .byte 17 - 1304 0068 8A .byte -118 - 1305 0069 E9 .byte -23 - 1306 006a 04 .byte 4 - 1307 006b FE .byte -2 - 1308 006c A0 .byte -96 - 1309 006d 78 .byte 120 - 1310 006e 25 .byte 37 - 1311 006f 4B .byte 75 - 1312 0070 A2 .byte -94 - ARM GAS /tmp/ccJ0d890.s page 36 - - - 1313 0071 5D .byte 93 - 1314 0072 80 .byte -128 - 1315 0073 05 .byte 5 - 1316 0074 3F .byte 63 - 1317 0075 21 .byte 33 - 1318 0076 70 .byte 112 - 1319 0077 F1 .byte -15 - 1320 0078 63 .byte 99 - 1321 0079 77 .byte 119 - 1322 007a AF .byte -81 - 1323 007b 42 .byte 66 - 1324 007c 20 .byte 32 - 1325 007d E5 .byte -27 - 1326 007e FD .byte -3 - 1327 007f BF .byte -65 - 1328 0080 81 .byte -127 - 1329 0081 18 .byte 24 - 1330 0082 26 .byte 38 - 1331 0083 C3 .byte -61 - 1332 0084 BE .byte -66 - 1333 0085 35 .byte 53 - 1334 0086 88 .byte -120 - 1335 0087 2E .byte 46 - 1336 0088 93 .byte -109 - 1337 0089 55 .byte 85 - 1338 008a FC .byte -4 - 1339 008b 7A .byte 122 - 1340 008c C8 .byte -56 - 1341 008d BA .byte -70 - 1342 008e 32 .byte 50 - 1343 008f E6 .byte -26 - 1344 0090 C0 .byte -64 - 1345 0091 19 .byte 25 - 1346 0092 9E .byte -98 - 1347 0093 A3 .byte -93 - 1348 0094 44 .byte 68 - 1349 0095 54 .byte 84 - 1350 0096 3B .byte 59 - 1351 0097 0B .byte 11 - 1352 0098 8C .byte -116 - 1353 0099 C7 .byte -57 - 1354 009a 6B .byte 107 - 1355 009b 28 .byte 40 - 1356 009c A7 .byte -89 - 1357 009d BC .byte -68 - 1358 009e 16 .byte 22 - 1359 009f AD .byte -83 - 1360 00a0 DB .byte -37 - 1361 00a1 64 .byte 100 - 1362 00a2 74 .byte 116 - 1363 00a3 14 .byte 20 - 1364 00a4 92 .byte -110 - 1365 00a5 0C .byte 12 - 1366 00a6 48 .byte 72 - 1367 00a7 B8 .byte -72 - 1368 00a8 9F .byte -97 - 1369 00a9 BD .byte -67 - ARM GAS /tmp/ccJ0d890.s page 37 - - - 1370 00aa 43 .byte 67 - 1371 00ab C4 .byte -60 - 1372 00ac 39 .byte 57 - 1373 00ad 31 .byte 49 - 1374 00ae D3 .byte -45 - 1375 00af F2 .byte -14 - 1376 00b0 D5 .byte -43 - 1377 00b1 8B .byte -117 - 1378 00b2 6E .byte 110 - 1379 00b3 DA .byte -38 - 1380 00b4 01 .byte 1 - 1381 00b5 B1 .byte -79 - 1382 00b6 9C .byte -100 - 1383 00b7 49 .byte 73 - 1384 00b8 D8 .byte -40 - 1385 00b9 AC .byte -84 - 1386 00ba F3 .byte -13 - 1387 00bb CF .byte -49 - 1388 00bc CA .byte -54 - 1389 00bd F4 .byte -12 - 1390 00be 47 .byte 71 - 1391 00bf 10 .byte 16 - 1392 00c0 6F .byte 111 - 1393 00c1 F0 .byte -16 - 1394 00c2 4A .byte 74 - 1395 00c3 5C .byte 92 - 1396 00c4 38 .byte 56 - 1397 00c5 57 .byte 87 - 1398 00c6 73 .byte 115 - 1399 00c7 97 .byte -105 - 1400 00c8 CB .byte -53 - 1401 00c9 A1 .byte -95 - 1402 00ca E8 .byte -24 - 1403 00cb 3E .byte 62 - 1404 00cc 96 .byte -106 - 1405 00cd 61 .byte 97 - 1406 00ce 0D .byte 13 - 1407 00cf 0F .byte 15 - 1408 00d0 E0 .byte -32 - 1409 00d1 7C .byte 124 - 1410 00d2 71 .byte 113 - 1411 00d3 CC .byte -52 - 1412 00d4 90 .byte -112 - 1413 00d5 06 .byte 6 - 1414 00d6 F7 .byte -9 - 1415 00d7 1C .byte 28 - 1416 00d8 C2 .byte -62 - 1417 00d9 6A .byte 106 - 1418 00da AE .byte -82 - 1419 00db 69 .byte 105 - 1420 00dc 17 .byte 23 - 1421 00dd 99 .byte -103 - 1422 00de 3A .byte 58 - 1423 00df 27 .byte 39 - 1424 00e0 D9 .byte -39 - 1425 00e1 EB .byte -21 - 1426 00e2 2B .byte 43 - ARM GAS /tmp/ccJ0d890.s page 38 - - - 1427 00e3 22 .byte 34 - 1428 00e4 D2 .byte -46 - 1429 00e5 A9 .byte -87 - 1430 00e6 07 .byte 7 - 1431 00e7 33 .byte 51 - 1432 00e8 2D .byte 45 - 1433 00e9 3C .byte 60 - 1434 00ea 15 .byte 21 - 1435 00eb C9 .byte -55 - 1436 00ec 87 .byte -121 - 1437 00ed AA .byte -86 - 1438 00ee 50 .byte 80 - 1439 00ef A5 .byte -91 - 1440 00f0 03 .byte 3 - 1441 00f1 59 .byte 89 - 1442 00f2 09 .byte 9 - 1443 00f3 1A .byte 26 - 1444 00f4 65 .byte 101 - 1445 00f5 D7 .byte -41 - 1446 00f6 84 .byte -124 - 1447 00f7 D0 .byte -48 - 1448 00f8 82 .byte -126 - 1449 00f9 29 .byte 41 - 1450 00fa 5A .byte 90 - 1451 00fb 1E .byte 30 - 1452 00fc 7B .byte 123 - 1453 00fd A8 .byte -88 - 1454 00fe 6D .byte 109 - 1455 00ff 2C .byte 44 - 1456 .section .rodata.gfm3_sbox,"a",%progbits - 1457 .align 2 - 1460 gfm3_sbox: - 1461 0000 A5 .byte -91 - 1462 0001 84 .byte -124 - 1463 0002 99 .byte -103 - 1464 0003 8D .byte -115 - 1465 0004 0D .byte 13 - 1466 0005 BD .byte -67 - 1467 0006 B1 .byte -79 - 1468 0007 54 .byte 84 - 1469 0008 50 .byte 80 - 1470 0009 03 .byte 3 - 1471 000a A9 .byte -87 - 1472 000b 7D .byte 125 - 1473 000c 19 .byte 25 - 1474 000d 62 .byte 98 - 1475 000e E6 .byte -26 - 1476 000f 9A .byte -102 - 1477 0010 45 .byte 69 - 1478 0011 9D .byte -99 - 1479 0012 40 .byte 64 - 1480 0013 87 .byte -121 - 1481 0014 15 .byte 21 - 1482 0015 EB .byte -21 - 1483 0016 C9 .byte -55 - 1484 0017 0B .byte 11 - 1485 0018 EC .byte -20 - ARM GAS /tmp/ccJ0d890.s page 39 - - - 1486 0019 67 .byte 103 - 1487 001a FD .byte -3 - 1488 001b EA .byte -22 - 1489 001c BF .byte -65 - 1490 001d F7 .byte -9 - 1491 001e 96 .byte -106 - 1492 001f 5B .byte 91 - 1493 0020 C2 .byte -62 - 1494 0021 1C .byte 28 - 1495 0022 AE .byte -82 - 1496 0023 6A .byte 106 - 1497 0024 5A .byte 90 - 1498 0025 41 .byte 65 - 1499 0026 02 .byte 2 - 1500 0027 4F .byte 79 - 1501 0028 5C .byte 92 - 1502 0029 F4 .byte -12 - 1503 002a 34 .byte 52 - 1504 002b 08 .byte 8 - 1505 002c 93 .byte -109 - 1506 002d 73 .byte 115 - 1507 002e 53 .byte 83 - 1508 002f 3F .byte 63 - 1509 0030 0C .byte 12 - 1510 0031 52 .byte 82 - 1511 0032 65 .byte 101 - 1512 0033 5E .byte 94 - 1513 0034 28 .byte 40 - 1514 0035 A1 .byte -95 - 1515 0036 0F .byte 15 - 1516 0037 B5 .byte -75 - 1517 0038 09 .byte 9 - 1518 0039 36 .byte 54 - 1519 003a 9B .byte -101 - 1520 003b 3D .byte 61 - 1521 003c 26 .byte 38 - 1522 003d 69 .byte 105 - 1523 003e CD .byte -51 - 1524 003f 9F .byte -97 - 1525 0040 1B .byte 27 - 1526 0041 9E .byte -98 - 1527 0042 74 .byte 116 - 1528 0043 2E .byte 46 - 1529 0044 2D .byte 45 - 1530 0045 B2 .byte -78 - 1531 0046 EE .byte -18 - 1532 0047 FB .byte -5 - 1533 0048 F6 .byte -10 - 1534 0049 4D .byte 77 - 1535 004a 61 .byte 97 - 1536 004b CE .byte -50 - 1537 004c 7B .byte 123 - 1538 004d 3E .byte 62 - 1539 004e 71 .byte 113 - 1540 004f 97 .byte -105 - 1541 0050 F5 .byte -11 - 1542 0051 68 .byte 104 - ARM GAS /tmp/ccJ0d890.s page 40 - - - 1543 0052 00 .byte 0 - 1544 0053 2C .byte 44 - 1545 0054 60 .byte 96 - 1546 0055 1F .byte 31 - 1547 0056 C8 .byte -56 - 1548 0057 ED .byte -19 - 1549 0058 BE .byte -66 - 1550 0059 46 .byte 70 - 1551 005a D9 .byte -39 - 1552 005b 4B .byte 75 - 1553 005c DE .byte -34 - 1554 005d D4 .byte -44 - 1555 005e E8 .byte -24 - 1556 005f 4A .byte 74 - 1557 0060 6B .byte 107 - 1558 0061 2A .byte 42 - 1559 0062 E5 .byte -27 - 1560 0063 16 .byte 22 - 1561 0064 C5 .byte -59 - 1562 0065 D7 .byte -41 - 1563 0066 55 .byte 85 - 1564 0067 94 .byte -108 - 1565 0068 CF .byte -49 - 1566 0069 10 .byte 16 - 1567 006a 06 .byte 6 - 1568 006b 81 .byte -127 - 1569 006c F0 .byte -16 - 1570 006d 44 .byte 68 - 1571 006e BA .byte -70 - 1572 006f E3 .byte -29 - 1573 0070 F3 .byte -13 - 1574 0071 FE .byte -2 - 1575 0072 C0 .byte -64 - 1576 0073 8A .byte -118 - 1577 0074 AD .byte -83 - 1578 0075 BC .byte -68 - 1579 0076 48 .byte 72 - 1580 0077 04 .byte 4 - 1581 0078 DF .byte -33 - 1582 0079 C1 .byte -63 - 1583 007a 75 .byte 117 - 1584 007b 63 .byte 99 - 1585 007c 30 .byte 48 - 1586 007d 1A .byte 26 - 1587 007e 0E .byte 14 - 1588 007f 6D .byte 109 - 1589 0080 4C .byte 76 - 1590 0081 14 .byte 20 - 1591 0082 35 .byte 53 - 1592 0083 2F .byte 47 - 1593 0084 E1 .byte -31 - 1594 0085 A2 .byte -94 - 1595 0086 CC .byte -52 - 1596 0087 39 .byte 57 - 1597 0088 57 .byte 87 - 1598 0089 F2 .byte -14 - 1599 008a 82 .byte -126 - ARM GAS /tmp/ccJ0d890.s page 41 - - - 1600 008b 47 .byte 71 - 1601 008c AC .byte -84 - 1602 008d E7 .byte -25 - 1603 008e 2B .byte 43 - 1604 008f 95 .byte -107 - 1605 0090 A0 .byte -96 - 1606 0091 98 .byte -104 - 1607 0092 D1 .byte -47 - 1608 0093 7F .byte 127 - 1609 0094 66 .byte 102 - 1610 0095 7E .byte 126 - 1611 0096 AB .byte -85 - 1612 0097 83 .byte -125 - 1613 0098 CA .byte -54 - 1614 0099 29 .byte 41 - 1615 009a D3 .byte -45 - 1616 009b 3C .byte 60 - 1617 009c 79 .byte 121 - 1618 009d E2 .byte -30 - 1619 009e 1D .byte 29 - 1620 009f 76 .byte 118 - 1621 00a0 3B .byte 59 - 1622 00a1 56 .byte 86 - 1623 00a2 4E .byte 78 - 1624 00a3 1E .byte 30 - 1625 00a4 DB .byte -37 - 1626 00a5 0A .byte 10 - 1627 00a6 6C .byte 108 - 1628 00a7 E4 .byte -28 - 1629 00a8 5D .byte 93 - 1630 00a9 6E .byte 110 - 1631 00aa EF .byte -17 - 1632 00ab A6 .byte -90 - 1633 00ac A8 .byte -88 - 1634 00ad A4 .byte -92 - 1635 00ae 37 .byte 55 - 1636 00af 8B .byte -117 - 1637 00b0 32 .byte 50 - 1638 00b1 43 .byte 67 - 1639 00b2 59 .byte 89 - 1640 00b3 B7 .byte -73 - 1641 00b4 8C .byte -116 - 1642 00b5 64 .byte 100 - 1643 00b6 D2 .byte -46 - 1644 00b7 E0 .byte -32 - 1645 00b8 B4 .byte -76 - 1646 00b9 FA .byte -6 - 1647 00ba 07 .byte 7 - 1648 00bb 25 .byte 37 - 1649 00bc AF .byte -81 - 1650 00bd 8E .byte -114 - 1651 00be E9 .byte -23 - 1652 00bf 18 .byte 24 - 1653 00c0 D5 .byte -43 - 1654 00c1 88 .byte -120 - 1655 00c2 6F .byte 111 - 1656 00c3 72 .byte 114 - ARM GAS /tmp/ccJ0d890.s page 42 - - - 1657 00c4 24 .byte 36 - 1658 00c5 F1 .byte -15 - 1659 00c6 C7 .byte -57 - 1660 00c7 51 .byte 81 - 1661 00c8 23 .byte 35 - 1662 00c9 7C .byte 124 - 1663 00ca 9C .byte -100 - 1664 00cb 21 .byte 33 - 1665 00cc DD .byte -35 - 1666 00cd DC .byte -36 - 1667 00ce 86 .byte -122 - 1668 00cf 85 .byte -123 - 1669 00d0 90 .byte -112 - 1670 00d1 42 .byte 66 - 1671 00d2 C4 .byte -60 - 1672 00d3 AA .byte -86 - 1673 00d4 D8 .byte -40 - 1674 00d5 05 .byte 5 - 1675 00d6 01 .byte 1 - 1676 00d7 12 .byte 18 - 1677 00d8 A3 .byte -93 - 1678 00d9 5F .byte 95 - 1679 00da F9 .byte -7 - 1680 00db D0 .byte -48 - 1681 00dc 91 .byte -111 - 1682 00dd 58 .byte 88 - 1683 00de 27 .byte 39 - 1684 00df B9 .byte -71 - 1685 00e0 38 .byte 56 - 1686 00e1 13 .byte 19 - 1687 00e2 B3 .byte -77 - 1688 00e3 33 .byte 51 - 1689 00e4 BB .byte -69 - 1690 00e5 70 .byte 112 - 1691 00e6 89 .byte -119 - 1692 00e7 A7 .byte -89 - 1693 00e8 B6 .byte -74 - 1694 00e9 22 .byte 34 - 1695 00ea 92 .byte -110 - 1696 00eb 20 .byte 32 - 1697 00ec 49 .byte 73 - 1698 00ed FF .byte -1 - 1699 00ee 78 .byte 120 - 1700 00ef 7A .byte 122 - 1701 00f0 8F .byte -113 - 1702 00f1 F8 .byte -8 - 1703 00f2 80 .byte -128 - 1704 00f3 17 .byte 23 - 1705 00f4 DA .byte -38 - 1706 00f5 31 .byte 49 - 1707 00f6 C6 .byte -58 - 1708 00f7 B8 .byte -72 - 1709 00f8 C3 .byte -61 - 1710 00f9 B0 .byte -80 - 1711 00fa 77 .byte 119 - 1712 00fb 11 .byte 17 - 1713 00fc CB .byte -53 - ARM GAS /tmp/ccJ0d890.s page 43 - - - 1714 00fd FC .byte -4 - 1715 00fe D6 .byte -42 - 1716 00ff 3A .byte 58 - 1717 .section .rodata.sbox,"a",%progbits - 1718 .align 2 - 1721 sbox: - 1722 0000 63 .byte 99 - 1723 0001 7C .byte 124 - 1724 0002 77 .byte 119 - 1725 0003 7B .byte 123 - 1726 0004 F2 .byte -14 - 1727 0005 6B .byte 107 - 1728 0006 6F .byte 111 - 1729 0007 C5 .byte -59 - 1730 0008 30 .byte 48 - 1731 0009 01 .byte 1 - 1732 000a 67 .byte 103 - 1733 000b 2B .byte 43 - 1734 000c FE .byte -2 - 1735 000d D7 .byte -41 - 1736 000e AB .byte -85 - 1737 000f 76 .byte 118 - 1738 0010 CA .byte -54 - 1739 0011 82 .byte -126 - 1740 0012 C9 .byte -55 - 1741 0013 7D .byte 125 - 1742 0014 FA .byte -6 - 1743 0015 59 .byte 89 - 1744 0016 47 .byte 71 - 1745 0017 F0 .byte -16 - 1746 0018 AD .byte -83 - 1747 0019 D4 .byte -44 - 1748 001a A2 .byte -94 - 1749 001b AF .byte -81 - 1750 001c 9C .byte -100 - 1751 001d A4 .byte -92 - 1752 001e 72 .byte 114 - 1753 001f C0 .byte -64 - 1754 0020 B7 .byte -73 - 1755 0021 FD .byte -3 - 1756 0022 93 .byte -109 - 1757 0023 26 .byte 38 - 1758 0024 36 .byte 54 - 1759 0025 3F .byte 63 - 1760 0026 F7 .byte -9 - 1761 0027 CC .byte -52 - 1762 0028 34 .byte 52 - 1763 0029 A5 .byte -91 - 1764 002a E5 .byte -27 - 1765 002b F1 .byte -15 - 1766 002c 71 .byte 113 - 1767 002d D8 .byte -40 - 1768 002e 31 .byte 49 - 1769 002f 15 .byte 21 - 1770 0030 04 .byte 4 - 1771 0031 C7 .byte -57 - 1772 0032 23 .byte 35 - ARM GAS /tmp/ccJ0d890.s page 44 - - - 1773 0033 C3 .byte -61 - 1774 0034 18 .byte 24 - 1775 0035 96 .byte -106 - 1776 0036 05 .byte 5 - 1777 0037 9A .byte -102 - 1778 0038 07 .byte 7 - 1779 0039 12 .byte 18 - 1780 003a 80 .byte -128 - 1781 003b E2 .byte -30 - 1782 003c EB .byte -21 - 1783 003d 27 .byte 39 - 1784 003e B2 .byte -78 - 1785 003f 75 .byte 117 - 1786 0040 09 .byte 9 - 1787 0041 83 .byte -125 - 1788 0042 2C .byte 44 - 1789 0043 1A .byte 26 - 1790 0044 1B .byte 27 - 1791 0045 6E .byte 110 - 1792 0046 5A .byte 90 - 1793 0047 A0 .byte -96 - 1794 0048 52 .byte 82 - 1795 0049 3B .byte 59 - 1796 004a D6 .byte -42 - 1797 004b B3 .byte -77 - 1798 004c 29 .byte 41 - 1799 004d E3 .byte -29 - 1800 004e 2F .byte 47 - 1801 004f 84 .byte -124 - 1802 0050 53 .byte 83 - 1803 0051 D1 .byte -47 - 1804 0052 00 .byte 0 - 1805 0053 ED .byte -19 - 1806 0054 20 .byte 32 - 1807 0055 FC .byte -4 - 1808 0056 B1 .byte -79 - 1809 0057 5B .byte 91 - 1810 0058 6A .byte 106 - 1811 0059 CB .byte -53 - 1812 005a BE .byte -66 - 1813 005b 39 .byte 57 - 1814 005c 4A .byte 74 - 1815 005d 4C .byte 76 - 1816 005e 58 .byte 88 - 1817 005f CF .byte -49 - 1818 0060 D0 .byte -48 - 1819 0061 EF .byte -17 - 1820 0062 AA .byte -86 - 1821 0063 FB .byte -5 - 1822 0064 43 .byte 67 - 1823 0065 4D .byte 77 - 1824 0066 33 .byte 51 - 1825 0067 85 .byte -123 - 1826 0068 45 .byte 69 - 1827 0069 F9 .byte -7 - 1828 006a 02 .byte 2 - 1829 006b 7F .byte 127 - ARM GAS /tmp/ccJ0d890.s page 45 - - - 1830 006c 50 .byte 80 - 1831 006d 3C .byte 60 - 1832 006e 9F .byte -97 - 1833 006f A8 .byte -88 - 1834 0070 51 .byte 81 - 1835 0071 A3 .byte -93 - 1836 0072 40 .byte 64 - 1837 0073 8F .byte -113 - 1838 0074 92 .byte -110 - 1839 0075 9D .byte -99 - 1840 0076 38 .byte 56 - 1841 0077 F5 .byte -11 - 1842 0078 BC .byte -68 - 1843 0079 B6 .byte -74 - 1844 007a DA .byte -38 - 1845 007b 21 .byte 33 - 1846 007c 10 .byte 16 - 1847 007d FF .byte -1 - 1848 007e F3 .byte -13 - 1849 007f D2 .byte -46 - 1850 0080 CD .byte -51 - 1851 0081 0C .byte 12 - 1852 0082 13 .byte 19 - 1853 0083 EC .byte -20 - 1854 0084 5F .byte 95 - 1855 0085 97 .byte -105 - 1856 0086 44 .byte 68 - 1857 0087 17 .byte 23 - 1858 0088 C4 .byte -60 - 1859 0089 A7 .byte -89 - 1860 008a 7E .byte 126 - 1861 008b 3D .byte 61 - 1862 008c 64 .byte 100 - 1863 008d 5D .byte 93 - 1864 008e 19 .byte 25 - 1865 008f 73 .byte 115 - 1866 0090 60 .byte 96 - 1867 0091 81 .byte -127 - 1868 0092 4F .byte 79 - 1869 0093 DC .byte -36 - 1870 0094 22 .byte 34 - 1871 0095 2A .byte 42 - 1872 0096 90 .byte -112 - 1873 0097 88 .byte -120 - 1874 0098 46 .byte 70 - 1875 0099 EE .byte -18 - 1876 009a B8 .byte -72 - 1877 009b 14 .byte 20 - 1878 009c DE .byte -34 - 1879 009d 5E .byte 94 - 1880 009e 0B .byte 11 - 1881 009f DB .byte -37 - 1882 00a0 E0 .byte -32 - 1883 00a1 32 .byte 50 - 1884 00a2 3A .byte 58 - 1885 00a3 0A .byte 10 - 1886 00a4 49 .byte 73 - ARM GAS /tmp/ccJ0d890.s page 46 - - - 1887 00a5 06 .byte 6 - 1888 00a6 24 .byte 36 - 1889 00a7 5C .byte 92 - 1890 00a8 C2 .byte -62 - 1891 00a9 D3 .byte -45 - 1892 00aa AC .byte -84 - 1893 00ab 62 .byte 98 - 1894 00ac 91 .byte -111 - 1895 00ad 95 .byte -107 - 1896 00ae E4 .byte -28 - 1897 00af 79 .byte 121 - 1898 00b0 E7 .byte -25 - 1899 00b1 C8 .byte -56 - 1900 00b2 37 .byte 55 - 1901 00b3 6D .byte 109 - 1902 00b4 8D .byte -115 - 1903 00b5 D5 .byte -43 - 1904 00b6 4E .byte 78 - 1905 00b7 A9 .byte -87 - 1906 00b8 6C .byte 108 - 1907 00b9 56 .byte 86 - 1908 00ba F4 .byte -12 - 1909 00bb EA .byte -22 - 1910 00bc 65 .byte 101 - 1911 00bd 7A .byte 122 - 1912 00be AE .byte -82 - 1913 00bf 08 .byte 8 - 1914 00c0 BA .byte -70 - 1915 00c1 78 .byte 120 - 1916 00c2 25 .byte 37 - 1917 00c3 2E .byte 46 - 1918 00c4 1C .byte 28 - 1919 00c5 A6 .byte -90 - 1920 00c6 B4 .byte -76 - 1921 00c7 C6 .byte -58 - 1922 00c8 E8 .byte -24 - 1923 00c9 DD .byte -35 - 1924 00ca 74 .byte 116 - 1925 00cb 1F .byte 31 - 1926 00cc 4B .byte 75 - 1927 00cd BD .byte -67 - 1928 00ce 8B .byte -117 - 1929 00cf 8A .byte -118 - 1930 00d0 70 .byte 112 - 1931 00d1 3E .byte 62 - 1932 00d2 B5 .byte -75 - 1933 00d3 66 .byte 102 - 1934 00d4 48 .byte 72 - 1935 00d5 03 .byte 3 - 1936 00d6 F6 .byte -10 - 1937 00d7 0E .byte 14 - 1938 00d8 61 .byte 97 - 1939 00d9 35 .byte 53 - 1940 00da 57 .byte 87 - 1941 00db B9 .byte -71 - 1942 00dc 86 .byte -122 - 1943 00dd C1 .byte -63 - ARM GAS /tmp/ccJ0d890.s page 47 - - - 1944 00de 1D .byte 29 - 1945 00df 9E .byte -98 - 1946 00e0 E1 .byte -31 - 1947 00e1 F8 .byte -8 - 1948 00e2 98 .byte -104 - 1949 00e3 11 .byte 17 - 1950 00e4 69 .byte 105 - 1951 00e5 D9 .byte -39 - 1952 00e6 8E .byte -114 - 1953 00e7 94 .byte -108 - 1954 00e8 9B .byte -101 - 1955 00e9 1E .byte 30 - 1956 00ea 87 .byte -121 - 1957 00eb E9 .byte -23 - 1958 00ec CE .byte -50 - 1959 00ed 55 .byte 85 - 1960 00ee 28 .byte 40 - 1961 00ef DF .byte -33 - 1962 00f0 8C .byte -116 - 1963 00f1 A1 .byte -95 - 1964 00f2 89 .byte -119 - 1965 00f3 0D .byte 13 - 1966 00f4 BF .byte -65 - 1967 00f5 E6 .byte -26 - 1968 00f6 42 .byte 66 - 1969 00f7 68 .byte 104 - 1970 00f8 41 .byte 65 - 1971 00f9 99 .byte -103 - 1972 00fa 2D .byte 45 - 1973 00fb 0F .byte 15 - 1974 00fc B0 .byte -80 - 1975 00fd 54 .byte 84 - 1976 00fe BB .byte -69 - 1977 00ff 16 .byte 22 - 1978 .text - 1979 .Letext0: - 1980 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 1981 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 1982 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 1983 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 1984 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 1985 .file 7 "/usr/arm-none-eabi/include/stdlib.h" - 1986 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h" - 1987 .file 9 "./Middlewares/Third_Party/Lora/Crypto/aes.h" - ARM GAS /tmp/ccJ0d890.s page 48 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 aes.c - /tmp/ccJ0d890.s:16 .text.xor_block:0000000000000000 $t - /tmp/ccJ0d890.s:22 .text.xor_block:0000000000000000 xor_block - /tmp/ccJ0d890.s:118 .text.copy_and_key:0000000000000000 $t - /tmp/ccJ0d890.s:124 .text.copy_and_key:0000000000000000 copy_and_key - /tmp/ccJ0d890.s:225 .text.aes_set_key:0000000000000000 $t - /tmp/ccJ0d890.s:232 .text.aes_set_key:0000000000000000 aes_set_key - /tmp/ccJ0d890.s:498 .text.aes_set_key:0000000000000128 $d - /tmp/ccJ0d890.s:1721 .rodata.sbox:0000000000000000 sbox - /tmp/ccJ0d890.s:503 .text.aes_encrypt:0000000000000000 $t - /tmp/ccJ0d890.s:510 .text.aes_encrypt:0000000000000000 aes_encrypt - /tmp/ccJ0d890.s:1060 .text.aes_encrypt:00000000000002dc $d - /tmp/ccJ0d890.s:1199 .rodata.gfm2_sbox:0000000000000000 gfm2_sbox - /tmp/ccJ0d890.s:1460 .rodata.gfm3_sbox:0000000000000000 gfm3_sbox - /tmp/ccJ0d890.s:1067 .text.aes_cbc_encrypt:0000000000000000 $t - /tmp/ccJ0d890.s:1074 .text.aes_cbc_encrypt:0000000000000000 aes_cbc_encrypt - /tmp/ccJ0d890.s:1196 .rodata.gfm2_sbox:0000000000000000 $d - /tmp/ccJ0d890.s:1457 .rodata.gfm3_sbox:0000000000000000 $d - /tmp/ccJ0d890.s:1718 .rodata.sbox:0000000000000000 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -__aeabi_uidivmod diff --git a/build/bees.bin b/build/bees.bin deleted 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@param[in] dev :Structure instance of bme680_dev. - 85:Drivers/BME680/bme680.c **** * - 86:Drivers/BME680/bme680.c **** * @return Result of API execution status. - 87:Drivers/BME680/bme680.c **** * @retval zero -> Success / +ve value -> Warning / -ve value -> Error - 88:Drivers/BME680/bme680.c **** */ - 89:Drivers/BME680/bme680.c **** static int8_t set_gas_config(struct bme680_dev *dev); - 90:Drivers/BME680/bme680.c **** - 91:Drivers/BME680/bme680.c **** /*! - ARM GAS /tmp/ccvbgJts.s page 3 - - - 92:Drivers/BME680/bme680.c **** * @brief This internal API is used to get the gas configuration of the sensor. - 93:Drivers/BME680/bme680.c **** * - 94:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 95:Drivers/BME680/bme680.c **** * - 96:Drivers/BME680/bme680.c **** * @return Result of API execution status. - 97:Drivers/BME680/bme680.c **** * @retval zero -> Success / +ve value -> Warning / -ve value -> Error - 98:Drivers/BME680/bme680.c **** */ - 99:Drivers/BME680/bme680.c **** static int8_t get_gas_config(struct bme680_dev *dev); - 100:Drivers/BME680/bme680.c **** - 101:Drivers/BME680/bme680.c **** /*! - 102:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the Heat duration value. - 103:Drivers/BME680/bme680.c **** * - 104:Drivers/BME680/bme680.c **** * @param[in] dur :Value of the duration to be shared. - 105:Drivers/BME680/bme680.c **** * - 106:Drivers/BME680/bme680.c **** * @return uint8_t threshold duration after calculation. - 107:Drivers/BME680/bme680.c **** */ - 108:Drivers/BME680/bme680.c **** static uint8_t calc_heater_dur(uint16_t dur); - 109:Drivers/BME680/bme680.c **** - 110:Drivers/BME680/bme680.c **** /*! - 111:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the temperature value. - 112:Drivers/BME680/bme680.c **** * - 113:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 114:Drivers/BME680/bme680.c **** * @param[in] temp_adc :Contains the temperature ADC value . - 115:Drivers/BME680/bme680.c **** * - 116:Drivers/BME680/bme680.c **** * @return uint32_t calculated temperature. - 117:Drivers/BME680/bme680.c **** */ - 118:Drivers/BME680/bme680.c **** static int16_t calc_temperature(uint32_t temp_adc, struct bme680_dev *dev); - 119:Drivers/BME680/bme680.c **** - 120:Drivers/BME680/bme680.c **** /*! - 121:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the pressure value. - 122:Drivers/BME680/bme680.c **** * - 123:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 124:Drivers/BME680/bme680.c **** * @param[in] pres_adc :Contains the pressure ADC value . - 125:Drivers/BME680/bme680.c **** * - 126:Drivers/BME680/bme680.c **** * @return uint32_t calculated pressure. - 127:Drivers/BME680/bme680.c **** */ - 128:Drivers/BME680/bme680.c **** static uint32_t calc_pressure(uint32_t pres_adc, const struct bme680_dev *dev); - 129:Drivers/BME680/bme680.c **** - 130:Drivers/BME680/bme680.c **** /*! - 131:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the humidity value. - 132:Drivers/BME680/bme680.c **** * - 133:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 134:Drivers/BME680/bme680.c **** * @param[in] hum_adc :Contains the humidity ADC value. - 135:Drivers/BME680/bme680.c **** * - 136:Drivers/BME680/bme680.c **** * @return uint32_t calculated humidity. - 137:Drivers/BME680/bme680.c **** */ - 138:Drivers/BME680/bme680.c **** static uint32_t calc_humidity(uint16_t hum_adc, const struct bme680_dev *dev); - 139:Drivers/BME680/bme680.c **** - 140:Drivers/BME680/bme680.c **** /*! - 141:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the Gas Resistance value. - 142:Drivers/BME680/bme680.c **** * - 143:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 144:Drivers/BME680/bme680.c **** * @param[in] gas_res_adc :Contains the Gas Resistance ADC value. - 145:Drivers/BME680/bme680.c **** * @param[in] gas_range :Contains the range of gas values. - 146:Drivers/BME680/bme680.c **** * - 147:Drivers/BME680/bme680.c **** * @return uint32_t calculated gas resistance. - 148:Drivers/BME680/bme680.c **** */ - ARM GAS /tmp/ccvbgJts.s page 4 - - - 149:Drivers/BME680/bme680.c **** static uint32_t calc_gas_resistance(uint16_t gas_res_adc, uint8_t gas_range, const struct bme680_de - 150:Drivers/BME680/bme680.c **** - 151:Drivers/BME680/bme680.c **** /*! - 152:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the Heat Resistance value. - 153:Drivers/BME680/bme680.c **** * - 154:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 155:Drivers/BME680/bme680.c **** * @param[in] temp :Contains the temporary value. - 156:Drivers/BME680/bme680.c **** * - 157:Drivers/BME680/bme680.c **** * @return uint8_t calculated heater resistance. - 158:Drivers/BME680/bme680.c **** */ - 159:Drivers/BME680/bme680.c **** static uint8_t calc_heater_res(uint16_t temp, const struct bme680_dev *dev); - 160:Drivers/BME680/bme680.c **** - 161:Drivers/BME680/bme680.c **** /*! - 162:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the field data of sensor. - 163:Drivers/BME680/bme680.c **** * - 164:Drivers/BME680/bme680.c **** * @param[out] data :Structure instance to hold the data - 165:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 166:Drivers/BME680/bme680.c **** * - 167:Drivers/BME680/bme680.c **** * @return int8_t result of the field data from sensor. - 168:Drivers/BME680/bme680.c **** */ - 169:Drivers/BME680/bme680.c **** static int8_t read_field_data(struct bme680_field_data *data, struct bme680_dev *dev); - 170:Drivers/BME680/bme680.c **** - 171:Drivers/BME680/bme680.c **** /*! - 172:Drivers/BME680/bme680.c **** * @brief This internal API is used to set the memory page - 173:Drivers/BME680/bme680.c **** * based on register address. - 174:Drivers/BME680/bme680.c **** * - 175:Drivers/BME680/bme680.c **** * The value of memory page - 176:Drivers/BME680/bme680.c **** * value | Description - 177:Drivers/BME680/bme680.c **** * --------|-------------- - 178:Drivers/BME680/bme680.c **** * 0 | BME680_PAGE0_SPI - 179:Drivers/BME680/bme680.c **** * 1 | BME680_PAGE1_SPI - 180:Drivers/BME680/bme680.c **** * - 181:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 182:Drivers/BME680/bme680.c **** * @param[in] reg_addr :Contains the register address array. - 183:Drivers/BME680/bme680.c **** * - 184:Drivers/BME680/bme680.c **** * @return Result of API execution status - 185:Drivers/BME680/bme680.c **** * @retval zero -> Success / +ve value -> Warning / -ve value -> Error - 186:Drivers/BME680/bme680.c **** */ - 187:Drivers/BME680/bme680.c **** static int8_t set_mem_page(uint8_t reg_addr, struct bme680_dev *dev); - 188:Drivers/BME680/bme680.c **** - 189:Drivers/BME680/bme680.c **** /*! - 190:Drivers/BME680/bme680.c **** * @brief This internal API is used to get the memory page based - 191:Drivers/BME680/bme680.c **** * on register address. - 192:Drivers/BME680/bme680.c **** * - 193:Drivers/BME680/bme680.c **** * The value of memory page - 194:Drivers/BME680/bme680.c **** * value | Description - 195:Drivers/BME680/bme680.c **** * --------|-------------- - 196:Drivers/BME680/bme680.c **** * 0 | BME680_PAGE0_SPI - 197:Drivers/BME680/bme680.c **** * 1 | BME680_PAGE1_SPI - 198:Drivers/BME680/bme680.c **** * - 199:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 200:Drivers/BME680/bme680.c **** * - 201:Drivers/BME680/bme680.c **** * @return Result of API execution status - 202:Drivers/BME680/bme680.c **** * @retval zero -> Success / +ve value -> Warning / -ve value -> Error - 203:Drivers/BME680/bme680.c **** */ - 204:Drivers/BME680/bme680.c **** static int8_t get_mem_page(struct bme680_dev *dev); - 205:Drivers/BME680/bme680.c **** - ARM GAS /tmp/ccvbgJts.s page 5 - - - 206:Drivers/BME680/bme680.c **** /*! - 207:Drivers/BME680/bme680.c **** * @brief This internal API is used to validate the device pointer for - 208:Drivers/BME680/bme680.c **** * null conditions. - 209:Drivers/BME680/bme680.c **** * - 210:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 211:Drivers/BME680/bme680.c **** * - 212:Drivers/BME680/bme680.c **** * @return Result of API execution status - 213:Drivers/BME680/bme680.c **** * @retval zero -> Success / +ve value -> Warning / -ve value -> Error - 214:Drivers/BME680/bme680.c **** */ - 215:Drivers/BME680/bme680.c **** static int8_t null_ptr_check(const struct bme680_dev *dev); - 216:Drivers/BME680/bme680.c **** - 217:Drivers/BME680/bme680.c **** /*! - 218:Drivers/BME680/bme680.c **** * @brief This internal API is used to check the boundary - 219:Drivers/BME680/bme680.c **** * conditions. - 220:Drivers/BME680/bme680.c **** * - 221:Drivers/BME680/bme680.c **** * @param[in] value :pointer to the value. - 222:Drivers/BME680/bme680.c **** * @param[in] min :minimum value. - 223:Drivers/BME680/bme680.c **** * @param[in] max :maximum value. - 224:Drivers/BME680/bme680.c **** * @param[in] dev :Structure instance of bme680_dev. - 225:Drivers/BME680/bme680.c **** * - 226:Drivers/BME680/bme680.c **** * @return Result of API execution status - 227:Drivers/BME680/bme680.c **** * @retval zero -> Success / +ve value -> Warning / -ve value -> Error - 228:Drivers/BME680/bme680.c **** */ - 229:Drivers/BME680/bme680.c **** static int8_t boundary_check(uint8_t *value, uint8_t min, uint8_t max, struct bme680_dev *dev); - 230:Drivers/BME680/bme680.c **** - 231:Drivers/BME680/bme680.c **** /****************** Global Function Definitions *******************************/ - 232:Drivers/BME680/bme680.c **** /*! - 233:Drivers/BME680/bme680.c **** *@brief This API is the entry point. - 234:Drivers/BME680/bme680.c **** *It reads the chip-id and calibration data from the sensor. - 235:Drivers/BME680/bme680.c **** */ - 236:Drivers/BME680/bme680.c **** int8_t bme680_init(struct bme680_dev *dev) - 237:Drivers/BME680/bme680.c **** { - 238:Drivers/BME680/bme680.c **** int8_t rslt; - 239:Drivers/BME680/bme680.c **** - 240:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 241:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 242:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 243:Drivers/BME680/bme680.c **** /* Soft reset to restore it to default values*/ - 244:Drivers/BME680/bme680.c **** rslt = bme680_soft_reset(dev); - 245:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 246:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_CHIP_ID_ADDR, &dev->chip_id, 1, dev); - 247:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 248:Drivers/BME680/bme680.c **** if (dev->chip_id == BME680_CHIP_ID) { - 249:Drivers/BME680/bme680.c **** /* Get the Calibration data */ - 250:Drivers/BME680/bme680.c **** rslt = get_calib_data(dev); - 251:Drivers/BME680/bme680.c **** } else { - 252:Drivers/BME680/bme680.c **** rslt = BME680_E_DEV_NOT_FOUND; - 253:Drivers/BME680/bme680.c **** } - 254:Drivers/BME680/bme680.c **** } - 255:Drivers/BME680/bme680.c **** } - 256:Drivers/BME680/bme680.c **** } - 257:Drivers/BME680/bme680.c **** - 258:Drivers/BME680/bme680.c **** return rslt; - 259:Drivers/BME680/bme680.c **** } - 260:Drivers/BME680/bme680.c **** - 261:Drivers/BME680/bme680.c **** /*! - 262:Drivers/BME680/bme680.c **** * @brief This API reads the data from the given register address of the sensor. - ARM GAS /tmp/ccvbgJts.s page 6 - - - 263:Drivers/BME680/bme680.c **** */ - 264:Drivers/BME680/bme680.c **** int8_t bme680_get_regs(uint8_t reg_addr, uint8_t *reg_data, uint16_t len, struct bme680_dev *dev) - 265:Drivers/BME680/bme680.c **** { - 266:Drivers/BME680/bme680.c **** int8_t rslt; - 267:Drivers/BME680/bme680.c **** - 268:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 269:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 270:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 271:Drivers/BME680/bme680.c **** if (dev->intf == BME680_SPI_INTF) { - 272:Drivers/BME680/bme680.c **** /* Set the memory page */ - 273:Drivers/BME680/bme680.c **** rslt = set_mem_page(reg_addr, dev); - 274:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 275:Drivers/BME680/bme680.c **** reg_addr = reg_addr | BME680_SPI_RD_MSK; - 276:Drivers/BME680/bme680.c **** } - 277:Drivers/BME680/bme680.c **** dev->com_rslt = dev->read(dev->dev_id, reg_addr, reg_data, len); - 278:Drivers/BME680/bme680.c **** if (dev->com_rslt != 0) - 279:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; - 280:Drivers/BME680/bme680.c **** } - 281:Drivers/BME680/bme680.c **** - 282:Drivers/BME680/bme680.c **** return rslt; - 283:Drivers/BME680/bme680.c **** } - 284:Drivers/BME680/bme680.c **** - 285:Drivers/BME680/bme680.c **** /*! - 286:Drivers/BME680/bme680.c **** * @brief This API writes the given data to the register address - 287:Drivers/BME680/bme680.c **** * of the sensor. - 288:Drivers/BME680/bme680.c **** */ - 289:Drivers/BME680/bme680.c **** int8_t bme680_set_regs(const uint8_t *reg_addr, const uint8_t *reg_data, uint8_t len, struct bme680 - 290:Drivers/BME680/bme680.c **** { - 291:Drivers/BME680/bme680.c **** int8_t rslt; - 292:Drivers/BME680/bme680.c **** /* Length of the temporary buffer is 2*(length of register)*/ - 293:Drivers/BME680/bme680.c **** uint8_t tmp_buff[BME680_TMP_BUFFER_LENGTH] = { 0 }; - 294:Drivers/BME680/bme680.c **** uint16_t index; - 295:Drivers/BME680/bme680.c **** - 296:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 297:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 298:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 299:Drivers/BME680/bme680.c **** if ((len > 0) && (len < BME680_TMP_BUFFER_LENGTH / 2)) { - 300:Drivers/BME680/bme680.c **** /* Interleave the 2 arrays */ - 301:Drivers/BME680/bme680.c **** for (index = 0; index < len; index++) { - 302:Drivers/BME680/bme680.c **** if (dev->intf == BME680_SPI_INTF) { - 303:Drivers/BME680/bme680.c **** /* Set the memory page */ - 304:Drivers/BME680/bme680.c **** rslt = set_mem_page(reg_addr[index], dev); - 305:Drivers/BME680/bme680.c **** tmp_buff[(2 * index)] = reg_addr[index] & BME680_SPI_WR_MSK; - 306:Drivers/BME680/bme680.c **** } else { - 307:Drivers/BME680/bme680.c **** tmp_buff[(2 * index)] = reg_addr[index]; - 308:Drivers/BME680/bme680.c **** } - 309:Drivers/BME680/bme680.c **** tmp_buff[(2 * index) + 1] = reg_data[index]; - 310:Drivers/BME680/bme680.c **** } - 311:Drivers/BME680/bme680.c **** /* Write the interleaved array */ - 312:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 313:Drivers/BME680/bme680.c **** dev->com_rslt = dev->write(dev->dev_id, tmp_buff[0], &tmp_buff[1], (2 * len) - 1); - 314:Drivers/BME680/bme680.c **** if (dev->com_rslt != 0) - 315:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; - 316:Drivers/BME680/bme680.c **** } - 317:Drivers/BME680/bme680.c **** } else { - 318:Drivers/BME680/bme680.c **** rslt = BME680_E_INVALID_LENGTH; - 319:Drivers/BME680/bme680.c **** } - ARM GAS /tmp/ccvbgJts.s page 7 - - - 320:Drivers/BME680/bme680.c **** } - 321:Drivers/BME680/bme680.c **** - 322:Drivers/BME680/bme680.c **** return rslt; - 323:Drivers/BME680/bme680.c **** } - 324:Drivers/BME680/bme680.c **** - 325:Drivers/BME680/bme680.c **** /*! - 326:Drivers/BME680/bme680.c **** * @brief This API performs the soft reset of the sensor. - 327:Drivers/BME680/bme680.c **** */ - 328:Drivers/BME680/bme680.c **** int8_t bme680_soft_reset(struct bme680_dev *dev) - 329:Drivers/BME680/bme680.c **** { - 330:Drivers/BME680/bme680.c **** int8_t rslt; - 331:Drivers/BME680/bme680.c **** uint8_t reg_addr = BME680_SOFT_RESET_ADDR; - 332:Drivers/BME680/bme680.c **** /* 0xb6 is the soft reset command */ - 333:Drivers/BME680/bme680.c **** uint8_t soft_rst_cmd = BME680_SOFT_RESET_CMD; - 334:Drivers/BME680/bme680.c **** - 335:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 336:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 337:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 338:Drivers/BME680/bme680.c **** if (dev->intf == BME680_SPI_INTF) - 339:Drivers/BME680/bme680.c **** rslt = get_mem_page(dev); - 340:Drivers/BME680/bme680.c **** - 341:Drivers/BME680/bme680.c **** /* Reset the device */ - 342:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 343:Drivers/BME680/bme680.c **** rslt = bme680_set_regs(®_addr, &soft_rst_cmd, 1, dev); - 344:Drivers/BME680/bme680.c **** /* Wait for 5ms */ - 345:Drivers/BME680/bme680.c **** dev->delay_ms(BME680_RESET_PERIOD); - 346:Drivers/BME680/bme680.c **** - 347:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 348:Drivers/BME680/bme680.c **** /* After reset get the memory page */ - 349:Drivers/BME680/bme680.c **** if (dev->intf == BME680_SPI_INTF) - 350:Drivers/BME680/bme680.c **** rslt = get_mem_page(dev); - 351:Drivers/BME680/bme680.c **** } - 352:Drivers/BME680/bme680.c **** } - 353:Drivers/BME680/bme680.c **** } - 354:Drivers/BME680/bme680.c **** - 355:Drivers/BME680/bme680.c **** return rslt; - 356:Drivers/BME680/bme680.c **** } - 357:Drivers/BME680/bme680.c **** - 358:Drivers/BME680/bme680.c **** /*! - 359:Drivers/BME680/bme680.c **** * @brief This API is used to set the oversampling, filter and T,P,H, gas selection - 360:Drivers/BME680/bme680.c **** * settings in the sensor. - 361:Drivers/BME680/bme680.c **** */ - 362:Drivers/BME680/bme680.c **** int8_t bme680_set_sensor_settings(uint16_t desired_settings, struct bme680_dev *dev) - 363:Drivers/BME680/bme680.c **** { - 364:Drivers/BME680/bme680.c **** int8_t rslt; - 365:Drivers/BME680/bme680.c **** uint8_t reg_addr; - 366:Drivers/BME680/bme680.c **** uint8_t data = 0; - 367:Drivers/BME680/bme680.c **** uint8_t count = 0; - 368:Drivers/BME680/bme680.c **** uint8_t reg_array[BME680_REG_BUFFER_LENGTH] = { 0 }; - 369:Drivers/BME680/bme680.c **** uint8_t data_array[BME680_REG_BUFFER_LENGTH] = { 0 }; - 370:Drivers/BME680/bme680.c **** uint8_t intended_power_mode = dev->power_mode; /* Save intended power mode */ - 371:Drivers/BME680/bme680.c **** - 372:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 373:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 374:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 375:Drivers/BME680/bme680.c **** if (desired_settings & BME680_GAS_MEAS_SEL) - 376:Drivers/BME680/bme680.c **** rslt = set_gas_config(dev); - ARM GAS /tmp/ccvbgJts.s page 8 - - - 377:Drivers/BME680/bme680.c **** - 378:Drivers/BME680/bme680.c **** dev->power_mode = BME680_SLEEP_MODE; - 379:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 380:Drivers/BME680/bme680.c **** rslt = bme680_set_sensor_mode(dev); - 381:Drivers/BME680/bme680.c **** - 382:Drivers/BME680/bme680.c **** /* Selecting the filter */ - 383:Drivers/BME680/bme680.c **** if (desired_settings & BME680_FILTER_SEL) { - 384:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->tph_sett.filter, BME680_FILTER_SIZE_0, BME680_FILTER_SIZE_127, dev); - 385:Drivers/BME680/bme680.c **** reg_addr = BME680_CONF_ODR_FILT_ADDR; - 386:Drivers/BME680/bme680.c **** - 387:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 388:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(reg_addr, &data, 1, dev); - 389:Drivers/BME680/bme680.c **** - 390:Drivers/BME680/bme680.c **** if (desired_settings & BME680_FILTER_SEL) - 391:Drivers/BME680/bme680.c **** data = BME680_SET_BITS(data, BME680_FILTER, dev->tph_sett.filter); - 392:Drivers/BME680/bme680.c **** - 393:Drivers/BME680/bme680.c **** reg_array[count] = reg_addr; /* Append configuration */ - 394:Drivers/BME680/bme680.c **** data_array[count] = data; - 395:Drivers/BME680/bme680.c **** count++; - 396:Drivers/BME680/bme680.c **** } - 397:Drivers/BME680/bme680.c **** - 398:Drivers/BME680/bme680.c **** /* Selecting heater control for the sensor */ - 399:Drivers/BME680/bme680.c **** if (desired_settings & BME680_HCNTRL_SEL) { - 400:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->gas_sett.heatr_ctrl, BME680_ENABLE_HEATER, - 401:Drivers/BME680/bme680.c **** BME680_DISABLE_HEATER, dev); - 402:Drivers/BME680/bme680.c **** reg_addr = BME680_CONF_HEAT_CTRL_ADDR; - 403:Drivers/BME680/bme680.c **** - 404:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 405:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(reg_addr, &data, 1, dev); - 406:Drivers/BME680/bme680.c **** data = BME680_SET_BITS_POS_0(data, BME680_HCTRL, dev->gas_sett.heatr_ctrl); - 407:Drivers/BME680/bme680.c **** - 408:Drivers/BME680/bme680.c **** reg_array[count] = reg_addr; /* Append configuration */ - 409:Drivers/BME680/bme680.c **** data_array[count] = data; - 410:Drivers/BME680/bme680.c **** count++; - 411:Drivers/BME680/bme680.c **** } - 412:Drivers/BME680/bme680.c **** - 413:Drivers/BME680/bme680.c **** /* Selecting heater T,P oversampling for the sensor */ - 414:Drivers/BME680/bme680.c **** if (desired_settings & (BME680_OST_SEL | BME680_OSP_SEL)) { - 415:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->tph_sett.os_temp, BME680_OS_NONE, BME680_OS_16X, dev); - 416:Drivers/BME680/bme680.c **** reg_addr = BME680_CONF_T_P_MODE_ADDR; - 417:Drivers/BME680/bme680.c **** - 418:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 419:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(reg_addr, &data, 1, dev); - 420:Drivers/BME680/bme680.c **** - 421:Drivers/BME680/bme680.c **** if (desired_settings & BME680_OST_SEL) - 422:Drivers/BME680/bme680.c **** data = BME680_SET_BITS(data, BME680_OST, dev->tph_sett.os_temp); - 423:Drivers/BME680/bme680.c **** - 424:Drivers/BME680/bme680.c **** if (desired_settings & BME680_OSP_SEL) - 425:Drivers/BME680/bme680.c **** data = BME680_SET_BITS(data, BME680_OSP, dev->tph_sett.os_pres); - 426:Drivers/BME680/bme680.c **** - 427:Drivers/BME680/bme680.c **** reg_array[count] = reg_addr; - 428:Drivers/BME680/bme680.c **** data_array[count] = data; - 429:Drivers/BME680/bme680.c **** count++; - 430:Drivers/BME680/bme680.c **** } - 431:Drivers/BME680/bme680.c **** - 432:Drivers/BME680/bme680.c **** /* Selecting humidity oversampling for the sensor */ - 433:Drivers/BME680/bme680.c **** if (desired_settings & BME680_OSH_SEL) { - ARM GAS /tmp/ccvbgJts.s page 9 - - - 434:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->tph_sett.os_hum, BME680_OS_NONE, BME680_OS_16X, dev); - 435:Drivers/BME680/bme680.c **** reg_addr = BME680_CONF_OS_H_ADDR; - 436:Drivers/BME680/bme680.c **** - 437:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 438:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(reg_addr, &data, 1, dev); - 439:Drivers/BME680/bme680.c **** data = BME680_SET_BITS_POS_0(data, BME680_OSH, dev->tph_sett.os_hum); - 440:Drivers/BME680/bme680.c **** - 441:Drivers/BME680/bme680.c **** reg_array[count] = reg_addr; /* Append configuration */ - 442:Drivers/BME680/bme680.c **** data_array[count] = data; - 443:Drivers/BME680/bme680.c **** count++; - 444:Drivers/BME680/bme680.c **** } - 445:Drivers/BME680/bme680.c **** - 446:Drivers/BME680/bme680.c **** /* Selecting the runGas and NB conversion settings for the sensor */ - 447:Drivers/BME680/bme680.c **** if (desired_settings & (BME680_RUN_GAS_SEL | BME680_NBCONV_SEL)) { - 448:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->gas_sett.run_gas, BME680_RUN_GAS_DISABLE, - 449:Drivers/BME680/bme680.c **** BME680_RUN_GAS_ENABLE, dev); - 450:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 451:Drivers/BME680/bme680.c **** /* Validate boundary conditions */ - 452:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->gas_sett.nb_conv, BME680_NBCONV_MIN, - 453:Drivers/BME680/bme680.c **** BME680_NBCONV_MAX, dev); - 454:Drivers/BME680/bme680.c **** } - 455:Drivers/BME680/bme680.c **** - 456:Drivers/BME680/bme680.c **** reg_addr = BME680_CONF_ODR_RUN_GAS_NBC_ADDR; - 457:Drivers/BME680/bme680.c **** - 458:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 459:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(reg_addr, &data, 1, dev); - 460:Drivers/BME680/bme680.c **** - 461:Drivers/BME680/bme680.c **** if (desired_settings & BME680_RUN_GAS_SEL) - 462:Drivers/BME680/bme680.c **** data = BME680_SET_BITS(data, BME680_RUN_GAS, dev->gas_sett.run_gas); - 463:Drivers/BME680/bme680.c **** - 464:Drivers/BME680/bme680.c **** if (desired_settings & BME680_NBCONV_SEL) - 465:Drivers/BME680/bme680.c **** data = BME680_SET_BITS_POS_0(data, BME680_NBCONV, dev->gas_sett.nb_conv); - 466:Drivers/BME680/bme680.c **** - 467:Drivers/BME680/bme680.c **** reg_array[count] = reg_addr; /* Append configuration */ - 468:Drivers/BME680/bme680.c **** data_array[count] = data; - 469:Drivers/BME680/bme680.c **** count++; - 470:Drivers/BME680/bme680.c **** } - 471:Drivers/BME680/bme680.c **** - 472:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 473:Drivers/BME680/bme680.c **** rslt = bme680_set_regs(reg_array, data_array, count, dev); - 474:Drivers/BME680/bme680.c **** - 475:Drivers/BME680/bme680.c **** /* Restore previous intended power mode */ - 476:Drivers/BME680/bme680.c **** dev->power_mode = intended_power_mode; - 477:Drivers/BME680/bme680.c **** } - 478:Drivers/BME680/bme680.c **** - 479:Drivers/BME680/bme680.c **** return rslt; - 480:Drivers/BME680/bme680.c **** } - 481:Drivers/BME680/bme680.c **** - 482:Drivers/BME680/bme680.c **** /*! - 483:Drivers/BME680/bme680.c **** * @brief This API is used to get the oversampling, filter and T,P,H, gas selection - 484:Drivers/BME680/bme680.c **** * settings in the sensor. - 485:Drivers/BME680/bme680.c **** */ - 486:Drivers/BME680/bme680.c **** int8_t bme680_get_sensor_settings(uint16_t desired_settings, struct bme680_dev *dev) - 487:Drivers/BME680/bme680.c **** { - 488:Drivers/BME680/bme680.c **** int8_t rslt; - 489:Drivers/BME680/bme680.c **** /* starting address of the register array for burst read*/ - 490:Drivers/BME680/bme680.c **** uint8_t reg_addr = BME680_CONF_HEAT_CTRL_ADDR; - ARM GAS /tmp/ccvbgJts.s page 10 - - - 491:Drivers/BME680/bme680.c **** uint8_t data_array[BME680_REG_BUFFER_LENGTH] = { 0 }; - 492:Drivers/BME680/bme680.c **** - 493:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 494:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 495:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 496:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(reg_addr, data_array, BME680_REG_BUFFER_LENGTH, dev); - 497:Drivers/BME680/bme680.c **** - 498:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 499:Drivers/BME680/bme680.c **** if (desired_settings & BME680_GAS_MEAS_SEL) - 500:Drivers/BME680/bme680.c **** rslt = get_gas_config(dev); - 501:Drivers/BME680/bme680.c **** - 502:Drivers/BME680/bme680.c **** /* get the T,P,H ,Filter,ODR settings here */ - 503:Drivers/BME680/bme680.c **** if (desired_settings & BME680_FILTER_SEL) - 504:Drivers/BME680/bme680.c **** dev->tph_sett.filter = BME680_GET_BITS(data_array[BME680_REG_FILTER_INDEX], - 505:Drivers/BME680/bme680.c **** BME680_FILTER); - 506:Drivers/BME680/bme680.c **** - 507:Drivers/BME680/bme680.c **** if (desired_settings & (BME680_OST_SEL | BME680_OSP_SEL)) { - 508:Drivers/BME680/bme680.c **** dev->tph_sett.os_temp = BME680_GET_BITS(data_array[BME680_REG_TEMP_INDEX], BME680_OST); - 509:Drivers/BME680/bme680.c **** dev->tph_sett.os_pres = BME680_GET_BITS(data_array[BME680_REG_PRES_INDEX], BME680_OSP); - 510:Drivers/BME680/bme680.c **** } - 511:Drivers/BME680/bme680.c **** - 512:Drivers/BME680/bme680.c **** if (desired_settings & BME680_OSH_SEL) - 513:Drivers/BME680/bme680.c **** dev->tph_sett.os_hum = BME680_GET_BITS_POS_0(data_array[BME680_REG_HUM_INDEX], - 514:Drivers/BME680/bme680.c **** BME680_OSH); - 515:Drivers/BME680/bme680.c **** - 516:Drivers/BME680/bme680.c **** /* get the gas related settings */ - 517:Drivers/BME680/bme680.c **** if (desired_settings & BME680_HCNTRL_SEL) - 518:Drivers/BME680/bme680.c **** dev->gas_sett.heatr_ctrl = BME680_GET_BITS_POS_0(data_array[BME680_REG_HCTRL_INDEX], - 519:Drivers/BME680/bme680.c **** BME680_HCTRL); - 520:Drivers/BME680/bme680.c **** - 521:Drivers/BME680/bme680.c **** if (desired_settings & (BME680_RUN_GAS_SEL | BME680_NBCONV_SEL)) { - 522:Drivers/BME680/bme680.c **** dev->gas_sett.nb_conv = BME680_GET_BITS_POS_0(data_array[BME680_REG_NBCONV_INDEX], - 523:Drivers/BME680/bme680.c **** BME680_NBCONV); - 524:Drivers/BME680/bme680.c **** dev->gas_sett.run_gas = BME680_GET_BITS(data_array[BME680_REG_RUN_GAS_INDEX], - 525:Drivers/BME680/bme680.c **** BME680_RUN_GAS); - 526:Drivers/BME680/bme680.c **** } - 527:Drivers/BME680/bme680.c **** } - 528:Drivers/BME680/bme680.c **** } else { - 529:Drivers/BME680/bme680.c **** rslt = BME680_E_NULL_PTR; - 530:Drivers/BME680/bme680.c **** } - 531:Drivers/BME680/bme680.c **** - 532:Drivers/BME680/bme680.c **** return rslt; - 533:Drivers/BME680/bme680.c **** } - 534:Drivers/BME680/bme680.c **** - 535:Drivers/BME680/bme680.c **** /*! - 536:Drivers/BME680/bme680.c **** * @brief This API is used to set the power mode of the sensor. - 537:Drivers/BME680/bme680.c **** */ - 538:Drivers/BME680/bme680.c **** int8_t bme680_set_sensor_mode(struct bme680_dev *dev) - 539:Drivers/BME680/bme680.c **** { - 540:Drivers/BME680/bme680.c **** int8_t rslt; - 541:Drivers/BME680/bme680.c **** uint8_t tmp_pow_mode; - 542:Drivers/BME680/bme680.c **** uint8_t pow_mode = 0; - 543:Drivers/BME680/bme680.c **** uint8_t reg_addr = BME680_CONF_T_P_MODE_ADDR; - 544:Drivers/BME680/bme680.c **** - 545:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 546:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 547:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - ARM GAS /tmp/ccvbgJts.s page 11 - - - 548:Drivers/BME680/bme680.c **** /* Call recursively until in sleep */ - 549:Drivers/BME680/bme680.c **** do { - 550:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_CONF_T_P_MODE_ADDR, &tmp_pow_mode, 1, dev); - 551:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 552:Drivers/BME680/bme680.c **** /* Put to sleep before changing mode */ - 553:Drivers/BME680/bme680.c **** pow_mode = (tmp_pow_mode & BME680_MODE_MSK); - 554:Drivers/BME680/bme680.c **** - 555:Drivers/BME680/bme680.c **** if (pow_mode != BME680_SLEEP_MODE) { - 556:Drivers/BME680/bme680.c **** tmp_pow_mode = tmp_pow_mode & (~BME680_MODE_MSK); /* Set to sleep */ - 557:Drivers/BME680/bme680.c **** rslt = bme680_set_regs(®_addr, &tmp_pow_mode, 1, dev); - 558:Drivers/BME680/bme680.c **** dev->delay_ms(BME680_POLL_PERIOD_MS); - 559:Drivers/BME680/bme680.c **** } - 560:Drivers/BME680/bme680.c **** } - 561:Drivers/BME680/bme680.c **** } while (pow_mode != BME680_SLEEP_MODE); - 562:Drivers/BME680/bme680.c **** - 563:Drivers/BME680/bme680.c **** /* Already in sleep */ - 564:Drivers/BME680/bme680.c **** if (dev->power_mode != BME680_SLEEP_MODE) { - 565:Drivers/BME680/bme680.c **** tmp_pow_mode = (tmp_pow_mode & ~BME680_MODE_MSK) | (dev->power_mode & BME680_MODE_MSK); - 566:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 567:Drivers/BME680/bme680.c **** rslt = bme680_set_regs(®_addr, &tmp_pow_mode, 1, dev); - 568:Drivers/BME680/bme680.c **** } - 569:Drivers/BME680/bme680.c **** } - 570:Drivers/BME680/bme680.c **** - 571:Drivers/BME680/bme680.c **** return rslt; - 572:Drivers/BME680/bme680.c **** } - 573:Drivers/BME680/bme680.c **** - 574:Drivers/BME680/bme680.c **** /*! - 575:Drivers/BME680/bme680.c **** * @brief This API is used to get the power mode of the sensor. - 576:Drivers/BME680/bme680.c **** */ - 577:Drivers/BME680/bme680.c **** int8_t bme680_get_sensor_mode(struct bme680_dev *dev) - 578:Drivers/BME680/bme680.c **** { - 579:Drivers/BME680/bme680.c **** int8_t rslt; - 580:Drivers/BME680/bme680.c **** uint8_t mode; - 581:Drivers/BME680/bme680.c **** - 582:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 583:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 584:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 585:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_CONF_T_P_MODE_ADDR, &mode, 1, dev); - 586:Drivers/BME680/bme680.c **** /* Masking the other register bit info*/ - 587:Drivers/BME680/bme680.c **** dev->power_mode = mode & BME680_MODE_MSK; - 588:Drivers/BME680/bme680.c **** } - 589:Drivers/BME680/bme680.c **** - 590:Drivers/BME680/bme680.c **** return rslt; - 591:Drivers/BME680/bme680.c **** } - 592:Drivers/BME680/bme680.c **** - 593:Drivers/BME680/bme680.c **** /*! - 594:Drivers/BME680/bme680.c **** * @brief This API is used to set the profile duration of the sensor. - 595:Drivers/BME680/bme680.c **** */ - 596:Drivers/BME680/bme680.c **** void bme680_set_profile_dur(uint16_t duration, struct bme680_dev *dev) - 597:Drivers/BME680/bme680.c **** { - 598:Drivers/BME680/bme680.c **** uint32_t tph_dur; /* Calculate in us */ - 599:Drivers/BME680/bme680.c **** - 600:Drivers/BME680/bme680.c **** /* TPH measurement duration */ - 601:Drivers/BME680/bme680.c **** tph_dur = ((uint32_t) (dev->tph_sett.os_temp + dev->tph_sett.os_pres + dev->tph_sett.os_hum) * UIN - 602:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(477 * 4); /* TPH switching duration */ - 603:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(477 * 5); /* Gas measurement duration */ - 604:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(500); /* Get it to the closest whole number.*/ - ARM GAS /tmp/ccvbgJts.s page 12 - - - 605:Drivers/BME680/bme680.c **** tph_dur /= UINT32_C(1000); /* Convert to ms */ - 606:Drivers/BME680/bme680.c **** - 607:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(1); /* Wake up duration of 1ms */ - 608:Drivers/BME680/bme680.c **** /* The remaining time should be used for heating */ - 609:Drivers/BME680/bme680.c **** dev->gas_sett.heatr_dur = duration - (uint16_t) tph_dur; - 610:Drivers/BME680/bme680.c **** } - 611:Drivers/BME680/bme680.c **** - 612:Drivers/BME680/bme680.c **** /*! - 613:Drivers/BME680/bme680.c **** * @brief This API is used to get the profile duration of the sensor. - 614:Drivers/BME680/bme680.c **** */ - 615:Drivers/BME680/bme680.c **** void bme680_get_profile_dur(uint16_t *duration, const struct bme680_dev *dev) - 616:Drivers/BME680/bme680.c **** { - 617:Drivers/BME680/bme680.c **** uint32_t tph_dur; /* Calculate in us */ - 618:Drivers/BME680/bme680.c **** - 619:Drivers/BME680/bme680.c **** /* TPH measurement duration */ - 620:Drivers/BME680/bme680.c **** tph_dur = ((uint32_t) (dev->tph_sett.os_temp + dev->tph_sett.os_pres + dev->tph_sett.os_hum) * UIN - 621:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(477 * 4); /* TPH switching duration */ - 622:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(477 * 5); /* Gas measurement duration */ - 623:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(500); /* Get it to the closest whole number.*/ - 624:Drivers/BME680/bme680.c **** tph_dur /= UINT32_C(1000); /* Convert to ms */ - 625:Drivers/BME680/bme680.c **** - 626:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(1); /* Wake up duration of 1ms */ - 627:Drivers/BME680/bme680.c **** - 628:Drivers/BME680/bme680.c **** *duration = (uint16_t) tph_dur; - 629:Drivers/BME680/bme680.c **** - 630:Drivers/BME680/bme680.c **** /* Get the gas duration only when the run gas is enabled */ - 631:Drivers/BME680/bme680.c **** if (dev->gas_sett.run_gas) { - 632:Drivers/BME680/bme680.c **** /* The remaining time should be used for heating */ - 633:Drivers/BME680/bme680.c **** *duration += dev->gas_sett.heatr_dur; - 634:Drivers/BME680/bme680.c **** } - 635:Drivers/BME680/bme680.c **** } - 636:Drivers/BME680/bme680.c **** - 637:Drivers/BME680/bme680.c **** /*! - 638:Drivers/BME680/bme680.c **** * @brief This API reads the pressure, temperature and humidity and gas data - 639:Drivers/BME680/bme680.c **** * from the sensor, compensates the data and store it in the bme680_data - 640:Drivers/BME680/bme680.c **** * structure instance passed by the user. - 641:Drivers/BME680/bme680.c **** */ - 642:Drivers/BME680/bme680.c **** int8_t bme680_get_sensor_data(struct bme680_field_data *data, struct bme680_dev *dev) - 643:Drivers/BME680/bme680.c **** { - 644:Drivers/BME680/bme680.c **** int8_t rslt; - 645:Drivers/BME680/bme680.c **** - 646:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 647:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 648:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 649:Drivers/BME680/bme680.c **** /* Reading the sensor data in forced mode only */ - 650:Drivers/BME680/bme680.c **** rslt = read_field_data(data, dev); - 651:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 652:Drivers/BME680/bme680.c **** if (data->status & BME680_NEW_DATA_MSK) - 653:Drivers/BME680/bme680.c **** dev->new_fields = 1; - 654:Drivers/BME680/bme680.c **** else - 655:Drivers/BME680/bme680.c **** dev->new_fields = 0; - 656:Drivers/BME680/bme680.c **** } - 657:Drivers/BME680/bme680.c **** } - 658:Drivers/BME680/bme680.c **** - 659:Drivers/BME680/bme680.c **** return rslt; - 660:Drivers/BME680/bme680.c **** } - 661:Drivers/BME680/bme680.c **** - ARM GAS /tmp/ccvbgJts.s page 13 - - - 662:Drivers/BME680/bme680.c **** /*! - 663:Drivers/BME680/bme680.c **** * @brief This internal API is used to read the calibrated data from the sensor. - 664:Drivers/BME680/bme680.c **** */ - 665:Drivers/BME680/bme680.c **** static int8_t get_calib_data(struct bme680_dev *dev) - 666:Drivers/BME680/bme680.c **** { - 667:Drivers/BME680/bme680.c **** int8_t rslt; - 668:Drivers/BME680/bme680.c **** uint8_t coeff_array[BME680_COEFF_SIZE] = { 0 }; - 669:Drivers/BME680/bme680.c **** uint8_t temp_var = 0; /* Temporary variable */ - 670:Drivers/BME680/bme680.c **** - 671:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 672:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 673:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 674:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_COEFF_ADDR1, coeff_array, BME680_COEFF_ADDR1_LEN, dev); - 675:Drivers/BME680/bme680.c **** /* Append the second half in the same array */ - 676:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 677:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_COEFF_ADDR2, &coeff_array[BME680_COEFF_ADDR1_LEN] - 678:Drivers/BME680/bme680.c **** , BME680_COEFF_ADDR2_LEN, dev); - 679:Drivers/BME680/bme680.c **** - 680:Drivers/BME680/bme680.c **** /* Temperature related coefficients */ - 681:Drivers/BME680/bme680.c **** dev->calib.par_t1 = (uint16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_T1_MSB_REG], - 682:Drivers/BME680/bme680.c **** coeff_array[BME680_T1_LSB_REG])); - 683:Drivers/BME680/bme680.c **** dev->calib.par_t2 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_T2_MSB_REG], - 684:Drivers/BME680/bme680.c **** coeff_array[BME680_T2_LSB_REG])); - 685:Drivers/BME680/bme680.c **** dev->calib.par_t3 = (int8_t) (coeff_array[BME680_T3_REG]); - 686:Drivers/BME680/bme680.c **** - 687:Drivers/BME680/bme680.c **** /* Pressure related coefficients */ - 688:Drivers/BME680/bme680.c **** dev->calib.par_p1 = (uint16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_P1_MSB_REG], - 689:Drivers/BME680/bme680.c **** coeff_array[BME680_P1_LSB_REG])); - 690:Drivers/BME680/bme680.c **** dev->calib.par_p2 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_P2_MSB_REG], - 691:Drivers/BME680/bme680.c **** coeff_array[BME680_P2_LSB_REG])); - 692:Drivers/BME680/bme680.c **** dev->calib.par_p3 = (int8_t) coeff_array[BME680_P3_REG]; - 693:Drivers/BME680/bme680.c **** dev->calib.par_p4 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_P4_MSB_REG], - 694:Drivers/BME680/bme680.c **** coeff_array[BME680_P4_LSB_REG])); - 695:Drivers/BME680/bme680.c **** dev->calib.par_p5 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_P5_MSB_REG], - 696:Drivers/BME680/bme680.c **** coeff_array[BME680_P5_LSB_REG])); - 697:Drivers/BME680/bme680.c **** dev->calib.par_p6 = (int8_t) (coeff_array[BME680_P6_REG]); - 698:Drivers/BME680/bme680.c **** dev->calib.par_p7 = (int8_t) (coeff_array[BME680_P7_REG]); - 699:Drivers/BME680/bme680.c **** dev->calib.par_p8 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_P8_MSB_REG], - 700:Drivers/BME680/bme680.c **** coeff_array[BME680_P8_LSB_REG])); - 701:Drivers/BME680/bme680.c **** dev->calib.par_p9 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_P9_MSB_REG], - 702:Drivers/BME680/bme680.c **** coeff_array[BME680_P9_LSB_REG])); - 703:Drivers/BME680/bme680.c **** dev->calib.par_p10 = (uint8_t) (coeff_array[BME680_P10_REG]); - 704:Drivers/BME680/bme680.c **** - 705:Drivers/BME680/bme680.c **** /* Humidity related coefficients */ - 706:Drivers/BME680/bme680.c **** dev->calib.par_h1 = (uint16_t) (((uint16_t) coeff_array[BME680_H1_MSB_REG] << BME680_HUM_REG_SHIF - 707:Drivers/BME680/bme680.c **** | (coeff_array[BME680_H1_LSB_REG] & BME680_BIT_H1_DATA_MSK)); - 708:Drivers/BME680/bme680.c **** dev->calib.par_h2 = (uint16_t) (((uint16_t) coeff_array[BME680_H2_MSB_REG] << BME680_HUM_REG_SHIF - 709:Drivers/BME680/bme680.c **** | ((coeff_array[BME680_H2_LSB_REG]) >> BME680_HUM_REG_SHIFT_VAL)); - 710:Drivers/BME680/bme680.c **** dev->calib.par_h3 = (int8_t) coeff_array[BME680_H3_REG]; - 711:Drivers/BME680/bme680.c **** dev->calib.par_h4 = (int8_t) coeff_array[BME680_H4_REG]; - 712:Drivers/BME680/bme680.c **** dev->calib.par_h5 = (int8_t) coeff_array[BME680_H5_REG]; - 713:Drivers/BME680/bme680.c **** dev->calib.par_h6 = (uint8_t) coeff_array[BME680_H6_REG]; - 714:Drivers/BME680/bme680.c **** dev->calib.par_h7 = (int8_t) coeff_array[BME680_H7_REG]; - 715:Drivers/BME680/bme680.c **** - 716:Drivers/BME680/bme680.c **** /* Gas heater related coefficients */ - 717:Drivers/BME680/bme680.c **** dev->calib.par_gh1 = (int8_t) coeff_array[BME680_GH1_REG]; - 718:Drivers/BME680/bme680.c **** dev->calib.par_gh2 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_GH2_MSB_REG], - ARM GAS /tmp/ccvbgJts.s page 14 - - - 719:Drivers/BME680/bme680.c **** coeff_array[BME680_GH2_LSB_REG])); - 720:Drivers/BME680/bme680.c **** dev->calib.par_gh3 = (int8_t) coeff_array[BME680_GH3_REG]; - 721:Drivers/BME680/bme680.c **** - 722:Drivers/BME680/bme680.c **** /* Other coefficients */ - 723:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 724:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_ADDR_RES_HEAT_RANGE_ADDR, &temp_var, 1, dev); - 725:Drivers/BME680/bme680.c **** - 726:Drivers/BME680/bme680.c **** dev->calib.res_heat_range = ((temp_var & BME680_RHRANGE_MSK) / 16); - 727:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 728:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_ADDR_RES_HEAT_VAL_ADDR, &temp_var, 1, dev); - 729:Drivers/BME680/bme680.c **** - 730:Drivers/BME680/bme680.c **** dev->calib.res_heat_val = (int8_t) temp_var; - 731:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 732:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_ADDR_RANGE_SW_ERR_ADDR, &temp_var, 1, dev); - 733:Drivers/BME680/bme680.c **** } - 734:Drivers/BME680/bme680.c **** } - 735:Drivers/BME680/bme680.c **** dev->calib.range_sw_err = ((int8_t) temp_var & (int8_t) BME680_RSERROR_MSK) / 16; - 736:Drivers/BME680/bme680.c **** } - 737:Drivers/BME680/bme680.c **** - 738:Drivers/BME680/bme680.c **** return rslt; - 739:Drivers/BME680/bme680.c **** } - 740:Drivers/BME680/bme680.c **** - 741:Drivers/BME680/bme680.c **** /*! - 742:Drivers/BME680/bme680.c **** * @brief This internal API is used to set the gas configuration of the sensor. - 743:Drivers/BME680/bme680.c **** */ - 744:Drivers/BME680/bme680.c **** static int8_t set_gas_config(struct bme680_dev *dev) - 745:Drivers/BME680/bme680.c **** { - 746:Drivers/BME680/bme680.c **** int8_t rslt; - 747:Drivers/BME680/bme680.c **** - 748:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 749:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 750:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 751:Drivers/BME680/bme680.c **** - 752:Drivers/BME680/bme680.c **** uint8_t reg_addr[2] = {0}; - 753:Drivers/BME680/bme680.c **** uint8_t reg_data[2] = {0}; - 754:Drivers/BME680/bme680.c **** - 755:Drivers/BME680/bme680.c **** if (dev->power_mode == BME680_FORCED_MODE) { - 756:Drivers/BME680/bme680.c **** reg_addr[0] = BME680_RES_HEAT0_ADDR; - 757:Drivers/BME680/bme680.c **** reg_data[0] = calc_heater_res(dev->gas_sett.heatr_temp, dev); - 758:Drivers/BME680/bme680.c **** reg_addr[1] = BME680_GAS_WAIT0_ADDR; - 759:Drivers/BME680/bme680.c **** reg_data[1] = calc_heater_dur(dev->gas_sett.heatr_dur); - 760:Drivers/BME680/bme680.c **** dev->gas_sett.nb_conv = 0; - 761:Drivers/BME680/bme680.c **** } else { - 762:Drivers/BME680/bme680.c **** rslt = BME680_W_DEFINE_PWR_MODE; - 763:Drivers/BME680/bme680.c **** } - 764:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 765:Drivers/BME680/bme680.c **** rslt = bme680_set_regs(reg_addr, reg_data, 2, dev); - 766:Drivers/BME680/bme680.c **** } - 767:Drivers/BME680/bme680.c **** - 768:Drivers/BME680/bme680.c **** return rslt; - 769:Drivers/BME680/bme680.c **** } - 770:Drivers/BME680/bme680.c **** - 771:Drivers/BME680/bme680.c **** /*! - 772:Drivers/BME680/bme680.c **** * @brief This internal API is used to get the gas configuration of the sensor. - 773:Drivers/BME680/bme680.c **** */ - 774:Drivers/BME680/bme680.c **** static int8_t get_gas_config(struct bme680_dev *dev) - 775:Drivers/BME680/bme680.c **** { - ARM GAS /tmp/ccvbgJts.s page 15 - - - 776:Drivers/BME680/bme680.c **** int8_t rslt; - 777:Drivers/BME680/bme680.c **** /* starting address of the register array for burst read*/ - 778:Drivers/BME680/bme680.c **** uint8_t reg_addr1 = BME680_ADDR_SENS_CONF_START; - 779:Drivers/BME680/bme680.c **** uint8_t reg_addr2 = BME680_ADDR_GAS_CONF_START; - 780:Drivers/BME680/bme680.c **** uint8_t data_array[BME680_GAS_HEATER_PROF_LEN_MAX] = { 0 }; - 781:Drivers/BME680/bme680.c **** uint8_t index; - 782:Drivers/BME680/bme680.c **** - 783:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 784:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 785:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 786:Drivers/BME680/bme680.c **** if (BME680_SPI_INTF == dev->intf) { - 787:Drivers/BME680/bme680.c **** /* Memory page switch the SPI address*/ - 788:Drivers/BME680/bme680.c **** rslt = set_mem_page(reg_addr1, dev); - 789:Drivers/BME680/bme680.c **** } - 790:Drivers/BME680/bme680.c **** - 791:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 792:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(reg_addr1, data_array, BME680_GAS_HEATER_PROF_LEN_MAX, dev); - 793:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 794:Drivers/BME680/bme680.c **** for (index = 0; index < BME680_GAS_HEATER_PROF_LEN_MAX; index++) - 795:Drivers/BME680/bme680.c **** dev->gas_sett.heatr_temp = data_array[index]; - 796:Drivers/BME680/bme680.c **** } - 797:Drivers/BME680/bme680.c **** - 798:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(reg_addr2, data_array, BME680_GAS_HEATER_PROF_LEN_MAX, dev); - 799:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 800:Drivers/BME680/bme680.c **** for (index = 0; index < BME680_GAS_HEATER_PROF_LEN_MAX; index++) - 801:Drivers/BME680/bme680.c **** dev->gas_sett.heatr_dur = data_array[index]; - 802:Drivers/BME680/bme680.c **** } - 803:Drivers/BME680/bme680.c **** } - 804:Drivers/BME680/bme680.c **** } - 805:Drivers/BME680/bme680.c **** - 806:Drivers/BME680/bme680.c **** return rslt; - 807:Drivers/BME680/bme680.c **** } - 808:Drivers/BME680/bme680.c **** - 809:Drivers/BME680/bme680.c **** /*! - 810:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the temperature value. - 811:Drivers/BME680/bme680.c **** */ - 812:Drivers/BME680/bme680.c **** static int16_t calc_temperature(uint32_t temp_adc, struct bme680_dev *dev) - 813:Drivers/BME680/bme680.c **** { - 814:Drivers/BME680/bme680.c **** int64_t var1; - 815:Drivers/BME680/bme680.c **** int64_t var2; - 816:Drivers/BME680/bme680.c **** int64_t var3; - 817:Drivers/BME680/bme680.c **** int16_t calc_temp; - 818:Drivers/BME680/bme680.c **** - 819:Drivers/BME680/bme680.c **** var1 = ((int32_t) temp_adc >> 3) - ((int32_t) dev->calib.par_t1 << 1); - 820:Drivers/BME680/bme680.c **** var2 = (var1 * (int32_t) dev->calib.par_t2) >> 11; - 821:Drivers/BME680/bme680.c **** var3 = ((var1 >> 1) * (var1 >> 1)) >> 12; - 822:Drivers/BME680/bme680.c **** var3 = ((var3) * ((int32_t) dev->calib.par_t3 << 4)) >> 14; - 823:Drivers/BME680/bme680.c **** dev->calib.t_fine = (int32_t) (var2 + var3); - 824:Drivers/BME680/bme680.c **** calc_temp = (int16_t) (((dev->calib.t_fine * 5) + 128) >> 8); - 825:Drivers/BME680/bme680.c **** - 826:Drivers/BME680/bme680.c **** return calc_temp; - 827:Drivers/BME680/bme680.c **** } - 828:Drivers/BME680/bme680.c **** - 829:Drivers/BME680/bme680.c **** /*! - 830:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the pressure value. - 831:Drivers/BME680/bme680.c **** */ - 832:Drivers/BME680/bme680.c **** static uint32_t calc_pressure(uint32_t pres_adc, const struct bme680_dev *dev) - ARM GAS /tmp/ccvbgJts.s page 16 - - - 833:Drivers/BME680/bme680.c **** { - 834:Drivers/BME680/bme680.c **** int32_t var1 = 0; - 835:Drivers/BME680/bme680.c **** int32_t var2 = 0; - 836:Drivers/BME680/bme680.c **** int32_t var3 = 0; - 837:Drivers/BME680/bme680.c **** int32_t var4 = 0; - 838:Drivers/BME680/bme680.c **** int32_t pressure_comp = 0; - 839:Drivers/BME680/bme680.c **** - 840:Drivers/BME680/bme680.c **** var1 = (((int32_t)dev->calib.t_fine) >> 1) - 64000; - 841:Drivers/BME680/bme680.c **** var2 = ((((var1 >> 2) * (var1 >> 2)) >> 11) * - 842:Drivers/BME680/bme680.c **** (int32_t)dev->calib.par_p6) >> 2; - 843:Drivers/BME680/bme680.c **** var2 = var2 + ((var1 * (int32_t)dev->calib.par_p5) << 1); - 844:Drivers/BME680/bme680.c **** var2 = (var2 >> 2) + ((int32_t)dev->calib.par_p4 << 16); - 845:Drivers/BME680/bme680.c **** var1 = (((((var1 >> 2) * (var1 >> 2)) >> 13) * - 846:Drivers/BME680/bme680.c **** ((int32_t)dev->calib.par_p3 << 5)) >> 3) + - 847:Drivers/BME680/bme680.c **** (((int32_t)dev->calib.par_p2 * var1) >> 1); - 848:Drivers/BME680/bme680.c **** var1 = var1 >> 18; - 849:Drivers/BME680/bme680.c **** var1 = ((32768 + var1) * (int32_t)dev->calib.par_p1) >> 15; - 850:Drivers/BME680/bme680.c **** pressure_comp = 1048576 - pres_adc; - 851:Drivers/BME680/bme680.c **** pressure_comp = (int32_t)((pressure_comp - (var2 >> 12)) * ((uint32_t)3125)); - 852:Drivers/BME680/bme680.c **** var4 = (1 << 31); - 853:Drivers/BME680/bme680.c **** if (pressure_comp >= var4) - 854:Drivers/BME680/bme680.c **** pressure_comp = ((pressure_comp / (uint32_t)var1) << 1); - 855:Drivers/BME680/bme680.c **** else - 856:Drivers/BME680/bme680.c **** pressure_comp = ((pressure_comp << 1) / (uint32_t)var1); - 857:Drivers/BME680/bme680.c **** var1 = ((int32_t)dev->calib.par_p9 * (int32_t)(((pressure_comp >> 3) * - 858:Drivers/BME680/bme680.c **** (pressure_comp >> 3)) >> 13)) >> 12; - 859:Drivers/BME680/bme680.c **** var2 = ((int32_t)(pressure_comp >> 2) * - 860:Drivers/BME680/bme680.c **** (int32_t)dev->calib.par_p8) >> 13; - 861:Drivers/BME680/bme680.c **** var3 = ((int32_t)(pressure_comp >> 8) * (int32_t)(pressure_comp >> 8) * - 862:Drivers/BME680/bme680.c **** (int32_t)(pressure_comp >> 8) * - 863:Drivers/BME680/bme680.c **** (int32_t)dev->calib.par_p10) >> 17; - 864:Drivers/BME680/bme680.c **** - 865:Drivers/BME680/bme680.c **** pressure_comp = (int32_t)(pressure_comp) + ((var1 + var2 + var3 + - 866:Drivers/BME680/bme680.c **** ((int32_t)dev->calib.par_p7 << 7)) >> 4); - 867:Drivers/BME680/bme680.c **** - 868:Drivers/BME680/bme680.c **** return (uint32_t)pressure_comp; - 869:Drivers/BME680/bme680.c **** - 870:Drivers/BME680/bme680.c **** } - 871:Drivers/BME680/bme680.c **** - 872:Drivers/BME680/bme680.c **** /*! - 873:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the humidity value. - 874:Drivers/BME680/bme680.c **** */ - 875:Drivers/BME680/bme680.c **** static uint32_t calc_humidity(uint16_t hum_adc, const struct bme680_dev *dev) - 876:Drivers/BME680/bme680.c **** { - 877:Drivers/BME680/bme680.c **** int32_t var1; - 878:Drivers/BME680/bme680.c **** int32_t var2; - 879:Drivers/BME680/bme680.c **** int32_t var3; - 880:Drivers/BME680/bme680.c **** int32_t var4; - 881:Drivers/BME680/bme680.c **** int32_t var5; - 882:Drivers/BME680/bme680.c **** int32_t var6; - 883:Drivers/BME680/bme680.c **** int32_t temp_scaled; - 884:Drivers/BME680/bme680.c **** int32_t calc_hum; - 885:Drivers/BME680/bme680.c **** - 886:Drivers/BME680/bme680.c **** temp_scaled = (((int32_t) dev->calib.t_fine * 5) + 128) >> 8; - 887:Drivers/BME680/bme680.c **** var1 = (int32_t) (hum_adc - ((int32_t) ((int32_t) dev->calib.par_h1 * 16))) - 888:Drivers/BME680/bme680.c **** - (((temp_scaled * (int32_t) dev->calib.par_h3) / ((int32_t) 100)) >> 1); - 889:Drivers/BME680/bme680.c **** var2 = ((int32_t) dev->calib.par_h2 - ARM GAS /tmp/ccvbgJts.s page 17 - - - 890:Drivers/BME680/bme680.c **** * (((temp_scaled * (int32_t) dev->calib.par_h4) / ((int32_t) 100)) - 891:Drivers/BME680/bme680.c **** + (((temp_scaled * ((temp_scaled * (int32_t) dev->calib.par_h5) / ((int32_t) 100))) >> 6) - 892:Drivers/BME680/bme680.c **** / ((int32_t) 100)) + (int32_t) (1 << 14))) >> 10; - 893:Drivers/BME680/bme680.c **** var3 = var1 * var2; - 894:Drivers/BME680/bme680.c **** var4 = (int32_t) dev->calib.par_h6 << 7; - 895:Drivers/BME680/bme680.c **** var4 = ((var4) + ((temp_scaled * (int32_t) dev->calib.par_h7) / ((int32_t) 100))) >> 4; - 896:Drivers/BME680/bme680.c **** var5 = ((var3 >> 14) * (var3 >> 14)) >> 10; - 897:Drivers/BME680/bme680.c **** var6 = (var4 * var5) >> 1; - 898:Drivers/BME680/bme680.c **** calc_hum = (((var3 + var6) >> 10) * ((int32_t) 1000)) >> 12; - 899:Drivers/BME680/bme680.c **** - 900:Drivers/BME680/bme680.c **** if (calc_hum > 100000) /* Cap at 100%rH */ - 901:Drivers/BME680/bme680.c **** calc_hum = 100000; - 902:Drivers/BME680/bme680.c **** else if (calc_hum < 0) - 903:Drivers/BME680/bme680.c **** calc_hum = 0; - 904:Drivers/BME680/bme680.c **** - 905:Drivers/BME680/bme680.c **** return (uint32_t) calc_hum; - 906:Drivers/BME680/bme680.c **** } - 907:Drivers/BME680/bme680.c **** - 908:Drivers/BME680/bme680.c **** /*! - 909:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the Gas Resistance value. - 910:Drivers/BME680/bme680.c **** */ - 911:Drivers/BME680/bme680.c **** static uint32_t calc_gas_resistance(uint16_t gas_res_adc, uint8_t gas_range, const struct bme680_de - 912:Drivers/BME680/bme680.c **** { - 913:Drivers/BME680/bme680.c **** int64_t var1; - 914:Drivers/BME680/bme680.c **** uint64_t var2; - 915:Drivers/BME680/bme680.c **** int64_t var3; - 916:Drivers/BME680/bme680.c **** uint32_t calc_gas_res; - 917:Drivers/BME680/bme680.c **** - 918:Drivers/BME680/bme680.c **** var1 = (int64_t) ((1340 + (5 * (int64_t) dev->calib.range_sw_err)) * - 919:Drivers/BME680/bme680.c **** ((int64_t) lookupTable1[gas_range])) >> 16; - 920:Drivers/BME680/bme680.c **** var2 = (((int64_t) ((int64_t) gas_res_adc << 15) - (int64_t) (16777216)) + var1); - 921:Drivers/BME680/bme680.c **** var3 = (((int64_t) lookupTable2[gas_range] * (int64_t) var1) >> 9); - 922:Drivers/BME680/bme680.c **** calc_gas_res = (uint32_t) ((var3 + ((int64_t) var2 >> 1)) / (int64_t) var2); - 923:Drivers/BME680/bme680.c **** - 924:Drivers/BME680/bme680.c **** return calc_gas_res; - 925:Drivers/BME680/bme680.c **** } - 926:Drivers/BME680/bme680.c **** - 927:Drivers/BME680/bme680.c **** /*! - 928:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the Heat Resistance value. - 929:Drivers/BME680/bme680.c **** */ - 930:Drivers/BME680/bme680.c **** static uint8_t calc_heater_res(uint16_t temp, const struct bme680_dev *dev) - 931:Drivers/BME680/bme680.c **** { - 932:Drivers/BME680/bme680.c **** uint8_t heatr_res; - 933:Drivers/BME680/bme680.c **** int32_t var1; - 934:Drivers/BME680/bme680.c **** int32_t var2; - 935:Drivers/BME680/bme680.c **** int32_t var3; - 936:Drivers/BME680/bme680.c **** int32_t var4; - 937:Drivers/BME680/bme680.c **** int32_t var5; - 938:Drivers/BME680/bme680.c **** int32_t heatr_res_x100; - 939:Drivers/BME680/bme680.c **** - 940:Drivers/BME680/bme680.c **** if (temp < 200) /* Cap temperature */ - 941:Drivers/BME680/bme680.c **** temp = 200; - 942:Drivers/BME680/bme680.c **** else if (temp > 400) - 943:Drivers/BME680/bme680.c **** temp = 400; - 944:Drivers/BME680/bme680.c **** - 945:Drivers/BME680/bme680.c **** var1 = (((int32_t) dev->amb_temp * dev->calib.par_gh3) / 1000) * 256; - 946:Drivers/BME680/bme680.c **** var2 = (dev->calib.par_gh1 + 784) * (((((dev->calib.par_gh2 + 154009) * temp * 5) / 100) + 3276800 - ARM GAS /tmp/ccvbgJts.s page 18 - - - 947:Drivers/BME680/bme680.c **** var3 = var1 + (var2 / 2); - 948:Drivers/BME680/bme680.c **** var4 = (var3 / (dev->calib.res_heat_range + 4)); - 949:Drivers/BME680/bme680.c **** var5 = (131 * dev->calib.res_heat_val) + 65536; - 950:Drivers/BME680/bme680.c **** heatr_res_x100 = (int32_t) (((var4 / var5) - 250) * 34); - 951:Drivers/BME680/bme680.c **** heatr_res = (uint8_t) ((heatr_res_x100 + 50) / 100); - 952:Drivers/BME680/bme680.c **** - 953:Drivers/BME680/bme680.c **** return heatr_res; - 954:Drivers/BME680/bme680.c **** } - 955:Drivers/BME680/bme680.c **** - 956:Drivers/BME680/bme680.c **** /*! - 957:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the Heat duration value. - 958:Drivers/BME680/bme680.c **** */ - 959:Drivers/BME680/bme680.c **** static uint8_t calc_heater_dur(uint16_t dur) - 960:Drivers/BME680/bme680.c **** { - 961:Drivers/BME680/bme680.c **** uint8_t factor = 0; - 962:Drivers/BME680/bme680.c **** uint8_t durval; - 963:Drivers/BME680/bme680.c **** - 964:Drivers/BME680/bme680.c **** if (dur >= 0xfc0) { - 965:Drivers/BME680/bme680.c **** durval = 0xff; /* Max duration*/ - 966:Drivers/BME680/bme680.c **** } else { - 967:Drivers/BME680/bme680.c **** while (dur > 0x3F) { - 968:Drivers/BME680/bme680.c **** dur = dur / 4; - 969:Drivers/BME680/bme680.c **** factor += 1; - 970:Drivers/BME680/bme680.c **** } - 971:Drivers/BME680/bme680.c **** durval = (uint8_t) (dur + (factor * 64)); - 972:Drivers/BME680/bme680.c **** } - 973:Drivers/BME680/bme680.c **** - 974:Drivers/BME680/bme680.c **** return durval; - 975:Drivers/BME680/bme680.c **** } - 976:Drivers/BME680/bme680.c **** - 977:Drivers/BME680/bme680.c **** /*! - 978:Drivers/BME680/bme680.c **** * @brief This internal API is used to calculate the field data of sensor. - 979:Drivers/BME680/bme680.c **** */ - 980:Drivers/BME680/bme680.c **** static int8_t read_field_data(struct bme680_field_data *data, struct bme680_dev *dev) - 981:Drivers/BME680/bme680.c **** { - 982:Drivers/BME680/bme680.c **** int8_t rslt; - 983:Drivers/BME680/bme680.c **** uint8_t buff[BME680_FIELD_LENGTH] = { 0 }; - 984:Drivers/BME680/bme680.c **** uint8_t gas_range; - 985:Drivers/BME680/bme680.c **** uint32_t adc_temp; - 986:Drivers/BME680/bme680.c **** uint32_t adc_pres; - 987:Drivers/BME680/bme680.c **** uint16_t adc_hum; - 988:Drivers/BME680/bme680.c **** uint16_t adc_gas_res; - 989:Drivers/BME680/bme680.c **** uint8_t tries = 10; - 990:Drivers/BME680/bme680.c **** - 991:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ - 992:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); - 993:Drivers/BME680/bme680.c **** do { - 994:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 995:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(((uint8_t) (BME680_FIELD0_ADDR)), buff, (uint16_t) BME680_FIELD_LENGTH, - 996:Drivers/BME680/bme680.c **** dev); - 997:Drivers/BME680/bme680.c **** - 998:Drivers/BME680/bme680.c **** data->status = buff[0] & BME680_NEW_DATA_MSK; - 999:Drivers/BME680/bme680.c **** data->gas_index = buff[0] & BME680_GAS_INDEX_MSK; -1000:Drivers/BME680/bme680.c **** data->meas_index = buff[1]; -1001:Drivers/BME680/bme680.c **** -1002:Drivers/BME680/bme680.c **** /* read the raw data from the sensor */ -1003:Drivers/BME680/bme680.c **** adc_pres = (uint32_t) (((uint32_t) buff[2] * 4096) | ((uint32_t) buff[3] * 16) - ARM GAS /tmp/ccvbgJts.s page 19 - - -1004:Drivers/BME680/bme680.c **** | ((uint32_t) buff[4] / 16)); -1005:Drivers/BME680/bme680.c **** adc_temp = (uint32_t) (((uint32_t) buff[5] * 4096) | ((uint32_t) buff[6] * 16) -1006:Drivers/BME680/bme680.c **** | ((uint32_t) buff[7] / 16)); -1007:Drivers/BME680/bme680.c **** adc_hum = (uint16_t) (((uint32_t) buff[8] * 256) | (uint32_t) buff[9]); -1008:Drivers/BME680/bme680.c **** adc_gas_res = (uint16_t) ((uint32_t) buff[13] * 4 | (((uint32_t) buff[14]) / 64)); -1009:Drivers/BME680/bme680.c **** gas_range = buff[14] & BME680_GAS_RANGE_MSK; -1010:Drivers/BME680/bme680.c **** -1011:Drivers/BME680/bme680.c **** data->status |= buff[14] & BME680_GASM_VALID_MSK; -1012:Drivers/BME680/bme680.c **** data->status |= buff[14] & BME680_HEAT_STAB_MSK; -1013:Drivers/BME680/bme680.c **** -1014:Drivers/BME680/bme680.c **** if (data->status & BME680_NEW_DATA_MSK) { -1015:Drivers/BME680/bme680.c **** data->temperature = calc_temperature(adc_temp, dev); -1016:Drivers/BME680/bme680.c **** data->pressure = calc_pressure(adc_pres, dev); -1017:Drivers/BME680/bme680.c **** data->humidity = calc_humidity(adc_hum, dev); -1018:Drivers/BME680/bme680.c **** data->gas_resistance = calc_gas_resistance(adc_gas_res, gas_range, dev); -1019:Drivers/BME680/bme680.c **** break; -1020:Drivers/BME680/bme680.c **** } -1021:Drivers/BME680/bme680.c **** /* Delay to poll the data */ -1022:Drivers/BME680/bme680.c **** dev->delay_ms(BME680_POLL_PERIOD_MS); -1023:Drivers/BME680/bme680.c **** } -1024:Drivers/BME680/bme680.c **** tries--; -1025:Drivers/BME680/bme680.c **** } while (tries); -1026:Drivers/BME680/bme680.c **** -1027:Drivers/BME680/bme680.c **** if (!tries) -1028:Drivers/BME680/bme680.c **** rslt = BME680_W_NO_NEW_DATA; -1029:Drivers/BME680/bme680.c **** -1030:Drivers/BME680/bme680.c **** return rslt; -1031:Drivers/BME680/bme680.c **** } -1032:Drivers/BME680/bme680.c **** -1033:Drivers/BME680/bme680.c **** /*! -1034:Drivers/BME680/bme680.c **** * @brief This internal API is used to set the memory page based on register address. -1035:Drivers/BME680/bme680.c **** */ -1036:Drivers/BME680/bme680.c **** static int8_t set_mem_page(uint8_t reg_addr, struct bme680_dev *dev) -1037:Drivers/BME680/bme680.c **** { - 25 .loc 1 1037 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 8 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 .LVL0: - 30 0000 30B5 push {r4, r5, lr} - 31 .LCFI0: - 32 .cfi_def_cfa_offset 12 - 33 .cfi_offset 4, -12 - 34 .cfi_offset 5, -8 - 35 .cfi_offset 14, -4 - 36 0002 83B0 sub sp, sp, #12 - 37 .LCFI1: - 38 .cfi_def_cfa_offset 24 - 39 0004 0C1E subs r4, r1, #0 - 40 .LVL1: - 41 .LBB51: - 42 .LBB52: -1038:Drivers/BME680/bme680.c **** int8_t rslt; -1039:Drivers/BME680/bme680.c **** uint8_t reg; -1040:Drivers/BME680/bme680.c **** uint8_t mem_page; -1041:Drivers/BME680/bme680.c **** -1042:Drivers/BME680/bme680.c **** /* Check for null pointers in the device structure*/ - ARM GAS /tmp/ccvbgJts.s page 20 - - -1043:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); -1044:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { -1045:Drivers/BME680/bme680.c **** if (reg_addr > 0x7f) -1046:Drivers/BME680/bme680.c **** mem_page = BME680_MEM_PAGE1; -1047:Drivers/BME680/bme680.c **** else -1048:Drivers/BME680/bme680.c **** mem_page = BME680_MEM_PAGE0; -1049:Drivers/BME680/bme680.c **** -1050:Drivers/BME680/bme680.c **** if (mem_page != dev->mem_page) { -1051:Drivers/BME680/bme680.c **** dev->mem_page = mem_page; -1052:Drivers/BME680/bme680.c **** -1053:Drivers/BME680/bme680.c **** dev->com_rslt = dev->read(dev->dev_id, BME680_MEM_PAGE_ADDR | BME680_SPI_RD_MSK, ®, 1); -1054:Drivers/BME680/bme680.c **** if (dev->com_rslt != 0) -1055:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; -1056:Drivers/BME680/bme680.c **** -1057:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { -1058:Drivers/BME680/bme680.c **** reg = reg & (~BME680_MEM_PAGE_MSK); -1059:Drivers/BME680/bme680.c **** reg = reg | (dev->mem_page & BME680_MEM_PAGE_MSK); -1060:Drivers/BME680/bme680.c **** -1061:Drivers/BME680/bme680.c **** dev->com_rslt = dev->write(dev->dev_id, BME680_MEM_PAGE_ADDR & BME680_SPI_WR_MSK, -1062:Drivers/BME680/bme680.c **** ®, 1); -1063:Drivers/BME680/bme680.c **** if (dev->com_rslt != 0) -1064:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; -1065:Drivers/BME680/bme680.c **** } -1066:Drivers/BME680/bme680.c **** } -1067:Drivers/BME680/bme680.c **** } -1068:Drivers/BME680/bme680.c **** -1069:Drivers/BME680/bme680.c **** return rslt; -1070:Drivers/BME680/bme680.c **** } -1071:Drivers/BME680/bme680.c **** -1072:Drivers/BME680/bme680.c **** /*! -1073:Drivers/BME680/bme680.c **** * @brief This internal API is used to get the memory page based on register address. -1074:Drivers/BME680/bme680.c **** */ -1075:Drivers/BME680/bme680.c **** static int8_t get_mem_page(struct bme680_dev *dev) -1076:Drivers/BME680/bme680.c **** { -1077:Drivers/BME680/bme680.c **** int8_t rslt; -1078:Drivers/BME680/bme680.c **** uint8_t reg; -1079:Drivers/BME680/bme680.c **** -1080:Drivers/BME680/bme680.c **** /* Check for null pointer in the device structure*/ -1081:Drivers/BME680/bme680.c **** rslt = null_ptr_check(dev); -1082:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { -1083:Drivers/BME680/bme680.c **** dev->com_rslt = dev->read(dev->dev_id, BME680_MEM_PAGE_ADDR | BME680_SPI_RD_MSK, ®, 1); -1084:Drivers/BME680/bme680.c **** if (dev->com_rslt != 0) -1085:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; -1086:Drivers/BME680/bme680.c **** else -1087:Drivers/BME680/bme680.c **** dev->mem_page = reg & BME680_MEM_PAGE_MSK; -1088:Drivers/BME680/bme680.c **** } -1089:Drivers/BME680/bme680.c **** -1090:Drivers/BME680/bme680.c **** return rslt; -1091:Drivers/BME680/bme680.c **** } -1092:Drivers/BME680/bme680.c **** -1093:Drivers/BME680/bme680.c **** /*! -1094:Drivers/BME680/bme680.c **** * @brief This internal API is used to validate the boundary -1095:Drivers/BME680/bme680.c **** * conditions. -1096:Drivers/BME680/bme680.c **** */ -1097:Drivers/BME680/bme680.c **** static int8_t boundary_check(uint8_t *value, uint8_t min, uint8_t max, struct bme680_dev *dev) -1098:Drivers/BME680/bme680.c **** { -1099:Drivers/BME680/bme680.c **** int8_t rslt = BME680_OK; - ARM GAS /tmp/ccvbgJts.s page 21 - - -1100:Drivers/BME680/bme680.c **** -1101:Drivers/BME680/bme680.c **** if (value != NULL) { -1102:Drivers/BME680/bme680.c **** /* Check if value is below minimum value */ -1103:Drivers/BME680/bme680.c **** if (*value < min) { -1104:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to minimum value */ -1105:Drivers/BME680/bme680.c **** *value = min; -1106:Drivers/BME680/bme680.c **** dev->info_msg |= BME680_I_MIN_CORRECTION; -1107:Drivers/BME680/bme680.c **** } -1108:Drivers/BME680/bme680.c **** /* Check if value is above maximum value */ -1109:Drivers/BME680/bme680.c **** if (*value > max) { -1110:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to maximum value */ -1111:Drivers/BME680/bme680.c **** *value = max; -1112:Drivers/BME680/bme680.c **** dev->info_msg |= BME680_I_MAX_CORRECTION; -1113:Drivers/BME680/bme680.c **** } -1114:Drivers/BME680/bme680.c **** } else { -1115:Drivers/BME680/bme680.c **** rslt = BME680_E_NULL_PTR; -1116:Drivers/BME680/bme680.c **** } -1117:Drivers/BME680/bme680.c **** -1118:Drivers/BME680/bme680.c **** return rslt; -1119:Drivers/BME680/bme680.c **** } -1120:Drivers/BME680/bme680.c **** -1121:Drivers/BME680/bme680.c **** /*! -1122:Drivers/BME680/bme680.c **** * @brief This internal API is used to validate the device structure pointer for -1123:Drivers/BME680/bme680.c **** * null conditions. -1124:Drivers/BME680/bme680.c **** */ -1125:Drivers/BME680/bme680.c **** static int8_t null_ptr_check(const struct bme680_dev *dev) -1126:Drivers/BME680/bme680.c **** { -1127:Drivers/BME680/bme680.c **** int8_t rslt; -1128:Drivers/BME680/bme680.c **** -1129:Drivers/BME680/bme680.c **** if ((dev == NULL) || (dev->read == NULL) || (dev->write == NULL) || (dev->delay_ms == NULL)) { - 43 .loc 1 1129 0 - 44 0006 33D0 beq .L4 - 45 0008 8D6C ldr r5, [r1, #72] - 46 000a 002D cmp r5, #0 - 47 000c 33D0 beq .L5 - 48 000e CB6C ldr r3, [r1, #76] - 49 0010 002B cmp r3, #0 - 50 0012 33D0 beq .L6 - 51 0014 0B6D ldr r3, [r1, #80] - 52 0016 002B cmp r3, #0 - 53 0018 33D0 beq .L7 - 54 .LVL2: - 55 .LBE52: - 56 .LBE51: -1045:Drivers/BME680/bme680.c **** mem_page = BME680_MEM_PAGE1; - 57 .loc 1 1045 0 - 58 001a 40B2 sxtb r0, r0 - 59 001c 0028 cmp r0, #0 - 60 001e 25DB blt .L12 -1048:Drivers/BME680/bme680.c **** - 61 .loc 1 1048 0 - 62 0020 1023 movs r3, #16 - 63 .L3: - 64 .LVL3: -1050:Drivers/BME680/bme680.c **** dev->mem_page = mem_page; - 65 .loc 1 1050 0 - 66 0022 E278 ldrb r2, [r4, #3] - ARM GAS /tmp/ccvbgJts.s page 22 - - - 67 0024 9A42 cmp r2, r3 - 68 0026 2FD0 beq .L9 -1051:Drivers/BME680/bme680.c **** - 69 .loc 1 1051 0 - 70 0028 E370 strb r3, [r4, #3] -1053:Drivers/BME680/bme680.c **** if (dev->com_rslt != 0) - 71 .loc 1 1053 0 - 72 002a 6078 ldrb r0, [r4, #1] - 73 .LVL4: - 74 002c 0123 movs r3, #1 - 75 .LVL5: - 76 002e 6A46 mov r2, sp - 77 0030 0732 adds r2, r2, #7 - 78 0032 F321 movs r1, #243 - 79 .LVL6: - 80 0034 A847 blx r5 - 81 .LVL7: - 82 0036 5423 movs r3, #84 - 83 0038 E054 strb r0, [r4, r3] -1054:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; - 84 .loc 1 1054 0 - 85 003a 0028 cmp r0, #0 - 86 003c 26D1 bne .L10 - 87 .LVL8: -1058:Drivers/BME680/bme680.c **** reg = reg | (dev->mem_page & BME680_MEM_PAGE_MSK); - 88 .loc 1 1058 0 - 89 003e 6B46 mov r3, sp - 90 0040 DA1D adds r2, r3, #7 - 91 0042 1378 ldrb r3, [r2] - 92 0044 1021 movs r1, #16 - 93 0046 8B43 bics r3, r1 - 94 0048 1900 movs r1, r3 -1059:Drivers/BME680/bme680.c **** - 95 .loc 1 1059 0 - 96 004a 0320 movs r0, #3 - 97 004c 2056 ldrsb r0, [r4, r0] - 98 004e 1023 movs r3, #16 - 99 0050 0340 ands r3, r0 - 100 0052 0B43 orrs r3, r1 - 101 0054 1370 strb r3, [r2] -1061:Drivers/BME680/bme680.c **** ®, 1); - 102 .loc 1 1061 0 - 103 0056 6078 ldrb r0, [r4, #1] - 104 0058 0123 movs r3, #1 - 105 005a 7321 movs r1, #115 - 106 005c E56C ldr r5, [r4, #76] - 107 005e A847 blx r5 - 108 .LVL9: - 109 0060 5422 movs r2, #84 - 110 0062 A054 strb r0, [r4, r2] -1063:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; - 111 .loc 1 1063 0 - 112 0064 0028 cmp r0, #0 - 113 0066 14D1 bne .L13 - 114 .LVL10: - 115 .L2: -1070:Drivers/BME680/bme680.c **** - ARM GAS /tmp/ccvbgJts.s page 23 - - - 116 .loc 1 1070 0 - 117 0068 03B0 add sp, sp, #12 - 118 @ sp needed - 119 .LVL11: - 120 006a 30BD pop {r4, r5, pc} - 121 .LVL12: - 122 .L12: -1046:Drivers/BME680/bme680.c **** else - 123 .loc 1 1046 0 - 124 006c 0023 movs r3, #0 - 125 006e D8E7 b .L3 - 126 .LVL13: - 127 .L4: - 128 .LBB54: - 129 .LBB53: -1130:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ -1131:Drivers/BME680/bme680.c **** rslt = BME680_E_NULL_PTR; - 130 .loc 1 1131 0 - 131 0070 0120 movs r0, #1 - 132 .LVL14: - 133 0072 4042 rsbs r0, r0, #0 - 134 0074 F8E7 b .L2 - 135 .LVL15: - 136 .L5: - 137 0076 0120 movs r0, #1 - 138 .LVL16: - 139 0078 4042 rsbs r0, r0, #0 - 140 007a F5E7 b .L2 - 141 .LVL17: - 142 .L6: - 143 007c 0120 movs r0, #1 - 144 .LVL18: - 145 007e 4042 rsbs r0, r0, #0 - 146 0080 F2E7 b .L2 - 147 .LVL19: - 148 .L7: - 149 0082 0120 movs r0, #1 - 150 .LVL20: - 151 0084 4042 rsbs r0, r0, #0 - 152 0086 EFE7 b .L2 - 153 .LVL21: - 154 .L9: -1132:Drivers/BME680/bme680.c **** } else { -1133:Drivers/BME680/bme680.c **** /* Device structure is fine */ -1134:Drivers/BME680/bme680.c **** rslt = BME680_OK; - 155 .loc 1 1134 0 - 156 0088 0020 movs r0, #0 - 157 008a EDE7 b .L2 - 158 .LVL22: - 159 .L10: - 160 .LBE53: - 161 .LBE54: -1055:Drivers/BME680/bme680.c **** - 162 .loc 1 1055 0 - 163 008c 0220 movs r0, #2 - 164 008e 4042 rsbs r0, r0, #0 - 165 0090 EAE7 b .L2 - ARM GAS /tmp/ccvbgJts.s page 24 - - - 166 .LVL23: - 167 .L13: -1064:Drivers/BME680/bme680.c **** } - 168 .loc 1 1064 0 - 169 0092 0220 movs r0, #2 - 170 0094 4042 rsbs r0, r0, #0 - 171 0096 E7E7 b .L2 - 172 .cfi_endproc - 173 .LFE21: - 175 .section .text.get_mem_page,"ax",%progbits - 176 .align 1 - 177 .syntax unified - 178 .code 16 - 179 .thumb_func - 180 .fpu softvfp - 182 get_mem_page: - 183 .LFB22: -1076:Drivers/BME680/bme680.c **** int8_t rslt; - 184 .loc 1 1076 0 - 185 .cfi_startproc - 186 @ args = 0, pretend = 0, frame = 8 - 187 @ frame_needed = 0, uses_anonymous_args = 0 - 188 .LVL24: - 189 0000 30B5 push {r4, r5, lr} - 190 .LCFI2: - 191 .cfi_def_cfa_offset 12 - 192 .cfi_offset 4, -12 - 193 .cfi_offset 5, -8 - 194 .cfi_offset 14, -4 - 195 0002 83B0 sub sp, sp, #12 - 196 .LCFI3: - 197 .cfi_def_cfa_offset 24 - 198 0004 041E subs r4, r0, #0 - 199 .LVL25: - 200 .LBB55: - 201 .LBB56: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 202 .loc 1 1129 0 - 203 0006 19D0 beq .L16 - 204 0008 856C ldr r5, [r0, #72] - 205 000a 002D cmp r5, #0 - 206 000c 19D0 beq .L17 - 207 000e C36C ldr r3, [r0, #76] - 208 0010 002B cmp r3, #0 - 209 0012 19D0 beq .L18 - 210 0014 036D ldr r3, [r0, #80] - 211 0016 002B cmp r3, #0 - 212 0018 19D0 beq .L19 - 213 .LVL26: - 214 .LBE56: - 215 .LBE55: -1083:Drivers/BME680/bme680.c **** if (dev->com_rslt != 0) - 216 .loc 1 1083 0 - 217 001a 4078 ldrb r0, [r0, #1] - 218 .LVL27: - 219 001c 0123 movs r3, #1 - 220 001e 6A46 mov r2, sp - ARM GAS /tmp/ccvbgJts.s page 25 - - - 221 0020 0732 adds r2, r2, #7 - 222 0022 F321 movs r1, #243 - 223 0024 A847 blx r5 - 224 .LVL28: - 225 0026 5422 movs r2, #84 - 226 0028 A054 strb r0, [r4, r2] -1084:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; - 227 .loc 1 1084 0 - 228 002a 0028 cmp r0, #0 - 229 002c 12D1 bne .L20 -1087:Drivers/BME680/bme680.c **** } - 230 .loc 1 1087 0 - 231 002e 6B46 mov r3, sp - 232 0030 DA79 ldrb r2, [r3, #7] - 233 0032 1023 movs r3, #16 - 234 0034 1340 ands r3, r2 - 235 0036 E370 strb r3, [r4, #3] - 236 .L15: - 237 .LVL29: -1091:Drivers/BME680/bme680.c **** - 238 .loc 1 1091 0 - 239 0038 03B0 add sp, sp, #12 - 240 @ sp needed - 241 .LVL30: - 242 003a 30BD pop {r4, r5, pc} - 243 .LVL31: - 244 .L16: - 245 .LBB58: - 246 .LBB57: -1131:Drivers/BME680/bme680.c **** } else { - 247 .loc 1 1131 0 - 248 003c 0120 movs r0, #1 - 249 .LVL32: - 250 003e 4042 rsbs r0, r0, #0 - 251 0040 FAE7 b .L15 - 252 .LVL33: - 253 .L17: - 254 0042 0120 movs r0, #1 - 255 .LVL34: - 256 0044 4042 rsbs r0, r0, #0 - 257 0046 F7E7 b .L15 - 258 .LVL35: - 259 .L18: - 260 0048 0120 movs r0, #1 - 261 .LVL36: - 262 004a 4042 rsbs r0, r0, #0 - 263 004c F4E7 b .L15 - 264 .LVL37: - 265 .L19: - 266 004e 0120 movs r0, #1 - 267 .LVL38: - 268 0050 4042 rsbs r0, r0, #0 - 269 0052 F1E7 b .L15 - 270 .LVL39: - 271 .L20: - 272 .LBE57: - 273 .LBE58: - ARM GAS /tmp/ccvbgJts.s page 26 - - -1085:Drivers/BME680/bme680.c **** else - 274 .loc 1 1085 0 - 275 0054 0220 movs r0, #2 - 276 0056 4042 rsbs r0, r0, #0 - 277 0058 EEE7 b .L15 - 278 .cfi_endproc - 279 .LFE22: - 281 .section .text.bme680_get_regs,"ax",%progbits - 282 .align 1 - 283 .global bme680_get_regs - 284 .syntax unified - 285 .code 16 - 286 .thumb_func - 287 .fpu softvfp - 289 bme680_get_regs: - 290 .LFB1: - 265:Drivers/BME680/bme680.c **** int8_t rslt; - 291 .loc 1 265 0 - 292 .cfi_startproc - 293 @ args = 0, pretend = 0, frame = 8 - 294 @ frame_needed = 0, uses_anonymous_args = 0 - 295 .LVL40: - 296 0000 F0B5 push {r4, r5, r6, r7, lr} - 297 .LCFI4: - 298 .cfi_def_cfa_offset 20 - 299 .cfi_offset 4, -20 - 300 .cfi_offset 5, -16 - 301 .cfi_offset 6, -12 - 302 .cfi_offset 7, -8 - 303 .cfi_offset 14, -4 - 304 0002 83B0 sub sp, sp, #12 - 305 .LCFI5: - 306 .cfi_def_cfa_offset 32 - 307 0004 0500 movs r5, r0 - 308 0006 0191 str r1, [sp, #4] - 309 0008 1700 movs r7, r2 - 310 000a 1E1E subs r6, r3, #0 - 311 .LVL41: - 312 .LBB59: - 313 .LBB60: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 314 .loc 1 1129 0 - 315 000c 23D0 beq .L24 - 316 000e 9B6C ldr r3, [r3, #72] - 317 .LVL42: - 318 0010 002B cmp r3, #0 - 319 0012 23D0 beq .L25 - 320 0014 F36C ldr r3, [r6, #76] - 321 0016 002B cmp r3, #0 - 322 0018 23D0 beq .L26 - 323 001a 336D ldr r3, [r6, #80] - 324 001c 002B cmp r3, #0 - 325 001e 23D0 beq .L27 - 326 .LVL43: - 327 .LBE60: - 328 .LBE59: - 271:Drivers/BME680/bme680.c **** /* Set the memory page */ - ARM GAS /tmp/ccvbgJts.s page 27 - - - 329 .loc 1 271 0 - 330 0020 B378 ldrb r3, [r6, #2] - 331 0022 002B cmp r3, #0 - 332 0024 0DD0 beq .L30 - 333 .LBB63: - 334 .LBB61: - 335 .loc 1 1134 0 - 336 0026 0024 movs r4, #0 - 337 .LVL44: - 338 .L23: - 339 .LBE61: - 340 .LBE63: - 277:Drivers/BME680/bme680.c **** if (dev->com_rslt != 0) - 341 .loc 1 277 0 - 342 0028 7078 ldrb r0, [r6, #1] - 343 002a 3B00 movs r3, r7 - 344 002c 019A ldr r2, [sp, #4] - 345 002e 2900 movs r1, r5 - 346 0030 B56C ldr r5, [r6, #72] - 347 .LVL45: - 348 0032 A847 blx r5 - 349 .LVL46: - 350 0034 5423 movs r3, #84 - 351 0036 F054 strb r0, [r6, r3] - 278:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; - 352 .loc 1 278 0 - 353 0038 0028 cmp r0, #0 - 354 003a 18D1 bne .L31 - 355 .LVL47: - 356 .L22: - 283:Drivers/BME680/bme680.c **** - 357 .loc 1 283 0 - 358 003c 2000 movs r0, r4 - 359 003e 03B0 add sp, sp, #12 - 360 @ sp needed - 361 .LVL48: - 362 .LVL49: - 363 0040 F0BD pop {r4, r5, r6, r7, pc} - 364 .LVL50: - 365 .L30: - 273:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 366 .loc 1 273 0 - 367 0042 3100 movs r1, r6 - 368 .LVL51: - 369 0044 FFF7FEFF bl set_mem_page - 370 .LVL52: - 371 0048 041E subs r4, r0, #0 - 372 .LVL53: - 274:Drivers/BME680/bme680.c **** reg_addr = reg_addr | BME680_SPI_RD_MSK; - 373 .loc 1 274 0 - 374 004a EDD1 bne .L23 - 275:Drivers/BME680/bme680.c **** } - 375 .loc 1 275 0 - 376 004c 8023 movs r3, #128 - 377 004e 5B42 rsbs r3, r3, #0 - 378 0050 1D43 orrs r5, r3 - 379 0052 EDB2 uxtb r5, r5 - ARM GAS /tmp/ccvbgJts.s page 28 - - - 380 .LVL54: - 381 0054 E8E7 b .L23 - 382 .LVL55: - 383 .L24: - 384 .LBB64: - 385 .LBB62: -1131:Drivers/BME680/bme680.c **** } else { - 386 .loc 1 1131 0 - 387 0056 0124 movs r4, #1 - 388 0058 6442 rsbs r4, r4, #0 - 389 005a EFE7 b .L22 - 390 .LVL56: - 391 .L25: - 392 005c 0124 movs r4, #1 - 393 005e 6442 rsbs r4, r4, #0 - 394 0060 ECE7 b .L22 - 395 .L26: - 396 0062 0124 movs r4, #1 - 397 0064 6442 rsbs r4, r4, #0 - 398 0066 E9E7 b .L22 - 399 .L27: - 400 0068 0124 movs r4, #1 - 401 006a 6442 rsbs r4, r4, #0 - 402 006c E6E7 b .L22 - 403 .LVL57: - 404 .L31: - 405 .LBE62: - 406 .LBE64: - 279:Drivers/BME680/bme680.c **** } - 407 .loc 1 279 0 - 408 006e 0224 movs r4, #2 - 409 .LVL58: - 410 0070 6442 rsbs r4, r4, #0 - 411 0072 E3E7 b .L22 - 412 .cfi_endproc - 413 .LFE1: - 415 .section .text.bme680_set_regs,"ax",%progbits - 416 .align 1 - 417 .global bme680_set_regs - 418 .syntax unified - 419 .code 16 - 420 .thumb_func - 421 .fpu softvfp - 423 bme680_set_regs: - 424 .LFB2: - 290:Drivers/BME680/bme680.c **** int8_t rslt; - 425 .loc 1 290 0 - 426 .cfi_startproc - 427 @ args = 0, pretend = 0, frame = 48 - 428 @ frame_needed = 0, uses_anonymous_args = 0 - 429 .LVL59: - 430 0000 F0B5 push {r4, r5, r6, r7, lr} - 431 .LCFI6: - 432 .cfi_def_cfa_offset 20 - 433 .cfi_offset 4, -20 - 434 .cfi_offset 5, -16 - 435 .cfi_offset 6, -12 - ARM GAS /tmp/ccvbgJts.s page 29 - - - 436 .cfi_offset 7, -8 - 437 .cfi_offset 14, -4 - 438 0002 D646 mov lr, r10 - 439 0004 00B5 push {lr} - 440 .LCFI7: - 441 .cfi_def_cfa_offset 24 - 442 .cfi_offset 10, -24 - 443 0006 8CB0 sub sp, sp, #48 - 444 .LCFI8: - 445 .cfi_def_cfa_offset 72 - 446 0008 0500 movs r5, r0 - 447 000a 0E00 movs r6, r1 - 448 000c 1400 movs r4, r2 - 449 000e 0092 str r2, [sp] - 450 0010 1F00 movs r7, r3 - 293:Drivers/BME680/bme680.c **** uint16_t index; - 451 .loc 1 293 0 - 452 0012 2822 movs r2, #40 - 453 .LVL60: - 454 0014 0021 movs r1, #0 - 455 .LVL61: - 456 0016 02A8 add r0, sp, #8 - 457 .LVL62: - 458 0018 FFF7FEFF bl memset - 459 .LVL63: - 460 .LBB65: - 461 .LBB66: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 462 .loc 1 1129 0 - 463 001c 002F cmp r7, #0 - 464 001e 4AD0 beq .L38 - 465 0020 BB6C ldr r3, [r7, #72] - 466 0022 002B cmp r3, #0 - 467 0024 4BD0 beq .L39 - 468 0026 FB6C ldr r3, [r7, #76] - 469 0028 002B cmp r3, #0 - 470 002a 4CD0 beq .L40 - 471 002c 3B6D ldr r3, [r7, #80] - 472 002e 002B cmp r3, #0 - 473 0030 4DD0 beq .L41 - 474 .LVL64: - 475 .LBE66: - 476 .LBE65: - 299:Drivers/BME680/bme680.c **** /* Interleave the 2 arrays */ - 477 .loc 1 299 0 - 478 0032 631E subs r3, r4, #1 - 479 0034 DBB2 uxtb r3, r3 - 480 0036 122B cmp r3, #18 - 481 0038 03D8 bhi .L44 - 301:Drivers/BME680/bme680.c **** if (dev->intf == BME680_SPI_INTF) { - 482 .loc 1 301 0 - 483 003a 0024 movs r4, #0 - 484 .LBB69: - 485 .LBB67: - 486 .loc 1 1134 0 - 487 003c 0023 movs r3, #0 - 488 003e 0193 str r3, [sp, #4] - ARM GAS /tmp/ccvbgJts.s page 30 - - - 489 0040 18E0 b .L34 - 490 .L44: - 491 .LBE67: - 492 .LBE69: - 318:Drivers/BME680/bme680.c **** } - 493 .loc 1 318 0 - 494 0042 0423 movs r3, #4 - 495 0044 5B42 rsbs r3, r3, #0 - 496 0046 0193 str r3, [sp, #4] - 497 0048 30E0 b .L33 - 498 .LVL65: - 499 .L46: - 304:Drivers/BME680/bme680.c **** tmp_buff[(2 * index)] = reg_addr[index] & BME680_SPI_WR_MSK; - 500 .loc 1 304 0 - 501 004a 2B19 adds r3, r5, r4 - 502 004c 9A46 mov r10, r3 - 503 004e 1878 ldrb r0, [r3] - 504 0050 3900 movs r1, r7 - 505 0052 FFF7FEFF bl set_mem_page - 506 .LVL66: - 507 0056 0190 str r0, [sp, #4] - 508 .LVL67: - 305:Drivers/BME680/bme680.c **** } else { - 509 .loc 1 305 0 - 510 0058 6300 lsls r3, r4, #1 - 511 005a 5246 mov r2, r10 - 512 005c 1178 ldrb r1, [r2] - 513 005e 7F22 movs r2, #127 - 514 0060 0A40 ands r2, r1 - 515 0062 02A9 add r1, sp, #8 - 516 0064 CA54 strb r2, [r1, r3] - 517 .LVL68: - 518 .L36: - 309:Drivers/BME680/bme680.c **** } - 519 .loc 1 309 0 discriminator 2 - 520 0066 6300 lsls r3, r4, #1 - 521 0068 0133 adds r3, r3, #1 - 522 006a 325D ldrb r2, [r6, r4] - 523 006c 02A9 add r1, sp, #8 - 524 006e CA54 strb r2, [r1, r3] - 301:Drivers/BME680/bme680.c **** if (dev->intf == BME680_SPI_INTF) { - 525 .loc 1 301 0 discriminator 2 - 526 0070 0134 adds r4, r4, #1 - 527 .LVL69: - 528 0072 A4B2 uxth r4, r4 - 529 .LVL70: - 530 .L34: - 301:Drivers/BME680/bme680.c **** if (dev->intf == BME680_SPI_INTF) { - 531 .loc 1 301 0 is_stmt 0 discriminator 1 - 532 0074 6B46 mov r3, sp - 533 0076 1B88 ldrh r3, [r3] - 534 0078 A342 cmp r3, r4 - 535 007a 07D9 bls .L45 - 302:Drivers/BME680/bme680.c **** /* Set the memory page */ - 536 .loc 1 302 0 is_stmt 1 - 537 007c BB78 ldrb r3, [r7, #2] - 538 007e 002B cmp r3, #0 - ARM GAS /tmp/ccvbgJts.s page 31 - - - 539 0080 E3D0 beq .L46 - 307:Drivers/BME680/bme680.c **** } - 540 .loc 1 307 0 - 541 0082 6300 lsls r3, r4, #1 - 542 0084 2A5D ldrb r2, [r5, r4] - 543 0086 02A9 add r1, sp, #8 - 544 0088 CA54 strb r2, [r1, r3] - 545 008a ECE7 b .L36 - 546 .L45: - 312:Drivers/BME680/bme680.c **** dev->com_rslt = dev->write(dev->dev_id, tmp_buff[0], &tmp_buff[1], (2 * len) - 1); - 547 .loc 1 312 0 - 548 008c 019A ldr r2, [sp, #4] - 549 008e 002A cmp r2, #0 - 550 0090 0CD1 bne .L33 - 313:Drivers/BME680/bme680.c **** if (dev->com_rslt != 0) - 551 .loc 1 313 0 - 552 0092 5B00 lsls r3, r3, #1 - 553 0094 013B subs r3, r3, #1 - 554 0096 9BB2 uxth r3, r3 - 555 0098 02AA add r2, sp, #8 - 556 009a 1178 ldrb r1, [r2] - 557 009c 7878 ldrb r0, [r7, #1] - 558 009e 0132 adds r2, r2, #1 - 559 00a0 FC6C ldr r4, [r7, #76] - 560 .LVL71: - 561 00a2 A047 blx r4 - 562 .LVL72: - 563 00a4 5423 movs r3, #84 - 564 00a6 F854 strb r0, [r7, r3] - 314:Drivers/BME680/bme680.c **** rslt = BME680_E_COM_FAIL; - 565 .loc 1 314 0 - 566 00a8 0028 cmp r0, #0 - 567 00aa 14D1 bne .L47 - 568 .LVL73: - 569 .L33: - 323:Drivers/BME680/bme680.c **** - 570 .loc 1 323 0 - 571 00ac 0198 ldr r0, [sp, #4] - 572 00ae 0CB0 add sp, sp, #48 - 573 @ sp needed - 574 .LVL74: - 575 .LVL75: - 576 .LVL76: - 577 00b0 04BC pop {r2} - 578 00b2 9246 mov r10, r2 - 579 00b4 F0BD pop {r4, r5, r6, r7, pc} - 580 .LVL77: - 581 .L38: - 582 .LBB70: - 583 .LBB68: -1131:Drivers/BME680/bme680.c **** } else { - 584 .loc 1 1131 0 - 585 00b6 0123 movs r3, #1 - 586 00b8 5B42 rsbs r3, r3, #0 - 587 00ba 0193 str r3, [sp, #4] - 588 00bc F6E7 b .L33 - 589 .L39: - ARM GAS /tmp/ccvbgJts.s page 32 - - - 590 00be 0123 movs r3, #1 - 591 00c0 5B42 rsbs r3, r3, #0 - 592 00c2 0193 str r3, [sp, #4] - 593 00c4 F2E7 b .L33 - 594 .L40: - 595 00c6 0123 movs r3, #1 - 596 00c8 5B42 rsbs r3, r3, #0 - 597 00ca 0193 str r3, [sp, #4] - 598 00cc EEE7 b .L33 - 599 .L41: - 600 00ce 0123 movs r3, #1 - 601 00d0 5B42 rsbs r3, r3, #0 - 602 00d2 0193 str r3, [sp, #4] - 603 00d4 EAE7 b .L33 - 604 .LVL78: - 605 .L47: - 606 .LBE68: - 607 .LBE70: - 315:Drivers/BME680/bme680.c **** } - 608 .loc 1 315 0 - 609 00d6 0223 movs r3, #2 - 610 00d8 5B42 rsbs r3, r3, #0 - 611 00da 0193 str r3, [sp, #4] - 612 .LVL79: - 613 00dc E6E7 b .L33 - 614 .cfi_endproc - 615 .LFE2: - 617 .section .text.bme680_soft_reset,"ax",%progbits - 618 .align 1 - 619 .global bme680_soft_reset - 620 .syntax unified - 621 .code 16 - 622 .thumb_func - 623 .fpu softvfp - 625 bme680_soft_reset: - 626 .LFB3: - 329:Drivers/BME680/bme680.c **** int8_t rslt; - 627 .loc 1 329 0 - 628 .cfi_startproc - 629 @ args = 0, pretend = 0, frame = 8 - 630 @ frame_needed = 0, uses_anonymous_args = 0 - 631 .LVL80: - 632 0000 30B5 push {r4, r5, lr} - 633 .LCFI9: - 634 .cfi_def_cfa_offset 12 - 635 .cfi_offset 4, -12 - 636 .cfi_offset 5, -8 - 637 .cfi_offset 14, -4 - 638 0002 83B0 sub sp, sp, #12 - 639 .LCFI10: - 640 .cfi_def_cfa_offset 24 - 641 0004 0400 movs r4, r0 - 331:Drivers/BME680/bme680.c **** /* 0xb6 is the soft reset command */ - 642 .loc 1 331 0 - 643 0006 6B46 mov r3, sp - 644 0008 E022 movs r2, #224 - 645 000a DA71 strb r2, [r3, #7] - ARM GAS /tmp/ccvbgJts.s page 33 - - - 333:Drivers/BME680/bme680.c **** - 646 .loc 1 333 0 - 647 000c 6B46 mov r3, sp - 648 000e 2A3A subs r2, r2, #42 - 649 0010 9A71 strb r2, [r3, #6] - 650 .LVL81: - 651 .LBB71: - 652 .LBB72: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 653 .loc 1 1129 0 - 654 0012 0028 cmp r0, #0 - 655 0014 2BD0 beq .L51 - 656 0016 836C ldr r3, [r0, #72] - 657 0018 002B cmp r3, #0 - 658 001a 2BD0 beq .L52 - 659 001c C36C ldr r3, [r0, #76] - 660 001e 002B cmp r3, #0 - 661 0020 2BD0 beq .L53 - 662 0022 036D ldr r3, [r0, #80] - 663 0024 002B cmp r3, #0 - 664 0026 2BD0 beq .L54 - 665 .LVL82: - 666 .LBE72: - 667 .LBE71: - 338:Drivers/BME680/bme680.c **** rslt = get_mem_page(dev); - 668 .loc 1 338 0 - 669 0028 8378 ldrb r3, [r0, #2] - 670 002a 002B cmp r3, #0 - 671 002c 05D0 beq .L56 - 672 .LBB75: - 673 .LBB73: - 674 .loc 1 1134 0 - 675 002e 0025 movs r5, #0 - 676 .LVL83: - 677 .L50: - 678 .LBE73: - 679 .LBE75: - 342:Drivers/BME680/bme680.c **** rslt = bme680_set_regs(®_addr, &soft_rst_cmd, 1, dev); - 680 .loc 1 342 0 - 681 0030 002D cmp r5, #0 - 682 0032 06D0 beq .L57 - 683 .LVL84: - 684 .L49: - 356:Drivers/BME680/bme680.c **** - 685 .loc 1 356 0 - 686 0034 2800 movs r0, r5 - 687 0036 03B0 add sp, sp, #12 - 688 @ sp needed - 689 .LVL85: - 690 .LVL86: - 691 0038 30BD pop {r4, r5, pc} - 692 .LVL87: - 693 .L56: - 339:Drivers/BME680/bme680.c **** - 694 .loc 1 339 0 - 695 003a FFF7FEFF bl get_mem_page - 696 .LVL88: - ARM GAS /tmp/ccvbgJts.s page 34 - - - 697 003e 0500 movs r5, r0 - 698 .LVL89: - 699 0040 F6E7 b .L50 - 700 .LVL90: - 701 .L57: - 343:Drivers/BME680/bme680.c **** /* Wait for 5ms */ - 702 .loc 1 343 0 - 703 0042 2300 movs r3, r4 - 704 0044 0122 movs r2, #1 - 705 0046 6946 mov r1, sp - 706 0048 0631 adds r1, r1, #6 - 707 004a 6846 mov r0, sp - 708 004c 0730 adds r0, r0, #7 - 709 004e FFF7FEFF bl bme680_set_regs - 710 .LVL91: - 711 0052 0500 movs r5, r0 - 712 .LVL92: - 345:Drivers/BME680/bme680.c **** - 713 .loc 1 345 0 - 714 0054 0A20 movs r0, #10 - 715 .LVL93: - 716 0056 236D ldr r3, [r4, #80] - 717 0058 9847 blx r3 - 718 .LVL94: - 347:Drivers/BME680/bme680.c **** /* After reset get the memory page */ - 719 .loc 1 347 0 - 720 005a 002D cmp r5, #0 - 721 005c EAD1 bne .L49 - 349:Drivers/BME680/bme680.c **** rslt = get_mem_page(dev); - 722 .loc 1 349 0 - 723 005e A378 ldrb r3, [r4, #2] - 724 0060 002B cmp r3, #0 - 725 0062 E7D1 bne .L49 - 350:Drivers/BME680/bme680.c **** } - 726 .loc 1 350 0 - 727 0064 2000 movs r0, r4 - 728 0066 FFF7FEFF bl get_mem_page - 729 .LVL95: - 730 006a 0500 movs r5, r0 - 731 .LVL96: - 732 006c E2E7 b .L49 - 733 .LVL97: - 734 .L51: - 735 .LBB76: - 736 .LBB74: -1131:Drivers/BME680/bme680.c **** } else { - 737 .loc 1 1131 0 - 738 006e 0125 movs r5, #1 - 739 0070 6D42 rsbs r5, r5, #0 - 740 0072 DFE7 b .L49 - 741 .L52: - 742 0074 0125 movs r5, #1 - 743 0076 6D42 rsbs r5, r5, #0 - 744 0078 DCE7 b .L49 - 745 .L53: - 746 007a 0125 movs r5, #1 - 747 007c 6D42 rsbs r5, r5, #0 - ARM GAS /tmp/ccvbgJts.s page 35 - - - 748 007e D9E7 b .L49 - 749 .L54: - 750 0080 0125 movs r5, #1 - 751 0082 6D42 rsbs r5, r5, #0 - 752 0084 D6E7 b .L49 - 753 .LBE74: - 754 .LBE76: - 755 .cfi_endproc - 756 .LFE3: - 758 .section .text.bme680_init,"ax",%progbits - 759 .align 1 - 760 .global bme680_init - 761 .syntax unified - 762 .code 16 - 763 .thumb_func - 764 .fpu softvfp - 766 bme680_init: - 767 .LFB0: - 237:Drivers/BME680/bme680.c **** int8_t rslt; - 768 .loc 1 237 0 - 769 .cfi_startproc - 770 @ args = 0, pretend = 0, frame = 72 - 771 @ frame_needed = 0, uses_anonymous_args = 0 - 772 .LVL98: - 773 0000 F0B5 push {r4, r5, r6, r7, lr} - 774 .LCFI11: - 775 .cfi_def_cfa_offset 20 - 776 .cfi_offset 4, -20 - 777 .cfi_offset 5, -16 - 778 .cfi_offset 6, -12 - 779 .cfi_offset 7, -8 - 780 .cfi_offset 14, -4 - 781 0002 93B0 sub sp, sp, #76 - 782 .LCFI12: - 783 .cfi_def_cfa_offset 96 - 784 0004 041E subs r4, r0, #0 - 785 .LVL99: - 786 .LBB83: - 787 .LBB84: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 788 .loc 1 1129 0 - 789 0006 00D1 bne .LCB858 - 790 0008 E1E0 b .L63 @long jump - 791 .LCB858: - 792 000a 836C ldr r3, [r0, #72] - 793 000c 002B cmp r3, #0 - 794 000e 00D1 bne .LCB862 - 795 0010 E0E0 b .L64 @long jump - 796 .LCB862: - 797 0012 C36C ldr r3, [r0, #76] - 798 0014 002B cmp r3, #0 - 799 0016 00D1 bne .LCB866 - 800 0018 DFE0 b .L65 @long jump - 801 .LCB866: - 802 001a 036D ldr r3, [r0, #80] - 803 001c 002B cmp r3, #0 - 804 001e 00D1 bne .LCB870 - ARM GAS /tmp/ccvbgJts.s page 36 - - - 805 0020 DEE0 b .L66 @long jump - 806 .LCB870: - 807 .LVL100: - 808 .LBE84: - 809 .LBE83: - 244:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 810 .loc 1 244 0 - 811 0022 FFF7FEFF bl bme680_soft_reset - 812 .LVL101: - 245:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_CHIP_ID_ADDR, &dev->chip_id, 1, dev); - 813 .loc 1 245 0 - 814 0026 0028 cmp r0, #0 - 815 0028 01D0 beq .L72 - 816 .LVL102: - 817 .L59: - 259:Drivers/BME680/bme680.c **** - 818 .loc 1 259 0 - 819 002a 13B0 add sp, sp, #76 - 820 @ sp needed - 821 .LVL103: - 822 002c F0BD pop {r4, r5, r6, r7, pc} - 823 .LVL104: - 824 .L72: - 246:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 825 .loc 1 246 0 - 826 002e 2300 movs r3, r4 - 827 0030 0122 movs r2, #1 - 828 0032 2100 movs r1, r4 - 829 0034 D030 adds r0, r0, #208 - 830 .LVL105: - 831 0036 FFF7FEFF bl bme680_get_regs - 832 .LVL106: - 247:Drivers/BME680/bme680.c **** if (dev->chip_id == BME680_CHIP_ID) { - 833 .loc 1 247 0 - 834 003a 0028 cmp r0, #0 - 835 003c F5D1 bne .L59 - 248:Drivers/BME680/bme680.c **** /* Get the Calibration data */ - 836 .loc 1 248 0 - 837 003e 2378 ldrb r3, [r4] - 838 0040 612B cmp r3, #97 - 839 0042 00D0 beq .LCB912 - 840 0044 CFE0 b .L67 @long jump - 841 .LCB912: - 842 .LVL107: - 843 .LBB86: - 844 .LBB87: - 668:Drivers/BME680/bme680.c **** uint8_t temp_var = 0; /* Temporary variable */ - 845 .loc 1 668 0 - 846 0046 4122 movs r2, #65 - 847 0048 0021 movs r1, #0 - 848 004a 01A8 add r0, sp, #4 - 849 .LVL108: - 850 004c FFF7FEFF bl memset - 851 .LVL109: - 669:Drivers/BME680/bme680.c **** - 852 .loc 1 669 0 - 853 0050 6B46 mov r3, sp - ARM GAS /tmp/ccvbgJts.s page 37 - - - 854 0052 0022 movs r2, #0 - 855 0054 DA70 strb r2, [r3, #3] - 856 .LVL110: - 857 .LBB88: - 858 .LBB89: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 859 .loc 1 1129 0 - 860 0056 002C cmp r4, #0 - 861 0058 00D1 bne .LCB929 - 862 005a ACE0 b .L68 @long jump - 863 .LCB929: - 864 005c A36C ldr r3, [r4, #72] - 865 005e 002B cmp r3, #0 - 866 0060 00D1 bne .LCB933 - 867 0062 ABE0 b .L69 @long jump - 868 .LCB933: - 869 0064 E36C ldr r3, [r4, #76] - 870 0066 002B cmp r3, #0 - 871 0068 00D1 bne .LCB937 - 872 006a AAE0 b .L70 @long jump - 873 .LCB937: - 874 006c 236D ldr r3, [r4, #80] - 875 006e 002B cmp r3, #0 - 876 0070 00D1 bne .LCB941 - 877 0072 A9E0 b .L71 @long jump - 878 .LCB941: - 879 .LVL111: - 880 .LBE89: - 881 .LBE88: - 674:Drivers/BME680/bme680.c **** /* Append the second half in the same array */ - 882 .loc 1 674 0 - 883 0074 2300 movs r3, r4 - 884 0076 1932 adds r2, r2, #25 - 885 0078 01A9 add r1, sp, #4 - 886 007a 8920 movs r0, #137 - 887 007c FFF7FEFF bl bme680_get_regs - 888 .LVL112: - 676:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_COEFF_ADDR2, &coeff_array[BME680_COEFF_ADDR1_LEN] - 889 .loc 1 676 0 - 890 0080 0028 cmp r0, #0 - 891 0082 6BD0 beq .L73 - 892 .LVL113: - 893 .L61: - 681:Drivers/BME680/bme680.c **** coeff_array[BME680_T1_LSB_REG])); - 894 .loc 1 681 0 - 895 0084 01AB add r3, sp, #4 - 896 0086 2222 movs r2, #34 - 897 0088 995C ldrb r1, [r3, r2] - 898 008a 0902 lsls r1, r1, #8 - 899 008c 013A subs r2, r2, #1 - 900 008e 9A5C ldrb r2, [r3, r2] - 901 0090 0A43 orrs r2, r1 - 902 0092 E282 strh r2, [r4, #22] - 683:Drivers/BME680/bme680.c **** coeff_array[BME680_T2_LSB_REG])); - 903 .loc 1 683 0 - 904 0094 9978 ldrb r1, [r3, #2] - 905 0096 0902 lsls r1, r1, #8 - ARM GAS /tmp/ccvbgJts.s page 38 - - - 906 0098 5A78 ldrb r2, [r3, #1] - 907 009a 0A43 orrs r2, r1 - 908 009c 2283 strh r2, [r4, #24] - 685:Drivers/BME680/bme680.c **** - 909 .loc 1 685 0 - 910 009e 0322 movs r2, #3 - 911 00a0 9A56 ldrsb r2, [r3, r2] - 912 00a2 A276 strb r2, [r4, #26] - 688:Drivers/BME680/bme680.c **** coeff_array[BME680_P1_LSB_REG])); - 913 .loc 1 688 0 - 914 00a4 9979 ldrb r1, [r3, #6] - 915 00a6 0902 lsls r1, r1, #8 - 916 00a8 5A79 ldrb r2, [r3, #5] - 917 00aa 0A43 orrs r2, r1 - 918 00ac A283 strh r2, [r4, #28] - 690:Drivers/BME680/bme680.c **** coeff_array[BME680_P2_LSB_REG])); - 919 .loc 1 690 0 - 920 00ae 197A ldrb r1, [r3, #8] - 921 00b0 0902 lsls r1, r1, #8 - 922 00b2 DA79 ldrb r2, [r3, #7] - 923 00b4 0A43 orrs r2, r1 - 924 00b6 E283 strh r2, [r4, #30] - 692:Drivers/BME680/bme680.c **** dev->calib.par_p4 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_P4_MSB_REG], - 925 .loc 1 692 0 - 926 00b8 0922 movs r2, #9 - 927 00ba 9A56 ldrsb r2, [r3, r2] - 928 00bc 2026 movs r6, #32 - 929 00be A255 strb r2, [r4, r6] - 693:Drivers/BME680/bme680.c **** coeff_array[BME680_P4_LSB_REG])); - 930 .loc 1 693 0 - 931 00c0 197B ldrb r1, [r3, #12] - 932 00c2 0902 lsls r1, r1, #8 - 933 00c4 DA7A ldrb r2, [r3, #11] - 934 00c6 0A43 orrs r2, r1 - 935 00c8 6284 strh r2, [r4, #34] - 695:Drivers/BME680/bme680.c **** coeff_array[BME680_P5_LSB_REG])); - 936 .loc 1 695 0 - 937 00ca 997B ldrb r1, [r3, #14] - 938 00cc 0902 lsls r1, r1, #8 - 939 00ce 5A7B ldrb r2, [r3, #13] - 940 00d0 0A43 orrs r2, r1 - 941 00d2 A284 strh r2, [r4, #36] - 697:Drivers/BME680/bme680.c **** dev->calib.par_p7 = (int8_t) (coeff_array[BME680_P7_REG]); - 942 .loc 1 697 0 - 943 00d4 1022 movs r2, #16 - 944 00d6 9A56 ldrsb r2, [r3, r2] - 945 00d8 2625 movs r5, #38 - 946 00da 6255 strb r2, [r4, r5] - 698:Drivers/BME680/bme680.c **** dev->calib.par_p8 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_P8_MSB_REG], - 947 .loc 1 698 0 - 948 00dc 0F21 movs r1, #15 - 949 00de 5956 ldrsb r1, [r3, r1] - 950 00e0 2722 movs r2, #39 - 951 00e2 A154 strb r1, [r4, r2] - 699:Drivers/BME680/bme680.c **** coeff_array[BME680_P8_LSB_REG])); - 952 .loc 1 699 0 - 953 00e4 197D ldrb r1, [r3, #20] - ARM GAS /tmp/ccvbgJts.s page 39 - - - 954 00e6 0902 lsls r1, r1, #8 - 955 00e8 DA7C ldrb r2, [r3, #19] - 956 00ea 0A43 orrs r2, r1 - 957 00ec 2285 strh r2, [r4, #40] - 701:Drivers/BME680/bme680.c **** coeff_array[BME680_P9_LSB_REG])); - 958 .loc 1 701 0 - 959 00ee 997D ldrb r1, [r3, #22] - 960 00f0 0902 lsls r1, r1, #8 - 961 00f2 5A7D ldrb r2, [r3, #21] - 962 00f4 0A43 orrs r2, r1 - 963 00f6 6285 strh r2, [r4, #42] - 703:Drivers/BME680/bme680.c **** - 964 .loc 1 703 0 - 965 00f8 D97D ldrb r1, [r3, #23] - 966 00fa 2C22 movs r2, #44 - 967 00fc A154 strb r1, [r4, r2] - 706:Drivers/BME680/bme680.c **** | (coeff_array[BME680_H1_LSB_REG] & BME680_BIT_H1_DATA_MSK)); - 968 .loc 1 706 0 - 969 00fe DF7E ldrb r7, [r3, #27] - 970 0100 3F01 lsls r7, r7, #4 - 707:Drivers/BME680/bme680.c **** dev->calib.par_h2 = (uint16_t) (((uint16_t) coeff_array[BME680_H2_MSB_REG] << BME680_HUM_REG_SHIF - 971 .loc 1 707 0 - 972 0102 9A7E ldrb r2, [r3, #26] - 973 0104 0F21 movs r1, #15 - 974 0106 1140 ands r1, r2 - 706:Drivers/BME680/bme680.c **** | (coeff_array[BME680_H1_LSB_REG] & BME680_BIT_H1_DATA_MSK)); - 975 .loc 1 706 0 - 976 0108 3943 orrs r1, r7 - 977 010a 2181 strh r1, [r4, #8] - 708:Drivers/BME680/bme680.c **** | ((coeff_array[BME680_H2_LSB_REG]) >> BME680_HUM_REG_SHIFT_VAL)); - 978 .loc 1 708 0 - 979 010c 597E ldrb r1, [r3, #25] - 980 010e 0901 lsls r1, r1, #4 - 709:Drivers/BME680/bme680.c **** dev->calib.par_h3 = (int8_t) coeff_array[BME680_H3_REG]; - 981 .loc 1 709 0 - 982 0110 1209 lsrs r2, r2, #4 - 708:Drivers/BME680/bme680.c **** | ((coeff_array[BME680_H2_LSB_REG]) >> BME680_HUM_REG_SHIFT_VAL)); - 983 .loc 1 708 0 - 984 0112 0A43 orrs r2, r1 - 985 0114 6281 strh r2, [r4, #10] - 710:Drivers/BME680/bme680.c **** dev->calib.par_h4 = (int8_t) coeff_array[BME680_H4_REG]; - 986 .loc 1 710 0 - 987 0116 1C22 movs r2, #28 - 988 0118 9A56 ldrsb r2, [r3, r2] - 989 011a 2273 strb r2, [r4, #12] - 711:Drivers/BME680/bme680.c **** dev->calib.par_h5 = (int8_t) coeff_array[BME680_H5_REG]; - 990 .loc 1 711 0 - 991 011c 1D22 movs r2, #29 - 992 011e 9A56 ldrsb r2, [r3, r2] - 993 0120 6273 strb r2, [r4, #13] - 712:Drivers/BME680/bme680.c **** dev->calib.par_h6 = (uint8_t) coeff_array[BME680_H6_REG]; - 994 .loc 1 712 0 - 995 0122 1E22 movs r2, #30 - 996 0124 9A56 ldrsb r2, [r3, r2] - 997 0126 A273 strb r2, [r4, #14] - 713:Drivers/BME680/bme680.c **** dev->calib.par_h7 = (int8_t) coeff_array[BME680_H7_REG]; - 998 .loc 1 713 0 - ARM GAS /tmp/ccvbgJts.s page 40 - - - 999 0128 DA7F ldrb r2, [r3, #31] - 1000 012a E273 strb r2, [r4, #15] - 714:Drivers/BME680/bme680.c **** - 1001 .loc 1 714 0 - 1002 012c 9A57 ldrsb r2, [r3, r6] - 1003 012e 2274 strb r2, [r4, #16] - 717:Drivers/BME680/bme680.c **** dev->calib.par_gh2 = (int16_t) (BME680_CONCAT_BYTES(coeff_array[BME680_GH2_MSB_REG], - 1004 .loc 1 717 0 - 1005 0130 2522 movs r2, #37 - 1006 0132 9A56 ldrsb r2, [r3, r2] - 1007 0134 6274 strb r2, [r4, #17] - 718:Drivers/BME680/bme680.c **** coeff_array[BME680_GH2_LSB_REG])); - 1008 .loc 1 718 0 - 1009 0136 2422 movs r2, #36 - 1010 0138 995C ldrb r1, [r3, r2] - 1011 013a 0902 lsls r1, r1, #8 - 1012 013c 013A subs r2, r2, #1 - 1013 013e 9A5C ldrb r2, [r3, r2] - 1014 0140 0A43 orrs r2, r1 - 1015 0142 6282 strh r2, [r4, #18] - 720:Drivers/BME680/bme680.c **** - 1016 .loc 1 720 0 - 1017 0144 5B57 ldrsb r3, [r3, r5] - 1018 0146 2375 strb r3, [r4, #20] - 723:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_ADDR_RES_HEAT_RANGE_ADDR, &temp_var, 1, dev); - 1019 .loc 1 723 0 - 1020 0148 0028 cmp r0, #0 - 1021 014a 0FD0 beq .L74 - 1022 .LVL114: - 1023 .L62: - 735:Drivers/BME680/bme680.c **** } - 1024 .loc 1 735 0 - 1025 014c 6B46 mov r3, sp - 1026 014e 0333 adds r3, r3, #3 - 1027 0150 1B78 ldrb r3, [r3] - 1028 0152 5BB2 sxtb r3, r3 - 1029 0154 1B11 asrs r3, r3, #4 - 1030 0156 3622 movs r2, #54 - 1031 0158 A354 strb r3, [r4, r2] - 1032 015a 66E7 b .L59 - 1033 .L73: - 677:Drivers/BME680/bme680.c **** , BME680_COEFF_ADDR2_LEN, dev); - 1034 .loc 1 677 0 - 1035 015c 2300 movs r3, r4 - 1036 015e 1022 movs r2, #16 - 1037 0160 1D21 movs r1, #29 - 1038 0162 6944 add r1, r1, sp - 1039 0164 E130 adds r0, r0, #225 - 1040 .LVL115: - 1041 0166 FFF7FEFF bl bme680_get_regs - 1042 .LVL116: - 1043 016a 8BE7 b .L61 - 1044 .L74: - 724:Drivers/BME680/bme680.c **** - 1045 .loc 1 724 0 - 1046 016c 6B46 mov r3, sp - 1047 016e DD1C adds r5, r3, #3 - ARM GAS /tmp/ccvbgJts.s page 41 - - - 1048 0170 2300 movs r3, r4 - 1049 0172 0122 movs r2, #1 - 1050 0174 2900 movs r1, r5 - 1051 0176 0230 adds r0, r0, #2 - 1052 .LVL117: - 1053 0178 FFF7FEFF bl bme680_get_regs - 1054 .LVL118: - 726:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 1055 .loc 1 726 0 - 1056 017c 2A78 ldrb r2, [r5] - 1057 017e 3023 movs r3, #48 - 1058 0180 1340 ands r3, r2 - 1059 0182 1B11 asrs r3, r3, #4 - 1060 0184 3422 movs r2, #52 - 1061 0186 A354 strb r3, [r4, r2] - 727:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_ADDR_RES_HEAT_VAL_ADDR, &temp_var, 1, dev); - 1062 .loc 1 727 0 - 1063 0188 0028 cmp r0, #0 - 1064 018a DFD1 bne .L62 - 728:Drivers/BME680/bme680.c **** - 1065 .loc 1 728 0 - 1066 018c 6B46 mov r3, sp - 1067 018e DD1C adds r5, r3, #3 - 1068 0190 2300 movs r3, r4 - 1069 0192 333A subs r2, r2, #51 - 1070 0194 2900 movs r1, r5 - 1071 0196 FFF7FEFF bl bme680_get_regs - 1072 .LVL119: - 730:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 1073 .loc 1 730 0 - 1074 019a 0022 movs r2, #0 - 1075 019c AA56 ldrsb r2, [r5, r2] - 1076 019e 3523 movs r3, #53 - 1077 01a0 E254 strb r2, [r4, r3] - 731:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(BME680_ADDR_RANGE_SW_ERR_ADDR, &temp_var, 1, dev); - 1078 .loc 1 731 0 - 1079 01a2 0028 cmp r0, #0 - 1080 01a4 D2D1 bne .L62 - 732:Drivers/BME680/bme680.c **** } - 1081 .loc 1 732 0 - 1082 01a6 2300 movs r3, r4 - 1083 01a8 0122 movs r2, #1 - 1084 01aa 6946 mov r1, sp - 1085 01ac 0331 adds r1, r1, #3 - 1086 01ae 0430 adds r0, r0, #4 - 1087 .LVL120: - 1088 01b0 FFF7FEFF bl bme680_get_regs - 1089 .LVL121: - 1090 01b4 CAE7 b .L62 - 1091 .LVL122: - 1092 .L68: - 1093 .LBB91: - 1094 .LBB90: -1131:Drivers/BME680/bme680.c **** } else { - 1095 .loc 1 1131 0 - 1096 01b6 0120 movs r0, #1 - 1097 01b8 4042 rsbs r0, r0, #0 - ARM GAS /tmp/ccvbgJts.s page 42 - - - 1098 01ba 36E7 b .L59 - 1099 .L69: - 1100 01bc 0120 movs r0, #1 - 1101 01be 4042 rsbs r0, r0, #0 - 1102 01c0 33E7 b .L59 - 1103 .L70: - 1104 01c2 0120 movs r0, #1 - 1105 01c4 4042 rsbs r0, r0, #0 - 1106 01c6 30E7 b .L59 - 1107 .L71: - 1108 01c8 0120 movs r0, #1 - 1109 01ca 4042 rsbs r0, r0, #0 - 1110 .LVL123: - 1111 01cc 2DE7 b .L59 - 1112 .LVL124: - 1113 .L63: - 1114 .LBE90: - 1115 .LBE91: - 1116 .LBE87: - 1117 .LBE86: - 1118 .LBB92: - 1119 .LBB85: - 1120 01ce 0120 movs r0, #1 - 1121 .LVL125: - 1122 01d0 4042 rsbs r0, r0, #0 - 1123 01d2 2AE7 b .L59 - 1124 .LVL126: - 1125 .L64: - 1126 01d4 0120 movs r0, #1 - 1127 .LVL127: - 1128 01d6 4042 rsbs r0, r0, #0 - 1129 01d8 27E7 b .L59 - 1130 .LVL128: - 1131 .L65: - 1132 01da 0120 movs r0, #1 - 1133 .LVL129: - 1134 01dc 4042 rsbs r0, r0, #0 - 1135 01de 24E7 b .L59 - 1136 .LVL130: - 1137 .L66: - 1138 01e0 0120 movs r0, #1 - 1139 .LVL131: - 1140 01e2 4042 rsbs r0, r0, #0 - 1141 01e4 21E7 b .L59 - 1142 .LVL132: - 1143 .L67: - 1144 .LBE85: - 1145 .LBE92: - 252:Drivers/BME680/bme680.c **** } - 1146 .loc 1 252 0 - 1147 01e6 0320 movs r0, #3 - 1148 .LVL133: - 1149 01e8 4042 rsbs r0, r0, #0 - 1150 01ea 1EE7 b .L59 - 1151 .cfi_endproc - 1152 .LFE0: - 1154 .section .text.bme680_get_sensor_settings,"ax",%progbits - ARM GAS /tmp/ccvbgJts.s page 43 - - - 1155 .align 1 - 1156 .global bme680_get_sensor_settings - 1157 .syntax unified - 1158 .code 16 - 1159 .thumb_func - 1160 .fpu softvfp - 1162 bme680_get_sensor_settings: - 1163 .LFB5: - 487:Drivers/BME680/bme680.c **** int8_t rslt; - 1164 .loc 1 487 0 - 1165 .cfi_startproc - 1166 @ args = 0, pretend = 0, frame = 24 - 1167 @ frame_needed = 0, uses_anonymous_args = 0 - 1168 .LVL134: - 1169 0000 70B5 push {r4, r5, r6, lr} - 1170 .LCFI13: - 1171 .cfi_def_cfa_offset 16 - 1172 .cfi_offset 4, -16 - 1173 .cfi_offset 5, -12 - 1174 .cfi_offset 6, -8 - 1175 .cfi_offset 14, -4 - 1176 0002 86B0 sub sp, sp, #24 - 1177 .LCFI14: - 1178 .cfi_def_cfa_offset 40 - 1179 0004 0600 movs r6, r0 - 1180 0006 0C00 movs r4, r1 - 1181 .LVL135: - 491:Drivers/BME680/bme680.c **** - 1182 .loc 1 491 0 - 1183 0008 0622 movs r2, #6 - 1184 000a 0021 movs r1, #0 - 1185 .LVL136: - 1186 000c 04A8 add r0, sp, #16 - 1187 .LVL137: - 1188 000e FFF7FEFF bl memset - 1189 .LVL138: - 1190 .LBB99: - 1191 .LBB100: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 1192 .loc 1 1129 0 - 1193 0012 002C cmp r4, #0 - 1194 0014 00D1 bne .LCB1301 - 1195 0016 98E0 b .L89 @long jump - 1196 .LCB1301: - 1197 0018 A36C ldr r3, [r4, #72] - 1198 001a 002B cmp r3, #0 - 1199 001c 00D1 bne .LCB1305 - 1200 001e 97E0 b .L90 @long jump - 1201 .LCB1305: - 1202 0020 E36C ldr r3, [r4, #76] - 1203 0022 002B cmp r3, #0 - 1204 0024 00D1 bne .LCB1309 - 1205 0026 96E0 b .L91 @long jump - 1206 .LCB1309: - 1207 0028 236D ldr r3, [r4, #80] - 1208 002a 002B cmp r3, #0 - 1209 002c 00D1 bne .LCB1313 - ARM GAS /tmp/ccvbgJts.s page 44 - - - 1210 002e 95E0 b .L92 @long jump - 1211 .LCB1313: - 1212 .LVL139: - 1213 .LBE100: - 1214 .LBE99: - 496:Drivers/BME680/bme680.c **** - 1215 .loc 1 496 0 - 1216 0030 2300 movs r3, r4 - 1217 0032 0622 movs r2, #6 - 1218 0034 04A9 add r1, sp, #16 - 1219 0036 7020 movs r0, #112 - 1220 0038 FFF7FEFF bl bme680_get_regs - 1221 .LVL140: - 1222 003c 051E subs r5, r0, #0 - 1223 .LVL141: - 498:Drivers/BME680/bme680.c **** if (desired_settings & BME680_GAS_MEAS_SEL) - 1224 .loc 1 498 0 - 1225 003e 34D1 bne .L76 - 499:Drivers/BME680/bme680.c **** rslt = get_gas_config(dev); - 1226 .loc 1 499 0 - 1227 0040 3307 lsls r3, r6, #28 - 1228 0042 35D4 bmi .L99 - 1229 .LVL142: - 1230 .L77: - 503:Drivers/BME680/bme680.c **** dev->tph_sett.filter = BME680_GET_BITS(data_array[BME680_REG_FILTER_INDEX], - 1231 .loc 1 503 0 - 1232 0044 F306 lsls r3, r6, #27 - 1233 0046 06D5 bpl .L85 - 504:Drivers/BME680/bme680.c **** BME680_FILTER); - 1234 .loc 1 504 0 - 1235 0048 04AB add r3, sp, #16 - 1236 004a 5A79 ldrb r2, [r3, #5] - 1237 004c 9210 asrs r2, r2, #2 - 1238 004e 0723 movs r3, #7 - 1239 0050 1340 ands r3, r2 - 1240 0052 3B22 movs r2, #59 - 1241 0054 A354 strb r3, [r4, r2] - 1242 .L85: - 507:Drivers/BME680/bme680.c **** dev->tph_sett.os_temp = BME680_GET_BITS(data_array[BME680_REG_TEMP_INDEX], BME680_OST); - 1243 .loc 1 507 0 - 1244 0056 B307 lsls r3, r6, #30 - 1245 0058 09D0 beq .L86 - 508:Drivers/BME680/bme680.c **** dev->tph_sett.os_pres = BME680_GET_BITS(data_array[BME680_REG_PRES_INDEX], BME680_OSP); - 1246 .loc 1 508 0 - 1247 005a 04AB add r3, sp, #16 - 1248 005c 1B79 ldrb r3, [r3, #4] - 1249 005e 5909 lsrs r1, r3, #5 - 1250 0060 3922 movs r2, #57 - 1251 0062 A154 strb r1, [r4, r2] - 509:Drivers/BME680/bme680.c **** } - 1252 .loc 1 509 0 - 1253 0064 9B10 asrs r3, r3, #2 - 1254 0066 323A subs r2, r2, #50 - 1255 0068 1340 ands r3, r2 - 1256 006a 3332 adds r2, r2, #51 - 1257 006c A354 strb r3, [r4, r2] - 1258 .L86: - ARM GAS /tmp/ccvbgJts.s page 45 - - - 512:Drivers/BME680/bme680.c **** dev->tph_sett.os_hum = BME680_GET_BITS_POS_0(data_array[BME680_REG_HUM_INDEX], - 1259 .loc 1 512 0 - 1260 006e 7307 lsls r3, r6, #29 - 1261 0070 05D5 bpl .L87 - 513:Drivers/BME680/bme680.c **** BME680_OSH); - 1262 .loc 1 513 0 - 1263 0072 04AB add r3, sp, #16 - 1264 0074 9A78 ldrb r2, [r3, #2] - 1265 0076 0723 movs r3, #7 - 1266 0078 1340 ands r3, r2 - 1267 007a 3822 movs r2, #56 - 1268 007c A354 strb r3, [r4, r2] - 1269 .L87: - 517:Drivers/BME680/bme680.c **** dev->gas_sett.heatr_ctrl = BME680_GET_BITS_POS_0(data_array[BME680_REG_HCTRL_INDEX], - 1270 .loc 1 517 0 - 1271 007e B306 lsls r3, r6, #26 - 1272 0080 05D5 bpl .L88 - 518:Drivers/BME680/bme680.c **** BME680_HCTRL); - 1273 .loc 1 518 0 - 1274 0082 04AB add r3, sp, #16 - 1275 0084 1A78 ldrb r2, [r3] - 1276 0086 0823 movs r3, #8 - 1277 0088 1340 ands r3, r2 - 1278 008a 3D22 movs r2, #61 - 1279 008c A354 strb r3, [r4, r2] - 1280 .L88: - 521:Drivers/BME680/bme680.c **** dev->gas_sett.nb_conv = BME680_GET_BITS_POS_0(data_array[BME680_REG_NBCONV_INDEX], - 1281 .loc 1 521 0 - 1282 008e C023 movs r3, #192 - 1283 0090 3342 tst r3, r6 - 1284 0092 0AD0 beq .L76 - 522:Drivers/BME680/bme680.c **** BME680_NBCONV); - 1285 .loc 1 522 0 - 1286 0094 04AB add r3, sp, #16 - 1287 0096 5B78 ldrb r3, [r3, #1] - 1288 0098 0F22 movs r2, #15 - 1289 009a 1A40 ands r2, r3 - 1290 009c 3C21 movs r1, #60 - 1291 009e 6254 strb r2, [r4, r1] - 524:Drivers/BME680/bme680.c **** BME680_RUN_GAS); - 1292 .loc 1 524 0 - 1293 00a0 1B11 asrs r3, r3, #4 - 1294 00a2 0122 movs r2, #1 - 1295 00a4 1340 ands r3, r2 - 1296 00a6 3D32 adds r2, r2, #61 - 1297 00a8 A354 strb r3, [r4, r2] - 1298 .LVL143: - 1299 .L76: - 533:Drivers/BME680/bme680.c **** - 1300 .loc 1 533 0 - 1301 00aa 2800 movs r0, r5 - 1302 00ac 06B0 add sp, sp, #24 - 1303 @ sp needed - 1304 .LVL144: - 1305 .LVL145: - 1306 00ae 70BD pop {r4, r5, r6, pc} - 1307 .LVL146: - ARM GAS /tmp/ccvbgJts.s page 46 - - - 1308 .L99: - 1309 .LBB101: - 1310 .LBB102: - 780:Drivers/BME680/bme680.c **** uint8_t index; - 1311 .loc 1 780 0 - 1312 00b0 0A22 movs r2, #10 - 1313 00b2 0021 movs r1, #0 - 1314 00b4 01A8 add r0, sp, #4 - 1315 .LVL147: - 1316 00b6 FFF7FEFF bl memset - 1317 .LVL148: - 1318 .LBB103: - 1319 .LBB104: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 1320 .loc 1 1129 0 - 1321 00ba 002C cmp r4, #0 - 1322 00bc 39D0 beq .L93 - 1323 00be A36C ldr r3, [r4, #72] - 1324 00c0 002B cmp r3, #0 - 1325 00c2 39D0 beq .L94 - 1326 00c4 E36C ldr r3, [r4, #76] - 1327 00c6 002B cmp r3, #0 - 1328 00c8 39D0 beq .L95 - 1329 00ca 236D ldr r3, [r4, #80] - 1330 00cc 002B cmp r3, #0 - 1331 00ce 39D0 beq .L96 - 1332 .LVL149: - 1333 .LBE104: - 1334 .LBE103: - 786:Drivers/BME680/bme680.c **** /* Memory page switch the SPI address*/ - 1335 .loc 1 786 0 - 1336 00d0 A378 ldrb r3, [r4, #2] - 1337 00d2 002B cmp r3, #0 - 1338 00d4 13D0 beq .L100 - 1339 .LVL150: - 1340 .L79: - 791:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(reg_addr1, data_array, BME680_GAS_HEATER_PROF_LEN_MAX, dev); - 1341 .loc 1 791 0 - 1342 00d6 002D cmp r5, #0 - 1343 00d8 B4D1 bne .L77 - 792:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 1344 .loc 1 792 0 - 1345 00da 2300 movs r3, r4 - 1346 00dc 0A22 movs r2, #10 - 1347 00de 01A9 add r1, sp, #4 - 1348 00e0 5A20 movs r0, #90 - 1349 00e2 FFF7FEFF bl bme680_get_regs - 1350 .LVL151: - 793:Drivers/BME680/bme680.c **** for (index = 0; index < BME680_GAS_HEATER_PROF_LEN_MAX; index++) - 1351 .loc 1 793 0 - 1352 00e6 0028 cmp r0, #0 - 1353 00e8 18D0 beq .L97 - 1354 .L81: - 798:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 1355 .loc 1 798 0 - 1356 00ea 2300 movs r3, r4 - 1357 00ec 0A22 movs r2, #10 - ARM GAS /tmp/ccvbgJts.s page 47 - - - 1358 00ee 01A9 add r1, sp, #4 - 1359 00f0 6420 movs r0, #100 - 1360 .LVL152: - 1361 00f2 FFF7FEFF bl bme680_get_regs - 1362 .LVL153: - 1363 00f6 051E subs r5, r0, #0 - 1364 .LVL154: - 799:Drivers/BME680/bme680.c **** for (index = 0; index < BME680_GAS_HEATER_PROF_LEN_MAX; index++) - 1365 .loc 1 799 0 - 1366 00f8 A4D1 bne .L77 - 800:Drivers/BME680/bme680.c **** dev->gas_sett.heatr_dur = data_array[index]; - 1367 .loc 1 800 0 - 1368 00fa 0023 movs r3, #0 - 1369 00fc 16E0 b .L83 - 1370 .LVL155: - 1371 .L100: - 788:Drivers/BME680/bme680.c **** } - 1372 .loc 1 788 0 - 1373 00fe 2100 movs r1, r4 - 1374 0100 5A20 movs r0, #90 - 1375 0102 FFF7FEFF bl set_mem_page - 1376 .LVL156: - 1377 0106 0500 movs r5, r0 - 1378 .LVL157: - 1379 0108 E5E7 b .L79 - 1380 .LVL158: - 1381 .L82: - 795:Drivers/BME680/bme680.c **** } - 1382 .loc 1 795 0 - 1383 010a 01AA add r2, sp, #4 - 1384 010c D15C ldrb r1, [r2, r3] - 1385 010e 4022 movs r2, #64 - 1386 0110 A152 strh r1, [r4, r2] - 794:Drivers/BME680/bme680.c **** dev->gas_sett.heatr_temp = data_array[index]; - 1387 .loc 1 794 0 - 1388 0112 0133 adds r3, r3, #1 - 1389 .LVL159: - 1390 0114 DBB2 uxtb r3, r3 - 1391 .LVL160: - 1392 .L80: - 1393 0116 092B cmp r3, #9 - 1394 0118 F7D9 bls .L82 - 1395 011a E6E7 b .L81 - 1396 .LVL161: - 1397 .L97: - 1398 011c 0023 movs r3, #0 - 1399 011e FAE7 b .L80 - 1400 .LVL162: - 1401 .L84: - 801:Drivers/BME680/bme680.c **** } - 1402 .loc 1 801 0 - 1403 0120 01AA add r2, sp, #4 - 1404 0122 D15C ldrb r1, [r2, r3] - 1405 0124 4222 movs r2, #66 - 1406 0126 A152 strh r1, [r4, r2] - 800:Drivers/BME680/bme680.c **** dev->gas_sett.heatr_dur = data_array[index]; - 1407 .loc 1 800 0 - ARM GAS /tmp/ccvbgJts.s page 48 - - - 1408 0128 0133 adds r3, r3, #1 - 1409 .LVL163: - 1410 012a DBB2 uxtb r3, r3 - 1411 .LVL164: - 1412 .L83: - 1413 012c 092B cmp r3, #9 - 1414 012e F7D9 bls .L84 - 1415 0130 88E7 b .L77 - 1416 .LVL165: - 1417 .L93: - 1418 .LBB106: - 1419 .LBB105: -1131:Drivers/BME680/bme680.c **** } else { - 1420 .loc 1 1131 0 - 1421 0132 0125 movs r5, #1 - 1422 .LVL166: - 1423 0134 6D42 rsbs r5, r5, #0 - 1424 0136 85E7 b .L77 - 1425 .LVL167: - 1426 .L94: - 1427 0138 0125 movs r5, #1 - 1428 .LVL168: - 1429 013a 6D42 rsbs r5, r5, #0 - 1430 013c 82E7 b .L77 - 1431 .LVL169: - 1432 .L95: - 1433 013e 0125 movs r5, #1 - 1434 .LVL170: - 1435 0140 6D42 rsbs r5, r5, #0 - 1436 0142 7FE7 b .L77 - 1437 .LVL171: - 1438 .L96: - 1439 0144 0125 movs r5, #1 - 1440 .LVL172: - 1441 0146 6D42 rsbs r5, r5, #0 - 1442 .LVL173: - 1443 0148 7CE7 b .L77 - 1444 .LVL174: - 1445 .L89: - 1446 .LBE105: - 1447 .LBE106: - 1448 .LBE102: - 1449 .LBE101: - 529:Drivers/BME680/bme680.c **** } - 1450 .loc 1 529 0 - 1451 014a 0125 movs r5, #1 - 1452 014c 6D42 rsbs r5, r5, #0 - 1453 014e ACE7 b .L76 - 1454 .L90: - 1455 0150 0125 movs r5, #1 - 1456 0152 6D42 rsbs r5, r5, #0 - 1457 0154 A9E7 b .L76 - 1458 .L91: - 1459 0156 0125 movs r5, #1 - 1460 0158 6D42 rsbs r5, r5, #0 - 1461 015a A6E7 b .L76 - 1462 .L92: - ARM GAS /tmp/ccvbgJts.s page 49 - - - 1463 015c 0125 movs r5, #1 - 1464 015e 6D42 rsbs r5, r5, #0 - 1465 0160 A3E7 b .L76 - 1466 .cfi_endproc - 1467 .LFE5: - 1469 .section .text.bme680_set_sensor_mode,"ax",%progbits - 1470 .align 1 - 1471 .global bme680_set_sensor_mode - 1472 .syntax unified - 1473 .code 16 - 1474 .thumb_func - 1475 .fpu softvfp - 1477 bme680_set_sensor_mode: - 1478 .LFB6: - 539:Drivers/BME680/bme680.c **** int8_t rslt; - 1479 .loc 1 539 0 - 1480 .cfi_startproc - 1481 @ args = 0, pretend = 0, frame = 8 - 1482 @ frame_needed = 0, uses_anonymous_args = 0 - 1483 .LVL175: - 1484 0000 70B5 push {r4, r5, r6, lr} - 1485 .LCFI15: - 1486 .cfi_def_cfa_offset 16 - 1487 .cfi_offset 4, -16 - 1488 .cfi_offset 5, -12 - 1489 .cfi_offset 6, -8 - 1490 .cfi_offset 14, -4 - 1491 0002 82B0 sub sp, sp, #8 - 1492 .LCFI16: - 1493 .cfi_def_cfa_offset 24 - 1494 0004 0600 movs r6, r0 - 1495 .LVL176: - 543:Drivers/BME680/bme680.c **** - 1496 .loc 1 543 0 - 1497 0006 6B46 mov r3, sp - 1498 0008 7422 movs r2, #116 - 1499 000a 9A71 strb r2, [r3, #6] - 1500 .LVL177: - 1501 .LBB107: - 1502 .LBB108: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 1503 .loc 1 1129 0 - 1504 000c 0028 cmp r0, #0 - 1505 000e 48D0 beq .L105 - 1506 0010 836C ldr r3, [r0, #72] - 1507 0012 002B cmp r3, #0 - 1508 0014 48D0 beq .L106 - 1509 0016 C36C ldr r3, [r0, #76] - 1510 0018 002B cmp r3, #0 - 1511 001a 48D0 beq .L107 - 1512 001c 036D ldr r3, [r0, #80] - 1513 001e 002B cmp r3, #0 - 1514 0020 48D0 beq .L108 - 1515 .LBE108: - 1516 .LBE107: - 542:Drivers/BME680/bme680.c **** uint8_t reg_addr = BME680_CONF_T_P_MODE_ADDR; - 1517 .loc 1 542 0 - ARM GAS /tmp/ccvbgJts.s page 50 - - - 1518 0022 0025 movs r5, #0 - 1519 0024 01E0 b .L104 - 1520 .LVL178: - 1521 .L103: - 561:Drivers/BME680/bme680.c **** - 1522 .loc 1 561 0 - 1523 0026 002D cmp r5, #0 - 1524 0028 1ED0 beq .L109 - 1525 .LVL179: - 1526 .L104: - 550:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) { - 1527 .loc 1 550 0 - 1528 002a 3300 movs r3, r6 - 1529 002c 0122 movs r2, #1 - 1530 002e 6946 mov r1, sp - 1531 0030 0731 adds r1, r1, #7 - 1532 0032 7420 movs r0, #116 - 1533 0034 FFF7FEFF bl bme680_get_regs - 1534 .LVL180: - 1535 0038 041E subs r4, r0, #0 - 1536 .LVL181: - 551:Drivers/BME680/bme680.c **** /* Put to sleep before changing mode */ - 1537 .loc 1 551 0 - 1538 003a F4D1 bne .L103 - 553:Drivers/BME680/bme680.c **** - 1539 .loc 1 553 0 - 1540 003c 6B46 mov r3, sp - 1541 003e 0733 adds r3, r3, #7 - 1542 0040 1B78 ldrb r3, [r3] - 1543 0042 0325 movs r5, #3 - 1544 .LVL182: - 1545 0044 1D40 ands r5, r3 - 1546 .LVL183: - 555:Drivers/BME680/bme680.c **** tmp_pow_mode = tmp_pow_mode & (~BME680_MODE_MSK); /* Set to sleep */ - 1547 .loc 1 555 0 - 1548 0046 EED0 beq .L103 - 556:Drivers/BME680/bme680.c **** rslt = bme680_set_regs(®_addr, &tmp_pow_mode, 1, dev); - 1549 .loc 1 556 0 - 1550 0048 0322 movs r2, #3 - 1551 004a 9343 bics r3, r2 - 1552 004c 6A46 mov r2, sp - 1553 004e D11D adds r1, r2, #7 - 1554 0050 0B70 strb r3, [r1] - 557:Drivers/BME680/bme680.c **** dev->delay_ms(BME680_POLL_PERIOD_MS); - 1555 .loc 1 557 0 - 1556 0052 3300 movs r3, r6 - 1557 0054 0122 movs r2, #1 - 1558 0056 6846 mov r0, sp - 1559 .LVL184: - 1560 0058 0630 adds r0, r0, #6 - 1561 005a FFF7FEFF bl bme680_set_regs - 1562 .LVL185: - 1563 005e 0400 movs r4, r0 - 1564 .LVL186: - 558:Drivers/BME680/bme680.c **** } - 1565 .loc 1 558 0 - 1566 0060 0A20 movs r0, #10 - ARM GAS /tmp/ccvbgJts.s page 51 - - - 1567 .LVL187: - 1568 0062 336D ldr r3, [r6, #80] - 1569 0064 9847 blx r3 - 1570 .LVL188: - 1571 0066 DEE7 b .L103 - 1572 .L109: - 564:Drivers/BME680/bme680.c **** tmp_pow_mode = (tmp_pow_mode & ~BME680_MODE_MSK) | (dev->power_mode & BME680_MODE_MSK); - 1573 .loc 1 564 0 - 1574 0068 4423 movs r3, #68 - 1575 006a F25C ldrb r2, [r6, r3] - 1576 006c 002A cmp r2, #0 - 1577 006e 0BD0 beq .L102 - 565:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 1578 .loc 1 565 0 - 1579 0070 6B46 mov r3, sp - 1580 0072 D91D adds r1, r3, #7 - 1581 0074 DB79 ldrb r3, [r3, #7] - 1582 0076 0320 movs r0, #3 - 1583 0078 8343 bics r3, r0 - 1584 007a 5BB2 sxtb r3, r3 - 1585 007c 52B2 sxtb r2, r2 - 1586 007e 0240 ands r2, r0 - 1587 0080 1343 orrs r3, r2 - 1588 0082 0B70 strb r3, [r1] - 566:Drivers/BME680/bme680.c **** rslt = bme680_set_regs(®_addr, &tmp_pow_mode, 1, dev); - 1589 .loc 1 566 0 - 1590 0084 002C cmp r4, #0 - 1591 0086 02D0 beq .L110 - 1592 .LVL189: - 1593 .L102: - 572:Drivers/BME680/bme680.c **** - 1594 .loc 1 572 0 - 1595 0088 2000 movs r0, r4 - 1596 008a 02B0 add sp, sp, #8 - 1597 @ sp needed - 1598 .LVL190: - 1599 .LVL191: - 1600 008c 70BD pop {r4, r5, r6, pc} - 1601 .LVL192: - 1602 .L110: - 567:Drivers/BME680/bme680.c **** } - 1603 .loc 1 567 0 - 1604 008e 3300 movs r3, r6 - 1605 0090 0122 movs r2, #1 - 1606 0092 6946 mov r1, sp - 1607 0094 0731 adds r1, r1, #7 - 1608 0096 6846 mov r0, sp - 1609 0098 0630 adds r0, r0, #6 - 1610 009a FFF7FEFF bl bme680_set_regs - 1611 .LVL193: - 1612 009e 0400 movs r4, r0 - 1613 .LVL194: - 1614 00a0 F2E7 b .L102 - 1615 .LVL195: - 1616 .L105: - 1617 .LBB110: - 1618 .LBB109: - ARM GAS /tmp/ccvbgJts.s page 52 - - -1131:Drivers/BME680/bme680.c **** } else { - 1619 .loc 1 1131 0 - 1620 00a2 0124 movs r4, #1 - 1621 00a4 6442 rsbs r4, r4, #0 - 1622 00a6 EFE7 b .L102 - 1623 .L106: - 1624 00a8 0124 movs r4, #1 - 1625 00aa 6442 rsbs r4, r4, #0 - 1626 00ac ECE7 b .L102 - 1627 .L107: - 1628 00ae 0124 movs r4, #1 - 1629 00b0 6442 rsbs r4, r4, #0 - 1630 00b2 E9E7 b .L102 - 1631 .L108: - 1632 00b4 0124 movs r4, #1 - 1633 00b6 6442 rsbs r4, r4, #0 - 1634 00b8 E6E7 b .L102 - 1635 .LBE109: - 1636 .LBE110: - 1637 .cfi_endproc - 1638 .LFE6: - 1640 .global __aeabi_idiv - 1641 .section .text.bme680_set_sensor_settings,"ax",%progbits - 1642 .align 1 - 1643 .global bme680_set_sensor_settings - 1644 .syntax unified - 1645 .code 16 - 1646 .thumb_func - 1647 .fpu softvfp - 1649 bme680_set_sensor_settings: - 1650 .LFB4: - 363:Drivers/BME680/bme680.c **** int8_t rslt; - 1651 .loc 1 363 0 - 1652 .cfi_startproc - 1653 @ args = 0, pretend = 0, frame = 24 - 1654 @ frame_needed = 0, uses_anonymous_args = 0 - 1655 .LVL196: - 1656 0000 F0B5 push {r4, r5, r6, r7, lr} - 1657 .LCFI17: - 1658 .cfi_def_cfa_offset 20 - 1659 .cfi_offset 4, -20 - 1660 .cfi_offset 5, -16 - 1661 .cfi_offset 6, -12 - 1662 .cfi_offset 7, -8 - 1663 .cfi_offset 14, -4 - 1664 0002 D646 mov lr, r10 - 1665 0004 4F46 mov r7, r9 - 1666 0006 4646 mov r6, r8 - 1667 0008 C0B5 push {r6, r7, lr} - 1668 .LCFI18: - 1669 .cfi_def_cfa_offset 32 - 1670 .cfi_offset 8, -32 - 1671 .cfi_offset 9, -28 - 1672 .cfi_offset 10, -24 - 1673 000a 86B0 sub sp, sp, #24 - 1674 .LCFI19: - 1675 .cfi_def_cfa_offset 56 - ARM GAS /tmp/ccvbgJts.s page 53 - - - 1676 000c 0600 movs r6, r0 - 1677 000e 0C00 movs r4, r1 - 366:Drivers/BME680/bme680.c **** uint8_t count = 0; - 1678 .loc 1 366 0 - 1679 0010 1723 movs r3, #23 - 1680 0012 6B44 add r3, r3, sp - 1681 0014 0022 movs r2, #0 - 1682 0016 1A70 strb r2, [r3] - 1683 .LVL197: - 368:Drivers/BME680/bme680.c **** uint8_t data_array[BME680_REG_BUFFER_LENGTH] = { 0 }; - 1684 .loc 1 368 0 - 1685 0018 0632 adds r2, r2, #6 - 1686 001a 0021 movs r1, #0 - 1687 .LVL198: - 1688 001c 04A8 add r0, sp, #16 - 1689 .LVL199: - 1690 001e FFF7FEFF bl memset - 1691 .LVL200: - 369:Drivers/BME680/bme680.c **** uint8_t intended_power_mode = dev->power_mode; /* Save intended power mode */ - 1692 .loc 1 369 0 - 1693 0022 0622 movs r2, #6 - 1694 0024 0021 movs r1, #0 - 1695 0026 02A8 add r0, sp, #8 - 1696 0028 FFF7FEFF bl memset - 1697 .LVL201: - 370:Drivers/BME680/bme680.c **** - 1698 .loc 1 370 0 - 1699 002c 4423 movs r3, #68 - 1700 002e E35C ldrb r3, [r4, r3] - 1701 0030 9A46 mov r10, r3 - 1702 .LVL202: - 1703 .LBB134: - 1704 .LBB135: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 1705 .loc 1 1129 0 - 1706 0032 002C cmp r4, #0 - 1707 0034 00D1 bne .LCB1900 - 1708 0036 F6E1 b .L142 @long jump - 1709 .LCB1900: - 1710 0038 A36C ldr r3, [r4, #72] - 1711 003a 002B cmp r3, #0 - 1712 003c 00D1 bne .LCB1904 - 1713 003e F5E1 b .L143 @long jump - 1714 .LCB1904: - 1715 0040 E36C ldr r3, [r4, #76] - 1716 0042 002B cmp r3, #0 - 1717 0044 00D1 bne .LCB1908 - 1718 0046 F4E1 b .L144 @long jump - 1719 .LCB1908: - 1720 0048 236D ldr r3, [r4, #80] - 1721 004a 002B cmp r3, #0 - 1722 004c 00D1 bne .LCB1912 - 1723 004e F3E1 b .L145 @long jump - 1724 .LCB1912: - 1725 .LVL203: - 1726 .LBE135: - 1727 .LBE134: - ARM GAS /tmp/ccvbgJts.s page 54 - - - 375:Drivers/BME680/bme680.c **** rslt = set_gas_config(dev); - 1728 .loc 1 375 0 - 1729 0050 3307 lsls r3, r6, #28 - 1730 0052 35D4 bmi .L162 - 1731 .LBB138: - 1732 .LBB136: - 1733 .loc 1 1134 0 - 1734 0054 0020 movs r0, #0 - 1735 .L113: - 1736 .LVL204: - 1737 .LBE136: - 1738 .LBE138: - 378:Drivers/BME680/bme680.c **** if (rslt == BME680_OK) - 1739 .loc 1 378 0 - 1740 0056 4423 movs r3, #68 - 1741 0058 0022 movs r2, #0 - 1742 005a E254 strb r2, [r4, r3] - 379:Drivers/BME680/bme680.c **** rslt = bme680_set_sensor_mode(dev); - 1743 .loc 1 379 0 - 1744 005c 0028 cmp r0, #0 - 1745 005e 00D1 bne .LCB1933 - 1746 0060 C9E0 b .L163 @long jump - 1747 .LCB1933: - 1748 .LVL205: - 1749 .L120: - 383:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->tph_sett.filter, BME680_FILTER_SIZE_0, BME680_FILTER_SIZE_127, dev); - 1750 .loc 1 383 0 - 1751 0062 F306 lsls r3, r6, #27 - 1752 0064 00D4 bmi .LCB1941 - 1753 0066 CDE0 b .L155 @long jump - 1754 .LCB1941: - 1755 .LVL206: - 1756 .LBB139: - 1757 .LBB140: -1101:Drivers/BME680/bme680.c **** /* Check if value is below minimum value */ - 1758 .loc 1 1101 0 - 1759 0068 2300 movs r3, r4 - 1760 006a 3B33 adds r3, r3, #59 - 1761 006c 00D1 bne .LCB1952 - 1762 006e C6E0 b .L156 @long jump - 1763 .LCB1952: -1103:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to minimum value */ - 1764 .loc 1 1103 0 - 1765 0070 3B23 movs r3, #59 - 1766 0072 E35C ldrb r3, [r4, r3] -1109:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to maximum value */ - 1767 .loc 1 1109 0 - 1768 0074 072B cmp r3, #7 - 1769 0076 07D9 bls .L123 -1111:Drivers/BME680/bme680.c **** dev->info_msg |= BME680_I_MAX_CORRECTION; - 1770 .loc 1 1111 0 - 1771 0078 3B23 movs r3, #59 - 1772 007a 0722 movs r2, #7 - 1773 007c E254 strb r2, [r4, r3] -1112:Drivers/BME680/bme680.c **** } - 1774 .loc 1 1112 0 - 1775 007e 3F32 adds r2, r2, #63 - ARM GAS /tmp/ccvbgJts.s page 55 - - - 1776 0080 A35C ldrb r3, [r4, r2] - 1777 0082 0221 movs r1, #2 - 1778 0084 0B43 orrs r3, r1 - 1779 0086 A354 strb r3, [r4, r2] - 1780 .LVL207: - 1781 .L123: - 1782 .LBE140: - 1783 .LBE139: - 388:Drivers/BME680/bme680.c **** - 1784 .loc 1 388 0 - 1785 0088 2300 movs r3, r4 - 1786 008a 0122 movs r2, #1 - 1787 008c 1721 movs r1, #23 - 1788 008e 6944 add r1, r1, sp - 1789 0090 7520 movs r0, #117 - 1790 0092 FFF7FEFF bl bme680_get_regs - 1791 .LVL208: - 1792 .L122: - 391:Drivers/BME680/bme680.c **** - 1793 .loc 1 391 0 - 1794 0096 1722 movs r2, #23 - 1795 0098 6A44 add r2, r2, sp - 1796 009a 1378 ldrb r3, [r2] - 1797 009c 1C21 movs r1, #28 - 1798 009e 8B43 bics r3, r1 - 1799 00a0 5BB2 sxtb r3, r3 - 1800 00a2 1F31 adds r1, r1, #31 - 1801 00a4 655C ldrb r5, [r4, r1] - 1802 00a6 AD00 lsls r5, r5, #2 - 1803 00a8 1F39 subs r1, r1, #31 - 1804 00aa 2940 ands r1, r5 - 1805 00ac 0B43 orrs r3, r1 - 1806 00ae DBB2 uxtb r3, r3 - 1807 00b0 1370 strb r3, [r2] - 393:Drivers/BME680/bme680.c **** data_array[count] = data; - 1808 .loc 1 393 0 - 1809 00b2 04AA add r2, sp, #16 - 1810 00b4 7521 movs r1, #117 - 1811 00b6 1170 strb r1, [r2] - 394:Drivers/BME680/bme680.c **** count++; - 1812 .loc 1 394 0 - 1813 00b8 02AA add r2, sp, #8 - 1814 00ba 1370 strb r3, [r2] - 1815 .LVL209: - 395:Drivers/BME680/bme680.c **** } - 1816 .loc 1 395 0 - 1817 00bc 0125 movs r5, #1 - 1818 00be A2E0 b .L121 - 1819 .LVL210: - 1820 .L162: - 1821 .LBB142: - 1822 .LBB143: - 1823 .LBB144: - 1824 .LBB145: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 1825 .loc 1 1129 0 - 1826 00c0 002C cmp r4, #0 - ARM GAS /tmp/ccvbgJts.s page 56 - - - 1827 00c2 00D1 bne .LCB2028 - 1828 00c4 8BE0 b .L147 @long jump - 1829 .LCB2028: - 1830 00c6 A36C ldr r3, [r4, #72] - 1831 00c8 002B cmp r3, #0 - 1832 00ca 00D1 bne .LCB2032 - 1833 00cc 8AE0 b .L148 @long jump - 1834 .LCB2032: - 1835 00ce E36C ldr r3, [r4, #76] - 1836 00d0 002B cmp r3, #0 - 1837 00d2 00D1 bne .LCB2036 - 1838 00d4 89E0 b .L149 @long jump - 1839 .LCB2036: - 1840 00d6 236D ldr r3, [r4, #80] - 1841 00d8 002B cmp r3, #0 - 1842 00da 00D1 bne .LCB2040 - 1843 00dc 88E0 b .L150 @long jump - 1844 .LCB2040: - 1845 .LVL211: - 1846 .LBE145: - 1847 .LBE144: - 1848 .LBB147: - 752:Drivers/BME680/bme680.c **** uint8_t reg_data[2] = {0}; - 1849 .loc 1 752 0 - 1850 00de 0023 movs r3, #0 - 1851 00e0 6A46 mov r2, sp - 1852 00e2 1380 strh r3, [r2] - 753:Drivers/BME680/bme680.c **** - 1853 .loc 1 753 0 - 1854 00e4 01AA add r2, sp, #4 - 1855 00e6 1380 strh r3, [r2] - 755:Drivers/BME680/bme680.c **** reg_addr[0] = BME680_RES_HEAT0_ADDR; - 1856 .loc 1 755 0 - 1857 00e8 4433 adds r3, r3, #68 - 1858 00ea E35C ldrb r3, [r4, r3] - 1859 00ec 012B cmp r3, #1 - 1860 00ee 01D0 beq .L164 - 762:Drivers/BME680/bme680.c **** } - 1861 .loc 1 762 0 - 1862 00f0 0120 movs r0, #1 - 1863 .LVL212: - 1864 00f2 B0E7 b .L113 - 1865 .LVL213: - 1866 .L164: - 756:Drivers/BME680/bme680.c **** reg_data[0] = calc_heater_res(dev->gas_sett.heatr_temp, dev); - 1867 .loc 1 756 0 - 1868 00f4 5933 adds r3, r3, #89 - 1869 00f6 6A46 mov r2, sp - 1870 00f8 1370 strb r3, [r2] - 757:Drivers/BME680/bme680.c **** reg_addr[1] = BME680_GAS_WAIT0_ADDR; - 1871 .loc 1 757 0 - 1872 00fa 1A3B subs r3, r3, #26 - 1873 00fc E55A ldrh r5, [r4, r3] - 1874 .LVL214: - 1875 .LBB148: - 1876 .LBB149: - 940:Drivers/BME680/bme680.c **** temp = 200; - ARM GAS /tmp/ccvbgJts.s page 57 - - - 1877 .loc 1 940 0 - 1878 00fe C72D cmp r5, #199 - 1879 0100 06D9 bls .L152 - 942:Drivers/BME680/bme680.c **** temp = 400; - 1880 .loc 1 942 0 - 1881 0102 5133 adds r3, r3, #81 - 1882 0104 FF33 adds r3, r3, #255 - 1883 0106 9D42 cmp r5, r3 - 1884 0108 03D9 bls .L116 - 943:Drivers/BME680/bme680.c **** - 1885 .loc 1 943 0 - 1886 010a C825 movs r5, #200 - 1887 .LVL215: - 1888 010c 6D00 lsls r5, r5, #1 - 1889 010e 00E0 b .L116 - 1890 .LVL216: - 1891 .L152: - 941:Drivers/BME680/bme680.c **** else if (temp > 400) - 1892 .loc 1 941 0 - 1893 0110 C825 movs r5, #200 - 1894 .LVL217: - 1895 .L116: - 945:Drivers/BME680/bme680.c **** var2 = (dev->calib.par_gh1 + 784) * (((((dev->calib.par_gh2 + 154009) * temp * 5) / 100) + 3276800 - 1896 .loc 1 945 0 - 1897 0112 0423 movs r3, #4 - 1898 0114 E356 ldrsb r3, [r4, r3] - 1899 0116 1420 movs r0, #20 - 1900 0118 2056 ldrsb r0, [r4, r0] - 1901 011a 5843 muls r0, r3 - 1902 011c FA21 movs r1, #250 - 1903 011e 8900 lsls r1, r1, #2 - 1904 0120 FFF7FEFF bl __aeabi_idiv - 1905 .LVL218: - 1906 0124 0302 lsls r3, r0, #8 - 1907 0126 9946 mov r9, r3 - 1908 .LVL219: - 946:Drivers/BME680/bme680.c **** var3 = var1 + (var2 / 2); - 1909 .loc 1 946 0 - 1910 0128 1123 movs r3, #17 - 1911 .LVL220: - 1912 012a E356 ldrsb r3, [r4, r3] - 1913 012c C422 movs r2, #196 - 1914 012e 9200 lsls r2, r2, #2 - 1915 0130 9046 mov r8, r2 - 1916 0132 9844 add r8, r8, r3 - 1917 0134 1222 movs r2, #18 - 1918 0136 A35E ldrsh r3, [r4, r2] - 1919 0138 C14A ldr r2, .L166 - 1920 013a 9446 mov ip, r2 - 1921 013c 6344 add r3, r3, ip - 1922 013e 6B43 muls r3, r5 - 1923 0140 9800 lsls r0, r3, #2 - 1924 0142 C018 adds r0, r0, r3 - 1925 0144 6421 movs r1, #100 - 1926 0146 FFF7FEFF bl __aeabi_idiv - 1927 .LVL221: - 1928 014a C823 movs r3, #200 - ARM GAS /tmp/ccvbgJts.s page 58 - - - 1929 014c 9B03 lsls r3, r3, #14 - 1930 014e 9C46 mov ip, r3 - 1931 0150 6044 add r0, r0, ip - 1932 0152 0A21 movs r1, #10 - 1933 0154 FFF7FEFF bl __aeabi_idiv - 1934 .LVL222: - 1935 0158 4346 mov r3, r8 - 1936 015a 4343 muls r3, r0 - 1937 .LVL223: - 947:Drivers/BME680/bme680.c **** var4 = (var3 / (dev->calib.res_heat_range + 4)); - 1938 .loc 1 947 0 - 1939 015c D80F lsrs r0, r3, #31 - 1940 015e C018 adds r0, r0, r3 - 1941 0160 4010 asrs r0, r0, #1 - 1942 0162 4844 add r0, r0, r9 - 1943 .LVL224: - 948:Drivers/BME680/bme680.c **** var5 = (131 * dev->calib.res_heat_val) + 65536; - 1944 .loc 1 948 0 - 1945 0164 3423 movs r3, #52 - 1946 .LVL225: - 1947 0166 E15C ldrb r1, [r4, r3] - 1948 0168 0431 adds r1, r1, #4 - 1949 016a FFF7FEFF bl __aeabi_idiv - 1950 .LVL226: - 949:Drivers/BME680/bme680.c **** heatr_res_x100 = (int32_t) (((var4 / var5) - 250) * 34); - 1951 .loc 1 949 0 - 1952 016e 3523 movs r3, #53 - 1953 0170 E356 ldrsb r3, [r4, r3] - 1954 0172 9901 lsls r1, r3, #6 - 1955 0174 C918 adds r1, r1, r3 - 1956 0176 4900 lsls r1, r1, #1 - 1957 0178 C918 adds r1, r1, r3 - 1958 017a 8023 movs r3, #128 - 1959 017c 5B02 lsls r3, r3, #9 - 1960 017e 9C46 mov ip, r3 - 1961 0180 6144 add r1, r1, ip - 1962 .LVL227: - 950:Drivers/BME680/bme680.c **** heatr_res = (uint8_t) ((heatr_res_x100 + 50) / 100); - 1963 .loc 1 950 0 - 1964 0182 FFF7FEFF bl __aeabi_idiv - 1965 .LVL228: - 1966 0186 0300 movs r3, r0 - 1967 0188 FA3B subs r3, r3, #250 - 1968 018a 1801 lsls r0, r3, #4 - 1969 018c C018 adds r0, r0, r3 - 1970 018e 4000 lsls r0, r0, #1 - 1971 .LVL229: - 951:Drivers/BME680/bme680.c **** - 1972 .loc 1 951 0 - 1973 0190 3230 adds r0, r0, #50 - 1974 .LVL230: - 1975 0192 6421 movs r1, #100 - 1976 0194 FFF7FEFF bl __aeabi_idiv - 1977 .LVL231: - 1978 .LBE149: - 1979 .LBE148: - 757:Drivers/BME680/bme680.c **** reg_addr[1] = BME680_GAS_WAIT0_ADDR; - ARM GAS /tmp/ccvbgJts.s page 59 - - - 1980 .loc 1 757 0 - 1981 0198 01AB add r3, sp, #4 - 1982 019a 1870 strb r0, [r3] - 758:Drivers/BME680/bme680.c **** reg_data[1] = calc_heater_dur(dev->gas_sett.heatr_dur); - 1983 .loc 1 758 0 - 1984 019c 6423 movs r3, #100 - 1985 019e 6A46 mov r2, sp - 1986 01a0 5370 strb r3, [r2, #1] - 759:Drivers/BME680/bme680.c **** dev->gas_sett.nb_conv = 0; - 1987 .loc 1 759 0 - 1988 01a2 223B subs r3, r3, #34 - 1989 01a4 E35A ldrh r3, [r4, r3] - 1990 .LVL232: - 1991 .LBB150: - 1992 .LBB151: - 964:Drivers/BME680/bme680.c **** durval = 0xff; /* Max duration*/ - 1993 .loc 1 964 0 - 1994 01a6 A74A ldr r2, .L166+4 - 1995 01a8 9342 cmp r3, r2 - 1996 01aa 16D8 bhi .L154 - 961:Drivers/BME680/bme680.c **** uint8_t durval; - 1997 .loc 1 961 0 - 1998 01ac 0022 movs r2, #0 - 1999 01ae 02E0 b .L118 - 2000 .LVL233: - 2001 .L119: - 968:Drivers/BME680/bme680.c **** factor += 1; - 2002 .loc 1 968 0 - 2003 01b0 9B08 lsrs r3, r3, #2 - 2004 .LVL234: - 969:Drivers/BME680/bme680.c **** } - 2005 .loc 1 969 0 - 2006 01b2 0132 adds r2, r2, #1 - 2007 .LVL235: - 2008 01b4 D2B2 uxtb r2, r2 - 2009 .LVL236: - 2010 .L118: - 967:Drivers/BME680/bme680.c **** dur = dur / 4; - 2011 .loc 1 967 0 - 2012 01b6 3F2B cmp r3, #63 - 2013 01b8 FAD8 bhi .L119 - 971:Drivers/BME680/bme680.c **** } - 2014 .loc 1 971 0 - 2015 01ba DBB2 uxtb r3, r3 - 2016 .LVL237: - 2017 01bc 9201 lsls r2, r2, #6 - 2018 .LVL238: - 2019 01be D2B2 uxtb r2, r2 - 2020 01c0 9B18 adds r3, r3, r2 - 2021 01c2 DBB2 uxtb r3, r3 - 2022 .LVL239: - 2023 .L117: - 2024 .LBE151: - 2025 .LBE150: - 759:Drivers/BME680/bme680.c **** dev->gas_sett.nb_conv = 0; - 2026 .loc 1 759 0 - 2027 01c4 01A9 add r1, sp, #4 - ARM GAS /tmp/ccvbgJts.s page 60 - - - 2028 01c6 4B70 strb r3, [r1, #1] - 760:Drivers/BME680/bme680.c **** } else { - 2029 .loc 1 760 0 - 2030 01c8 3C23 movs r3, #60 - 2031 01ca 0022 movs r2, #0 - 2032 01cc E254 strb r2, [r4, r3] - 2033 .LVL240: - 765:Drivers/BME680/bme680.c **** } - 2034 .loc 1 765 0 - 2035 01ce 2300 movs r3, r4 - 2036 01d0 0232 adds r2, r2, #2 - 2037 01d2 6846 mov r0, sp - 2038 01d4 FFF7FEFF bl bme680_set_regs - 2039 .LVL241: - 2040 01d8 3DE7 b .L113 - 2041 .LVL242: - 2042 .L154: - 2043 .LBB153: - 2044 .LBB152: - 965:Drivers/BME680/bme680.c **** } else { - 2045 .loc 1 965 0 - 2046 01da FF23 movs r3, #255 - 2047 .LVL243: - 2048 01dc F2E7 b .L117 - 2049 .LVL244: - 2050 .L147: - 2051 .LBE152: - 2052 .LBE153: - 2053 .LBE147: - 2054 .LBB154: - 2055 .LBB146: -1131:Drivers/BME680/bme680.c **** } else { - 2056 .loc 1 1131 0 - 2057 01de 0120 movs r0, #1 - 2058 01e0 4042 rsbs r0, r0, #0 - 2059 01e2 38E7 b .L113 - 2060 .L148: - 2061 01e4 0120 movs r0, #1 - 2062 01e6 4042 rsbs r0, r0, #0 - 2063 01e8 35E7 b .L113 - 2064 .L149: - 2065 01ea 0120 movs r0, #1 - 2066 01ec 4042 rsbs r0, r0, #0 - 2067 01ee 32E7 b .L113 - 2068 .L150: - 2069 01f0 0120 movs r0, #1 - 2070 01f2 4042 rsbs r0, r0, #0 - 2071 .LVL245: - 2072 01f4 2FE7 b .L113 - 2073 .LVL246: - 2074 .L163: - 2075 .LBE146: - 2076 .LBE154: - 2077 .LBE143: - 2078 .LBE142: - 380:Drivers/BME680/bme680.c **** - 2079 .loc 1 380 0 - ARM GAS /tmp/ccvbgJts.s page 61 - - - 2080 01f6 2000 movs r0, r4 - 2081 .LVL247: - 2082 01f8 FFF7FEFF bl bme680_set_sensor_mode - 2083 .LVL248: - 2084 01fc 31E7 b .L120 - 2085 .LVL249: - 2086 .L156: - 2087 .LBB155: - 2088 .LBB141: -1115:Drivers/BME680/bme680.c **** } - 2089 .loc 1 1115 0 - 2090 01fe 0120 movs r0, #1 - 2091 .LVL250: - 2092 0200 4042 rsbs r0, r0, #0 - 2093 0202 48E7 b .L122 - 2094 .LVL251: - 2095 .L155: - 2096 .LBE141: - 2097 .LBE155: - 367:Drivers/BME680/bme680.c **** uint8_t reg_array[BME680_REG_BUFFER_LENGTH] = { 0 }; - 2098 .loc 1 367 0 - 2099 0204 0025 movs r5, #0 - 2100 .LVL252: - 2101 .L121: - 399:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->gas_sett.heatr_ctrl, BME680_ENABLE_HEATER, - 2102 .loc 1 399 0 - 2103 0206 B306 lsls r3, r6, #26 - 2104 0208 2CD5 bpl .L124 - 2105 .LVL253: - 2106 .LBB156: - 2107 .LBB157: -1101:Drivers/BME680/bme680.c **** /* Check if value is below minimum value */ - 2108 .loc 1 1101 0 - 2109 020a 2300 movs r3, r4 - 2110 020c 3D33 adds r3, r3, #61 - 2111 020e 00D1 bne .LCB2366 - 2112 0210 F3E0 b .L157 @long jump - 2113 .LCB2366: -1103:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to minimum value */ - 2114 .loc 1 1103 0 - 2115 0212 3D23 movs r3, #61 - 2116 0214 E35C ldrb r3, [r4, r3] -1109:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to maximum value */ - 2117 .loc 1 1109 0 - 2118 0216 082B cmp r3, #8 - 2119 0218 07D9 bls .L126 -1111:Drivers/BME680/bme680.c **** dev->info_msg |= BME680_I_MAX_CORRECTION; - 2120 .loc 1 1111 0 - 2121 021a 3D23 movs r3, #61 - 2122 021c 0822 movs r2, #8 - 2123 021e E254 strb r2, [r4, r3] -1112:Drivers/BME680/bme680.c **** } - 2124 .loc 1 1112 0 - 2125 0220 3E32 adds r2, r2, #62 - 2126 0222 A35C ldrb r3, [r4, r2] - 2127 0224 0221 movs r1, #2 - 2128 0226 0B43 orrs r3, r1 - ARM GAS /tmp/ccvbgJts.s page 62 - - - 2129 0228 A354 strb r3, [r4, r2] - 2130 .LVL254: - 2131 .L126: - 2132 .LBE157: - 2133 .LBE156: - 405:Drivers/BME680/bme680.c **** data = BME680_SET_BITS_POS_0(data, BME680_HCTRL, dev->gas_sett.heatr_ctrl); - 2134 .loc 1 405 0 - 2135 022a 2300 movs r3, r4 - 2136 022c 0122 movs r2, #1 - 2137 022e 1721 movs r1, #23 - 2138 0230 6944 add r1, r1, sp - 2139 0232 7020 movs r0, #112 - 2140 0234 FFF7FEFF bl bme680_get_regs - 2141 .LVL255: - 2142 .L125: - 406:Drivers/BME680/bme680.c **** - 2143 .loc 1 406 0 - 2144 0238 1722 movs r2, #23 - 2145 023a 6A44 add r2, r2, sp - 2146 023c 1378 ldrb r3, [r2] - 2147 023e 0821 movs r1, #8 - 2148 0240 8B43 bics r3, r1 - 2149 0242 5BB2 sxtb r3, r3 - 2150 0244 3531 adds r1, r1, #53 - 2151 0246 6156 ldrsb r1, [r4, r1] - 2152 0248 8C46 mov ip, r1 - 2153 024a 0821 movs r1, #8 - 2154 024c 6746 mov r7, ip - 2155 024e 3940 ands r1, r7 - 2156 0250 0B43 orrs r3, r1 - 2157 0252 DBB2 uxtb r3, r3 - 2158 0254 1370 strb r3, [r2] - 408:Drivers/BME680/bme680.c **** data_array[count] = data; - 2159 .loc 1 408 0 - 2160 0256 04AA add r2, sp, #16 - 2161 0258 7021 movs r1, #112 - 2162 025a 5155 strb r1, [r2, r5] - 409:Drivers/BME680/bme680.c **** count++; - 2163 .loc 1 409 0 - 2164 025c 02AA add r2, sp, #8 - 2165 025e 5355 strb r3, [r2, r5] - 410:Drivers/BME680/bme680.c **** } - 2166 .loc 1 410 0 - 2167 0260 0135 adds r5, r5, #1 - 2168 .LVL256: - 2169 0262 EDB2 uxtb r5, r5 - 2170 .LVL257: - 2171 .L124: - 414:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->tph_sett.os_temp, BME680_OS_NONE, BME680_OS_16X, dev); - 2172 .loc 1 414 0 - 2173 0264 B307 lsls r3, r6, #30 - 2174 0266 3DD0 beq .L127 - 2175 .LVL258: - 2176 .LBB159: - 2177 .LBB160: -1101:Drivers/BME680/bme680.c **** /* Check if value is below minimum value */ - 2178 .loc 1 1101 0 - ARM GAS /tmp/ccvbgJts.s page 63 - - - 2179 0268 2300 movs r3, r4 - 2180 026a 3933 adds r3, r3, #57 - 2181 026c 00D1 bne .LCB2453 - 2182 026e C7E0 b .L158 @long jump - 2183 .LCB2453: -1103:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to minimum value */ - 2184 .loc 1 1103 0 - 2185 0270 3923 movs r3, #57 - 2186 0272 E35C ldrb r3, [r4, r3] -1109:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to maximum value */ - 2187 .loc 1 1109 0 - 2188 0274 052B cmp r3, #5 - 2189 0276 07D9 bls .L129 -1111:Drivers/BME680/bme680.c **** dev->info_msg |= BME680_I_MAX_CORRECTION; - 2190 .loc 1 1111 0 - 2191 0278 3923 movs r3, #57 - 2192 027a 0522 movs r2, #5 - 2193 027c E254 strb r2, [r4, r3] -1112:Drivers/BME680/bme680.c **** } - 2194 .loc 1 1112 0 - 2195 027e 4132 adds r2, r2, #65 - 2196 0280 A35C ldrb r3, [r4, r2] - 2197 0282 0221 movs r1, #2 - 2198 0284 0B43 orrs r3, r1 - 2199 0286 A354 strb r3, [r4, r2] - 2200 .LVL259: - 2201 .L129: - 2202 .LBE160: - 2203 .LBE159: - 419:Drivers/BME680/bme680.c **** - 2204 .loc 1 419 0 - 2205 0288 2300 movs r3, r4 - 2206 028a 0122 movs r2, #1 - 2207 028c 1721 movs r1, #23 - 2208 028e 6944 add r1, r1, sp - 2209 0290 7420 movs r0, #116 - 2210 0292 FFF7FEFF bl bme680_get_regs - 2211 .LVL260: - 2212 .L128: - 421:Drivers/BME680/bme680.c **** data = BME680_SET_BITS(data, BME680_OST, dev->tph_sett.os_temp); - 2213 .loc 1 421 0 - 2214 0296 F307 lsls r3, r6, #31 - 2215 0298 09D5 bpl .L130 - 422:Drivers/BME680/bme680.c **** - 2216 .loc 1 422 0 - 2217 029a 1722 movs r2, #23 - 2218 029c 6A44 add r2, r2, sp - 2219 029e 1178 ldrb r1, [r2] - 2220 02a0 1F23 movs r3, #31 - 2221 02a2 0B40 ands r3, r1 - 2222 02a4 3921 movs r1, #57 - 2223 02a6 615C ldrb r1, [r4, r1] - 2224 02a8 4901 lsls r1, r1, #5 - 2225 02aa 0B43 orrs r3, r1 - 2226 02ac 1370 strb r3, [r2] - 2227 .L130: - 424:Drivers/BME680/bme680.c **** data = BME680_SET_BITS(data, BME680_OSP, dev->tph_sett.os_pres); - ARM GAS /tmp/ccvbgJts.s page 64 - - - 2228 .loc 1 424 0 - 2229 02ae B307 lsls r3, r6, #30 - 2230 02b0 0ED5 bpl .L131 - 425:Drivers/BME680/bme680.c **** - 2231 .loc 1 425 0 - 2232 02b2 1722 movs r2, #23 - 2233 02b4 6A44 add r2, r2, sp - 2234 02b6 1378 ldrb r3, [r2] - 2235 02b8 1C21 movs r1, #28 - 2236 02ba 8B43 bics r3, r1 - 2237 02bc 5BB2 sxtb r3, r3 - 2238 02be 1E31 adds r1, r1, #30 - 2239 02c0 615C ldrb r1, [r4, r1] - 2240 02c2 8900 lsls r1, r1, #2 - 2241 02c4 8C46 mov ip, r1 - 2242 02c6 1C21 movs r1, #28 - 2243 02c8 6746 mov r7, ip - 2244 02ca 3940 ands r1, r7 - 2245 02cc 0B43 orrs r3, r1 - 2246 02ce 1370 strb r3, [r2] - 2247 .L131: - 427:Drivers/BME680/bme680.c **** data_array[count] = data; - 2248 .loc 1 427 0 - 2249 02d0 04AB add r3, sp, #16 - 2250 02d2 7422 movs r2, #116 - 2251 02d4 5A55 strb r2, [r3, r5] - 428:Drivers/BME680/bme680.c **** count++; - 2252 .loc 1 428 0 - 2253 02d6 1723 movs r3, #23 - 2254 02d8 6B44 add r3, r3, sp - 2255 02da 1A78 ldrb r2, [r3] - 2256 02dc 02AB add r3, sp, #8 - 2257 02de 5A55 strb r2, [r3, r5] - 429:Drivers/BME680/bme680.c **** } - 2258 .loc 1 429 0 - 2259 02e0 0135 adds r5, r5, #1 - 2260 .LVL261: - 2261 02e2 EDB2 uxtb r5, r5 - 2262 .LVL262: - 2263 .L127: - 433:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->tph_sett.os_hum, BME680_OS_NONE, BME680_OS_16X, dev); - 2264 .loc 1 433 0 - 2265 02e4 7307 lsls r3, r6, #29 - 2266 02e6 2CD5 bpl .L132 - 2267 .LVL263: - 2268 .LBB162: - 2269 .LBB163: -1101:Drivers/BME680/bme680.c **** /* Check if value is below minimum value */ - 2270 .loc 1 1101 0 - 2271 02e8 2300 movs r3, r4 - 2272 02ea 3833 adds r3, r3, #56 - 2273 02ec 00D1 bne .LCB2572 - 2274 02ee 8AE0 b .L159 @long jump - 2275 .LCB2572: -1103:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to minimum value */ - 2276 .loc 1 1103 0 - 2277 02f0 3823 movs r3, #56 - ARM GAS /tmp/ccvbgJts.s page 65 - - - 2278 02f2 E35C ldrb r3, [r4, r3] -1109:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to maximum value */ - 2279 .loc 1 1109 0 - 2280 02f4 052B cmp r3, #5 - 2281 02f6 07D9 bls .L134 -1111:Drivers/BME680/bme680.c **** dev->info_msg |= BME680_I_MAX_CORRECTION; - 2282 .loc 1 1111 0 - 2283 02f8 3823 movs r3, #56 - 2284 02fa 0522 movs r2, #5 - 2285 02fc E254 strb r2, [r4, r3] -1112:Drivers/BME680/bme680.c **** } - 2286 .loc 1 1112 0 - 2287 02fe 4132 adds r2, r2, #65 - 2288 0300 A35C ldrb r3, [r4, r2] - 2289 0302 0221 movs r1, #2 - 2290 0304 0B43 orrs r3, r1 - 2291 0306 A354 strb r3, [r4, r2] - 2292 .LVL264: - 2293 .L134: - 2294 .LBE163: - 2295 .LBE162: - 438:Drivers/BME680/bme680.c **** data = BME680_SET_BITS_POS_0(data, BME680_OSH, dev->tph_sett.os_hum); - 2296 .loc 1 438 0 - 2297 0308 2300 movs r3, r4 - 2298 030a 0122 movs r2, #1 - 2299 030c 1721 movs r1, #23 - 2300 030e 6944 add r1, r1, sp - 2301 0310 7220 movs r0, #114 - 2302 0312 FFF7FEFF bl bme680_get_regs - 2303 .LVL265: - 2304 .L133: - 439:Drivers/BME680/bme680.c **** - 2305 .loc 1 439 0 - 2306 0316 1722 movs r2, #23 - 2307 0318 6A44 add r2, r2, sp - 2308 031a 1378 ldrb r3, [r2] - 2309 031c 0721 movs r1, #7 - 2310 031e 8B43 bics r3, r1 - 2311 0320 5BB2 sxtb r3, r3 - 2312 0322 3131 adds r1, r1, #49 - 2313 0324 6156 ldrsb r1, [r4, r1] - 2314 0326 8C46 mov ip, r1 - 2315 0328 0721 movs r1, #7 - 2316 032a 6746 mov r7, ip - 2317 032c 3940 ands r1, r7 - 2318 032e 0B43 orrs r3, r1 - 2319 0330 DBB2 uxtb r3, r3 - 2320 0332 1370 strb r3, [r2] - 441:Drivers/BME680/bme680.c **** data_array[count] = data; - 2321 .loc 1 441 0 - 2322 0334 04AA add r2, sp, #16 - 2323 0336 7221 movs r1, #114 - 2324 0338 5155 strb r1, [r2, r5] - 442:Drivers/BME680/bme680.c **** count++; - 2325 .loc 1 442 0 - 2326 033a 02AA add r2, sp, #8 - 2327 033c 5355 strb r3, [r2, r5] - ARM GAS /tmp/ccvbgJts.s page 66 - - - 443:Drivers/BME680/bme680.c **** } - 2328 .loc 1 443 0 - 2329 033e 0135 adds r5, r5, #1 - 2330 .LVL266: - 2331 0340 EDB2 uxtb r5, r5 - 2332 .LVL267: - 2333 .L132: - 447:Drivers/BME680/bme680.c **** rslt = boundary_check(&dev->gas_sett.run_gas, BME680_RUN_GAS_DISABLE, - 2334 .loc 1 447 0 - 2335 0342 C023 movs r3, #192 - 2336 0344 3342 tst r3, r6 - 2337 0346 4DD0 beq .L135 - 2338 .LVL268: - 2339 .LBB165: - 2340 .LBB166: -1101:Drivers/BME680/bme680.c **** /* Check if value is below minimum value */ - 2341 .loc 1 1101 0 - 2342 0348 2300 movs r3, r4 - 2343 034a 3E33 adds r3, r3, #62 - 2344 034c 5ED0 beq .L160 -1103:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to minimum value */ - 2345 .loc 1 1103 0 - 2346 034e 3E23 movs r3, #62 - 2347 0350 E35C ldrb r3, [r4, r3] -1109:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to maximum value */ - 2348 .loc 1 1109 0 - 2349 0352 012B cmp r3, #1 - 2350 0354 07D9 bls .L137 -1111:Drivers/BME680/bme680.c **** dev->info_msg |= BME680_I_MAX_CORRECTION; - 2351 .loc 1 1111 0 - 2352 0356 3E23 movs r3, #62 - 2353 0358 0122 movs r2, #1 - 2354 035a E254 strb r2, [r4, r3] -1112:Drivers/BME680/bme680.c **** } - 2355 .loc 1 1112 0 - 2356 035c 4532 adds r2, r2, #69 - 2357 035e A35C ldrb r3, [r4, r2] - 2358 0360 0221 movs r1, #2 - 2359 0362 0B43 orrs r3, r1 - 2360 0364 A354 strb r3, [r4, r2] - 2361 .LVL269: - 2362 .L137: - 2363 .LBE166: - 2364 .LBE165: - 2365 .LBB168: - 2366 .LBB169: -1101:Drivers/BME680/bme680.c **** /* Check if value is below minimum value */ - 2367 .loc 1 1101 0 - 2368 0366 2300 movs r3, r4 - 2369 0368 3C33 adds r3, r3, #60 - 2370 036a 52D0 beq .L161 -1103:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to minimum value */ - 2371 .loc 1 1103 0 - 2372 036c 3C23 movs r3, #60 - 2373 036e E35C ldrb r3, [r4, r3] -1109:Drivers/BME680/bme680.c **** /* Auto correct the invalid value to maximum value */ - 2374 .loc 1 1109 0 - ARM GAS /tmp/ccvbgJts.s page 67 - - - 2375 0370 0A2B cmp r3, #10 - 2376 0372 07D9 bls .L138 -1111:Drivers/BME680/bme680.c **** dev->info_msg |= BME680_I_MAX_CORRECTION; - 2377 .loc 1 1111 0 - 2378 0374 3C23 movs r3, #60 - 2379 0376 0A22 movs r2, #10 - 2380 0378 E254 strb r2, [r4, r3] -1112:Drivers/BME680/bme680.c **** } - 2381 .loc 1 1112 0 - 2382 037a 3C32 adds r2, r2, #60 - 2383 037c A35C ldrb r3, [r4, r2] - 2384 037e 0221 movs r1, #2 - 2385 0380 0B43 orrs r3, r1 - 2386 0382 A354 strb r3, [r4, r2] - 2387 .LVL270: - 2388 .L138: - 2389 .LBE169: - 2390 .LBE168: - 459:Drivers/BME680/bme680.c **** - 2391 .loc 1 459 0 - 2392 0384 2300 movs r3, r4 - 2393 0386 0122 movs r2, #1 - 2394 0388 1721 movs r1, #23 - 2395 038a 6944 add r1, r1, sp - 2396 038c 7120 movs r0, #113 - 2397 038e FFF7FEFF bl bme680_get_regs - 2398 .LVL271: - 2399 .L136: - 461:Drivers/BME680/bme680.c **** data = BME680_SET_BITS(data, BME680_RUN_GAS, dev->gas_sett.run_gas); - 2400 .loc 1 461 0 - 2401 0392 7306 lsls r3, r6, #25 - 2402 0394 0ED5 bpl .L139 - 462:Drivers/BME680/bme680.c **** - 2403 .loc 1 462 0 - 2404 0396 1722 movs r2, #23 - 2405 0398 6A44 add r2, r2, sp - 2406 039a 1378 ldrb r3, [r2] - 2407 039c 1021 movs r1, #16 - 2408 039e 8B43 bics r3, r1 - 2409 03a0 5BB2 sxtb r3, r3 - 2410 03a2 2E31 adds r1, r1, #46 - 2411 03a4 615C ldrb r1, [r4, r1] - 2412 03a6 0901 lsls r1, r1, #4 - 2413 03a8 8C46 mov ip, r1 - 2414 03aa 1021 movs r1, #16 - 2415 03ac 6746 mov r7, ip - 2416 03ae 3940 ands r1, r7 - 2417 03b0 0B43 orrs r3, r1 - 2418 03b2 1370 strb r3, [r2] - 2419 .L139: - 464:Drivers/BME680/bme680.c **** data = BME680_SET_BITS_POS_0(data, BME680_NBCONV, dev->gas_sett.nb_conv); - 2420 .loc 1 464 0 - 2421 03b4 3306 lsls r3, r6, #24 - 2422 03b6 0BD5 bpl .L140 - 465:Drivers/BME680/bme680.c **** - 2423 .loc 1 465 0 - 2424 03b8 1722 movs r2, #23 - ARM GAS /tmp/ccvbgJts.s page 68 - - - 2425 03ba 6A44 add r2, r2, sp - 2426 03bc 1378 ldrb r3, [r2] - 2427 03be 0F21 movs r1, #15 - 2428 03c0 8B43 bics r3, r1 - 2429 03c2 5BB2 sxtb r3, r3 - 2430 03c4 2D31 adds r1, r1, #45 - 2431 03c6 6656 ldrsb r6, [r4, r1] - 2432 03c8 2D39 subs r1, r1, #45 - 2433 03ca 3140 ands r1, r6 - 2434 03cc 0B43 orrs r3, r1 - 2435 03ce 1370 strb r3, [r2] - 2436 .L140: - 467:Drivers/BME680/bme680.c **** data_array[count] = data; - 2437 .loc 1 467 0 - 2438 03d0 04AB add r3, sp, #16 - 2439 03d2 7122 movs r2, #113 - 2440 03d4 5A55 strb r2, [r3, r5] - 468:Drivers/BME680/bme680.c **** count++; - 2441 .loc 1 468 0 - 2442 03d6 1723 movs r3, #23 - 2443 03d8 6B44 add r3, r3, sp - 2444 03da 1A78 ldrb r2, [r3] - 2445 03dc 02AB add r3, sp, #8 - 2446 03de 5A55 strb r2, [r3, r5] - 469:Drivers/BME680/bme680.c **** } - 2447 .loc 1 469 0 - 2448 03e0 0135 adds r5, r5, #1 - 2449 .LVL272: - 2450 03e2 EDB2 uxtb r5, r5 - 2451 .LVL273: - 2452 .L135: - 472:Drivers/BME680/bme680.c **** rslt = bme680_set_regs(reg_array, data_array, count, dev); - 2453 .loc 1 472 0 - 2454 03e4 0028 cmp r0, #0 - 2455 03e6 17D0 beq .L165 - 2456 .LVL274: - 2457 .L141: - 476:Drivers/BME680/bme680.c **** } - 2458 .loc 1 476 0 - 2459 03e8 4423 movs r3, #68 - 2460 03ea 5246 mov r2, r10 - 2461 03ec E254 strb r2, [r4, r3] - 2462 .LVL275: - 2463 .L112: - 480:Drivers/BME680/bme680.c **** - 2464 .loc 1 480 0 - 2465 03ee 06B0 add sp, sp, #24 - 2466 @ sp needed - 2467 .LVL276: - 2468 .LVL277: - 2469 03f0 1CBC pop {r2, r3, r4} - 2470 03f2 9046 mov r8, r2 - 2471 03f4 9946 mov r9, r3 - 2472 03f6 A246 mov r10, r4 - 2473 03f8 F0BD pop {r4, r5, r6, r7, pc} - 2474 .LVL278: - 2475 .L157: - ARM GAS /tmp/ccvbgJts.s page 69 - - - 2476 .LBB171: - 2477 .LBB158: -1115:Drivers/BME680/bme680.c **** } - 2478 .loc 1 1115 0 - 2479 03fa 0120 movs r0, #1 - 2480 .LVL279: - 2481 03fc 4042 rsbs r0, r0, #0 - 2482 03fe 1BE7 b .L125 - 2483 .LVL280: - 2484 .L158: - 2485 .LBE158: - 2486 .LBE171: - 2487 .LBB172: - 2488 .LBB161: - 2489 0400 0120 movs r0, #1 - 2490 .LVL281: - 2491 0402 4042 rsbs r0, r0, #0 - 2492 0404 47E7 b .L128 - 2493 .LVL282: - 2494 .L159: - 2495 .LBE161: - 2496 .LBE172: - 2497 .LBB173: - 2498 .LBB164: - 2499 0406 0120 movs r0, #1 - 2500 .LVL283: - 2501 0408 4042 rsbs r0, r0, #0 - 2502 040a 84E7 b .L133 - 2503 .LVL284: - 2504 .L160: - 2505 .LBE164: - 2506 .LBE173: - 2507 .LBB174: - 2508 .LBB167: - 2509 040c 0120 movs r0, #1 - 2510 .LVL285: - 2511 040e 4042 rsbs r0, r0, #0 - 2512 0410 BFE7 b .L136 - 2513 .LVL286: - 2514 .L161: - 2515 .LBE167: - 2516 .LBE174: - 2517 .LBB175: - 2518 .LBB170: - 2519 0412 0120 movs r0, #1 - 2520 0414 4042 rsbs r0, r0, #0 - 2521 0416 BCE7 b .L136 - 2522 .LVL287: - 2523 .L165: - 2524 .LBE170: - 2525 .LBE175: - 473:Drivers/BME680/bme680.c **** - 2526 .loc 1 473 0 - 2527 0418 2300 movs r3, r4 - 2528 041a 2A00 movs r2, r5 - 2529 041c 02A9 add r1, sp, #8 - 2530 041e 04A8 add r0, sp, #16 - ARM GAS /tmp/ccvbgJts.s page 70 - - - 2531 .LVL288: - 2532 0420 FFF7FEFF bl bme680_set_regs - 2533 .LVL289: - 2534 0424 E0E7 b .L141 - 2535 .LVL290: - 2536 .L142: - 2537 .LBB176: - 2538 .LBB137: -1131:Drivers/BME680/bme680.c **** } else { - 2539 .loc 1 1131 0 - 2540 0426 0120 movs r0, #1 - 2541 0428 4042 rsbs r0, r0, #0 - 2542 042a E0E7 b .L112 - 2543 .L143: - 2544 042c 0120 movs r0, #1 - 2545 042e 4042 rsbs r0, r0, #0 - 2546 0430 DDE7 b .L112 - 2547 .L144: - 2548 0432 0120 movs r0, #1 - 2549 0434 4042 rsbs r0, r0, #0 - 2550 0436 DAE7 b .L112 - 2551 .L145: - 2552 0438 0120 movs r0, #1 - 2553 043a 4042 rsbs r0, r0, #0 - 2554 043c D7E7 b .L112 - 2555 .L167: - 2556 043e C046 .align 2 - 2557 .L166: - 2558 0440 99590200 .word 154009 - 2559 0444 BF0F0000 .word 4031 - 2560 .LBE137: - 2561 .LBE176: - 2562 .cfi_endproc - 2563 .LFE4: - 2565 .section .text.bme680_get_sensor_mode,"ax",%progbits - 2566 .align 1 - 2567 .global bme680_get_sensor_mode - 2568 .syntax unified - 2569 .code 16 - 2570 .thumb_func - 2571 .fpu softvfp - 2573 bme680_get_sensor_mode: - 2574 .LFB7: - 578:Drivers/BME680/bme680.c **** int8_t rslt; - 2575 .loc 1 578 0 - 2576 .cfi_startproc - 2577 @ args = 0, pretend = 0, frame = 8 - 2578 @ frame_needed = 0, uses_anonymous_args = 0 - 2579 .LVL291: - 2580 0000 30B5 push {r4, r5, lr} - 2581 .LCFI20: - 2582 .cfi_def_cfa_offset 12 - 2583 .cfi_offset 4, -12 - 2584 .cfi_offset 5, -8 - 2585 .cfi_offset 14, -4 - 2586 0002 83B0 sub sp, sp, #12 - 2587 .LCFI21: - ARM GAS /tmp/ccvbgJts.s page 71 - - - 2588 .cfi_def_cfa_offset 24 - 2589 0004 041E subs r4, r0, #0 - 2590 .LVL292: - 2591 .LBB177: - 2592 .LBB178: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 2593 .loc 1 1129 0 - 2594 0006 17D0 beq .L170 - 2595 0008 836C ldr r3, [r0, #72] - 2596 000a 002B cmp r3, #0 - 2597 000c 17D0 beq .L171 - 2598 000e C36C ldr r3, [r0, #76] - 2599 0010 002B cmp r3, #0 - 2600 0012 17D0 beq .L172 - 2601 0014 036D ldr r3, [r0, #80] - 2602 0016 002B cmp r3, #0 - 2603 0018 17D0 beq .L173 - 2604 .LVL293: - 2605 .LBE178: - 2606 .LBE177: - 585:Drivers/BME680/bme680.c **** /* Masking the other register bit info*/ - 2607 .loc 1 585 0 - 2608 001a 6B46 mov r3, sp - 2609 001c DD1D adds r5, r3, #7 - 2610 001e 0300 movs r3, r0 - 2611 0020 0122 movs r2, #1 - 2612 0022 2900 movs r1, r5 - 2613 0024 7420 movs r0, #116 - 2614 .LVL294: - 2615 0026 FFF7FEFF bl bme680_get_regs - 2616 .LVL295: - 587:Drivers/BME680/bme680.c **** } - 2617 .loc 1 587 0 - 2618 002a 2A78 ldrb r2, [r5] - 2619 002c 0323 movs r3, #3 - 2620 002e 1340 ands r3, r2 - 2621 0030 4422 movs r2, #68 - 2622 0032 A354 strb r3, [r4, r2] - 2623 .LVL296: - 2624 .L169: - 591:Drivers/BME680/bme680.c **** - 2625 .loc 1 591 0 - 2626 0034 03B0 add sp, sp, #12 - 2627 @ sp needed - 2628 .LVL297: - 2629 0036 30BD pop {r4, r5, pc} - 2630 .LVL298: - 2631 .L170: - 2632 .LBB180: - 2633 .LBB179: -1131:Drivers/BME680/bme680.c **** } else { - 2634 .loc 1 1131 0 - 2635 0038 0120 movs r0, #1 - 2636 .LVL299: - 2637 003a 4042 rsbs r0, r0, #0 - 2638 003c FAE7 b .L169 - 2639 .LVL300: - ARM GAS /tmp/ccvbgJts.s page 72 - - - 2640 .L171: - 2641 003e 0120 movs r0, #1 - 2642 .LVL301: - 2643 0040 4042 rsbs r0, r0, #0 - 2644 0042 F7E7 b .L169 - 2645 .LVL302: - 2646 .L172: - 2647 0044 0120 movs r0, #1 - 2648 .LVL303: - 2649 0046 4042 rsbs r0, r0, #0 - 2650 0048 F4E7 b .L169 - 2651 .LVL304: - 2652 .L173: - 2653 004a 0120 movs r0, #1 - 2654 .LVL305: - 2655 004c 4042 rsbs r0, r0, #0 - 2656 004e F1E7 b .L169 - 2657 .LBE179: - 2658 .LBE180: - 2659 .cfi_endproc - 2660 .LFE7: - 2662 .global __aeabi_uidiv - 2663 .section .text.bme680_set_profile_dur,"ax",%progbits - 2664 .align 1 - 2665 .global bme680_set_profile_dur - 2666 .syntax unified - 2667 .code 16 - 2668 .thumb_func - 2669 .fpu softvfp - 2671 bme680_set_profile_dur: - 2672 .LFB8: - 597:Drivers/BME680/bme680.c **** uint32_t tph_dur; /* Calculate in us */ - 2673 .loc 1 597 0 - 2674 .cfi_startproc - 2675 @ args = 0, pretend = 0, frame = 0 - 2676 @ frame_needed = 0, uses_anonymous_args = 0 - 2677 .LVL306: - 2678 0000 70B5 push {r4, r5, r6, lr} - 2679 .LCFI22: - 2680 .cfi_def_cfa_offset 16 - 2681 .cfi_offset 4, -16 - 2682 .cfi_offset 5, -12 - 2683 .cfi_offset 6, -8 - 2684 .cfi_offset 14, -4 - 2685 0002 0500 movs r5, r0 - 2686 0004 0C00 movs r4, r1 - 601:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(477 * 4); /* TPH switching duration */ - 2687 .loc 1 601 0 - 2688 0006 3923 movs r3, #57 - 2689 0008 C85C ldrb r0, [r1, r3] - 2690 .LVL307: - 2691 000a 0133 adds r3, r3, #1 - 2692 000c CB5C ldrb r3, [r1, r3] - 2693 000e C018 adds r0, r0, r3 - 2694 0010 3823 movs r3, #56 - 2695 0012 CB5C ldrb r3, [r1, r3] - 2696 0014 C318 adds r3, r0, r3 - ARM GAS /tmp/ccvbgJts.s page 73 - - - 2697 0016 0748 ldr r0, .L175 - 2698 0018 5843 muls r0, r3 - 2699 .LVL308: - 604:Drivers/BME680/bme680.c **** tph_dur /= UINT32_C(1000); /* Convert to ms */ - 2700 .loc 1 604 0 - 2701 001a 074B ldr r3, .L175+4 - 2702 001c 9C46 mov ip, r3 - 2703 001e 6044 add r0, r0, ip - 2704 .LVL309: - 605:Drivers/BME680/bme680.c **** - 2705 .loc 1 605 0 - 2706 0020 FA21 movs r1, #250 - 2707 .LVL310: - 2708 0022 8900 lsls r1, r1, #2 - 2709 0024 FFF7FEFF bl __aeabi_uidiv - 2710 .LVL311: - 607:Drivers/BME680/bme680.c **** /* The remaining time should be used for heating */ - 2711 .loc 1 607 0 - 2712 0028 0130 adds r0, r0, #1 - 2713 .LVL312: - 609:Drivers/BME680/bme680.c **** } - 2714 .loc 1 609 0 - 2715 002a 80B2 uxth r0, r0 - 2716 .LVL313: - 2717 002c 281A subs r0, r5, r0 - 2718 002e 4223 movs r3, #66 - 2719 0030 E052 strh r0, [r4, r3] - 610:Drivers/BME680/bme680.c **** - 2720 .loc 1 610 0 - 2721 @ sp needed - 2722 .LVL314: - 2723 0032 70BD pop {r4, r5, r6, pc} - 2724 .L176: - 2725 .align 2 - 2726 .L175: - 2727 0034 AB070000 .word 1963 - 2728 0038 B9120000 .word 4793 - 2729 .cfi_endproc - 2730 .LFE8: - 2732 .section .text.bme680_get_profile_dur,"ax",%progbits - 2733 .align 1 - 2734 .global bme680_get_profile_dur - 2735 .syntax unified - 2736 .code 16 - 2737 .thumb_func - 2738 .fpu softvfp - 2740 bme680_get_profile_dur: - 2741 .LFB9: - 616:Drivers/BME680/bme680.c **** uint32_t tph_dur; /* Calculate in us */ - 2742 .loc 1 616 0 - 2743 .cfi_startproc - 2744 @ args = 0, pretend = 0, frame = 0 - 2745 @ frame_needed = 0, uses_anonymous_args = 0 - 2746 .LVL315: - 2747 0000 70B5 push {r4, r5, r6, lr} - 2748 .LCFI23: - 2749 .cfi_def_cfa_offset 16 - ARM GAS /tmp/ccvbgJts.s page 74 - - - 2750 .cfi_offset 4, -16 - 2751 .cfi_offset 5, -12 - 2752 .cfi_offset 6, -8 - 2753 .cfi_offset 14, -4 - 2754 0002 0400 movs r4, r0 - 2755 0004 0D00 movs r5, r1 - 620:Drivers/BME680/bme680.c **** tph_dur += UINT32_C(477 * 4); /* TPH switching duration */ - 2756 .loc 1 620 0 - 2757 0006 3923 movs r3, #57 - 2758 0008 C85C ldrb r0, [r1, r3] - 2759 .LVL316: - 2760 000a 0133 adds r3, r3, #1 - 2761 000c CB5C ldrb r3, [r1, r3] - 2762 000e C018 adds r0, r0, r3 - 2763 0010 3823 movs r3, #56 - 2764 0012 CB5C ldrb r3, [r1, r3] - 2765 0014 C318 adds r3, r0, r3 - 2766 0016 0A48 ldr r0, .L179 - 2767 0018 5843 muls r0, r3 - 2768 .LVL317: - 623:Drivers/BME680/bme680.c **** tph_dur /= UINT32_C(1000); /* Convert to ms */ - 2769 .loc 1 623 0 - 2770 001a 0A4B ldr r3, .L179+4 - 2771 001c 9C46 mov ip, r3 - 2772 001e 6044 add r0, r0, ip - 2773 .LVL318: - 624:Drivers/BME680/bme680.c **** - 2774 .loc 1 624 0 - 2775 0020 FA21 movs r1, #250 - 2776 .LVL319: - 2777 0022 8900 lsls r1, r1, #2 - 2778 0024 FFF7FEFF bl __aeabi_uidiv - 2779 .LVL320: - 626:Drivers/BME680/bme680.c **** - 2780 .loc 1 626 0 - 2781 0028 0130 adds r0, r0, #1 - 2782 .LVL321: - 628:Drivers/BME680/bme680.c **** - 2783 .loc 1 628 0 - 2784 002a 80B2 uxth r0, r0 - 2785 .LVL322: - 2786 002c 2080 strh r0, [r4] - 631:Drivers/BME680/bme680.c **** /* The remaining time should be used for heating */ - 2787 .loc 1 631 0 - 2788 002e 3E23 movs r3, #62 - 2789 0030 EB5C ldrb r3, [r5, r3] - 2790 0032 002B cmp r3, #0 - 2791 0034 03D0 beq .L177 - 633:Drivers/BME680/bme680.c **** } - 2792 .loc 1 633 0 - 2793 0036 4223 movs r3, #66 - 2794 0038 EB5A ldrh r3, [r5, r3] - 2795 003a C018 adds r0, r0, r3 - 2796 003c 2080 strh r0, [r4] - 2797 .L177: - 635:Drivers/BME680/bme680.c **** - 2798 .loc 1 635 0 - ARM GAS /tmp/ccvbgJts.s page 75 - - - 2799 @ sp needed - 2800 .LVL323: - 2801 .LVL324: - 2802 003e 70BD pop {r4, r5, r6, pc} - 2803 .L180: - 2804 .align 2 - 2805 .L179: - 2806 0040 AB070000 .word 1963 - 2807 0044 B9120000 .word 4793 - 2808 .cfi_endproc - 2809 .LFE9: - 2811 .global __aeabi_lmul - 2812 .global __aeabi_ldivmod - 2813 .section .text.bme680_get_sensor_data,"ax",%progbits - 2814 .align 1 - 2815 .global bme680_get_sensor_data - 2816 .syntax unified - 2817 .code 16 - 2818 .thumb_func - 2819 .fpu softvfp - 2821 bme680_get_sensor_data: - 2822 .LFB10: - 643:Drivers/BME680/bme680.c **** int8_t rslt; - 2823 .loc 1 643 0 - 2824 .cfi_startproc - 2825 @ args = 0, pretend = 0, frame = 40 - 2826 @ frame_needed = 0, uses_anonymous_args = 0 - 2827 .LVL325: - 2828 0000 F0B5 push {r4, r5, r6, r7, lr} - 2829 .LCFI24: - 2830 .cfi_def_cfa_offset 20 - 2831 .cfi_offset 4, -20 - 2832 .cfi_offset 5, -16 - 2833 .cfi_offset 6, -12 - 2834 .cfi_offset 7, -8 - 2835 .cfi_offset 14, -4 - 2836 0002 DE46 mov lr, fp - 2837 0004 5746 mov r7, r10 - 2838 0006 4E46 mov r6, r9 - 2839 0008 4546 mov r5, r8 - 2840 000a E0B5 push {r5, r6, r7, lr} - 2841 .LCFI25: - 2842 .cfi_def_cfa_offset 36 - 2843 .cfi_offset 8, -36 - 2844 .cfi_offset 9, -32 - 2845 .cfi_offset 10, -28 - 2846 .cfi_offset 11, -24 - 2847 000c 8BB0 sub sp, sp, #44 - 2848 .LCFI26: - 2849 .cfi_def_cfa_offset 80 - 2850 000e 8146 mov r9, r0 - 2851 0010 0D1E subs r5, r1, #0 - 2852 .LVL326: - 2853 .LBB195: - 2854 .LBB196: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 2855 .loc 1 1129 0 - ARM GAS /tmp/ccvbgJts.s page 76 - - - 2856 0012 00D1 bne .LCB3283 - 2857 0014 C8E1 b .L191 @long jump - 2858 .LCB3283: - 2859 0016 8B6C ldr r3, [r1, #72] - 2860 0018 002B cmp r3, #0 - 2861 001a 00D1 bne .LCB3287 - 2862 001c C8E1 b .L192 @long jump - 2863 .LCB3287: - 2864 001e CB6C ldr r3, [r1, #76] - 2865 0020 002B cmp r3, #0 - 2866 0022 00D1 bne .LCB3291 - 2867 0024 C8E1 b .L193 @long jump - 2868 .LCB3291: - 2869 0026 0B6D ldr r3, [r1, #80] - 2870 0028 002B cmp r3, #0 - 2871 002a 00D1 bne .LCB3295 - 2872 002c C8E1 b .L194 @long jump - 2873 .LCB3295: - 2874 .LVL327: - 2875 .LBE196: - 2876 .LBE195: - 2877 .LBB198: - 2878 .LBB199: - 983:Drivers/BME680/bme680.c **** uint8_t gas_range; - 2879 .loc 1 983 0 - 2880 002e 0F22 movs r2, #15 - 2881 0030 0021 movs r1, #0 - 2882 .LVL328: - 2883 0032 06A8 add r0, sp, #24 - 2884 .LVL329: - 2885 0034 FFF7FEFF bl memset - 2886 .LVL330: - 2887 .LBB200: - 2888 .LBB201: -1129:Drivers/BME680/bme680.c **** /* Device structure pointer is not valid */ - 2889 .loc 1 1129 0 - 2890 0038 002D cmp r5, #0 - 2891 003a 0ED0 beq .L195 - 2892 003c AB6C ldr r3, [r5, #72] - 2893 003e 002B cmp r3, #0 - 2894 0040 12D0 beq .L196 - 2895 0042 EB6C ldr r3, [r5, #76] - 2896 0044 002B cmp r3, #0 - 2897 0046 13D0 beq .L197 - 2898 0048 2B6D ldr r3, [r5, #80] - 2899 004a 002B cmp r3, #0 - 2900 004c 02D0 beq .L202 - 2901 .loc 1 1134 0 - 2902 004e 0023 movs r3, #0 - 2903 0050 0193 str r3, [sp, #4] - 2904 0052 05E0 b .L183 - 2905 .L202: -1131:Drivers/BME680/bme680.c **** } else { - 2906 .loc 1 1131 0 - 2907 0054 013B subs r3, r3, #1 - 2908 0056 0193 str r3, [sp, #4] - 2909 0058 02E0 b .L183 - ARM GAS /tmp/ccvbgJts.s page 77 - - - 2910 .L195: - 2911 005a 0123 movs r3, #1 - 2912 005c 5B42 rsbs r3, r3, #0 - 2913 005e 0193 str r3, [sp, #4] - 2914 .L183: - 2915 .loc 1 1134 0 - 2916 0060 0A24 movs r4, #10 - 2917 0062 019E ldr r6, [sp, #4] - 2918 0064 4F46 mov r7, r9 - 2919 0066 28E1 b .L188 - 2920 .L196: -1131:Drivers/BME680/bme680.c **** } else { - 2921 .loc 1 1131 0 - 2922 0068 0123 movs r3, #1 - 2923 006a 5B42 rsbs r3, r3, #0 - 2924 006c 0193 str r3, [sp, #4] - 2925 006e F7E7 b .L183 - 2926 .L197: - 2927 0070 0123 movs r3, #1 - 2928 0072 5B42 rsbs r3, r3, #0 - 2929 0074 0193 str r3, [sp, #4] - 2930 0076 F3E7 b .L183 - 2931 .LVL331: - 2932 .L204: - 2933 0078 0196 str r6, [sp, #4] - 2934 007a B946 mov r9, r7 - 2935 007c 029F ldr r7, [sp, #8] - 2936 .LVL332: - 2937 .LBE201: - 2938 .LBE200: - 2939 .LBB202: - 2940 .LBB203: - 819:Drivers/BME680/bme680.c **** var2 = (var1 * (int32_t) dev->calib.par_t2) >> 11; - 2941 .loc 1 819 0 - 2942 007e C010 asrs r0, r0, #3 - 2943 .LVL333: - 2944 0080 EB8A ldrh r3, [r5, #22] - 2945 0082 5B00 lsls r3, r3, #1 - 2946 0084 C01A subs r0, r0, r3 - 2947 0086 C117 asrs r1, r0, #31 - 2948 .LVL334: - 820:Drivers/BME680/bme680.c **** var3 = ((var1 >> 1) * (var1 >> 1)) >> 12; - 2949 .loc 1 820 0 - 2950 0088 1823 movs r3, #24 - 2951 008a EA5E ldrsh r2, [r5, r3] - 2952 008c D317 asrs r3, r2, #31 - 2953 008e 0290 str r0, [sp, #8] - 2954 .LVL335: - 2955 0090 0491 str r1, [sp, #16] - 2956 0092 FFF7FEFF bl __aeabi_lmul - 2957 .LVL336: - 2958 0096 4905 lsls r1, r1, #21 - 2959 0098 C60A lsrs r6, r0, #11 - 2960 .LVL337: - 2961 009a 0E43 orrs r6, r1 - 2962 .LVL338: - 821:Drivers/BME680/bme680.c **** var3 = ((var3) * ((int32_t) dev->calib.par_t3 << 4)) >> 14; - ARM GAS /tmp/ccvbgJts.s page 78 - - - 2963 .loc 1 821 0 - 2964 009c 0499 ldr r1, [sp, #16] - 2965 009e CB07 lsls r3, r1, #31 - 2966 00a0 0298 ldr r0, [sp, #8] - 2967 00a2 4008 lsrs r0, r0, #1 - 2968 00a4 1843 orrs r0, r3 - 2969 00a6 0200 movs r2, r0 - 2970 00a8 0B00 movs r3, r1 - 2971 00aa FFF7FEFF bl __aeabi_lmul - 2972 .LVL339: - 2973 00ae 0B05 lsls r3, r1, #20 - 2974 00b0 000B lsrs r0, r0, #12 - 2975 00b2 1843 orrs r0, r3 - 2976 00b4 0913 asrs r1, r1, #12 - 2977 .LVL340: - 822:Drivers/BME680/bme680.c **** dev->calib.t_fine = (int32_t) (var2 + var3); - 2978 .loc 1 822 0 - 2979 00b6 1A22 movs r2, #26 - 2980 00b8 AA56 ldrsb r2, [r5, r2] - 2981 00ba 1201 lsls r2, r2, #4 - 2982 00bc D317 asrs r3, r2, #31 - 2983 00be FFF7FEFF bl __aeabi_lmul - 2984 .LVL341: - 2985 00c2 8904 lsls r1, r1, #18 - 2986 00c4 800B lsrs r0, r0, #14 - 2987 00c6 0843 orrs r0, r1 - 823:Drivers/BME680/bme680.c **** calc_temp = (int16_t) (((dev->calib.t_fine * 5) + 128) >> 8); - 2988 .loc 1 823 0 - 2989 00c8 3018 adds r0, r6, r0 - 2990 00ca 2863 str r0, [r5, #48] - 824:Drivers/BME680/bme680.c **** - 2991 .loc 1 824 0 - 2992 00cc 8300 lsls r3, r0, #2 - 2993 00ce 1B18 adds r3, r3, r0 - 2994 00d0 8033 adds r3, r3, #128 - 2995 00d2 1B12 asrs r3, r3, #8 - 2996 .LVL342: - 2997 .LBE203: - 2998 .LBE202: -1015:Drivers/BME680/bme680.c **** data->pressure = calc_pressure(adc_pres, dev); - 2999 .loc 1 1015 0 - 3000 00d4 4A46 mov r2, r9 - 3001 00d6 9380 strh r3, [r2, #4] - 3002 .LVL343: - 3003 .LBB204: - 3004 .LBB205: - 840:Drivers/BME680/bme680.c **** var2 = ((((var1 >> 2) * (var1 >> 2)) >> 11) * - 3005 .loc 1 840 0 - 3006 00d8 2B6B ldr r3, [r5, #48] - 3007 00da 5A10 asrs r2, r3, #1 - 3008 00dc BA4B ldr r3, .L207 - 3009 00de 9C46 mov ip, r3 - 3010 00e0 6244 add r2, r2, ip - 3011 .LVL344: - 841:Drivers/BME680/bme680.c **** (int32_t)dev->calib.par_p6) >> 2; - 3012 .loc 1 841 0 - 3013 00e2 9110 asrs r1, r2, #2 - ARM GAS /tmp/ccvbgJts.s page 79 - - - 3014 00e4 4943 muls r1, r1 - 3015 00e6 C812 asrs r0, r1, #11 - 842:Drivers/BME680/bme680.c **** var2 = var2 + ((var1 * (int32_t)dev->calib.par_p5) << 1); - 3016 .loc 1 842 0 - 3017 00e8 2623 movs r3, #38 - 3018 00ea EB56 ldrsb r3, [r5, r3] - 841:Drivers/BME680/bme680.c **** (int32_t)dev->calib.par_p6) >> 2; - 3019 .loc 1 841 0 - 3020 00ec 4343 muls r3, r0 - 3021 00ee 9B10 asrs r3, r3, #2 - 3022 .LVL345: - 843:Drivers/BME680/bme680.c **** var2 = (var2 >> 2) + ((int32_t)dev->calib.par_p4 << 16); - 3023 .loc 1 843 0 - 3024 00f0 2426 movs r6, #36 - 3025 00f2 A85F ldrsh r0, [r5, r6] - 3026 00f4 5043 muls r0, r2 - 3027 00f6 4000 lsls r0, r0, #1 - 3028 00f8 1B18 adds r3, r3, r0 - 3029 .LVL346: - 844:Drivers/BME680/bme680.c **** var1 = (((((var1 >> 2) * (var1 >> 2)) >> 13) * - 3030 .loc 1 844 0 - 3031 00fa 9B10 asrs r3, r3, #2 - 3032 .LVL347: - 3033 00fc 2226 movs r6, #34 - 3034 00fe A85F ldrsh r0, [r5, r6] - 3035 .LVL348: - 3036 0100 0004 lsls r0, r0, #16 - 3037 0102 1B18 adds r3, r3, r0 - 3038 .LVL349: - 845:Drivers/BME680/bme680.c **** ((int32_t)dev->calib.par_p3 << 5)) >> 3) + - 3039 .loc 1 845 0 - 3040 0104 4813 asrs r0, r1, #13 - 846:Drivers/BME680/bme680.c **** (((int32_t)dev->calib.par_p2 * var1) >> 1); - 3041 .loc 1 846 0 - 3042 0106 2021 movs r1, #32 - 3043 0108 6956 ldrsb r1, [r5, r1] - 3044 010a 4901 lsls r1, r1, #5 - 845:Drivers/BME680/bme680.c **** ((int32_t)dev->calib.par_p3 << 5)) >> 3) + - 3045 .loc 1 845 0 - 3046 010c 4143 muls r1, r0 - 846:Drivers/BME680/bme680.c **** (((int32_t)dev->calib.par_p2 * var1) >> 1); - 3047 .loc 1 846 0 - 3048 010e C910 asrs r1, r1, #3 - 847:Drivers/BME680/bme680.c **** var1 = var1 >> 18; - 3049 .loc 1 847 0 - 3050 0110 1E26 movs r6, #30 - 3051 0112 A85F ldrsh r0, [r5, r6] - 3052 0114 4243 muls r2, r0 - 3053 .LVL350: - 3054 0116 5210 asrs r2, r2, #1 - 845:Drivers/BME680/bme680.c **** ((int32_t)dev->calib.par_p3 << 5)) >> 3) + - 3055 .loc 1 845 0 - 3056 0118 8918 adds r1, r1, r2 - 3057 .LVL351: - 848:Drivers/BME680/bme680.c **** var1 = ((32768 + var1) * (int32_t)dev->calib.par_p1) >> 15; - 3058 .loc 1 848 0 - 3059 011a 8914 asrs r1, r1, #18 - ARM GAS /tmp/ccvbgJts.s page 80 - - - 3060 .LVL352: - 849:Drivers/BME680/bme680.c **** pressure_comp = 1048576 - pres_adc; - 3061 .loc 1 849 0 - 3062 011c 8022 movs r2, #128 - 3063 011e 1202 lsls r2, r2, #8 - 3064 0120 9446 mov ip, r2 - 3065 0122 6144 add r1, r1, ip - 3066 .LVL353: - 3067 0124 AA8B ldrh r2, [r5, #28] - 3068 0126 5143 muls r1, r2 - 3069 .LVL354: - 3070 0128 C913 asrs r1, r1, #15 - 3071 .LVL355: - 850:Drivers/BME680/bme680.c **** pressure_comp = (int32_t)((pressure_comp - (var2 >> 12)) * ((uint32_t)3125)); - 3072 .loc 1 850 0 - 3073 012a 8020 movs r0, #128 - 3074 012c 4003 lsls r0, r0, #13 - 3075 012e C01B subs r0, r0, r7 - 3076 .LVL356: - 851:Drivers/BME680/bme680.c **** var4 = (1 << 31); - 3077 .loc 1 851 0 - 3078 0130 1B13 asrs r3, r3, #12 - 3079 .LVL357: - 3080 0132 C01A subs r0, r0, r3 - 3081 .LVL358: - 3082 0134 A54B ldr r3, .L207+4 - 3083 0136 5843 muls r0, r3 - 3084 .LVL359: - 854:Drivers/BME680/bme680.c **** else - 3085 .loc 1 854 0 - 3086 0138 FFF7FEFF bl __aeabi_uidiv - 3087 .LVL360: - 3088 013c 4000 lsls r0, r0, #1 - 3089 .LVL361: - 857:Drivers/BME680/bme680.c **** (pressure_comp >> 3)) >> 13)) >> 12; - 3090 .loc 1 857 0 - 3091 013e 2A23 movs r3, #42 - 3092 0140 E95E ldrsh r1, [r5, r3] - 3093 0142 C210 asrs r2, r0, #3 - 3094 0144 5243 muls r2, r2 - 858:Drivers/BME680/bme680.c **** var2 = ((int32_t)(pressure_comp >> 2) * - 3095 .loc 1 858 0 - 3096 0146 5313 asrs r3, r2, #13 - 857:Drivers/BME680/bme680.c **** (pressure_comp >> 3)) >> 13)) >> 12; - 3097 .loc 1 857 0 - 3098 0148 4B43 muls r3, r1 - 3099 014a 1A13 asrs r2, r3, #12 - 3100 .LVL362: - 859:Drivers/BME680/bme680.c **** (int32_t)dev->calib.par_p8) >> 13; - 3101 .loc 1 859 0 - 3102 014c 8310 asrs r3, r0, #2 - 860:Drivers/BME680/bme680.c **** var3 = ((int32_t)(pressure_comp >> 8) * (int32_t)(pressure_comp >> 8) * - 3103 .loc 1 860 0 - 3104 014e 2826 movs r6, #40 - 3105 0150 A95F ldrsh r1, [r5, r6] - 859:Drivers/BME680/bme680.c **** (int32_t)dev->calib.par_p8) >> 13; - 3106 .loc 1 859 0 - ARM GAS /tmp/ccvbgJts.s page 81 - - - 3107 0152 5943 muls r1, r3 - 3108 0154 4913 asrs r1, r1, #13 - 3109 .LVL363: - 861:Drivers/BME680/bme680.c **** (int32_t)(pressure_comp >> 8) * - 3110 .loc 1 861 0 - 3111 0156 0612 asrs r6, r0, #8 - 3112 0158 3300 movs r3, r6 - 3113 015a 7343 muls r3, r6 - 3114 015c 5E43 muls r6, r3 - 863:Drivers/BME680/bme680.c **** - 3115 .loc 1 863 0 - 3116 015e 2C23 movs r3, #44 - 3117 0160 EB5C ldrb r3, [r5, r3] - 862:Drivers/BME680/bme680.c **** (int32_t)dev->calib.par_p10) >> 17; - 3118 .loc 1 862 0 - 3119 0162 7343 muls r3, r6 - 861:Drivers/BME680/bme680.c **** (int32_t)(pressure_comp >> 8) * - 3120 .loc 1 861 0 - 3121 0164 5B14 asrs r3, r3, #17 - 3122 .LVL364: - 865:Drivers/BME680/bme680.c **** ((int32_t)dev->calib.par_p7 << 7)) >> 4); - 3123 .loc 1 865 0 - 3124 0166 5118 adds r1, r2, r1 - 3125 .LVL365: - 3126 0168 5B18 adds r3, r3, r1 - 3127 .LVL366: - 866:Drivers/BME680/bme680.c **** - 3128 .loc 1 866 0 - 3129 016a 2722 movs r2, #39 - 3130 .LVL367: - 3131 016c AA56 ldrsb r2, [r5, r2] - 3132 016e D201 lsls r2, r2, #7 - 865:Drivers/BME680/bme680.c **** ((int32_t)dev->calib.par_p7 << 7)) >> 4); - 3133 .loc 1 865 0 - 3134 0170 9B18 adds r3, r3, r2 - 866:Drivers/BME680/bme680.c **** - 3135 .loc 1 866 0 - 3136 0172 1B11 asrs r3, r3, #4 - 865:Drivers/BME680/bme680.c **** ((int32_t)dev->calib.par_p7 << 7)) >> 4); - 3137 .loc 1 865 0 - 3138 0174 C018 adds r0, r0, r3 - 3139 .LVL368: - 3140 .LBE205: - 3141 .LBE204: -1016:Drivers/BME680/bme680.c **** data->humidity = calc_humidity(adc_hum, dev); - 3142 .loc 1 1016 0 - 3143 0176 4B46 mov r3, r9 - 3144 0178 9860 str r0, [r3, #8] - 3145 .LVL369: - 3146 .LBB206: - 3147 .LBB207: - 886:Drivers/BME680/bme680.c **** var1 = (int32_t) (hum_adc - ((int32_t) ((int32_t) dev->calib.par_h1 * 16))) - 3148 .loc 1 886 0 - 3149 017a 2B6B ldr r3, [r5, #48] - 3150 017c 9E00 lsls r6, r3, #2 - 3151 017e F618 adds r6, r6, r3 - 3152 0180 8036 adds r6, r6, #128 - ARM GAS /tmp/ccvbgJts.s page 82 - - - 3153 0182 3612 asrs r6, r6, #8 - 3154 .LVL370: - 887:Drivers/BME680/bme680.c **** - (((temp_scaled * (int32_t) dev->calib.par_h3) / ((int32_t) 100)) >> 1); - 3155 .loc 1 887 0 - 3156 0184 2F89 ldrh r7, [r5, #8] - 3157 0186 3F01 lsls r7, r7, #4 - 3158 0188 5B46 mov r3, fp - 3159 018a DF1B subs r7, r3, r7 - 888:Drivers/BME680/bme680.c **** var2 = ((int32_t) dev->calib.par_h2 - 3160 .loc 1 888 0 - 3161 018c 0C20 movs r0, #12 - 3162 018e 2856 ldrsb r0, [r5, r0] - 3163 0190 7043 muls r0, r6 - 3164 0192 6421 movs r1, #100 - 3165 0194 FFF7FEFF bl __aeabi_idiv - 3166 .LVL371: - 3167 0198 4010 asrs r0, r0, #1 - 887:Drivers/BME680/bme680.c **** - (((temp_scaled * (int32_t) dev->calib.par_h3) / ((int32_t) 100)) >> 1); - 3168 .loc 1 887 0 - 3169 019a 3B1A subs r3, r7, r0 - 3170 019c 0293 str r3, [sp, #8] - 3171 .LVL372: - 889:Drivers/BME680/bme680.c **** * (((temp_scaled * (int32_t) dev->calib.par_h4) / ((int32_t) 100)) - 3172 .loc 1 889 0 - 3173 019e 6A89 ldrh r2, [r5, #10] - 3174 01a0 9346 mov fp, r2 - 3175 .LVL373: - 890:Drivers/BME680/bme680.c **** + (((temp_scaled * ((temp_scaled * (int32_t) dev->calib.par_h5) / ((int32_t) 100))) >> 6) - 3176 .loc 1 890 0 - 3177 01a2 0D20 movs r0, #13 - 3178 01a4 2856 ldrsb r0, [r5, r0] - 3179 01a6 7043 muls r0, r6 - 3180 01a8 6421 movs r1, #100 - 3181 01aa FFF7FEFF bl __aeabi_idiv - 3182 .LVL374: - 3183 01ae 0700 movs r7, r0 - 891:Drivers/BME680/bme680.c **** / ((int32_t) 100)) + (int32_t) (1 << 14))) >> 10; - 3184 .loc 1 891 0 - 3185 01b0 0E20 movs r0, #14 - 3186 01b2 2856 ldrsb r0, [r5, r0] - 3187 01b4 7043 muls r0, r6 - 3188 01b6 6421 movs r1, #100 - 3189 01b8 FFF7FEFF bl __aeabi_idiv - 3190 .LVL375: - 3191 01bc 7043 muls r0, r6 - 3192 01be 8011 asrs r0, r0, #6 - 892:Drivers/BME680/bme680.c **** var3 = var1 * var2; - 3193 .loc 1 892 0 - 3194 01c0 6421 movs r1, #100 - 3195 01c2 FFF7FEFF bl __aeabi_idiv - 3196 .LVL376: - 891:Drivers/BME680/bme680.c **** / ((int32_t) 100)) + (int32_t) (1 << 14))) >> 10; - 3197 .loc 1 891 0 - 3198 01c6 3F18 adds r7, r7, r0 - 892:Drivers/BME680/bme680.c **** var3 = var1 * var2; - 3199 .loc 1 892 0 - 3200 01c8 8022 movs r2, #128 - ARM GAS /tmp/ccvbgJts.s page 83 - - - 3201 01ca D201 lsls r2, r2, #7 - 3202 01cc 9446 mov ip, r2 - 3203 01ce 6744 add r7, r7, ip - 890:Drivers/BME680/bme680.c **** + (((temp_scaled * ((temp_scaled * (int32_t) dev->calib.par_h5) / ((int32_t) 100))) >> 6) - 3204 .loc 1 890 0 - 3205 01d0 5A46 mov r2, fp - 3206 01d2 5743 muls r7, r2 - 889:Drivers/BME680/bme680.c **** * (((temp_scaled * (int32_t) dev->calib.par_h4) / ((int32_t) 100)) - 3207 .loc 1 889 0 - 3208 01d4 BF12 asrs r7, r7, #10 - 3209 .LVL377: - 893:Drivers/BME680/bme680.c **** var4 = (int32_t) dev->calib.par_h6 << 7; - 3210 .loc 1 893 0 - 3211 01d6 029B ldr r3, [sp, #8] - 3212 01d8 5F43 muls r7, r3 - 3213 .LVL378: - 894:Drivers/BME680/bme680.c **** var4 = ((var4) + ((temp_scaled * (int32_t) dev->calib.par_h7) / ((int32_t) 100))) >> 4; - 3214 .loc 1 894 0 - 3215 01da E87B ldrb r0, [r5, #15] - 3216 01dc C301 lsls r3, r0, #7 - 3217 01de 9B46 mov fp, r3 - 3218 .LVL379: - 895:Drivers/BME680/bme680.c **** var5 = ((var3 >> 14) * (var3 >> 14)) >> 10; - 3219 .loc 1 895 0 - 3220 01e0 1020 movs r0, #16 - 3221 01e2 2856 ldrsb r0, [r5, r0] - 3222 01e4 7043 muls r0, r6 - 3223 01e6 6421 movs r1, #100 - 3224 01e8 FFF7FEFF bl __aeabi_idiv - 3225 .LVL380: - 3226 01ec 5844 add r0, r0, fp - 3227 01ee 0011 asrs r0, r0, #4 - 3228 .LVL381: - 896:Drivers/BME680/bme680.c **** var6 = (var4 * var5) >> 1; - 3229 .loc 1 896 0 - 3230 01f0 BB13 asrs r3, r7, #14 - 3231 01f2 5B43 muls r3, r3 - 3232 01f4 9B12 asrs r3, r3, #10 - 3233 .LVL382: - 897:Drivers/BME680/bme680.c **** calc_hum = (((var3 + var6) >> 10) * ((int32_t) 1000)) >> 12; - 3234 .loc 1 897 0 - 3235 01f6 4343 muls r3, r0 - 3236 .LVL383: - 3237 01f8 5B10 asrs r3, r3, #1 - 3238 .LVL384: - 898:Drivers/BME680/bme680.c **** - 3239 .loc 1 898 0 - 3240 01fa FF18 adds r7, r7, r3 - 3241 .LVL385: - 3242 01fc BF12 asrs r7, r7, #10 - 3243 01fe 7B01 lsls r3, r7, #5 - 3244 .LVL386: - 3245 0200 DB1B subs r3, r3, r7 - 3246 0202 9B00 lsls r3, r3, #2 - 3247 0204 DB19 adds r3, r3, r7 - 3248 0206 DB00 lsls r3, r3, #3 - 3249 0208 1B13 asrs r3, r3, #12 - ARM GAS /tmp/ccvbgJts.s page 84 - - - 3250 .LVL387: - 900:Drivers/BME680/bme680.c **** calc_hum = 100000; - 3251 .loc 1 900 0 - 3252 020a 714A ldr r2, .L207+8 - 3253 020c 9342 cmp r3, r2 - 3254 020e 03DC bgt .L199 - 902:Drivers/BME680/bme680.c **** calc_hum = 0; - 3255 .loc 1 902 0 - 3256 0210 002B cmp r3, #0 - 3257 0212 02DA bge .L186 - 903:Drivers/BME680/bme680.c **** - 3258 .loc 1 903 0 - 3259 0214 0023 movs r3, #0 - 3260 .LVL388: - 3261 0216 00E0 b .L186 - 3262 .LVL389: - 3263 .L199: - 901:Drivers/BME680/bme680.c **** else if (calc_hum < 0) - 3264 .loc 1 901 0 - 3265 0218 6D4B ldr r3, .L207+8 - 3266 .LVL390: - 3267 .L186: - 3268 .LBE207: - 3269 .LBE206: -1017:Drivers/BME680/bme680.c **** data->gas_resistance = calc_gas_resistance(adc_gas_res, gas_range, dev); - 3270 .loc 1 1017 0 - 3271 021a 4A46 mov r2, r9 - 3272 021c D360 str r3, [r2, #12] - 3273 .LVL391: - 3274 .LBB208: - 3275 .LBB209: - 918:Drivers/BME680/bme680.c **** ((int64_t) lookupTable1[gas_range])) >> 16; - 3276 .loc 1 918 0 - 3277 021e 3623 movs r3, #54 - 3278 0220 EE56 ldrsb r6, [r5, r3] - 3279 0222 3000 movs r0, r6 - 3280 0224 F617 asrs r6, r6, #31 - 3281 0226 3100 movs r1, r6 - 3282 0228 870F lsrs r7, r0, #30 - 3283 022a B300 lsls r3, r6, #2 - 3284 022c 3B43 orrs r3, r7 - 3285 022e 8200 lsls r2, r0, #2 - 3286 0230 1218 adds r2, r2, r0 - 3287 0232 4B41 adcs r3, r3, r1 - 3288 0234 6748 ldr r0, .L207+12 - 3289 0236 0021 movs r1, #0 - 3290 0238 8018 adds r0, r0, r2 - 3291 023a 5941 adcs r1, r1, r3 - 919:Drivers/BME680/bme680.c **** var2 = (((int64_t) ((int64_t) gas_res_adc << 15) - (int64_t) (16777216)) + var1); - 3292 .loc 1 919 0 - 3293 023c 5346 mov r3, r10 - 3294 023e 9B00 lsls r3, r3, #2 - 3295 0240 9A46 mov r10, r3 - 3296 .LVL392: - 3297 0242 654B ldr r3, .L207+16 - 3298 0244 5246 mov r2, r10 - 3299 0246 D258 ldr r2, [r2, r3] - ARM GAS /tmp/ccvbgJts.s page 85 - - - 918:Drivers/BME680/bme680.c **** ((int64_t) lookupTable1[gas_range])) >> 16; - 3300 .loc 1 918 0 - 3301 0248 0023 movs r3, #0 - 3302 024a FFF7FEFF bl __aeabi_lmul - 3303 .LVL393: - 3304 024e 0B04 lsls r3, r1, #16 - 3305 0250 060C lsrs r6, r0, #16 - 3306 0252 1E43 orrs r6, r3 - 3307 0254 0F14 asrs r7, r1, #16 - 3308 .LVL394: - 920:Drivers/BME680/bme680.c **** var3 = (((int64_t) lookupTable2[gas_range] * (int64_t) var1) >> 9); - 3309 .loc 1 920 0 - 3310 0256 0021 movs r1, #0 - 3311 0258 4346 mov r3, r8 - 3312 025a D803 lsls r0, r3, #15 - 3313 025c FF22 movs r2, #255 - 3314 025e 1206 lsls r2, r2, #24 - 3315 0260 0123 movs r3, #1 - 3316 0262 5B42 rsbs r3, r3, #0 - 3317 0264 1218 adds r2, r2, r0 - 3318 0266 4B41 adcs r3, r3, r1 - 3319 0268 9219 adds r2, r2, r6 - 3320 026a 7B41 adcs r3, r3, r7 - 3321 026c 0492 str r2, [sp, #16] - 3322 026e 0593 str r3, [sp, #20] - 3323 .LVL395: - 921:Drivers/BME680/bme680.c **** calc_gas_res = (uint32_t) ((var3 + ((int64_t) var2 >> 1)) / (int64_t) var2); - 3324 .loc 1 921 0 - 3325 0270 5A4B ldr r3, .L207+20 - 3326 0272 5146 mov r1, r10 - 3327 0274 CA58 ldr r2, [r1, r3] - 3328 .LVL396: - 3329 0276 0023 movs r3, #0 - 3330 0278 3000 movs r0, r6 - 3331 027a 3900 movs r1, r7 - 3332 027c FFF7FEFF bl __aeabi_lmul - 3333 .LVL397: - 3334 0280 CE05 lsls r6, r1, #23 - 3335 .LVL398: - 3336 0282 430A lsrs r3, r0, #9 - 3337 0284 3343 orrs r3, r6 - 3338 0286 0293 str r3, [sp, #8] - 3339 0288 4B12 asrs r3, r1, #9 - 3340 028a 0393 str r3, [sp, #12] - 3341 .LVL399: - 922:Drivers/BME680/bme680.c **** - 3342 .loc 1 922 0 - 3343 028c 049A ldr r2, [sp, #16] - 3344 028e 059B ldr r3, [sp, #20] - 3345 0290 DE07 lsls r6, r3, #31 - 3346 0292 5008 lsrs r0, r2, #1 - 3347 0294 3043 orrs r0, r6 - 3348 0296 1600 movs r6, r2 - 3349 0298 1F00 movs r7, r3 - 3350 029a 5910 asrs r1, r3, #1 - 3351 029c 029A ldr r2, [sp, #8] - 3352 029e 039B ldr r3, [sp, #12] - ARM GAS /tmp/ccvbgJts.s page 86 - - - 3353 02a0 8018 adds r0, r0, r2 - 3354 02a2 5941 adcs r1, r1, r3 - 3355 02a4 3200 movs r2, r6 - 3356 02a6 3B00 movs r3, r7 - 3357 02a8 FFF7FEFF bl __aeabi_ldivmod - 3358 .LVL400: - 3359 .LBE209: - 3360 .LBE208: -1018:Drivers/BME680/bme680.c **** break; - 3361 .loc 1 1018 0 - 3362 02ac 4B46 mov r3, r9 - 3363 02ae 1861 str r0, [r3, #16] - 3364 02b0 5EE0 b .L187 - 3365 .LVL401: - 3366 .L184: -1024:Drivers/BME680/bme680.c **** } while (tries); - 3367 .loc 1 1024 0 - 3368 02b2 013C subs r4, r4, #1 - 3369 .LVL402: - 3370 02b4 E4B2 uxtb r4, r4 - 3371 .LVL403: -1025:Drivers/BME680/bme680.c **** - 3372 .loc 1 1025 0 - 3373 02b6 002C cmp r4, #0 - 3374 02b8 58D0 beq .L203 - 3375 .LVL404: - 3376 .L188: - 994:Drivers/BME680/bme680.c **** rslt = bme680_get_regs(((uint8_t) (BME680_FIELD0_ADDR)), buff, (uint16_t) BME680_FIELD_LENGTH, - 3377 .loc 1 994 0 - 3378 02ba 002E cmp r6, #0 - 3379 02bc F9D1 bne .L184 - 995:Drivers/BME680/bme680.c **** dev); - 3380 .loc 1 995 0 - 3381 02be 2B00 movs r3, r5 - 3382 02c0 0F22 movs r2, #15 - 3383 02c2 06A9 add r1, sp, #24 - 3384 02c4 1D20 movs r0, #29 - 3385 02c6 FFF7FEFF bl bme680_get_regs - 3386 .LVL405: - 3387 02ca 0600 movs r6, r0 - 3388 .LVL406: - 998:Drivers/BME680/bme680.c **** data->gas_index = buff[0] & BME680_GAS_INDEX_MSK; - 3389 .loc 1 998 0 - 3390 02cc 06AB add r3, sp, #24 - 3391 02ce 1B78 ldrb r3, [r3] - 3392 02d0 7F22 movs r2, #127 - 3393 02d2 1900 movs r1, r3 - 3394 02d4 9143 bics r1, r2 - 3395 02d6 8C46 mov ip, r1 - 999:Drivers/BME680/bme680.c **** data->meas_index = buff[1]; - 3396 .loc 1 999 0 - 3397 02d8 703A subs r2, r2, #112 - 3398 02da 9246 mov r10, r2 - 3399 02dc 1340 ands r3, r2 - 3400 02de 7B70 strb r3, [r7, #1] -1000:Drivers/BME680/bme680.c **** - 3401 .loc 1 1000 0 - ARM GAS /tmp/ccvbgJts.s page 87 - - - 3402 02e0 06AB add r3, sp, #24 - 3403 02e2 5B78 ldrb r3, [r3, #1] - 3404 02e4 BB70 strb r3, [r7, #2] -1003:Drivers/BME680/bme680.c **** | ((uint32_t) buff[4] / 16)); - 3405 .loc 1 1003 0 - 3406 02e6 06AB add r3, sp, #24 - 3407 02e8 9A78 ldrb r2, [r3, #2] - 3408 02ea 1203 lsls r2, r2, #12 - 3409 02ec DB78 ldrb r3, [r3, #3] - 3410 02ee 1B01 lsls r3, r3, #4 - 3411 02f0 1A43 orrs r2, r3 -1004:Drivers/BME680/bme680.c **** adc_temp = (uint32_t) (((uint32_t) buff[5] * 4096) | ((uint32_t) buff[6] * 16) - 3412 .loc 1 1004 0 - 3413 02f2 06AB add r3, sp, #24 - 3414 02f4 1B79 ldrb r3, [r3, #4] - 3415 02f6 1B09 lsrs r3, r3, #4 -1003:Drivers/BME680/bme680.c **** | ((uint32_t) buff[4] / 16)); - 3416 .loc 1 1003 0 - 3417 02f8 1A43 orrs r2, r3 - 3418 02fa 0292 str r2, [sp, #8] - 3419 .LVL407: -1005:Drivers/BME680/bme680.c **** | ((uint32_t) buff[7] / 16)); - 3420 .loc 1 1005 0 - 3421 02fc 06AB add r3, sp, #24 - 3422 02fe 5879 ldrb r0, [r3, #5] - 3423 .LVL408: - 3424 0300 0003 lsls r0, r0, #12 - 3425 0302 9B79 ldrb r3, [r3, #6] - 3426 0304 1B01 lsls r3, r3, #4 - 3427 0306 1843 orrs r0, r3 -1006:Drivers/BME680/bme680.c **** adc_hum = (uint16_t) (((uint32_t) buff[8] * 256) | (uint32_t) buff[9]); - 3428 .loc 1 1006 0 - 3429 0308 06AB add r3, sp, #24 - 3430 030a DB79 ldrb r3, [r3, #7] - 3431 030c 1B09 lsrs r3, r3, #4 -1005:Drivers/BME680/bme680.c **** | ((uint32_t) buff[7] / 16)); - 3432 .loc 1 1005 0 - 3433 030e 1843 orrs r0, r3 - 3434 .LVL409: -1007:Drivers/BME680/bme680.c **** adc_gas_res = (uint16_t) ((uint32_t) buff[13] * 4 | (((uint32_t) buff[14]) / 64)); - 3435 .loc 1 1007 0 - 3436 0310 06AB add r3, sp, #24 - 3437 0312 197A ldrb r1, [r3, #8] - 3438 0314 0902 lsls r1, r1, #8 - 3439 0316 5B7A ldrb r3, [r3, #9] - 3440 0318 1943 orrs r1, r3 - 3441 031a 8B46 mov fp, r1 - 3442 .LVL410: -1008:Drivers/BME680/bme680.c **** gas_range = buff[14] & BME680_GAS_RANGE_MSK; - 3443 .loc 1 1008 0 - 3444 031c 06AB add r3, sp, #24 - 3445 031e 5B7B ldrb r3, [r3, #13] - 3446 0320 9B00 lsls r3, r3, #2 - 3447 0322 9846 mov r8, r3 - 3448 0324 06AB add r3, sp, #24 - 3449 0326 9B7B ldrb r3, [r3, #14] - 3450 0328 9A09 lsrs r2, r3, #6 - ARM GAS /tmp/ccvbgJts.s page 88 - - - 3451 .LVL411: - 3452 032a 9146 mov r9, r2 - 3453 032c 4246 mov r2, r8 - 3454 032e 4946 mov r1, r9 - 3455 0330 0A43 orrs r2, r1 - 3456 0332 9046 mov r8, r2 - 3457 .LVL412: -1009:Drivers/BME680/bme680.c **** - 3458 .loc 1 1009 0 - 3459 0334 5246 mov r2, r10 - 3460 0336 1A40 ands r2, r3 - 3461 0338 9246 mov r10, r2 - 3462 .LVL413: -1011:Drivers/BME680/bme680.c **** data->status |= buff[14] & BME680_HEAT_STAB_MSK; - 3463 .loc 1 1011 0 - 3464 033a 5BB2 sxtb r3, r3 - 3465 033c 9946 mov r9, r3 - 3466 033e 2023 movs r3, #32 - 3467 0340 4A46 mov r2, r9 - 3468 0342 1340 ands r3, r2 - 3469 0344 6246 mov r2, ip - 3470 0346 1343 orrs r3, r2 - 3471 0348 5BB2 sxtb r3, r3 -1012:Drivers/BME680/bme680.c **** - 3472 .loc 1 1012 0 - 3473 034a 06AA add r2, sp, #24 - 3474 034c 927B ldrb r2, [r2, #14] - 3475 034e 52B2 sxtb r2, r2 - 3476 0350 9146 mov r9, r2 - 3477 0352 1022 movs r2, #16 - 3478 0354 9446 mov ip, r2 - 3479 0356 4A46 mov r2, r9 - 3480 0358 6146 mov r1, ip - 3481 035a 0A40 ands r2, r1 - 3482 035c 1343 orrs r3, r2 - 3483 035e 3B70 strb r3, [r7] -1014:Drivers/BME680/bme680.c **** data->temperature = calc_temperature(adc_temp, dev); - 3484 .loc 1 1014 0 - 3485 0360 00D5 bpl .LCB3947 - 3486 0362 89E6 b .L204 @long jump - 3487 .LCB3947: -1022:Drivers/BME680/bme680.c **** } - 3488 .loc 1 1022 0 - 3489 0364 0A20 movs r0, #10 - 3490 .LVL414: - 3491 0366 2B6D ldr r3, [r5, #80] - 3492 0368 9847 blx r3 - 3493 .LVL415: - 3494 036a A2E7 b .L184 - 3495 .LVL416: - 3496 .L203: - 3497 036c 0196 str r6, [sp, #4] - 3498 036e B946 mov r9, r7 - 3499 .LVL417: - 3500 .L187: -1027:Drivers/BME680/bme680.c **** rslt = BME680_W_NO_NEW_DATA; - 3501 .loc 1 1027 0 - ARM GAS /tmp/ccvbgJts.s page 89 - - - 3502 0370 002C cmp r4, #0 - 3503 0372 12D0 beq .L205 - 3504 .LVL418: - 3505 .L189: - 3506 .LBE199: - 3507 .LBE198: - 651:Drivers/BME680/bme680.c **** if (data->status & BME680_NEW_DATA_MSK) - 3508 .loc 1 651 0 - 3509 0374 019B ldr r3, [sp, #4] - 3510 0376 002B cmp r3, #0 - 3511 0378 07D1 bne .L182 - 652:Drivers/BME680/bme680.c **** dev->new_fields = 1; - 3512 .loc 1 652 0 - 3513 037a 4B46 mov r3, r9 - 3514 037c 1B78 ldrb r3, [r3] - 3515 037e 5BB2 sxtb r3, r3 - 3516 0380 002B cmp r3, #0 - 3517 0382 0DDB blt .L206 - 655:Drivers/BME680/bme680.c **** } - 3518 .loc 1 655 0 - 3519 0384 4523 movs r3, #69 - 3520 0386 0022 movs r2, #0 - 3521 0388 EA54 strb r2, [r5, r3] - 3522 .LVL419: - 3523 .L182: - 660:Drivers/BME680/bme680.c **** - 3524 .loc 1 660 0 - 3525 038a 0198 ldr r0, [sp, #4] - 3526 038c 0BB0 add sp, sp, #44 - 3527 @ sp needed - 3528 .LVL420: - 3529 .LVL421: - 3530 038e 3CBC pop {r2, r3, r4, r5} - 3531 0390 9046 mov r8, r2 - 3532 0392 9946 mov r9, r3 - 3533 0394 A246 mov r10, r4 - 3534 0396 AB46 mov fp, r5 - 3535 0398 F0BD pop {r4, r5, r6, r7, pc} - 3536 .LVL422: - 3537 .L205: - 3538 .LBB211: - 3539 .LBB210: -1028:Drivers/BME680/bme680.c **** - 3540 .loc 1 1028 0 - 3541 039a 0223 movs r3, #2 - 3542 039c 0193 str r3, [sp, #4] - 3543 .LVL423: - 3544 039e E9E7 b .L189 - 3545 .LVL424: - 3546 .L206: - 3547 .LBE210: - 3548 .LBE211: - 653:Drivers/BME680/bme680.c **** else - 3549 .loc 1 653 0 - 3550 03a0 4523 movs r3, #69 - 3551 03a2 0122 movs r2, #1 - 3552 03a4 EA54 strb r2, [r5, r3] - ARM GAS /tmp/ccvbgJts.s page 90 - - - 3553 03a6 F0E7 b .L182 - 3554 .LVL425: - 3555 .L191: - 3556 .LBB212: - 3557 .LBB197: -1131:Drivers/BME680/bme680.c **** } else { - 3558 .loc 1 1131 0 - 3559 03a8 0123 movs r3, #1 - 3560 03aa 5B42 rsbs r3, r3, #0 - 3561 03ac 0193 str r3, [sp, #4] - 3562 03ae ECE7 b .L182 - 3563 .L192: - 3564 03b0 0123 movs r3, #1 - 3565 03b2 5B42 rsbs r3, r3, #0 - 3566 03b4 0193 str r3, [sp, #4] - 3567 03b6 E8E7 b .L182 - 3568 .L193: - 3569 03b8 0123 movs r3, #1 - 3570 03ba 5B42 rsbs r3, r3, #0 - 3571 03bc 0193 str r3, [sp, #4] - 3572 03be E4E7 b .L182 - 3573 .L194: - 3574 03c0 0123 movs r3, #1 - 3575 03c2 5B42 rsbs r3, r3, #0 - 3576 03c4 0193 str r3, [sp, #4] - 3577 03c6 E0E7 b .L182 - 3578 .L208: - 3579 .align 2 - 3580 .L207: - 3581 03c8 0006FFFF .word -64000 - 3582 03cc 350C0000 .word 3125 - 3583 03d0 A0860100 .word 100000 - 3584 03d4 3C050000 .word 1340 - 3585 03d8 00000000 .word .LANCHOR0 - 3586 03dc 00000000 .word .LANCHOR1 - 3587 .LBE197: - 3588 .LBE212: - 3589 .cfi_endproc - 3590 .LFE10: - 3592 .global lookupTable2 - 3593 .global lookupTable1 - 3594 .section .data.lookupTable1,"aw",%progbits - 3595 .align 2 - 3596 .set .LANCHOR0,. + 0 - 3599 lookupTable1: - 3600 0000 FFFFFF7F .word 2147483647 - 3601 0004 FFFFFF7F .word 2147483647 - 3602 0008 FFFFFF7F .word 2147483647 - 3603 000c FFFFFF7F .word 2147483647 - 3604 0010 FFFFFF7F .word 2147483647 - 3605 0014 EA51B87E .word 2126008810 - 3606 0018 FFFFFF7F .word 2147483647 - 3607 001c 21DBF97E .word 2130303777 - 3608 0020 FFFFFF7F .word 2147483647 - 3609 0024 FFFFFF7F .word 2147483647 - 3610 0028 C776BE7F .word 2143188679 - 3611 002c F4285C7F .word 2136746228 - ARM GAS /tmp/ccvbgJts.s page 91 - - - 3612 0030 FFFFFF7F .word 2147483647 - 3613 0034 EA51B87E .word 2126008810 - 3614 0038 FFFFFF7F .word 2147483647 - 3615 003c FFFFFF7F .word 2147483647 - 3616 .section .data.lookupTable2,"aw",%progbits - 3617 .align 2 - 3618 .set .LANCHOR1,. + 0 - 3621 lookupTable2: - 3622 0000 000024F4 .word -198967296 - 3623 0004 0000127A .word 2048000000 - 3624 0008 0000093D .word 1024000000 - 3625 000c 0080841E .word 512000000 - 3626 0010 FF583E0F .word 255744255 - 3627 0014 548C9307 .word 127110228 - 3628 0018 0090D003 .word 64000000 - 3629 001c 1038EC01 .word 32258064 - 3630 0020 9062F400 .word 16016016 - 3631 0024 00127A00 .word 8000000 - 3632 0028 00093D00 .word 4000000 - 3633 002c 80841E00 .word 2000000 - 3634 0030 40420F00 .word 1000000 - 3635 0034 20A10700 .word 500000 - 3636 0038 90D00300 .word 250000 - 3637 003c 48E80100 .word 125000 - 3638 .text - 3639 .Letext0: - 3640 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 3641 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 3642 .file 4 "Drivers/BME680/bme680_defs.h" - 3643 .file 5 "" - ARM GAS /tmp/ccvbgJts.s page 92 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 bme680.c - /tmp/ccvbgJts.s:16 .text.set_mem_page:0000000000000000 $t - /tmp/ccvbgJts.s:22 .text.set_mem_page:0000000000000000 set_mem_page - /tmp/ccvbgJts.s:176 .text.get_mem_page:0000000000000000 $t - /tmp/ccvbgJts.s:182 .text.get_mem_page:0000000000000000 get_mem_page - /tmp/ccvbgJts.s:282 .text.bme680_get_regs:0000000000000000 $t - /tmp/ccvbgJts.s:289 .text.bme680_get_regs:0000000000000000 bme680_get_regs - /tmp/ccvbgJts.s:416 .text.bme680_set_regs:0000000000000000 $t - /tmp/ccvbgJts.s:423 .text.bme680_set_regs:0000000000000000 bme680_set_regs - /tmp/ccvbgJts.s:618 .text.bme680_soft_reset:0000000000000000 $t - /tmp/ccvbgJts.s:625 .text.bme680_soft_reset:0000000000000000 bme680_soft_reset - /tmp/ccvbgJts.s:759 .text.bme680_init:0000000000000000 $t - /tmp/ccvbgJts.s:766 .text.bme680_init:0000000000000000 bme680_init - /tmp/ccvbgJts.s:1155 .text.bme680_get_sensor_settings:0000000000000000 $t - /tmp/ccvbgJts.s:1162 .text.bme680_get_sensor_settings:0000000000000000 bme680_get_sensor_settings - /tmp/ccvbgJts.s:1470 .text.bme680_set_sensor_mode:0000000000000000 $t - /tmp/ccvbgJts.s:1477 .text.bme680_set_sensor_mode:0000000000000000 bme680_set_sensor_mode - /tmp/ccvbgJts.s:1642 .text.bme680_set_sensor_settings:0000000000000000 $t - /tmp/ccvbgJts.s:1649 .text.bme680_set_sensor_settings:0000000000000000 bme680_set_sensor_settings - /tmp/ccvbgJts.s:2558 .text.bme680_set_sensor_settings:0000000000000440 $d - /tmp/ccvbgJts.s:2566 .text.bme680_get_sensor_mode:0000000000000000 $t - /tmp/ccvbgJts.s:2573 .text.bme680_get_sensor_mode:0000000000000000 bme680_get_sensor_mode - /tmp/ccvbgJts.s:2664 .text.bme680_set_profile_dur:0000000000000000 $t - /tmp/ccvbgJts.s:2671 .text.bme680_set_profile_dur:0000000000000000 bme680_set_profile_dur - /tmp/ccvbgJts.s:2727 .text.bme680_set_profile_dur:0000000000000034 $d - /tmp/ccvbgJts.s:2733 .text.bme680_get_profile_dur:0000000000000000 $t - /tmp/ccvbgJts.s:2740 .text.bme680_get_profile_dur:0000000000000000 bme680_get_profile_dur - /tmp/ccvbgJts.s:2806 .text.bme680_get_profile_dur:0000000000000040 $d - /tmp/ccvbgJts.s:2814 .text.bme680_get_sensor_data:0000000000000000 $t - /tmp/ccvbgJts.s:2821 .text.bme680_get_sensor_data:0000000000000000 bme680_get_sensor_data - /tmp/ccvbgJts.s:3581 .text.bme680_get_sensor_data:00000000000003c8 $d - /tmp/ccvbgJts.s:3621 .data.lookupTable2:0000000000000000 lookupTable2 - /tmp/ccvbgJts.s:3599 .data.lookupTable1:0000000000000000 lookupTable1 - /tmp/ccvbgJts.s:3595 .data.lookupTable1:0000000000000000 $d - /tmp/ccvbgJts.s:3617 .data.lookupTable2:0000000000000000 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -memset -__aeabi_idiv -__aeabi_uidiv -__aeabi_lmul -__aeabi_ldivmod diff --git a/build/cmac.d b/build/cmac.d deleted file mode 100644 index 979f7d8..0000000 --- a/build/cmac.d +++ /dev/null @@ -1,25 +0,0 @@ -build/cmac.d: Middlewares/Third_Party/Lora/Crypto/cmac.c \ - Middlewares/Third_Party/Lora/Crypto/aes.h \ - Middlewares/Third_Party/Lora/Crypto/cmac.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h - -Middlewares/Third_Party/Lora/Crypto/aes.h: - -Middlewares/Third_Party/Lora/Crypto/cmac.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: diff --git a/build/cmac.lst b/build/cmac.lst deleted file mode 100644 index 86f7f84..0000000 --- a/build/cmac.lst +++ /dev/null @@ -1,844 +0,0 @@ -ARM GAS /tmp/ccUuuSOT.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "cmac.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.AES_CMAC_Init,"ax",%progbits - 16 .align 1 - 17 .global AES_CMAC_Init - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 AES_CMAC_Init: - 24 .LFB82: - 25 .file 1 "./Middlewares/Third_Party/Lora/Crypto/cmac.c" - 1:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** /************************************************************************** - 2:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** Copyright (C) 2009 Lander Casado, Philippas Tsigas - 3:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 4:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** All rights reserved. - 5:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 6:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** Permission is hereby granted, free of charge, to any person obtaining - 7:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** a copy of this software and associated documentation files - 8:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** (the "Software"), to deal with the Software without restriction, including - 9:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** without limitation the rights to use, copy, modify, merge, publish, - 10:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** distribute, sublicense, and/or sell copies of the Software, and to - 11:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** permit persons to whom the Software is furnished to do so, subject to - 12:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** the following conditions: - 13:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 14:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** Redistributions of source code must retain the above copyright notice, - 15:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** this list of conditions and the following disclaimers. Redistributions in - 16:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** binary form must reproduce the above copyright notice, this list of - 17:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** conditions and the following disclaimers in the documentation and/or - 18:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** other materials provided with the distribution. - 19:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 20:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** In no event shall the authors or copyright holders be liable for any special, - 21:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** incidental, indirect or consequential damages of any kind, or any damages - 22:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** whatsoever resulting from loss of use, data or profits, whether or not - 23:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** advised of the possibility of damage, and on any theory of liability, - 24:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** arising out of or in connection with the use or performance of this software. - 25:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 26:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - 27:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - 28:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - 29:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - 30:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - 31:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - 32:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** DEALINGS WITH THE SOFTWARE - 33:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - ARM GAS /tmp/ccUuuSOT.s page 2 - - - 34:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** *****************************************************************************/ - 35:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //#include - 36:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //#include - 37:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #include - 38:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #include "aes.h" - 39:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #include "cmac.h" - 40:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #include "utilities.h" - 41:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 42:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #define LSHIFT(v, r) do { \ - 43:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** int32_t i; \ - 44:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** for (i = 0; i < 15; i++) \ - 45:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** (r)[i] = (v)[i] << 1 | (v)[i + 1] >> 7; \ - 46:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** (r)[15] = (v)[15] << 1; \ - 47:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } while (0) - 48:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 49:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** #define XOR(v, r) do { \ - 50:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** int32_t i; \ - 51:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** for (i = 0; i < 16; i++) \ - 52:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** { \ - 53:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** (r)[i] = (r)[i] ^ (v)[i]; \ - 54:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } \ - 55:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } while (0) \ - 56:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 57:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 58:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** void AES_CMAC_Init(AES_CMAC_CTX *ctx) - 59:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** { - 26 .loc 1 59 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 .LVL0: - 31 0000 10B5 push {r4, lr} - 32 .LCFI0: - 33 .cfi_def_cfa_offset 8 - 34 .cfi_offset 4, -8 - 35 .cfi_offset 14, -4 - 36 0002 0400 movs r4, r0 - 60:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** memset1(ctx->X, 0, sizeof ctx->X); - 37 .loc 1 60 0 - 38 0004 F130 adds r0, r0, #241 - 39 .LVL1: - 40 0006 1022 movs r2, #16 - 41 0008 0021 movs r1, #0 - 42 000a FFF7FEFF bl memset1 - 43 .LVL2: - 61:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** ctx->M_n = 0; - 44 .loc 1 61 0 - 45 000e 8A23 movs r3, #138 - 46 0010 5B00 lsls r3, r3, #1 - 47 0012 0022 movs r2, #0 - 48 0014 E250 str r2, [r4, r3] - 62:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** memset1(ctx->rijndael.ksch, '\0', 240); - 49 .loc 1 62 0 - 50 0016 F032 adds r2, r2, #240 - 51 0018 0021 movs r1, #0 - 52 001a 2000 movs r0, r4 - 53 001c FFF7FEFF bl memset1 - ARM GAS /tmp/ccUuuSOT.s page 3 - - - 54 .LVL3: - 63:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } - 55 .loc 1 63 0 - 56 @ sp needed - 57 .LVL4: - 58 0020 10BD pop {r4, pc} - 59 .cfi_endproc - 60 .LFE82: - 62 .section .text.AES_CMAC_SetKey,"ax",%progbits - 63 .align 1 - 64 .global AES_CMAC_SetKey - 65 .syntax unified - 66 .code 16 - 67 .thumb_func - 68 .fpu softvfp - 70 AES_CMAC_SetKey: - 71 .LFB83: - 64:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 65:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** void AES_CMAC_SetKey(AES_CMAC_CTX *ctx, const uint8_t key[AES_CMAC_KEY_LENGTH]) - 66:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** { - 72 .loc 1 66 0 - 73 .cfi_startproc - 74 @ args = 0, pretend = 0, frame = 0 - 75 @ frame_needed = 0, uses_anonymous_args = 0 - 76 .LVL5: - 77 0000 10B5 push {r4, lr} - 78 .LCFI1: - 79 .cfi_def_cfa_offset 8 - 80 .cfi_offset 4, -8 - 81 .cfi_offset 14, -4 - 82 0002 0200 movs r2, r0 - 83 0004 0800 movs r0, r1 - 84 .LVL6: - 67:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //rijndael_set_key_enc_only(&ctx->rijndael, key, 128); - 68:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** aes_set_key( key, AES_CMAC_KEY_LENGTH, &ctx->rijndael); - 85 .loc 1 68 0 - 86 0006 1021 movs r1, #16 - 87 .LVL7: - 88 0008 FFF7FEFF bl aes_set_key - 89 .LVL8: - 69:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } - 90 .loc 1 69 0 - 91 @ sp needed - 92 000c 10BD pop {r4, pc} - 93 .cfi_endproc - 94 .LFE83: - 96 .section .text.AES_CMAC_Update,"ax",%progbits - 97 .align 1 - 98 .global AES_CMAC_Update - 99 .syntax unified - 100 .code 16 - 101 .thumb_func - 102 .fpu softvfp - 104 AES_CMAC_Update: - 105 .LFB84: - 70:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 71:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** void AES_CMAC_Update(AES_CMAC_CTX *ctx, const uint8_t *data, uint32_t len) - ARM GAS /tmp/ccUuuSOT.s page 4 - - - 72:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** { - 106 .loc 1 72 0 - 107 .cfi_startproc - 108 @ args = 0, pretend = 0, frame = 16 - 109 @ frame_needed = 0, uses_anonymous_args = 0 - 110 .LVL9: - 111 0000 F0B5 push {r4, r5, r6, r7, lr} - 112 .LCFI2: - 113 .cfi_def_cfa_offset 20 - 114 .cfi_offset 4, -20 - 115 .cfi_offset 5, -16 - 116 .cfi_offset 6, -12 - 117 .cfi_offset 7, -8 - 118 .cfi_offset 14, -4 - 119 0002 C646 mov lr, r8 - 120 0004 00B5 push {lr} - 121 .LCFI3: - 122 .cfi_def_cfa_offset 24 - 123 .cfi_offset 8, -24 - 124 0006 84B0 sub sp, sp, #16 - 125 .LCFI4: - 126 .cfi_def_cfa_offset 40 - 127 0008 0400 movs r4, r0 - 128 000a 0D00 movs r5, r1 - 129 000c 1600 movs r6, r2 - 73:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** uint32_t mlen; - 74:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** uint8_t in[16]; - 75:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 76:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** if (ctx->M_n > 0) { - 130 .loc 1 76 0 - 131 000e 8A23 movs r3, #138 - 132 0010 5B00 lsls r3, r3, #1 - 133 0012 C058 ldr r0, [r0, r3] - 134 .LVL10: - 135 0014 0028 cmp r0, #0 - 136 0016 4AD0 beq .L9 - 77:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** mlen = MIN(16 - ctx->M_n, len); - 137 .loc 1 77 0 - 138 0018 053B subs r3, r3, #5 - 139 001a FF3B subs r3, r3, #255 - 140 001c 1B1A subs r3, r3, r0 - 141 001e 9846 mov r8, r3 - 142 0020 1F00 movs r7, r3 - 143 0022 9342 cmp r3, r2 - 144 0024 00D9 bls .L5 - 145 0026 1700 movs r7, r2 - 146 .L5: - 147 .LVL11: - 78:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** memcpy1(ctx->M_last + ctx->M_n, data, mlen); - 148 .loc 1 78 0 - 149 0028 A31C adds r3, r4, #2 - 150 002a FF33 adds r3, r3, #255 - 151 002c BAB2 uxth r2, r7 - 152 .LVL12: - 153 002e 1818 adds r0, r3, r0 - 154 0030 2900 movs r1, r5 - 155 .LVL13: - ARM GAS /tmp/ccUuuSOT.s page 5 - - - 156 0032 FFF7FEFF bl memcpy1 - 157 .LVL14: - 79:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** ctx->M_n += mlen; - 158 .loc 1 79 0 - 159 0036 8A22 movs r2, #138 - 160 0038 5200 lsls r2, r2, #1 - 161 003a A358 ldr r3, [r4, r2] - 162 003c FB18 adds r3, r7, r3 - 163 003e A350 str r3, [r4, r2] - 80:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** if (ctx->M_n < 16 || len == mlen) - 164 .loc 1 80 0 - 165 0040 0F2B cmp r3, #15 - 166 0042 41D9 bls .L3 - 167 .loc 1 80 0 is_stmt 0 discriminator 1 - 168 0044 B045 cmp r8, r6 - 169 0046 3FD2 bcs .L3 - 170 .LBB2: - 81:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** return; - 82:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** XOR(ctx->M_last, ctx->X); - 171 .loc 1 82 0 is_stmt 1 - 172 0048 0022 movs r2, #0 - 173 004a 09E0 b .L7 - 174 .LVL15: - 175 .L8: - 176 .loc 1 82 0 is_stmt 0 discriminator 3 - 177 004c A318 adds r3, r4, r2 - 178 004e 1800 movs r0, r3 - 179 0050 F130 adds r0, r0, #241 - 180 0052 0178 ldrb r1, [r0] - 181 0054 0233 adds r3, r3, #2 - 182 0056 FF33 adds r3, r3, #255 - 183 0058 1B78 ldrb r3, [r3] - 184 005a 4B40 eors r3, r1 - 185 005c 0370 strb r3, [r0] - 186 005e 0132 adds r2, r2, #1 - 187 .LVL16: - 188 .L7: - 189 .loc 1 82 0 discriminator 1 - 190 0060 0F2A cmp r2, #15 - 191 0062 F3DD ble .L8 - 192 .LBE2: - 83:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //rijndael_encrypt(&ctx->rijndael, ctx->X, ctx->X); - 84:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** aes_encrypt( ctx->X, ctx->X, &ctx->rijndael); - 193 .loc 1 84 0 is_stmt 1 - 194 0064 2200 movs r2, r4 - 195 .LVL17: - 196 0066 2000 movs r0, r4 - 197 0068 F130 adds r0, r0, #241 - 198 006a 0100 movs r1, r0 - 199 006c FFF7FEFF bl aes_encrypt - 200 .LVL18: - 85:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** data += mlen; - 201 .loc 1 85 0 - 202 0070 ED19 adds r5, r5, r7 - 203 .LVL19: - 86:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** len -= mlen; - 204 .loc 1 86 0 - ARM GAS /tmp/ccUuuSOT.s page 6 - - - 205 0072 F61B subs r6, r6, r7 - 206 .LVL20: - 207 0074 1BE0 b .L9 - 208 .LVL21: - 209 .L10: - 210 .LBB3: - 87:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } - 88:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** while (len > 16) { /* not last block */ - 89:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 90:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** XOR(data, ctx->X); - 211 .loc 1 90 0 discriminator 3 - 212 0076 E218 adds r2, r4, r3 - 213 0078 F132 adds r2, r2, #241 - 214 007a 1178 ldrb r1, [r2] - 215 007c E85C ldrb r0, [r5, r3] - 216 007e 4140 eors r1, r0 - 217 0080 1170 strb r1, [r2] - 218 0082 0133 adds r3, r3, #1 - 219 .LVL22: - 220 .L11: - 221 .loc 1 90 0 is_stmt 0 discriminator 1 - 222 0084 0F2B cmp r3, #15 - 223 0086 F6DD ble .L10 - 224 .LBE3: - 91:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //rijndael_encrypt(&ctx->rijndael, ctx->X, ctx->X); - 92:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 93:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** memcpy1(in, &ctx->X[0], 16); //Bestela ez du ondo iten - 225 .loc 1 93 0 is_stmt 1 - 226 0088 1022 movs r2, #16 - 227 008a 2700 movs r7, r4 - 228 008c F137 adds r7, r7, #241 - 229 008e 3900 movs r1, r7 - 230 0090 6846 mov r0, sp - 231 0092 FFF7FEFF bl memcpy1 - 232 .LVL23: - 94:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** aes_encrypt( in, in, &ctx->rijndael); - 233 .loc 1 94 0 - 234 0096 2200 movs r2, r4 - 235 0098 6946 mov r1, sp - 236 009a 6846 mov r0, sp - 237 009c FFF7FEFF bl aes_encrypt - 238 .LVL24: - 95:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** memcpy1(&ctx->X[0], in, 16); - 239 .loc 1 95 0 - 240 00a0 1022 movs r2, #16 - 241 00a2 6946 mov r1, sp - 242 00a4 3800 movs r0, r7 - 243 00a6 FFF7FEFF bl memcpy1 - 244 .LVL25: - 96:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 97:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** data += 16; - 245 .loc 1 97 0 - 246 00aa 1035 adds r5, r5, #16 - 247 .LVL26: - 98:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** len -= 16; - 248 .loc 1 98 0 - 249 00ac 103E subs r6, r6, #16 - ARM GAS /tmp/ccUuuSOT.s page 7 - - - 250 .LVL27: - 251 .L9: - 88:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 252 .loc 1 88 0 - 253 00ae 102E cmp r6, #16 - 254 00b0 01D9 bls .L14 - 255 .LBB4: - 90:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //rijndael_encrypt(&ctx->rijndael, ctx->X, ctx->X); - 256 .loc 1 90 0 - 257 00b2 0023 movs r3, #0 - 258 00b4 E6E7 b .L11 - 259 .L14: - 260 .LBE4: - 99:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } - 100:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** /* potential last block, save it */ - 101:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** memcpy1(ctx->M_last, data, len); - 261 .loc 1 101 0 - 262 00b6 A01C adds r0, r4, #2 - 263 00b8 FF30 adds r0, r0, #255 - 264 00ba B2B2 uxth r2, r6 - 265 00bc 2900 movs r1, r5 - 266 00be FFF7FEFF bl memcpy1 - 267 .LVL28: - 102:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** ctx->M_n = len; - 268 .loc 1 102 0 - 269 00c2 8A23 movs r3, #138 - 270 00c4 5B00 lsls r3, r3, #1 - 271 00c6 E650 str r6, [r4, r3] - 272 .L3: - 103:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } - 273 .loc 1 103 0 - 274 00c8 04B0 add sp, sp, #16 - 275 @ sp needed - 276 .LVL29: - 277 .LVL30: - 278 .LVL31: - 279 00ca 04BC pop {r2} - 280 00cc 9046 mov r8, r2 - 281 00ce F0BD pop {r4, r5, r6, r7, pc} - 282 .cfi_endproc - 283 .LFE84: - 285 .section .text.AES_CMAC_Final,"ax",%progbits - 286 .align 1 - 287 .global AES_CMAC_Final - 288 .syntax unified - 289 .code 16 - 290 .thumb_func - 291 .fpu softvfp - 293 AES_CMAC_Final: - 294 .LFB85: - 104:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 105:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** void AES_CMAC_Final(uint8_t digest[AES_CMAC_DIGEST_LENGTH], AES_CMAC_CTX *ctx) - 106:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** { - 295 .loc 1 106 0 - 296 .cfi_startproc - 297 @ args = 0, pretend = 0, frame = 32 - 298 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccUuuSOT.s page 8 - - - 299 .LVL32: - 300 0000 70B5 push {r4, r5, r6, lr} - 301 .LCFI5: - 302 .cfi_def_cfa_offset 16 - 303 .cfi_offset 4, -16 - 304 .cfi_offset 5, -12 - 305 .cfi_offset 6, -8 - 306 .cfi_offset 14, -4 - 307 0002 88B0 sub sp, sp, #32 - 308 .LCFI6: - 309 .cfi_def_cfa_offset 48 - 310 0004 0400 movs r4, r0 - 311 0006 0D00 movs r5, r1 - 107:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** uint8_t K[16]; - 108:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** uint8_t in[16]; - 109:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** /* generate subkey K1 */ - 110:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** memset1(K, '\0', 16); - 312 .loc 1 110 0 - 313 0008 04AE add r6, sp, #16 - 314 000a 1022 movs r2, #16 - 315 000c 0021 movs r1, #0 - 316 .LVL33: - 317 000e 3000 movs r0, r6 - 318 .LVL34: - 319 0010 FFF7FEFF bl memset1 - 320 .LVL35: - 111:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 112:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //rijndael_encrypt(&ctx->rijndael, K, K); - 113:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 114:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** aes_encrypt( K, K, &ctx->rijndael); - 321 .loc 1 114 0 - 322 0014 2A00 movs r2, r5 - 323 0016 3100 movs r1, r6 - 324 0018 3000 movs r0, r6 - 325 001a FFF7FEFF bl aes_encrypt - 326 .LVL36: - 115:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 116:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** if (K[0] & 0x80) { - 327 .loc 1 116 0 - 328 001e 0023 movs r3, #0 - 329 0020 F356 ldrsb r3, [r6, r3] - 330 0022 002B cmp r3, #0 - 331 0024 15DB blt .L36 - 332 .LBB5: - 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 118:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** K[15] ^= 0x87; - 119:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } else - 120:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 333 .loc 1 120 0 - 334 0026 0022 movs r2, #0 - 335 0028 1EE0 b .L17 - 336 .LVL37: - 337 .L18: - 338 .LBE5: - 339 .LBB6: - 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 340 .loc 1 117 0 discriminator 3 - ARM GAS /tmp/ccUuuSOT.s page 9 - - - 341 002a 04A9 add r1, sp, #16 - 342 002c 885C ldrb r0, [r1, r2] - 343 002e 4000 lsls r0, r0, #1 - 344 0030 561C adds r6, r2, #1 - 345 0032 8B5D ldrb r3, [r1, r6] - 346 0034 DB09 lsrs r3, r3, #7 - 347 0036 0343 orrs r3, r0 - 348 0038 8B54 strb r3, [r1, r2] - 349 .LVL38: - 350 003a 3200 movs r2, r6 - 351 .LVL39: - 352 .L16: - 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 353 .loc 1 117 0 is_stmt 0 discriminator 1 - 354 003c 0E2A cmp r2, #14 - 355 003e F4DD ble .L18 - 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 356 .loc 1 117 0 discriminator 4 - 357 0040 04A9 add r1, sp, #16 - 358 0042 CB7B ldrb r3, [r1, #15] - 359 0044 5B00 lsls r3, r3, #1 - 360 0046 DBB2 uxtb r3, r3 - 361 .LBE6: - 118:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } else - 362 .loc 1 118 0 is_stmt 1 discriminator 4 - 363 0048 7922 movs r2, #121 - 364 .LVL40: - 365 004a 5242 rsbs r2, r2, #0 - 366 004c 5340 eors r3, r2 - 367 004e CB73 strb r3, [r1, #15] - 368 0050 10E0 b .L19 - 369 .L36: - 370 .LBB7: - 117:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 371 .loc 1 117 0 - 372 0052 0022 movs r2, #0 - 373 0054 F2E7 b .L16 - 374 .LVL41: - 375 .L20: - 376 .LBE7: - 377 .LBB8: - 378 .loc 1 120 0 discriminator 3 - 379 0056 04A9 add r1, sp, #16 - 380 0058 885C ldrb r0, [r1, r2] - 381 005a 4000 lsls r0, r0, #1 - 382 005c 561C adds r6, r2, #1 - 383 005e 8B5D ldrb r3, [r1, r6] - 384 0060 DB09 lsrs r3, r3, #7 - 385 0062 0343 orrs r3, r0 - 386 0064 8B54 strb r3, [r1, r2] - 387 .LVL42: - 388 0066 3200 movs r2, r6 - 389 .LVL43: - 390 .L17: - 391 .loc 1 120 0 is_stmt 0 discriminator 1 - 392 0068 0E2A cmp r2, #14 - 393 006a F4DD ble .L20 - ARM GAS /tmp/ccUuuSOT.s page 10 - - - 394 .loc 1 120 0 discriminator 4 - 395 006c 04AA add r2, sp, #16 - 396 .LVL44: - 397 006e D37B ldrb r3, [r2, #15] - 398 0070 5B00 lsls r3, r3, #1 - 399 0072 D373 strb r3, [r2, #15] - 400 .L19: - 401 .LBE8: - 121:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 122:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 123:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** if (ctx->M_n == 16) { - 402 .loc 1 123 0 is_stmt 1 - 403 0074 8A23 movs r3, #138 - 404 0076 5B00 lsls r3, r3, #1 - 405 0078 EB58 ldr r3, [r5, r3] - 406 007a 102B cmp r3, #16 - 407 007c 12D0 beq .L40 - 124:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** /* last block was a complete block */ - 125:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** XOR(K, ctx->M_last); - 126:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 127:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } else { - 128:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** /* generate subkey K2 */ - 129:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** if (K[0] & 0x80) { - 408 .loc 1 129 0 - 409 007e 04AB add r3, sp, #16 - 410 0080 1B78 ldrb r3, [r3] - 411 0082 5BB2 sxtb r3, r3 - 412 0084 002B cmp r3, #0 - 413 0086 23DB blt .L38 - 414 .LBB9: - 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 131:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** K[15] ^= 0x87; - 132:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } else - 133:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 415 .loc 1 133 0 - 416 0088 0022 movs r2, #0 - 417 008a 2CE0 b .L26 - 418 .LVL45: - 419 .L23: - 420 .LBE9: - 421 .LBB10: - 125:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 422 .loc 1 125 0 discriminator 3 - 423 008c EA18 adds r2, r5, r3 - 424 008e 0232 adds r2, r2, #2 - 425 0090 FF32 adds r2, r2, #255 - 426 0092 1178 ldrb r1, [r2] - 427 0094 04A8 add r0, sp, #16 - 428 0096 C05C ldrb r0, [r0, r3] - 429 0098 4140 eors r1, r0 - 430 009a 1170 strb r1, [r2] - 431 009c 0133 adds r3, r3, #1 - 432 .LVL46: - 433 .L21: - 125:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 434 .loc 1 125 0 is_stmt 0 discriminator 1 - 435 009e 0F2B cmp r3, #15 - ARM GAS /tmp/ccUuuSOT.s page 11 - - - 436 00a0 F4DD ble .L23 - 437 00a2 48E0 b .L24 - 438 .LVL47: - 439 .L40: - 125:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 440 .loc 1 125 0 - 441 00a4 0023 movs r3, #0 - 442 00a6 FAE7 b .L21 - 443 .LVL48: - 444 .L27: - 445 .LBE10: - 446 .LBB11: - 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 447 .loc 1 130 0 is_stmt 1 discriminator 3 - 448 00a8 04A9 add r1, sp, #16 - 449 00aa 885C ldrb r0, [r1, r2] - 450 00ac 4000 lsls r0, r0, #1 - 451 00ae 561C adds r6, r2, #1 - 452 00b0 8B5D ldrb r3, [r1, r6] - 453 00b2 DB09 lsrs r3, r3, #7 - 454 00b4 0343 orrs r3, r0 - 455 00b6 8B54 strb r3, [r1, r2] - 456 .LVL49: - 457 00b8 3200 movs r2, r6 - 458 .LVL50: - 459 .L25: - 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 460 .loc 1 130 0 is_stmt 0 discriminator 1 - 461 00ba 0E2A cmp r2, #14 - 462 00bc F4DD ble .L27 - 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 463 .loc 1 130 0 discriminator 4 - 464 00be 04A9 add r1, sp, #16 - 465 00c0 CB7B ldrb r3, [r1, #15] - 466 00c2 5B00 lsls r3, r3, #1 - 467 00c4 DBB2 uxtb r3, r3 - 468 .LBE11: - 131:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } else - 469 .loc 1 131 0 is_stmt 1 discriminator 4 - 470 00c6 7922 movs r2, #121 - 471 .LVL51: - 472 00c8 5242 rsbs r2, r2, #0 - 473 00ca 5340 eors r3, r2 - 474 00cc CB73 strb r3, [r1, #15] - 475 00ce 10E0 b .L28 - 476 .L38: - 477 .LBB12: - 130:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** LSHIFT(K, K); - 478 .loc 1 130 0 - 479 00d0 0022 movs r2, #0 - 480 00d2 F2E7 b .L25 - 481 .LVL52: - 482 .L29: - 483 .LBE12: - 484 .LBB13: - 485 .loc 1 133 0 discriminator 3 - 486 00d4 04A9 add r1, sp, #16 - ARM GAS /tmp/ccUuuSOT.s page 12 - - - 487 00d6 885C ldrb r0, [r1, r2] - 488 00d8 4000 lsls r0, r0, #1 - 489 00da 561C adds r6, r2, #1 - 490 00dc 8B5D ldrb r3, [r1, r6] - 491 00de DB09 lsrs r3, r3, #7 - 492 00e0 0343 orrs r3, r0 - 493 00e2 8B54 strb r3, [r1, r2] - 494 .LVL53: - 495 00e4 3200 movs r2, r6 - 496 .LVL54: - 497 .L26: - 498 .loc 1 133 0 is_stmt 0 discriminator 1 - 499 00e6 0E2A cmp r2, #14 - 500 00e8 F4DD ble .L29 - 501 .loc 1 133 0 discriminator 4 - 502 00ea 04AA add r2, sp, #16 - 503 .LVL55: - 504 00ec D37B ldrb r3, [r2, #15] - 505 00ee 5B00 lsls r3, r3, #1 - 506 00f0 D373 strb r3, [r2, #15] - 507 .L28: - 508 .LBE13: - 134:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 135:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** /* padding(M_last) */ - 136:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** ctx->M_last[ctx->M_n] = 0x80; - 509 .loc 1 136 0 is_stmt 1 - 510 00f2 8A23 movs r3, #138 - 511 00f4 5B00 lsls r3, r3, #1 - 512 00f6 EB58 ldr r3, [r5, r3] - 513 00f8 EB18 adds r3, r5, r3 - 514 00fa 0233 adds r3, r3, #2 - 515 00fc FF33 adds r3, r3, #255 - 516 00fe 8022 movs r2, #128 - 517 0100 1A70 strb r2, [r3] - 137:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** while (++ctx->M_n < 16) - 518 .loc 1 137 0 - 519 0102 04E0 b .L30 - 520 .L31: - 138:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** ctx->M_last[ctx->M_n] = 0; - 521 .loc 1 138 0 - 522 0104 EB18 adds r3, r5, r3 - 523 0106 0233 adds r3, r3, #2 - 524 0108 FF33 adds r3, r3, #255 - 525 010a 0022 movs r2, #0 - 526 010c 1A70 strb r2, [r3] - 527 .L30: - 137:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** while (++ctx->M_n < 16) - 528 .loc 1 137 0 - 529 010e 8A22 movs r2, #138 - 530 0110 5200 lsls r2, r2, #1 - 531 0112 AB58 ldr r3, [r5, r2] - 532 0114 0133 adds r3, r3, #1 - 533 0116 AB50 str r3, [r5, r2] - 534 0118 0F2B cmp r3, #15 - 535 011a F3D9 bls .L31 - 536 .LBB14: - 139:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - ARM GAS /tmp/ccUuuSOT.s page 13 - - - 140:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** XOR(K, ctx->M_last); - 537 .loc 1 140 0 - 538 011c 0023 movs r3, #0 - 539 011e 08E0 b .L32 - 540 .LVL56: - 541 .L33: - 542 .loc 1 140 0 is_stmt 0 discriminator 3 - 543 0120 EA18 adds r2, r5, r3 - 544 0122 0232 adds r2, r2, #2 - 545 0124 FF32 adds r2, r2, #255 - 546 0126 1178 ldrb r1, [r2] - 547 0128 04A8 add r0, sp, #16 - 548 012a C05C ldrb r0, [r0, r3] - 549 012c 4140 eors r1, r0 - 550 012e 1170 strb r1, [r2] - 551 0130 0133 adds r3, r3, #1 - 552 .LVL57: - 553 .L32: - 554 .loc 1 140 0 discriminator 1 - 555 0132 0F2B cmp r3, #15 - 556 0134 F4DD ble .L33 - 557 .LVL58: - 558 .L24: - 559 0136 0022 movs r2, #0 - 560 0138 09E0 b .L34 - 561 .LVL59: - 562 .L35: - 563 .LBE14: - 564 .LBB15: - 141:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 142:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 143:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } - 144:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** XOR(ctx->M_last, ctx->X); - 565 .loc 1 144 0 is_stmt 1 discriminator 3 - 566 013a AB18 adds r3, r5, r2 - 567 013c 1800 movs r0, r3 - 568 013e F130 adds r0, r0, #241 - 569 0140 0178 ldrb r1, [r0] - 570 0142 0233 adds r3, r3, #2 - 571 0144 FF33 adds r3, r3, #255 - 572 0146 1B78 ldrb r3, [r3] - 573 0148 4B40 eors r3, r1 - 574 014a 0370 strb r3, [r0] - 575 014c 0132 adds r2, r2, #1 - 576 .LVL60: - 577 .L34: - 578 .loc 1 144 0 is_stmt 0 discriminator 1 - 579 014e 0F2A cmp r2, #15 - 580 0150 F3DD ble .L35 - 581 .LBE15: - 145:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 146:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** //rijndael_encrypt(&ctx->rijndael, ctx->X, digest); - 147:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 148:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** memcpy1(in, &ctx->X[0], 16); //Bestela ez du ondo iten - 582 .loc 1 148 0 is_stmt 1 - 583 0152 2900 movs r1, r5 - 584 0154 F131 adds r1, r1, #241 - ARM GAS /tmp/ccUuuSOT.s page 14 - - - 585 0156 1022 movs r2, #16 - 586 .LVL61: - 587 0158 6846 mov r0, sp - 588 015a FFF7FEFF bl memcpy1 - 589 .LVL62: - 149:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** aes_encrypt(in, digest, &ctx->rijndael); - 590 .loc 1 149 0 - 591 015e 2A00 movs r2, r5 - 592 0160 2100 movs r1, r4 - 593 0162 6846 mov r0, sp - 594 0164 FFF7FEFF bl aes_encrypt - 595 .LVL63: - 150:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** memset1(K, 0, sizeof K); - 596 .loc 1 150 0 - 597 0168 1022 movs r2, #16 - 598 016a 0021 movs r1, #0 - 599 016c 04A8 add r0, sp, #16 - 600 016e FFF7FEFF bl memset1 - 601 .LVL64: - 151:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** - 152:./Middlewares/Third_Party/Lora/Crypto/cmac.c **** } - 602 .loc 1 152 0 - 603 0172 08B0 add sp, sp, #32 - 604 @ sp needed - 605 .LVL65: - 606 .LVL66: - 607 0174 70BD pop {r4, r5, r6, pc} - 608 .cfi_endproc - 609 .LFE85: - 611 .text - 612 .Letext0: - 613 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 614 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 615 .file 4 "./Middlewares/Third_Party/Lora/Crypto/aes.h" - 616 .file 5 "./Middlewares/Third_Party/Lora/Crypto/cmac.h" - 617 .file 6 "/usr/arm-none-eabi/include/sys/lock.h" - 618 .file 7 "/usr/arm-none-eabi/include/sys/_types.h" - 619 .file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 620 .file 9 "/usr/arm-none-eabi/include/sys/reent.h" - 621 .file 10 "/usr/arm-none-eabi/include/math.h" - 622 .file 11 "Middlewares/Third_Party/Lora/Utilities/utilities.h" - ARM GAS /tmp/ccUuuSOT.s page 15 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 cmac.c - /tmp/ccUuuSOT.s:16 .text.AES_CMAC_Init:0000000000000000 $t - /tmp/ccUuuSOT.s:23 .text.AES_CMAC_Init:0000000000000000 AES_CMAC_Init - /tmp/ccUuuSOT.s:63 .text.AES_CMAC_SetKey:0000000000000000 $t - /tmp/ccUuuSOT.s:70 .text.AES_CMAC_SetKey:0000000000000000 AES_CMAC_SetKey - /tmp/ccUuuSOT.s:97 .text.AES_CMAC_Update:0000000000000000 $t - /tmp/ccUuuSOT.s:104 .text.AES_CMAC_Update:0000000000000000 AES_CMAC_Update - /tmp/ccUuuSOT.s:286 .text.AES_CMAC_Final:0000000000000000 $t - /tmp/ccUuuSOT.s:293 .text.AES_CMAC_Final:0000000000000000 AES_CMAC_Final - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -memset1 -aes_set_key -memcpy1 -aes_encrypt diff --git a/build/debug.d b/build/debug.d deleted file mode 100644 index 11d6d9d..0000000 --- a/build/debug.d +++ /dev/null @@ -1,135 +0,0 @@ -build/debug.d: Src/debug.c Inc/hw.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \ - Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \ - Inc/hw_spi.h Inc/hw_rtc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Inc/hw_msp.h Inc/debug.h Inc/vcom.h - -Inc/hw.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: - -Inc/stm32l0xx_hw_conf.h: - -Inc/hw.h: - -Inc/hw_conf.h: - -Inc/hw_gpio.h: - -Inc/hw_spi.h: - -Inc/hw_rtc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Inc/hw_msp.h: - -Inc/debug.h: - -Inc/vcom.h: diff --git a/build/debug.lst b/build/debug.lst deleted file mode 100644 index e7d7652..0000000 --- a/build/debug.lst +++ /dev/null @@ -1,326 +0,0 @@ -ARM GAS /tmp/ccWwZZVi.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "debug.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.DBG_Init,"ax",%progbits - 16 .align 1 - 17 .global DBG_Init - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 DBG_Init: - 24 .LFB96: - 25 .file 1 "./Src/debug.c" - 1:./Src/debug.c **** - 2:./Src/debug.c **** /****************************************************************************** - 3:./Src/debug.c **** * @file debug.c - 4:./Src/debug.c **** * @author MCD Application Team - 5:./Src/debug.c **** * @version V1.1.2 - 6:./Src/debug.c **** * @date 08-September-2017 - 7:./Src/debug.c **** * @brief debug API - 8:./Src/debug.c **** ****************************************************************************** - 9:./Src/debug.c **** * @attention - 10:./Src/debug.c **** * - 11:./Src/debug.c **** *

© Copyright (c) 2017 STMicroelectronics International N.V. - 12:./Src/debug.c **** * All rights reserved.

- 13:./Src/debug.c **** * - 14:./Src/debug.c **** * Redistribution and use in source and binary forms, with or without - 15:./Src/debug.c **** * modification, are permitted, provided that the following conditions are met: - 16:./Src/debug.c **** * - 17:./Src/debug.c **** * 1. Redistribution of source code must retain the above copyright notice, - 18:./Src/debug.c **** * this list of conditions and the following disclaimer. - 19:./Src/debug.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 20:./Src/debug.c **** * this list of conditions and the following disclaimer in the documentation - 21:./Src/debug.c **** * and/or other materials provided with the distribution. - 22:./Src/debug.c **** * 3. Neither the name of STMicroelectronics nor the names of other - 23:./Src/debug.c **** * contributors to this software may be used to endorse or promote products - 24:./Src/debug.c **** * derived from this software without specific written permission. - 25:./Src/debug.c **** * 4. This software, including modifications and/or derivative works of this - 26:./Src/debug.c **** * software, must execute solely and exclusively on microcontroller or - 27:./Src/debug.c **** * microprocessor devices manufactured by or for STMicroelectronics. - 28:./Src/debug.c **** * 5. Redistribution and use of this software other than as permitted under - 29:./Src/debug.c **** * this license is void and will automatically terminate your rights under - 30:./Src/debug.c **** * this license. - 31:./Src/debug.c **** * - 32:./Src/debug.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - 33:./Src/debug.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - ARM GAS /tmp/ccWwZZVi.s page 2 - - - 34:./Src/debug.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - 35:./Src/debug.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - 36:./Src/debug.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - 37:./Src/debug.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - 38:./Src/debug.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - 39:./Src/debug.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - 40:./Src/debug.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - 41:./Src/debug.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - 42:./Src/debug.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - 43:./Src/debug.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 44:./Src/debug.c **** * - 45:./Src/debug.c **** ****************************************************************************** - 46:./Src/debug.c **** */ - 47:./Src/debug.c **** - 48:./Src/debug.c **** /* Includes ------------------------------------------------------------------*/ - 49:./Src/debug.c **** #include "hw.h" - 50:./Src/debug.c **** - 51:./Src/debug.c **** /** - 52:./Src/debug.c **** * @brief Initializes the debug - 53:./Src/debug.c **** * @param None - 54:./Src/debug.c **** * @retval None - 55:./Src/debug.c **** */ - 56:./Src/debug.c **** void DBG_Init( void ) - 57:./Src/debug.c **** { - 26 .loc 1 57 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 24 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 0000 30B5 push {r4, r5, lr} - 31 .LCFI0: - 32 .cfi_def_cfa_offset 12 - 33 .cfi_offset 4, -12 - 34 .cfi_offset 5, -8 - 35 .cfi_offset 14, -4 - 36 0002 87B0 sub sp, sp, #28 - 37 .LCFI1: - 38 .cfi_def_cfa_offset 40 - 58:./Src/debug.c **** #ifdef DEBUG - 59:./Src/debug.c **** GPIO_InitTypeDef gpioinitstruct = {0}; - 60:./Src/debug.c **** - 61:./Src/debug.c **** /* Enable the GPIO_B Clock */ - 62:./Src/debug.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); - 63:./Src/debug.c **** - 64:./Src/debug.c **** /* Configure the GPIO pin */ - 65:./Src/debug.c **** gpioinitstruct.Mode = GPIO_MODE_OUTPUT_PP; - 66:./Src/debug.c **** gpioinitstruct.Pull = GPIO_PULLUP; - 67:./Src/debug.c **** gpioinitstruct.Speed = GPIO_SPEED_HIGH; - 68:./Src/debug.c **** - 69:./Src/debug.c **** gpioinitstruct.Pin = (GPIO_PIN_12 | GPIO_PIN_13| GPIO_PIN_14 | GPIO_PIN_15); - 70:./Src/debug.c **** HAL_GPIO_Init(GPIOB, &gpioinitstruct); - 71:./Src/debug.c **** - 72:./Src/debug.c **** /* Reset debug Pins */ - 73:./Src/debug.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_12, GPIO_PIN_RESET); - 74:./Src/debug.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, GPIO_PIN_RESET); - 75:./Src/debug.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_14, GPIO_PIN_RESET); - 76:./Src/debug.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_15, GPIO_PIN_RESET); - 77:./Src/debug.c **** #if 0 - ARM GAS /tmp/ccWwZZVi.s page 3 - - - 78:./Src/debug.c **** HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1); - 79:./Src/debug.c **** #endif - 80:./Src/debug.c **** - 81:./Src/debug.c **** __HAL_RCC_DBGMCU_CLK_ENABLE( ); - 82:./Src/debug.c **** - 83:./Src/debug.c **** HAL_DBGMCU_EnableDBGSleepMode( ); - 84:./Src/debug.c **** HAL_DBGMCU_EnableDBGStopMode( ); - 85:./Src/debug.c **** HAL_DBGMCU_EnableDBGStandbyMode( ); - 86:./Src/debug.c **** - 87:./Src/debug.c **** #else /* DEBUG */ - 88:./Src/debug.c **** /* sw interface off*/ - 89:./Src/debug.c **** GPIO_InitTypeDef GPIO_InitStructure ={0}; - 39 .loc 1 89 0 - 40 0004 0C22 movs r2, #12 - 41 0006 0021 movs r1, #0 - 42 0008 03A8 add r0, sp, #12 - 43 000a FFF7FEFF bl memset - 44 .LVL0: - 90:./Src/debug.c **** - 91:./Src/debug.c **** GPIO_InitStructure.Mode = GPIO_MODE_ANALOG; - 45 .loc 1 91 0 - 46 000e 0323 movs r3, #3 - 47 0010 0293 str r3, [sp, #8] - 92:./Src/debug.c **** GPIO_InitStructure.Pull = GPIO_NOPULL; - 93:./Src/debug.c **** GPIO_InitStructure.Pin = (GPIO_PIN_13 | GPIO_PIN_14); - 48 .loc 1 93 0 - 49 0012 C023 movs r3, #192 - 50 0014 DB01 lsls r3, r3, #7 - 51 0016 0193 str r3, [sp, #4] - 52 .LBB2: - 94:./Src/debug.c **** __GPIOA_CLK_ENABLE() ; - 53 .loc 1 94 0 - 54 0018 104C ldr r4, .L2 - 55 001a E36A ldr r3, [r4, #44] - 56 001c 0125 movs r5, #1 - 57 001e 2B43 orrs r3, r5 - 58 0020 E362 str r3, [r4, #44] - 59 0022 E36A ldr r3, [r4, #44] - 60 0024 2B40 ands r3, r5 - 61 0026 0093 str r3, [sp] - 62 0028 009B ldr r3, [sp] - 63 .LBE2: - 95:./Src/debug.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStructure); - 64 .loc 1 95 0 - 65 002a A020 movs r0, #160 - 66 002c 01A9 add r1, sp, #4 - 67 002e C005 lsls r0, r0, #23 - 68 0030 FFF7FEFF bl HAL_GPIO_Init - 69 .LVL1: - 96:./Src/debug.c **** __GPIOA_CLK_DISABLE() ; - 70 .loc 1 96 0 - 71 0034 E36A ldr r3, [r4, #44] - 72 0036 AB43 bics r3, r5 - 73 0038 E362 str r3, [r4, #44] - 97:./Src/debug.c **** - 98:./Src/debug.c **** __HAL_RCC_DBGMCU_CLK_ENABLE( ); - 74 .loc 1 98 0 - ARM GAS /tmp/ccWwZZVi.s page 4 - - - 75 003a 626B ldr r2, [r4, #52] - 76 003c 8023 movs r3, #128 - 77 003e DB03 lsls r3, r3, #15 - 78 0040 1343 orrs r3, r2 - 79 0042 6363 str r3, [r4, #52] - 99:./Src/debug.c **** HAL_DBGMCU_DisableDBGSleepMode( ); - 80 .loc 1 99 0 - 81 0044 FFF7FEFF bl HAL_DBGMCU_DisableDBGSleepMode - 82 .LVL2: - 100:./Src/debug.c **** HAL_DBGMCU_DisableDBGStopMode( ); - 83 .loc 1 100 0 - 84 0048 FFF7FEFF bl HAL_DBGMCU_DisableDBGStopMode - 85 .LVL3: - 101:./Src/debug.c **** HAL_DBGMCU_DisableDBGStandbyMode( ); - 86 .loc 1 101 0 - 87 004c FFF7FEFF bl HAL_DBGMCU_DisableDBGStandbyMode - 88 .LVL4: - 102:./Src/debug.c **** __HAL_RCC_DBGMCU_CLK_DISABLE( ); - 89 .loc 1 102 0 - 90 0050 636B ldr r3, [r4, #52] - 91 0052 034A ldr r2, .L2+4 - 92 0054 1340 ands r3, r2 - 93 0056 6363 str r3, [r4, #52] - 103:./Src/debug.c **** #endif - 104:./Src/debug.c **** } - 94 .loc 1 104 0 - 95 0058 07B0 add sp, sp, #28 - 96 @ sp needed - 97 005a 30BD pop {r4, r5, pc} - 98 .L3: - 99 .align 2 - 100 .L2: - 101 005c 00100240 .word 1073876992 - 102 0060 FFFFBFFF .word -4194305 - 103 .cfi_endproc - 104 .LFE96: - 106 .section .text._Error_Handler,"ax",%progbits - 107 .align 1 - 108 .global _Error_Handler - 109 .syntax unified - 110 .code 16 - 111 .thumb_func - 112 .fpu softvfp - 114 _Error_Handler: - 115 .LFB97: - 105:./Src/debug.c **** - 106:./Src/debug.c **** #if 0 - 107:./Src/debug.c **** /** - 108:./Src/debug.c **** * @brief Error_Handler - 109:./Src/debug.c **** * @param None - 110:./Src/debug.c **** * @retval None - 111:./Src/debug.c **** */ - 112:./Src/debug.c **** void Error_Handler(void) - 113:./Src/debug.c **** { - 114:./Src/debug.c **** DBG_PRINTF("Error_Handler\n\r"); - 115:./Src/debug.c **** while(1); - 116:./Src/debug.c **** } - ARM GAS /tmp/ccWwZZVi.s page 5 - - - 117:./Src/debug.c **** #endif - 118:./Src/debug.c **** - 119:./Src/debug.c **** void _Error_Handler(char * file, int line) - 120:./Src/debug.c **** { - 116 .loc 1 120 0 - 117 .cfi_startproc - 118 @ args = 0, pretend = 0, frame = 0 - 119 @ frame_needed = 0, uses_anonymous_args = 0 - 120 .LVL5: - 121 0000 10B5 push {r4, lr} - 122 .LCFI2: - 123 .cfi_def_cfa_offset 8 - 124 .cfi_offset 4, -8 - 125 .cfi_offset 14, -4 - 121:./Src/debug.c **** /* USER CODE BEGIN Error_Handler_Debug */ - 122:./Src/debug.c **** PRINTF("INIT ERROR, %s:%d", file, (uint16_t) line); - 126 .loc 1 122 0 - 127 0002 0A04 lsls r2, r1, #16 - 128 0004 120C lsrs r2, r2, #16 - 129 0006 0100 movs r1, r0 - 130 .LVL6: - 131 0008 0148 ldr r0, .L5 - 132 .LVL7: - 133 000a FFF7FEFF bl vcom_Send - 134 .LVL8: - 123:./Src/debug.c **** /* USER CODE END Error_Handler_Debug */ - 124:./Src/debug.c **** } - 135 .loc 1 124 0 - 136 @ sp needed - 137 000e 10BD pop {r4, pc} - 138 .L6: - 139 .align 2 - 140 .L5: - 141 0010 00000000 .word .LC0 - 142 .cfi_endproc - 143 .LFE97: - 145 .section .rodata._Error_Handler.str1.4,"aMS",%progbits,1 - 146 .align 2 - 147 .LC0: - 148 0000 494E4954 .ascii "INIT ERROR, %s:%d\000" - 148 20455252 - 148 4F522C20 - 148 25733A25 - 148 6400 - 149 .text - 150 .Letext0: - 151 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 152 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 153 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 154 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 155 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 156 .file 7 "/usr/arm-none-eabi/include/math.h" - 157 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h" - 158 .file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 159 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 160 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h" - 161 .file 12 "Inc/vcom.h" - ARM GAS /tmp/ccWwZZVi.s page 6 - - - 162 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h" - 163 .file 14 "" - ARM GAS /tmp/ccWwZZVi.s page 7 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 debug.c - /tmp/ccWwZZVi.s:16 .text.DBG_Init:0000000000000000 $t - /tmp/ccWwZZVi.s:23 .text.DBG_Init:0000000000000000 DBG_Init - /tmp/ccWwZZVi.s:101 .text.DBG_Init:000000000000005c $d - /tmp/ccWwZZVi.s:107 .text._Error_Handler:0000000000000000 $t - /tmp/ccWwZZVi.s:114 .text._Error_Handler:0000000000000000 _Error_Handler - /tmp/ccWwZZVi.s:141 .text._Error_Handler:0000000000000010 $d - /tmp/ccWwZZVi.s:146 .rodata._Error_Handler.str1.4:0000000000000000 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -memset -HAL_GPIO_Init -HAL_DBGMCU_DisableDBGSleepMode -HAL_DBGMCU_DisableDBGStopMode -HAL_DBGMCU_DisableDBGStandbyMode -vcom_Send diff --git a/build/delay.d b/build/delay.d deleted file mode 100644 index 98ea7f9..0000000 --- a/build/delay.d +++ /dev/null @@ -1,141 +0,0 @@ -build/delay.d: Middlewares/Third_Party/Lora/Utilities/delay.c Inc/hw.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \ - Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \ - Inc/hw_spi.h Inc/hw_rtc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Inc/hw_msp.h Inc/debug.h Inc/vcom.h \ - Middlewares/Third_Party/Lora/Utilities/timeServer.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h - -Inc/hw.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: - -Inc/stm32l0xx_hw_conf.h: - -Inc/hw.h: - -Inc/hw_conf.h: - -Inc/hw_gpio.h: - -Inc/hw_spi.h: - -Inc/hw_rtc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Inc/hw_msp.h: - -Inc/debug.h: - -Inc/vcom.h: - -Middlewares/Third_Party/Lora/Utilities/timeServer.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: diff --git a/build/delay.lst b/build/delay.lst deleted file mode 100644 index 992cf05..0000000 --- a/build/delay.lst +++ /dev/null @@ -1,199 +0,0 @@ -ARM GAS /tmp/ccRLwJE7.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "delay.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.DelayMs,"ax",%progbits - 16 .align 1 - 17 .global DelayMs - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 DelayMs: - 24 .LFB96: - 25 .file 1 "./Middlewares/Third_Party/Lora/Utilities/delay.c" - 1:./Middlewares/Third_Party/Lora/Utilities/delay.c **** /* - 2:./Middlewares/Third_Party/Lora/Utilities/delay.c **** / _____) _ | | - 3:./Middlewares/Third_Party/Lora/Utilities/delay.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Middlewares/Third_Party/Lora/Utilities/delay.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Middlewares/Third_Party/Lora/Utilities/delay.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Middlewares/Third_Party/Lora/Utilities/delay.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Middlewares/Third_Party/Lora/Utilities/delay.c **** (C)2013 Semtech - 8:./Middlewares/Third_Party/Lora/Utilities/delay.c **** - 9:./Middlewares/Third_Party/Lora/Utilities/delay.c **** Description: Delay functions implementation - 10:./Middlewares/Third_Party/Lora/Utilities/delay.c **** - 11:./Middlewares/Third_Party/Lora/Utilities/delay.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 12:./Middlewares/Third_Party/Lora/Utilities/delay.c **** - 13:./Middlewares/Third_Party/Lora/Utilities/delay.c **** Maintainer: Miguel Luis and Gregory Cristian - 14:./Middlewares/Third_Party/Lora/Utilities/delay.c **** */ - 15:./Middlewares/Third_Party/Lora/Utilities/delay.c **** /****************************************************************************** - 16:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * @file delay.c - 17:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * @author MCD Application Team - 18:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * @version V1.1.2 - 19:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * @date 08-September-2017 - 20:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * @brief Delay function - 21:./Middlewares/Third_Party/Lora/Utilities/delay.c **** ****************************************************************************** - 22:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * @attention - 23:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * - 24:./Middlewares/Third_Party/Lora/Utilities/delay.c **** *

© Copyright (c) 2017 STMicroelectronics International N.V. - 25:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * All rights reserved.

- 26:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * - 27:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * Redistribution and use in source and binary forms, with or without - 28:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * modification, are permitted, provided that the following conditions are met: - 29:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * - 30:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * 1. Redistribution of source code must retain the above copyright notice, - 31:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * this list of conditions and the following disclaimer. - 32:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 33:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * this list of conditions and the following disclaimer in the documentation - ARM GAS /tmp/ccRLwJE7.s page 2 - - - 34:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * and/or other materials provided with the distribution. - 35:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * 3. Neither the name of STMicroelectronics nor the names of other - 36:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * contributors to this software may be used to endorse or promote products - 37:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * derived from this software without specific written permission. - 38:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * 4. This software, including modifications and/or derivative works of this - 39:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * software, must execute solely and exclusively on microcontroller or - 40:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * microprocessor devices manufactured by or for STMicroelectronics. - 41:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * 5. Redistribution and use of this software other than as permitted under - 42:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * this license is void and will automatically terminate your rights under - 43:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * this license. - 44:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * - 45:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - 46:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - 47:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - 48:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - 49:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - 50:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - 51:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - 52:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - 53:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - 54:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - 55:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - 56:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 57:./Middlewares/Third_Party/Lora/Utilities/delay.c **** * - 58:./Middlewares/Third_Party/Lora/Utilities/delay.c **** ****************************************************************************** - 59:./Middlewares/Third_Party/Lora/Utilities/delay.c **** */ - 60:./Middlewares/Third_Party/Lora/Utilities/delay.c **** - 61:./Middlewares/Third_Party/Lora/Utilities/delay.c **** /* Includes ------------------------------------------------------------------*/ - 62:./Middlewares/Third_Party/Lora/Utilities/delay.c **** #include "hw.h" - 63:./Middlewares/Third_Party/Lora/Utilities/delay.c **** #include "timeServer.h" - 64:./Middlewares/Third_Party/Lora/Utilities/delay.c **** - 65:./Middlewares/Third_Party/Lora/Utilities/delay.c **** void DelayMs( uint32_t ms ) - 66:./Middlewares/Third_Party/Lora/Utilities/delay.c **** { - 26 .loc 1 66 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 .LVL0: - 31 0000 10B5 push {r4, lr} - 32 .LCFI0: - 33 .cfi_def_cfa_offset 8 - 34 .cfi_offset 4, -8 - 35 .cfi_offset 14, -4 - 67:./Middlewares/Third_Party/Lora/Utilities/delay.c **** HW_RTC_DelayMs( ms ); - 36 .loc 1 67 0 - 37 0002 FFF7FEFF bl HW_RTC_DelayMs - 38 .LVL1: - 68:./Middlewares/Third_Party/Lora/Utilities/delay.c **** - 69:./Middlewares/Third_Party/Lora/Utilities/delay.c **** } - 39 .loc 1 69 0 - 40 @ sp needed - 41 0006 10BD pop {r4, pc} - 42 .cfi_endproc - 43 .LFE96: - 45 .global __aeabi_fmul - 46 .global __aeabi_f2uiz - 47 .section .text.Delay,"ax",%progbits - ARM GAS /tmp/ccRLwJE7.s page 3 - - - 48 .align 1 - 49 .global Delay - 50 .syntax unified - 51 .code 16 - 52 .thumb_func - 53 .fpu softvfp - 55 Delay: - 56 .LFB97: - 70:./Middlewares/Third_Party/Lora/Utilities/delay.c **** - 71:./Middlewares/Third_Party/Lora/Utilities/delay.c **** void Delay( float s ) - 72:./Middlewares/Third_Party/Lora/Utilities/delay.c **** { - 57 .loc 1 72 0 - 58 .cfi_startproc - 59 @ args = 0, pretend = 0, frame = 0 - 60 @ frame_needed = 0, uses_anonymous_args = 0 - 61 .LVL2: - 62 0000 10B5 push {r4, lr} - 63 .LCFI1: - 64 .cfi_def_cfa_offset 8 - 65 .cfi_offset 4, -8 - 66 .cfi_offset 14, -4 - 73:./Middlewares/Third_Party/Lora/Utilities/delay.c **** DelayMs( (uint32_t) (s * 1000.0f) ); - 67 .loc 1 73 0 - 68 0002 0449 ldr r1, .L3 - 69 0004 FFF7FEFF bl __aeabi_fmul - 70 .LVL3: - 71 0008 FFF7FEFF bl __aeabi_f2uiz - 72 .LVL4: - 73 .LBB4: - 74 .LBB5: - 67:./Middlewares/Third_Party/Lora/Utilities/delay.c **** - 75 .loc 1 67 0 - 76 000c FFF7FEFF bl HW_RTC_DelayMs - 77 .LVL5: - 78 .LBE5: - 79 .LBE4: - 74:./Middlewares/Third_Party/Lora/Utilities/delay.c **** } - 80 .loc 1 74 0 - 81 @ sp needed - 82 0010 10BD pop {r4, pc} - 83 .L4: - 84 0012 C046 .align 2 - 85 .L3: - 86 0014 00007A44 .word 1148846080 - 87 .cfi_endproc - 88 .LFE97: - 90 .text - 91 .Letext0: - 92 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 93 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 94 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 95 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 96 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 97 .file 7 "/usr/arm-none-eabi/include/math.h" - 98 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h" - 99 .file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 100 .file 10 "Inc/hw_rtc.h" - ARM GAS /tmp/ccRLwJE7.s page 4 - - - ARM GAS /tmp/ccRLwJE7.s page 5 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 delay.c - /tmp/ccRLwJE7.s:16 .text.DelayMs:0000000000000000 $t - /tmp/ccRLwJE7.s:23 .text.DelayMs:0000000000000000 DelayMs - /tmp/ccRLwJE7.s:48 .text.Delay:0000000000000000 $t - /tmp/ccRLwJE7.s:55 .text.Delay:0000000000000000 Delay - /tmp/ccRLwJE7.s:86 .text.Delay:0000000000000014 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -HW_RTC_DelayMs -__aeabi_fmul -__aeabi_f2uiz diff --git a/build/hw_gpio.d b/build/hw_gpio.d deleted file mode 100644 index e523ccd..0000000 --- a/build/hw_gpio.d +++ /dev/null @@ -1,135 +0,0 @@ -build/hw_gpio.d: Src/hw_gpio.c Inc/hw.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \ - Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \ - Inc/hw_spi.h Inc/hw_rtc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Inc/hw_msp.h Inc/debug.h Inc/vcom.h - -Inc/hw.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: - -Inc/stm32l0xx_hw_conf.h: - -Inc/hw.h: - -Inc/hw_conf.h: - -Inc/hw_gpio.h: - -Inc/hw_spi.h: - -Inc/hw_rtc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Inc/hw_msp.h: - -Inc/debug.h: - -Inc/vcom.h: diff --git a/build/hw_gpio.lst b/build/hw_gpio.lst deleted file mode 100644 index 1408729..0000000 --- a/build/hw_gpio.lst +++ /dev/null @@ -1,672 +0,0 @@ -ARM GAS /tmp/ccpOZGrp.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "hw_gpio.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.HW_GPIO_Init,"ax",%progbits - 16 .align 1 - 17 .global HW_GPIO_Init - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 HW_GPIO_Init: - 24 .LFB96: - 25 .file 1 "./Src/hw_gpio.c" - 1:./Src/hw_gpio.c **** /* - 2:./Src/hw_gpio.c **** / _____) _ | | - 3:./Src/hw_gpio.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Src/hw_gpio.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Src/hw_gpio.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Src/hw_gpio.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Src/hw_gpio.c **** (C)2013 Semtech - 8:./Src/hw_gpio.c **** - 9:./Src/hw_gpio.c **** Description: Bleeper board GPIO driver implementation - 10:./Src/hw_gpio.c **** - 11:./Src/hw_gpio.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 12:./Src/hw_gpio.c **** - 13:./Src/hw_gpio.c **** Maintainer: Miguel Luis and Gregory Cristian - 14:./Src/hw_gpio.c **** */ - 15:./Src/hw_gpio.c **** /****************************************************************************** - 16:./Src/hw_gpio.c **** * @file hw_gpio.c - 17:./Src/hw_gpio.c **** * @author MCD Application Team - 18:./Src/hw_gpio.c **** * @version V1.1.2 - 19:./Src/hw_gpio.c **** * @date 08-September-2017 - 20:./Src/hw_gpio.c **** * @brief driver for GPIO - 21:./Src/hw_gpio.c **** ****************************************************************************** - 22:./Src/hw_gpio.c **** * @attention - 23:./Src/hw_gpio.c **** * - 24:./Src/hw_gpio.c **** *

© Copyright (c) 2017 STMicroelectronics International N.V. - 25:./Src/hw_gpio.c **** * All rights reserved.

- 26:./Src/hw_gpio.c **** * - 27:./Src/hw_gpio.c **** * Redistribution and use in source and binary forms, with or without - 28:./Src/hw_gpio.c **** * modification, are permitted, provided that the following conditions are met: - 29:./Src/hw_gpio.c **** * - 30:./Src/hw_gpio.c **** * 1. Redistribution of source code must retain the above copyright notice, - 31:./Src/hw_gpio.c **** * this list of conditions and the following disclaimer. - 32:./Src/hw_gpio.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 33:./Src/hw_gpio.c **** * this list of conditions and the following disclaimer in the documentation - ARM GAS /tmp/ccpOZGrp.s page 2 - - - 34:./Src/hw_gpio.c **** * and/or other materials provided with the distribution. - 35:./Src/hw_gpio.c **** * 3. Neither the name of STMicroelectronics nor the names of other - 36:./Src/hw_gpio.c **** * contributors to this software may be used to endorse or promote products - 37:./Src/hw_gpio.c **** * derived from this software without specific written permission. - 38:./Src/hw_gpio.c **** * 4. This software, including modifications and/or derivative works of this - 39:./Src/hw_gpio.c **** * software, must execute solely and exclusively on microcontroller or - 40:./Src/hw_gpio.c **** * microprocessor devices manufactured by or for STMicroelectronics. - 41:./Src/hw_gpio.c **** * 5. Redistribution and use of this software other than as permitted under - 42:./Src/hw_gpio.c **** * this license is void and will automatically terminate your rights under - 43:./Src/hw_gpio.c **** * this license. - 44:./Src/hw_gpio.c **** * - 45:./Src/hw_gpio.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - 46:./Src/hw_gpio.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - 47:./Src/hw_gpio.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - 48:./Src/hw_gpio.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - 49:./Src/hw_gpio.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - 50:./Src/hw_gpio.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - 51:./Src/hw_gpio.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - 52:./Src/hw_gpio.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - 53:./Src/hw_gpio.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - 54:./Src/hw_gpio.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - 55:./Src/hw_gpio.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - 56:./Src/hw_gpio.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 57:./Src/hw_gpio.c **** * - 58:./Src/hw_gpio.c **** ****************************************************************************** - 59:./Src/hw_gpio.c **** */ - 60:./Src/hw_gpio.c **** - 61:./Src/hw_gpio.c **** /* Includes ------------------------------------------------------------------*/ - 62:./Src/hw_gpio.c **** #include "hw.h" - 63:./Src/hw_gpio.c **** - 64:./Src/hw_gpio.c **** /* Private typedef -----------------------------------------------------------*/ - 65:./Src/hw_gpio.c **** /* Private define ------------------------------------------------------------*/ - 66:./Src/hw_gpio.c **** /* Private macro -------------------------------------------------------------*/ - 67:./Src/hw_gpio.c **** /* Private variables ---------------------------------------------------------*/ - 68:./Src/hw_gpio.c **** static GpioIrqHandler *GpioIrq[16] = { NULL }; - 69:./Src/hw_gpio.c **** - 70:./Src/hw_gpio.c **** /* Private function prototypes -----------------------------------------------*/ - 71:./Src/hw_gpio.c **** - 72:./Src/hw_gpio.c **** static uint8_t HW_GPIO_GetBitPos(uint16_t GPIO_Pin); - 73:./Src/hw_gpio.c **** - 74:./Src/hw_gpio.c **** /* Exported functions ---------------------------------------------------------*/ - 75:./Src/hw_gpio.c **** /*! - 76:./Src/hw_gpio.c **** * @brief Initializes the given GPIO object - 77:./Src/hw_gpio.c **** * - 78:./Src/hw_gpio.c **** * @param GPIOx: where x can be (A..E and H) - 79:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. - 80:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). - 81:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 82:./Src/hw_gpio.c **** * @param [IN] initStruct GPIO_InitTypeDef intit structure - 83:./Src/hw_gpio.c **** * @retval none - 84:./Src/hw_gpio.c **** */ - 85:./Src/hw_gpio.c **** void HW_GPIO_Init( GPIO_TypeDef* port, uint16_t GPIO_Pin, GPIO_InitTypeDef* initStruct) - 86:./Src/hw_gpio.c **** { - 26 .loc 1 86 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 24 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccpOZGrp.s page 3 - - - 30 .LVL0: - 31 0000 30B5 push {r4, r5, lr} - 32 .LCFI0: - 33 .cfi_def_cfa_offset 12 - 34 .cfi_offset 4, -12 - 35 .cfi_offset 5, -8 - 36 .cfi_offset 14, -4 - 37 0002 87B0 sub sp, sp, #28 - 38 .LCFI1: - 39 .cfi_def_cfa_offset 40 - 87:./Src/hw_gpio.c **** - 88:./Src/hw_gpio.c **** RCC_GPIO_CLK_ENABLE( (uint32_t) port); - 40 .loc 1 88 0 - 41 0004 224C ldr r4, .L10 - 42 0006 A042 cmp r0, r4 - 43 0008 23D0 beq .L3 - 44 000a 0FD9 bls .L9 - 45 000c 214C ldr r4, .L10+4 - 46 000e A042 cmp r0, r4 - 47 0010 29D0 beq .L6 - 48 0012 214C ldr r4, .L10+8 - 49 0014 A042 cmp r0, r4 - 50 0016 30D1 bne .L2 - 51 .LBB6: - 52 .loc 1 88 0 is_stmt 0 discriminator 5 - 53 0018 204C ldr r4, .L10+12 - 54 001a E56A ldr r5, [r4, #44] - 55 001c 0823 movs r3, #8 - 56 001e 1D43 orrs r5, r3 - 57 0020 E562 str r5, [r4, #44] - 58 0022 E46A ldr r4, [r4, #44] - 59 0024 2340 ands r3, r4 - 60 0026 0493 str r3, [sp, #16] - 61 0028 049B ldr r3, [sp, #16] - 62 .LBE6: - 63 002a 0CE0 b .L8 - 64 .L9: - 65 .loc 1 88 0 - 66 002c A024 movs r4, #160 - 67 002e E405 lsls r4, r4, #23 - 68 0030 A042 cmp r0, r4 - 69 0032 22D1 bne .L2 - 70 .LBB7: - 71 .loc 1 88 0 discriminator 2 - 72 0034 194C ldr r4, .L10+12 - 73 0036 E56A ldr r5, [r4, #44] - 74 0038 0123 movs r3, #1 - 75 003a 1D43 orrs r5, r3 - 76 003c E562 str r5, [r4, #44] - 77 003e E46A ldr r4, [r4, #44] - 78 0040 2340 ands r3, r4 - 79 0042 0193 str r3, [sp, #4] - 80 0044 019B ldr r3, [sp, #4] - 81 .L8: - 82 .LBE7: - 89:./Src/hw_gpio.c **** - 90:./Src/hw_gpio.c **** initStruct->Pin = GPIO_Pin ; - ARM GAS /tmp/ccpOZGrp.s page 4 - - - 83 .loc 1 90 0 is_stmt 1 - 84 0046 1160 str r1, [r2] - 91:./Src/hw_gpio.c **** - 92:./Src/hw_gpio.c **** HAL_GPIO_Init( port, initStruct ); - 85 .loc 1 92 0 - 86 0048 1100 movs r1, r2 - 87 .LVL1: - 88 004a FFF7FEFF bl HAL_GPIO_Init - 89 .LVL2: - 93:./Src/hw_gpio.c **** } - 90 .loc 1 93 0 - 91 004e 07B0 add sp, sp, #28 - 92 @ sp needed - 93 0050 30BD pop {r4, r5, pc} - 94 .LVL3: - 95 .L3: - 96 .LBB8: - 88:./Src/hw_gpio.c **** - 97 .loc 1 88 0 discriminator 3 - 98 0052 124C ldr r4, .L10+12 - 99 0054 E56A ldr r5, [r4, #44] - 100 0056 0223 movs r3, #2 - 101 0058 1D43 orrs r5, r3 - 102 005a E562 str r5, [r4, #44] - 103 005c E46A ldr r4, [r4, #44] - 104 005e 2340 ands r3, r4 - 105 0060 0293 str r3, [sp, #8] - 106 0062 029B ldr r3, [sp, #8] - 107 .LBE8: - 108 0064 EFE7 b .L8 - 109 .L6: - 110 .LBB9: - 88:./Src/hw_gpio.c **** - 111 .loc 1 88 0 is_stmt 0 discriminator 4 - 112 0066 0D4C ldr r4, .L10+12 - 113 0068 E56A ldr r5, [r4, #44] - 114 006a 0423 movs r3, #4 - 115 006c 1D43 orrs r5, r3 - 116 006e E562 str r5, [r4, #44] - 117 0070 E46A ldr r4, [r4, #44] - 118 0072 2340 ands r3, r4 - 119 0074 0393 str r3, [sp, #12] - 120 0076 039B ldr r3, [sp, #12] - 121 .LBE9: - 122 0078 E5E7 b .L8 - 123 .L2: - 124 .LBB10: - 88:./Src/hw_gpio.c **** - 125 .loc 1 88 0 discriminator 1 - 126 007a 084C ldr r4, .L10+12 - 127 007c E56A ldr r5, [r4, #44] - 128 007e 8023 movs r3, #128 - 129 0080 1D43 orrs r5, r3 - 130 0082 E562 str r5, [r4, #44] - 131 0084 E46A ldr r4, [r4, #44] - 132 0086 2340 ands r3, r4 - 133 0088 0593 str r3, [sp, #20] - ARM GAS /tmp/ccpOZGrp.s page 5 - - - 134 008a 059B ldr r3, [sp, #20] - 135 008c DBE7 b .L8 - 136 .L11: - 137 008e C046 .align 2 - 138 .L10: - 139 0090 00040050 .word 1342178304 - 140 0094 00080050 .word 1342179328 - 141 0098 000C0050 .word 1342180352 - 142 009c 00100240 .word 1073876992 - 143 .LBE10: - 144 .cfi_endproc - 145 .LFE96: - 147 .section .text.HW_GPIO_SetIrq,"ax",%progbits - 148 .align 1 - 149 .global HW_GPIO_SetIrq - 150 .syntax unified - 151 .code 16 - 152 .thumb_func - 153 .fpu softvfp - 155 HW_GPIO_SetIrq: - 156 .LFB97: - 94:./Src/hw_gpio.c **** - 95:./Src/hw_gpio.c **** /*! - 96:./Src/hw_gpio.c **** * @brief Records the interrupt handler for the GPIO object - 97:./Src/hw_gpio.c **** * - 98:./Src/hw_gpio.c **** * @param GPIOx: where x can be (A..E and H) - 99:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. - 100:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). - 101:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 102:./Src/hw_gpio.c **** * @param [IN] prio NVIC priority (0 is highest) - 103:./Src/hw_gpio.c **** * @param [IN] irqHandler points to the function to execute - 104:./Src/hw_gpio.c **** * @retval none - 105:./Src/hw_gpio.c **** */ - 106:./Src/hw_gpio.c **** void HW_GPIO_SetIrq( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, uint32_t prio, GpioIrqHandler *irqHan - 107:./Src/hw_gpio.c **** { - 157 .loc 1 107 0 is_stmt 1 - 158 .cfi_startproc - 159 @ args = 0, pretend = 0, frame = 0 - 160 @ frame_needed = 0, uses_anonymous_args = 0 - 161 .LVL4: - 162 0000 70B5 push {r4, r5, r6, lr} - 163 .LCFI2: - 164 .cfi_def_cfa_offset 16 - 165 .cfi_offset 4, -16 - 166 .cfi_offset 5, -12 - 167 .cfi_offset 6, -8 - 168 .cfi_offset 14, -4 - 169 0002 1400 movs r4, r2 - 170 .LVL5: - 171 .LBB11: - 172 .LBB12: - 108:./Src/hw_gpio.c **** IRQn_Type IRQnb; - 109:./Src/hw_gpio.c **** - 110:./Src/hw_gpio.c **** uint32_t BitPos = HW_GPIO_GetBitPos( GPIO_Pin ) ; - 111:./Src/hw_gpio.c **** - 112:./Src/hw_gpio.c **** if ( irqHandler != NULL) - 113:./Src/hw_gpio.c **** { - ARM GAS /tmp/ccpOZGrp.s page 6 - - - 114:./Src/hw_gpio.c **** GpioIrq[ BitPos ] = irqHandler; - 115:./Src/hw_gpio.c **** - 116:./Src/hw_gpio.c **** IRQnb = MSP_GetIRQn( GPIO_Pin ); - 117:./Src/hw_gpio.c **** - 118:./Src/hw_gpio.c **** HAL_NVIC_SetPriority( IRQnb , prio, 0); - 119:./Src/hw_gpio.c **** - 120:./Src/hw_gpio.c **** HAL_NVIC_EnableIRQ( IRQnb ); - 121:./Src/hw_gpio.c **** } - 122:./Src/hw_gpio.c **** } - 123:./Src/hw_gpio.c **** - 124:./Src/hw_gpio.c **** /*! - 125:./Src/hw_gpio.c **** * @brief Execute the interrupt from the object - 126:./Src/hw_gpio.c **** * - 127:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. - 128:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). - 129:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 130:./Src/hw_gpio.c **** * @retval none - 131:./Src/hw_gpio.c **** */ - 132:./Src/hw_gpio.c **** void HW_GPIO_IrqHandler( uint16_t GPIO_Pin ) - 133:./Src/hw_gpio.c **** { - 134:./Src/hw_gpio.c **** uint32_t BitPos = HW_GPIO_GetBitPos( GPIO_Pin ); - 135:./Src/hw_gpio.c **** - 136:./Src/hw_gpio.c **** if ( GpioIrq[ BitPos ] != NULL) - 137:./Src/hw_gpio.c **** { - 138:./Src/hw_gpio.c **** GpioIrq[ BitPos ] ( ); - 139:./Src/hw_gpio.c **** } - 140:./Src/hw_gpio.c **** } - 141:./Src/hw_gpio.c **** - 142:./Src/hw_gpio.c **** /*! - 143:./Src/hw_gpio.c **** * @brief Writes the given value to the GPIO output - 144:./Src/hw_gpio.c **** * - 145:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. - 146:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). - 147:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 148:./Src/hw_gpio.c **** * @param [IN] value New GPIO output value - 149:./Src/hw_gpio.c **** * @retval none - 150:./Src/hw_gpio.c **** */ - 151:./Src/hw_gpio.c **** void HW_GPIO_Write( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, uint32_t value ) - 152:./Src/hw_gpio.c **** { - 153:./Src/hw_gpio.c **** HAL_GPIO_WritePin( GPIOx, GPIO_Pin , (GPIO_PinState) value ); - 154:./Src/hw_gpio.c **** } - 155:./Src/hw_gpio.c **** - 156:./Src/hw_gpio.c **** /*! - 157:./Src/hw_gpio.c **** * @brief Reads the current GPIO input value - 158:./Src/hw_gpio.c **** * - 159:./Src/hw_gpio.c **** * @param GPIOx: where x can be (A..E and H) - 160:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. - 161:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). - 162:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 163:./Src/hw_gpio.c **** * @retval value Current GPIO input value - 164:./Src/hw_gpio.c **** */ - 165:./Src/hw_gpio.c **** uint32_t HW_GPIO_Read( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin ) - 166:./Src/hw_gpio.c **** { - 167:./Src/hw_gpio.c **** return HAL_GPIO_ReadPin( GPIOx, GPIO_Pin); - 168:./Src/hw_gpio.c **** } - 169:./Src/hw_gpio.c **** - 170:./Src/hw_gpio.c **** /* Private functions ---------------------------------------------------------*/ - ARM GAS /tmp/ccpOZGrp.s page 7 - - - 171:./Src/hw_gpio.c **** - 172:./Src/hw_gpio.c **** /*! - 173:./Src/hw_gpio.c **** * @brief Get the position of the bit set in the GPIO_Pin - 174:./Src/hw_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. - 175:./Src/hw_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). - 176:./Src/hw_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 177:./Src/hw_gpio.c **** * @retval the position of the bit - 178:./Src/hw_gpio.c **** */ - 179:./Src/hw_gpio.c **** static uint8_t HW_GPIO_GetBitPos(uint16_t GPIO_Pin) - 180:./Src/hw_gpio.c **** { - 181:./Src/hw_gpio.c **** uint8_t PinPos=0; - 182:./Src/hw_gpio.c **** - 183:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xFF00 ) != 0) { PinPos |= 0x8; } - 173 .loc 1 183 0 - 174 0004 FF22 movs r2, #255 - 175 .LVL6: - 176 0006 0800 movs r0, r1 - 177 .LVL7: - 178 0008 9043 bics r0, r2 - 179 000a 021E subs r2, r0, #0 - 180 000c 00D0 beq .L13 - 181 000e 0822 movs r2, #8 - 182 .L13: - 183 .LVL8: - 184:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xF0F0 ) != 0) { PinPos |= 0x4; } - 184 .loc 1 184 0 - 185 0010 0F48 ldr r0, .L19 - 186 0012 0142 tst r1, r0 - 187 0014 01D0 beq .L14 - 188 0016 0420 movs r0, #4 - 189 0018 0243 orrs r2, r0 - 190 .LVL9: - 191 .L14: - 185:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xCCCC ) != 0) { PinPos |= 0x2; } - 192 .loc 1 185 0 - 193 001a 0E48 ldr r0, .L19+4 - 194 001c 0142 tst r1, r0 - 195 001e 01D0 beq .L15 - 196 0020 0220 movs r0, #2 - 197 0022 0243 orrs r2, r0 - 198 .LVL10: - 199 .L15: - 186:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xAAAA ) != 0) { PinPos |= 0x1; } - 200 .loc 1 186 0 - 201 0024 0C48 ldr r0, .L19+8 - 202 0026 0142 tst r1, r0 - 203 0028 01D0 beq .L16 - 204 002a 0120 movs r0, #1 - 205 002c 0243 orrs r2, r0 - 206 .LVL11: - 207 .L16: - 208 .LBE12: - 209 .LBE11: - 112:./Src/hw_gpio.c **** { - 210 .loc 1 112 0 - 211 002e 002B cmp r3, #0 - 212 0030 0DD0 beq .L12 - ARM GAS /tmp/ccpOZGrp.s page 8 - - - 114:./Src/hw_gpio.c **** - 213 .loc 1 114 0 - 214 0032 9200 lsls r2, r2, #2 - 215 .LVL12: - 216 0034 0948 ldr r0, .L19+12 - 217 0036 1350 str r3, [r2, r0] - 116:./Src/hw_gpio.c **** - 218 .loc 1 116 0 - 219 0038 0800 movs r0, r1 - 220 003a FFF7FEFF bl MSP_GetIRQn - 221 .LVL13: - 222 003e 0500 movs r5, r0 - 223 .LVL14: - 118:./Src/hw_gpio.c **** - 224 .loc 1 118 0 - 225 0040 0022 movs r2, #0 - 226 0042 2100 movs r1, r4 - 227 0044 FFF7FEFF bl HAL_NVIC_SetPriority - 228 .LVL15: - 120:./Src/hw_gpio.c **** } - 229 .loc 1 120 0 - 230 0048 2800 movs r0, r5 - 231 004a FFF7FEFF bl HAL_NVIC_EnableIRQ - 232 .LVL16: - 233 .L12: - 122:./Src/hw_gpio.c **** - 234 .loc 1 122 0 - 235 @ sp needed - 236 .LVL17: - 237 004e 70BD pop {r4, r5, r6, pc} - 238 .L20: - 239 .align 2 - 240 .L19: - 241 0050 F0F0FFFF .word -3856 - 242 0054 CCCCFFFF .word -13108 - 243 0058 AAAAFFFF .word -21846 - 244 005c 00000000 .word .LANCHOR0 - 245 .cfi_endproc - 246 .LFE97: - 248 .section .text.HW_GPIO_IrqHandler,"ax",%progbits - 249 .align 1 - 250 .global HW_GPIO_IrqHandler - 251 .syntax unified - 252 .code 16 - 253 .thumb_func - 254 .fpu softvfp - 256 HW_GPIO_IrqHandler: - 257 .LFB98: - 133:./Src/hw_gpio.c **** uint32_t BitPos = HW_GPIO_GetBitPos( GPIO_Pin ); - 258 .loc 1 133 0 - 259 .cfi_startproc - 260 @ args = 0, pretend = 0, frame = 0 - 261 @ frame_needed = 0, uses_anonymous_args = 0 - 262 .LVL18: - 263 0000 10B5 push {r4, lr} - 264 .LCFI3: - 265 .cfi_def_cfa_offset 8 - ARM GAS /tmp/ccpOZGrp.s page 9 - - - 266 .cfi_offset 4, -8 - 267 .cfi_offset 14, -4 - 268 .LVL19: - 269 .LBB13: - 270 .LBB14: - 183:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xF0F0 ) != 0) { PinPos |= 0x4; } - 271 .loc 1 183 0 - 272 0002 FF23 movs r3, #255 - 273 0004 0200 movs r2, r0 - 274 0006 9A43 bics r2, r3 - 275 0008 131E subs r3, r2, #0 - 276 000a 00D0 beq .L22 - 277 000c 0823 movs r3, #8 - 278 .L22: - 279 .LVL20: - 184:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xCCCC ) != 0) { PinPos |= 0x2; } - 280 .loc 1 184 0 - 281 000e 0B4A ldr r2, .L28 - 282 0010 1042 tst r0, r2 - 283 0012 01D0 beq .L23 - 284 0014 0422 movs r2, #4 - 285 0016 1343 orrs r3, r2 - 286 .LVL21: - 287 .L23: - 185:./Src/hw_gpio.c **** if ( ( GPIO_Pin & 0xAAAA ) != 0) { PinPos |= 0x1; } - 288 .loc 1 185 0 - 289 0018 094A ldr r2, .L28+4 - 290 001a 1042 tst r0, r2 - 291 001c 01D0 beq .L24 - 292 001e 0222 movs r2, #2 - 293 0020 1343 orrs r3, r2 - 294 .LVL22: - 295 .L24: - 296 .loc 1 186 0 - 297 0022 084A ldr r2, .L28+8 - 298 0024 1042 tst r0, r2 - 299 0026 01D0 beq .L25 - 300 0028 0122 movs r2, #1 - 301 002a 1343 orrs r3, r2 - 302 .LVL23: - 303 .L25: - 304 .LBE14: - 305 .LBE13: - 136:./Src/hw_gpio.c **** { - 306 .loc 1 136 0 - 307 002c 9B00 lsls r3, r3, #2 - 308 .LVL24: - 309 002e 064A ldr r2, .L28+12 - 310 0030 9B58 ldr r3, [r3, r2] - 311 0032 002B cmp r3, #0 - 312 0034 00D0 beq .L21 - 138:./Src/hw_gpio.c **** } - 313 .loc 1 138 0 - 314 0036 9847 blx r3 - 315 .LVL25: - 316 .L21: - 140:./Src/hw_gpio.c **** - ARM GAS /tmp/ccpOZGrp.s page 10 - - - 317 .loc 1 140 0 - 318 @ sp needed - 319 0038 10BD pop {r4, pc} - 320 .L29: - 321 003a C046 .align 2 - 322 .L28: - 323 003c F0F0FFFF .word -3856 - 324 0040 CCCCFFFF .word -13108 - 325 0044 AAAAFFFF .word -21846 - 326 0048 00000000 .word .LANCHOR0 - 327 .cfi_endproc - 328 .LFE98: - 330 .section .text.HW_GPIO_Write,"ax",%progbits - 331 .align 1 - 332 .global HW_GPIO_Write - 333 .syntax unified - 334 .code 16 - 335 .thumb_func - 336 .fpu softvfp - 338 HW_GPIO_Write: - 339 .LFB99: - 152:./Src/hw_gpio.c **** HAL_GPIO_WritePin( GPIOx, GPIO_Pin , (GPIO_PinState) value ); - 340 .loc 1 152 0 - 341 .cfi_startproc - 342 @ args = 0, pretend = 0, frame = 0 - 343 @ frame_needed = 0, uses_anonymous_args = 0 - 344 .LVL26: - 345 0000 10B5 push {r4, lr} - 346 .LCFI4: - 347 .cfi_def_cfa_offset 8 - 348 .cfi_offset 4, -8 - 349 .cfi_offset 14, -4 - 153:./Src/hw_gpio.c **** } - 350 .loc 1 153 0 - 351 0002 D2B2 uxtb r2, r2 - 352 .LVL27: - 353 0004 FFF7FEFF bl HAL_GPIO_WritePin - 354 .LVL28: - 154:./Src/hw_gpio.c **** - 355 .loc 1 154 0 - 356 @ sp needed - 357 0008 10BD pop {r4, pc} - 358 .cfi_endproc - 359 .LFE99: - 361 .section .text.HW_GPIO_Read,"ax",%progbits - 362 .align 1 - 363 .global HW_GPIO_Read - 364 .syntax unified - 365 .code 16 - 366 .thumb_func - 367 .fpu softvfp - 369 HW_GPIO_Read: - 370 .LFB100: - 166:./Src/hw_gpio.c **** return HAL_GPIO_ReadPin( GPIOx, GPIO_Pin); - 371 .loc 1 166 0 - 372 .cfi_startproc - 373 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccpOZGrp.s page 11 - - - 374 @ frame_needed = 0, uses_anonymous_args = 0 - 375 .LVL29: - 376 0000 10B5 push {r4, lr} - 377 .LCFI5: - 378 .cfi_def_cfa_offset 8 - 379 .cfi_offset 4, -8 - 380 .cfi_offset 14, -4 - 167:./Src/hw_gpio.c **** } - 381 .loc 1 167 0 - 382 0002 FFF7FEFF bl HAL_GPIO_ReadPin - 383 .LVL30: - 168:./Src/hw_gpio.c **** - 384 .loc 1 168 0 - 385 @ sp needed - 386 0006 10BD pop {r4, pc} - 387 .cfi_endproc - 388 .LFE100: - 390 .section .bss.GpioIrq,"aw",%nobits - 391 .align 2 - 392 .set .LANCHOR0,. + 0 - 395 GpioIrq: - 396 0000 00000000 .space 64 - 396 00000000 - 396 00000000 - 396 00000000 - 396 00000000 - 397 .text - 398 .Letext0: - 399 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 400 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 401 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 402 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 403 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 404 .file 7 "/usr/arm-none-eabi/include/math.h" - 405 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h" - 406 .file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 407 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 408 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h" - 409 .file 12 "Inc/hw_gpio.h" - 410 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h" - ARM GAS /tmp/ccpOZGrp.s page 12 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 hw_gpio.c - /tmp/ccpOZGrp.s:16 .text.HW_GPIO_Init:0000000000000000 $t - /tmp/ccpOZGrp.s:23 .text.HW_GPIO_Init:0000000000000000 HW_GPIO_Init - /tmp/ccpOZGrp.s:139 .text.HW_GPIO_Init:0000000000000090 $d - /tmp/ccpOZGrp.s:148 .text.HW_GPIO_SetIrq:0000000000000000 $t - /tmp/ccpOZGrp.s:155 .text.HW_GPIO_SetIrq:0000000000000000 HW_GPIO_SetIrq - /tmp/ccpOZGrp.s:241 .text.HW_GPIO_SetIrq:0000000000000050 $d - /tmp/ccpOZGrp.s:249 .text.HW_GPIO_IrqHandler:0000000000000000 $t - /tmp/ccpOZGrp.s:256 .text.HW_GPIO_IrqHandler:0000000000000000 HW_GPIO_IrqHandler - /tmp/ccpOZGrp.s:323 .text.HW_GPIO_IrqHandler:000000000000003c $d - /tmp/ccpOZGrp.s:331 .text.HW_GPIO_Write:0000000000000000 $t - /tmp/ccpOZGrp.s:338 .text.HW_GPIO_Write:0000000000000000 HW_GPIO_Write - /tmp/ccpOZGrp.s:362 .text.HW_GPIO_Read:0000000000000000 $t - /tmp/ccpOZGrp.s:369 .text.HW_GPIO_Read:0000000000000000 HW_GPIO_Read - /tmp/ccpOZGrp.s:391 .bss.GpioIrq:0000000000000000 $d - /tmp/ccpOZGrp.s:395 .bss.GpioIrq:0000000000000000 GpioIrq - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -HAL_GPIO_Init -MSP_GetIRQn -HAL_NVIC_SetPriority -HAL_NVIC_EnableIRQ -HAL_GPIO_WritePin -HAL_GPIO_ReadPin diff --git a/build/hw_i2c.d b/build/hw_i2c.d deleted file mode 100644 index c2023d5..0000000 --- a/build/hw_i2c.d +++ /dev/null @@ -1,141 +0,0 @@ -build/hw_i2c.d: Src/hw_i2c.c Inc/hw.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \ - Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \ - Inc/hw_spi.h Inc/hw_rtc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Inc/hw_msp.h Inc/debug.h Inc/vcom.h Inc/hw_i2c.h Inc/main.h Inc/debug.h - -Inc/hw.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: - -Inc/stm32l0xx_hw_conf.h: - -Inc/hw.h: - -Inc/hw_conf.h: - -Inc/hw_gpio.h: - -Inc/hw_spi.h: - -Inc/hw_rtc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Inc/hw_msp.h: - -Inc/debug.h: - -Inc/vcom.h: - -Inc/hw_i2c.h: - -Inc/main.h: - -Inc/debug.h: diff --git a/build/hw_i2c.lst b/build/hw_i2c.lst deleted file mode 100644 index 38e7f8c..0000000 --- a/build/hw_i2c.lst +++ /dev/null @@ -1,486 +0,0 @@ -ARM GAS /tmp/ccdg55Po.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "hw_i2c.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.MX_I2C1_Init,"ax",%progbits - 16 .align 1 - 17 .global MX_I2C1_Init - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 MX_I2C1_Init: - 24 .LFB97: - 25 .file 1 "./Src/hw_i2c.c" - 1:./Src/hw_i2c.c **** /** - 2:./Src/hw_i2c.c **** ****************************************************************************** - 3:./Src/hw_i2c.c **** * File Name : I2C.c - 4:./Src/hw_i2c.c **** * Description : This file provides code for the configuration - 5:./Src/hw_i2c.c **** * of the I2C instances. - 6:./Src/hw_i2c.c **** ****************************************************************************** - 7:./Src/hw_i2c.c **** ** This notice applies to any and all portions of this file - 8:./Src/hw_i2c.c **** * that are not between comment pairs USER CODE BEGIN and - 9:./Src/hw_i2c.c **** * USER CODE END. Other portions of this file, whether - 10:./Src/hw_i2c.c **** * inserted by the user or by software development tools - 11:./Src/hw_i2c.c **** * are owned by their respective copyright owners. - 12:./Src/hw_i2c.c **** * - 13:./Src/hw_i2c.c **** * COPYRIGHT(c) 2017 STMicroelectronics - 14:./Src/hw_i2c.c **** * - 15:./Src/hw_i2c.c **** * Redistribution and use in source and binary forms, with or without modification, - 16:./Src/hw_i2c.c **** * are permitted provided that the following conditions are met: - 17:./Src/hw_i2c.c **** * 1. Redistributions of source code must retain the above copyright notice, - 18:./Src/hw_i2c.c **** * this list of conditions and the following disclaimer. - 19:./Src/hw_i2c.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 20:./Src/hw_i2c.c **** * this list of conditions and the following disclaimer in the documentation - 21:./Src/hw_i2c.c **** * and/or other materials provided with the distribution. - 22:./Src/hw_i2c.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - 23:./Src/hw_i2c.c **** * may be used to endorse or promote products derived from this software - 24:./Src/hw_i2c.c **** * without specific prior written permission. - 25:./Src/hw_i2c.c **** * - 26:./Src/hw_i2c.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 27:./Src/hw_i2c.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 28:./Src/hw_i2c.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 29:./Src/hw_i2c.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 30:./Src/hw_i2c.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 31:./Src/hw_i2c.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 32:./Src/hw_i2c.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 33:./Src/hw_i2c.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - ARM GAS /tmp/ccdg55Po.s page 2 - - - 34:./Src/hw_i2c.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 35:./Src/hw_i2c.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 36:./Src/hw_i2c.c **** * - 37:./Src/hw_i2c.c **** ****************************************************************************** - 38:./Src/hw_i2c.c **** */ - 39:./Src/hw_i2c.c **** - 40:./Src/hw_i2c.c **** /* Includes ------------------------------------------------------------------*/ - 41:./Src/hw_i2c.c **** #include "hw.h" - 42:./Src/hw_i2c.c **** #include "hw_i2c.h" - 43:./Src/hw_i2c.c **** #include "debug.h" - 44:./Src/hw_i2c.c **** - 45:./Src/hw_i2c.c **** static inline uint32_t setupTiming(void) - 46:./Src/hw_i2c.c **** { - 47:./Src/hw_i2c.c **** const uint32_t presc = 15; - 48:./Src/hw_i2c.c **** - 49:./Src/hw_i2c.c **** // delays - 50:./Src/hw_i2c.c **** const uint32_t sdadel = 2; - 51:./Src/hw_i2c.c **** const uint32_t scldel = 2; - 52:./Src/hw_i2c.c **** - 53:./Src/hw_i2c.c **** const uint32_t scll = 6; - 54:./Src/hw_i2c.c **** const uint32_t sclh = 7; - 55:./Src/hw_i2c.c **** - 56:./Src/hw_i2c.c **** return presc << I2C_TIMINGR_PRESC_Pos | - 57:./Src/hw_i2c.c **** scldel << I2C_TIMINGR_SCLDEL_Pos | - 58:./Src/hw_i2c.c **** sdadel << I2C_TIMINGR_SDADEL_Pos | - 59:./Src/hw_i2c.c **** sclh << I2C_TIMINGR_SCLH_Pos | - 60:./Src/hw_i2c.c **** scll << I2C_TIMINGR_SCLL_Pos; - 61:./Src/hw_i2c.c **** } - 62:./Src/hw_i2c.c **** - 63:./Src/hw_i2c.c **** I2C_HandleTypeDef hi2c1; - 64:./Src/hw_i2c.c **** - 65:./Src/hw_i2c.c **** /* I2C1 init function */ - 66:./Src/hw_i2c.c **** void MX_I2C1_Init(void) - 67:./Src/hw_i2c.c **** { - 26 .loc 1 67 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 0000 10B5 push {r4, lr} - 31 .LCFI0: - 32 .cfi_def_cfa_offset 8 - 33 .cfi_offset 4, -8 - 34 .cfi_offset 14, -4 - 68:./Src/hw_i2c.c **** hi2c1.Instance = I2C1; - 35 .loc 1 68 0 - 36 0002 1748 ldr r0, .L8 - 37 0004 174B ldr r3, .L8+4 - 38 0006 0360 str r3, [r0] - 39 .LVL0: - 69:./Src/hw_i2c.c **** hi2c1.Init.Timing = setupTiming(); //0x00000708; - 40 .loc 1 69 0 - 41 0008 174B ldr r3, .L8+8 - 42 000a 4360 str r3, [r0, #4] - 70:./Src/hw_i2c.c **** hi2c1.Init.OwnAddress1 = 0; - 43 .loc 1 70 0 - 44 000c 0023 movs r3, #0 - 45 000e 8360 str r3, [r0, #8] - ARM GAS /tmp/ccdg55Po.s page 3 - - - 71:./Src/hw_i2c.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 46 .loc 1 71 0 - 47 0010 0122 movs r2, #1 - 48 0012 C260 str r2, [r0, #12] - 72:./Src/hw_i2c.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 49 .loc 1 72 0 - 50 0014 0361 str r3, [r0, #16] - 73:./Src/hw_i2c.c **** hi2c1.Init.OwnAddress2 = 0; - 51 .loc 1 73 0 - 52 0016 4361 str r3, [r0, #20] - 74:./Src/hw_i2c.c **** hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK; - 53 .loc 1 74 0 - 54 0018 8361 str r3, [r0, #24] - 75:./Src/hw_i2c.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 55 .loc 1 75 0 - 56 001a C361 str r3, [r0, #28] - 76:./Src/hw_i2c.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 57 .loc 1 76 0 - 58 001c 0362 str r3, [r0, #32] - 77:./Src/hw_i2c.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK) - 59 .loc 1 77 0 - 60 001e FFF7FEFF bl HAL_I2C_Init - 61 .LVL1: - 62 0022 0028 cmp r0, #0 - 63 0024 0CD1 bne .L5 - 64 .L2: - 78:./Src/hw_i2c.c **** { - 79:./Src/hw_i2c.c **** _Error_Handler(__FILE__, __LINE__); - 80:./Src/hw_i2c.c **** } - 81:./Src/hw_i2c.c **** - 82:./Src/hw_i2c.c **** /**Configure Analogue filter - 83:./Src/hw_i2c.c **** */ - 84:./Src/hw_i2c.c **** if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK) - 65 .loc 1 84 0 - 66 0026 0021 movs r1, #0 - 67 0028 0D48 ldr r0, .L8 - 68 002a FFF7FEFF bl HAL_I2CEx_ConfigAnalogFilter - 69 .LVL2: - 70 002e 0028 cmp r0, #0 - 71 0030 0BD1 bne .L6 - 72 .L3: - 85:./Src/hw_i2c.c **** { - 86:./Src/hw_i2c.c **** _Error_Handler(__FILE__, __LINE__); - 87:./Src/hw_i2c.c **** } - 88:./Src/hw_i2c.c **** - 89:./Src/hw_i2c.c **** /**Configure Digital filter - 90:./Src/hw_i2c.c **** */ - 91:./Src/hw_i2c.c **** if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK) - 73 .loc 1 91 0 - 74 0032 0021 movs r1, #0 - 75 0034 0A48 ldr r0, .L8 - 76 0036 FFF7FEFF bl HAL_I2CEx_ConfigDigitalFilter - 77 .LVL3: - 78 003a 0028 cmp r0, #0 - 79 003c 0AD1 bne .L7 - 80 .L1: - 92:./Src/hw_i2c.c **** { - ARM GAS /tmp/ccdg55Po.s page 4 - - - 93:./Src/hw_i2c.c **** _Error_Handler(__FILE__, __LINE__); - 94:./Src/hw_i2c.c **** } - 95:./Src/hw_i2c.c **** - 96:./Src/hw_i2c.c **** } - 81 .loc 1 96 0 - 82 @ sp needed - 83 003e 10BD pop {r4, pc} - 84 .L5: - 79:./Src/hw_i2c.c **** } - 85 .loc 1 79 0 - 86 0040 4F21 movs r1, #79 - 87 0042 0A48 ldr r0, .L8+12 - 88 0044 FFF7FEFF bl _Error_Handler - 89 .LVL4: - 90 0048 EDE7 b .L2 - 91 .L6: - 86:./Src/hw_i2c.c **** } - 92 .loc 1 86 0 - 93 004a 5621 movs r1, #86 - 94 004c 0748 ldr r0, .L8+12 - 95 004e FFF7FEFF bl _Error_Handler - 96 .LVL5: - 97 0052 EEE7 b .L3 - 98 .L7: - 93:./Src/hw_i2c.c **** } - 99 .loc 1 93 0 - 100 0054 5D21 movs r1, #93 - 101 0056 0548 ldr r0, .L8+12 - 102 0058 FFF7FEFF bl _Error_Handler - 103 .LVL6: - 104 .loc 1 96 0 - 105 005c EFE7 b .L1 - 106 .L9: - 107 005e C046 .align 2 - 108 .L8: - 109 0060 00000000 .word .LANCHOR0 - 110 0064 00540040 .word 1073763328 - 111 0068 060722F0 .word -266205434 - 112 006c 00000000 .word .LC1 - 113 .cfi_endproc - 114 .LFE97: - 116 .section .text.HAL_I2C_MspInit,"ax",%progbits - 117 .align 1 - 118 .global HAL_I2C_MspInit - 119 .syntax unified - 120 .code 16 - 121 .thumb_func - 122 .fpu softvfp - 124 HAL_I2C_MspInit: - 125 .LFB98: - 97:./Src/hw_i2c.c **** - 98:./Src/hw_i2c.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) - 99:./Src/hw_i2c.c **** { - 126 .loc 1 99 0 - 127 .cfi_startproc - 128 @ args = 0, pretend = 0, frame = 24 - 129 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccdg55Po.s page 5 - - - 130 .LVL7: - 131 0000 00B5 push {lr} - 132 .LCFI1: - 133 .cfi_def_cfa_offset 4 - 134 .cfi_offset 14, -4 - 135 0002 87B0 sub sp, sp, #28 - 136 .LCFI2: - 137 .cfi_def_cfa_offset 32 - 100:./Src/hw_i2c.c **** - 101:./Src/hw_i2c.c **** GPIO_InitTypeDef GPIO_InitStruct; - 102:./Src/hw_i2c.c **** if(i2cHandle->Instance==I2C1) - 138 .loc 1 102 0 - 139 0004 0268 ldr r2, [r0] - 140 0006 0D4B ldr r3, .L13 - 141 0008 9A42 cmp r2, r3 - 142 000a 01D0 beq .L12 - 143 .LVL8: - 144 .L10: - 103:./Src/hw_i2c.c **** { - 104:./Src/hw_i2c.c **** /* USER CODE BEGIN I2C1_MspInit 0 */ - 105:./Src/hw_i2c.c **** - 106:./Src/hw_i2c.c **** /* USER CODE END I2C1_MspInit 0 */ - 107:./Src/hw_i2c.c **** - 108:./Src/hw_i2c.c **** /**I2C1 GPIO Configuration - 109:./Src/hw_i2c.c **** PB8 ------> I2C1_SCL - 110:./Src/hw_i2c.c **** PB9 ------> I2C1_SDA - 111:./Src/hw_i2c.c **** */ - 112:./Src/hw_i2c.c **** GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9; - 113:./Src/hw_i2c.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 114:./Src/hw_i2c.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; - 115:./Src/hw_i2c.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 116:./Src/hw_i2c.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; - 117:./Src/hw_i2c.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 118:./Src/hw_i2c.c **** - 119:./Src/hw_i2c.c **** /* I2C1 clock enable */ - 120:./Src/hw_i2c.c **** __HAL_RCC_I2C1_CLK_ENABLE(); - 121:./Src/hw_i2c.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ - 122:./Src/hw_i2c.c **** - 123:./Src/hw_i2c.c **** /* USER CODE END I2C1_MspInit 1 */ - 124:./Src/hw_i2c.c **** } - 125:./Src/hw_i2c.c **** } - 145 .loc 1 125 0 - 146 000c 07B0 add sp, sp, #28 - 147 @ sp needed - 148 000e 00BD pop {pc} - 149 .LVL9: - 150 .L12: - 112:./Src/hw_i2c.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 151 .loc 1 112 0 - 152 0010 C023 movs r3, #192 - 153 0012 9B00 lsls r3, r3, #2 - 154 0014 0193 str r3, [sp, #4] - 113:./Src/hw_i2c.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; - 155 .loc 1 113 0 - 156 0016 1223 movs r3, #18 - 157 0018 0293 str r3, [sp, #8] - 114:./Src/hw_i2c.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - ARM GAS /tmp/ccdg55Po.s page 6 - - - 158 .loc 1 114 0 - 159 001a 113B subs r3, r3, #17 - 160 001c 0393 str r3, [sp, #12] - 115:./Src/hw_i2c.c **** GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; - 161 .loc 1 115 0 - 162 001e 0233 adds r3, r3, #2 - 163 0020 0493 str r3, [sp, #16] - 116:./Src/hw_i2c.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 164 .loc 1 116 0 - 165 0022 0133 adds r3, r3, #1 - 166 0024 0593 str r3, [sp, #20] - 117:./Src/hw_i2c.c **** - 167 .loc 1 117 0 - 168 0026 01A9 add r1, sp, #4 - 169 0028 0548 ldr r0, .L13+4 - 170 .LVL10: - 171 002a FFF7FEFF bl HAL_GPIO_Init - 172 .LVL11: - 120:./Src/hw_i2c.c **** /* USER CODE BEGIN I2C1_MspInit 1 */ - 173 .loc 1 120 0 - 174 002e 054A ldr r2, .L13+8 - 175 0030 916B ldr r1, [r2, #56] - 176 0032 8023 movs r3, #128 - 177 0034 9B03 lsls r3, r3, #14 - 178 0036 0B43 orrs r3, r1 - 179 0038 9363 str r3, [r2, #56] - 180 .loc 1 125 0 - 181 003a E7E7 b .L10 - 182 .L14: - 183 .align 2 - 184 .L13: - 185 003c 00540040 .word 1073763328 - 186 0040 00040050 .word 1342178304 - 187 0044 00100240 .word 1073876992 - 188 .cfi_endproc - 189 .LFE98: - 191 .section .text.HAL_I2C_MspDeInit,"ax",%progbits - 192 .align 1 - 193 .global HAL_I2C_MspDeInit - 194 .syntax unified - 195 .code 16 - 196 .thumb_func - 197 .fpu softvfp - 199 HAL_I2C_MspDeInit: - 200 .LFB99: - 126:./Src/hw_i2c.c **** - 127:./Src/hw_i2c.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle) - 128:./Src/hw_i2c.c **** { - 201 .loc 1 128 0 - 202 .cfi_startproc - 203 @ args = 0, pretend = 0, frame = 0 - 204 @ frame_needed = 0, uses_anonymous_args = 0 - 205 .LVL12: - 206 0000 10B5 push {r4, lr} - 207 .LCFI3: - 208 .cfi_def_cfa_offset 8 - 209 .cfi_offset 4, -8 - ARM GAS /tmp/ccdg55Po.s page 7 - - - 210 .cfi_offset 14, -4 - 129:./Src/hw_i2c.c **** - 130:./Src/hw_i2c.c **** if(i2cHandle->Instance==I2C1) - 211 .loc 1 130 0 - 212 0002 0268 ldr r2, [r0] - 213 0004 074B ldr r3, .L18 - 214 0006 9A42 cmp r2, r3 - 215 0008 00D0 beq .L17 - 216 .LVL13: - 217 .L15: - 131:./Src/hw_i2c.c **** { - 132:./Src/hw_i2c.c **** /* USER CODE BEGIN I2C1_MspDeInit 0 */ - 133:./Src/hw_i2c.c **** - 134:./Src/hw_i2c.c **** /* USER CODE END I2C1_MspDeInit 0 */ - 135:./Src/hw_i2c.c **** /* Peripheral clock disable */ - 136:./Src/hw_i2c.c **** __HAL_RCC_I2C1_CLK_DISABLE(); - 137:./Src/hw_i2c.c **** - 138:./Src/hw_i2c.c **** /**I2C1 GPIO Configuration - 139:./Src/hw_i2c.c **** PB8 ------> I2C1_SCL - 140:./Src/hw_i2c.c **** PB9 ------> I2C1_SDA - 141:./Src/hw_i2c.c **** */ - 142:./Src/hw_i2c.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8|GPIO_PIN_9); - 143:./Src/hw_i2c.c **** - 144:./Src/hw_i2c.c **** /* USER CODE BEGIN I2C1_MspDeInit 1 */ - 145:./Src/hw_i2c.c **** - 146:./Src/hw_i2c.c **** /* USER CODE END I2C1_MspDeInit 1 */ - 147:./Src/hw_i2c.c **** } - 148:./Src/hw_i2c.c **** } - 218 .loc 1 148 0 - 219 @ sp needed - 220 000a 10BD pop {r4, pc} - 221 .LVL14: - 222 .L17: - 136:./Src/hw_i2c.c **** - 223 .loc 1 136 0 - 224 000c 064A ldr r2, .L18+4 - 225 000e 936B ldr r3, [r2, #56] - 226 0010 0649 ldr r1, .L18+8 - 227 0012 0B40 ands r3, r1 - 228 0014 9363 str r3, [r2, #56] - 142:./Src/hw_i2c.c **** - 229 .loc 1 142 0 - 230 0016 C021 movs r1, #192 - 231 0018 8900 lsls r1, r1, #2 - 232 001a 0548 ldr r0, .L18+12 - 233 .LVL15: - 234 001c FFF7FEFF bl HAL_GPIO_DeInit - 235 .LVL16: - 236 .loc 1 148 0 - 237 0020 F3E7 b .L15 - 238 .L19: - 239 0022 C046 .align 2 - 240 .L18: - 241 0024 00540040 .word 1073763328 - 242 0028 00100240 .word 1073876992 - 243 002c FFFFDFFF .word -2097153 - 244 0030 00040050 .word 1342178304 - ARM GAS /tmp/ccdg55Po.s page 8 - - - 245 .cfi_endproc - 246 .LFE99: - 248 .global hi2c1 - 249 .section .bss.hi2c1,"aw",%nobits - 250 .align 2 - 251 .set .LANCHOR0,. + 0 - 254 hi2c1: - 255 0000 00000000 .space 76 - 255 00000000 - 255 00000000 - 255 00000000 - 255 00000000 - 256 .section .rodata.MX_I2C1_Init.str1.4,"aMS",%progbits,1 - 257 .align 2 - 258 .LC1: - 259 0000 2E2F5372 .ascii "./Src/hw_i2c.c\000" - 259 632F6877 - 259 5F693263 - 259 2E6300 - 260 .text - 261 .Letext0: - 262 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 263 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 264 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 265 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 266 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 267 .file 7 "/usr/arm-none-eabi/include/math.h" - 268 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h" - 269 .file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 270 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 271 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 272 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h" - 273 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h" - 274 .file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h" - 275 .file 15 "Inc/hw_i2c.h" - 276 .file 16 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h" - 277 .file 17 "Inc/debug.h" - ARM GAS /tmp/ccdg55Po.s page 9 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 hw_i2c.c - /tmp/ccdg55Po.s:16 .text.MX_I2C1_Init:0000000000000000 $t - /tmp/ccdg55Po.s:23 .text.MX_I2C1_Init:0000000000000000 MX_I2C1_Init - /tmp/ccdg55Po.s:109 .text.MX_I2C1_Init:0000000000000060 $d - /tmp/ccdg55Po.s:117 .text.HAL_I2C_MspInit:0000000000000000 $t - /tmp/ccdg55Po.s:124 .text.HAL_I2C_MspInit:0000000000000000 HAL_I2C_MspInit - /tmp/ccdg55Po.s:185 .text.HAL_I2C_MspInit:000000000000003c $d - /tmp/ccdg55Po.s:192 .text.HAL_I2C_MspDeInit:0000000000000000 $t - /tmp/ccdg55Po.s:199 .text.HAL_I2C_MspDeInit:0000000000000000 HAL_I2C_MspDeInit - /tmp/ccdg55Po.s:241 .text.HAL_I2C_MspDeInit:0000000000000024 $d - /tmp/ccdg55Po.s:254 .bss.hi2c1:0000000000000000 hi2c1 - /tmp/ccdg55Po.s:250 .bss.hi2c1:0000000000000000 $d - /tmp/ccdg55Po.s:257 .rodata.MX_I2C1_Init.str1.4:0000000000000000 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -HAL_I2C_Init -HAL_I2CEx_ConfigAnalogFilter -HAL_I2CEx_ConfigDigitalFilter -_Error_Handler -HAL_GPIO_Init -HAL_GPIO_DeInit diff --git a/build/hw_rtc.d b/build/hw_rtc.d deleted file mode 100644 index 622eea4..0000000 --- a/build/hw_rtc.d +++ /dev/null @@ -1,138 +0,0 @@ -build/hw_rtc.d: Src/hw_rtc.c Inc/hw.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \ - Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \ - Inc/hw_spi.h Inc/hw_rtc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Inc/hw_msp.h Inc/debug.h Inc/vcom.h \ - Middlewares/Third_Party/Lora/Utilities/low_power.h - -Inc/hw.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: - -Inc/stm32l0xx_hw_conf.h: - -Inc/hw.h: - -Inc/hw_conf.h: - -Inc/hw_gpio.h: - -Inc/hw_spi.h: - -Inc/hw_rtc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Inc/hw_msp.h: - -Inc/debug.h: - -Inc/vcom.h: - -Middlewares/Third_Party/Lora/Utilities/low_power.h: diff --git a/build/hw_rtc.lst b/build/hw_rtc.lst deleted file mode 100644 index 9a7a2c1..0000000 --- a/build/hw_rtc.lst +++ /dev/null @@ -1,2705 +0,0 @@ -ARM GAS /tmp/ccGAhXKe.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "hw_rtc.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.HW_RTC_GetCalendarValue,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 HW_RTC_GetCalendarValue: - 23 .LFB113: - 24 .file 1 "./Src/hw_rtc.c" - 1:./Src/hw_rtc.c **** /* - 2:./Src/hw_rtc.c **** / _____) _ | | - 3:./Src/hw_rtc.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Src/hw_rtc.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Src/hw_rtc.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Src/hw_rtc.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Src/hw_rtc.c **** (C)2013 Semtech - 8:./Src/hw_rtc.c **** - 9:./Src/hw_rtc.c **** Description: MCU RTC timer - 10:./Src/hw_rtc.c **** - 11:./Src/hw_rtc.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 12:./Src/hw_rtc.c **** - 13:./Src/hw_rtc.c **** Maintainer: Miguel Luis and Gregory Cristian - 14:./Src/hw_rtc.c **** */ - 15:./Src/hw_rtc.c **** /******************************************************************************* - 16:./Src/hw_rtc.c **** * @file hw_rtc.c - 17:./Src/hw_rtc.c **** * @author MCD Application Team - 18:./Src/hw_rtc.c **** * @version V1.1.2 - 19:./Src/hw_rtc.c **** * @date 08-September-2017 - 20:./Src/hw_rtc.c **** * @brief driver for RTC - 21:./Src/hw_rtc.c **** ****************************************************************************** - 22:./Src/hw_rtc.c **** * @attention - 23:./Src/hw_rtc.c **** * - 24:./Src/hw_rtc.c **** *

© Copyright (c) 2017 STMicroelectronics International N.V. - 25:./Src/hw_rtc.c **** * All rights reserved.

- 26:./Src/hw_rtc.c **** * - 27:./Src/hw_rtc.c **** * Redistribution and use in source and binary forms, with or without - 28:./Src/hw_rtc.c **** * modification, are permitted, provided that the following conditions are met: - 29:./Src/hw_rtc.c **** * - 30:./Src/hw_rtc.c **** * 1. Redistribution of source code must retain the above copyright notice, - 31:./Src/hw_rtc.c **** * this list of conditions and the following disclaimer. - 32:./Src/hw_rtc.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 33:./Src/hw_rtc.c **** * this list of conditions and the following disclaimer in the documentation - 34:./Src/hw_rtc.c **** * and/or other materials provided with the distribution. - ARM GAS /tmp/ccGAhXKe.s page 2 - - - 35:./Src/hw_rtc.c **** * 3. Neither the name of STMicroelectronics nor the names of other - 36:./Src/hw_rtc.c **** * contributors to this software may be used to endorse or promote products - 37:./Src/hw_rtc.c **** * derived from this software without specific written permission. - 38:./Src/hw_rtc.c **** * 4. This software, including modifications and/or derivative works of this - 39:./Src/hw_rtc.c **** * software, must execute solely and exclusively on microcontroller or - 40:./Src/hw_rtc.c **** * microprocessor devices manufactured by or for STMicroelectronics. - 41:./Src/hw_rtc.c **** * 5. Redistribution and use of this software other than as permitted under - 42:./Src/hw_rtc.c **** * this license is void and will automatically terminate your rights under - 43:./Src/hw_rtc.c **** * this license. - 44:./Src/hw_rtc.c **** * - 45:./Src/hw_rtc.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - 46:./Src/hw_rtc.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - 47:./Src/hw_rtc.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - 48:./Src/hw_rtc.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - 49:./Src/hw_rtc.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - 50:./Src/hw_rtc.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - 51:./Src/hw_rtc.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - 52:./Src/hw_rtc.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - 53:./Src/hw_rtc.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - 54:./Src/hw_rtc.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - 55:./Src/hw_rtc.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - 56:./Src/hw_rtc.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 57:./Src/hw_rtc.c **** * - 58:./Src/hw_rtc.c **** ****************************************************************************** - 59:./Src/hw_rtc.c **** */ - 60:./Src/hw_rtc.c **** - 61:./Src/hw_rtc.c **** /* Includes ------------------------------------------------------------------*/ - 62:./Src/hw_rtc.c **** #include "hw.h" - 63:./Src/hw_rtc.c **** #include "low_power.h" - 64:./Src/hw_rtc.c **** - 65:./Src/hw_rtc.c **** /* Private typedef -----------------------------------------------------------*/ - 66:./Src/hw_rtc.c **** typedef struct - 67:./Src/hw_rtc.c **** { - 68:./Src/hw_rtc.c **** TimerTime_t Rtc_Time; /* Reference time */ - 69:./Src/hw_rtc.c **** - 70:./Src/hw_rtc.c **** RTC_TimeTypeDef RTC_Calndr_Time; /* Reference time in calendar format */ - 71:./Src/hw_rtc.c **** - 72:./Src/hw_rtc.c **** RTC_DateTypeDef RTC_Calndr_Date; /* Reference date in calendar format */ - 73:./Src/hw_rtc.c **** - 74:./Src/hw_rtc.c **** } RtcTimerContext_t; - 75:./Src/hw_rtc.c **** - 76:./Src/hw_rtc.c **** /* Private define ------------------------------------------------------------*/ - 77:./Src/hw_rtc.c **** - 78:./Src/hw_rtc.c **** /* MCU Wake Up Time */ - 79:./Src/hw_rtc.c **** #define MIN_ALARM_DELAY 3 /* in ticks */ - 80:./Src/hw_rtc.c **** - 81:./Src/hw_rtc.c **** /* subsecond number of bits */ - 82:./Src/hw_rtc.c **** #define N_PREDIV_S 10 - 83:./Src/hw_rtc.c **** - 84:./Src/hw_rtc.c **** /* Synchonuous prediv */ - 85:./Src/hw_rtc.c **** #define PREDIV_S ((1<>N_PREDIV_S) - 101:./Src/hw_rtc.c **** - 102:./Src/hw_rtc.c **** #define COMMON_FACTOR 3 - 103:./Src/hw_rtc.c **** #define CONV_NUMER (MSEC_NUMBER>>COMMON_FACTOR) - 104:./Src/hw_rtc.c **** #define CONV_DENOM (1<<(N_PREDIV_S-COMMON_FACTOR)) - 105:./Src/hw_rtc.c **** - 106:./Src/hw_rtc.c **** #define DAYS_IN_LEAP_YEAR (uint32_t) 366 - 107:./Src/hw_rtc.c **** - 108:./Src/hw_rtc.c **** #define DAYS_IN_YEAR (uint32_t) 365 - 109:./Src/hw_rtc.c **** - 110:./Src/hw_rtc.c **** #define SECONDS_IN_1DAY (uint32_t) 86400 - 111:./Src/hw_rtc.c **** - 112:./Src/hw_rtc.c **** #define SECONDS_IN_1HOUR (uint32_t) 3600 - 113:./Src/hw_rtc.c **** - 114:./Src/hw_rtc.c **** #define SECONDS_IN_1MINUTE (uint32_t) 60 - 115:./Src/hw_rtc.c **** - 116:./Src/hw_rtc.c **** #define MINUTES_IN_1HOUR (uint32_t) 60 - 117:./Src/hw_rtc.c **** - 118:./Src/hw_rtc.c **** #define HOURS_IN_1DAY (uint32_t) 24 - 119:./Src/hw_rtc.c **** - 120:./Src/hw_rtc.c **** #define DAYS_IN_MONTH_CORRECTION_NORM ((uint32_t) 0x99AAA0 ) - 121:./Src/hw_rtc.c **** #define DAYS_IN_MONTH_CORRECTION_LEAP ((uint32_t) 0x445550 ) - 122:./Src/hw_rtc.c **** - 123:./Src/hw_rtc.c **** - 124:./Src/hw_rtc.c **** /* Calculates ceiling(X/N) */ - 125:./Src/hw_rtc.c **** #define DIVC(X,N) ( ( (X) + (N) -1 ) / (N) ) - 126:./Src/hw_rtc.c **** - 127:./Src/hw_rtc.c **** - 128:./Src/hw_rtc.c **** /* Private macro -------------------------------------------------------------*/ - 129:./Src/hw_rtc.c **** /* Private variables ---------------------------------------------------------*/ - 130:./Src/hw_rtc.c **** /*! - 131:./Src/hw_rtc.c **** * \brief Indicates if the RTC is already Initalized or not - 132:./Src/hw_rtc.c **** */ - 133:./Src/hw_rtc.c **** static bool HW_RTC_Initalized = false; - 134:./Src/hw_rtc.c **** - 135:./Src/hw_rtc.c **** /*! - 136:./Src/hw_rtc.c **** * \brief compensates MCU wakeup time - 137:./Src/hw_rtc.c **** */ - 138:./Src/hw_rtc.c **** - 139:./Src/hw_rtc.c **** static bool McuWakeUpTimeInitialized = false; - 140:./Src/hw_rtc.c **** - 141:./Src/hw_rtc.c **** /*! - 142:./Src/hw_rtc.c **** * \brief compensates MCU wakeup time - 143:./Src/hw_rtc.c **** */ - 144:./Src/hw_rtc.c **** - 145:./Src/hw_rtc.c **** static int16_t McuWakeUpTimeCal = 0; - 146:./Src/hw_rtc.c **** - 147:./Src/hw_rtc.c **** /*! - 148:./Src/hw_rtc.c **** * Number of days in each month on a normal year - ARM GAS /tmp/ccGAhXKe.s page 4 - - - 149:./Src/hw_rtc.c **** */ - 150:./Src/hw_rtc.c **** static const uint8_t DaysInMonth[] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; - 151:./Src/hw_rtc.c **** - 152:./Src/hw_rtc.c **** /*! - 153:./Src/hw_rtc.c **** * Number of days in each month on a leap year - 154:./Src/hw_rtc.c **** */ - 155:./Src/hw_rtc.c **** static const uint8_t DaysInMonthLeapYear[] = { 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; - 156:./Src/hw_rtc.c **** - 157:./Src/hw_rtc.c **** static RTC_HandleTypeDef RtcHandle={0}; - 158:./Src/hw_rtc.c **** - 159:./Src/hw_rtc.c **** static RTC_AlarmTypeDef RTC_AlarmStructure; - 160:./Src/hw_rtc.c **** - 161:./Src/hw_rtc.c **** /*! - 162:./Src/hw_rtc.c **** * Keep the value of the RTC timer when the RTC alarm is set - 163:./Src/hw_rtc.c **** * Set with the HW_RTC_SetTimerContext function - 164:./Src/hw_rtc.c **** * Value is kept as a Reference to calculate alarm - 165:./Src/hw_rtc.c **** */ - 166:./Src/hw_rtc.c **** static RtcTimerContext_t RtcTimerContext; - 167:./Src/hw_rtc.c **** - 168:./Src/hw_rtc.c **** /* Private function prototypes -----------------------------------------------*/ - 169:./Src/hw_rtc.c **** - 170:./Src/hw_rtc.c **** static void HW_RTC_SetConfig( void ); - 171:./Src/hw_rtc.c **** - 172:./Src/hw_rtc.c **** static void HW_RTC_SetAlarmConfig( void ); - 173:./Src/hw_rtc.c **** - 174:./Src/hw_rtc.c **** static void HW_RTC_StartWakeUpAlarm( uint32_t timeoutValue ); - 175:./Src/hw_rtc.c **** - 176:./Src/hw_rtc.c **** static TimerTime_t HW_RTC_GetCalendarValue( RTC_DateTypeDef* RTC_DateStruct, RTC_TimeTypeDef* RTC_ - 177:./Src/hw_rtc.c **** - 178:./Src/hw_rtc.c **** /* Exported functions ---------------------------------------------------------*/ - 179:./Src/hw_rtc.c **** - 180:./Src/hw_rtc.c **** /*! - 181:./Src/hw_rtc.c **** * @brief Initializes the RTC timer - 182:./Src/hw_rtc.c **** * @note The timer is based on the RTC - 183:./Src/hw_rtc.c **** * @param none - 184:./Src/hw_rtc.c **** * @retval none - 185:./Src/hw_rtc.c **** */ - 186:./Src/hw_rtc.c **** void HW_RTC_Init( void ) - 187:./Src/hw_rtc.c **** { - 188:./Src/hw_rtc.c **** if( HW_RTC_Initalized == false ) - 189:./Src/hw_rtc.c **** { - 190:./Src/hw_rtc.c **** HW_RTC_SetConfig( ); - 191:./Src/hw_rtc.c **** HW_RTC_SetAlarmConfig( ); - 192:./Src/hw_rtc.c **** HW_RTC_SetTimerContext( ); - 193:./Src/hw_rtc.c **** HW_RTC_Initalized = true; - 194:./Src/hw_rtc.c **** } - 195:./Src/hw_rtc.c **** } - 196:./Src/hw_rtc.c **** - 197:./Src/hw_rtc.c **** /*! - 198:./Src/hw_rtc.c **** * @brief Configures the RTC timer - 199:./Src/hw_rtc.c **** * @note The timer is based on the RTC - 200:./Src/hw_rtc.c **** * @param none - 201:./Src/hw_rtc.c **** * @retval none - 202:./Src/hw_rtc.c **** */ - 203:./Src/hw_rtc.c **** static void HW_RTC_SetConfig( void ) - 204:./Src/hw_rtc.c **** { - 205:./Src/hw_rtc.c **** RTC_TimeTypeDef RTC_TimeStruct; - ARM GAS /tmp/ccGAhXKe.s page 5 - - - 206:./Src/hw_rtc.c **** RTC_DateTypeDef RTC_DateStruct; - 207:./Src/hw_rtc.c **** - 208:./Src/hw_rtc.c **** RtcHandle.Instance = RTC; - 209:./Src/hw_rtc.c **** - 210:./Src/hw_rtc.c **** RtcHandle.Init.HourFormat = RTC_HOURFORMAT_24; - 211:./Src/hw_rtc.c **** RtcHandle.Init.AsynchPrediv = PREDIV_A; /* RTC_ASYNCH_PREDIV; */ - 212:./Src/hw_rtc.c **** RtcHandle.Init.SynchPrediv = PREDIV_S; /* RTC_SYNCH_PREDIV; */ - 213:./Src/hw_rtc.c **** RtcHandle.Init.OutPut = RTC_OUTPUT; - 214:./Src/hw_rtc.c **** RtcHandle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; - 215:./Src/hw_rtc.c **** RtcHandle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; - 216:./Src/hw_rtc.c **** - 217:./Src/hw_rtc.c **** HAL_RTC_Init( &RtcHandle ); - 218:./Src/hw_rtc.c **** - 219:./Src/hw_rtc.c **** /*Monday 1st January 2016*/ - 220:./Src/hw_rtc.c **** RTC_DateStruct.Year = 0; - 221:./Src/hw_rtc.c **** RTC_DateStruct.Month = RTC_MONTH_JANUARY; - 222:./Src/hw_rtc.c **** RTC_DateStruct.Date = 1; - 223:./Src/hw_rtc.c **** RTC_DateStruct.WeekDay = RTC_WEEKDAY_MONDAY; - 224:./Src/hw_rtc.c **** HAL_RTC_SetDate(&RtcHandle , &RTC_DateStruct, RTC_FORMAT_BIN); - 225:./Src/hw_rtc.c **** - 226:./Src/hw_rtc.c **** /*at 0:0:0*/ - 227:./Src/hw_rtc.c **** RTC_TimeStruct.Hours = 0; - 228:./Src/hw_rtc.c **** RTC_TimeStruct.Minutes = 0; - 229:./Src/hw_rtc.c **** - 230:./Src/hw_rtc.c **** RTC_TimeStruct.Seconds = 0; - 231:./Src/hw_rtc.c **** RTC_TimeStruct.TimeFormat = 0; - 232:./Src/hw_rtc.c **** RTC_TimeStruct.SubSeconds = 0; - 233:./Src/hw_rtc.c **** RTC_TimeStruct.StoreOperation = RTC_DAYLIGHTSAVING_NONE; - 234:./Src/hw_rtc.c **** RTC_TimeStruct.DayLightSaving = RTC_STOREOPERATION_RESET; - 235:./Src/hw_rtc.c **** - 236:./Src/hw_rtc.c **** HAL_RTC_SetTime(&RtcHandle , &RTC_TimeStruct, RTC_FORMAT_BIN); - 237:./Src/hw_rtc.c **** - 238:./Src/hw_rtc.c **** /*Enable Direct Read of the calendar registers (not through Shadow) */ - 239:./Src/hw_rtc.c **** HAL_RTCEx_EnableBypassShadow(&RtcHandle); - 240:./Src/hw_rtc.c **** } - 241:./Src/hw_rtc.c **** - 242:./Src/hw_rtc.c **** /*! - 243:./Src/hw_rtc.c **** * @brief calculates the wake up time between wake up and mcu start - 244:./Src/hw_rtc.c **** * @note resulotion in RTC_ALARM_TIME_BASE in timer ticks - 245:./Src/hw_rtc.c **** * @param none - 246:./Src/hw_rtc.c **** * @retval none - 247:./Src/hw_rtc.c **** */ - 248:./Src/hw_rtc.c **** void HW_RTC_setMcuWakeUpTime( void ) - 249:./Src/hw_rtc.c **** { - 250:./Src/hw_rtc.c **** RTC_TimeTypeDef RTC_TimeStruct; - 251:./Src/hw_rtc.c **** RTC_DateTypeDef RTC_DateStruct; - 252:./Src/hw_rtc.c **** - 253:./Src/hw_rtc.c **** TimerTime_t now, hit; - 254:./Src/hw_rtc.c **** int16_t McuWakeUpTime; - 255:./Src/hw_rtc.c **** - 256:./Src/hw_rtc.c **** if ((McuWakeUpTimeInitialized == false) && - 257:./Src/hw_rtc.c **** ( HAL_NVIC_GetPendingIRQ( RTC_Alarm_IRQn ) == 1)) - 258:./Src/hw_rtc.c **** { /* warning: works ok if now is below 30 days - 259:./Src/hw_rtc.c **** it is ok since it's done once at first alarm wake-up*/ - 260:./Src/hw_rtc.c **** McuWakeUpTimeInitialized = true; - 261:./Src/hw_rtc.c **** now = HW_RTC_GetCalendarValue( &RTC_DateStruct, &RTC_TimeStruct ); - 262:./Src/hw_rtc.c **** - ARM GAS /tmp/ccGAhXKe.s page 6 - - - 263:./Src/hw_rtc.c **** DBG_GPIO_SET(GPIOB, GPIO_PIN_13); - 264:./Src/hw_rtc.c **** DBG_GPIO_RST(GPIOB, GPIO_PIN_13); - 265:./Src/hw_rtc.c **** HAL_RTC_GetAlarm(&RtcHandle, &RTC_AlarmStructure, RTC_ALARM_A, RTC_FORMAT_BIN ); - 266:./Src/hw_rtc.c **** hit = RTC_AlarmStructure.AlarmTime.Seconds+ - 267:./Src/hw_rtc.c **** 60*(RTC_AlarmStructure.AlarmTime.Minutes+ - 268:./Src/hw_rtc.c **** 60*(RTC_AlarmStructure.AlarmTime.Hours+ - 269:./Src/hw_rtc.c **** 24*(RTC_AlarmStructure.AlarmDateWeekDay))); - 270:./Src/hw_rtc.c **** hit = ( hit << N_PREDIV_S ) + (PREDIV_S - RTC_AlarmStructure.AlarmTime.SubSeconds); - 271:./Src/hw_rtc.c **** - 272:./Src/hw_rtc.c **** McuWakeUpTime = (int16_t) ((now-hit)); - 273:./Src/hw_rtc.c **** McuWakeUpTimeCal += McuWakeUpTime; - 274:./Src/hw_rtc.c **** DBG_PRINTF("Cal=%d, %d\n\r",McuWakeUpTimeCal, McuWakeUpTime); - 275:./Src/hw_rtc.c **** } - 276:./Src/hw_rtc.c **** } - 277:./Src/hw_rtc.c **** - 278:./Src/hw_rtc.c **** int16_t HW_RTC_getMcuWakeUpTime( void ) - 279:./Src/hw_rtc.c **** { - 280:./Src/hw_rtc.c **** return McuWakeUpTimeCal; - 281:./Src/hw_rtc.c **** } - 282:./Src/hw_rtc.c **** - 283:./Src/hw_rtc.c **** /*! - 284:./Src/hw_rtc.c **** * @brief returns the wake up time in ticks - 285:./Src/hw_rtc.c **** * @param none - 286:./Src/hw_rtc.c **** * @retval wake up time in ticks - 287:./Src/hw_rtc.c **** */ - 288:./Src/hw_rtc.c **** uint32_t HW_RTC_GetMinimumTimeout( void ) - 289:./Src/hw_rtc.c **** { - 290:./Src/hw_rtc.c **** return( MIN_ALARM_DELAY ); - 291:./Src/hw_rtc.c **** } - 292:./Src/hw_rtc.c **** - 293:./Src/hw_rtc.c **** /*! - 294:./Src/hw_rtc.c **** * @brief converts time in ms to time in ticks - 295:./Src/hw_rtc.c **** * @param [IN] time in milliseconds - 296:./Src/hw_rtc.c **** * @retval returns time in timer ticks - 297:./Src/hw_rtc.c **** */ - 298:./Src/hw_rtc.c **** uint32_t HW_RTC_ms2Tick( TimerTime_t timeMicroSec ) - 299:./Src/hw_rtc.c **** { - 300:./Src/hw_rtc.c **** /*return( ( timeMicroSec / RTC_ALARM_TIME_BASE ) ); */ - 301:./Src/hw_rtc.c **** return ( uint32_t) ( ( ((uint64_t)timeMicroSec) * CONV_DENOM ) / CONV_NUMER ); - 302:./Src/hw_rtc.c **** } - 303:./Src/hw_rtc.c **** - 304:./Src/hw_rtc.c **** /*! - 305:./Src/hw_rtc.c **** * @brief converts time in ticks to time in ms - 306:./Src/hw_rtc.c **** * @param [IN] time in timer ticks - 307:./Src/hw_rtc.c **** * @retval returns time in milliseconds - 308:./Src/hw_rtc.c **** */ - 309:./Src/hw_rtc.c **** TimerTime_t HW_RTC_Tick2ms( uint32_t tick ) - 310:./Src/hw_rtc.c **** { - 311:./Src/hw_rtc.c **** /*return( ( timeMicroSec * RTC_ALARM_TIME_BASE ) ); */ - 312:./Src/hw_rtc.c **** return ( ( (uint64_t)( tick )* CONV_NUMER ) / CONV_DENOM ); - 313:./Src/hw_rtc.c **** } - 314:./Src/hw_rtc.c **** - 315:./Src/hw_rtc.c **** /*! - 316:./Src/hw_rtc.c **** * @brief Set the alarm - 317:./Src/hw_rtc.c **** * @note The alarm is set at now (read in this funtion) + timeout - 318:./Src/hw_rtc.c **** * @param timeout Duration of the Timer ticks - 319:./Src/hw_rtc.c **** */ - ARM GAS /tmp/ccGAhXKe.s page 7 - - - 320:./Src/hw_rtc.c **** void HW_RTC_SetAlarm( uint32_t timeout ) - 321:./Src/hw_rtc.c **** { - 322:./Src/hw_rtc.c **** /* we don't go in Low Power mode for timeout below MIN_ALARM_DELAY */ - 323:./Src/hw_rtc.c **** if ( (MIN_ALARM_DELAY + McuWakeUpTimeCal ) < ((timeout - HW_RTC_GetTimerElapsedTime( ) )) ) - 324:./Src/hw_rtc.c **** { - 325:./Src/hw_rtc.c **** LowPower_Enable( e_LOW_POWER_RTC ); - 326:./Src/hw_rtc.c **** } - 327:./Src/hw_rtc.c **** else - 328:./Src/hw_rtc.c **** { - 329:./Src/hw_rtc.c **** LowPower_Disable( e_LOW_POWER_RTC ); - 330:./Src/hw_rtc.c **** } - 331:./Src/hw_rtc.c **** - 332:./Src/hw_rtc.c **** if( LowPower_GetState() == 0 ) - 333:./Src/hw_rtc.c **** { - 334:./Src/hw_rtc.c **** LowPower_Enable( e_LOW_POWER_RTC ); - 335:./Src/hw_rtc.c **** timeout = timeout - McuWakeUpTimeCal; - 336:./Src/hw_rtc.c **** } - 337:./Src/hw_rtc.c **** - 338:./Src/hw_rtc.c **** HW_RTC_StartWakeUpAlarm( timeout ); - 339:./Src/hw_rtc.c **** } - 340:./Src/hw_rtc.c **** - 341:./Src/hw_rtc.c **** /*! - 342:./Src/hw_rtc.c **** * @brief Get the RTC timer elapsed time since the last Alarm was set - 343:./Src/hw_rtc.c **** * @param none - 344:./Src/hw_rtc.c **** * @retval RTC Elapsed time in ticks - 345:./Src/hw_rtc.c **** */ - 346:./Src/hw_rtc.c **** uint32_t HW_RTC_GetTimerElapsedTime( void ) - 347:./Src/hw_rtc.c **** { - 348:./Src/hw_rtc.c **** RTC_TimeTypeDef RTC_TimeStruct; - 349:./Src/hw_rtc.c **** RTC_DateTypeDef RTC_DateStruct; - 350:./Src/hw_rtc.c **** - 351:./Src/hw_rtc.c **** TimerTime_t CalendarValue = HW_RTC_GetCalendarValue(&RTC_DateStruct, &RTC_TimeStruct ); - 352:./Src/hw_rtc.c **** - 353:./Src/hw_rtc.c **** return( ( uint32_t )( CalendarValue - RtcTimerContext.Rtc_Time )); - 354:./Src/hw_rtc.c **** } - 355:./Src/hw_rtc.c **** - 356:./Src/hw_rtc.c **** /*! - 357:./Src/hw_rtc.c **** * @brief Get the RTC timer value - 358:./Src/hw_rtc.c **** * @param none - 359:./Src/hw_rtc.c **** * @retval RTC Timer value in ticks - 360:./Src/hw_rtc.c **** */ - 361:./Src/hw_rtc.c **** uint32_t HW_RTC_GetTimerValue( void ) - 362:./Src/hw_rtc.c **** { - 363:./Src/hw_rtc.c **** RTC_TimeTypeDef RTC_TimeStruct; - 364:./Src/hw_rtc.c **** RTC_DateTypeDef RTC_DateStruct; - 365:./Src/hw_rtc.c **** - 366:./Src/hw_rtc.c **** uint32_t CalendarValue = (uint32_t) HW_RTC_GetCalendarValue(&RTC_DateStruct, &RTC_TimeStruct ); - 367:./Src/hw_rtc.c **** - 368:./Src/hw_rtc.c **** return( CalendarValue ); - 369:./Src/hw_rtc.c **** } - 370:./Src/hw_rtc.c **** - 371:./Src/hw_rtc.c **** /*! - 372:./Src/hw_rtc.c **** * @brief Stop the Alarm - 373:./Src/hw_rtc.c **** * @param none - 374:./Src/hw_rtc.c **** * @retval none - 375:./Src/hw_rtc.c **** */ - 376:./Src/hw_rtc.c **** void HW_RTC_StopAlarm( void ) - ARM GAS /tmp/ccGAhXKe.s page 8 - - - 377:./Src/hw_rtc.c **** { - 378:./Src/hw_rtc.c **** - 379:./Src/hw_rtc.c **** /* Clear RTC Alarm Flag */ - 380:./Src/hw_rtc.c **** __HAL_RTC_ALARM_CLEAR_FLAG( &RtcHandle, RTC_FLAG_ALRAF); - 381:./Src/hw_rtc.c **** - 382:./Src/hw_rtc.c **** /* Disable the Alarm A interrupt */ - 383:./Src/hw_rtc.c **** - 384:./Src/hw_rtc.c **** HAL_RTC_DeactivateAlarm(&RtcHandle, RTC_ALARM_A ); - 385:./Src/hw_rtc.c **** } - 386:./Src/hw_rtc.c **** - 387:./Src/hw_rtc.c **** /*! - 388:./Src/hw_rtc.c **** * @brief RTC IRQ Handler on the RTC Alarm - 389:./Src/hw_rtc.c **** * @param none - 390:./Src/hw_rtc.c **** * @retval none - 391:./Src/hw_rtc.c **** */ - 392:./Src/hw_rtc.c **** void HW_RTC_IrqHandler ( void ) - 393:./Src/hw_rtc.c **** { - 394:./Src/hw_rtc.c **** RTC_HandleTypeDef* hrtc=&RtcHandle; - 395:./Src/hw_rtc.c **** /* enable low power at irq*/ - 396:./Src/hw_rtc.c **** LowPower_Enable( e_LOW_POWER_RTC ); - 397:./Src/hw_rtc.c **** - 398:./Src/hw_rtc.c **** /* Get the AlarmA interrupt source enable status */ - 399:./Src/hw_rtc.c **** if(__HAL_RTC_ALARM_GET_IT_SOURCE(hrtc, RTC_IT_ALRA) != RESET) - 400:./Src/hw_rtc.c **** { - 401:./Src/hw_rtc.c **** /* Get the pending status of the AlarmA Interrupt */ - 402:./Src/hw_rtc.c **** if(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) != RESET) - 403:./Src/hw_rtc.c **** { - 404:./Src/hw_rtc.c **** /* Clear the AlarmA interrupt pending bit */ - 405:./Src/hw_rtc.c **** __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF); - 406:./Src/hw_rtc.c **** /* Clear the EXTI's line Flag for RTC Alarm */ - 407:./Src/hw_rtc.c **** __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); - 408:./Src/hw_rtc.c **** /* AlarmA callback */ - 409:./Src/hw_rtc.c **** HAL_RTC_AlarmAEventCallback(hrtc); - 410:./Src/hw_rtc.c **** } - 411:./Src/hw_rtc.c **** } - 412:./Src/hw_rtc.c **** } - 413:./Src/hw_rtc.c **** - 414:./Src/hw_rtc.c **** - 415:./Src/hw_rtc.c **** /*! - 416:./Src/hw_rtc.c **** * @brief a delay of delay ms by polling RTC - 417:./Src/hw_rtc.c **** * @param delay in ms - 418:./Src/hw_rtc.c **** * @retval none - 419:./Src/hw_rtc.c **** */ - 420:./Src/hw_rtc.c **** void HW_RTC_DelayMs( uint32_t delay ) - 421:./Src/hw_rtc.c **** { - 422:./Src/hw_rtc.c **** TimerTime_t delayValue = 0; - 423:./Src/hw_rtc.c **** TimerTime_t timeout = 0; - 424:./Src/hw_rtc.c **** - 425:./Src/hw_rtc.c **** delayValue = HW_RTC_ms2Tick( delay ); - 426:./Src/hw_rtc.c **** - 427:./Src/hw_rtc.c **** /* Wait delay ms */ - 428:./Src/hw_rtc.c **** timeout = HW_RTC_GetTimerValue( ); - 429:./Src/hw_rtc.c **** while( ( ( HW_RTC_GetTimerValue( ) - timeout ) ) < delayValue ) - 430:./Src/hw_rtc.c **** { - 431:./Src/hw_rtc.c **** __NOP( ); - 432:./Src/hw_rtc.c **** } - 433:./Src/hw_rtc.c **** } - ARM GAS /tmp/ccGAhXKe.s page 9 - - - 434:./Src/hw_rtc.c **** - 435:./Src/hw_rtc.c **** /*! - 436:./Src/hw_rtc.c **** * @brief set Time Reference set also the RTC_DateStruct and RTC_TimeStruct - 437:./Src/hw_rtc.c **** * @param none - 438:./Src/hw_rtc.c **** * @retval Timer Value - 439:./Src/hw_rtc.c **** */ - 440:./Src/hw_rtc.c **** uint32_t HW_RTC_SetTimerContext( void ) - 441:./Src/hw_rtc.c **** { - 442:./Src/hw_rtc.c **** RtcTimerContext.Rtc_Time = HW_RTC_GetCalendarValue( &RtcTimerContext.RTC_Calndr_Date, &RtcTimerCo - 443:./Src/hw_rtc.c **** return ( uint32_t ) RtcTimerContext.Rtc_Time; - 444:./Src/hw_rtc.c **** } - 445:./Src/hw_rtc.c **** - 446:./Src/hw_rtc.c **** /*! - 447:./Src/hw_rtc.c **** * @brief Get the RTC timer Reference - 448:./Src/hw_rtc.c **** * @param none - 449:./Src/hw_rtc.c **** * @retval Timer Value in Ticks - 450:./Src/hw_rtc.c **** */ - 451:./Src/hw_rtc.c **** uint32_t HW_RTC_GetTimerContext( void ) - 452:./Src/hw_rtc.c **** { - 453:./Src/hw_rtc.c **** return (uint32_t) RtcTimerContext.Rtc_Time; - 454:./Src/hw_rtc.c **** } - 455:./Src/hw_rtc.c **** /* Private functions ---------------------------------------------------------*/ - 456:./Src/hw_rtc.c **** - 457:./Src/hw_rtc.c **** /*! - 458:./Src/hw_rtc.c **** * @brief configure alarm at init - 459:./Src/hw_rtc.c **** * @param none - 460:./Src/hw_rtc.c **** * @retval none - 461:./Src/hw_rtc.c **** */ - 462:./Src/hw_rtc.c **** static void HW_RTC_SetAlarmConfig( void ) - 463:./Src/hw_rtc.c **** { - 464:./Src/hw_rtc.c **** HAL_RTC_DeactivateAlarm(&RtcHandle, RTC_ALARM_A); - 465:./Src/hw_rtc.c **** } - 466:./Src/hw_rtc.c **** - 467:./Src/hw_rtc.c **** /*! - 468:./Src/hw_rtc.c **** * @brief start wake up alarm - 469:./Src/hw_rtc.c **** * @note alarm in RtcTimerContext.Rtc_Time + timeoutValue - 470:./Src/hw_rtc.c **** * @param timeoutValue in ticks - 471:./Src/hw_rtc.c **** * @retval none - 472:./Src/hw_rtc.c **** */ - 473:./Src/hw_rtc.c **** static void HW_RTC_StartWakeUpAlarm( uint32_t timeoutValue ) - 474:./Src/hw_rtc.c **** { - 475:./Src/hw_rtc.c **** uint16_t rtcAlarmSubSeconds = 0; - 476:./Src/hw_rtc.c **** uint16_t rtcAlarmSeconds = 0; - 477:./Src/hw_rtc.c **** uint16_t rtcAlarmMinutes = 0; - 478:./Src/hw_rtc.c **** uint16_t rtcAlarmHours = 0; - 479:./Src/hw_rtc.c **** uint16_t rtcAlarmDays = 0; - 480:./Src/hw_rtc.c **** RTC_TimeTypeDef RTC_TimeStruct = RtcTimerContext.RTC_Calndr_Time; - 481:./Src/hw_rtc.c **** RTC_DateTypeDef RTC_DateStruct = RtcTimerContext.RTC_Calndr_Date; - 482:./Src/hw_rtc.c **** - 483:./Src/hw_rtc.c **** HW_RTC_StopAlarm( ); - 484:./Src/hw_rtc.c **** DBG_GPIO_SET(GPIOB, GPIO_PIN_13); - 485:./Src/hw_rtc.c **** - 486:./Src/hw_rtc.c **** /*reverse counter */ - 487:./Src/hw_rtc.c **** rtcAlarmSubSeconds = PREDIV_S - RTC_TimeStruct.SubSeconds; - 488:./Src/hw_rtc.c **** rtcAlarmSubSeconds += ( timeoutValue & PREDIV_S); - 489:./Src/hw_rtc.c **** /* convert timeout to seconds */ - 490:./Src/hw_rtc.c **** timeoutValue >>= N_PREDIV_S; /* convert timeout in seconds */ - ARM GAS /tmp/ccGAhXKe.s page 10 - - - 491:./Src/hw_rtc.c **** - 492:./Src/hw_rtc.c **** /*convert microsecs to RTC format and add to 'Now' */ - 493:./Src/hw_rtc.c **** rtcAlarmDays = RTC_DateStruct.Date; - 494:./Src/hw_rtc.c **** while (timeoutValue >= SECONDS_IN_1DAY) - 495:./Src/hw_rtc.c **** { - 496:./Src/hw_rtc.c **** timeoutValue -= SECONDS_IN_1DAY; - 497:./Src/hw_rtc.c **** rtcAlarmDays++; - 498:./Src/hw_rtc.c **** } - 499:./Src/hw_rtc.c **** - 500:./Src/hw_rtc.c **** /* calc hours */ - 501:./Src/hw_rtc.c **** rtcAlarmHours = RTC_TimeStruct.Hours; - 502:./Src/hw_rtc.c **** while (timeoutValue >= SECONDS_IN_1HOUR) - 503:./Src/hw_rtc.c **** { - 504:./Src/hw_rtc.c **** timeoutValue -= SECONDS_IN_1HOUR; - 505:./Src/hw_rtc.c **** rtcAlarmHours++; - 506:./Src/hw_rtc.c **** } - 507:./Src/hw_rtc.c **** - 508:./Src/hw_rtc.c **** /* calc minutes */ - 509:./Src/hw_rtc.c **** rtcAlarmMinutes = RTC_TimeStruct.Minutes; - 510:./Src/hw_rtc.c **** while (timeoutValue >= SECONDS_IN_1MINUTE) - 511:./Src/hw_rtc.c **** { - 512:./Src/hw_rtc.c **** timeoutValue -= SECONDS_IN_1MINUTE; - 513:./Src/hw_rtc.c **** rtcAlarmMinutes++; - 514:./Src/hw_rtc.c **** } - 515:./Src/hw_rtc.c **** - 516:./Src/hw_rtc.c **** /* calc seconds */ - 517:./Src/hw_rtc.c **** rtcAlarmSeconds = RTC_TimeStruct.Seconds + timeoutValue; - 518:./Src/hw_rtc.c **** - 519:./Src/hw_rtc.c **** /***** correct for modulo********/ - 520:./Src/hw_rtc.c **** while (rtcAlarmSubSeconds >= (PREDIV_S+1)) - 521:./Src/hw_rtc.c **** { - 522:./Src/hw_rtc.c **** rtcAlarmSubSeconds -= (PREDIV_S+1); - 523:./Src/hw_rtc.c **** rtcAlarmSeconds++; - 524:./Src/hw_rtc.c **** } - 525:./Src/hw_rtc.c **** - 526:./Src/hw_rtc.c **** while (rtcAlarmSeconds >= SECONDS_IN_1MINUTE) - 527:./Src/hw_rtc.c **** { - 528:./Src/hw_rtc.c **** rtcAlarmSeconds -= SECONDS_IN_1MINUTE; - 529:./Src/hw_rtc.c **** rtcAlarmMinutes++; - 530:./Src/hw_rtc.c **** } - 531:./Src/hw_rtc.c **** - 532:./Src/hw_rtc.c **** while (rtcAlarmMinutes >= MINUTES_IN_1HOUR) - 533:./Src/hw_rtc.c **** { - 534:./Src/hw_rtc.c **** rtcAlarmMinutes -= MINUTES_IN_1HOUR; - 535:./Src/hw_rtc.c **** rtcAlarmHours++; - 536:./Src/hw_rtc.c **** } - 537:./Src/hw_rtc.c **** - 538:./Src/hw_rtc.c **** while (rtcAlarmHours >= HOURS_IN_1DAY) - 539:./Src/hw_rtc.c **** { - 540:./Src/hw_rtc.c **** rtcAlarmHours -= HOURS_IN_1DAY; - 541:./Src/hw_rtc.c **** rtcAlarmDays++; - 542:./Src/hw_rtc.c **** } - 543:./Src/hw_rtc.c **** - 544:./Src/hw_rtc.c **** if( RTC_DateStruct.Year % 4 == 0 ) - 545:./Src/hw_rtc.c **** { - 546:./Src/hw_rtc.c **** if( rtcAlarmDays > DaysInMonthLeapYear[ RTC_DateStruct.Month - 1 ] ) - 547:./Src/hw_rtc.c **** { - ARM GAS /tmp/ccGAhXKe.s page 11 - - - 548:./Src/hw_rtc.c **** rtcAlarmDays = rtcAlarmDays % DaysInMonthLeapYear[ RTC_DateStruct.Month - 1 ]; - 549:./Src/hw_rtc.c **** } - 550:./Src/hw_rtc.c **** } - 551:./Src/hw_rtc.c **** else - 552:./Src/hw_rtc.c **** { - 553:./Src/hw_rtc.c **** if( rtcAlarmDays > DaysInMonth[ RTC_DateStruct.Month - 1 ] ) - 554:./Src/hw_rtc.c **** { - 555:./Src/hw_rtc.c **** rtcAlarmDays = rtcAlarmDays % DaysInMonth[ RTC_DateStruct.Month - 1 ]; - 556:./Src/hw_rtc.c **** } - 557:./Src/hw_rtc.c **** } - 558:./Src/hw_rtc.c **** - 559:./Src/hw_rtc.c **** /* Set RTC_AlarmStructure with calculated values*/ - 560:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.SubSeconds = PREDIV_S-rtcAlarmSubSeconds; - 561:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmSubSecondMask = HW_RTC_ALARMSUBSECONDMASK; - 562:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.Seconds = rtcAlarmSeconds; - 563:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.Minutes = rtcAlarmMinutes; - 564:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.Hours = rtcAlarmHours; - 565:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmDateWeekDay = ( uint8_t )rtcAlarmDays; - 566:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.TimeFormat = RTC_TimeStruct.TimeFormat; - 567:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmDateWeekDaySel = RTC_ALARMDATEWEEKDAYSEL_DATE; - 568:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmMask = RTC_ALARMMASK_NONE; - 569:./Src/hw_rtc.c **** RTC_AlarmStructure.Alarm = RTC_ALARM_A; - 570:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; - 571:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.StoreOperation = RTC_STOREOPERATION_RESET; - 572:./Src/hw_rtc.c **** - 573:./Src/hw_rtc.c **** /* Set RTC_Alarm */ - 574:./Src/hw_rtc.c **** HAL_RTC_SetAlarm_IT( &RtcHandle, &RTC_AlarmStructure, RTC_FORMAT_BIN ); - 575:./Src/hw_rtc.c **** - 576:./Src/hw_rtc.c **** /* Debug Printf*/ - 577:./Src/hw_rtc.c **** DBG( HW_RTC_GetCalendarValue( &RTC_DateStruct, &RTC_TimeStruct ); ); - 578:./Src/hw_rtc.c **** DBG_PRINTF("it's %d:%d:%d:%d ", RTC_TimeStruct.Hours, RTC_TimeStruct.Minutes, RTC_TimeStruct.Seco - 579:./Src/hw_rtc.c **** DBG_PRINTF("WU@ %d:%d:%d:%d\n\r", rtcAlarmHours, rtcAlarmMinutes, rtcAlarmSeconds, (rtcAlarmSubSe - 580:./Src/hw_rtc.c **** - 581:./Src/hw_rtc.c **** DBG_GPIO_RST(GPIOB, GPIO_PIN_13); - 582:./Src/hw_rtc.c **** } - 583:./Src/hw_rtc.c **** - 584:./Src/hw_rtc.c **** - 585:./Src/hw_rtc.c **** /*! - 586:./Src/hw_rtc.c **** * @brief get current time from calendar in ticks - 587:./Src/hw_rtc.c **** * @param pointer to RTC_DateStruct - 588:./Src/hw_rtc.c **** * @param pointer to RTC_TimeStruct - 589:./Src/hw_rtc.c **** * @retval time in ticks - 590:./Src/hw_rtc.c **** */ - 591:./Src/hw_rtc.c **** static TimerTime_t HW_RTC_GetCalendarValue( RTC_DateTypeDef* RTC_DateStruct, RTC_TimeTypeDef* RTC_T - 592:./Src/hw_rtc.c **** { - 25 .loc 1 592 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 .LVL0: - 30 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 31 .LCFI0: - 32 .cfi_def_cfa_offset 24 - 33 .cfi_offset 3, -24 - 34 .cfi_offset 4, -20 - 35 .cfi_offset 5, -16 - 36 .cfi_offset 6, -12 - ARM GAS /tmp/ccGAhXKe.s page 12 - - - 37 .cfi_offset 7, -8 - 38 .cfi_offset 14, -4 - 39 0002 0600 movs r6, r0 - 40 0004 0C00 movs r4, r1 - 41 .LVL1: - 593:./Src/hw_rtc.c **** TimerTime_t calendarValue = 0; - 594:./Src/hw_rtc.c **** uint32_t first_read; - 595:./Src/hw_rtc.c **** uint32_t correction; - 596:./Src/hw_rtc.c **** - 597:./Src/hw_rtc.c **** /* Get Time and Date*/ - 598:./Src/hw_rtc.c **** HAL_RTC_GetTime( &RtcHandle, RTC_TimeStruct, RTC_FORMAT_BIN ); - 42 .loc 1 598 0 - 43 0006 0022 movs r2, #0 - 44 0008 2448 ldr r0, .L6 - 45 .LVL2: - 46 000a FFF7FEFF bl HAL_RTC_GetTime - 47 .LVL3: - 48 .L2: - 599:./Src/hw_rtc.c **** - 600:./Src/hw_rtc.c **** /* make sure it is correct due to asynchronus nature of RTC*/ - 601:./Src/hw_rtc.c **** do { - 602:./Src/hw_rtc.c **** first_read = RTC_TimeStruct->SubSeconds; - 49 .loc 1 602 0 discriminator 1 - 50 000e 6768 ldr r7, [r4, #4] - 51 .LVL4: - 603:./Src/hw_rtc.c **** HAL_RTC_GetDate( &RtcHandle, RTC_DateStruct, RTC_FORMAT_BIN ); - 52 .loc 1 603 0 discriminator 1 - 53 0010 224D ldr r5, .L6 - 54 0012 0022 movs r2, #0 - 55 0014 3100 movs r1, r6 - 56 0016 2800 movs r0, r5 - 57 0018 FFF7FEFF bl HAL_RTC_GetDate - 58 .LVL5: - 604:./Src/hw_rtc.c **** HAL_RTC_GetTime( &RtcHandle, RTC_TimeStruct, RTC_FORMAT_BIN ); - 59 .loc 1 604 0 discriminator 1 - 60 001c 0022 movs r2, #0 - 61 001e 2100 movs r1, r4 - 62 0020 2800 movs r0, r5 - 63 0022 FFF7FEFF bl HAL_RTC_GetTime - 64 .LVL6: - 605:./Src/hw_rtc.c **** } while (first_read != RTC_TimeStruct->SubSeconds); - 65 .loc 1 605 0 discriminator 1 - 66 0026 6268 ldr r2, [r4, #4] - 67 0028 BA42 cmp r2, r7 - 68 002a F0D1 bne .L2 - 606:./Src/hw_rtc.c **** - 607:./Src/hw_rtc.c **** /* calculte amount of elapsed days since 01/01/2000 */ - 608:./Src/hw_rtc.c **** calendarValue= DIVC( (DAYS_IN_YEAR*3 + DAYS_IN_LEAP_YEAR)* RTC_DateStruct->Year , 4); - 69 .loc 1 608 0 - 70 002c F178 ldrb r1, [r6, #3] - 71 002e 1C4B ldr r3, .L6+4 - 72 0030 4B43 muls r3, r1 - 73 0032 0333 adds r3, r3, #3 - 74 0034 9D08 lsrs r5, r3, #2 - 75 .LVL7: - 609:./Src/hw_rtc.c **** - 610:./Src/hw_rtc.c **** correction = ( (RTC_DateStruct->Year % 4) == 0 ) ? DAYS_IN_MONTH_CORRECTION_LEAP : DAYS_IN_MONTH_ - ARM GAS /tmp/ccGAhXKe.s page 13 - - - 76 .loc 1 610 0 - 77 0036 8B07 lsls r3, r1, #30 - 78 0038 2ED0 beq .L5 - 79 003a 1A4F ldr r7, .L6+8 - 80 .LVL8: - 81 .L3: - 611:./Src/hw_rtc.c **** - 612:./Src/hw_rtc.c **** calendarValue +=( DIVC( (RTC_DateStruct->Month-1)*(30+31) ,2 ) - (((correction>> ((RTC_DateStruct - 82 .loc 1 612 0 discriminator 4 - 83 003c 7078 ldrb r0, [r6, #1] - 84 003e 0138 subs r0, r0, #1 - 85 0040 0301 lsls r3, r0, #4 - 86 0042 1B1A subs r3, r3, r0 - 87 0044 9B00 lsls r3, r3, #2 - 88 0046 1B18 adds r3, r3, r0 - 89 0048 0133 adds r3, r3, #1 - 90 004a D90F lsrs r1, r3, #31 - 91 004c C918 adds r1, r1, r3 - 92 004e 4910 asrs r1, r1, #1 - 93 0050 4000 lsls r0, r0, #1 - 94 0052 C740 lsrs r7, r7, r0 - 95 .LVL9: - 96 0054 0323 movs r3, #3 - 97 0056 3B40 ands r3, r7 - 98 0058 CB1A subs r3, r1, r3 - 99 005a 5B19 adds r3, r3, r5 - 100 .LVL10: - 613:./Src/hw_rtc.c **** - 614:./Src/hw_rtc.c **** calendarValue += (RTC_DateStruct->Date -1); - 101 .loc 1 614 0 discriminator 4 - 102 005c B178 ldrb r1, [r6, #2] - 103 005e CB18 adds r3, r1, r3 - 104 .LVL11: - 105 0060 013B subs r3, r3, #1 - 106 .LVL12: - 615:./Src/hw_rtc.c **** - 616:./Src/hw_rtc.c **** /* convert from days to seconds */ - 617:./Src/hw_rtc.c **** calendarValue *= SECONDS_IN_1DAY; - 107 .loc 1 617 0 discriminator 4 - 108 0062 5900 lsls r1, r3, #1 - 109 0064 CB18 adds r3, r1, r3 - 110 .LVL13: - 111 0066 1901 lsls r1, r3, #4 - 112 0068 CB1A subs r3, r1, r3 - 113 006a 1901 lsls r1, r3, #4 - 114 006c C91A subs r1, r1, r3 - 115 006e CE01 lsls r6, r1, #7 - 116 .LVL14: - 618:./Src/hw_rtc.c **** - 619:./Src/hw_rtc.c **** calendarValue += ( ( uint32_t )RTC_TimeStruct->Seconds + - 117 .loc 1 619 0 discriminator 4 - 118 0070 A778 ldrb r7, [r4, #2] - 620:./Src/hw_rtc.c **** ( ( uint32_t )RTC_TimeStruct->Minutes * SECONDS_IN_1MINUTE ) + - 621:./Src/hw_rtc.c **** ( ( uint32_t )RTC_TimeStruct->Hours * SECONDS_IN_1HOUR ) ) ; - 119 .loc 1 621 0 discriminator 4 - 120 0072 2578 ldrb r5, [r4] - 121 0074 2901 lsls r1, r5, #4 - ARM GAS /tmp/ccGAhXKe.s page 14 - - - 122 0076 4D1B subs r5, r1, r5 - 123 0078 2901 lsls r1, r5, #4 - 124 007a 491B subs r1, r1, r5 - 125 007c 0B01 lsls r3, r1, #4 - 620:./Src/hw_rtc.c **** ( ( uint32_t )RTC_TimeStruct->Minutes * SECONDS_IN_1MINUTE ) + - 126 .loc 1 620 0 discriminator 4 - 127 007e 6078 ldrb r0, [r4, #1] - 128 0080 0101 lsls r1, r0, #4 - 129 0082 091A subs r1, r1, r0 - 130 0084 8800 lsls r0, r1, #2 - 131 0086 1818 adds r0, r3, r0 - 132 0088 C019 adds r0, r0, r7 - 619:./Src/hw_rtc.c **** ( ( uint32_t )RTC_TimeStruct->Minutes * SECONDS_IN_1MINUTE ) + - 133 .loc 1 619 0 discriminator 4 - 134 008a 8019 adds r0, r0, r6 - 135 .LVL15: - 622:./Src/hw_rtc.c **** - 623:./Src/hw_rtc.c **** - 624:./Src/hw_rtc.c **** - 625:./Src/hw_rtc.c **** calendarValue = (calendarValue<SubSeconds); - 136 .loc 1 625 0 discriminator 4 - 137 008c 8002 lsls r0, r0, #10 - 138 .LVL16: - 139 008e 801A subs r0, r0, r2 - 140 0090 054B ldr r3, .L6+12 - 141 .LVL17: - 142 0092 9C46 mov ip, r3 - 143 0094 6044 add r0, r0, ip - 144 .LVL18: - 626:./Src/hw_rtc.c **** - 627:./Src/hw_rtc.c **** return( calendarValue ); - 628:./Src/hw_rtc.c **** } - 145 .loc 1 628 0 discriminator 4 - 146 @ sp needed - 147 .LVL19: - 148 0096 F8BD pop {r3, r4, r5, r6, r7, pc} - 149 .LVL20: - 150 .L5: - 610:./Src/hw_rtc.c **** - 151 .loc 1 610 0 - 152 0098 044F ldr r7, .L6+16 - 153 .LVL21: - 154 009a CFE7 b .L3 - 155 .L7: - 156 .align 2 - 157 .L6: - 158 009c 00000000 .word .LANCHOR0 - 159 00a0 B5050000 .word 1461 - 160 00a4 A0AA9900 .word 10070688 - 161 00a8 FF030000 .word 1023 - 162 00ac 50554400 .word 4478288 - 163 .cfi_endproc - 164 .LFE113: - 166 .section .text.HW_RTC_Init,"ax",%progbits - 167 .align 1 - 168 .global HW_RTC_Init - 169 .syntax unified - ARM GAS /tmp/ccGAhXKe.s page 15 - - - 170 .code 16 - 171 .thumb_func - 172 .fpu softvfp - 174 HW_RTC_Init: - 175 .LFB96: - 187:./Src/hw_rtc.c **** if( HW_RTC_Initalized == false ) - 176 .loc 1 187 0 - 177 .cfi_startproc - 178 @ args = 0, pretend = 0, frame = 24 - 179 @ frame_needed = 0, uses_anonymous_args = 0 - 180 0000 70B5 push {r4, r5, r6, lr} - 181 .LCFI1: - 182 .cfi_def_cfa_offset 16 - 183 .cfi_offset 4, -16 - 184 .cfi_offset 5, -12 - 185 .cfi_offset 6, -8 - 186 .cfi_offset 14, -4 - 187 0002 86B0 sub sp, sp, #24 - 188 .LCFI2: - 189 .cfi_def_cfa_offset 40 - 188:./Src/hw_rtc.c **** { - 190 .loc 1 188 0 - 191 0004 1E4B ldr r3, .L11 - 192 0006 1B78 ldrb r3, [r3] - 193 0008 002B cmp r3, #0 - 194 000a 01D0 beq .L10 - 195 .L8: - 195:./Src/hw_rtc.c **** - 196 .loc 1 195 0 - 197 000c 06B0 add sp, sp, #24 - 198 @ sp needed - 199 000e 70BD pop {r4, r5, r6, pc} - 200 .L10: - 201 .LBB26: - 202 .LBB27: - 208:./Src/hw_rtc.c **** - 203 .loc 1 208 0 - 204 0010 1C4C ldr r4, .L11+4 - 205 0012 1D4B ldr r3, .L11+8 - 206 0014 2360 str r3, [r4] - 210:./Src/hw_rtc.c **** RtcHandle.Init.AsynchPrediv = PREDIV_A; /* RTC_ASYNCH_PREDIV; */ - 207 .loc 1 210 0 - 208 0016 0025 movs r5, #0 - 209 0018 6560 str r5, [r4, #4] - 211:./Src/hw_rtc.c **** RtcHandle.Init.SynchPrediv = PREDIV_S; /* RTC_SYNCH_PREDIV; */ - 210 .loc 1 211 0 - 211 001a 1F23 movs r3, #31 - 212 001c A360 str r3, [r4, #8] - 212:./Src/hw_rtc.c **** RtcHandle.Init.OutPut = RTC_OUTPUT; - 213 .loc 1 212 0 - 214 001e 1B4B ldr r3, .L11+12 - 215 0020 E360 str r3, [r4, #12] - 213:./Src/hw_rtc.c **** RtcHandle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; - 216 .loc 1 213 0 - 217 0022 2561 str r5, [r4, #16] - 214:./Src/hw_rtc.c **** RtcHandle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; - 218 .loc 1 214 0 - ARM GAS /tmp/ccGAhXKe.s page 16 - - - 219 0024 A561 str r5, [r4, #24] - 215:./Src/hw_rtc.c **** - 220 .loc 1 215 0 - 221 0026 E561 str r5, [r4, #28] - 217:./Src/hw_rtc.c **** - 222 .loc 1 217 0 - 223 0028 2000 movs r0, r4 - 224 002a FFF7FEFF bl HAL_RTC_Init - 225 .LVL22: - 220:./Src/hw_rtc.c **** RTC_DateStruct.Month = RTC_MONTH_JANUARY; - 226 .loc 1 220 0 - 227 002e 6B46 mov r3, sp - 228 0030 DD70 strb r5, [r3, #3] - 221:./Src/hw_rtc.c **** RTC_DateStruct.Date = 1; - 229 .loc 1 221 0 - 230 0032 0126 movs r6, #1 - 231 0034 5E70 strb r6, [r3, #1] - 222:./Src/hw_rtc.c **** RTC_DateStruct.WeekDay = RTC_WEEKDAY_MONDAY; - 232 .loc 1 222 0 - 233 0036 9E70 strb r6, [r3, #2] - 223:./Src/hw_rtc.c **** HAL_RTC_SetDate(&RtcHandle , &RTC_DateStruct, RTC_FORMAT_BIN); - 234 .loc 1 223 0 - 235 0038 1E70 strb r6, [r3] - 224:./Src/hw_rtc.c **** - 236 .loc 1 224 0 - 237 003a 0022 movs r2, #0 - 238 003c 6946 mov r1, sp - 239 003e 2000 movs r0, r4 - 240 0040 FFF7FEFF bl HAL_RTC_SetDate - 241 .LVL23: - 227:./Src/hw_rtc.c **** RTC_TimeStruct.Minutes = 0; - 242 .loc 1 227 0 - 243 0044 01A9 add r1, sp, #4 - 244 0046 0D70 strb r5, [r1] - 228:./Src/hw_rtc.c **** - 245 .loc 1 228 0 - 246 0048 4D70 strb r5, [r1, #1] - 230:./Src/hw_rtc.c **** RTC_TimeStruct.TimeFormat = 0; - 247 .loc 1 230 0 - 248 004a 8D70 strb r5, [r1, #2] - 231:./Src/hw_rtc.c **** RTC_TimeStruct.SubSeconds = 0; - 249 .loc 1 231 0 - 250 004c CD70 strb r5, [r1, #3] - 232:./Src/hw_rtc.c **** RTC_TimeStruct.StoreOperation = RTC_DAYLIGHTSAVING_NONE; - 251 .loc 1 232 0 - 252 004e 4D60 str r5, [r1, #4] - 233:./Src/hw_rtc.c **** RTC_TimeStruct.DayLightSaving = RTC_STOREOPERATION_RESET; - 253 .loc 1 233 0 - 254 0050 0D61 str r5, [r1, #16] - 234:./Src/hw_rtc.c **** - 255 .loc 1 234 0 - 256 0052 CD60 str r5, [r1, #12] - 236:./Src/hw_rtc.c **** - 257 .loc 1 236 0 - 258 0054 0022 movs r2, #0 - 259 0056 2000 movs r0, r4 - 260 0058 FFF7FEFF bl HAL_RTC_SetTime - ARM GAS /tmp/ccGAhXKe.s page 17 - - - 261 .LVL24: - 239:./Src/hw_rtc.c **** } - 262 .loc 1 239 0 - 263 005c 2000 movs r0, r4 - 264 005e FFF7FEFF bl HAL_RTCEx_EnableBypassShadow - 265 .LVL25: - 266 .LBE27: - 267 .LBE26: - 268 .LBB28: - 269 .LBB29: - 464:./Src/hw_rtc.c **** } - 270 .loc 1 464 0 - 271 0062 8021 movs r1, #128 - 272 0064 4900 lsls r1, r1, #1 - 273 0066 2000 movs r0, r4 - 274 0068 FFF7FEFF bl HAL_RTC_DeactivateAlarm - 275 .LVL26: - 276 .LBE29: - 277 .LBE28: - 278 .LBB30: - 279 .LBB31: - 442:./Src/hw_rtc.c **** return ( uint32_t ) RtcTimerContext.Rtc_Time; - 280 .loc 1 442 0 - 281 006c 084C ldr r4, .L11+16 - 282 006e 211D adds r1, r4, #4 - 283 0070 2000 movs r0, r4 - 284 0072 1830 adds r0, r0, #24 - 285 0074 FFF7FEFF bl HW_RTC_GetCalendarValue - 286 .LVL27: - 287 0078 2060 str r0, [r4] - 288 .LBE31: - 289 .LBE30: - 193:./Src/hw_rtc.c **** } - 290 .loc 1 193 0 - 291 007a 014B ldr r3, .L11 - 292 007c 1E70 strb r6, [r3] - 195:./Src/hw_rtc.c **** - 293 .loc 1 195 0 - 294 007e C5E7 b .L8 - 295 .L12: - 296 .align 2 - 297 .L11: - 298 0080 00000000 .word .LANCHOR1 - 299 0084 00000000 .word .LANCHOR0 - 300 0088 00280040 .word 1073752064 - 301 008c FF030000 .word 1023 - 302 0090 00000000 .word .LANCHOR2 - 303 .cfi_endproc - 304 .LFE96: - 306 .section .text.HW_RTC_setMcuWakeUpTime,"ax",%progbits - 307 .align 1 - 308 .global HW_RTC_setMcuWakeUpTime - 309 .syntax unified - 310 .code 16 - 311 .thumb_func - 312 .fpu softvfp - 314 HW_RTC_setMcuWakeUpTime: - ARM GAS /tmp/ccGAhXKe.s page 18 - - - 315 .LFB98: - 249:./Src/hw_rtc.c **** RTC_TimeTypeDef RTC_TimeStruct; - 316 .loc 1 249 0 - 317 .cfi_startproc - 318 @ args = 0, pretend = 0, frame = 24 - 319 @ frame_needed = 0, uses_anonymous_args = 0 - 320 0000 70B5 push {r4, r5, r6, lr} - 321 .LCFI3: - 322 .cfi_def_cfa_offset 16 - 323 .cfi_offset 4, -16 - 324 .cfi_offset 5, -12 - 325 .cfi_offset 6, -8 - 326 .cfi_offset 14, -4 - 327 0002 86B0 sub sp, sp, #24 - 328 .LCFI4: - 329 .cfi_def_cfa_offset 40 - 256:./Src/hw_rtc.c **** ( HAL_NVIC_GetPendingIRQ( RTC_Alarm_IRQn ) == 1)) - 330 .loc 1 256 0 - 331 0004 1C4B ldr r3, .L16 - 332 0006 1B78 ldrb r3, [r3] - 333 0008 002B cmp r3, #0 - 334 000a 01D0 beq .L15 - 335 .L13: - 276:./Src/hw_rtc.c **** - 336 .loc 1 276 0 - 337 000c 06B0 add sp, sp, #24 - 338 @ sp needed - 339 000e 70BD pop {r4, r5, r6, pc} - 340 .L15: - 257:./Src/hw_rtc.c **** { /* warning: works ok if now is below 30 days - 341 .loc 1 257 0 discriminator 1 - 342 0010 0220 movs r0, #2 - 343 0012 FFF7FEFF bl HAL_NVIC_GetPendingIRQ - 344 .LVL28: - 256:./Src/hw_rtc.c **** ( HAL_NVIC_GetPendingIRQ( RTC_Alarm_IRQn ) == 1)) - 345 .loc 1 256 0 discriminator 1 - 346 0016 0128 cmp r0, #1 - 347 0018 F8D1 bne .L13 - 260:./Src/hw_rtc.c **** now = HW_RTC_GetCalendarValue( &RTC_DateStruct, &RTC_TimeStruct ); - 348 .loc 1 260 0 - 349 001a 174B ldr r3, .L16 - 350 001c 0122 movs r2, #1 - 351 001e 1A70 strb r2, [r3] - 261:./Src/hw_rtc.c **** - 352 .loc 1 261 0 - 353 0020 01A9 add r1, sp, #4 - 354 0022 6846 mov r0, sp - 355 0024 FFF7FEFF bl HW_RTC_GetCalendarValue - 356 .LVL29: - 357 0028 0400 movs r4, r0 - 358 .LVL30: - 265:./Src/hw_rtc.c **** hit = RTC_AlarmStructure.AlarmTime.Seconds+ - 359 .loc 1 265 0 - 360 002a 8022 movs r2, #128 - 361 002c 134D ldr r5, .L16+4 - 362 002e 0023 movs r3, #0 - 363 0030 5200 lsls r2, r2, #1 - ARM GAS /tmp/ccGAhXKe.s page 19 - - - 364 0032 2900 movs r1, r5 - 365 0034 1248 ldr r0, .L16+8 - 366 .LVL31: - 367 0036 FFF7FEFF bl HAL_RTC_GetAlarm - 368 .LVL32: - 266:./Src/hw_rtc.c **** 60*(RTC_AlarmStructure.AlarmTime.Minutes+ - 369 .loc 1 266 0 - 370 003a A878 ldrb r0, [r5, #2] - 267:./Src/hw_rtc.c **** 60*(RTC_AlarmStructure.AlarmTime.Hours+ - 371 .loc 1 267 0 - 372 003c 6B78 ldrb r3, [r5, #1] - 268:./Src/hw_rtc.c **** 24*(RTC_AlarmStructure.AlarmDateWeekDay))); - 373 .loc 1 268 0 - 374 003e 2978 ldrb r1, [r5] - 269:./Src/hw_rtc.c **** hit = ( hit << N_PREDIV_S ) + (PREDIV_S - RTC_AlarmStructure.AlarmTime.SubSeconds); - 375 .loc 1 269 0 - 376 0040 2022 movs r2, #32 - 377 0042 AA5C ldrb r2, [r5, r2] - 378 0044 5600 lsls r6, r2, #1 - 379 0046 B618 adds r6, r6, r2 - 380 0048 F200 lsls r2, r6, #3 - 268:./Src/hw_rtc.c **** 24*(RTC_AlarmStructure.AlarmDateWeekDay))); - 381 .loc 1 268 0 - 382 004a 8A18 adds r2, r1, r2 - 383 004c 1101 lsls r1, r2, #4 - 384 004e 891A subs r1, r1, r2 - 385 0050 8A00 lsls r2, r1, #2 - 267:./Src/hw_rtc.c **** 60*(RTC_AlarmStructure.AlarmTime.Hours+ - 386 .loc 1 267 0 - 387 0052 9A18 adds r2, r3, r2 - 388 0054 1301 lsls r3, r2, #4 - 389 0056 9B1A subs r3, r3, r2 - 390 0058 9A00 lsls r2, r3, #2 - 266:./Src/hw_rtc.c **** 60*(RTC_AlarmStructure.AlarmTime.Minutes+ - 391 .loc 1 266 0 - 392 005a 8018 adds r0, r0, r2 - 393 .LVL33: - 270:./Src/hw_rtc.c **** - 394 .loc 1 270 0 - 395 005c 8002 lsls r0, r0, #10 - 396 .LVL34: - 397 005e 6B68 ldr r3, [r5, #4] - 398 0060 C01A subs r0, r0, r3 - 399 0062 084B ldr r3, .L16+12 - 400 0064 9C46 mov ip, r3 - 401 0066 6044 add r0, r0, ip - 402 .LVL35: - 272:./Src/hw_rtc.c **** McuWakeUpTimeCal += McuWakeUpTime; - 403 .loc 1 272 0 - 404 0068 201A subs r0, r4, r0 - 405 .LVL36: - 406 006a 80B2 uxth r0, r0 - 407 .LVL37: - 273:./Src/hw_rtc.c **** DBG_PRINTF("Cal=%d, %d\n\r",McuWakeUpTimeCal, McuWakeUpTime); - 408 .loc 1 273 0 - 409 006c 064B ldr r3, .L16+16 - 410 .LVL38: - ARM GAS /tmp/ccGAhXKe.s page 20 - - - 411 006e 1C88 ldrh r4, [r3] - 412 .LVL39: - 413 0070 0019 adds r0, r0, r4 - 414 .LVL40: - 415 0072 1880 strh r0, [r3] - 276:./Src/hw_rtc.c **** - 416 .loc 1 276 0 - 417 0074 CAE7 b .L13 - 418 .L17: - 419 0076 C046 .align 2 - 420 .L16: - 421 0078 00000000 .word .LANCHOR3 - 422 007c 00000000 .word .LANCHOR4 - 423 0080 00000000 .word .LANCHOR0 - 424 0084 FF030000 .word 1023 - 425 0088 00000000 .word .LANCHOR5 - 426 .cfi_endproc - 427 .LFE98: - 429 .section .text.HW_RTC_getMcuWakeUpTime,"ax",%progbits - 430 .align 1 - 431 .global HW_RTC_getMcuWakeUpTime - 432 .syntax unified - 433 .code 16 - 434 .thumb_func - 435 .fpu softvfp - 437 HW_RTC_getMcuWakeUpTime: - 438 .LFB99: - 279:./Src/hw_rtc.c **** return McuWakeUpTimeCal; - 439 .loc 1 279 0 - 440 .cfi_startproc - 441 @ args = 0, pretend = 0, frame = 0 - 442 @ frame_needed = 0, uses_anonymous_args = 0 - 443 @ link register save eliminated. - 280:./Src/hw_rtc.c **** } - 444 .loc 1 280 0 - 445 0000 014B ldr r3, .L19 - 446 0002 0020 movs r0, #0 - 447 0004 185E ldrsh r0, [r3, r0] - 281:./Src/hw_rtc.c **** - 448 .loc 1 281 0 - 449 @ sp needed - 450 0006 7047 bx lr - 451 .L20: - 452 .align 2 - 453 .L19: - 454 0008 00000000 .word .LANCHOR5 - 455 .cfi_endproc - 456 .LFE99: - 458 .section .text.HW_RTC_GetMinimumTimeout,"ax",%progbits - 459 .align 1 - 460 .global HW_RTC_GetMinimumTimeout - 461 .syntax unified - 462 .code 16 - 463 .thumb_func - 464 .fpu softvfp - 466 HW_RTC_GetMinimumTimeout: - 467 .LFB100: - ARM GAS /tmp/ccGAhXKe.s page 21 - - - 289:./Src/hw_rtc.c **** return( MIN_ALARM_DELAY ); - 468 .loc 1 289 0 - 469 .cfi_startproc - 470 @ args = 0, pretend = 0, frame = 0 - 471 @ frame_needed = 0, uses_anonymous_args = 0 - 472 @ link register save eliminated. - 291:./Src/hw_rtc.c **** - 473 .loc 1 291 0 - 474 0000 0320 movs r0, #3 - 475 @ sp needed - 476 0002 7047 bx lr - 477 .cfi_endproc - 478 .LFE100: - 480 .global __aeabi_uldivmod - 481 .section .text.HW_RTC_ms2Tick,"ax",%progbits - 482 .align 1 - 483 .global HW_RTC_ms2Tick - 484 .syntax unified - 485 .code 16 - 486 .thumb_func - 487 .fpu softvfp - 489 HW_RTC_ms2Tick: - 490 .LFB101: - 299:./Src/hw_rtc.c **** /*return( ( timeMicroSec / RTC_ALARM_TIME_BASE ) ); */ - 491 .loc 1 299 0 - 492 .cfi_startproc - 493 @ args = 0, pretend = 0, frame = 0 - 494 @ frame_needed = 0, uses_anonymous_args = 0 - 495 .LVL41: - 496 0000 10B5 push {r4, lr} - 497 .LCFI5: - 498 .cfi_def_cfa_offset 8 - 499 .cfi_offset 4, -8 - 500 .cfi_offset 14, -4 - 301:./Src/hw_rtc.c **** } - 501 .loc 1 301 0 - 502 0002 410E lsrs r1, r0, #25 - 503 0004 C001 lsls r0, r0, #7 - 504 .LVL42: - 505 0006 7D22 movs r2, #125 - 506 0008 0023 movs r3, #0 - 507 000a FFF7FEFF bl __aeabi_uldivmod - 508 .LVL43: - 302:./Src/hw_rtc.c **** - 509 .loc 1 302 0 - 510 @ sp needed - 511 000e 10BD pop {r4, pc} - 512 .cfi_endproc - 513 .LFE101: - 515 .section .text.HW_RTC_Tick2ms,"ax",%progbits - 516 .align 1 - 517 .global HW_RTC_Tick2ms - 518 .syntax unified - 519 .code 16 - 520 .thumb_func - 521 .fpu softvfp - 523 HW_RTC_Tick2ms: - ARM GAS /tmp/ccGAhXKe.s page 22 - - - 524 .LFB102: - 310:./Src/hw_rtc.c **** /*return( ( timeMicroSec * RTC_ALARM_TIME_BASE ) ); */ - 525 .loc 1 310 0 - 526 .cfi_startproc - 527 @ args = 0, pretend = 0, frame = 0 - 528 @ frame_needed = 0, uses_anonymous_args = 0 - 529 .LVL44: - 530 0000 70B5 push {r4, r5, r6, lr} - 531 .LCFI6: - 532 .cfi_def_cfa_offset 16 - 533 .cfi_offset 4, -16 - 534 .cfi_offset 5, -12 - 535 .cfi_offset 6, -8 - 536 .cfi_offset 14, -4 - 312:./Src/hw_rtc.c **** } - 537 .loc 1 312 0 - 538 0002 0400 movs r4, r0 - 539 0004 0025 movs r5, #0 - 540 0006 C30E lsrs r3, r0, #27 - 541 0008 4201 lsls r2, r0, #5 - 542 000a 121B subs r2, r2, r4 - 543 000c AB41 sbcs r3, r3, r5 - 544 000e 960F lsrs r6, r2, #30 - 545 0010 9900 lsls r1, r3, #2 - 546 0012 3143 orrs r1, r6 - 547 0014 9000 lsls r0, r2, #2 - 548 .LVL45: - 549 0016 0019 adds r0, r0, r4 - 550 0018 6941 adcs r1, r1, r5 - 551 001a 4B06 lsls r3, r1, #25 - 552 001c C009 lsrs r0, r0, #7 - 553 001e 1843 orrs r0, r3 - 313:./Src/hw_rtc.c **** - 554 .loc 1 313 0 - 555 @ sp needed - 556 .LVL46: - 557 0020 70BD pop {r4, r5, r6, pc} - 558 .cfi_endproc - 559 .LFE102: - 561 .global __aeabi_idivmod - 562 .section .text.HW_RTC_SetAlarm,"ax",%progbits - 563 .align 1 - 564 .global HW_RTC_SetAlarm - 565 .syntax unified - 566 .code 16 - 567 .thumb_func - 568 .fpu softvfp - 570 HW_RTC_SetAlarm: - 571 .LFB103: - 321:./Src/hw_rtc.c **** /* we don't go in Low Power mode for timeout below MIN_ALARM_DELAY */ - 572 .loc 1 321 0 - 573 .cfi_startproc - 574 @ args = 0, pretend = 0, frame = 24 - 575 @ frame_needed = 0, uses_anonymous_args = 0 - 576 .LVL47: - 577 0000 F0B5 push {r4, r5, r6, r7, lr} - 578 .LCFI7: - ARM GAS /tmp/ccGAhXKe.s page 23 - - - 579 .cfi_def_cfa_offset 20 - 580 .cfi_offset 4, -20 - 581 .cfi_offset 5, -16 - 582 .cfi_offset 6, -12 - 583 .cfi_offset 7, -8 - 584 .cfi_offset 14, -4 - 585 0002 87B0 sub sp, sp, #28 - 586 .LCFI8: - 587 .cfi_def_cfa_offset 48 - 588 0004 0400 movs r4, r0 - 323:./Src/hw_rtc.c **** { - 589 .loc 1 323 0 - 590 0006 5D4B ldr r3, .L45 - 591 0008 0025 movs r5, #0 - 592 000a 5D5F ldrsh r5, [r3, r5] - 593 000c 0335 adds r5, r5, #3 - 594 .LBB38: - 595 .LBB39: - 351:./Src/hw_rtc.c **** - 596 .loc 1 351 0 - 597 000e 01A9 add r1, sp, #4 - 598 0010 6846 mov r0, sp - 599 .LVL48: - 600 0012 FFF7FEFF bl HW_RTC_GetCalendarValue - 601 .LVL49: - 353:./Src/hw_rtc.c **** } - 602 .loc 1 353 0 - 603 0016 5A4B ldr r3, .L45+4 - 604 0018 1B68 ldr r3, [r3] - 605 001a C01A subs r0, r0, r3 - 606 .LVL50: - 607 .LBE39: - 608 .LBE38: - 323:./Src/hw_rtc.c **** { - 609 .loc 1 323 0 - 610 001c 201A subs r0, r4, r0 - 611 001e 8542 cmp r5, r0 - 612 0020 28D2 bcs .L25 - 325:./Src/hw_rtc.c **** } - 613 .loc 1 325 0 - 614 0022 0120 movs r0, #1 - 615 0024 FFF7FEFF bl LowPower_Enable - 616 .LVL51: - 617 .L26: - 332:./Src/hw_rtc.c **** { - 618 .loc 1 332 0 - 619 0028 FFF7FEFF bl LowPower_GetState - 620 .LVL52: - 621 002c 0028 cmp r0, #0 - 622 002e 25D0 beq .L44 - 623 .L27: - 624 .LVL53: - 625 .LBB40: - 626 .LBB41: - 480:./Src/hw_rtc.c **** RTC_DateTypeDef RTC_DateStruct = RtcTimerContext.RTC_Calndr_Date; - 627 .loc 1 480 0 - 628 0030 01AD add r5, sp, #4 - ARM GAS /tmp/ccGAhXKe.s page 24 - - - 629 0032 5349 ldr r1, .L45+4 - 630 0034 2A00 movs r2, r5 - 631 0036 0B1D adds r3, r1, #4 - 632 0038 C1CB ldmia r3!, {r0, r6, r7} - 633 003a C1C2 stmia r2!, {r0, r6, r7} - 634 003c 41CB ldmia r3!, {r0, r6} - 635 003e 41C2 stmia r2!, {r0, r6} - 481:./Src/hw_rtc.c **** - 636 .loc 1 481 0 - 637 0040 8B69 ldr r3, [r1, #24] - 638 0042 0093 str r3, [sp] - 639 .LBB42: - 640 .LBB43: - 380:./Src/hw_rtc.c **** - 641 .loc 1 380 0 - 642 0044 4F48 ldr r0, .L45+8 - 643 0046 0168 ldr r1, [r0] - 644 0048 CA68 ldr r2, [r1, #12] - 645 004a FF23 movs r3, #255 - 646 004c 1A40 ands r2, r3 - 647 004e 4E4B ldr r3, .L45+12 - 648 0050 1343 orrs r3, r2 - 649 0052 CB60 str r3, [r1, #12] - 384:./Src/hw_rtc.c **** } - 650 .loc 1 384 0 - 651 0054 8021 movs r1, #128 - 652 0056 4900 lsls r1, r1, #1 - 653 0058 FFF7FEFF bl HAL_RTC_DeactivateAlarm - 654 .LVL54: - 655 .LBE43: - 656 .LBE42: - 487:./Src/hw_rtc.c **** rtcAlarmSubSeconds += ( timeoutValue & PREDIV_S); - 657 .loc 1 487 0 - 658 005c AB88 ldrh r3, [r5, #4] - 659 005e 4B4F ldr r7, .L45+16 - 660 0060 FF1A subs r7, r7, r3 - 661 0062 BFB2 uxth r7, r7 - 662 .LVL55: - 488:./Src/hw_rtc.c **** /* convert timeout to seconds */ - 663 .loc 1 488 0 - 664 0064 A305 lsls r3, r4, #22 - 665 0066 9B0D lsrs r3, r3, #22 - 666 0068 FF18 adds r7, r7, r3 - 667 .LVL56: - 668 006a BFB2 uxth r7, r7 - 669 .LVL57: - 490:./Src/hw_rtc.c **** - 670 .loc 1 490 0 - 671 006c A30A lsrs r3, r4, #10 - 672 .LVL58: - 493:./Src/hw_rtc.c **** while (timeoutValue >= SECONDS_IN_1DAY) - 673 .loc 1 493 0 - 674 006e 6A46 mov r2, sp - 675 0070 9078 ldrb r0, [r2, #2] - 676 .LVL59: - 677 0072 10E0 b .L28 - 678 .LVL60: - ARM GAS /tmp/ccGAhXKe.s page 25 - - - 679 .L25: - 680 .LBE41: - 681 .LBE40: - 329:./Src/hw_rtc.c **** } - 682 .loc 1 329 0 - 683 0074 0120 movs r0, #1 - 684 0076 FFF7FEFF bl LowPower_Disable - 685 .LVL61: - 686 007a D5E7 b .L26 - 687 .L44: - 334:./Src/hw_rtc.c **** timeout = timeout - McuWakeUpTimeCal; - 688 .loc 1 334 0 - 689 007c 0130 adds r0, r0, #1 - 690 007e FFF7FEFF bl LowPower_Enable - 691 .LVL62: - 335:./Src/hw_rtc.c **** } - 692 .loc 1 335 0 - 693 0082 3E4B ldr r3, .L45 - 694 0084 0022 movs r2, #0 - 695 0086 9B5E ldrsh r3, [r3, r2] - 696 0088 E41A subs r4, r4, r3 - 697 .LVL63: - 698 008a D1E7 b .L27 - 699 .LVL64: - 700 .L29: - 701 .LBB45: - 702 .LBB44: - 496:./Src/hw_rtc.c **** rtcAlarmDays++; - 703 .loc 1 496 0 - 704 008c 404A ldr r2, .L45+20 - 705 008e 9446 mov ip, r2 - 706 0090 6344 add r3, r3, ip - 707 .LVL65: - 497:./Src/hw_rtc.c **** } - 708 .loc 1 497 0 - 709 0092 0130 adds r0, r0, #1 - 710 .LVL66: - 711 0094 80B2 uxth r0, r0 - 712 .LVL67: - 713 .L28: - 494:./Src/hw_rtc.c **** { - 714 .loc 1 494 0 - 715 0096 3F4A ldr r2, .L45+24 - 716 0098 9342 cmp r3, r2 - 717 009a F7D8 bhi .L29 - 501:./Src/hw_rtc.c **** while (timeoutValue >= SECONDS_IN_1HOUR) - 718 .loc 1 501 0 - 719 009c 01AA add r2, sp, #4 - 720 009e 1478 ldrb r4, [r2] - 721 .LVL68: - 722 00a0 04E0 b .L30 - 723 .L31: - 504:./Src/hw_rtc.c **** rtcAlarmHours++; - 724 .loc 1 504 0 - 725 00a2 3D4A ldr r2, .L45+28 - 726 00a4 9446 mov ip, r2 - 727 00a6 6344 add r3, r3, ip - ARM GAS /tmp/ccGAhXKe.s page 26 - - - 728 .LVL69: - 505:./Src/hw_rtc.c **** } - 729 .loc 1 505 0 - 730 00a8 0134 adds r4, r4, #1 - 731 .LVL70: - 732 00aa A4B2 uxth r4, r4 - 733 .LVL71: - 734 .L30: - 502:./Src/hw_rtc.c **** { - 735 .loc 1 502 0 - 736 00ac 3B4A ldr r2, .L45+32 - 737 00ae 9342 cmp r3, r2 - 738 00b0 F7D8 bhi .L31 - 509:./Src/hw_rtc.c **** while (timeoutValue >= SECONDS_IN_1MINUTE) - 739 .loc 1 509 0 - 740 00b2 01AA add r2, sp, #4 - 741 00b4 5578 ldrb r5, [r2, #1] - 742 .LVL72: - 743 00b6 02E0 b .L32 - 744 .L33: - 512:./Src/hw_rtc.c **** rtcAlarmMinutes++; - 745 .loc 1 512 0 - 746 00b8 3C3B subs r3, r3, #60 - 747 .LVL73: - 513:./Src/hw_rtc.c **** } - 748 .loc 1 513 0 - 749 00ba 0135 adds r5, r5, #1 - 750 .LVL74: - 751 00bc ADB2 uxth r5, r5 - 752 .LVL75: - 753 .L32: - 510:./Src/hw_rtc.c **** { - 754 .loc 1 510 0 - 755 00be 3B2B cmp r3, #59 - 756 00c0 FAD8 bhi .L33 - 517:./Src/hw_rtc.c **** - 757 .loc 1 517 0 - 758 00c2 01AA add r2, sp, #4 - 759 00c4 9678 ldrb r6, [r2, #2] - 760 00c6 9BB2 uxth r3, r3 - 761 .LVL76: - 762 00c8 F618 adds r6, r6, r3 - 763 00ca B6B2 uxth r6, r6 - 764 .LVL77: - 765 00cc 05E0 b .L34 - 766 .L35: - 522:./Src/hw_rtc.c **** rtcAlarmSeconds++; - 767 .loc 1 522 0 - 768 00ce 344B ldr r3, .L45+36 - 769 00d0 9C46 mov ip, r3 - 770 00d2 6744 add r7, r7, ip - 771 .LVL78: - 772 00d4 BFB2 uxth r7, r7 - 773 .LVL79: - 523:./Src/hw_rtc.c **** } - 774 .loc 1 523 0 - 775 00d6 0136 adds r6, r6, #1 - ARM GAS /tmp/ccGAhXKe.s page 27 - - - 776 .LVL80: - 777 00d8 B6B2 uxth r6, r6 - 778 .LVL81: - 779 .L34: - 520:./Src/hw_rtc.c **** { - 780 .loc 1 520 0 - 781 00da 2C4B ldr r3, .L45+16 - 782 00dc 9F42 cmp r7, r3 - 783 00de F6D8 bhi .L35 - 784 00e0 03E0 b .L36 - 785 .L37: - 528:./Src/hw_rtc.c **** rtcAlarmMinutes++; - 786 .loc 1 528 0 - 787 00e2 3C3E subs r6, r6, #60 - 788 .LVL82: - 789 00e4 B6B2 uxth r6, r6 - 790 .LVL83: - 529:./Src/hw_rtc.c **** } - 791 .loc 1 529 0 - 792 00e6 0135 adds r5, r5, #1 - 793 .LVL84: - 794 00e8 ADB2 uxth r5, r5 - 795 .LVL85: - 796 .L36: - 526:./Src/hw_rtc.c **** { - 797 .loc 1 526 0 - 798 00ea 3B2E cmp r6, #59 - 799 00ec F9D8 bhi .L37 - 800 00ee 03E0 b .L38 - 801 .L39: - 534:./Src/hw_rtc.c **** rtcAlarmHours++; - 802 .loc 1 534 0 - 803 00f0 3C3D subs r5, r5, #60 - 804 .LVL86: - 805 00f2 ADB2 uxth r5, r5 - 806 .LVL87: - 535:./Src/hw_rtc.c **** } - 807 .loc 1 535 0 - 808 00f4 0134 adds r4, r4, #1 - 809 .LVL88: - 810 00f6 A4B2 uxth r4, r4 - 811 .LVL89: - 812 .L38: - 532:./Src/hw_rtc.c **** { - 813 .loc 1 532 0 - 814 00f8 3B2D cmp r5, #59 - 815 00fa F9D8 bhi .L39 - 816 00fc 03E0 b .L40 - 817 .L41: - 540:./Src/hw_rtc.c **** rtcAlarmDays++; - 818 .loc 1 540 0 - 819 00fe 183C subs r4, r4, #24 - 820 .LVL90: - 821 0100 A4B2 uxth r4, r4 - 822 .LVL91: - 541:./Src/hw_rtc.c **** } - 823 .loc 1 541 0 - ARM GAS /tmp/ccGAhXKe.s page 28 - - - 824 0102 0130 adds r0, r0, #1 - 825 .LVL92: - 826 0104 80B2 uxth r0, r0 - 827 .LVL93: - 828 .L40: - 538:./Src/hw_rtc.c **** { - 829 .loc 1 538 0 - 830 0106 172C cmp r4, #23 - 831 0108 F9D8 bhi .L41 - 544:./Src/hw_rtc.c **** { - 832 .loc 1 544 0 - 833 010a 6B46 mov r3, sp - 834 010c DB78 ldrb r3, [r3, #3] - 835 010e 9B07 lsls r3, r3, #30 - 836 0110 0BD1 bne .L42 - 546:./Src/hw_rtc.c **** { - 837 .loc 1 546 0 - 838 0112 6B46 mov r3, sp - 839 0114 5B78 ldrb r3, [r3, #1] - 840 0116 013B subs r3, r3, #1 - 841 0118 224A ldr r2, .L45+40 - 842 011a D15C ldrb r1, [r2, r3] - 843 011c 8BB2 uxth r3, r1 - 844 011e 9842 cmp r0, r3 - 845 0120 0ED9 bls .L43 - 548:./Src/hw_rtc.c **** } - 846 .loc 1 548 0 - 847 0122 FFF7FEFF bl __aeabi_idivmod - 848 .LVL94: - 849 0126 88B2 uxth r0, r1 - 850 .LVL95: - 851 0128 0AE0 b .L43 - 852 .L42: - 553:./Src/hw_rtc.c **** { - 853 .loc 1 553 0 - 854 012a 6B46 mov r3, sp - 855 012c 5B78 ldrb r3, [r3, #1] - 856 012e 013B subs r3, r3, #1 - 857 0130 1D4A ldr r2, .L45+44 - 858 0132 D15C ldrb r1, [r2, r3] - 859 0134 8BB2 uxth r3, r1 - 860 0136 9842 cmp r0, r3 - 861 0138 02D9 bls .L43 - 555:./Src/hw_rtc.c **** } - 862 .loc 1 555 0 - 863 013a FFF7FEFF bl __aeabi_idivmod - 864 .LVL96: - 865 013e 88B2 uxth r0, r1 - 866 .LVL97: - 867 .L43: - 560:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmSubSecondMask = HW_RTC_ALARMSUBSECONDMASK; - 868 .loc 1 560 0 - 869 0140 124B ldr r3, .L45+16 - 870 0142 DF1B subs r7, r3, r7 - 871 .LVL98: - 872 0144 1949 ldr r1, .L45+48 - 873 0146 4F60 str r7, [r1, #4] - ARM GAS /tmp/ccGAhXKe.s page 29 - - - 561:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.Seconds = rtcAlarmSeconds; - 874 .loc 1 561 0 - 875 0148 A023 movs r3, #160 - 876 014a 1B05 lsls r3, r3, #20 - 877 014c 8B61 str r3, [r1, #24] - 562:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.Minutes = rtcAlarmMinutes; - 878 .loc 1 562 0 - 879 014e 8E70 strb r6, [r1, #2] - 563:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.Hours = rtcAlarmHours; - 880 .loc 1 563 0 - 881 0150 4D70 strb r5, [r1, #1] - 564:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmDateWeekDay = ( uint8_t )rtcAlarmDays; - 882 .loc 1 564 0 - 883 0152 0C70 strb r4, [r1] - 565:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.TimeFormat = RTC_TimeStruct.TimeFormat; - 884 .loc 1 565 0 - 885 0154 2023 movs r3, #32 - 886 0156 C854 strb r0, [r1, r3] - 566:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmDateWeekDaySel = RTC_ALARMDATEWEEKDAYSEL_DATE; - 887 .loc 1 566 0 - 888 0158 01AB add r3, sp, #4 - 889 015a DB78 ldrb r3, [r3, #3] - 890 015c CB70 strb r3, [r1, #3] - 567:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmMask = RTC_ALARMMASK_NONE; - 891 .loc 1 567 0 - 892 015e 0023 movs r3, #0 - 893 0160 CB61 str r3, [r1, #28] - 568:./Src/hw_rtc.c **** RTC_AlarmStructure.Alarm = RTC_ALARM_A; - 894 .loc 1 568 0 - 895 0162 4B61 str r3, [r1, #20] - 569:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; - 896 .loc 1 569 0 - 897 0164 8022 movs r2, #128 - 898 0166 5200 lsls r2, r2, #1 - 899 0168 4A62 str r2, [r1, #36] - 570:./Src/hw_rtc.c **** RTC_AlarmStructure.AlarmTime.StoreOperation = RTC_STOREOPERATION_RESET; - 900 .loc 1 570 0 - 901 016a CB60 str r3, [r1, #12] - 571:./Src/hw_rtc.c **** - 902 .loc 1 571 0 - 903 016c 0B61 str r3, [r1, #16] - 574:./Src/hw_rtc.c **** - 904 .loc 1 574 0 - 905 016e 0022 movs r2, #0 - 906 0170 0448 ldr r0, .L45+8 - 907 .LVL99: - 908 0172 FFF7FEFF bl HAL_RTC_SetAlarm_IT - 909 .LVL100: - 910 .LBE44: - 911 .LBE45: - 339:./Src/hw_rtc.c **** - 912 .loc 1 339 0 - 913 0176 07B0 add sp, sp, #28 - 914 @ sp needed - 915 0178 F0BD pop {r4, r5, r6, r7, pc} - 916 .L46: - 917 017a C046 .align 2 - ARM GAS /tmp/ccGAhXKe.s page 30 - - - 918 .L45: - 919 017c 00000000 .word .LANCHOR5 - 920 0180 00000000 .word .LANCHOR2 - 921 0184 00000000 .word .LANCHOR0 - 922 0188 7FFEFFFF .word -385 - 923 018c FF030000 .word 1023 - 924 0190 80AEFEFF .word -86400 - 925 0194 7F510100 .word 86399 - 926 0198 F0F1FFFF .word -3600 - 927 019c 0F0E0000 .word 3599 - 928 01a0 00FCFFFF .word -1024 - 929 01a4 00000000 .word .LANCHOR6 - 930 01a8 00000000 .word .LANCHOR7 - 931 01ac 00000000 .word .LANCHOR4 - 932 .cfi_endproc - 933 .LFE103: - 935 .section .text.HW_RTC_GetTimerElapsedTime,"ax",%progbits - 936 .align 1 - 937 .global HW_RTC_GetTimerElapsedTime - 938 .syntax unified - 939 .code 16 - 940 .thumb_func - 941 .fpu softvfp - 943 HW_RTC_GetTimerElapsedTime: - 944 .LFB104: - 347:./Src/hw_rtc.c **** RTC_TimeTypeDef RTC_TimeStruct; - 945 .loc 1 347 0 - 946 .cfi_startproc - 947 @ args = 0, pretend = 0, frame = 24 - 948 @ frame_needed = 0, uses_anonymous_args = 0 - 949 0000 00B5 push {lr} - 950 .LCFI9: - 951 .cfi_def_cfa_offset 4 - 952 .cfi_offset 14, -4 - 953 0002 87B0 sub sp, sp, #28 - 954 .LCFI10: - 955 .cfi_def_cfa_offset 32 - 351:./Src/hw_rtc.c **** - 956 .loc 1 351 0 - 957 0004 01A9 add r1, sp, #4 - 958 0006 6846 mov r0, sp - 959 0008 FFF7FEFF bl HW_RTC_GetCalendarValue - 960 .LVL101: - 353:./Src/hw_rtc.c **** } - 961 .loc 1 353 0 - 962 000c 024B ldr r3, .L48 - 963 000e 1B68 ldr r3, [r3] - 964 0010 C01A subs r0, r0, r3 - 965 .LVL102: - 354:./Src/hw_rtc.c **** - 966 .loc 1 354 0 - 967 0012 07B0 add sp, sp, #28 - 968 @ sp needed - 969 0014 00BD pop {pc} - 970 .L49: - 971 0016 C046 .align 2 - 972 .L48: - ARM GAS /tmp/ccGAhXKe.s page 31 - - - 973 0018 00000000 .word .LANCHOR2 - 974 .cfi_endproc - 975 .LFE104: - 977 .section .text.HW_RTC_GetTimerValue,"ax",%progbits - 978 .align 1 - 979 .global HW_RTC_GetTimerValue - 980 .syntax unified - 981 .code 16 - 982 .thumb_func - 983 .fpu softvfp - 985 HW_RTC_GetTimerValue: - 986 .LFB105: - 362:./Src/hw_rtc.c **** RTC_TimeTypeDef RTC_TimeStruct; - 987 .loc 1 362 0 - 988 .cfi_startproc - 989 @ args = 0, pretend = 0, frame = 24 - 990 @ frame_needed = 0, uses_anonymous_args = 0 - 991 0000 00B5 push {lr} - 992 .LCFI11: - 993 .cfi_def_cfa_offset 4 - 994 .cfi_offset 14, -4 - 995 0002 87B0 sub sp, sp, #28 - 996 .LCFI12: - 997 .cfi_def_cfa_offset 32 - 366:./Src/hw_rtc.c **** - 998 .loc 1 366 0 - 999 0004 01A9 add r1, sp, #4 - 1000 0006 6846 mov r0, sp - 1001 0008 FFF7FEFF bl HW_RTC_GetCalendarValue - 1002 .LVL103: - 369:./Src/hw_rtc.c **** - 1003 .loc 1 369 0 - 1004 000c 07B0 add sp, sp, #28 - 1005 @ sp needed - 1006 000e 00BD pop {pc} - 1007 .cfi_endproc - 1008 .LFE105: - 1010 .section .text.HW_RTC_StopAlarm,"ax",%progbits - 1011 .align 1 - 1012 .global HW_RTC_StopAlarm - 1013 .syntax unified - 1014 .code 16 - 1015 .thumb_func - 1016 .fpu softvfp - 1018 HW_RTC_StopAlarm: - 1019 .LFB106: - 377:./Src/hw_rtc.c **** - 1020 .loc 1 377 0 - 1021 .cfi_startproc - 1022 @ args = 0, pretend = 0, frame = 0 - 1023 @ frame_needed = 0, uses_anonymous_args = 0 - 1024 0000 10B5 push {r4, lr} - 1025 .LCFI13: - 1026 .cfi_def_cfa_offset 8 - 1027 .cfi_offset 4, -8 - 1028 .cfi_offset 14, -4 - 380:./Src/hw_rtc.c **** - ARM GAS /tmp/ccGAhXKe.s page 32 - - - 1029 .loc 1 380 0 - 1030 0002 0648 ldr r0, .L52 - 1031 0004 0168 ldr r1, [r0] - 1032 0006 CA68 ldr r2, [r1, #12] - 1033 0008 FF23 movs r3, #255 - 1034 000a 1A40 ands r2, r3 - 1035 000c 044B ldr r3, .L52+4 - 1036 000e 1343 orrs r3, r2 - 1037 0010 CB60 str r3, [r1, #12] - 384:./Src/hw_rtc.c **** } - 1038 .loc 1 384 0 - 1039 0012 8021 movs r1, #128 - 1040 0014 4900 lsls r1, r1, #1 - 1041 0016 FFF7FEFF bl HAL_RTC_DeactivateAlarm - 1042 .LVL104: - 385:./Src/hw_rtc.c **** - 1043 .loc 1 385 0 - 1044 @ sp needed - 1045 001a 10BD pop {r4, pc} - 1046 .L53: - 1047 .align 2 - 1048 .L52: - 1049 001c 00000000 .word .LANCHOR0 - 1050 0020 7FFEFFFF .word -385 - 1051 .cfi_endproc - 1052 .LFE106: - 1054 .section .text.HW_RTC_IrqHandler,"ax",%progbits - 1055 .align 1 - 1056 .global HW_RTC_IrqHandler - 1057 .syntax unified - 1058 .code 16 - 1059 .thumb_func - 1060 .fpu softvfp - 1062 HW_RTC_IrqHandler: - 1063 .LFB107: - 393:./Src/hw_rtc.c **** RTC_HandleTypeDef* hrtc=&RtcHandle; - 1064 .loc 1 393 0 - 1065 .cfi_startproc - 1066 @ args = 0, pretend = 0, frame = 0 - 1067 @ frame_needed = 0, uses_anonymous_args = 0 - 1068 0000 10B5 push {r4, lr} - 1069 .LCFI14: - 1070 .cfi_def_cfa_offset 8 - 1071 .cfi_offset 4, -8 - 1072 .cfi_offset 14, -4 - 1073 .LVL105: - 396:./Src/hw_rtc.c **** - 1074 .loc 1 396 0 - 1075 0002 0120 movs r0, #1 - 1076 0004 FFF7FEFF bl LowPower_Enable - 1077 .LVL106: - 399:./Src/hw_rtc.c **** { - 1078 .loc 1 399 0 - 1079 0008 0B4B ldr r3, .L57 - 1080 000a 1B68 ldr r3, [r3] - 1081 000c 9A68 ldr r2, [r3, #8] - 1082 000e D204 lsls r2, r2, #19 - ARM GAS /tmp/ccGAhXKe.s page 33 - - - 1083 0010 02D5 bpl .L54 - 402:./Src/hw_rtc.c **** { - 1084 .loc 1 402 0 - 1085 0012 DA68 ldr r2, [r3, #12] - 1086 0014 D205 lsls r2, r2, #23 - 1087 0016 00D4 bmi .L56 - 1088 .L54: - 412:./Src/hw_rtc.c **** - 1089 .loc 1 412 0 - 1090 @ sp needed - 1091 0018 10BD pop {r4, pc} - 1092 .L56: - 405:./Src/hw_rtc.c **** /* Clear the EXTI's line Flag for RTC Alarm */ - 1093 .loc 1 405 0 - 1094 001a D968 ldr r1, [r3, #12] - 1095 001c FF22 movs r2, #255 - 1096 001e 1140 ands r1, r2 - 1097 0020 064A ldr r2, .L57+4 - 1098 0022 0A43 orrs r2, r1 - 1099 0024 DA60 str r2, [r3, #12] - 407:./Src/hw_rtc.c **** /* AlarmA callback */ - 1100 .loc 1 407 0 - 1101 0026 064B ldr r3, .L57+8 - 1102 0028 8022 movs r2, #128 - 1103 002a 9202 lsls r2, r2, #10 - 1104 002c 5A61 str r2, [r3, #20] - 409:./Src/hw_rtc.c **** } - 1105 .loc 1 409 0 - 1106 002e 0248 ldr r0, .L57 - 1107 0030 FFF7FEFF bl HAL_RTC_AlarmAEventCallback - 1108 .LVL107: - 412:./Src/hw_rtc.c **** - 1109 .loc 1 412 0 - 1110 0034 F0E7 b .L54 - 1111 .L58: - 1112 0036 C046 .align 2 - 1113 .L57: - 1114 0038 00000000 .word .LANCHOR0 - 1115 003c 7FFEFFFF .word -385 - 1116 0040 00040140 .word 1073808384 - 1117 .cfi_endproc - 1118 .LFE107: - 1120 .section .text.HW_RTC_DelayMs,"ax",%progbits - 1121 .align 1 - 1122 .global HW_RTC_DelayMs - 1123 .syntax unified - 1124 .code 16 - 1125 .thumb_func - 1126 .fpu softvfp - 1128 HW_RTC_DelayMs: - 1129 .LFB108: - 421:./Src/hw_rtc.c **** TimerTime_t delayValue = 0; - 1130 .loc 1 421 0 - 1131 .cfi_startproc - 1132 @ args = 0, pretend = 0, frame = 24 - 1133 @ frame_needed = 0, uses_anonymous_args = 0 - 1134 .LVL108: - ARM GAS /tmp/ccGAhXKe.s page 34 - - - 1135 0000 30B5 push {r4, r5, lr} - 1136 .LCFI15: - 1137 .cfi_def_cfa_offset 12 - 1138 .cfi_offset 4, -12 - 1139 .cfi_offset 5, -8 - 1140 .cfi_offset 14, -4 - 1141 0002 87B0 sub sp, sp, #28 - 1142 .LCFI16: - 1143 .cfi_def_cfa_offset 40 - 1144 .LVL109: - 1145 .LBB46: - 1146 .LBB47: - 301:./Src/hw_rtc.c **** } - 1147 .loc 1 301 0 - 1148 0004 410E lsrs r1, r0, #25 - 1149 0006 C001 lsls r0, r0, #7 - 1150 .LVL110: - 1151 0008 7D22 movs r2, #125 - 1152 000a 0023 movs r3, #0 - 1153 000c FFF7FEFF bl __aeabi_uldivmod - 1154 .LVL111: - 1155 0010 0400 movs r4, r0 - 1156 .LVL112: - 1157 .LBE47: - 1158 .LBE46: - 1159 .LBB48: - 1160 .LBB49: - 366:./Src/hw_rtc.c **** - 1161 .loc 1 366 0 - 1162 0012 01A9 add r1, sp, #4 - 1163 0014 6846 mov r0, sp - 1164 0016 FFF7FEFF bl HW_RTC_GetCalendarValue - 1165 .LVL113: - 1166 001a 0500 movs r5, r0 - 1167 .LVL114: - 1168 .LBE49: - 1169 .LBE48: - 429:./Src/hw_rtc.c **** { - 1170 .loc 1 429 0 - 1171 001c 00E0 b .L60 - 1172 .L61: - 1173 .LBB50: - 1174 .LBB51: - 1175 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" - 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** - 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h - 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS Cortex-M Core Function/Instruction Header File - 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V4.30 - 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 20. October 2015 - 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ - 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Copyright (c) 2009 - 2015 ARM LIMITED - 8:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9:Drivers/CMSIS/Include/cmsis_gcc.h **** All rights reserved. - 10:Drivers/CMSIS/Include/cmsis_gcc.h **** Redistribution and use in source and binary forms, with or without - 11:Drivers/CMSIS/Include/cmsis_gcc.h **** modification, are permitted provided that the following conditions are met: - 12:Drivers/CMSIS/Include/cmsis_gcc.h **** - Redistributions of source code must retain the above copyright - 13:Drivers/CMSIS/Include/cmsis_gcc.h **** notice, this list of conditions and the following disclaimer. - ARM GAS /tmp/ccGAhXKe.s page 35 - - - 14:Drivers/CMSIS/Include/cmsis_gcc.h **** - Redistributions in binary form must reproduce the above copyright - 15:Drivers/CMSIS/Include/cmsis_gcc.h **** notice, this list of conditions and the following disclaimer in the - 16:Drivers/CMSIS/Include/cmsis_gcc.h **** documentation and/or other materials provided with the distribution. - 17:Drivers/CMSIS/Include/cmsis_gcc.h **** - Neither the name of ARM nor the names of its contributors may be used - 18:Drivers/CMSIS/Include/cmsis_gcc.h **** to endorse or promote products derived from this software without - 19:Drivers/CMSIS/Include/cmsis_gcc.h **** specific prior written permission. - 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * - 21:Drivers/CMSIS/Include/cmsis_gcc.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 22:Drivers/CMSIS/Include/cmsis_gcc.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 23:Drivers/CMSIS/Include/cmsis_gcc.h **** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - 24:Drivers/CMSIS/Include/cmsis_gcc.h **** ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - 25:Drivers/CMSIS/Include/cmsis_gcc.h **** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - 26:Drivers/CMSIS/Include/cmsis_gcc.h **** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - 27:Drivers/CMSIS/Include/cmsis_gcc.h **** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - 28:Drivers/CMSIS/Include/cmsis_gcc.h **** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - 29:Drivers/CMSIS/Include/cmsis_gcc.h **** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - 30:Drivers/CMSIS/Include/cmsis_gcc.h **** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - 31:Drivers/CMSIS/Include/cmsis_gcc.h **** POSSIBILITY OF SUCH DAMAGE. - 32:Drivers/CMSIS/Include/cmsis_gcc.h **** ---------------------------------------------------------------------------*/ - 33:Drivers/CMSIS/Include/cmsis_gcc.h **** - 34:Drivers/CMSIS/Include/cmsis_gcc.h **** - 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H - 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H - 37:Drivers/CMSIS/Include/cmsis_gcc.h **** - 38:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ - 39:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined ( __GNUC__ ) - 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push - 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" - 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" - 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" - 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 45:Drivers/CMSIS/Include/cmsis_gcc.h **** - 46:Drivers/CMSIS/Include/cmsis_gcc.h **** - 47:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ - 48:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface - 49:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - 50:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ - 51:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 52:Drivers/CMSIS/Include/cmsis_gcc.h **** - 53:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 54:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts - 55:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - 56:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 57:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 58:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) - 59:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 60:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); - 61:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 62:Drivers/CMSIS/Include/cmsis_gcc.h **** - 63:Drivers/CMSIS/Include/cmsis_gcc.h **** - 64:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 65:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts - 66:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. - 67:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 68:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 69:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) - 70:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccGAhXKe.s page 36 - - - 71:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); - 72:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 73:Drivers/CMSIS/Include/cmsis_gcc.h **** - 74:Drivers/CMSIS/Include/cmsis_gcc.h **** - 75:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 76:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register - 77:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. - 78:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value - 79:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 80:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void) - 81:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 82:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 83:Drivers/CMSIS/Include/cmsis_gcc.h **** - 84:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); - 85:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 86:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 87:Drivers/CMSIS/Include/cmsis_gcc.h **** - 88:Drivers/CMSIS/Include/cmsis_gcc.h **** - 89:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 90:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register - 91:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. - 92:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set - 93:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 94:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control) - 95:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 96:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); - 97:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 98:Drivers/CMSIS/Include/cmsis_gcc.h **** - 99:Drivers/CMSIS/Include/cmsis_gcc.h **** - 100:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 101:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register - 102:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. - 103:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value - 104:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 105:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void) - 106:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 107:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 108:Drivers/CMSIS/Include/cmsis_gcc.h **** - 109:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 110:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 111:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 112:Drivers/CMSIS/Include/cmsis_gcc.h **** - 113:Drivers/CMSIS/Include/cmsis_gcc.h **** - 114:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 115:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register - 116:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. - 117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value - 118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 119:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void) - 120:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 122:Drivers/CMSIS/Include/cmsis_gcc.h **** - 123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - 124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 125:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 126:Drivers/CMSIS/Include/cmsis_gcc.h **** - 127:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccGAhXKe.s page 37 - - - 128:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 129:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register - 130:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. - 131:Drivers/CMSIS/Include/cmsis_gcc.h **** - 132:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value - 133:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 134:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void) - 135:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 137:Drivers/CMSIS/Include/cmsis_gcc.h **** - 138:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - 139:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 140:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 141:Drivers/CMSIS/Include/cmsis_gcc.h **** - 142:Drivers/CMSIS/Include/cmsis_gcc.h **** - 143:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 144:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer - 145:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). - 146:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value - 147:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 148:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void) - 149:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 150:Drivers/CMSIS/Include/cmsis_gcc.h **** register uint32_t result; - 151:Drivers/CMSIS/Include/cmsis_gcc.h **** - 152:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); - 153:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 155:Drivers/CMSIS/Include/cmsis_gcc.h **** - 156:Drivers/CMSIS/Include/cmsis_gcc.h **** - 157:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 158:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer - 159:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). - 160:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set - 161:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 162:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) - 163:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 164:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp"); - 165:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 166:Drivers/CMSIS/Include/cmsis_gcc.h **** - 167:Drivers/CMSIS/Include/cmsis_gcc.h **** - 168:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 169:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer - 170:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). - 171:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value - 172:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 173:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void) - 174:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 175:Drivers/CMSIS/Include/cmsis_gcc.h **** register uint32_t result; - 176:Drivers/CMSIS/Include/cmsis_gcc.h **** - 177:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); - 178:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 179:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 180:Drivers/CMSIS/Include/cmsis_gcc.h **** - 181:Drivers/CMSIS/Include/cmsis_gcc.h **** - 182:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 183:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer - 184:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). - ARM GAS /tmp/ccGAhXKe.s page 38 - - - 185:Drivers/CMSIS/Include/cmsis_gcc.h **** - 186:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set - 187:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 188:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) - 189:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 190:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); - 191:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 192:Drivers/CMSIS/Include/cmsis_gcc.h **** - 193:Drivers/CMSIS/Include/cmsis_gcc.h **** - 194:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 195:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask - 196:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. - 197:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value - 198:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 199:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void) - 200:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 201:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 202:Drivers/CMSIS/Include/cmsis_gcc.h **** - 203:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 204:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 205:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 206:Drivers/CMSIS/Include/cmsis_gcc.h **** - 207:Drivers/CMSIS/Include/cmsis_gcc.h **** - 208:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 209:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask - 210:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. - 211:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask - 212:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 213:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) - 214:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 215:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 216:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 217:Drivers/CMSIS/Include/cmsis_gcc.h **** - 218:Drivers/CMSIS/Include/cmsis_gcc.h **** - 219:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__CORTEX_M >= 0x03U) - 220:Drivers/CMSIS/Include/cmsis_gcc.h **** - 221:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 222:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ - 223:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - 224:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 225:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 226:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void) - 227:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 228:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); - 229:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 230:Drivers/CMSIS/Include/cmsis_gcc.h **** - 231:Drivers/CMSIS/Include/cmsis_gcc.h **** - 232:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 233:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ - 234:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. - 235:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 236:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void) - 238:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 239:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); - 240:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 241:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccGAhXKe.s page 39 - - - 242:Drivers/CMSIS/Include/cmsis_gcc.h **** - 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority - 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. - 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value - 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void) - 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 250:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 251:Drivers/CMSIS/Include/cmsis_gcc.h **** - 252:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - 253:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 254:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 255:Drivers/CMSIS/Include/cmsis_gcc.h **** - 256:Drivers/CMSIS/Include/cmsis_gcc.h **** - 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority - 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. - 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set - 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value) - 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 264:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); - 265:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 266:Drivers/CMSIS/Include/cmsis_gcc.h **** - 267:Drivers/CMSIS/Include/cmsis_gcc.h **** - 268:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition - 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable - 271:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. - 272:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set - 273:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 274:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) - 275:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); - 277:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 278:Drivers/CMSIS/Include/cmsis_gcc.h **** - 279:Drivers/CMSIS/Include/cmsis_gcc.h **** - 280:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 281:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask - 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. - 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value - 284:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 285:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void) - 286:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 287:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 288:Drivers/CMSIS/Include/cmsis_gcc.h **** - 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - 290:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 291:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 292:Drivers/CMSIS/Include/cmsis_gcc.h **** - 293:Drivers/CMSIS/Include/cmsis_gcc.h **** - 294:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 295:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask - 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. - 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set - 298:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccGAhXKe.s page 40 - - - 299:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) - 300:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); - 302:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 303:Drivers/CMSIS/Include/cmsis_gcc.h **** - 304:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* (__CORTEX_M >= 0x03U) */ - 305:Drivers/CMSIS/Include/cmsis_gcc.h **** - 306:Drivers/CMSIS/Include/cmsis_gcc.h **** - 307:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) - 308:Drivers/CMSIS/Include/cmsis_gcc.h **** - 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR - 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. - 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value - 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void) - 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 316:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - 317:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 318:Drivers/CMSIS/Include/cmsis_gcc.h **** - 319:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Empty asm statement works as a scheduling barrier */ - 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile (""); - 321:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - 322:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile (""); - 323:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 324:Drivers/CMSIS/Include/cmsis_gcc.h **** #else - 325:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0); - 326:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 327:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 328:Drivers/CMSIS/Include/cmsis_gcc.h **** - 329:Drivers/CMSIS/Include/cmsis_gcc.h **** - 330:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 331:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR - 332:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. - 333:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set - 334:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 335:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) - 336:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Empty asm statement works as a scheduling barrier */ - 339:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile (""); - 340:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); - 341:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile (""); - 342:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 343:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 344:Drivers/CMSIS/Include/cmsis_gcc.h **** - 345:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */ - 346:Drivers/CMSIS/Include/cmsis_gcc.h **** - 347:Drivers/CMSIS/Include/cmsis_gcc.h **** - 348:Drivers/CMSIS/Include/cmsis_gcc.h **** - 349:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ - 350:Drivers/CMSIS/Include/cmsis_gcc.h **** - 351:Drivers/CMSIS/Include/cmsis_gcc.h **** - 352:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ - 353:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - 354:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions - 355:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ - ARM GAS /tmp/ccGAhXKe.s page 41 - - - 356:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 357:Drivers/CMSIS/Include/cmsis_gcc.h **** - 358:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. - 359:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" - 360:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ - 361:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) - 362:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) - 363:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) - 364:Drivers/CMSIS/Include/cmsis_gcc.h **** #else - 365:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) - 366:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) - 367:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 368:Drivers/CMSIS/Include/cmsis_gcc.h **** - 369:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 370:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation - 371:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. - 372:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 373:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) - 374:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 375:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("nop"); - 1176 .loc 2 375 0 - 1177 .syntax divided - 1178 @ 375 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 1179 001e C046 nop - 1180 @ 0 "" 2 - 1181 .thumb - 1182 .syntax unified - 1183 .L60: - 1184 .LBE51: - 1185 .LBE50: - 1186 .LBB52: - 1187 .LBB53: - 366:./Src/hw_rtc.c **** - 1188 .loc 1 366 0 - 1189 0020 01A9 add r1, sp, #4 - 1190 0022 6846 mov r0, sp - 1191 0024 FFF7FEFF bl HW_RTC_GetCalendarValue - 1192 .LVL115: - 1193 .LBE53: - 1194 .LBE52: - 429:./Src/hw_rtc.c **** { - 1195 .loc 1 429 0 - 1196 0028 401B subs r0, r0, r5 - 1197 002a A042 cmp r0, r4 - 1198 002c F7D3 bcc .L61 - 433:./Src/hw_rtc.c **** - 1199 .loc 1 433 0 - 1200 002e 07B0 add sp, sp, #28 - 1201 @ sp needed - 1202 0030 30BD pop {r4, r5, pc} - 1203 .cfi_endproc - 1204 .LFE108: - 1206 .section .text.HW_RTC_SetTimerContext,"ax",%progbits - 1207 .align 1 - 1208 .global HW_RTC_SetTimerContext - 1209 .syntax unified - 1210 .code 16 - ARM GAS /tmp/ccGAhXKe.s page 42 - - - 1211 .thumb_func - 1212 .fpu softvfp - 1214 HW_RTC_SetTimerContext: - 1215 .LFB109: - 441:./Src/hw_rtc.c **** RtcTimerContext.Rtc_Time = HW_RTC_GetCalendarValue( &RtcTimerContext.RTC_Calndr_Date, &RtcTimerCo - 1216 .loc 1 441 0 - 1217 .cfi_startproc - 1218 @ args = 0, pretend = 0, frame = 0 - 1219 @ frame_needed = 0, uses_anonymous_args = 0 - 1220 0000 10B5 push {r4, lr} - 1221 .LCFI17: - 1222 .cfi_def_cfa_offset 8 - 1223 .cfi_offset 4, -8 - 1224 .cfi_offset 14, -4 - 442:./Src/hw_rtc.c **** return ( uint32_t ) RtcTimerContext.Rtc_Time; - 1225 .loc 1 442 0 - 1226 0002 044C ldr r4, .L63 - 1227 0004 211D adds r1, r4, #4 - 1228 0006 2000 movs r0, r4 - 1229 0008 1830 adds r0, r0, #24 - 1230 000a FFF7FEFF bl HW_RTC_GetCalendarValue - 1231 .LVL116: - 1232 000e 2060 str r0, [r4] - 444:./Src/hw_rtc.c **** - 1233 .loc 1 444 0 - 1234 @ sp needed - 1235 0010 10BD pop {r4, pc} - 1236 .L64: - 1237 0012 C046 .align 2 - 1238 .L63: - 1239 0014 00000000 .word .LANCHOR2 - 1240 .cfi_endproc - 1241 .LFE109: - 1243 .section .text.HW_RTC_GetTimerContext,"ax",%progbits - 1244 .align 1 - 1245 .global HW_RTC_GetTimerContext - 1246 .syntax unified - 1247 .code 16 - 1248 .thumb_func - 1249 .fpu softvfp - 1251 HW_RTC_GetTimerContext: - 1252 .LFB110: - 452:./Src/hw_rtc.c **** return (uint32_t) RtcTimerContext.Rtc_Time; - 1253 .loc 1 452 0 - 1254 .cfi_startproc - 1255 @ args = 0, pretend = 0, frame = 0 - 1256 @ frame_needed = 0, uses_anonymous_args = 0 - 1257 @ link register save eliminated. - 453:./Src/hw_rtc.c **** } - 1258 .loc 1 453 0 - 1259 0000 014B ldr r3, .L66 - 1260 0002 1868 ldr r0, [r3] - 454:./Src/hw_rtc.c **** /* Private functions ---------------------------------------------------------*/ - 1261 .loc 1 454 0 - 1262 @ sp needed - 1263 0004 7047 bx lr - 1264 .L67: - ARM GAS /tmp/ccGAhXKe.s page 43 - - - 1265 0006 C046 .align 2 - 1266 .L66: - 1267 0008 00000000 .word .LANCHOR2 - 1268 .cfi_endproc - 1269 .LFE110: - 1271 .section .bss.HW_RTC_Initalized,"aw",%nobits - 1272 .set .LANCHOR1,. + 0 - 1275 HW_RTC_Initalized: - 1276 0000 00 .space 1 - 1277 .section .bss.McuWakeUpTimeCal,"aw",%nobits - 1278 .align 1 - 1279 .set .LANCHOR5,. + 0 - 1282 McuWakeUpTimeCal: - 1283 0000 0000 .space 2 - 1284 .section .bss.McuWakeUpTimeInitialized,"aw",%nobits - 1285 .set .LANCHOR3,. + 0 - 1288 McuWakeUpTimeInitialized: - 1289 0000 00 .space 1 - 1290 .section .bss.RTC_AlarmStructure,"aw",%nobits - 1291 .align 2 - 1292 .set .LANCHOR4,. + 0 - 1295 RTC_AlarmStructure: - 1296 0000 00000000 .space 40 - 1296 00000000 - 1296 00000000 - 1296 00000000 - 1296 00000000 - 1297 .section .bss.RtcHandle,"aw",%nobits - 1298 .align 2 - 1299 .set .LANCHOR0,. + 0 - 1302 RtcHandle: - 1303 0000 00000000 .space 36 - 1303 00000000 - 1303 00000000 - 1303 00000000 - 1303 00000000 - 1304 .section .bss.RtcTimerContext,"aw",%nobits - 1305 .align 2 - 1306 .set .LANCHOR2,. + 0 - 1309 RtcTimerContext: - 1310 0000 00000000 .space 28 - 1310 00000000 - 1310 00000000 - 1310 00000000 - 1310 00000000 - 1311 .section .rodata.DaysInMonth,"a",%progbits - 1312 .align 2 - 1313 .set .LANCHOR7,. + 0 - 1316 DaysInMonth: - 1317 0000 1F .byte 31 - 1318 0001 1C .byte 28 - 1319 0002 1F .byte 31 - 1320 0003 1E .byte 30 - 1321 0004 1F .byte 31 - 1322 0005 1E .byte 30 - 1323 0006 1F .byte 31 - 1324 0007 1F .byte 31 - ARM GAS /tmp/ccGAhXKe.s page 44 - - - 1325 0008 1E .byte 30 - 1326 0009 1F .byte 31 - 1327 000a 1E .byte 30 - 1328 000b 1F .byte 31 - 1329 .section .rodata.DaysInMonthLeapYear,"a",%progbits - 1330 .align 2 - 1331 .set .LANCHOR6,. + 0 - 1334 DaysInMonthLeapYear: - 1335 0000 1F .byte 31 - 1336 0001 1D .byte 29 - 1337 0002 1F .byte 31 - 1338 0003 1E .byte 30 - 1339 0004 1F .byte 31 - 1340 0005 1E .byte 30 - 1341 0006 1F .byte 31 - 1342 0007 1F .byte 31 - 1343 0008 1E .byte 30 - 1344 0009 1F .byte 31 - 1345 000a 1E .byte 30 - 1346 000b 1F .byte 31 - 1347 .text - 1348 .Letext0: - 1349 .file 3 "/usr/arm-none-eabi/include/machine/_default_types.h" - 1350 .file 4 "/usr/arm-none-eabi/include/sys/lock.h" - 1351 .file 5 "/usr/arm-none-eabi/include/sys/_types.h" - 1352 .file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 1353 .file 7 "/usr/arm-none-eabi/include/sys/reent.h" - 1354 .file 8 "/usr/arm-none-eabi/include/math.h" - 1355 .file 9 "/usr/arm-none-eabi/include/sys/_stdint.h" - 1356 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 1357 .file 11 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 1358 .file 12 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" - 1359 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 1360 .file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h" - 1361 .file 15 "Middlewares/Third_Party/Lora/Utilities/utilities.h" - 1362 .file 16 "Inc/hw_msp.h" - 1363 .file 17 "Middlewares/Third_Party/Lora/Utilities/low_power.h" - 1364 .file 18 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h" - 1365 .file 19 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h" - ARM GAS /tmp/ccGAhXKe.s page 45 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 hw_rtc.c - /tmp/ccGAhXKe.s:16 .text.HW_RTC_GetCalendarValue:0000000000000000 $t - /tmp/ccGAhXKe.s:22 .text.HW_RTC_GetCalendarValue:0000000000000000 HW_RTC_GetCalendarValue - /tmp/ccGAhXKe.s:158 .text.HW_RTC_GetCalendarValue:000000000000009c $d - /tmp/ccGAhXKe.s:167 .text.HW_RTC_Init:0000000000000000 $t - /tmp/ccGAhXKe.s:174 .text.HW_RTC_Init:0000000000000000 HW_RTC_Init - /tmp/ccGAhXKe.s:298 .text.HW_RTC_Init:0000000000000080 $d - /tmp/ccGAhXKe.s:307 .text.HW_RTC_setMcuWakeUpTime:0000000000000000 $t - /tmp/ccGAhXKe.s:314 .text.HW_RTC_setMcuWakeUpTime:0000000000000000 HW_RTC_setMcuWakeUpTime - /tmp/ccGAhXKe.s:421 .text.HW_RTC_setMcuWakeUpTime:0000000000000078 $d - /tmp/ccGAhXKe.s:430 .text.HW_RTC_getMcuWakeUpTime:0000000000000000 $t - /tmp/ccGAhXKe.s:437 .text.HW_RTC_getMcuWakeUpTime:0000000000000000 HW_RTC_getMcuWakeUpTime - /tmp/ccGAhXKe.s:454 .text.HW_RTC_getMcuWakeUpTime:0000000000000008 $d - /tmp/ccGAhXKe.s:459 .text.HW_RTC_GetMinimumTimeout:0000000000000000 $t - /tmp/ccGAhXKe.s:466 .text.HW_RTC_GetMinimumTimeout:0000000000000000 HW_RTC_GetMinimumTimeout - /tmp/ccGAhXKe.s:482 .text.HW_RTC_ms2Tick:0000000000000000 $t - /tmp/ccGAhXKe.s:489 .text.HW_RTC_ms2Tick:0000000000000000 HW_RTC_ms2Tick - /tmp/ccGAhXKe.s:516 .text.HW_RTC_Tick2ms:0000000000000000 $t - /tmp/ccGAhXKe.s:523 .text.HW_RTC_Tick2ms:0000000000000000 HW_RTC_Tick2ms - /tmp/ccGAhXKe.s:563 .text.HW_RTC_SetAlarm:0000000000000000 $t - /tmp/ccGAhXKe.s:570 .text.HW_RTC_SetAlarm:0000000000000000 HW_RTC_SetAlarm - /tmp/ccGAhXKe.s:919 .text.HW_RTC_SetAlarm:000000000000017c $d - /tmp/ccGAhXKe.s:936 .text.HW_RTC_GetTimerElapsedTime:0000000000000000 $t - /tmp/ccGAhXKe.s:943 .text.HW_RTC_GetTimerElapsedTime:0000000000000000 HW_RTC_GetTimerElapsedTime - /tmp/ccGAhXKe.s:973 .text.HW_RTC_GetTimerElapsedTime:0000000000000018 $d - /tmp/ccGAhXKe.s:978 .text.HW_RTC_GetTimerValue:0000000000000000 $t - /tmp/ccGAhXKe.s:985 .text.HW_RTC_GetTimerValue:0000000000000000 HW_RTC_GetTimerValue - /tmp/ccGAhXKe.s:1011 .text.HW_RTC_StopAlarm:0000000000000000 $t - /tmp/ccGAhXKe.s:1018 .text.HW_RTC_StopAlarm:0000000000000000 HW_RTC_StopAlarm - /tmp/ccGAhXKe.s:1049 .text.HW_RTC_StopAlarm:000000000000001c $d - /tmp/ccGAhXKe.s:1055 .text.HW_RTC_IrqHandler:0000000000000000 $t - /tmp/ccGAhXKe.s:1062 .text.HW_RTC_IrqHandler:0000000000000000 HW_RTC_IrqHandler - /tmp/ccGAhXKe.s:1114 .text.HW_RTC_IrqHandler:0000000000000038 $d - /tmp/ccGAhXKe.s:1121 .text.HW_RTC_DelayMs:0000000000000000 $t - /tmp/ccGAhXKe.s:1128 .text.HW_RTC_DelayMs:0000000000000000 HW_RTC_DelayMs - /tmp/ccGAhXKe.s:1207 .text.HW_RTC_SetTimerContext:0000000000000000 $t - /tmp/ccGAhXKe.s:1214 .text.HW_RTC_SetTimerContext:0000000000000000 HW_RTC_SetTimerContext - /tmp/ccGAhXKe.s:1239 .text.HW_RTC_SetTimerContext:0000000000000014 $d - /tmp/ccGAhXKe.s:1244 .text.HW_RTC_GetTimerContext:0000000000000000 $t - /tmp/ccGAhXKe.s:1251 .text.HW_RTC_GetTimerContext:0000000000000000 HW_RTC_GetTimerContext - /tmp/ccGAhXKe.s:1267 .text.HW_RTC_GetTimerContext:0000000000000008 $d - /tmp/ccGAhXKe.s:1275 .bss.HW_RTC_Initalized:0000000000000000 HW_RTC_Initalized - /tmp/ccGAhXKe.s:1276 .bss.HW_RTC_Initalized:0000000000000000 $d - /tmp/ccGAhXKe.s:1278 .bss.McuWakeUpTimeCal:0000000000000000 $d - /tmp/ccGAhXKe.s:1282 .bss.McuWakeUpTimeCal:0000000000000000 McuWakeUpTimeCal - /tmp/ccGAhXKe.s:1288 .bss.McuWakeUpTimeInitialized:0000000000000000 McuWakeUpTimeInitialized - /tmp/ccGAhXKe.s:1289 .bss.McuWakeUpTimeInitialized:0000000000000000 $d - /tmp/ccGAhXKe.s:1291 .bss.RTC_AlarmStructure:0000000000000000 $d - /tmp/ccGAhXKe.s:1295 .bss.RTC_AlarmStructure:0000000000000000 RTC_AlarmStructure - /tmp/ccGAhXKe.s:1298 .bss.RtcHandle:0000000000000000 $d - /tmp/ccGAhXKe.s:1302 .bss.RtcHandle:0000000000000000 RtcHandle - /tmp/ccGAhXKe.s:1305 .bss.RtcTimerContext:0000000000000000 $d - /tmp/ccGAhXKe.s:1309 .bss.RtcTimerContext:0000000000000000 RtcTimerContext - /tmp/ccGAhXKe.s:1312 .rodata.DaysInMonth:0000000000000000 $d - /tmp/ccGAhXKe.s:1316 .rodata.DaysInMonth:0000000000000000 DaysInMonth - /tmp/ccGAhXKe.s:1330 .rodata.DaysInMonthLeapYear:0000000000000000 $d - ARM GAS /tmp/ccGAhXKe.s page 46 - - - /tmp/ccGAhXKe.s:1334 .rodata.DaysInMonthLeapYear:0000000000000000 DaysInMonthLeapYear - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -HAL_RTC_GetTime -HAL_RTC_GetDate -HAL_RTC_Init -HAL_RTC_SetDate -HAL_RTC_SetTime -HAL_RTCEx_EnableBypassShadow -HAL_RTC_DeactivateAlarm -HAL_NVIC_GetPendingIRQ -HAL_RTC_GetAlarm -__aeabi_uldivmod -__aeabi_idivmod -LowPower_Enable -LowPower_GetState -LowPower_Disable -HAL_RTC_SetAlarm_IT -HAL_RTC_AlarmAEventCallback diff --git a/build/hw_spi.d b/build/hw_spi.d deleted file mode 100644 index 442210b..0000000 --- a/build/hw_spi.d +++ /dev/null @@ -1,135 +0,0 @@ -build/hw_spi.d: Src/hw_spi.c Inc/hw.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \ - Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \ - Inc/hw_spi.h Inc/hw_rtc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Inc/hw_msp.h Inc/debug.h Inc/vcom.h - -Inc/hw.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: - -Inc/stm32l0xx_hw_conf.h: - -Inc/hw.h: - -Inc/hw_conf.h: - -Inc/hw_gpio.h: - -Inc/hw_spi.h: - -Inc/hw_rtc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Inc/hw_msp.h: - -Inc/debug.h: - -Inc/vcom.h: diff --git a/build/hw_spi.lst b/build/hw_spi.lst deleted file mode 100644 index f09d0e7..0000000 --- a/build/hw_spi.lst +++ /dev/null @@ -1,824 +0,0 @@ -ARM GAS /tmp/cchlfLgp.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "hw_spi.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.HW_SPI_IoInit,"ax",%progbits - 16 .align 1 - 17 .global HW_SPI_IoInit - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 HW_SPI_IoInit: - 24 .LFB98: - 25 .file 1 "./Src/hw_spi.c" - 1:./Src/hw_spi.c **** /* - 2:./Src/hw_spi.c **** / _____) _ | | - 3:./Src/hw_spi.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Src/hw_spi.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Src/hw_spi.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Src/hw_spi.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Src/hw_spi.c **** (C)2013 Semtech - 8:./Src/hw_spi.c **** - 9:./Src/hw_spi.c **** Description: Bleeper board SPI driver implementation - 10:./Src/hw_spi.c **** - 11:./Src/hw_spi.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 12:./Src/hw_spi.c **** - 13:./Src/hw_spi.c **** Maintainer: Miguel Luis and Gregory Cristian - 14:./Src/hw_spi.c **** */ - 15:./Src/hw_spi.c **** /******************************************************************************* - 16:./Src/hw_spi.c **** * @file hw_spi.c - 17:./Src/hw_spi.c **** * @author MCD Application Team - 18:./Src/hw_spi.c **** * @version V1.1.2 - 19:./Src/hw_spi.c **** * @date 08-September-2017 - 20:./Src/hw_spi.c **** * @brief manages the SPI interface - 21:./Src/hw_spi.c **** ****************************************************************************** - 22:./Src/hw_spi.c **** * @attention - 23:./Src/hw_spi.c **** * - 24:./Src/hw_spi.c **** *

© Copyright (c) 2017 STMicroelectronics International N.V. - 25:./Src/hw_spi.c **** * All rights reserved.

- 26:./Src/hw_spi.c **** * - 27:./Src/hw_spi.c **** * Redistribution and use in source and binary forms, with or without - 28:./Src/hw_spi.c **** * modification, are permitted, provided that the following conditions are met: - 29:./Src/hw_spi.c **** * - 30:./Src/hw_spi.c **** * 1. Redistribution of source code must retain the above copyright notice, - 31:./Src/hw_spi.c **** * this list of conditions and the following disclaimer. - 32:./Src/hw_spi.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 33:./Src/hw_spi.c **** * this list of conditions and the following disclaimer in the documentation - ARM GAS /tmp/cchlfLgp.s page 2 - - - 34:./Src/hw_spi.c **** * and/or other materials provided with the distribution. - 35:./Src/hw_spi.c **** * 3. Neither the name of STMicroelectronics nor the names of other - 36:./Src/hw_spi.c **** * contributors to this software may be used to endorse or promote products - 37:./Src/hw_spi.c **** * derived from this software without specific written permission. - 38:./Src/hw_spi.c **** * 4. This software, including modifications and/or derivative works of this - 39:./Src/hw_spi.c **** * software, must execute solely and exclusively on microcontroller or - 40:./Src/hw_spi.c **** * microprocessor devices manufactured by or for STMicroelectronics. - 41:./Src/hw_spi.c **** * 5. Redistribution and use of this software other than as permitted under - 42:./Src/hw_spi.c **** * this license is void and will automatically terminate your rights under - 43:./Src/hw_spi.c **** * this license. - 44:./Src/hw_spi.c **** * - 45:./Src/hw_spi.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - 46:./Src/hw_spi.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - 47:./Src/hw_spi.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - 48:./Src/hw_spi.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - 49:./Src/hw_spi.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - 50:./Src/hw_spi.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - 51:./Src/hw_spi.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - 52:./Src/hw_spi.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - 53:./Src/hw_spi.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - 54:./Src/hw_spi.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - 55:./Src/hw_spi.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - 56:./Src/hw_spi.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 57:./Src/hw_spi.c **** * - 58:./Src/hw_spi.c **** ****************************************************************************** - 59:./Src/hw_spi.c **** */ - 60:./Src/hw_spi.c **** - 61:./Src/hw_spi.c **** /* Includes ------------------------------------------------------------------*/ - 62:./Src/hw_spi.c **** #include "hw.h" - 63:./Src/hw_spi.c **** #include "utilities.h" - 64:./Src/hw_spi.c **** - 65:./Src/hw_spi.c **** - 66:./Src/hw_spi.c **** /* Private typedef -----------------------------------------------------------*/ - 67:./Src/hw_spi.c **** /* Private define ------------------------------------------------------------*/ - 68:./Src/hw_spi.c **** /* Private macro -------------------------------------------------------------*/ - 69:./Src/hw_spi.c **** /* Private variables ---------------------------------------------------------*/ - 70:./Src/hw_spi.c **** static SPI_HandleTypeDef hspi; - 71:./Src/hw_spi.c **** /* Private function prototypes -----------------------------------------------*/ - 72:./Src/hw_spi.c **** - 73:./Src/hw_spi.c **** /*! - 74:./Src/hw_spi.c **** * @brief Calculates Spi Divisor based on Spi Frequency and Mcu Frequency - 75:./Src/hw_spi.c **** * - 76:./Src/hw_spi.c **** * @param [IN] Spi Frequency - 77:./Src/hw_spi.c **** * @retval Spi divisor - 78:./Src/hw_spi.c **** */ - 79:./Src/hw_spi.c **** static uint32_t SpiFrequency( uint32_t hz ); - 80:./Src/hw_spi.c **** - 81:./Src/hw_spi.c **** /* Exported functions ---------------------------------------------------------*/ - 82:./Src/hw_spi.c **** - 83:./Src/hw_spi.c **** /*! - 84:./Src/hw_spi.c **** * @brief Initializes the SPI object and MCU peripheral - 85:./Src/hw_spi.c **** * - 86:./Src/hw_spi.c **** * @param [IN] none - 87:./Src/hw_spi.c **** */ - 88:./Src/hw_spi.c **** void HW_SPI_Init( void ) - 89:./Src/hw_spi.c **** { - 90:./Src/hw_spi.c **** - ARM GAS /tmp/cchlfLgp.s page 3 - - - 91:./Src/hw_spi.c **** /*##-1- Configure the SPI peripheral */ - 92:./Src/hw_spi.c **** /* Set the SPI parameters */ - 93:./Src/hw_spi.c **** - 94:./Src/hw_spi.c **** hspi.Instance = SPI1; - 95:./Src/hw_spi.c **** - 96:./Src/hw_spi.c **** hspi.Init.BaudRatePrescaler = SpiFrequency( 10000000 ); - 97:./Src/hw_spi.c **** hspi.Init.Direction = SPI_DIRECTION_2LINES; - 98:./Src/hw_spi.c **** hspi.Init.Mode = SPI_MODE_MASTER; - 99:./Src/hw_spi.c **** hspi.Init.CLKPolarity = SPI_POLARITY_LOW; - 100:./Src/hw_spi.c **** hspi.Init.CLKPhase = SPI_PHASE_1EDGE; - 101:./Src/hw_spi.c **** hspi.Init.DataSize = SPI_DATASIZE_8BIT; - 102:./Src/hw_spi.c **** hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 103:./Src/hw_spi.c **** hspi.Init.FirstBit = SPI_FIRSTBIT_MSB; - 104:./Src/hw_spi.c **** hspi.Init.NSS = SPI_NSS_SOFT; - 105:./Src/hw_spi.c **** hspi.Init.TIMode = SPI_TIMODE_DISABLE; - 106:./Src/hw_spi.c **** - 107:./Src/hw_spi.c **** - 108:./Src/hw_spi.c **** SPI_CLK_ENABLE(); - 109:./Src/hw_spi.c **** - 110:./Src/hw_spi.c **** - 111:./Src/hw_spi.c **** if(HAL_SPI_Init( &hspi) != HAL_OK) - 112:./Src/hw_spi.c **** { - 113:./Src/hw_spi.c **** /* Initialization Error */ - 114:./Src/hw_spi.c **** Error_Handler(); - 115:./Src/hw_spi.c **** } - 116:./Src/hw_spi.c **** - 117:./Src/hw_spi.c **** /*##-2- Configure the SPI GPIOs */ - 118:./Src/hw_spi.c **** HW_SPI_IoInit( ); - 119:./Src/hw_spi.c **** } - 120:./Src/hw_spi.c **** - 121:./Src/hw_spi.c **** /*! - 122:./Src/hw_spi.c **** * @brief De-initializes the SPI object and MCU peripheral - 123:./Src/hw_spi.c **** * - 124:./Src/hw_spi.c **** * @param [IN] none - 125:./Src/hw_spi.c **** */ - 126:./Src/hw_spi.c **** void HW_SPI_DeInit( void ) - 127:./Src/hw_spi.c **** { - 128:./Src/hw_spi.c **** - 129:./Src/hw_spi.c **** HAL_SPI_DeInit( &hspi); - 130:./Src/hw_spi.c **** - 131:./Src/hw_spi.c **** /*##-1- Reset peripherals ####*/ - 132:./Src/hw_spi.c **** __HAL_RCC_SPI1_FORCE_RESET(); - 133:./Src/hw_spi.c **** __HAL_RCC_SPI1_RELEASE_RESET(); - 134:./Src/hw_spi.c **** /*##-2- Configure the SPI GPIOs */ - 135:./Src/hw_spi.c **** HW_SPI_IoDeInit( ); - 136:./Src/hw_spi.c **** } - 137:./Src/hw_spi.c **** - 138:./Src/hw_spi.c **** void HW_SPI_IoInit( void ) - 139:./Src/hw_spi.c **** { - 26 .loc 1 139 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 24 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 0000 10B5 push {r4, lr} - 31 .LCFI0: - 32 .cfi_def_cfa_offset 8 - 33 .cfi_offset 4, -8 - ARM GAS /tmp/cchlfLgp.s page 4 - - - 34 .cfi_offset 14, -4 - 35 0002 86B0 sub sp, sp, #24 - 36 .LCFI1: - 37 .cfi_def_cfa_offset 32 - 140:./Src/hw_spi.c **** GPIO_InitTypeDef initStruct={0}; - 38 .loc 1 140 0 - 39 0004 1422 movs r2, #20 - 40 0006 0021 movs r1, #0 - 41 0008 01A8 add r0, sp, #4 - 42 000a FFF7FEFF bl memset - 43 .LVL0: - 141:./Src/hw_spi.c **** - 142:./Src/hw_spi.c **** - 143:./Src/hw_spi.c **** initStruct.Mode =GPIO_MODE_AF_PP; - 44 .loc 1 143 0 - 45 000e 0223 movs r3, #2 - 46 0010 0293 str r3, [sp, #8] - 144:./Src/hw_spi.c **** initStruct.Pull = GPIO_PULLDOWN; - 47 .loc 1 144 0 - 48 0012 0393 str r3, [sp, #12] - 145:./Src/hw_spi.c **** initStruct.Speed = GPIO_SPEED_HIGH; - 49 .loc 1 145 0 - 50 0014 0133 adds r3, r3, #1 - 51 0016 0493 str r3, [sp, #16] - 146:./Src/hw_spi.c **** initStruct.Alternate= SPI1_AF ; - 147:./Src/hw_spi.c **** - 148:./Src/hw_spi.c **** HW_GPIO_Init( RADIO_SCLK_PORT, RADIO_SCLK_PIN, &initStruct); - 52 .loc 1 148 0 - 53 0018 A024 movs r4, #160 - 54 001a E405 lsls r4, r4, #23 - 55 001c 01AA add r2, sp, #4 - 56 001e 2021 movs r1, #32 - 57 0020 2000 movs r0, r4 - 58 0022 FFF7FEFF bl HW_GPIO_Init - 59 .LVL1: - 149:./Src/hw_spi.c **** HW_GPIO_Init( RADIO_MISO_PORT, RADIO_MISO_PIN, &initStruct); - 60 .loc 1 149 0 - 61 0026 01AA add r2, sp, #4 - 62 0028 4021 movs r1, #64 - 63 002a 2000 movs r0, r4 - 64 002c FFF7FEFF bl HW_GPIO_Init - 65 .LVL2: - 150:./Src/hw_spi.c **** HW_GPIO_Init( RADIO_MOSI_PORT, RADIO_MOSI_PIN, &initStruct); - 66 .loc 1 150 0 - 67 0030 01AA add r2, sp, #4 - 68 0032 8021 movs r1, #128 - 69 0034 2000 movs r0, r4 - 70 0036 FFF7FEFF bl HW_GPIO_Init - 71 .LVL3: - 151:./Src/hw_spi.c **** - 152:./Src/hw_spi.c **** initStruct.Mode = GPIO_MODE_OUTPUT_PP; - 72 .loc 1 152 0 - 73 003a 0123 movs r3, #1 - 74 003c 0293 str r3, [sp, #8] - 153:./Src/hw_spi.c **** initStruct.Pull = GPIO_PULLUP; - 75 .loc 1 153 0 - 76 003e 0393 str r3, [sp, #12] - ARM GAS /tmp/cchlfLgp.s page 5 - - - 154:./Src/hw_spi.c **** - 155:./Src/hw_spi.c **** HW_GPIO_Init( RADIO_NSS_PORT, RADIO_NSS_PIN, &initStruct ); - 77 .loc 1 155 0 - 78 0040 064C ldr r4, .L2 - 79 0042 01AA add r2, sp, #4 - 80 0044 4021 movs r1, #64 - 81 0046 2000 movs r0, r4 - 82 0048 FFF7FEFF bl HW_GPIO_Init - 83 .LVL4: - 156:./Src/hw_spi.c **** - 157:./Src/hw_spi.c **** HW_GPIO_Write ( RADIO_NSS_PORT, RADIO_NSS_PIN, 1 ); - 84 .loc 1 157 0 - 85 004c 0122 movs r2, #1 - 86 004e 4021 movs r1, #64 - 87 0050 2000 movs r0, r4 - 88 0052 FFF7FEFF bl HW_GPIO_Write - 89 .LVL5: - 158:./Src/hw_spi.c **** } - 90 .loc 1 158 0 - 91 0056 06B0 add sp, sp, #24 - 92 @ sp needed - 93 0058 10BD pop {r4, pc} - 94 .L3: - 95 005a C046 .align 2 - 96 .L2: - 97 005c 00040050 .word 1342178304 - 98 .cfi_endproc - 99 .LFE98: - 101 .section .text.HW_SPI_Init,"ax",%progbits - 102 .align 1 - 103 .global HW_SPI_Init - 104 .syntax unified - 105 .code 16 - 106 .thumb_func - 107 .fpu softvfp - 109 HW_SPI_Init: - 110 .LFB96: - 89:./Src/hw_spi.c **** - 111 .loc 1 89 0 - 112 .cfi_startproc - 113 @ args = 0, pretend = 0, frame = 0 - 114 @ frame_needed = 0, uses_anonymous_args = 0 - 115 0000 10B5 push {r4, lr} - 116 .LCFI2: - 117 .cfi_def_cfa_offset 8 - 118 .cfi_offset 4, -8 - 119 .cfi_offset 14, -4 - 94:./Src/hw_spi.c **** - 120 .loc 1 94 0 - 121 0002 1F4B ldr r3, .L17 - 122 0004 1F4A ldr r2, .L17+4 - 123 0006 1A60 str r2, [r3] - 124 .LVL6: - 125 .LBB4: - 126 .LBB5: - 159:./Src/hw_spi.c **** - 160:./Src/hw_spi.c **** void HW_SPI_IoDeInit( void ) - ARM GAS /tmp/cchlfLgp.s page 6 - - - 161:./Src/hw_spi.c **** { - 162:./Src/hw_spi.c **** GPIO_InitTypeDef initStruct={0}; - 163:./Src/hw_spi.c **** - 164:./Src/hw_spi.c **** initStruct.Mode =GPIO_MODE_OUTPUT_PP; - 165:./Src/hw_spi.c **** - 166:./Src/hw_spi.c **** initStruct.Pull =GPIO_PULLDOWN ; - 167:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_MOSI_PORT, RADIO_MOSI_PIN, &initStruct ); - 168:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_MOSI_PORT, RADIO_MOSI_PIN, 0 ); - 169:./Src/hw_spi.c **** - 170:./Src/hw_spi.c **** initStruct.Pull =GPIO_PULLDOWN; - 171:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_MISO_PORT, RADIO_MISO_PIN, &initStruct ); - 172:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_MISO_PORT, RADIO_MISO_PIN, 0 ); - 173:./Src/hw_spi.c **** - 174:./Src/hw_spi.c **** initStruct.Pull =GPIO_PULLDOWN ; - 175:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_SCLK_PORT, RADIO_SCLK_PIN, &initStruct ); - 176:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_SCLK_PORT, RADIO_SCLK_PIN, 0 ); - 177:./Src/hw_spi.c **** - 178:./Src/hw_spi.c **** initStruct.Pull = GPIO_PULLUP; - 179:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_NSS_PORT, RADIO_NSS_PIN , &initStruct ); - 180:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_NSS_PORT, RADIO_NSS_PIN , 1 ); - 181:./Src/hw_spi.c **** } - 182:./Src/hw_spi.c **** - 183:./Src/hw_spi.c **** /*! - 184:./Src/hw_spi.c **** * @brief Sends outData and receives inData - 185:./Src/hw_spi.c **** * - 186:./Src/hw_spi.c **** * @param [IN] outData Byte to be sent - 187:./Src/hw_spi.c **** * @retval inData Received byte. - 188:./Src/hw_spi.c **** */ - 189:./Src/hw_spi.c **** uint16_t HW_SPI_InOut( uint16_t txData ) - 190:./Src/hw_spi.c **** { - 191:./Src/hw_spi.c **** uint16_t rxData ; - 192:./Src/hw_spi.c **** - 193:./Src/hw_spi.c **** HAL_SPI_TransmitReceive( &hspi, ( uint8_t * ) &txData, ( uint8_t* ) &rxData, 1, HAL_MAX_DELAY); - 194:./Src/hw_spi.c **** - 195:./Src/hw_spi.c **** return rxData; - 196:./Src/hw_spi.c **** } - 197:./Src/hw_spi.c **** - 198:./Src/hw_spi.c **** /* Private functions ---------------------------------------------------------*/ - 199:./Src/hw_spi.c **** - 200:./Src/hw_spi.c **** static uint32_t SpiFrequency( uint32_t hz ) - 201:./Src/hw_spi.c **** { - 202:./Src/hw_spi.c **** uint32_t divisor = 0; - 203:./Src/hw_spi.c **** uint32_t SysClkTmp = SystemCoreClock; - 127 .loc 1 203 0 - 128 0008 1F4B ldr r3, .L17+8 - 129 000a 1A68 ldr r2, [r3] - 130 .LVL7: - 202:./Src/hw_spi.c **** uint32_t SysClkTmp = SystemCoreClock; - 131 .loc 1 202 0 - 132 000c 0023 movs r3, #0 - 133 .LVL8: - 134 .L5: - 204:./Src/hw_spi.c **** uint32_t baudRate; - 205:./Src/hw_spi.c **** - 206:./Src/hw_spi.c **** while( SysClkTmp > hz) - 135 .loc 1 206 0 - 136 000e 1F49 ldr r1, .L17+12 - ARM GAS /tmp/cchlfLgp.s page 7 - - - 137 0010 8A42 cmp r2, r1 - 138 0012 03D9 bls .L6 - 207:./Src/hw_spi.c **** { - 208:./Src/hw_spi.c **** divisor++; - 139 .loc 1 208 0 - 140 0014 0133 adds r3, r3, #1 - 141 .LVL9: - 209:./Src/hw_spi.c **** SysClkTmp= ( SysClkTmp >> 1); - 142 .loc 1 209 0 - 143 0016 5208 lsrs r2, r2, #1 - 144 .LVL10: - 210:./Src/hw_spi.c **** - 211:./Src/hw_spi.c **** if (divisor >= 7) - 145 .loc 1 211 0 - 146 0018 062B cmp r3, #6 - 147 001a F8D9 bls .L5 - 148 .L6: - 212:./Src/hw_spi.c **** break; - 213:./Src/hw_spi.c **** } - 214:./Src/hw_spi.c **** - 215:./Src/hw_spi.c **** baudRate =((( divisor & 0x4 ) == 0 )? 0x0 : SPI_CR1_BR_2 )| - 149 .loc 1 215 0 - 150 001c 5A07 lsls r2, r3, #29 - 151 001e 24D4 bmi .L12 - 152 .LVL11: - 153 0020 0022 movs r2, #0 - 154 .L8: - 216:./Src/hw_spi.c **** ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1 )| - 155 .loc 1 216 0 - 156 0022 9907 lsls r1, r3, #30 - 157 0024 23D4 bmi .L13 - 158 0026 0021 movs r1, #0 - 159 .L9: - 215:./Src/hw_spi.c **** ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1 )| - 160 .loc 1 215 0 - 161 0028 0A43 orrs r2, r1 - 217:./Src/hw_spi.c **** ((( divisor & 0x1 ) == 0 )? 0x0 : SPI_CR1_BR_0 ); - 162 .loc 1 217 0 - 163 002a DB07 lsls r3, r3, #31 - 164 002c 21D5 bpl .L15 - 165 .LVL12: - 166 002e 0823 movs r3, #8 - 167 .L10: - 215:./Src/hw_spi.c **** ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1 )| - 168 .loc 1 215 0 - 169 0030 1343 orrs r3, r2 - 170 .LVL13: - 171 .LBE5: - 172 .LBE4: - 96:./Src/hw_spi.c **** hspi.Init.Direction = SPI_DIRECTION_2LINES; - 173 .loc 1 96 0 - 174 0032 1348 ldr r0, .L17 - 175 0034 C361 str r3, [r0, #28] - 97:./Src/hw_spi.c **** hspi.Init.Mode = SPI_MODE_MASTER; - 176 .loc 1 97 0 - 177 0036 0023 movs r3, #0 - 178 0038 8360 str r3, [r0, #8] - ARM GAS /tmp/cchlfLgp.s page 8 - - - 98:./Src/hw_spi.c **** hspi.Init.CLKPolarity = SPI_POLARITY_LOW; - 179 .loc 1 98 0 - 180 003a 8222 movs r2, #130 - 181 003c 5200 lsls r2, r2, #1 - 182 003e 4260 str r2, [r0, #4] - 99:./Src/hw_spi.c **** hspi.Init.CLKPhase = SPI_PHASE_1EDGE; - 183 .loc 1 99 0 - 184 0040 0361 str r3, [r0, #16] - 100:./Src/hw_spi.c **** hspi.Init.DataSize = SPI_DATASIZE_8BIT; - 185 .loc 1 100 0 - 186 0042 4361 str r3, [r0, #20] - 101:./Src/hw_spi.c **** hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 187 .loc 1 101 0 - 188 0044 C360 str r3, [r0, #12] - 102:./Src/hw_spi.c **** hspi.Init.FirstBit = SPI_FIRSTBIT_MSB; - 189 .loc 1 102 0 - 190 0046 8362 str r3, [r0, #40] - 103:./Src/hw_spi.c **** hspi.Init.NSS = SPI_NSS_SOFT; - 191 .loc 1 103 0 - 192 0048 0362 str r3, [r0, #32] - 104:./Src/hw_spi.c **** hspi.Init.TIMode = SPI_TIMODE_DISABLE; - 193 .loc 1 104 0 - 194 004a FC32 adds r2, r2, #252 - 195 004c 8261 str r2, [r0, #24] - 105:./Src/hw_spi.c **** - 196 .loc 1 105 0 - 197 004e 4362 str r3, [r0, #36] - 108:./Src/hw_spi.c **** - 198 .loc 1 108 0 - 199 0050 0F4A ldr r2, .L17+16 - 200 0052 516B ldr r1, [r2, #52] - 201 0054 8023 movs r3, #128 - 202 0056 5B01 lsls r3, r3, #5 - 203 0058 0B43 orrs r3, r1 - 204 005a 5363 str r3, [r2, #52] - 111:./Src/hw_spi.c **** { - 205 .loc 1 111 0 - 206 005c FFF7FEFF bl HAL_SPI_Init - 207 .LVL14: - 208 0060 0028 cmp r0, #0 - 209 0062 08D1 bne .L16 - 210 .L11: - 118:./Src/hw_spi.c **** } - 211 .loc 1 118 0 - 212 0064 FFF7FEFF bl HW_SPI_IoInit - 213 .LVL15: - 119:./Src/hw_spi.c **** - 214 .loc 1 119 0 - 215 @ sp needed - 216 0068 10BD pop {r4, pc} - 217 .LVL16: - 218 .L12: - 219 .LBB7: - 220 .LBB6: - 215:./Src/hw_spi.c **** ((( divisor & 0x2 ) == 0 )? 0x0 : SPI_CR1_BR_1 )| - 221 .loc 1 215 0 - 222 006a 2022 movs r2, #32 - ARM GAS /tmp/cchlfLgp.s page 9 - - - 223 006c D9E7 b .L8 - 224 .L13: - 216:./Src/hw_spi.c **** ((( divisor & 0x1 ) == 0 )? 0x0 : SPI_CR1_BR_0 ); - 225 .loc 1 216 0 - 226 006e 1021 movs r1, #16 - 227 0070 DAE7 b .L9 - 228 .LVL17: - 229 .L15: - 230 .loc 1 217 0 - 231 0072 0023 movs r3, #0 - 232 0074 DCE7 b .L10 - 233 .LVL18: - 234 .L16: - 235 .LBE6: - 236 .LBE7: - 114:./Src/hw_spi.c **** } - 237 .loc 1 114 0 - 238 0076 7221 movs r1, #114 - 239 0078 0648 ldr r0, .L17+20 - 240 007a FFF7FEFF bl _Error_Handler - 241 .LVL19: - 242 007e F1E7 b .L11 - 243 .L18: - 244 .align 2 - 245 .L17: - 246 0080 00000000 .word .LANCHOR0 - 247 0084 00300140 .word 1073819648 - 248 0088 00000000 .word SystemCoreClock - 249 008c 80969800 .word 10000000 - 250 0090 00100240 .word 1073876992 - 251 0094 00000000 .word .LC2 - 252 .cfi_endproc - 253 .LFE96: - 255 .section .text.HW_SPI_IoDeInit,"ax",%progbits - 256 .align 1 - 257 .global HW_SPI_IoDeInit - 258 .syntax unified - 259 .code 16 - 260 .thumb_func - 261 .fpu softvfp - 263 HW_SPI_IoDeInit: - 264 .LFB99: - 161:./Src/hw_spi.c **** GPIO_InitTypeDef initStruct={0}; - 265 .loc 1 161 0 - 266 .cfi_startproc - 267 @ args = 0, pretend = 0, frame = 24 - 268 @ frame_needed = 0, uses_anonymous_args = 0 - 269 0000 70B5 push {r4, r5, r6, lr} - 270 .LCFI3: - 271 .cfi_def_cfa_offset 16 - 272 .cfi_offset 4, -16 - 273 .cfi_offset 5, -12 - 274 .cfi_offset 6, -8 - 275 .cfi_offset 14, -4 - 276 0002 86B0 sub sp, sp, #24 - 277 .LCFI4: - 278 .cfi_def_cfa_offset 40 - ARM GAS /tmp/cchlfLgp.s page 10 - - - 162:./Src/hw_spi.c **** - 279 .loc 1 162 0 - 280 0004 1422 movs r2, #20 - 281 0006 0021 movs r1, #0 - 282 0008 01A8 add r0, sp, #4 - 283 000a FFF7FEFF bl memset - 284 .LVL20: - 164:./Src/hw_spi.c **** - 285 .loc 1 164 0 - 286 000e 0126 movs r6, #1 - 287 0010 0296 str r6, [sp, #8] - 166:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_MOSI_PORT, RADIO_MOSI_PIN, &initStruct ); - 288 .loc 1 166 0 - 289 0012 0225 movs r5, #2 - 290 0014 0395 str r5, [sp, #12] - 167:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_MOSI_PORT, RADIO_MOSI_PIN, 0 ); - 291 .loc 1 167 0 - 292 0016 A024 movs r4, #160 - 293 0018 E405 lsls r4, r4, #23 - 294 001a 01AA add r2, sp, #4 - 295 001c 8021 movs r1, #128 - 296 001e 2000 movs r0, r4 - 297 0020 FFF7FEFF bl HW_GPIO_Init - 298 .LVL21: - 168:./Src/hw_spi.c **** - 299 .loc 1 168 0 - 300 0024 0022 movs r2, #0 - 301 0026 8021 movs r1, #128 - 302 0028 2000 movs r0, r4 - 303 002a FFF7FEFF bl HW_GPIO_Write - 304 .LVL22: - 170:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_MISO_PORT, RADIO_MISO_PIN, &initStruct ); - 305 .loc 1 170 0 - 306 002e 0395 str r5, [sp, #12] - 171:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_MISO_PORT, RADIO_MISO_PIN, 0 ); - 307 .loc 1 171 0 - 308 0030 01AA add r2, sp, #4 - 309 0032 4021 movs r1, #64 - 310 0034 2000 movs r0, r4 - 311 0036 FFF7FEFF bl HW_GPIO_Init - 312 .LVL23: - 172:./Src/hw_spi.c **** - 313 .loc 1 172 0 - 314 003a 0022 movs r2, #0 - 315 003c 4021 movs r1, #64 - 316 003e 2000 movs r0, r4 - 317 0040 FFF7FEFF bl HW_GPIO_Write - 318 .LVL24: - 174:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_SCLK_PORT, RADIO_SCLK_PIN, &initStruct ); - 319 .loc 1 174 0 - 320 0044 0395 str r5, [sp, #12] - 175:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_SCLK_PORT, RADIO_SCLK_PIN, 0 ); - 321 .loc 1 175 0 - 322 0046 01AA add r2, sp, #4 - 323 0048 2021 movs r1, #32 - 324 004a 2000 movs r0, r4 - 325 004c FFF7FEFF bl HW_GPIO_Init - ARM GAS /tmp/cchlfLgp.s page 11 - - - 326 .LVL25: - 176:./Src/hw_spi.c **** - 327 .loc 1 176 0 - 328 0050 0022 movs r2, #0 - 329 0052 2021 movs r1, #32 - 330 0054 2000 movs r0, r4 - 331 0056 FFF7FEFF bl HW_GPIO_Write - 332 .LVL26: - 178:./Src/hw_spi.c **** HW_GPIO_Init ( RADIO_NSS_PORT, RADIO_NSS_PIN , &initStruct ); - 333 .loc 1 178 0 - 334 005a 0396 str r6, [sp, #12] - 179:./Src/hw_spi.c **** HW_GPIO_Write( RADIO_NSS_PORT, RADIO_NSS_PIN , 1 ); - 335 .loc 1 179 0 - 336 005c 064C ldr r4, .L20 - 337 005e 01AA add r2, sp, #4 - 338 0060 4021 movs r1, #64 - 339 0062 2000 movs r0, r4 - 340 0064 FFF7FEFF bl HW_GPIO_Init - 341 .LVL27: - 180:./Src/hw_spi.c **** } - 342 .loc 1 180 0 - 343 0068 0122 movs r2, #1 - 344 006a 4021 movs r1, #64 - 345 006c 2000 movs r0, r4 - 346 006e FFF7FEFF bl HW_GPIO_Write - 347 .LVL28: - 181:./Src/hw_spi.c **** - 348 .loc 1 181 0 - 349 0072 06B0 add sp, sp, #24 - 350 @ sp needed - 351 0074 70BD pop {r4, r5, r6, pc} - 352 .L21: - 353 0076 C046 .align 2 - 354 .L20: - 355 0078 00040050 .word 1342178304 - 356 .cfi_endproc - 357 .LFE99: - 359 .section .text.HW_SPI_DeInit,"ax",%progbits - 360 .align 1 - 361 .global HW_SPI_DeInit - 362 .syntax unified - 363 .code 16 - 364 .thumb_func - 365 .fpu softvfp - 367 HW_SPI_DeInit: - 368 .LFB97: - 127:./Src/hw_spi.c **** - 369 .loc 1 127 0 - 370 .cfi_startproc - 371 @ args = 0, pretend = 0, frame = 0 - 372 @ frame_needed = 0, uses_anonymous_args = 0 - 373 0000 10B5 push {r4, lr} - 374 .LCFI5: - 375 .cfi_def_cfa_offset 8 - 376 .cfi_offset 4, -8 - 377 .cfi_offset 14, -4 - 129:./Src/hw_spi.c **** - ARM GAS /tmp/cchlfLgp.s page 12 - - - 378 .loc 1 129 0 - 379 0002 0848 ldr r0, .L23 - 380 0004 FFF7FEFF bl HAL_SPI_DeInit - 381 .LVL29: - 132:./Src/hw_spi.c **** __HAL_RCC_SPI1_RELEASE_RESET(); - 382 .loc 1 132 0 - 383 0008 074B ldr r3, .L23+4 - 384 000a 596A ldr r1, [r3, #36] - 385 000c 8022 movs r2, #128 - 386 000e 5201 lsls r2, r2, #5 - 387 0010 0A43 orrs r2, r1 - 388 0012 5A62 str r2, [r3, #36] - 133:./Src/hw_spi.c **** /*##-2- Configure the SPI GPIOs */ - 389 .loc 1 133 0 - 390 0014 5A6A ldr r2, [r3, #36] - 391 0016 0549 ldr r1, .L23+8 - 392 0018 0A40 ands r2, r1 - 393 001a 5A62 str r2, [r3, #36] - 135:./Src/hw_spi.c **** } - 394 .loc 1 135 0 - 395 001c FFF7FEFF bl HW_SPI_IoDeInit - 396 .LVL30: - 136:./Src/hw_spi.c **** - 397 .loc 1 136 0 - 398 @ sp needed - 399 0020 10BD pop {r4, pc} - 400 .L24: - 401 0022 C046 .align 2 - 402 .L23: - 403 0024 00000000 .word .LANCHOR0 - 404 0028 00100240 .word 1073876992 - 405 002c FFEFFFFF .word -4097 - 406 .cfi_endproc - 407 .LFE97: - 409 .section .text.HW_SPI_InOut,"ax",%progbits - 410 .align 1 - 411 .global HW_SPI_InOut - 412 .syntax unified - 413 .code 16 - 414 .thumb_func - 415 .fpu softvfp - 417 HW_SPI_InOut: - 418 .LFB100: - 190:./Src/hw_spi.c **** uint16_t rxData ; - 419 .loc 1 190 0 - 420 .cfi_startproc - 421 @ args = 0, pretend = 0, frame = 16 - 422 @ frame_needed = 0, uses_anonymous_args = 0 - 423 .LVL31: - 424 0000 10B5 push {r4, lr} - 425 .LCFI6: - 426 .cfi_def_cfa_offset 8 - 427 .cfi_offset 4, -8 - 428 .cfi_offset 14, -4 - 429 0002 86B0 sub sp, sp, #24 - 430 .LCFI7: - 431 .cfi_def_cfa_offset 32 - ARM GAS /tmp/cchlfLgp.s page 13 - - - 432 0004 0E21 movs r1, #14 - 433 0006 6944 add r1, r1, sp - 434 0008 0880 strh r0, [r1] - 193:./Src/hw_spi.c **** - 435 .loc 1 193 0 - 436 000a 1624 movs r4, #22 - 437 000c 6C44 add r4, r4, sp - 438 000e 0123 movs r3, #1 - 439 0010 5B42 rsbs r3, r3, #0 - 440 0012 0093 str r3, [sp] - 441 0014 0233 adds r3, r3, #2 - 442 0016 2200 movs r2, r4 - 443 0018 0248 ldr r0, .L26 - 444 .LVL32: - 445 001a FFF7FEFF bl HAL_SPI_TransmitReceive - 446 .LVL33: - 195:./Src/hw_spi.c **** } - 447 .loc 1 195 0 - 448 001e 2088 ldrh r0, [r4] - 196:./Src/hw_spi.c **** - 449 .loc 1 196 0 - 450 0020 06B0 add sp, sp, #24 - 451 @ sp needed - 452 0022 10BD pop {r4, pc} - 453 .L27: - 454 .align 2 - 455 .L26: - 456 0024 00000000 .word .LANCHOR0 - 457 .cfi_endproc - 458 .LFE100: - 460 .section .bss.hspi,"aw",%nobits - 461 .align 2 - 462 .set .LANCHOR0,. + 0 - 465 hspi: - 466 0000 00000000 .space 88 - 466 00000000 - 466 00000000 - 466 00000000 - 466 00000000 - 467 .section .rodata.HW_SPI_Init.str1.4,"aMS",%progbits,1 - 468 .align 2 - 469 .LC2: - 470 0000 2E2F5372 .ascii "./Src/hw_spi.c\000" - 470 632F6877 - 470 5F737069 - 470 2E6300 - 471 .text - 472 .Letext0: - 473 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 474 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 475 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 476 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 477 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 478 .file 7 "/usr/arm-none-eabi/include/math.h" - 479 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h" - 480 .file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 481 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - ARM GAS /tmp/cchlfLgp.s page 14 - - - 482 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 483 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h" - 484 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h" - 485 .file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h" - 486 .file 15 "Inc/hw_gpio.h" - 487 .file 16 "Inc/debug.h" - 488 .file 17 "" - ARM GAS /tmp/cchlfLgp.s page 15 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 hw_spi.c - /tmp/cchlfLgp.s:16 .text.HW_SPI_IoInit:0000000000000000 $t - /tmp/cchlfLgp.s:23 .text.HW_SPI_IoInit:0000000000000000 HW_SPI_IoInit - /tmp/cchlfLgp.s:97 .text.HW_SPI_IoInit:000000000000005c $d - /tmp/cchlfLgp.s:102 .text.HW_SPI_Init:0000000000000000 $t - /tmp/cchlfLgp.s:109 .text.HW_SPI_Init:0000000000000000 HW_SPI_Init - /tmp/cchlfLgp.s:246 .text.HW_SPI_Init:0000000000000080 $d - /tmp/cchlfLgp.s:256 .text.HW_SPI_IoDeInit:0000000000000000 $t - /tmp/cchlfLgp.s:263 .text.HW_SPI_IoDeInit:0000000000000000 HW_SPI_IoDeInit - /tmp/cchlfLgp.s:355 .text.HW_SPI_IoDeInit:0000000000000078 $d - /tmp/cchlfLgp.s:360 .text.HW_SPI_DeInit:0000000000000000 $t - /tmp/cchlfLgp.s:367 .text.HW_SPI_DeInit:0000000000000000 HW_SPI_DeInit - /tmp/cchlfLgp.s:403 .text.HW_SPI_DeInit:0000000000000024 $d - /tmp/cchlfLgp.s:410 .text.HW_SPI_InOut:0000000000000000 $t - /tmp/cchlfLgp.s:417 .text.HW_SPI_InOut:0000000000000000 HW_SPI_InOut - /tmp/cchlfLgp.s:456 .text.HW_SPI_InOut:0000000000000024 $d - /tmp/cchlfLgp.s:461 .bss.hspi:0000000000000000 $d - /tmp/cchlfLgp.s:465 .bss.hspi:0000000000000000 hspi - /tmp/cchlfLgp.s:468 .rodata.HW_SPI_Init.str1.4:0000000000000000 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -memset -HW_GPIO_Init -HW_GPIO_Write -HAL_SPI_Init -_Error_Handler -SystemCoreClock -HAL_SPI_DeInit -HAL_SPI_TransmitReceive diff --git a/build/lora.d b/build/lora.d deleted file mode 100644 index ab2294f..0000000 --- a/build/lora.d +++ /dev/null @@ -1,155 +0,0 @@ -build/lora.d: Middlewares/Third_Party/Lora/Core/lora.c Inc/hw.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \ - Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \ - Inc/hw_spi.h Inc/hw_rtc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Inc/hw_msp.h Inc/debug.h Inc/vcom.h \ - Middlewares/Third_Party/Lora/Utilities/timeServer.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h \ - Middlewares/Third_Party/Lora/Mac/LoRaMac.h \ - Middlewares/Third_Party/Lora/Core/lora.h Inc/Commissioning.h \ - Middlewares/Third_Party/Lora/Mac/region/Region.h \ - Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h - -Inc/hw.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: - -Inc/stm32l0xx_hw_conf.h: - -Inc/hw.h: - -Inc/hw_conf.h: - -Inc/hw_gpio.h: - -Inc/hw_spi.h: - -Inc/hw_rtc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Inc/hw_msp.h: - -Inc/debug.h: - -Inc/vcom.h: - -Middlewares/Third_Party/Lora/Utilities/timeServer.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMac.h: - -Middlewares/Third_Party/Lora/Core/lora.h: - -Inc/Commissioning.h: - -Middlewares/Third_Party/Lora/Mac/region/Region.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h: diff --git a/build/lora.lst b/build/lora.lst deleted file mode 100644 index da4f5ad..0000000 --- a/build/lora.lst +++ /dev/null @@ -1,2559 +0,0 @@ -ARM GAS /tmp/ccY05lmV.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "lora.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.McpsConfirm,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 McpsConfirm: - 23 .LFB100: - 24 .file 1 "./Middlewares/Third_Party/Lora/Core/lora.c" - 1:./Middlewares/Third_Party/Lora/Core/lora.c **** /* - 2:./Middlewares/Third_Party/Lora/Core/lora.c **** / _____) _ | | - 3:./Middlewares/Third_Party/Lora/Core/lora.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Middlewares/Third_Party/Lora/Core/lora.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Middlewares/Third_Party/Lora/Core/lora.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Middlewares/Third_Party/Lora/Core/lora.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Middlewares/Third_Party/Lora/Core/lora.c **** (C)2013 Semtech - 8:./Middlewares/Third_Party/Lora/Core/lora.c **** - 9:./Middlewares/Third_Party/Lora/Core/lora.c **** Description: LoRaMac classA device implementation - 10:./Middlewares/Third_Party/Lora/Core/lora.c **** - 11:./Middlewares/Third_Party/Lora/Core/lora.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 12:./Middlewares/Third_Party/Lora/Core/lora.c **** - 13:./Middlewares/Third_Party/Lora/Core/lora.c **** Maintainer: Miguel Luis, Gregory Cristian and Wael Guibene - 14:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 15:./Middlewares/Third_Party/Lora/Core/lora.c **** /****************************************************************************** - 16:./Middlewares/Third_Party/Lora/Core/lora.c **** * @file lora.c - 17:./Middlewares/Third_Party/Lora/Core/lora.c **** * @author MCD Application Team - 18:./Middlewares/Third_Party/Lora/Core/lora.c **** * @version V1.1.2 - 19:./Middlewares/Third_Party/Lora/Core/lora.c **** * @date 08-September-2017 - 20:./Middlewares/Third_Party/Lora/Core/lora.c **** * @brief lora API to drive the lora state Machine - 21:./Middlewares/Third_Party/Lora/Core/lora.c **** ****************************************************************************** - 22:./Middlewares/Third_Party/Lora/Core/lora.c **** * @attention - 23:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 24:./Middlewares/Third_Party/Lora/Core/lora.c **** *

© Copyright (c) 2017 STMicroelectronics International N.V. - 25:./Middlewares/Third_Party/Lora/Core/lora.c **** * All rights reserved.

- 26:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 27:./Middlewares/Third_Party/Lora/Core/lora.c **** * Redistribution and use in source and binary forms, with or without - 28:./Middlewares/Third_Party/Lora/Core/lora.c **** * modification, are permitted, provided that the following conditions are met: - 29:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 30:./Middlewares/Third_Party/Lora/Core/lora.c **** * 1. Redistribution of source code must retain the above copyright notice, - 31:./Middlewares/Third_Party/Lora/Core/lora.c **** * this list of conditions and the following disclaimer. - 32:./Middlewares/Third_Party/Lora/Core/lora.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 33:./Middlewares/Third_Party/Lora/Core/lora.c **** * this list of conditions and the following disclaimer in the documentation - 34:./Middlewares/Third_Party/Lora/Core/lora.c **** * and/or other materials provided with the distribution. - ARM GAS /tmp/ccY05lmV.s page 2 - - - 35:./Middlewares/Third_Party/Lora/Core/lora.c **** * 3. Neither the name of STMicroelectronics nor the names of other - 36:./Middlewares/Third_Party/Lora/Core/lora.c **** * contributors to this software may be used to endorse or promote products - 37:./Middlewares/Third_Party/Lora/Core/lora.c **** * derived from this software without specific written permission. - 38:./Middlewares/Third_Party/Lora/Core/lora.c **** * 4. This software, including modifications and/or derivative works of this - 39:./Middlewares/Third_Party/Lora/Core/lora.c **** * software, must execute solely and exclusively on microcontroller or - 40:./Middlewares/Third_Party/Lora/Core/lora.c **** * microprocessor devices manufactured by or for STMicroelectronics. - 41:./Middlewares/Third_Party/Lora/Core/lora.c **** * 5. Redistribution and use of this software other than as permitted under - 42:./Middlewares/Third_Party/Lora/Core/lora.c **** * this license is void and will automatically terminate your rights under - 43:./Middlewares/Third_Party/Lora/Core/lora.c **** * this license. - 44:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 45:./Middlewares/Third_Party/Lora/Core/lora.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - 46:./Middlewares/Third_Party/Lora/Core/lora.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - 47:./Middlewares/Third_Party/Lora/Core/lora.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - 48:./Middlewares/Third_Party/Lora/Core/lora.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - 49:./Middlewares/Third_Party/Lora/Core/lora.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - 50:./Middlewares/Third_Party/Lora/Core/lora.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - 51:./Middlewares/Third_Party/Lora/Core/lora.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - 52:./Middlewares/Third_Party/Lora/Core/lora.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - 53:./Middlewares/Third_Party/Lora/Core/lora.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - 54:./Middlewares/Third_Party/Lora/Core/lora.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - 55:./Middlewares/Third_Party/Lora/Core/lora.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - 56:./Middlewares/Third_Party/Lora/Core/lora.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 57:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 58:./Middlewares/Third_Party/Lora/Core/lora.c **** ****************************************************************************** - 59:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 60:./Middlewares/Third_Party/Lora/Core/lora.c **** - 61:./Middlewares/Third_Party/Lora/Core/lora.c **** /* Includes ------------------------------------------------------------------*/ - 62:./Middlewares/Third_Party/Lora/Core/lora.c **** #include "hw.h" - 63:./Middlewares/Third_Party/Lora/Core/lora.c **** #include "timeServer.h" - 64:./Middlewares/Third_Party/Lora/Core/lora.c **** #include "LoRaMac.h" - 65:./Middlewares/Third_Party/Lora/Core/lora.c **** #include "lora.h" - 66:./Middlewares/Third_Party/Lora/Core/lora.c **** - 67:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 68:./Middlewares/Third_Party/Lora/Core/lora.c **** * Join requests trials duty cycle. - 69:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 70:./Middlewares/Third_Party/Lora/Core/lora.c **** #define OVER_THE_AIR_ACTIVATION_DUTYCYCLE 10000 // 10 [s] value in ms - 71:./Middlewares/Third_Party/Lora/Core/lora.c **** - 72:./Middlewares/Third_Party/Lora/Core/lora.c **** #if defined( REGION_EU868 ) - 73:./Middlewares/Third_Party/Lora/Core/lora.c **** - 74:./Middlewares/Third_Party/Lora/Core/lora.c **** #include "LoRaMacTest.h" - 75:./Middlewares/Third_Party/Lora/Core/lora.c **** - 76:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 77:./Middlewares/Third_Party/Lora/Core/lora.c **** * LoRaWAN ETSI duty cycle control enable/disable - 78:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 79:./Middlewares/Third_Party/Lora/Core/lora.c **** * \remark Please note that ETSI mandates duty cycled transmissions. Use only for test purposes - 80:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 81:./Middlewares/Third_Party/Lora/Core/lora.c **** #define LORAWAN_DUTYCYCLE_ON true - 82:./Middlewares/Third_Party/Lora/Core/lora.c **** - 83:./Middlewares/Third_Party/Lora/Core/lora.c **** #define USE_SEMTECH_DEFAULT_CHANNEL_LINEUP 0 - 84:./Middlewares/Third_Party/Lora/Core/lora.c **** - 85:./Middlewares/Third_Party/Lora/Core/lora.c **** #if( USE_SEMTECH_DEFAULT_CHANNEL_LINEUP == 1 ) - 86:./Middlewares/Third_Party/Lora/Core/lora.c **** - 87:./Middlewares/Third_Party/Lora/Core/lora.c **** #define LC4 { 867100000, 0, { ( ( DR_5 << 4 ) | DR_0 ) }, 0 } - 88:./Middlewares/Third_Party/Lora/Core/lora.c **** #define LC5 { 867300000, 0, { ( ( DR_5 << 4 ) | DR_0 ) }, 0 } - 89:./Middlewares/Third_Party/Lora/Core/lora.c **** #define LC6 { 867500000, 0, { ( ( DR_5 << 4 ) | DR_0 ) }, 0 } - 90:./Middlewares/Third_Party/Lora/Core/lora.c **** #define LC7 { 867700000, 0, { ( ( DR_5 << 4 ) | DR_0 ) }, 0 } - 91:./Middlewares/Third_Party/Lora/Core/lora.c **** #define LC8 { 867900000, 0, { ( ( DR_5 << 4 ) | DR_0 ) }, 0 } - ARM GAS /tmp/ccY05lmV.s page 3 - - - 92:./Middlewares/Third_Party/Lora/Core/lora.c **** #define LC9 { 868800000, 0, { ( ( DR_7 << 4 ) | DR_7 ) }, 2 } - 93:./Middlewares/Third_Party/Lora/Core/lora.c **** #define LC10 { 868300000, 0, { ( ( DR_6 << 4 ) | DR_6 ) }, 1 } - 94:./Middlewares/Third_Party/Lora/Core/lora.c **** - 95:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 96:./Middlewares/Third_Party/Lora/Core/lora.c **** - 97:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 98:./Middlewares/Third_Party/Lora/Core/lora.c **** - 99:./Middlewares/Third_Party/Lora/Core/lora.c **** static uint8_t DevEui[] = LORAWAN_DEVICE_EUI; - 100:./Middlewares/Third_Party/Lora/Core/lora.c **** static uint8_t AppEui[] = LORAWAN_APPLICATION_EUI; - 101:./Middlewares/Third_Party/Lora/Core/lora.c **** static uint8_t AppKey[] = LORAWAN_APPLICATION_KEY; - 102:./Middlewares/Third_Party/Lora/Core/lora.c **** - 103:./Middlewares/Third_Party/Lora/Core/lora.c **** #if( OVER_THE_AIR_ACTIVATION == 0 ) - 104:./Middlewares/Third_Party/Lora/Core/lora.c **** - 105:./Middlewares/Third_Party/Lora/Core/lora.c **** static uint8_t NwkSKey[] = LORAWAN_NWKSKEY; - 106:./Middlewares/Third_Party/Lora/Core/lora.c **** static uint8_t AppSKey[] = LORAWAN_APPSKEY; - 107:./Middlewares/Third_Party/Lora/Core/lora.c **** - 108:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 109:./Middlewares/Third_Party/Lora/Core/lora.c **** * Device address - 110:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 111:./Middlewares/Third_Party/Lora/Core/lora.c **** static uint32_t DevAddr = LORAWAN_DEVICE_ADDRESS; - 112:./Middlewares/Third_Party/Lora/Core/lora.c **** - 113:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 114:./Middlewares/Third_Party/Lora/Core/lora.c **** - 115:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 116:./Middlewares/Third_Party/Lora/Core/lora.c **** * User application data buffer size - 117:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 118:./Middlewares/Third_Party/Lora/Core/lora.c **** #define LORAWAN_APP_DATA_BUFF_SIZE 64 - 119:./Middlewares/Third_Party/Lora/Core/lora.c **** - 120:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 121:./Middlewares/Third_Party/Lora/Core/lora.c **** * User application data - 122:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 123:./Middlewares/Third_Party/Lora/Core/lora.c **** static uint8_t AppDataBuff[LORAWAN_APP_DATA_BUFF_SIZE]; - 124:./Middlewares/Third_Party/Lora/Core/lora.c **** - 125:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 126:./Middlewares/Third_Party/Lora/Core/lora.c **** * User application data structure - 127:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 128:./Middlewares/Third_Party/Lora/Core/lora.c **** static lora_AppData_t AppData={ AppDataBuff, 0 ,0 }; - 129:./Middlewares/Third_Party/Lora/Core/lora.c **** - 130:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 131:./Middlewares/Third_Party/Lora/Core/lora.c **** * Indicates if the node is sending confirmed or unconfirmed messages - 132:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 133:./Middlewares/Third_Party/Lora/Core/lora.c **** static FunctionalState IsTxConfirmed ; - 134:./Middlewares/Third_Party/Lora/Core/lora.c **** - 135:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 136:./Middlewares/Third_Party/Lora/Core/lora.c **** * Defines the LoRa parameters at Init - 137:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 138:./Middlewares/Third_Party/Lora/Core/lora.c **** static LoRaParam_t* LoRaParamInit; - 139:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 140:./Middlewares/Third_Party/Lora/Core/lora.c **** * Timer to handle the application data transmission duty cycle - 141:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 142:./Middlewares/Third_Party/Lora/Core/lora.c **** static TimerEvent_t TxNextPacketTimer; - 143:./Middlewares/Third_Party/Lora/Core/lora.c **** - 144:./Middlewares/Third_Party/Lora/Core/lora.c **** static DeviceState_t DeviceState = DEVICE_STATE_INIT ; - 145:./Middlewares/Third_Party/Lora/Core/lora.c **** - 146:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 147:./Middlewares/Third_Party/Lora/Core/lora.c **** * Timer to handle the state of LED1 - 148:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - ARM GAS /tmp/ccY05lmV.s page 4 - - - 149:./Middlewares/Third_Party/Lora/Core/lora.c **** - 150:./Middlewares/Third_Party/Lora/Core/lora.c **** static LoRaMacPrimitives_t LoRaMacPrimitives; - 151:./Middlewares/Third_Party/Lora/Core/lora.c **** static LoRaMacCallback_t LoRaMacCallbacks; - 152:./Middlewares/Third_Party/Lora/Core/lora.c **** static MibRequestConfirm_t mibReq; - 153:./Middlewares/Third_Party/Lora/Core/lora.c **** - 154:./Middlewares/Third_Party/Lora/Core/lora.c **** static LoRaMainCallback_t *LoRaMainCallbacks; - 155:./Middlewares/Third_Party/Lora/Core/lora.c **** - 156:./Middlewares/Third_Party/Lora/Core/lora.c **** - 157:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 158:./Middlewares/Third_Party/Lora/Core/lora.c **** * Indicates if a new packet can be sent - 159:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 160:./Middlewares/Third_Party/Lora/Core/lora.c **** static bool NextTx = true; - 161:./Middlewares/Third_Party/Lora/Core/lora.c **** - 162:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 163:./Middlewares/Third_Party/Lora/Core/lora.c **** * LoRaWAN compliance tests support data - 164:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 165:./Middlewares/Third_Party/Lora/Core/lora.c **** struct ComplianceTest_s - 166:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 167:./Middlewares/Third_Party/Lora/Core/lora.c **** bool Running; - 168:./Middlewares/Third_Party/Lora/Core/lora.c **** uint8_t State; - 169:./Middlewares/Third_Party/Lora/Core/lora.c **** FunctionalState IsTxConfirmed; - 170:./Middlewares/Third_Party/Lora/Core/lora.c **** uint8_t AppPort; - 171:./Middlewares/Third_Party/Lora/Core/lora.c **** uint8_t AppDataSize; - 172:./Middlewares/Third_Party/Lora/Core/lora.c **** uint8_t *AppDataBuffer; - 173:./Middlewares/Third_Party/Lora/Core/lora.c **** uint16_t DownLinkCounter; - 174:./Middlewares/Third_Party/Lora/Core/lora.c **** bool LinkCheck; - 175:./Middlewares/Third_Party/Lora/Core/lora.c **** uint8_t DemodMargin; - 176:./Middlewares/Third_Party/Lora/Core/lora.c **** uint8_t NbGateways; - 177:./Middlewares/Third_Party/Lora/Core/lora.c **** }ComplianceTest; - 178:./Middlewares/Third_Party/Lora/Core/lora.c **** - 179:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 180:./Middlewares/Third_Party/Lora/Core/lora.c **** * \brief Prepares the payload of the frame - 181:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 182:./Middlewares/Third_Party/Lora/Core/lora.c **** static void PrepareTxFrame( void) - 183:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 184:./Middlewares/Third_Party/Lora/Core/lora.c **** if( ComplianceTest.Running == true ) - 185:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 186:./Middlewares/Third_Party/Lora/Core/lora.c **** if( ComplianceTest.LinkCheck == true ) - 187:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 188:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.LinkCheck = false; - 189:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.BuffSize = 3; - 190:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[0] = 5; - 191:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[1] = ComplianceTest.DemodMargin; - 192:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[2] = ComplianceTest.NbGateways; - 193:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 194:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 195:./Middlewares/Third_Party/Lora/Core/lora.c **** else - 196:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 197:./Middlewares/Third_Party/Lora/Core/lora.c **** switch( ComplianceTest.State ) - 198:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 199:./Middlewares/Third_Party/Lora/Core/lora.c **** case 4: - 200:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 201:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 202:./Middlewares/Third_Party/Lora/Core/lora.c **** case 1: - 203:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.BuffSize = 2; - 204:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[0] = ComplianceTest.DownLinkCounter >> 8; - 205:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[1] = ComplianceTest.DownLinkCounter; - ARM GAS /tmp/ccY05lmV.s page 5 - - - 206:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 207:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 208:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 209:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 210:./Middlewares/Third_Party/Lora/Core/lora.c **** else - 211:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 212:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMainCallbacks->LoraTxData(&AppData, &IsTxConfirmed); - 213:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 214:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 215:./Middlewares/Third_Party/Lora/Core/lora.c **** - 216:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 217:./Middlewares/Third_Party/Lora/Core/lora.c **** * \brief Prepares the payload of the frame - 218:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 219:./Middlewares/Third_Party/Lora/Core/lora.c **** * \retval [0: frame could be send, 1: error] - 220:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 221:./Middlewares/Third_Party/Lora/Core/lora.c **** static bool SendFrame( void ) - 222:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 223:./Middlewares/Third_Party/Lora/Core/lora.c **** McpsReq_t mcpsReq; - 224:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacTxInfo_t txInfo; - 225:./Middlewares/Third_Party/Lora/Core/lora.c **** - 226:./Middlewares/Third_Party/Lora/Core/lora.c **** if( LoRaMacQueryTxPossible( AppData.BuffSize, &txInfo ) != LORAMAC_STATUS_OK ) - 227:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 228:./Middlewares/Third_Party/Lora/Core/lora.c **** // Send empty frame in order to flush MAC commands - 229:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Type = MCPS_UNCONFIRMED; - 230:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fBuffer = NULL; - 231:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fBufferSize = 0; - 232:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.Datarate = LoRaParamInit->TxDatarate; - 233:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 234:./Middlewares/Third_Party/Lora/Core/lora.c **** else - 235:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 236:./Middlewares/Third_Party/Lora/Core/lora.c **** if( IsTxConfirmed == DISABLE ) - 237:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 238:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Type = MCPS_UNCONFIRMED; - 239:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fPort = AppData.Port; - 240:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fBuffer = AppData.Buff; - 241:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fBufferSize = AppData.BuffSize; - 242:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.Datarate = LoRaParamInit->TxDatarate; - 243:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 244:./Middlewares/Third_Party/Lora/Core/lora.c **** else - 245:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 246:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Type = MCPS_CONFIRMED; - 247:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.fPort = AppData.Port; - 248:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.fBuffer = AppData.Buff; - 249:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.fBufferSize = AppData.BuffSize; - 250:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.NbTrials = 8; - 251:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.Datarate = LoRaParamInit->TxDatarate; - 252:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 253:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 254:./Middlewares/Third_Party/Lora/Core/lora.c **** if( LoRaMacMcpsRequest( &mcpsReq ) == LORAMAC_STATUS_OK ) - 255:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 256:./Middlewares/Third_Party/Lora/Core/lora.c **** return false; - 257:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 258:./Middlewares/Third_Party/Lora/Core/lora.c **** return true; - 259:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 260:./Middlewares/Third_Party/Lora/Core/lora.c **** - 261:./Middlewares/Third_Party/Lora/Core/lora.c **** void OnSendEvent( void ) - 262:./Middlewares/Third_Party/Lora/Core/lora.c **** { - ARM GAS /tmp/ccY05lmV.s page 6 - - - 263:./Middlewares/Third_Party/Lora/Core/lora.c **** MibRequestConfirm_t _mibReq; - 264:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacStatus_t status; - 265:./Middlewares/Third_Party/Lora/Core/lora.c **** - 266:./Middlewares/Third_Party/Lora/Core/lora.c **** _mibReq.Type = MIB_NETWORK_JOINED; - 267:./Middlewares/Third_Party/Lora/Core/lora.c **** status = LoRaMacMibGetRequestConfirm( &_mibReq ); - 268:./Middlewares/Third_Party/Lora/Core/lora.c **** - 269:./Middlewares/Third_Party/Lora/Core/lora.c **** if( status == LORAMAC_STATUS_OK ) - 270:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 271:./Middlewares/Third_Party/Lora/Core/lora.c **** if( _mibReq.Param.IsNetworkJoined == true ) - 272:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 273:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_SEND; - 274:./Middlewares/Third_Party/Lora/Core/lora.c **** NextTx = true; - 275:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 276:./Middlewares/Third_Party/Lora/Core/lora.c **** else - 277:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 278:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_JOIN; - 279:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 280:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 281:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 282:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 283:./Middlewares/Third_Party/Lora/Core/lora.c **** * \brief Function executed on TxNextPacket Timeout event - 284:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 285:./Middlewares/Third_Party/Lora/Core/lora.c **** static void OnTxNextPacketTimerEvent( void ) - 286:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 287:./Middlewares/Third_Party/Lora/Core/lora.c **** TimerStop( &TxNextPacketTimer ); - 288:./Middlewares/Third_Party/Lora/Core/lora.c **** OnSendEvent(); - 289:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 290:./Middlewares/Third_Party/Lora/Core/lora.c **** - 291:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 292:./Middlewares/Third_Party/Lora/Core/lora.c **** * \brief MCPS-Confirm event function - 293:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 294:./Middlewares/Third_Party/Lora/Core/lora.c **** * \param [IN] McpsConfirm - Pointer to the confirm structure, - 295:./Middlewares/Third_Party/Lora/Core/lora.c **** * containing confirm attributes. - 296:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 297:./Middlewares/Third_Party/Lora/Core/lora.c **** static void McpsConfirm( McpsConfirm_t *mcpsConfirm ) - 298:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 25 .loc 1 298 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 @ link register save eliminated. - 30 .LVL0: - 299:./Middlewares/Third_Party/Lora/Core/lora.c **** if( mcpsConfirm->Status == LORAMAC_EVENT_INFO_STATUS_OK ) - 300:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 301:./Middlewares/Third_Party/Lora/Core/lora.c **** switch( mcpsConfirm->McpsRequest ) - 302:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 303:./Middlewares/Third_Party/Lora/Core/lora.c **** case MCPS_UNCONFIRMED: - 304:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 305:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check Datarate - 306:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check TxPower - 307:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 308:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 309:./Middlewares/Third_Party/Lora/Core/lora.c **** case MCPS_CONFIRMED: - 310:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 311:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check Datarate - 312:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check TxPower - 313:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check AckReceived - ARM GAS /tmp/ccY05lmV.s page 7 - - - 314:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check NbTrials - 315:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 316:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 317:./Middlewares/Third_Party/Lora/Core/lora.c **** case MCPS_PROPRIETARY: - 318:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 319:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 320:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 321:./Middlewares/Third_Party/Lora/Core/lora.c **** default: - 322:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 323:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 324:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 325:./Middlewares/Third_Party/Lora/Core/lora.c **** NextTx = true; - 31 .loc 1 325 0 - 32 0000 014B ldr r3, .L2 - 33 0002 0122 movs r2, #1 - 34 0004 1A70 strb r2, [r3] - 326:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 35 .loc 1 326 0 - 36 @ sp needed - 37 0006 7047 bx lr - 38 .L3: - 39 .align 2 - 40 .L2: - 41 0008 00000000 .word .LANCHOR0 - 42 .cfi_endproc - 43 .LFE100: - 45 .section .text.MlmeConfirm,"ax",%progbits - 46 .align 1 - 47 .syntax unified - 48 .code 16 - 49 .thumb_func - 50 .fpu softvfp - 52 MlmeConfirm: - 53 .LFB102: - 327:./Middlewares/Third_Party/Lora/Core/lora.c **** - 328:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 329:./Middlewares/Third_Party/Lora/Core/lora.c **** * \brief MCPS-Indication event function - 330:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 331:./Middlewares/Third_Party/Lora/Core/lora.c **** * \param [IN] mcpsIndication - Pointer to the indication structure, - 332:./Middlewares/Third_Party/Lora/Core/lora.c **** * containing indication attributes. - 333:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 334:./Middlewares/Third_Party/Lora/Core/lora.c **** static void McpsIndication( McpsIndication_t *mcpsIndication ) - 335:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 336:./Middlewares/Third_Party/Lora/Core/lora.c **** if( mcpsIndication->Status != LORAMAC_EVENT_INFO_STATUS_OK ) - 337:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 338:./Middlewares/Third_Party/Lora/Core/lora.c **** return; - 339:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 340:./Middlewares/Third_Party/Lora/Core/lora.c **** - 341:./Middlewares/Third_Party/Lora/Core/lora.c **** switch( mcpsIndication->McpsIndication ) - 342:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 343:./Middlewares/Third_Party/Lora/Core/lora.c **** case MCPS_UNCONFIRMED: - 344:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 345:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 346:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 347:./Middlewares/Third_Party/Lora/Core/lora.c **** case MCPS_CONFIRMED: - 348:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 349:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - ARM GAS /tmp/ccY05lmV.s page 8 - - - 350:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 351:./Middlewares/Third_Party/Lora/Core/lora.c **** case MCPS_PROPRIETARY: - 352:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 353:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 354:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 355:./Middlewares/Third_Party/Lora/Core/lora.c **** case MCPS_MULTICAST: - 356:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 357:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 358:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 359:./Middlewares/Third_Party/Lora/Core/lora.c **** default: - 360:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 361:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 362:./Middlewares/Third_Party/Lora/Core/lora.c **** - 363:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check Multicast - 364:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check Port - 365:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check Datarate - 366:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check FramePending - 367:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check Buffer - 368:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check BufferSize - 369:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check Rssi - 370:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check Snr - 371:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check RxSlot - 372:./Middlewares/Third_Party/Lora/Core/lora.c **** - 373:./Middlewares/Third_Party/Lora/Core/lora.c **** if( ComplianceTest.Running == true ) - 374:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 375:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.DownLinkCounter++; - 376:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 377:./Middlewares/Third_Party/Lora/Core/lora.c **** - 378:./Middlewares/Third_Party/Lora/Core/lora.c **** if( mcpsIndication->RxData == true ) - 379:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 380:./Middlewares/Third_Party/Lora/Core/lora.c **** switch( mcpsIndication->Port ) - 381:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 382:./Middlewares/Third_Party/Lora/Core/lora.c **** case 224: - 383:./Middlewares/Third_Party/Lora/Core/lora.c **** if( ComplianceTest.Running == false ) - 384:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 385:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check compliance test enable command (i) - 386:./Middlewares/Third_Party/Lora/Core/lora.c **** if( ( mcpsIndication->BufferSize == 4 ) && - 387:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[0] == 0x01 ) && - 388:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[1] == 0x01 ) && - 389:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[2] == 0x01 ) && - 390:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[3] == 0x01 ) ) - 391:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 392:./Middlewares/Third_Party/Lora/Core/lora.c **** IsTxConfirmed = DISABLE; - 393:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Port = 224; - 394:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.BuffSize = 2; - 395:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.DownLinkCounter = 0; - 396:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.LinkCheck = false; - 397:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.DemodMargin = 0; - 398:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.NbGateways = 0; - 399:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.Running = true; - 400:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 401:./Middlewares/Third_Party/Lora/Core/lora.c **** - 402:./Middlewares/Third_Party/Lora/Core/lora.c **** MibRequestConfirm_t _mibReq; - 403:./Middlewares/Third_Party/Lora/Core/lora.c **** _mibReq.Type = MIB_ADR; - 404:./Middlewares/Third_Party/Lora/Core/lora.c **** _mibReq.Param.AdrEnable = true; - 405:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &_mibReq ); - 406:./Middlewares/Third_Party/Lora/Core/lora.c **** - ARM GAS /tmp/ccY05lmV.s page 9 - - - 407:./Middlewares/Third_Party/Lora/Core/lora.c **** #if defined( REGION_EU868 ) - 408:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacTestSetDutyCycleOn( false ); - 409:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 410:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 411:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 412:./Middlewares/Third_Party/Lora/Core/lora.c **** else - 413:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 414:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = mcpsIndication->Buffer[0]; - 415:./Middlewares/Third_Party/Lora/Core/lora.c **** switch( ComplianceTest.State ) - 416:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 417:./Middlewares/Third_Party/Lora/Core/lora.c **** case 0: // Check compliance test disable command (ii) - 418:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.DownLinkCounter = 0; - 419:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.Running = false; - 420:./Middlewares/Third_Party/Lora/Core/lora.c **** - 421:./Middlewares/Third_Party/Lora/Core/lora.c **** MibRequestConfirm_t _mibReq; - 422:./Middlewares/Third_Party/Lora/Core/lora.c **** _mibReq.Type = MIB_ADR; - 423:./Middlewares/Third_Party/Lora/Core/lora.c **** _mibReq.Param.AdrEnable = LoRaParamInit->AdrEnable; - 424:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &_mibReq ); - 425:./Middlewares/Third_Party/Lora/Core/lora.c **** #if defined( REGION_EU868 ) - 426:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacTestSetDutyCycleOn( LORAWAN_DUTYCYCLE_ON ); - 427:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 428:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 429:./Middlewares/Third_Party/Lora/Core/lora.c **** case 1: // (iii, iv) - 430:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.BuffSize = 2; - 431:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 432:./Middlewares/Third_Party/Lora/Core/lora.c **** case 2: // Enable confirmed messages (v) - 433:./Middlewares/Third_Party/Lora/Core/lora.c **** IsTxConfirmed = ENABLE; - 434:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 435:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 436:./Middlewares/Third_Party/Lora/Core/lora.c **** case 3: // Disable confirmed messages (vi) - 437:./Middlewares/Third_Party/Lora/Core/lora.c **** IsTxConfirmed = DISABLE; - 438:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 439:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 440:./Middlewares/Third_Party/Lora/Core/lora.c **** case 4: // (vii) - 441:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.BuffSize = mcpsIndication->BufferSize; - 442:./Middlewares/Third_Party/Lora/Core/lora.c **** - 443:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[0] = 4; - 444:./Middlewares/Third_Party/Lora/Core/lora.c **** for( uint8_t i = 1; i < AppData.BuffSize; i++ ) - 445:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 446:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[i] = mcpsIndication->Buffer[i] + 1; - 447:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 448:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 449:./Middlewares/Third_Party/Lora/Core/lora.c **** case 5: // (viii) - 450:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 451:./Middlewares/Third_Party/Lora/Core/lora.c **** MlmeReq_t mlmeReq; - 452:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Type = MLME_LINK_CHECK; - 453:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMlmeRequest( &mlmeReq ); - 454:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 455:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 456:./Middlewares/Third_Party/Lora/Core/lora.c **** case 6: // (ix) - 457:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 458:./Middlewares/Third_Party/Lora/Core/lora.c **** MlmeReq_t mlmeReq; - 459:./Middlewares/Third_Party/Lora/Core/lora.c **** - 460:./Middlewares/Third_Party/Lora/Core/lora.c **** // Disable TestMode and revert back to normal operation - 461:./Middlewares/Third_Party/Lora/Core/lora.c **** - 462:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.DownLinkCounter = 0; - 463:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.Running = false; - ARM GAS /tmp/ccY05lmV.s page 10 - - - 464:./Middlewares/Third_Party/Lora/Core/lora.c **** - 465:./Middlewares/Third_Party/Lora/Core/lora.c **** MibRequestConfirm_t mibReq; - 466:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_ADR; - 467:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.AdrEnable = LoRaParamInit->AdrEnable; - 468:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 469:./Middlewares/Third_Party/Lora/Core/lora.c **** - 470:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Type = MLME_JOIN; - 471:./Middlewares/Third_Party/Lora/Core/lora.c **** - 472:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.DevEui = DevEui; - 473:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.AppEui = AppEui; - 474:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.AppKey = AppKey; - 475:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.NbTrials = 3; - 476:./Middlewares/Third_Party/Lora/Core/lora.c **** - 477:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMlmeRequest( &mlmeReq ); - 478:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_SLEEP; - 479:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 480:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 481:./Middlewares/Third_Party/Lora/Core/lora.c **** case 7: // (x) - 482:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 483:./Middlewares/Third_Party/Lora/Core/lora.c **** if( mcpsIndication->BufferSize == 3 ) - 484:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 485:./Middlewares/Third_Party/Lora/Core/lora.c **** MlmeReq_t mlmeReq; - 486:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Type = MLME_TXCW; - 487:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.TxCw.Timeout = ( uint16_t )( ( mcpsIndication->Buffer[1] << - 488:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMlmeRequest( &mlmeReq ); - 489:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 490:./Middlewares/Third_Party/Lora/Core/lora.c **** else if( mcpsIndication->BufferSize == 7 ) - 491:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 492:./Middlewares/Third_Party/Lora/Core/lora.c **** MlmeReq_t mlmeReq; - 493:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Type = MLME_TXCW_1; - 494:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.TxCw.Timeout = ( uint16_t )( ( mcpsIndication->Buffer[1] << - 495:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.TxCw.Frequency = ( uint32_t )( ( mcpsIndication->Buffer[3] - 496:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.TxCw.Power = mcpsIndication->Buffer[6]; - 497:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMlmeRequest( &mlmeReq ); - 498:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 499:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 500:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 501:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 502:./Middlewares/Third_Party/Lora/Core/lora.c **** default: - 503:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 504:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 505:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 506:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 507:./Middlewares/Third_Party/Lora/Core/lora.c **** default: - 508:./Middlewares/Third_Party/Lora/Core/lora.c **** - 509:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Port = mcpsIndication->Port; - 510:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.BuffSize = mcpsIndication->BufferSize; - 511:./Middlewares/Third_Party/Lora/Core/lora.c **** memcpy1( AppData.Buff, mcpsIndication->Buffer, AppData.BuffSize ); - 512:./Middlewares/Third_Party/Lora/Core/lora.c **** - 513:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMainCallbacks->LoraRxData( &AppData ); - 514:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 515:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 516:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 517:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 518:./Middlewares/Third_Party/Lora/Core/lora.c **** - 519:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 520:./Middlewares/Third_Party/Lora/Core/lora.c **** * \brief MLME-Confirm event function - ARM GAS /tmp/ccY05lmV.s page 11 - - - 521:./Middlewares/Third_Party/Lora/Core/lora.c **** * - 522:./Middlewares/Third_Party/Lora/Core/lora.c **** * \param [IN] MlmeConfirm - Pointer to the confirm structure, - 523:./Middlewares/Third_Party/Lora/Core/lora.c **** * containing confirm attributes. - 524:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 525:./Middlewares/Third_Party/Lora/Core/lora.c **** static void MlmeConfirm( MlmeConfirm_t *mlmeConfirm ) - 526:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 54 .loc 1 526 0 - 55 .cfi_startproc - 56 @ args = 0, pretend = 0, frame = 0 - 57 @ frame_needed = 0, uses_anonymous_args = 0 - 58 @ link register save eliminated. - 59 .LVL1: - 527:./Middlewares/Third_Party/Lora/Core/lora.c **** switch( mlmeConfirm->MlmeRequest ) - 60 .loc 1 527 0 - 61 0000 0378 ldrb r3, [r0] - 62 0002 002B cmp r3, #0 - 63 0004 05D0 beq .L6 - 64 0006 012B cmp r3, #1 - 65 0008 0ED0 beq .L7 - 66 .L5: - 528:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 529:./Middlewares/Third_Party/Lora/Core/lora.c **** case MLME_JOIN: - 530:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 531:./Middlewares/Third_Party/Lora/Core/lora.c **** if( mlmeConfirm->Status == LORAMAC_EVENT_INFO_STATUS_OK ) - 532:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 533:./Middlewares/Third_Party/Lora/Core/lora.c **** // Status is OK, node has joined the network - 534:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_JOINED; - 535:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 536:./Middlewares/Third_Party/Lora/Core/lora.c **** else - 537:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 538:./Middlewares/Third_Party/Lora/Core/lora.c **** // Join was not successful. Try to join again - 539:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_JOIN; - 540:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 541:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 542:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 543:./Middlewares/Third_Party/Lora/Core/lora.c **** case MLME_LINK_CHECK: - 544:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 545:./Middlewares/Third_Party/Lora/Core/lora.c **** if( mlmeConfirm->Status == LORAMAC_EVENT_INFO_STATUS_OK ) - 546:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 547:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check DemodMargin - 548:./Middlewares/Third_Party/Lora/Core/lora.c **** // Check NbGateways - 549:./Middlewares/Third_Party/Lora/Core/lora.c **** if( ComplianceTest.Running == true ) - 550:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 551:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.LinkCheck = true; - 552:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.DemodMargin = mlmeConfirm->DemodMargin; - 553:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.NbGateways = mlmeConfirm->NbGateways; - 554:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 555:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 556:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 557:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 558:./Middlewares/Third_Party/Lora/Core/lora.c **** default: - 559:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 560:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 561:./Middlewares/Third_Party/Lora/Core/lora.c **** NextTx = true; - 67 .loc 1 561 0 - 68 000a 0F4B ldr r3, .L9 - 69 000c 0122 movs r2, #1 - ARM GAS /tmp/ccY05lmV.s page 12 - - - 70 000e 1A70 strb r2, [r3] - 562:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 71 .loc 1 562 0 - 72 @ sp needed - 73 0010 7047 bx lr - 74 .L6: - 531:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 75 .loc 1 531 0 - 76 0012 4378 ldrb r3, [r0, #1] - 77 0014 002B cmp r3, #0 - 78 0016 03D1 bne .L8 - 534:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 79 .loc 1 534 0 - 80 0018 0C4B ldr r3, .L9+4 - 81 001a 0222 movs r2, #2 - 82 001c 1A70 strb r2, [r3] - 83 001e F4E7 b .L5 - 84 .L8: - 539:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 85 .loc 1 539 0 - 86 0020 0A4B ldr r3, .L9+4 - 87 0022 0122 movs r2, #1 - 88 0024 1A70 strb r2, [r3] - 89 0026 F0E7 b .L5 - 90 .L7: - 545:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 91 .loc 1 545 0 - 92 0028 4378 ldrb r3, [r0, #1] - 93 002a 002B cmp r3, #0 - 94 002c EDD1 bne .L5 - 549:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 95 .loc 1 549 0 - 96 002e 084B ldr r3, .L9+8 - 97 0030 1B78 ldrb r3, [r3] - 98 0032 002B cmp r3, #0 - 99 0034 E9D0 beq .L5 - 551:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.DemodMargin = mlmeConfirm->DemodMargin; - 100 .loc 1 551 0 - 101 0036 064B ldr r3, .L9+8 - 102 0038 0122 movs r2, #1 - 103 003a 9A73 strb r2, [r3, #14] - 552:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.NbGateways = mlmeConfirm->NbGateways; - 104 .loc 1 552 0 - 105 003c 027A ldrb r2, [r0, #8] - 106 003e DA73 strb r2, [r3, #15] - 553:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 107 .loc 1 553 0 - 108 0040 427A ldrb r2, [r0, #9] - 109 0042 1A74 strb r2, [r3, #16] - 110 0044 E1E7 b .L5 - 111 .L10: - 112 0046 C046 .align 2 - 113 .L9: - 114 0048 00000000 .word .LANCHOR0 - 115 004c 00000000 .word .LANCHOR1 - 116 0050 00000000 .word .LANCHOR2 - 117 .cfi_endproc - ARM GAS /tmp/ccY05lmV.s page 13 - - - 118 .LFE102: - 120 .section .text.McpsIndication,"ax",%progbits - 121 .align 1 - 122 .syntax unified - 123 .code 16 - 124 .thumb_func - 125 .fpu softvfp - 127 McpsIndication: - 128 .LFB101: - 335:./Middlewares/Third_Party/Lora/Core/lora.c **** if( mcpsIndication->Status != LORAMAC_EVENT_INFO_STATUS_OK ) - 129 .loc 1 335 0 - 130 .cfi_startproc - 131 @ args = 0, pretend = 0, frame = 32 - 132 @ frame_needed = 0, uses_anonymous_args = 0 - 133 .LVL2: - 134 0000 10B5 push {r4, lr} - 135 .LCFI0: - 136 .cfi_def_cfa_offset 8 - 137 .cfi_offset 4, -8 - 138 .cfi_offset 14, -4 - 139 0002 88B0 sub sp, sp, #32 - 140 .LCFI1: - 141 .cfi_def_cfa_offset 40 - 336:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 142 .loc 1 336 0 - 143 0004 4378 ldrb r3, [r0, #1] - 144 0006 002B cmp r3, #0 - 145 0008 00D0 beq .LCB99 - 146 000a E1E0 b .L11 @long jump - 147 .LCB99: - 373:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 148 .loc 1 373 0 - 149 000c 714B ldr r3, .L34 - 150 000e 1B78 ldrb r3, [r3] - 151 0010 002B cmp r3, #0 - 152 0012 03D0 beq .L13 - 375:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 153 .loc 1 375 0 - 154 0014 6F49 ldr r1, .L34 - 155 0016 8A89 ldrh r2, [r1, #12] - 156 0018 0132 adds r2, r2, #1 - 157 001a 8A81 strh r2, [r1, #12] - 158 .L13: - 378:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 159 .loc 1 378 0 - 160 001c 427B ldrb r2, [r0, #13] - 161 001e 002A cmp r2, #0 - 162 0020 00D1 bne .LCB112 - 163 0022 D5E0 b .L11 @long jump - 164 .LCB112: - 380:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 165 .loc 1 380 0 - 166 0024 C278 ldrb r2, [r0, #3] - 167 0026 E02A cmp r2, #224 - 168 0028 00D0 beq .LCB115 - 169 002a C3E0 b .L31 @long jump - 170 .LCB115: - ARM GAS /tmp/ccY05lmV.s page 14 - - - 383:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 171 .loc 1 383 0 - 172 002c 002B cmp r3, #0 - 173 002e 2DD1 bne .L16 - 386:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[0] == 0x01 ) && - 174 .loc 1 386 0 - 175 0030 037B ldrb r3, [r0, #12] - 176 0032 042B cmp r3, #4 - 177 0034 00D0 beq .LCB120 - 178 0036 CBE0 b .L11 @long jump - 179 .LCB120: - 387:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[1] == 0x01 ) && - 180 .loc 1 387 0 discriminator 1 - 181 0038 8368 ldr r3, [r0, #8] - 182 003a 1A78 ldrb r2, [r3] - 386:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[0] == 0x01 ) && - 183 .loc 1 386 0 discriminator 1 - 184 003c 012A cmp r2, #1 - 185 003e 00D0 beq .LCB124 - 186 0040 C6E0 b .L11 @long jump - 187 .LCB124: - 388:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[2] == 0x01 ) && - 188 .loc 1 388 0 - 189 0042 5A78 ldrb r2, [r3, #1] - 387:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[1] == 0x01 ) && - 190 .loc 1 387 0 - 191 0044 012A cmp r2, #1 - 192 0046 00D0 beq .LCB127 - 193 0048 C2E0 b .L11 @long jump - 194 .LCB127: - 389:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[3] == 0x01 ) ) - 195 .loc 1 389 0 - 196 004a 9A78 ldrb r2, [r3, #2] - 388:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[2] == 0x01 ) && - 197 .loc 1 388 0 - 198 004c 012A cmp r2, #1 - 199 004e 00D0 beq .LCB130 - 200 0050 BEE0 b .L11 @long jump - 201 .LCB130: - 390:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 202 .loc 1 390 0 - 203 0052 DB78 ldrb r3, [r3, #3] - 389:./Middlewares/Third_Party/Lora/Core/lora.c **** ( mcpsIndication->Buffer[3] == 0x01 ) ) - 204 .loc 1 389 0 - 205 0054 012B cmp r3, #1 - 206 0056 00D0 beq .LCB133 - 207 0058 BAE0 b .L11 @long jump - 208 .LCB133: - 209 .LBB2: - 392:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Port = 224; - 210 .loc 1 392 0 - 211 005a 0024 movs r4, #0 - 212 005c 5E4B ldr r3, .L34+4 - 213 005e 1C70 strb r4, [r3] - 393:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.BuffSize = 2; - 214 .loc 1 393 0 - 215 0060 5E4B ldr r3, .L34+8 - ARM GAS /tmp/ccY05lmV.s page 15 - - - 216 0062 DF32 adds r2, r2, #223 - 217 0064 5A71 strb r2, [r3, #5] - 394:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.DownLinkCounter = 0; - 218 .loc 1 394 0 - 219 0066 0221 movs r1, #2 - 220 0068 1971 strb r1, [r3, #4] - 395:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.LinkCheck = false; - 221 .loc 1 395 0 - 222 006a 5A4B ldr r3, .L34 - 223 006c 9C81 strh r4, [r3, #12] - 396:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.DemodMargin = 0; - 224 .loc 1 396 0 - 225 006e 9C73 strb r4, [r3, #14] - 397:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.NbGateways = 0; - 226 .loc 1 397 0 - 227 0070 DC73 strb r4, [r3, #15] - 398:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.Running = true; - 228 .loc 1 398 0 - 229 0072 1C74 strb r4, [r3, #16] - 399:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 230 .loc 1 399 0 - 231 0074 DF3A subs r2, r2, #223 - 232 0076 1A70 strb r2, [r3] - 400:./Middlewares/Third_Party/Lora/Core/lora.c **** - 233 .loc 1 400 0 - 234 0078 5A70 strb r2, [r3, #1] - 403:./Middlewares/Third_Party/Lora/Core/lora.c **** _mibReq.Param.AdrEnable = true; - 235 .loc 1 403 0 - 236 007a 03A8 add r0, sp, #12 - 237 .LVL3: - 238 007c 0170 strb r1, [r0] - 404:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &_mibReq ); - 239 .loc 1 404 0 - 240 007e 0271 strb r2, [r0, #4] - 405:./Middlewares/Third_Party/Lora/Core/lora.c **** - 241 .loc 1 405 0 - 242 0080 FFF7FEFF bl LoRaMacMibSetRequestConfirm - 243 .LVL4: - 408:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 244 .loc 1 408 0 - 245 0084 2000 movs r0, r4 - 246 0086 FFF7FEFF bl LoRaMacTestSetDutyCycleOn - 247 .LVL5: - 248 008a A1E0 b .L11 - 249 .LVL6: - 250 .L16: - 251 .LBE2: - 414:./Middlewares/Third_Party/Lora/Core/lora.c **** switch( ComplianceTest.State ) - 252 .loc 1 414 0 - 253 008c 8268 ldr r2, [r0, #8] - 254 008e 1378 ldrb r3, [r2] - 255 0090 5049 ldr r1, .L34 - 256 0092 4B70 strb r3, [r1, #1] - 415:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 257 .loc 1 415 0 - 258 0094 072B cmp r3, #7 - 259 0096 00D9 bls .LCB171 - ARM GAS /tmp/ccY05lmV.s page 16 - - - 260 0098 9AE0 b .L11 @long jump - 261 .LCB171: - 262 009a 9B00 lsls r3, r3, #2 - 263 009c 5049 ldr r1, .L34+12 - 264 009e CB58 ldr r3, [r1, r3] - 265 00a0 9F46 mov pc, r3 - 266 .section .rodata.McpsIndication,"a",%progbits - 267 .align 2 - 268 .L19: - 269 0000 A2000000 .word .L18 - 270 0004 C4000000 .word .L20 - 271 0008 CC000000 .word .L21 - 272 000c D8000000 .word .L22 - 273 0010 E6000000 .word .L23 - 274 0014 10010000 .word .L24 - 275 0018 1C010000 .word .L25 - 276 001c 5A010000 .word .L26 - 277 .section .text.McpsIndication - 278 .L18: - 279 .LBB3: - 418:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.Running = false; - 280 .loc 1 418 0 - 281 00a2 4C4B ldr r3, .L34 - 282 00a4 0022 movs r2, #0 - 283 00a6 9A81 strh r2, [r3, #12] - 419:./Middlewares/Third_Party/Lora/Core/lora.c **** - 284 .loc 1 419 0 - 285 00a8 1A70 strb r2, [r3] - 422:./Middlewares/Third_Party/Lora/Core/lora.c **** _mibReq.Param.AdrEnable = LoRaParamInit->AdrEnable; - 286 .loc 1 422 0 - 287 00aa 03A8 add r0, sp, #12 - 288 .LVL7: - 289 00ac 0223 movs r3, #2 - 290 00ae 0370 strb r3, [r0] - 423:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &_mibReq ); - 291 .loc 1 423 0 - 292 00b0 4C4B ldr r3, .L34+16 - 293 00b2 1B68 ldr r3, [r3] - 294 00b4 5B7A ldrb r3, [r3, #9] - 295 00b6 0371 strb r3, [r0, #4] - 424:./Middlewares/Third_Party/Lora/Core/lora.c **** #if defined( REGION_EU868 ) - 296 .loc 1 424 0 - 297 00b8 FFF7FEFF bl LoRaMacMibSetRequestConfirm - 298 .LVL8: - 426:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 299 .loc 1 426 0 - 300 00bc 0120 movs r0, #1 - 301 00be FFF7FEFF bl LoRaMacTestSetDutyCycleOn - 302 .LVL9: - 428:./Middlewares/Third_Party/Lora/Core/lora.c **** case 1: // (iii, iv) - 303 .loc 1 428 0 - 304 00c2 85E0 b .L11 - 305 .LVL10: - 306 .L20: - 430:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 307 .loc 1 430 0 - 308 00c4 454B ldr r3, .L34+8 - ARM GAS /tmp/ccY05lmV.s page 17 - - - 309 00c6 0222 movs r2, #2 - 310 00c8 1A71 strb r2, [r3, #4] - 431:./Middlewares/Third_Party/Lora/Core/lora.c **** case 2: // Enable confirmed messages (v) - 311 .loc 1 431 0 - 312 00ca 81E0 b .L11 - 313 .L21: - 433:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 314 .loc 1 433 0 - 315 00cc 0123 movs r3, #1 - 316 00ce 424A ldr r2, .L34+4 - 317 00d0 1370 strb r3, [r2] - 434:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 318 .loc 1 434 0 - 319 00d2 404A ldr r2, .L34 - 320 00d4 5370 strb r3, [r2, #1] - 435:./Middlewares/Third_Party/Lora/Core/lora.c **** case 3: // Disable confirmed messages (vi) - 321 .loc 1 435 0 - 322 00d6 7BE0 b .L11 - 323 .L22: - 437:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 324 .loc 1 437 0 - 325 00d8 3F4B ldr r3, .L34+4 - 326 00da 0022 movs r2, #0 - 327 00dc 1A70 strb r2, [r3] - 438:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 328 .loc 1 438 0 - 329 00de 3D4B ldr r3, .L34 - 330 00e0 0132 adds r2, r2, #1 - 331 00e2 5A70 strb r2, [r3, #1] - 439:./Middlewares/Third_Party/Lora/Core/lora.c **** case 4: // (vii) - 332 .loc 1 439 0 - 333 00e4 74E0 b .L11 - 334 .L23: - 441:./Middlewares/Third_Party/Lora/Core/lora.c **** - 335 .loc 1 441 0 - 336 00e6 027B ldrb r2, [r0, #12] - 337 00e8 3C4B ldr r3, .L34+8 - 338 00ea 1A71 strb r2, [r3, #4] - 443:./Middlewares/Third_Party/Lora/Core/lora.c **** for( uint8_t i = 1; i < AppData.BuffSize; i++ ) - 339 .loc 1 443 0 - 340 00ec 1B68 ldr r3, [r3] - 341 00ee 0422 movs r2, #4 - 342 00f0 1A70 strb r2, [r3] - 343 .LVL11: - 344 .LBB4: - 444:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 345 .loc 1 444 0 - 346 00f2 0123 movs r3, #1 - 347 00f4 07E0 b .L27 - 348 .LVL12: - 349 .L28: - 446:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 350 .loc 1 446 0 discriminator 3 - 351 00f6 8268 ldr r2, [r0, #8] - 352 00f8 D25C ldrb r2, [r2, r3] - 353 00fa 3849 ldr r1, .L34+8 - 354 00fc 0968 ldr r1, [r1] - ARM GAS /tmp/ccY05lmV.s page 18 - - - 355 00fe 0132 adds r2, r2, #1 - 356 0100 CA54 strb r2, [r1, r3] - 444:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 357 .loc 1 444 0 discriminator 3 - 358 0102 0133 adds r3, r3, #1 - 359 .LVL13: - 360 0104 DBB2 uxtb r3, r3 - 361 .LVL14: - 362 .L27: - 444:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 363 .loc 1 444 0 is_stmt 0 discriminator 1 - 364 0106 354A ldr r2, .L34+8 - 365 0108 1279 ldrb r2, [r2, #4] - 366 010a 9A42 cmp r2, r3 - 367 010c F3D8 bhi .L28 - 368 010e 5FE0 b .L11 - 369 .LVL15: - 370 .L24: - 371 .LBE4: - 372 .LBB5: - 452:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMlmeRequest( &mlmeReq ); - 373 .loc 1 452 0 is_stmt 1 discriminator 4 - 374 0110 03A8 add r0, sp, #12 - 375 .LVL16: - 376 0112 0123 movs r3, #1 - 377 0114 0370 strb r3, [r0] - 453:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 378 .loc 1 453 0 discriminator 4 - 379 0116 FFF7FEFF bl LoRaMacMlmeRequest - 380 .LVL17: - 381 .LBE5: - 455:./Middlewares/Third_Party/Lora/Core/lora.c **** case 6: // (ix) - 382 .loc 1 455 0 discriminator 4 - 383 011a 59E0 b .L11 - 384 .LVL18: - 385 .L25: - 386 .LBB6: - 462:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.Running = false; - 387 .loc 1 462 0 discriminator 5 - 388 011c 2D4B ldr r3, .L34 - 389 011e 0022 movs r2, #0 - 390 0120 9A81 strh r2, [r3, #12] - 463:./Middlewares/Third_Party/Lora/Core/lora.c **** - 391 .loc 1 463 0 discriminator 5 - 392 0122 1A70 strb r2, [r3] - 466:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.AdrEnable = LoRaParamInit->AdrEnable; - 393 .loc 1 466 0 discriminator 5 - 394 0124 0223 movs r3, #2 - 395 0126 6A46 mov r2, sp - 396 0128 1370 strb r3, [r2] - 467:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 397 .loc 1 467 0 discriminator 5 - 398 012a 2E4B ldr r3, .L34+16 - 399 012c 1B68 ldr r3, [r3] - 400 012e 5B7A ldrb r3, [r3, #9] - 401 0130 1371 strb r3, [r2, #4] - 468:./Middlewares/Third_Party/Lora/Core/lora.c **** - ARM GAS /tmp/ccY05lmV.s page 19 - - - 402 .loc 1 468 0 discriminator 5 - 403 0132 6846 mov r0, sp - 404 .LVL19: - 405 0134 FFF7FEFF bl LoRaMacMibSetRequestConfirm - 406 .LVL20: - 470:./Middlewares/Third_Party/Lora/Core/lora.c **** - 407 .loc 1 470 0 discriminator 5 - 408 0138 03A8 add r0, sp, #12 - 409 013a 0023 movs r3, #0 - 410 013c 0370 strb r3, [r0] - 472:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.AppEui = AppEui; - 411 .loc 1 472 0 discriminator 5 - 412 013e 2A4B ldr r3, .L34+20 - 413 0140 4360 str r3, [r0, #4] - 473:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.AppKey = AppKey; - 414 .loc 1 473 0 discriminator 5 - 415 0142 2A4B ldr r3, .L34+24 - 416 0144 8360 str r3, [r0, #8] - 474:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.NbTrials = 3; - 417 .loc 1 474 0 discriminator 5 - 418 0146 2A4B ldr r3, .L34+28 - 419 0148 C360 str r3, [r0, #12] - 475:./Middlewares/Third_Party/Lora/Core/lora.c **** - 420 .loc 1 475 0 discriminator 5 - 421 014a 0323 movs r3, #3 - 422 014c 0374 strb r3, [r0, #16] - 477:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_SLEEP; - 423 .loc 1 477 0 discriminator 5 - 424 014e FFF7FEFF bl LoRaMacMlmeRequest - 425 .LVL21: - 478:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 426 .loc 1 478 0 discriminator 5 - 427 0152 284B ldr r3, .L34+32 - 428 0154 0522 movs r2, #5 - 429 0156 1A70 strb r2, [r3] - 430 .LBE6: - 480:./Middlewares/Third_Party/Lora/Core/lora.c **** case 7: // (x) - 431 .loc 1 480 0 discriminator 5 - 432 0158 3AE0 b .L11 - 433 .LVL22: - 434 .L26: - 483:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 435 .loc 1 483 0 - 436 015a 037B ldrb r3, [r0, #12] - 437 015c 032B cmp r3, #3 - 438 015e 05D0 beq .L32 - 490:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 439 .loc 1 490 0 - 440 0160 072B cmp r3, #7 - 441 0162 0ED0 beq .L33 - 442 .LVL23: - 443 .L30: - 499:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 444 .loc 1 499 0 - 445 0164 1B4B ldr r3, .L34 - 446 0166 0122 movs r2, #1 - 447 0168 5A70 strb r2, [r3, #1] - ARM GAS /tmp/ccY05lmV.s page 20 - - - 501:./Middlewares/Third_Party/Lora/Core/lora.c **** default: - 448 .loc 1 501 0 - 449 016a 31E0 b .L11 - 450 .LVL24: - 451 .L32: - 452 .LBB7: - 486:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.TxCw.Timeout = ( uint16_t )( ( mcpsIndication->Buffer[1] << - 453 .loc 1 486 0 - 454 016c 03A8 add r0, sp, #12 - 455 .LVL25: - 456 016e 013B subs r3, r3, #1 - 457 0170 0370 strb r3, [r0] - 487:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMlmeRequest( &mlmeReq ); - 458 .loc 1 487 0 - 459 0172 5178 ldrb r1, [r2, #1] - 460 0174 0902 lsls r1, r1, #8 - 461 0176 9378 ldrb r3, [r2, #2] - 462 0178 0B43 orrs r3, r1 - 463 017a 8380 strh r3, [r0, #4] - 488:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 464 .loc 1 488 0 - 465 017c FFF7FEFF bl LoRaMacMlmeRequest - 466 .LVL26: - 467 .LBE7: - 468 0180 F0E7 b .L30 - 469 .LVL27: - 470 .L33: - 471 .LBB8: - 493:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.TxCw.Timeout = ( uint16_t )( ( mcpsIndication->Buffer[1] << - 472 .loc 1 493 0 - 473 0182 03A9 add r1, sp, #12 - 474 0184 043B subs r3, r3, #4 - 475 0186 0B70 strb r3, [r1] - 494:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.TxCw.Frequency = ( uint32_t )( ( mcpsIndication->Buffer[3] - 476 .loc 1 494 0 - 477 0188 5478 ldrb r4, [r2, #1] - 478 018a 2402 lsls r4, r4, #8 - 479 018c 9378 ldrb r3, [r2, #2] - 480 018e 2343 orrs r3, r4 - 481 0190 8B80 strh r3, [r1, #4] - 495:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.TxCw.Power = mcpsIndication->Buffer[6]; - 482 .loc 1 495 0 - 483 0192 D378 ldrb r3, [r2, #3] - 484 0194 1B04 lsls r3, r3, #16 - 485 0196 1479 ldrb r4, [r2, #4] - 486 0198 2402 lsls r4, r4, #8 - 487 019a 2343 orrs r3, r4 - 488 019c 5279 ldrb r2, [r2, #5] - 489 019e 1343 orrs r3, r2 - 490 01a0 6422 movs r2, #100 - 491 01a2 5343 muls r3, r2 - 492 01a4 0593 str r3, [sp, #20] - 496:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMlmeRequest( &mlmeReq ); - 493 .loc 1 496 0 - 494 01a6 8368 ldr r3, [r0, #8] - 495 01a8 9B79 ldrb r3, [r3, #6] - 496 01aa 0B73 strb r3, [r1, #12] - ARM GAS /tmp/ccY05lmV.s page 21 - - - 497:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 497 .loc 1 497 0 - 498 01ac 0800 movs r0, r1 - 499 .LVL28: - 500 01ae FFF7FEFF bl LoRaMacMlmeRequest - 501 .LVL29: - 502 01b2 D7E7 b .L30 - 503 .LVL30: - 504 .L31: - 505 .LBE8: - 506 .LBE3: - 509:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.BuffSize = mcpsIndication->BufferSize; - 507 .loc 1 509 0 - 508 01b4 094C ldr r4, .L34+8 - 509 01b6 6271 strb r2, [r4, #5] - 510:./Middlewares/Third_Party/Lora/Core/lora.c **** memcpy1( AppData.Buff, mcpsIndication->Buffer, AppData.BuffSize ); - 510 .loc 1 510 0 - 511 01b8 027B ldrb r2, [r0, #12] - 512 01ba 2271 strb r2, [r4, #4] - 511:./Middlewares/Third_Party/Lora/Core/lora.c **** - 513 .loc 1 511 0 - 514 01bc 8168 ldr r1, [r0, #8] - 515 01be 92B2 uxth r2, r2 - 516 01c0 2068 ldr r0, [r4] - 517 .LVL31: - 518 01c2 FFF7FEFF bl memcpy1 - 519 .LVL32: - 513:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 520 .loc 1 513 0 - 521 01c6 0C4B ldr r3, .L34+36 - 522 01c8 1B68 ldr r3, [r3] - 523 01ca 1B69 ldr r3, [r3, #16] - 524 01cc 2000 movs r0, r4 - 525 01ce 9847 blx r3 - 526 .LVL33: - 527 .L11: - 517:./Middlewares/Third_Party/Lora/Core/lora.c **** - 528 .loc 1 517 0 - 529 01d0 08B0 add sp, sp, #32 - 530 @ sp needed - 531 01d2 10BD pop {r4, pc} - 532 .L35: - 533 .align 2 - 534 .L34: - 535 01d4 00000000 .word .LANCHOR2 - 536 01d8 00000000 .word .LANCHOR3 - 537 01dc 00000000 .word .LANCHOR4 - 538 01e0 00000000 .word .L19 - 539 01e4 00000000 .word .LANCHOR5 - 540 01e8 00000000 .word .LANCHOR6 - 541 01ec 00000000 .word .LANCHOR7 - 542 01f0 00000000 .word .LANCHOR8 - 543 01f4 00000000 .word .LANCHOR1 - 544 01f8 00000000 .word .LANCHOR9 - 545 .cfi_endproc - 546 .LFE101: - 548 .section .text.OnSendEvent,"ax",%progbits - ARM GAS /tmp/ccY05lmV.s page 22 - - - 549 .align 1 - 550 .global OnSendEvent - 551 .syntax unified - 552 .code 16 - 553 .thumb_func - 554 .fpu softvfp - 556 OnSendEvent: - 557 .LFB98: - 262:./Middlewares/Third_Party/Lora/Core/lora.c **** MibRequestConfirm_t _mibReq; - 558 .loc 1 262 0 - 559 .cfi_startproc - 560 @ args = 0, pretend = 0, frame = 16 - 561 @ frame_needed = 0, uses_anonymous_args = 0 - 562 0000 00B5 push {lr} - 563 .LCFI2: - 564 .cfi_def_cfa_offset 4 - 565 .cfi_offset 14, -4 - 566 0002 85B0 sub sp, sp, #20 - 567 .LCFI3: - 568 .cfi_def_cfa_offset 24 - 266:./Middlewares/Third_Party/Lora/Core/lora.c **** status = LoRaMacMibGetRequestConfirm( &_mibReq ); - 569 .loc 1 266 0 - 570 0004 01A8 add r0, sp, #4 - 571 0006 0123 movs r3, #1 - 572 0008 0370 strb r3, [r0] - 267:./Middlewares/Third_Party/Lora/Core/lora.c **** - 573 .loc 1 267 0 - 574 000a FFF7FEFF bl LoRaMacMibGetRequestConfirm - 575 .LVL34: - 269:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 576 .loc 1 269 0 - 577 000e 0028 cmp r0, #0 - 578 0010 06D1 bne .L36 - 271:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 579 .loc 1 271 0 - 580 0012 01AB add r3, sp, #4 - 581 0014 1B79 ldrb r3, [r3, #4] - 582 0016 002B cmp r3, #0 - 583 0018 04D1 bne .L39 - 278:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 584 .loc 1 278 0 - 585 001a 064B ldr r3, .L40 - 586 001c 0122 movs r2, #1 - 587 001e 1A70 strb r2, [r3] - 588 .L36: - 281:./Middlewares/Third_Party/Lora/Core/lora.c **** /*! - 589 .loc 1 281 0 - 590 0020 05B0 add sp, sp, #20 - 591 @ sp needed - 592 0022 00BD pop {pc} - 593 .L39: - 273:./Middlewares/Third_Party/Lora/Core/lora.c **** NextTx = true; - 594 .loc 1 273 0 - 595 0024 034B ldr r3, .L40 - 596 0026 0322 movs r2, #3 - 597 0028 1A70 strb r2, [r3] - 274:./Middlewares/Third_Party/Lora/Core/lora.c **** } - ARM GAS /tmp/ccY05lmV.s page 23 - - - 598 .loc 1 274 0 - 599 002a 034B ldr r3, .L40+4 - 600 002c 023A subs r2, r2, #2 - 601 002e 1A70 strb r2, [r3] - 602 0030 F6E7 b .L36 - 603 .L41: - 604 0032 C046 .align 2 - 605 .L40: - 606 0034 00000000 .word .LANCHOR1 - 607 0038 00000000 .word .LANCHOR0 - 608 .cfi_endproc - 609 .LFE98: - 611 .section .text.OnTxNextPacketTimerEvent,"ax",%progbits - 612 .align 1 - 613 .syntax unified - 614 .code 16 - 615 .thumb_func - 616 .fpu softvfp - 618 OnTxNextPacketTimerEvent: - 619 .LFB99: - 286:./Middlewares/Third_Party/Lora/Core/lora.c **** TimerStop( &TxNextPacketTimer ); - 620 .loc 1 286 0 - 621 .cfi_startproc - 622 @ args = 0, pretend = 0, frame = 0 - 623 @ frame_needed = 0, uses_anonymous_args = 0 - 624 0000 10B5 push {r4, lr} - 625 .LCFI4: - 626 .cfi_def_cfa_offset 8 - 627 .cfi_offset 4, -8 - 628 .cfi_offset 14, -4 - 287:./Middlewares/Third_Party/Lora/Core/lora.c **** OnSendEvent(); - 629 .loc 1 287 0 - 630 0002 0348 ldr r0, .L43 - 631 0004 FFF7FEFF bl TimerStop - 632 .LVL35: - 288:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 633 .loc 1 288 0 - 634 0008 FFF7FEFF bl OnSendEvent - 635 .LVL36: - 289:./Middlewares/Third_Party/Lora/Core/lora.c **** - 636 .loc 1 289 0 - 637 @ sp needed - 638 000c 10BD pop {r4, pc} - 639 .L44: - 640 000e C046 .align 2 - 641 .L43: - 642 0010 00000000 .word .LANCHOR10 - 643 .cfi_endproc - 644 .LFE99: - 646 .section .text.lora_Init,"ax",%progbits - 647 .align 1 - 648 .global lora_Init - 649 .syntax unified - 650 .code 16 - 651 .thumb_func - 652 .fpu softvfp - 654 lora_Init: - ARM GAS /tmp/ccY05lmV.s page 24 - - - 655 .LFB103: - 563:./Middlewares/Third_Party/Lora/Core/lora.c **** /** - 564:./Middlewares/Third_Party/Lora/Core/lora.c **** * lora Init - 565:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 566:./Middlewares/Third_Party/Lora/Core/lora.c **** void lora_Init (LoRaMainCallback_t *callbacks, LoRaParam_t* LoRaParam ) - 567:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 656 .loc 1 567 0 - 657 .cfi_startproc - 658 @ args = 0, pretend = 0, frame = 0 - 659 @ frame_needed = 0, uses_anonymous_args = 0 - 660 .LVL37: - 661 0000 10B5 push {r4, lr} - 662 .LCFI5: - 663 .cfi_def_cfa_offset 8 - 664 .cfi_offset 4, -8 - 665 .cfi_offset 14, -4 - 568:./Middlewares/Third_Party/Lora/Core/lora.c **** /* init the DeviceState*/ - 569:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState= DEVICE_STATE_INIT; - 666 .loc 1 569 0 - 667 0002 224B ldr r3, .L52 - 668 0004 0022 movs r2, #0 - 669 0006 1A70 strb r2, [r3] - 570:./Middlewares/Third_Party/Lora/Core/lora.c **** - 571:./Middlewares/Third_Party/Lora/Core/lora.c **** /* init the Tx Duty Cycle*/ - 572:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaParamInit = LoRaParam; - 670 .loc 1 572 0 - 671 0008 214B ldr r3, .L52+4 - 672 000a 1960 str r1, [r3] - 573:./Middlewares/Third_Party/Lora/Core/lora.c **** - 574:./Middlewares/Third_Party/Lora/Core/lora.c **** /* init the main call backs*/ - 575:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMainCallbacks = callbacks; - 673 .loc 1 575 0 - 674 000c 214B ldr r3, .L52+8 - 675 000e 1860 str r0, [r3] - 576:./Middlewares/Third_Party/Lora/Core/lora.c **** - 577:./Middlewares/Third_Party/Lora/Core/lora.c **** #if (STATIC_DEVICE_EUI != 1) - 578:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMainCallbacks->BoardGetUniqueId( DevEui ); - 676 .loc 1 578 0 - 677 0010 4368 ldr r3, [r0, #4] - 678 0012 214C ldr r4, .L52+12 - 679 0014 2000 movs r0, r4 - 680 .LVL38: - 681 0016 9847 blx r3 - 682 .LVL39: - 579:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 580:./Middlewares/Third_Party/Lora/Core/lora.c **** - 581:./Middlewares/Third_Party/Lora/Core/lora.c **** #if( OVER_THE_AIR_ACTIVATION != 0 ) - 582:./Middlewares/Third_Party/Lora/Core/lora.c **** - 583:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("OTAA\n\r"); - 683 .loc 1 583 0 - 684 0018 2048 ldr r0, .L52+16 - 685 001a FFF7FEFF bl vcom_Send - 686 .LVL40: - 584:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("DevEui= %02X", DevEui[0]) ;for(int i=1; i<8 ; i++) {PRINTF("-%02X", DevEui[i]); }; PRINTF - 687 .loc 1 584 0 - 688 001e 2178 ldrb r1, [r4] - 689 0020 1F48 ldr r0, .L52+20 - ARM GAS /tmp/ccY05lmV.s page 25 - - - 690 0022 FFF7FEFF bl vcom_Send - 691 .LVL41: - 692 .LBB9: - 693 0026 0124 movs r4, #1 - 694 0028 05E0 b .L46 - 695 .LVL42: - 696 .L47: - 697 .loc 1 584 0 is_stmt 0 discriminator 3 - 698 002a 1B4B ldr r3, .L52+12 - 699 002c 195D ldrb r1, [r3, r4] - 700 002e 1D48 ldr r0, .L52+24 - 701 0030 FFF7FEFF bl vcom_Send - 702 .LVL43: - 703 0034 0134 adds r4, r4, #1 - 704 .LVL44: - 705 .L46: - 706 .loc 1 584 0 discriminator 1 - 707 0036 072C cmp r4, #7 - 708 0038 F7DD ble .L47 - 709 .LBE9: - 710 .loc 1 584 0 discriminator 4 - 711 003a 1B48 ldr r0, .L52+28 - 712 003c FFF7FEFF bl vcom_Send - 713 .LVL45: - 585:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("AppEui= %02X", AppEui[0]) ;for(int i=1; i<8 ; i++) {PRINTF("-%02X", AppEui[i]); }; PRINTF - 714 .loc 1 585 0 is_stmt 1 discriminator 4 - 715 0040 1A4B ldr r3, .L52+32 - 716 0042 1978 ldrb r1, [r3] - 717 0044 1A48 ldr r0, .L52+36 - 718 0046 FFF7FEFF bl vcom_Send - 719 .LVL46: - 720 .LBB10: - 721 004a 0124 movs r4, #1 - 722 .LVL47: - 723 004c 05E0 b .L48 - 724 .LVL48: - 725 .L49: - 726 .loc 1 585 0 is_stmt 0 discriminator 3 - 727 004e 174B ldr r3, .L52+32 - 728 0050 195D ldrb r1, [r3, r4] - 729 0052 1448 ldr r0, .L52+24 - 730 0054 FFF7FEFF bl vcom_Send - 731 .LVL49: - 732 0058 0134 adds r4, r4, #1 - 733 .LVL50: - 734 .L48: - 735 .loc 1 585 0 discriminator 1 - 736 005a 072C cmp r4, #7 - 737 005c F7DD ble .L49 - 738 .LBE10: - 739 .loc 1 585 0 discriminator 4 - 740 005e 1248 ldr r0, .L52+28 - 741 0060 FFF7FEFF bl vcom_Send - 742 .LVL51: - 586:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("AppKey= %02X", AppKey[0]) ;for(int i=1; i<16; i++) {PRINTF(" %02X", AppKey[i]); }; PRINTF - 743 .loc 1 586 0 is_stmt 1 discriminator 4 - 744 0064 134B ldr r3, .L52+40 - ARM GAS /tmp/ccY05lmV.s page 26 - - - 745 0066 1978 ldrb r1, [r3] - 746 0068 1348 ldr r0, .L52+44 - 747 006a FFF7FEFF bl vcom_Send - 748 .LVL52: - 749 .LBB11: - 750 006e 0124 movs r4, #1 - 751 .LVL53: - 752 0070 05E0 b .L50 - 753 .LVL54: - 754 .L51: - 755 .loc 1 586 0 is_stmt 0 discriminator 3 - 756 0072 104B ldr r3, .L52+40 - 757 0074 195D ldrb r1, [r3, r4] - 758 0076 1148 ldr r0, .L52+48 - 759 0078 FFF7FEFF bl vcom_Send - 760 .LVL55: - 761 007c 0134 adds r4, r4, #1 - 762 .LVL56: - 763 .L50: - 764 .loc 1 586 0 discriminator 1 - 765 007e 0F2C cmp r4, #15 - 766 0080 F7DD ble .L51 - 767 .LBE11: - 768 .loc 1 586 0 discriminator 4 - 769 0082 0F48 ldr r0, .L52+52 - 770 0084 FFF7FEFF bl vcom_Send - 771 .LVL57: - 587:./Middlewares/Third_Party/Lora/Core/lora.c **** #else - 588:./Middlewares/Third_Party/Lora/Core/lora.c **** - 589:./Middlewares/Third_Party/Lora/Core/lora.c **** #if (STATIC_DEVICE_ADDRESS != 1) - 590:./Middlewares/Third_Party/Lora/Core/lora.c **** // Random seed initialization - 591:./Middlewares/Third_Party/Lora/Core/lora.c **** srand1( LoRaMainCallbacks->BoardGetRandomSeed( ) ); - 592:./Middlewares/Third_Party/Lora/Core/lora.c **** // Choose a random device address - 593:./Middlewares/Third_Party/Lora/Core/lora.c **** DevAddr = randr( 0, 0x01FFFFFF ); - 594:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 595:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("ABP\n\r"); - 596:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("DevEui= %02X", DevEui[0]) ;for(int i=1; i<8 ; i++) {PRINTF("-%02X", DevEui[i]); }; PRINTF - 597:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("DevAdd= %08X\n\r", DevAddr) ; - 598:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("NwkSKey= %02X", NwkSKey[0]) ;for(int i=1; i<16 ; i++) {PRINTF(" %02X", NwkSKey[i]); }; PR - 599:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("AppSKey= %02X", AppSKey[0]) ;for(int i=1; i<16 ; i++) {PRINTF(" %02X", AppSKey[i]); }; PR - 600:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 601:./Middlewares/Third_Party/Lora/Core/lora.c **** - 602:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 772 .loc 1 602 0 is_stmt 1 discriminator 4 - 773 @ sp needed - 774 .LVL58: - 775 0088 10BD pop {r4, pc} - 776 .L53: - 777 008a C046 .align 2 - 778 .L52: - 779 008c 00000000 .word .LANCHOR1 - 780 0090 00000000 .word .LANCHOR5 - 781 0094 00000000 .word .LANCHOR9 - 782 0098 00000000 .word .LANCHOR6 - 783 009c 00000000 .word .LC21 - 784 00a0 08000000 .word .LC23 - 785 00a4 18000000 .word .LC25 - ARM GAS /tmp/ccY05lmV.s page 27 - - - 786 00a8 20000000 .word .LC27 - 787 00ac 00000000 .word .LANCHOR7 - 788 00b0 24000000 .word .LC30 - 789 00b4 00000000 .word .LANCHOR8 - 790 00b8 34000000 .word .LC33 - 791 00bc 44000000 .word .LC35 - 792 00c0 4C000000 .word .LC37 - 793 .cfi_endproc - 794 .LFE103: - 796 .section .text.lora_fsm,"ax",%progbits - 797 .align 1 - 798 .global lora_fsm - 799 .syntax unified - 800 .code 16 - 801 .thumb_func - 802 .fpu softvfp - 804 lora_fsm: - 805 .LFB104: - 603:./Middlewares/Third_Party/Lora/Core/lora.c **** - 604:./Middlewares/Third_Party/Lora/Core/lora.c **** /** - 605:./Middlewares/Third_Party/Lora/Core/lora.c **** * lora class A state machine - 606:./Middlewares/Third_Party/Lora/Core/lora.c **** */ - 607:./Middlewares/Third_Party/Lora/Core/lora.c **** - 608:./Middlewares/Third_Party/Lora/Core/lora.c **** void lora_fsm( void) - 609:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 806 .loc 1 609 0 - 807 .cfi_startproc - 808 @ args = 0, pretend = 0, frame = 24 - 809 @ frame_needed = 0, uses_anonymous_args = 0 - 810 0000 30B5 push {r4, r5, lr} - 811 .LCFI6: - 812 .cfi_def_cfa_offset 12 - 813 .cfi_offset 4, -12 - 814 .cfi_offset 5, -8 - 815 .cfi_offset 14, -4 - 816 0002 87B0 sub sp, sp, #28 - 817 .LCFI7: - 818 .cfi_def_cfa_offset 40 - 610:./Middlewares/Third_Party/Lora/Core/lora.c **** switch( DeviceState ) - 819 .loc 1 610 0 - 820 0004 7E4B ldr r3, .L82 - 821 0006 1A78 ldrb r2, [r3] - 822 0008 052A cmp r2, #5 - 823 000a 00D9 bls .LCB684 - 824 000c F4E0 b .L55 @long jump - 825 .LCB684: - 826 000e 9300 lsls r3, r2, #2 - 827 0010 7C4A ldr r2, .L82+4 - 828 0012 D358 ldr r3, [r2, r3] - 829 0014 9F46 mov pc, r3 - 830 .section .rodata.lora_fsm,"a",%progbits - 831 .align 2 - 832 .L57: - 833 0000 16000000 .word .L56 - 834 0004 80000000 .word .L58 - 835 0008 B2000000 .word .L59 - 836 000c C0000000 .word .L60 - ARM GAS /tmp/ccY05lmV.s page 28 - - - 837 0010 F8010000 .word .L55 - 838 0014 7C000000 .word .L54 - 839 .section .text.lora_fsm - 840 .L56: - 611:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 612:./Middlewares/Third_Party/Lora/Core/lora.c **** case DEVICE_STATE_INIT: - 613:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 614:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacPrimitives.MacMcpsConfirm = McpsConfirm; - 841 .loc 1 614 0 - 842 0016 7C48 ldr r0, .L82+8 - 843 0018 7C4B ldr r3, .L82+12 - 844 001a 0360 str r3, [r0] - 615:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacPrimitives.MacMcpsIndication = McpsIndication; - 845 .loc 1 615 0 - 846 001c 7C4B ldr r3, .L82+16 - 847 001e 4360 str r3, [r0, #4] - 616:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacPrimitives.MacMlmeConfirm = MlmeConfirm; - 848 .loc 1 616 0 - 849 0020 7C4B ldr r3, .L82+20 - 850 0022 8360 str r3, [r0, #8] - 617:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacCallbacks.GetBatteryLevel = LoRaMainCallbacks->BoardGetBatteryLevel; - 851 .loc 1 617 0 - 852 0024 7C4B ldr r3, .L82+24 - 853 0026 1B68 ldr r3, [r3] - 854 0028 1B68 ldr r3, [r3] - 855 002a 7C49 ldr r1, .L82+28 - 856 002c 0B60 str r3, [r1] - 618:./Middlewares/Third_Party/Lora/Core/lora.c **** #if defined( REGION_AS923 ) - 619:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_AS923 - 620:./Middlewares/Third_Party/Lora/Core/lora.c **** #elif defined( REGION_AU915 ) - 621:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_AU915 - 622:./Middlewares/Third_Party/Lora/Core/lora.c **** #elif defined( REGION_CN470 ) - 623:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_CN470 - 624:./Middlewares/Third_Party/Lora/Core/lora.c **** #elif defined( REGION_CN779 ) - 625:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_CN779 - 626:./Middlewares/Third_Party/Lora/Core/lora.c **** #elif defined( REGION_EU433 ) - 627:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_EU433 - 628:./Middlewares/Third_Party/Lora/Core/lora.c **** #elif defined( REGION_IN865 ) - 629:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_IN865 - 630:./Middlewares/Third_Party/Lora/Core/lora.c **** #elif defined( REGION_EU868 ) - 631:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_EU868 - 857 .loc 1 631 0 - 858 002e 0522 movs r2, #5 - 859 0030 FFF7FEFF bl LoRaMacInitialization - 860 .LVL59: - 632:./Middlewares/Third_Party/Lora/Core/lora.c **** #elif defined( REGION_KR920 ) - 633:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_KR920 - 634:./Middlewares/Third_Party/Lora/Core/lora.c **** #elif defined( REGION_US915 ) - 635:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_US915 - 636:./Middlewares/Third_Party/Lora/Core/lora.c **** #elif defined( REGION_US915_HYBRID ) - 637:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacInitialization( &LoRaMacPrimitives, &LoRaMacCallbacks, LORAMAC_REGION_US915_ - 638:./Middlewares/Third_Party/Lora/Core/lora.c **** #else - 639:./Middlewares/Third_Party/Lora/Core/lora.c **** #error "Please define a region in the compiler options." - 640:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 641:./Middlewares/Third_Party/Lora/Core/lora.c **** - 642:./Middlewares/Third_Party/Lora/Core/lora.c **** TimerInit( &TxNextPacketTimer, OnTxNextPacketTimerEvent ); - 861 .loc 1 642 0 - ARM GAS /tmp/ccY05lmV.s page 29 - - - 862 0034 7A49 ldr r1, .L82+32 - 863 0036 7B48 ldr r0, .L82+36 - 864 0038 FFF7FEFF bl TimerInit - 865 .LVL60: - 643:./Middlewares/Third_Party/Lora/Core/lora.c **** - 644:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_ADR; - 866 .loc 1 644 0 - 867 003c 7A4C ldr r4, .L82+40 - 868 003e 0223 movs r3, #2 - 869 0040 2370 strb r3, [r4] - 645:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.AdrEnable = LoRaParamInit->AdrEnable; - 870 .loc 1 645 0 - 871 0042 7A4D ldr r5, .L82+44 - 872 0044 2B68 ldr r3, [r5] - 873 0046 5B7A ldrb r3, [r3, #9] - 874 0048 2371 strb r3, [r4, #4] - 646:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 875 .loc 1 646 0 - 876 004a 2000 movs r0, r4 - 877 004c FFF7FEFF bl LoRaMacMibSetRequestConfirm - 878 .LVL61: - 647:./Middlewares/Third_Party/Lora/Core/lora.c **** - 648:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_PUBLIC_NETWORK; - 879 .loc 1 648 0 - 880 0050 0723 movs r3, #7 - 881 0052 2370 strb r3, [r4] - 649:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.EnablePublicNetwork = LoRaParamInit->EnablePublicNetwork; - 882 .loc 1 649 0 - 883 0054 2B68 ldr r3, [r5] - 884 0056 DB7A ldrb r3, [r3, #11] - 885 0058 2371 strb r3, [r4, #4] - 650:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 886 .loc 1 650 0 - 887 005a 2000 movs r0, r4 - 888 005c FFF7FEFF bl LoRaMacMibSetRequestConfirm - 889 .LVL62: - 651:./Middlewares/Third_Party/Lora/Core/lora.c **** - 652:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_DEVICE_CLASS; - 890 .loc 1 652 0 - 891 0060 0023 movs r3, #0 - 892 0062 2370 strb r3, [r4] - 653:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.Class= LoRaParamInit->Class; - 893 .loc 1 653 0 - 894 0064 2B68 ldr r3, [r5] - 895 0066 1B7A ldrb r3, [r3, #8] - 896 0068 2371 strb r3, [r4, #4] - 654:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 897 .loc 1 654 0 - 898 006a 2000 movs r0, r4 - 899 006c FFF7FEFF bl LoRaMacMibSetRequestConfirm - 900 .LVL63: - 655:./Middlewares/Third_Party/Lora/Core/lora.c **** - 656:./Middlewares/Third_Party/Lora/Core/lora.c **** #if defined( REGION_EU868 ) - 657:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacTestSetDutyCycleOn( LORAWAN_DUTYCYCLE_ON ); - 901 .loc 1 657 0 - 902 0070 0120 movs r0, #1 - 903 0072 FFF7FEFF bl LoRaMacTestSetDutyCycleOn - ARM GAS /tmp/ccY05lmV.s page 30 - - - 904 .LVL64: - 658:./Middlewares/Third_Party/Lora/Core/lora.c **** - 659:./Middlewares/Third_Party/Lora/Core/lora.c **** #if( USE_SEMTECH_DEFAULT_CHANNEL_LINEUP == 1 ) - 660:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacChannelAdd( 3, ( ChannelParams_t )LC4 ); - 661:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacChannelAdd( 4, ( ChannelParams_t )LC5 ); - 662:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacChannelAdd( 5, ( ChannelParams_t )LC6 ); - 663:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacChannelAdd( 6, ( ChannelParams_t )LC7 ); - 664:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacChannelAdd( 7, ( ChannelParams_t )LC8 ); - 665:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacChannelAdd( 8, ( ChannelParams_t )LC9 ); - 666:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacChannelAdd( 9, ( ChannelParams_t )LC10 ); - 667:./Middlewares/Third_Party/Lora/Core/lora.c **** - 668:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_RX2_DEFAULT_CHANNEL; - 669:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.Rx2DefaultChannel = ( Rx2ChannelParams_t ){ 869525000, DR_3 }; - 670:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 671:./Middlewares/Third_Party/Lora/Core/lora.c **** - 672:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_RX2_CHANNEL; - 673:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.Rx2Channel = ( Rx2ChannelParams_t ){ 869525000, DR_3 }; - 674:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 675:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 676:./Middlewares/Third_Party/Lora/Core/lora.c **** - 677:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 678:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_JOIN; - 905 .loc 1 678 0 - 906 0076 624B ldr r3, .L82 - 907 0078 0122 movs r2, #1 - 908 007a 1A70 strb r2, [r3] - 909 .L54: - 679:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 680:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 681:./Middlewares/Third_Party/Lora/Core/lora.c **** case DEVICE_STATE_JOIN: - 682:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 683:./Middlewares/Third_Party/Lora/Core/lora.c **** #if( OVER_THE_AIR_ACTIVATION != 0 ) - 684:./Middlewares/Third_Party/Lora/Core/lora.c **** MlmeReq_t mlmeReq; - 685:./Middlewares/Third_Party/Lora/Core/lora.c **** - 686:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Type = MLME_JOIN; - 687:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.DevEui = DevEui; - 688:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.AppEui = AppEui; - 689:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.AppKey = AppKey; - 690:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.NbTrials = LoRaParamInit->NbTrials; - 691:./Middlewares/Third_Party/Lora/Core/lora.c **** - 692:./Middlewares/Third_Party/Lora/Core/lora.c **** if( NextTx == true ) - 693:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 694:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMlmeRequest( &mlmeReq ); - 695:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 696:./Middlewares/Third_Party/Lora/Core/lora.c **** - 697:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_SLEEP; - 698:./Middlewares/Third_Party/Lora/Core/lora.c **** #else - 699:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_NET_ID; - 700:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.NetID = LORAWAN_NETWORK_ID; - 701:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 702:./Middlewares/Third_Party/Lora/Core/lora.c **** - 703:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_DEV_ADDR; - 704:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.DevAddr = DevAddr; - 705:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 706:./Middlewares/Third_Party/Lora/Core/lora.c **** - 707:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_NWK_SKEY; - 708:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.NwkSKey = NwkSKey; - ARM GAS /tmp/ccY05lmV.s page 31 - - - 709:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 710:./Middlewares/Third_Party/Lora/Core/lora.c **** - 711:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_APP_SKEY; - 712:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.AppSKey = AppSKey; - 713:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 714:./Middlewares/Third_Party/Lora/Core/lora.c **** - 715:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Type = MIB_NETWORK_JOINED; - 716:./Middlewares/Third_Party/Lora/Core/lora.c **** mibReq.Param.IsNetworkJoined = true; - 717:./Middlewares/Third_Party/Lora/Core/lora.c **** LoRaMacMibSetRequestConfirm( &mibReq ); - 718:./Middlewares/Third_Party/Lora/Core/lora.c **** - 719:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_SEND; - 720:./Middlewares/Third_Party/Lora/Core/lora.c **** #endif - 721:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 722:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 723:./Middlewares/Third_Party/Lora/Core/lora.c **** case DEVICE_STATE_JOINED: - 724:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 725:./Middlewares/Third_Party/Lora/Core/lora.c **** PRINTF("JOINED\n\r"); - 726:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_SEND; - 727:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 728:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 729:./Middlewares/Third_Party/Lora/Core/lora.c **** case DEVICE_STATE_SEND: - 730:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 731:./Middlewares/Third_Party/Lora/Core/lora.c **** if( NextTx == true ) - 732:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 733:./Middlewares/Third_Party/Lora/Core/lora.c **** PrepareTxFrame( ); - 734:./Middlewares/Third_Party/Lora/Core/lora.c **** - 735:./Middlewares/Third_Party/Lora/Core/lora.c **** NextTx = SendFrame( ); - 736:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 737:./Middlewares/Third_Party/Lora/Core/lora.c **** if( ComplianceTest.Running == true ) - 738:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 739:./Middlewares/Third_Party/Lora/Core/lora.c **** // Schedule next packet transmission as soon as possible - 740:./Middlewares/Third_Party/Lora/Core/lora.c **** TimerSetValue( &TxNextPacketTimer, 5000); /* 5s */ - 741:./Middlewares/Third_Party/Lora/Core/lora.c **** TimerStart( &TxNextPacketTimer ); - 742:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 743:./Middlewares/Third_Party/Lora/Core/lora.c **** else if (LoRaParamInit->TxEvent == TX_ON_TIMER ) - 744:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 745:./Middlewares/Third_Party/Lora/Core/lora.c **** // Schedule next packet transmission - 746:./Middlewares/Third_Party/Lora/Core/lora.c **** TimerSetValue( &TxNextPacketTimer, LoRaParamInit->TxDutyCycleTime ); - 747:./Middlewares/Third_Party/Lora/Core/lora.c **** TimerStart( &TxNextPacketTimer ); - 748:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 749:./Middlewares/Third_Party/Lora/Core/lora.c **** - 750:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_SLEEP; - 751:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 752:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 753:./Middlewares/Third_Party/Lora/Core/lora.c **** case DEVICE_STATE_SLEEP: - 754:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 755:./Middlewares/Third_Party/Lora/Core/lora.c **** // Wake up through events - 756:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 757:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 758:./Middlewares/Third_Party/Lora/Core/lora.c **** default: - 759:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 760:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_INIT; - 761:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 762:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 763:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 764:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 910 .loc 1 764 0 - ARM GAS /tmp/ccY05lmV.s page 32 - - - 911 007c 07B0 add sp, sp, #28 - 912 @ sp needed - 913 007e 30BD pop {r4, r5, pc} - 914 .L58: - 915 .LBB17: - 686:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.DevEui = DevEui; - 916 .loc 1 686 0 - 917 0080 01AB add r3, sp, #4 - 918 0082 0022 movs r2, #0 - 919 0084 1A70 strb r2, [r3] - 687:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.AppEui = AppEui; - 920 .loc 1 687 0 - 921 0086 6A4A ldr r2, .L82+48 - 922 0088 0292 str r2, [sp, #8] - 688:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.AppKey = AppKey; - 923 .loc 1 688 0 - 924 008a 6A4A ldr r2, .L82+52 - 925 008c 0392 str r2, [sp, #12] - 689:./Middlewares/Third_Party/Lora/Core/lora.c **** mlmeReq.Req.Join.NbTrials = LoRaParamInit->NbTrials; - 926 .loc 1 689 0 - 927 008e 6A4A ldr r2, .L82+56 - 928 0090 0492 str r2, [sp, #16] - 690:./Middlewares/Third_Party/Lora/Core/lora.c **** - 929 .loc 1 690 0 - 930 0092 664A ldr r2, .L82+44 - 931 0094 1268 ldr r2, [r2] - 932 0096 127B ldrb r2, [r2, #12] - 933 0098 1A74 strb r2, [r3, #16] - 692:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 934 .loc 1 692 0 - 935 009a 684B ldr r3, .L82+60 - 936 009c 1B78 ldrb r3, [r3] - 937 009e 002B cmp r3, #0 - 938 00a0 03D1 bne .L75 - 939 .L62: - 697:./Middlewares/Third_Party/Lora/Core/lora.c **** #else - 940 .loc 1 697 0 - 941 00a2 574B ldr r3, .L82 - 942 00a4 0522 movs r2, #5 - 943 00a6 1A70 strb r2, [r3] - 944 00a8 E8E7 b .L54 - 945 .L75: - 694:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 946 .loc 1 694 0 - 947 00aa 01A8 add r0, sp, #4 - 948 00ac FFF7FEFF bl LoRaMacMlmeRequest - 949 .LVL65: - 950 00b0 F7E7 b .L62 - 951 .L59: - 952 .LBE17: - 725:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState = DEVICE_STATE_SEND; - 953 .loc 1 725 0 - 954 00b2 6348 ldr r0, .L82+64 - 955 00b4 FFF7FEFF bl vcom_Send - 956 .LVL66: - 726:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 957 .loc 1 726 0 - ARM GAS /tmp/ccY05lmV.s page 33 - - - 958 00b8 514B ldr r3, .L82 - 959 00ba 0322 movs r2, #3 - 960 00bc 1A70 strb r2, [r3] - 727:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 961 .loc 1 727 0 - 962 00be DDE7 b .L54 - 963 .L60: - 731:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 964 .loc 1 731 0 - 965 00c0 5E4B ldr r3, .L82+60 - 966 00c2 1C78 ldrb r4, [r3] - 967 00c4 002C cmp r4, #0 - 968 00c6 0ED1 bne .L76 - 969 .L63: - 737:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 970 .loc 1 737 0 - 971 00c8 5E4B ldr r3, .L82+68 - 972 00ca 1B78 ldrb r3, [r3] - 973 00cc 002B cmp r3, #0 - 974 00ce 00D0 beq .LCB813 - 975 00d0 80E0 b .L77 @long jump - 976 .LCB813: - 743:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 977 .loc 1 743 0 - 978 00d2 564B ldr r3, .L82+44 - 979 00d4 1B68 ldr r3, [r3] - 980 00d6 1A78 ldrb r2, [r3] - 981 00d8 002A cmp r2, #0 - 982 00da 00D1 bne .LCB818 - 983 00dc 83E0 b .L78 @long jump - 984 .LCB818: - 985 .L74: - 750:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 986 .loc 1 750 0 - 987 00de 484B ldr r3, .L82 - 988 00e0 0522 movs r2, #5 - 989 00e2 1A70 strb r2, [r3] - 751:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 990 .loc 1 751 0 - 991 00e4 CAE7 b .L54 - 992 .L76: - 993 .LBB18: - 994 .LBB19: - 184:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 995 .loc 1 184 0 - 996 00e6 574B ldr r3, .L82+68 - 997 00e8 1B78 ldrb r3, [r3] - 998 00ea 002B cmp r3, #0 - 999 00ec 1ED1 bne .L79 - 212:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1000 .loc 1 212 0 - 1001 00ee 4A4B ldr r3, .L82+24 - 1002 00f0 1B68 ldr r3, [r3] - 1003 00f2 DB68 ldr r3, [r3, #12] - 1004 00f4 5449 ldr r1, .L82+72 - 1005 00f6 5548 ldr r0, .L82+76 - 1006 00f8 9847 blx r3 - ARM GAS /tmp/ccY05lmV.s page 34 - - - 1007 .LVL67: - 1008 .L66: - 1009 .LBE19: - 1010 .LBE18: - 1011 .LBB21: - 1012 .LBB22: - 226:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 1013 .loc 1 226 0 - 1014 00fa 544B ldr r3, .L82+76 - 1015 00fc 1879 ldrb r0, [r3, #4] - 1016 00fe 6946 mov r1, sp - 1017 0100 FFF7FEFF bl LoRaMacQueryTxPossible - 1018 .LVL68: - 1019 0104 0028 cmp r0, #0 - 1020 0106 3DD0 beq .L69 - 229:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fBuffer = NULL; - 1021 .loc 1 229 0 - 1022 0108 01AB add r3, sp, #4 - 1023 010a 0022 movs r2, #0 - 1024 010c 1A70 strb r2, [r3] - 230:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fBufferSize = 0; - 1025 .loc 1 230 0 - 1026 010e 0392 str r2, [sp, #12] - 231:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.Datarate = LoRaParamInit->TxDatarate; - 1027 .loc 1 231 0 - 1028 0110 9A81 strh r2, [r3, #12] - 232:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1029 .loc 1 232 0 - 1030 0112 464A ldr r2, .L82+44 - 1031 0114 1268 ldr r2, [r2] - 1032 0116 927A ldrb r2, [r2, #10] - 1033 0118 52B2 sxtb r2, r2 - 1034 011a 9A73 strb r2, [r3, #14] - 1035 .L70: - 254:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 1036 .loc 1 254 0 - 1037 011c 01A8 add r0, sp, #4 - 1038 011e FFF7FEFF bl LoRaMacMcpsRequest - 1039 .LVL69: - 1040 0122 0028 cmp r0, #0 - 1041 0124 54D0 beq .L80 - 1042 .L72: - 1043 .LBE22: - 1044 .LBE21: - 735:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1045 .loc 1 735 0 - 1046 0126 454B ldr r3, .L82+60 - 1047 0128 1C70 strb r4, [r3] - 1048 012a CDE7 b .L63 - 1049 .L79: - 1050 .LBB24: - 1051 .LBB20: - 186:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 1052 .loc 1 186 0 - 1053 012c 454B ldr r3, .L82+68 - 1054 012e 9B7B ldrb r3, [r3, #14] - 1055 0130 002B cmp r3, #0 - ARM GAS /tmp/ccY05lmV.s page 35 - - - 1056 0132 09D1 bne .L81 - 197:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 1057 .loc 1 197 0 - 1058 0134 434B ldr r3, .L82+68 - 1059 0136 5B78 ldrb r3, [r3, #1] - 1060 0138 012B cmp r3, #1 - 1061 013a 17D0 beq .L67 - 1062 013c 042B cmp r3, #4 - 1063 013e DCD1 bne .L66 - 200:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 1064 .loc 1 200 0 - 1065 0140 404B ldr r3, .L82+68 - 1066 0142 0122 movs r2, #1 - 1067 0144 5A70 strb r2, [r3, #1] - 1068 0146 D8E7 b .L66 - 1069 .L81: - 188:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.BuffSize = 3; - 1070 .loc 1 188 0 - 1071 0148 3E4B ldr r3, .L82+68 - 1072 014a 0022 movs r2, #0 - 1073 014c 9A73 strb r2, [r3, #14] - 189:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[0] = 5; - 1074 .loc 1 189 0 - 1075 014e 3F4A ldr r2, .L82+76 - 1076 0150 0321 movs r1, #3 - 1077 0152 1171 strb r1, [r2, #4] - 190:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[1] = ComplianceTest.DemodMargin; - 1078 .loc 1 190 0 - 1079 0154 0231 adds r1, r1, #2 - 1080 0156 1068 ldr r0, [r2] - 1081 0158 0170 strb r1, [r0] - 191:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[2] = ComplianceTest.NbGateways; - 1082 .loc 1 191 0 - 1083 015a D97B ldrb r1, [r3, #15] - 1084 015c 1068 ldr r0, [r2] - 1085 015e 4170 strb r1, [r0, #1] - 192:./Middlewares/Third_Party/Lora/Core/lora.c **** ComplianceTest.State = 1; - 1086 .loc 1 192 0 - 1087 0160 1268 ldr r2, [r2] - 1088 0162 197C ldrb r1, [r3, #16] - 1089 0164 9170 strb r1, [r2, #2] - 193:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1090 .loc 1 193 0 - 1091 0166 0122 movs r2, #1 - 1092 0168 5A70 strb r2, [r3, #1] - 1093 016a C6E7 b .L66 - 1094 .L67: - 203:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[0] = ComplianceTest.DownLinkCounter >> 8; - 1095 .loc 1 203 0 - 1096 016c 374B ldr r3, .L82+76 - 1097 016e 0222 movs r2, #2 - 1098 0170 1A71 strb r2, [r3, #4] - 204:./Middlewares/Third_Party/Lora/Core/lora.c **** AppData.Buff[1] = ComplianceTest.DownLinkCounter; - 1099 .loc 1 204 0 - 1100 0172 3449 ldr r1, .L82+68 - 1101 0174 8A89 ldrh r2, [r1, #12] - 1102 0176 120A lsrs r2, r2, #8 - ARM GAS /tmp/ccY05lmV.s page 36 - - - 1103 0178 1868 ldr r0, [r3] - 1104 017a 0270 strb r2, [r0] - 205:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 1105 .loc 1 205 0 - 1106 017c 8A89 ldrh r2, [r1, #12] - 1107 017e 1B68 ldr r3, [r3] - 1108 0180 5A70 strb r2, [r3, #1] - 1109 0182 BAE7 b .L66 - 1110 .L69: - 1111 .LBE20: - 1112 .LBE24: - 1113 .LBB25: - 1114 .LBB23: - 236:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 1115 .loc 1 236 0 - 1116 0184 304B ldr r3, .L82+72 - 1117 0186 1B78 ldrb r3, [r3] - 1118 0188 002B cmp r3, #0 - 1119 018a 0FD1 bne .L71 - 238:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fPort = AppData.Port; - 1120 .loc 1 238 0 - 1121 018c 01AB add r3, sp, #4 - 1122 018e 0022 movs r2, #0 - 1123 0190 1A70 strb r2, [r3] - 239:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fBuffer = AppData.Buff; - 1124 .loc 1 239 0 - 1125 0192 2E4A ldr r2, .L82+76 - 1126 0194 5179 ldrb r1, [r2, #5] - 1127 0196 1971 strb r1, [r3, #4] - 240:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.fBufferSize = AppData.BuffSize; - 1128 .loc 1 240 0 - 1129 0198 1168 ldr r1, [r2] - 1130 019a 0391 str r1, [sp, #12] - 241:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Unconfirmed.Datarate = LoRaParamInit->TxDatarate; - 1131 .loc 1 241 0 - 1132 019c 1279 ldrb r2, [r2, #4] - 1133 019e 9A81 strh r2, [r3, #12] - 242:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1134 .loc 1 242 0 - 1135 01a0 224A ldr r2, .L82+44 - 1136 01a2 1268 ldr r2, [r2] - 1137 01a4 927A ldrb r2, [r2, #10] - 1138 01a6 52B2 sxtb r2, r2 - 1139 01a8 9A73 strb r2, [r3, #14] - 1140 01aa B7E7 b .L70 - 1141 .L71: - 246:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.fPort = AppData.Port; - 1142 .loc 1 246 0 - 1143 01ac 01AB add r3, sp, #4 - 1144 01ae 0122 movs r2, #1 - 1145 01b0 1A70 strb r2, [r3] - 247:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.fBuffer = AppData.Buff; - 1146 .loc 1 247 0 - 1147 01b2 264A ldr r2, .L82+76 - 1148 01b4 5179 ldrb r1, [r2, #5] - 1149 01b6 1971 strb r1, [r3, #4] - 248:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.fBufferSize = AppData.BuffSize; - ARM GAS /tmp/ccY05lmV.s page 37 - - - 1150 .loc 1 248 0 - 1151 01b8 1168 ldr r1, [r2] - 1152 01ba 0391 str r1, [sp, #12] - 249:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.NbTrials = 8; - 1153 .loc 1 249 0 - 1154 01bc 1279 ldrb r2, [r2, #4] - 1155 01be 9A81 strh r2, [r3, #12] - 250:./Middlewares/Third_Party/Lora/Core/lora.c **** mcpsReq.Req.Confirmed.Datarate = LoRaParamInit->TxDatarate; - 1156 .loc 1 250 0 - 1157 01c0 0822 movs r2, #8 - 1158 01c2 DA73 strb r2, [r3, #15] - 251:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1159 .loc 1 251 0 - 1160 01c4 194A ldr r2, .L82+44 - 1161 01c6 1268 ldr r2, [r2] - 1162 01c8 927A ldrb r2, [r2, #10] - 1163 01ca 52B2 sxtb r2, r2 - 1164 01cc 9A73 strb r2, [r3, #14] - 1165 01ce A5E7 b .L70 - 1166 .L80: - 256:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1167 .loc 1 256 0 - 1168 01d0 0024 movs r4, #0 - 1169 01d2 A8E7 b .L72 - 1170 .L77: - 1171 .LBE23: - 1172 .LBE25: - 740:./Middlewares/Third_Party/Lora/Core/lora.c **** TimerStart( &TxNextPacketTimer ); - 1173 .loc 1 740 0 - 1174 01d4 134C ldr r4, .L82+36 - 1175 01d6 1E49 ldr r1, .L82+80 - 1176 01d8 2000 movs r0, r4 - 1177 01da FFF7FEFF bl TimerSetValue - 1178 .LVL70: - 741:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1179 .loc 1 741 0 - 1180 01de 2000 movs r0, r4 - 1181 01e0 FFF7FEFF bl TimerStart - 1182 .LVL71: - 1183 01e4 7BE7 b .L74 - 1184 .L78: - 746:./Middlewares/Third_Party/Lora/Core/lora.c **** TimerStart( &TxNextPacketTimer ); - 1185 .loc 1 746 0 - 1186 01e6 5968 ldr r1, [r3, #4] - 1187 01e8 0E4C ldr r4, .L82+36 - 1188 01ea 2000 movs r0, r4 - 1189 01ec FFF7FEFF bl TimerSetValue - 1190 .LVL72: - 747:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1191 .loc 1 747 0 - 1192 01f0 2000 movs r0, r4 - 1193 01f2 FFF7FEFF bl TimerStart - 1194 .LVL73: - 1195 01f6 72E7 b .L74 - 1196 .L55: - 760:./Middlewares/Third_Party/Lora/Core/lora.c **** break; - 1197 .loc 1 760 0 - ARM GAS /tmp/ccY05lmV.s page 38 - - - 1198 01f8 014B ldr r3, .L82 - 1199 01fa 0022 movs r2, #0 - 1200 01fc 1A70 strb r2, [r3] - 1201 .loc 1 764 0 - 1202 01fe 3DE7 b .L54 - 1203 .L83: - 1204 .align 2 - 1205 .L82: - 1206 0200 00000000 .word .LANCHOR1 - 1207 0204 00000000 .word .L57 - 1208 0208 00000000 .word .LANCHOR11 - 1209 020c 00000000 .word McpsConfirm - 1210 0210 00000000 .word McpsIndication - 1211 0214 00000000 .word MlmeConfirm - 1212 0218 00000000 .word .LANCHOR9 - 1213 021c 00000000 .word .LANCHOR12 - 1214 0220 00000000 .word OnTxNextPacketTimerEvent - 1215 0224 00000000 .word .LANCHOR10 - 1216 0228 00000000 .word .LANCHOR13 - 1217 022c 00000000 .word .LANCHOR5 - 1218 0230 00000000 .word .LANCHOR6 - 1219 0234 00000000 .word .LANCHOR7 - 1220 0238 00000000 .word .LANCHOR8 - 1221 023c 00000000 .word .LANCHOR0 - 1222 0240 00000000 .word .LC55 - 1223 0244 00000000 .word .LANCHOR2 - 1224 0248 00000000 .word .LANCHOR3 - 1225 024c 00000000 .word .LANCHOR4 - 1226 0250 88130000 .word 5000 - 1227 .cfi_endproc - 1228 .LFE104: - 1230 .section .text.lora_getDeviceState,"ax",%progbits - 1231 .align 1 - 1232 .global lora_getDeviceState - 1233 .syntax unified - 1234 .code 16 - 1235 .thumb_func - 1236 .fpu softvfp - 1238 lora_getDeviceState: - 1239 .LFB105: - 765:./Middlewares/Third_Party/Lora/Core/lora.c **** - 766:./Middlewares/Third_Party/Lora/Core/lora.c **** - 767:./Middlewares/Third_Party/Lora/Core/lora.c **** DeviceState_t lora_getDeviceState( void ) - 768:./Middlewares/Third_Party/Lora/Core/lora.c **** { - 1240 .loc 1 768 0 - 1241 .cfi_startproc - 1242 @ args = 0, pretend = 0, frame = 0 - 1243 @ frame_needed = 0, uses_anonymous_args = 0 - 1244 @ link register save eliminated. - 769:./Middlewares/Third_Party/Lora/Core/lora.c **** return DeviceState; - 1245 .loc 1 769 0 - 1246 0000 014B ldr r3, .L85 - 1247 0002 1878 ldrb r0, [r3] - 770:./Middlewares/Third_Party/Lora/Core/lora.c **** } - 1248 .loc 1 770 0 - 1249 @ sp needed - 1250 0004 7047 bx lr - ARM GAS /tmp/ccY05lmV.s page 39 - - - 1251 .L86: - 1252 0006 C046 .align 2 - 1253 .L85: - 1254 0008 00000000 .word .LANCHOR1 - 1255 .cfi_endproc - 1256 .LFE105: - 1258 .global ComplianceTest - 1259 .section .bss.AppDataBuff,"aw",%nobits - 1260 .align 2 - 1263 AppDataBuff: - 1264 0000 00000000 .space 64 - 1264 00000000 - 1264 00000000 - 1264 00000000 - 1264 00000000 - 1265 .section .bss.ComplianceTest,"aw",%nobits - 1266 .align 2 - 1267 .set .LANCHOR2,. + 0 - 1270 ComplianceTest: - 1271 0000 00000000 .space 20 - 1271 00000000 - 1271 00000000 - 1271 00000000 - 1271 00000000 - 1272 .section .bss.DeviceState,"aw",%nobits - 1273 .set .LANCHOR1,. + 0 - 1276 DeviceState: - 1277 0000 00 .space 1 - 1278 .section .bss.IsTxConfirmed,"aw",%nobits - 1279 .set .LANCHOR3,. + 0 - 1282 IsTxConfirmed: - 1283 0000 00 .space 1 - 1284 .section .bss.LoRaMacCallbacks,"aw",%nobits - 1285 .align 2 - 1286 .set .LANCHOR12,. + 0 - 1289 LoRaMacCallbacks: - 1290 0000 00000000 .space 4 - 1291 .section .bss.LoRaMacPrimitives,"aw",%nobits - 1292 .align 2 - 1293 .set .LANCHOR11,. + 0 - 1296 LoRaMacPrimitives: - 1297 0000 00000000 .space 12 - 1297 00000000 - 1297 00000000 - 1298 .section .bss.LoRaMainCallbacks,"aw",%nobits - 1299 .align 2 - 1300 .set .LANCHOR9,. + 0 - 1303 LoRaMainCallbacks: - 1304 0000 00000000 .space 4 - 1305 .section .bss.LoRaParamInit,"aw",%nobits - 1306 .align 2 - 1307 .set .LANCHOR5,. + 0 - 1310 LoRaParamInit: - 1311 0000 00000000 .space 4 - 1312 .section .bss.TxNextPacketTimer,"aw",%nobits - 1313 .align 2 - 1314 .set .LANCHOR10,. + 0 - ARM GAS /tmp/ccY05lmV.s page 40 - - - 1317 TxNextPacketTimer: - 1318 0000 00000000 .space 20 - 1318 00000000 - 1318 00000000 - 1318 00000000 - 1318 00000000 - 1319 .section .bss.mibReq,"aw",%nobits - 1320 .align 2 - 1321 .set .LANCHOR13,. + 0 - 1324 mibReq: - 1325 0000 00000000 .space 12 - 1325 00000000 - 1325 00000000 - 1326 .section .data.AppData,"aw",%progbits - 1327 .align 2 - 1328 .set .LANCHOR4,. + 0 - 1331 AppData: - 1332 0000 00000000 .word AppDataBuff - 1333 0004 00 .byte 0 - 1334 0005 00 .byte 0 - 1335 0006 0000 .space 2 - 1336 .section .data.AppEui,"aw",%progbits - 1337 .align 2 - 1338 .set .LANCHOR7,. + 0 - 1341 AppEui: - 1342 0000 70 .byte 112 - 1343 0001 B3 .byte -77 - 1344 0002 D5 .byte -43 - 1345 0003 7E .byte 126 - 1346 0004 D0 .byte -48 - 1347 0005 00 .byte 0 - 1348 0006 7C .byte 124 - 1349 0007 04 .byte 4 - 1350 .section .data.AppKey,"aw",%progbits - 1351 .align 2 - 1352 .set .LANCHOR8,. + 0 - 1355 AppKey: - 1356 0000 4F .byte 79 - 1357 0001 13 .byte 19 - 1358 0002 EF .byte -17 - 1359 0003 E5 .byte -27 - 1360 0004 D9 .byte -39 - 1361 0005 A9 .byte -87 - 1362 0006 44 .byte 68 - 1363 0007 93 .byte -109 - 1364 0008 99 .byte -103 - 1365 0009 25 .byte 37 - 1366 000a D2 .byte -46 - 1367 000b D9 .byte -39 - 1368 000c 79 .byte 121 - 1369 000d 77 .byte 119 - 1370 000e 91 .byte -111 - 1371 000f DC .byte -36 - 1372 .section .data.DevEui,"aw",%progbits - 1373 .align 2 - 1374 .set .LANCHOR6,. + 0 - 1377 DevEui: - ARM GAS /tmp/ccY05lmV.s page 41 - - - 1378 0000 01 .byte 1 - 1379 0001 01 .byte 1 - 1380 0002 01 .byte 1 - 1381 0003 01 .byte 1 - 1382 0004 01 .byte 1 - 1383 0005 01 .byte 1 - 1384 0006 01 .byte 1 - 1385 0007 01 .byte 1 - 1386 .section .data.NextTx,"aw",%progbits - 1387 .set .LANCHOR0,. + 0 - 1390 NextTx: - 1391 0000 01 .byte 1 - 1392 .section .rodata.lora_Init.str1.4,"aMS",%progbits,1 - 1393 .align 2 - 1394 .LC21: - 1395 0000 4F544141 .ascii "OTAA\012\015\000" - 1395 0A0D00 - 1396 0007 00 .space 1 - 1397 .LC23: - 1398 0008 44657645 .ascii "DevEui= %02X\000" - 1398 75693D20 - 1398 25303258 - 1398 00 - 1399 0015 000000 .space 3 - 1400 .LC25: - 1401 0018 2D253032 .ascii "-%02X\000" - 1401 5800 - 1402 001e 0000 .space 2 - 1403 .LC27: - 1404 0020 0A0D00 .ascii "\012\015\000" - 1405 0023 00 .space 1 - 1406 .LC30: - 1407 0024 41707045 .ascii "AppEui= %02X\000" - 1407 75693D20 - 1407 25303258 - 1407 00 - 1408 0031 000000 .space 3 - 1409 .LC33: - 1410 0034 4170704B .ascii "AppKey= %02X\000" - 1410 65793D20 - 1410 25303258 - 1410 00 - 1411 0041 000000 .space 3 - 1412 .LC35: - 1413 0044 20253032 .ascii " %02X\000" - 1413 5800 - 1414 004a 0000 .space 2 - 1415 .LC37: - 1416 004c 0A0A0D00 .ascii "\012\012\015\000" - 1417 .section .rodata.lora_fsm.str1.4,"aMS",%progbits,1 - 1418 .align 2 - 1419 .LC55: - 1420 0000 4A4F494E .ascii "JOINED\012\015\000" - 1420 45440A0D - 1420 00 - 1421 .text - 1422 .Letext0: - ARM GAS /tmp/ccY05lmV.s page 42 - - - 1423 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 1424 .file 3 "/usr/arm-none-eabi/include/sys/lock.h" - 1425 .file 4 "/usr/arm-none-eabi/include/sys/_types.h" - 1426 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 1427 .file 6 "/usr/arm-none-eabi/include/sys/reent.h" - 1428 .file 7 "/usr/arm-none-eabi/include/math.h" - 1429 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h" - 1430 .file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 1431 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" - 1432 .file 11 "Middlewares/Third_Party/Lora/Utilities/utilities.h" - 1433 .file 12 "Middlewares/Third_Party/Lora/Utilities/timeServer.h" - 1434 .file 13 "Middlewares/Third_Party/Lora/Mac/LoRaMac.h" - 1435 .file 14 "./Middlewares/Third_Party/Lora/Core/lora.h" - 1436 .file 15 "Middlewares/Third_Party/Lora/Mac/LoRaMacTest.h" - 1437 .file 16 "Inc/vcom.h" - ARM GAS /tmp/ccY05lmV.s page 43 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 lora.c - /tmp/ccY05lmV.s:16 .text.McpsConfirm:0000000000000000 $t - /tmp/ccY05lmV.s:22 .text.McpsConfirm:0000000000000000 McpsConfirm - /tmp/ccY05lmV.s:41 .text.McpsConfirm:0000000000000008 $d - /tmp/ccY05lmV.s:46 .text.MlmeConfirm:0000000000000000 $t - /tmp/ccY05lmV.s:52 .text.MlmeConfirm:0000000000000000 MlmeConfirm - /tmp/ccY05lmV.s:114 .text.MlmeConfirm:0000000000000048 $d - /tmp/ccY05lmV.s:121 .text.McpsIndication:0000000000000000 $t - /tmp/ccY05lmV.s:127 .text.McpsIndication:0000000000000000 McpsIndication - /tmp/ccY05lmV.s:267 .rodata.McpsIndication:0000000000000000 $d - /tmp/ccY05lmV.s:535 .text.McpsIndication:00000000000001d4 $d - /tmp/ccY05lmV.s:549 .text.OnSendEvent:0000000000000000 $t - /tmp/ccY05lmV.s:556 .text.OnSendEvent:0000000000000000 OnSendEvent - /tmp/ccY05lmV.s:606 .text.OnSendEvent:0000000000000034 $d - /tmp/ccY05lmV.s:612 .text.OnTxNextPacketTimerEvent:0000000000000000 $t - /tmp/ccY05lmV.s:618 .text.OnTxNextPacketTimerEvent:0000000000000000 OnTxNextPacketTimerEvent - /tmp/ccY05lmV.s:642 .text.OnTxNextPacketTimerEvent:0000000000000010 $d - /tmp/ccY05lmV.s:647 .text.lora_Init:0000000000000000 $t - /tmp/ccY05lmV.s:654 .text.lora_Init:0000000000000000 lora_Init - /tmp/ccY05lmV.s:779 .text.lora_Init:000000000000008c $d - /tmp/ccY05lmV.s:797 .text.lora_fsm:0000000000000000 $t - /tmp/ccY05lmV.s:804 .text.lora_fsm:0000000000000000 lora_fsm - /tmp/ccY05lmV.s:831 .rodata.lora_fsm:0000000000000000 $d - /tmp/ccY05lmV.s:1206 .text.lora_fsm:0000000000000200 $d - /tmp/ccY05lmV.s:1231 .text.lora_getDeviceState:0000000000000000 $t - /tmp/ccY05lmV.s:1238 .text.lora_getDeviceState:0000000000000000 lora_getDeviceState - /tmp/ccY05lmV.s:1254 .text.lora_getDeviceState:0000000000000008 $d - /tmp/ccY05lmV.s:1270 .bss.ComplianceTest:0000000000000000 ComplianceTest - /tmp/ccY05lmV.s:1260 .bss.AppDataBuff:0000000000000000 $d - /tmp/ccY05lmV.s:1263 .bss.AppDataBuff:0000000000000000 AppDataBuff - /tmp/ccY05lmV.s:1266 .bss.ComplianceTest:0000000000000000 $d - /tmp/ccY05lmV.s:1276 .bss.DeviceState:0000000000000000 DeviceState - /tmp/ccY05lmV.s:1277 .bss.DeviceState:0000000000000000 $d - /tmp/ccY05lmV.s:1282 .bss.IsTxConfirmed:0000000000000000 IsTxConfirmed - /tmp/ccY05lmV.s:1283 .bss.IsTxConfirmed:0000000000000000 $d - /tmp/ccY05lmV.s:1285 .bss.LoRaMacCallbacks:0000000000000000 $d - /tmp/ccY05lmV.s:1289 .bss.LoRaMacCallbacks:0000000000000000 LoRaMacCallbacks - /tmp/ccY05lmV.s:1292 .bss.LoRaMacPrimitives:0000000000000000 $d - /tmp/ccY05lmV.s:1296 .bss.LoRaMacPrimitives:0000000000000000 LoRaMacPrimitives - /tmp/ccY05lmV.s:1299 .bss.LoRaMainCallbacks:0000000000000000 $d - /tmp/ccY05lmV.s:1303 .bss.LoRaMainCallbacks:0000000000000000 LoRaMainCallbacks - /tmp/ccY05lmV.s:1306 .bss.LoRaParamInit:0000000000000000 $d - /tmp/ccY05lmV.s:1310 .bss.LoRaParamInit:0000000000000000 LoRaParamInit - /tmp/ccY05lmV.s:1313 .bss.TxNextPacketTimer:0000000000000000 $d - /tmp/ccY05lmV.s:1317 .bss.TxNextPacketTimer:0000000000000000 TxNextPacketTimer - /tmp/ccY05lmV.s:1320 .bss.mibReq:0000000000000000 $d - /tmp/ccY05lmV.s:1324 .bss.mibReq:0000000000000000 mibReq - /tmp/ccY05lmV.s:1327 .data.AppData:0000000000000000 $d - /tmp/ccY05lmV.s:1331 .data.AppData:0000000000000000 AppData - /tmp/ccY05lmV.s:1337 .data.AppEui:0000000000000000 $d - /tmp/ccY05lmV.s:1341 .data.AppEui:0000000000000000 AppEui - /tmp/ccY05lmV.s:1351 .data.AppKey:0000000000000000 $d - /tmp/ccY05lmV.s:1355 .data.AppKey:0000000000000000 AppKey - /tmp/ccY05lmV.s:1373 .data.DevEui:0000000000000000 $d - /tmp/ccY05lmV.s:1377 .data.DevEui:0000000000000000 DevEui - /tmp/ccY05lmV.s:1390 .data.NextTx:0000000000000000 NextTx - ARM GAS /tmp/ccY05lmV.s page 44 - - - /tmp/ccY05lmV.s:1393 .rodata.lora_Init.str1.4:0000000000000000 $d - /tmp/ccY05lmV.s:1418 .rodata.lora_fsm.str1.4:0000000000000000 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -LoRaMacMibSetRequestConfirm -LoRaMacTestSetDutyCycleOn -LoRaMacMlmeRequest -memcpy1 -LoRaMacMibGetRequestConfirm -TimerStop -vcom_Send -LoRaMacInitialization -TimerInit -LoRaMacQueryTxPossible -LoRaMacMcpsRequest -TimerSetValue -TimerStart diff --git a/build/low_power.d b/build/low_power.d deleted file mode 100644 index ff40528..0000000 --- a/build/low_power.d +++ /dev/null @@ -1,138 +0,0 @@ -build/low_power.d: Middlewares/Third_Party/Lora/Utilities/low_power.c \ - Inc/hw.h Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h \ - Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_conf.h Inc/hw_gpio.h \ - Inc/hw_spi.h Inc/hw_rtc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Inc/hw_msp.h Inc/debug.h Inc/vcom.h \ - Middlewares/Third_Party/Lora/Utilities/low_power.h - -Inc/hw.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: - -Inc/stm32l0xx_hw_conf.h: - -Inc/hw.h: - -Inc/hw_conf.h: - -Inc/hw_gpio.h: - -Inc/hw_spi.h: - -Inc/hw_rtc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Inc/hw_msp.h: - -Inc/debug.h: - -Inc/vcom.h: - -Middlewares/Third_Party/Lora/Utilities/low_power.h: diff --git a/build/low_power.lst b/build/low_power.lst deleted file mode 100644 index 7395404..0000000 --- a/build/low_power.lst +++ /dev/null @@ -1,657 +0,0 @@ -ARM GAS /tmp/ccBl10G9.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "low_power.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.LowPower_Disable,"ax",%progbits - 16 .align 1 - 17 .global LowPower_Disable - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 LowPower_Disable: - 24 .LFB96: - 25 .file 1 "./Middlewares/Third_Party/Lora/Utilities/low_power.c" - 1:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /******************************************************************************* - 2:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * @file low_power.c - 3:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * @author MCD Application Team - 4:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * @version V1.1.2 - 5:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * @date 08-September-2017 - 6:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * @brief driver for low power - 7:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** ****************************************************************************** - 8:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * @attention - 9:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * - 10:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** *

© Copyright (c) 2017 STMicroelectronics International N.V. - 11:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * All rights reserved.

- 12:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * - 13:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * Redistribution and use in source and binary forms, with or without - 14:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * modification, are permitted, provided that the following conditions are met: - 15:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * - 16:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * 1. Redistribution of source code must retain the above copyright notice, - 17:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * this list of conditions and the following disclaimer. - 18:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 19:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * this list of conditions and the following disclaimer in the documentation - 20:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * and/or other materials provided with the distribution. - 21:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * 3. Neither the name of STMicroelectronics nor the names of other - 22:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * contributors to this software may be used to endorse or promote products - 23:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * derived from this software without specific written permission. - 24:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * 4. This software, including modifications and/or derivative works of this - 25:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * software, must execute solely and exclusively on microcontroller or - 26:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * microprocessor devices manufactured by or for STMicroelectronics. - 27:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * 5. Redistribution and use of this software other than as permitted under - 28:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * this license is void and will automatically terminate your rights under - 29:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * this license. - 30:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * - 31:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - 32:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - 33:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - ARM GAS /tmp/ccBl10G9.s page 2 - - - 34:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - 35:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - 36:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - 37:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - 38:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - 39:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - 40:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - 41:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - 42:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 43:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * - 44:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** ****************************************************************************** - 45:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** */ - 46:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 47:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Includes ------------------------------------------------------------------*/ - 48:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** #include "hw.h" - 49:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** #include "low_power.h" - 50:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 51:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private typedef -----------------------------------------------------------*/ - 52:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private define ------------------------------------------------------------*/ - 53:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private macro -------------------------------------------------------------*/ - 54:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private variables ---------------------------------------------------------*/ - 55:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 56:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /** - 57:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * \brief Flag to indicate if MCU can go to low power mode - 58:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * When 0, MCU is authorized to go in low power mode - 59:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** */ - 60:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** static uint32_t LowPower_State = 0; - 61:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 62:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Private function prototypes -----------------------------------------------*/ - 63:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 64:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 65:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 66:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* Exported functions ---------------------------------------------------------*/ - 67:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 68:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /** - 69:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * \brief API to set flag allowing power mode - 70:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * - 71:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * \param [IN] enum e_LOW_POWER_State_Id_t - 72:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** */ - 73:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** void LowPower_Disable( e_LOW_POWER_State_Id_t state ) - 74:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** { - 26 .loc 1 74 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 @ link register save eliminated. - 31 .LVL0: - 32 .LBB14: - 33 .LBB15: - 34 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" - 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** - 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h - 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS Cortex-M Core Function/Instruction Header File - 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V4.30 - 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 20. October 2015 - 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ - 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Copyright (c) 2009 - 2015 ARM LIMITED - ARM GAS /tmp/ccBl10G9.s page 3 - - - 8:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9:Drivers/CMSIS/Include/cmsis_gcc.h **** All rights reserved. - 10:Drivers/CMSIS/Include/cmsis_gcc.h **** Redistribution and use in source and binary forms, with or without - 11:Drivers/CMSIS/Include/cmsis_gcc.h **** modification, are permitted provided that the following conditions are met: - 12:Drivers/CMSIS/Include/cmsis_gcc.h **** - Redistributions of source code must retain the above copyright - 13:Drivers/CMSIS/Include/cmsis_gcc.h **** notice, this list of conditions and the following disclaimer. - 14:Drivers/CMSIS/Include/cmsis_gcc.h **** - Redistributions in binary form must reproduce the above copyright - 15:Drivers/CMSIS/Include/cmsis_gcc.h **** notice, this list of conditions and the following disclaimer in the - 16:Drivers/CMSIS/Include/cmsis_gcc.h **** documentation and/or other materials provided with the distribution. - 17:Drivers/CMSIS/Include/cmsis_gcc.h **** - Neither the name of ARM nor the names of its contributors may be used - 18:Drivers/CMSIS/Include/cmsis_gcc.h **** to endorse or promote products derived from this software without - 19:Drivers/CMSIS/Include/cmsis_gcc.h **** specific prior written permission. - 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * - 21:Drivers/CMSIS/Include/cmsis_gcc.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 22:Drivers/CMSIS/Include/cmsis_gcc.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 23:Drivers/CMSIS/Include/cmsis_gcc.h **** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - 24:Drivers/CMSIS/Include/cmsis_gcc.h **** ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - 25:Drivers/CMSIS/Include/cmsis_gcc.h **** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - 26:Drivers/CMSIS/Include/cmsis_gcc.h **** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - 27:Drivers/CMSIS/Include/cmsis_gcc.h **** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - 28:Drivers/CMSIS/Include/cmsis_gcc.h **** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - 29:Drivers/CMSIS/Include/cmsis_gcc.h **** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - 30:Drivers/CMSIS/Include/cmsis_gcc.h **** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - 31:Drivers/CMSIS/Include/cmsis_gcc.h **** POSSIBILITY OF SUCH DAMAGE. - 32:Drivers/CMSIS/Include/cmsis_gcc.h **** ---------------------------------------------------------------------------*/ - 33:Drivers/CMSIS/Include/cmsis_gcc.h **** - 34:Drivers/CMSIS/Include/cmsis_gcc.h **** - 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H - 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H - 37:Drivers/CMSIS/Include/cmsis_gcc.h **** - 38:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ - 39:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined ( __GNUC__ ) - 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push - 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" - 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" - 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" - 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 45:Drivers/CMSIS/Include/cmsis_gcc.h **** - 46:Drivers/CMSIS/Include/cmsis_gcc.h **** - 47:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ - 48:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface - 49:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - 50:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ - 51:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 52:Drivers/CMSIS/Include/cmsis_gcc.h **** - 53:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 54:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts - 55:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - 56:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 57:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 58:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) - 59:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 60:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); - 61:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 62:Drivers/CMSIS/Include/cmsis_gcc.h **** - 63:Drivers/CMSIS/Include/cmsis_gcc.h **** - 64:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccBl10G9.s page 4 - - - 65:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts - 66:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. - 67:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 68:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 69:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) - 70:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 71:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); - 72:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 73:Drivers/CMSIS/Include/cmsis_gcc.h **** - 74:Drivers/CMSIS/Include/cmsis_gcc.h **** - 75:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 76:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register - 77:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. - 78:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value - 79:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 80:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void) - 81:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 82:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 83:Drivers/CMSIS/Include/cmsis_gcc.h **** - 84:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); - 85:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 86:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 87:Drivers/CMSIS/Include/cmsis_gcc.h **** - 88:Drivers/CMSIS/Include/cmsis_gcc.h **** - 89:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 90:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register - 91:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. - 92:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set - 93:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 94:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control) - 95:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 96:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); - 97:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 98:Drivers/CMSIS/Include/cmsis_gcc.h **** - 99:Drivers/CMSIS/Include/cmsis_gcc.h **** - 100:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 101:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register - 102:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. - 103:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value - 104:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 105:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void) - 106:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 107:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 108:Drivers/CMSIS/Include/cmsis_gcc.h **** - 109:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 110:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 111:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 112:Drivers/CMSIS/Include/cmsis_gcc.h **** - 113:Drivers/CMSIS/Include/cmsis_gcc.h **** - 114:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 115:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register - 116:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. - 117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value - 118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 119:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void) - 120:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - ARM GAS /tmp/ccBl10G9.s page 5 - - - 122:Drivers/CMSIS/Include/cmsis_gcc.h **** - 123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - 124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 125:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 126:Drivers/CMSIS/Include/cmsis_gcc.h **** - 127:Drivers/CMSIS/Include/cmsis_gcc.h **** - 128:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 129:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register - 130:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. - 131:Drivers/CMSIS/Include/cmsis_gcc.h **** - 132:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value - 133:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 134:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void) - 135:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 137:Drivers/CMSIS/Include/cmsis_gcc.h **** - 138:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - 139:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 140:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 141:Drivers/CMSIS/Include/cmsis_gcc.h **** - 142:Drivers/CMSIS/Include/cmsis_gcc.h **** - 143:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 144:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer - 145:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). - 146:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value - 147:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 148:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void) - 149:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 150:Drivers/CMSIS/Include/cmsis_gcc.h **** register uint32_t result; - 151:Drivers/CMSIS/Include/cmsis_gcc.h **** - 152:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); - 153:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 155:Drivers/CMSIS/Include/cmsis_gcc.h **** - 156:Drivers/CMSIS/Include/cmsis_gcc.h **** - 157:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 158:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer - 159:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). - 160:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set - 161:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 162:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) - 163:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 164:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp"); - 165:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 166:Drivers/CMSIS/Include/cmsis_gcc.h **** - 167:Drivers/CMSIS/Include/cmsis_gcc.h **** - 168:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 169:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer - 170:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). - 171:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value - 172:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 173:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void) - 174:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 175:Drivers/CMSIS/Include/cmsis_gcc.h **** register uint32_t result; - 176:Drivers/CMSIS/Include/cmsis_gcc.h **** - 177:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); - 178:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccBl10G9.s page 6 - - - 179:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 180:Drivers/CMSIS/Include/cmsis_gcc.h **** - 181:Drivers/CMSIS/Include/cmsis_gcc.h **** - 182:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 183:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer - 184:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). - 185:Drivers/CMSIS/Include/cmsis_gcc.h **** - 186:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set - 187:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 188:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) - 189:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 190:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); - 191:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 192:Drivers/CMSIS/Include/cmsis_gcc.h **** - 193:Drivers/CMSIS/Include/cmsis_gcc.h **** - 194:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 195:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask - 196:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. - 197:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value - 198:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 199:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void) - 200:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 201:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 202:Drivers/CMSIS/Include/cmsis_gcc.h **** - 203:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 35 .loc 2 203 0 - 36 .syntax divided - 37 @ 203 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 38 0000 EFF31083 MRS r3, primask - 39 @ 0 "" 2 - 40 .thumb - 41 .syntax unified - 42 .LBE15: - 43 .LBE14: - 44 .LBB16: - 45 .LBB17: - 71:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 46 .loc 2 71 0 - 47 .syntax divided - 48 @ 71 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 49 0004 72B6 cpsid i - 50 @ 0 "" 2 - 51 .thumb - 52 .syntax unified - 53 .LBE17: - 54 .LBE16: - 75:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** BACKUP_PRIMASK(); - 76:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 77:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** DISABLE_IRQ( ); - 78:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 79:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** LowPower_State |= state; - 55 .loc 1 79 0 - 56 0006 034A ldr r2, .L2 - 57 0008 1168 ldr r1, [r2] - 58 000a 0843 orrs r0, r1 - 59 .LVL1: - 60 000c 1060 str r0, [r2] - ARM GAS /tmp/ccBl10G9.s page 7 - - - 61 .LBB18: - 62 .LBB19: - 204:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 205:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 206:Drivers/CMSIS/Include/cmsis_gcc.h **** - 207:Drivers/CMSIS/Include/cmsis_gcc.h **** - 208:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 209:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask - 210:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. - 211:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask - 212:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 213:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) - 214:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 215:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 63 .loc 2 215 0 - 64 .syntax divided - 65 @ 215 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 66 000e 83F31088 MSR primask, r3 - 67 @ 0 "" 2 - 68 .thumb - 69 .syntax unified - 70 .LBE19: - 71 .LBE18: - 80:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 81:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** RESTORE_PRIMASK( ); - 82:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** } - 72 .loc 1 82 0 - 73 @ sp needed - 74 0012 7047 bx lr - 75 .L3: - 76 .align 2 - 77 .L2: - 78 0014 00000000 .word .LANCHOR0 - 79 .cfi_endproc - 80 .LFE96: - 82 .section .text.LowPower_Enable,"ax",%progbits - 83 .align 1 - 84 .global LowPower_Enable - 85 .syntax unified - 86 .code 16 - 87 .thumb_func - 88 .fpu softvfp - 90 LowPower_Enable: - 91 .LFB97: - 83:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 84:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /** - 85:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * \brief API to reset flag allowing power mode - 86:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * - 87:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * \param [IN] enum e_LOW_POWER_State_Id_t - 88:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** */ - 89:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** void LowPower_Enable( e_LOW_POWER_State_Id_t state ) - 90:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** { - 92 .loc 1 90 0 - 93 .cfi_startproc - 94 @ args = 0, pretend = 0, frame = 0 - 95 @ frame_needed = 0, uses_anonymous_args = 0 - 96 @ link register save eliminated. - ARM GAS /tmp/ccBl10G9.s page 8 - - - 97 .LVL2: - 98 .LBB20: - 99 .LBB21: - 203:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 100 .loc 2 203 0 - 101 .syntax divided - 102 @ 203 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 103 0000 EFF31083 MRS r3, primask - 104 @ 0 "" 2 - 105 .thumb - 106 .syntax unified - 107 .LBE21: - 108 .LBE20: - 109 .LBB22: - 110 .LBB23: - 71:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 111 .loc 2 71 0 - 112 .syntax divided - 113 @ 71 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 114 0004 72B6 cpsid i - 115 @ 0 "" 2 - 116 .thumb - 117 .syntax unified - 118 .LBE23: - 119 .LBE22: - 91:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** BACKUP_PRIMASK(); - 92:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 93:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** DISABLE_IRQ( ); - 94:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 95:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** LowPower_State &= ~state; - 120 .loc 1 95 0 - 121 0006 0349 ldr r1, .L5 - 122 0008 0A68 ldr r2, [r1] - 123 000a 8243 bics r2, r0 - 124 000c 0A60 str r2, [r1] - 125 .LBB24: - 126 .LBB25: - 127 .loc 2 215 0 - 128 .syntax divided - 129 @ 215 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 130 000e 83F31088 MSR primask, r3 - 131 @ 0 "" 2 - 132 .thumb - 133 .syntax unified - 134 .LBE25: - 135 .LBE24: - 96:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 97:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** RESTORE_PRIMASK( ); - 98:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** } - 136 .loc 1 98 0 - 137 @ sp needed - 138 0012 7047 bx lr - 139 .L6: - 140 .align 2 - 141 .L5: - 142 0014 00000000 .word .LANCHOR0 - 143 .cfi_endproc - ARM GAS /tmp/ccBl10G9.s page 9 - - - 144 .LFE97: - 146 .section .text.LowPower_GetState,"ax",%progbits - 147 .align 1 - 148 .global LowPower_GetState - 149 .syntax unified - 150 .code 16 - 151 .thumb_func - 152 .fpu softvfp - 154 LowPower_GetState: - 155 .LFB98: - 99:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 100:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /** - 101:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * \brief API to get flag allowing power mode - 102:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * \note When flag is 0, low power mode is allowed - 103:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * \param [IN] state - 104:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * \retval flag state - 105:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** */ - 106:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** uint32_t LowPower_GetState( void ) - 107:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** { - 156 .loc 1 107 0 - 157 .cfi_startproc - 158 @ args = 0, pretend = 0, frame = 0 - 159 @ frame_needed = 0, uses_anonymous_args = 0 - 160 @ link register save eliminated. - 108:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** return LowPower_State; - 161 .loc 1 108 0 - 162 0000 014B ldr r3, .L8 - 163 0002 1868 ldr r0, [r3] - 109:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** } - 164 .loc 1 109 0 - 165 @ sp needed - 166 0004 7047 bx lr - 167 .L9: - 168 0006 C046 .align 2 - 169 .L8: - 170 0008 00000000 .word .LANCHOR0 - 171 .cfi_endproc - 172 .LFE98: - 174 .section .text.LowPower_Handler,"ax",%progbits - 175 .align 1 - 176 .global LowPower_Handler - 177 .syntax unified - 178 .code 16 - 179 .thumb_func - 180 .fpu softvfp - 182 LowPower_Handler: - 183 .LFB99: - 110:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 111:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /** - 112:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * @brief Handle Low Power - 113:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * @param None - 114:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** * @retval None - 115:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** */ - 116:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 117:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** void LowPower_Handler( void ) - 118:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** { - 184 .loc 1 118 0 - ARM GAS /tmp/ccBl10G9.s page 10 - - - 185 .cfi_startproc - 186 @ args = 0, pretend = 0, frame = 0 - 187 @ frame_needed = 0, uses_anonymous_args = 0 - 188 0000 10B5 push {r4, lr} - 189 .LCFI0: - 190 .cfi_def_cfa_offset 8 - 191 .cfi_offset 4, -8 - 192 .cfi_offset 14, -4 - 119:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** DBG_GPIO_RST(GPIOB, GPIO_PIN_15); - 120:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 121:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** DBG_GPIO_RST(GPIOB, GPIO_PIN_14); - 122:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 123:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** if ( LowPower_State == 0 ) - 193 .loc 1 123 0 - 194 0002 074B ldr r3, .L14 - 195 0004 1B68 ldr r3, [r3] - 196 0006 002B cmp r3, #0 - 197 0008 02D0 beq .L13 - 124:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** { - 125:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 126:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** DBG_PRINTF_CRITICAL("dz\n\r"); - 127:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 128:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** HW_EnterStopMode( ); - 129:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 130:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** /* mcu dependent. to be implemented by user*/ - 131:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** HW_ExitStopMode(); - 132:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 133:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** DBG_GPIO_SET(GPIOB, GPIO_PIN_15); - 134:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 135:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** HW_RTC_setMcuWakeUpTime( ); - 136:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** } - 137:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** else - 138:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** { - 139:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** DBG_PRINTF_CRITICAL("z\n\r"); - 140:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 141:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** HW_EnterSleepMode( ); - 198 .loc 1 141 0 - 199 000a FFF7FEFF bl HW_EnterSleepMode - 200 .LVL3: - 201 .L10: - 142:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 143:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** DBG_GPIO_SET(GPIOB, GPIO_PIN_14); - 144:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** } - 145:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 146:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** } - 202 .loc 1 146 0 - 203 @ sp needed - 204 000e 10BD pop {r4, pc} - 205 .L13: - 128:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 206 .loc 1 128 0 - 207 0010 FFF7FEFF bl HW_EnterStopMode - 208 .LVL4: - 131:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** - 209 .loc 1 131 0 - 210 0014 FFF7FEFF bl HW_ExitStopMode - 211 .LVL5: - ARM GAS /tmp/ccBl10G9.s page 11 - - - 135:./Middlewares/Third_Party/Lora/Utilities/low_power.c **** } - 212 .loc 1 135 0 - 213 0018 FFF7FEFF bl HW_RTC_setMcuWakeUpTime - 214 .LVL6: - 215 001c F7E7 b .L10 - 216 .L15: - 217 001e C046 .align 2 - 218 .L14: - 219 0020 00000000 .word .LANCHOR0 - 220 .cfi_endproc - 221 .LFE99: - 223 .section .bss.LowPower_State,"aw",%nobits - 224 .align 2 - 225 .set .LANCHOR0,. + 0 - 228 LowPower_State: - 229 0000 00000000 .space 4 - 230 .text - 231 .Letext0: - 232 .file 3 "/usr/arm-none-eabi/include/machine/_default_types.h" - 233 .file 4 "/usr/arm-none-eabi/include/sys/lock.h" - 234 .file 5 "/usr/arm-none-eabi/include/sys/_types.h" - 235 .file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 236 .file 7 "/usr/arm-none-eabi/include/sys/reent.h" - 237 .file 8 "/usr/arm-none-eabi/include/math.h" - 238 .file 9 "/usr/arm-none-eabi/include/sys/_stdint.h" - 239 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 240 .file 11 "Inc/hw_msp.h" - 241 .file 12 "Inc/hw_rtc.h" - ARM GAS /tmp/ccBl10G9.s page 12 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 low_power.c - /tmp/ccBl10G9.s:16 .text.LowPower_Disable:0000000000000000 $t - /tmp/ccBl10G9.s:23 .text.LowPower_Disable:0000000000000000 LowPower_Disable - /tmp/ccBl10G9.s:78 .text.LowPower_Disable:0000000000000014 $d - /tmp/ccBl10G9.s:83 .text.LowPower_Enable:0000000000000000 $t - /tmp/ccBl10G9.s:90 .text.LowPower_Enable:0000000000000000 LowPower_Enable - /tmp/ccBl10G9.s:142 .text.LowPower_Enable:0000000000000014 $d - /tmp/ccBl10G9.s:147 .text.LowPower_GetState:0000000000000000 $t - /tmp/ccBl10G9.s:154 .text.LowPower_GetState:0000000000000000 LowPower_GetState - /tmp/ccBl10G9.s:170 .text.LowPower_GetState:0000000000000008 $d - /tmp/ccBl10G9.s:175 .text.LowPower_Handler:0000000000000000 $t - /tmp/ccBl10G9.s:182 .text.LowPower_Handler:0000000000000000 LowPower_Handler - /tmp/ccBl10G9.s:219 .text.LowPower_Handler:0000000000000020 $d - /tmp/ccBl10G9.s:224 .bss.LowPower_State:0000000000000000 $d - /tmp/ccBl10G9.s:228 .bss.LowPower_State:0000000000000000 LowPower_State - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -HW_EnterSleepMode -HW_EnterStopMode -HW_ExitStopMode -HW_RTC_setMcuWakeUpTime diff --git a/build/main.d b/build/main.d deleted file mode 100644 index 012e46e..0000000 --- a/build/main.d +++ /dev/null @@ -1,171 +0,0 @@ -build/main.d: Src/main.c Inc/hw_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h Inc/main.h \ - Inc/debug.h Inc/hw_conf.h Inc/vcom.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h Inc/hw.h \ - Inc/stm32l0xx_hw_conf.h Inc/hw.h Inc/hw_gpio.h Inc/hw_spi.h Inc/hw_rtc.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/hw_conf.h \ - Drivers/CMSIS/Include/arm_math.h Drivers/CMSIS/Include/core_cm0.h \ - Inc/hw_msp.h Middlewares/Third_Party/Lora/Utilities/low_power.h \ - Middlewares/Third_Party/Lora/Core/lora.h Inc/Commissioning.h \ - Middlewares/Third_Party/Lora/Mac/LoRaMac.h \ - Middlewares/Third_Party/Lora/Mac/region/Region.h \ - Middlewares/Third_Party/Lora/Utilities/timeServer.h \ - Middlewares/Third_Party/Lora/Utilities/utilities.h Inc/vcom.h \ - Src/voc_sensor.h Src/../Drivers/BME680/bme680.h \ - Src/../Drivers/BME680/bme680_defs.h - -Inc/hw_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: - -Inc/main.h: - -Inc/debug.h: - -Inc/hw_conf.h: - -Inc/vcom.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_ll_i2c.h: - -Inc/hw.h: - -Inc/stm32l0xx_hw_conf.h: - -Inc/hw.h: - -Inc/hw_gpio.h: - -Inc/hw_spi.h: - -Inc/hw_rtc.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/hw_conf.h: - -Drivers/CMSIS/Include/arm_math.h: - -Drivers/CMSIS/Include/core_cm0.h: - -Inc/hw_msp.h: - -Middlewares/Third_Party/Lora/Utilities/low_power.h: - -Middlewares/Third_Party/Lora/Core/lora.h: - -Inc/Commissioning.h: - -Middlewares/Third_Party/Lora/Mac/LoRaMac.h: - -Middlewares/Third_Party/Lora/Mac/region/Region.h: - -Middlewares/Third_Party/Lora/Utilities/timeServer.h: - -Middlewares/Third_Party/Lora/Utilities/utilities.h: - -Inc/vcom.h: - -Src/voc_sensor.h: - -Src/../Drivers/BME680/bme680.h: - -Src/../Drivers/BME680/bme680_defs.h: diff --git a/build/main.lst b/build/main.lst deleted file mode 100644 index 92d2a1f..0000000 --- a/build/main.lst +++ /dev/null @@ -1,571 +0,0 @@ -ARM GAS /tmp/cc3y5xFn.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "main.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.HW_GetBatteryLevel,"ax",%progbits - 16 .align 1 - 17 .global HW_GetBatteryLevel - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 HW_GetBatteryLevel: - 24 .LFB230: - 25 .file 1 "./Src/main.c" - 1:./Src/main.c **** /* - 2:./Src/main.c **** / _____) _ | | - 3:./Src/main.c **** ( (____ _____ ____ _| |_ _____ ____| |__ - 4:./Src/main.c **** \____ \| ___ | (_ _) ___ |/ ___) _ \ - 5:./Src/main.c **** _____) ) ____| | | || |_| ____( (___| | | | - 6:./Src/main.c **** (______/|_____)_|_|_| \__)_____)\____)_| |_| - 7:./Src/main.c **** (C)2013 Semtech - 8:./Src/main.c **** - 9:./Src/main.c **** Description: Generic lora driver implementation - 10:./Src/main.c **** - 11:./Src/main.c **** License: Revised BSD License, see LICENSE.TXT file include in the project - 12:./Src/main.c **** - 13:./Src/main.c **** Maintainer: Miguel Luis, Gregory Cristian and Wael Guibene - 14:./Src/main.c **** */ - 15:./Src/main.c **** /****************************************************************************** - 16:./Src/main.c **** * @file main.c - 17:./Src/main.c **** * @author MCD Application Team - 18:./Src/main.c **** * @version V1.1.2 - 19:./Src/main.c **** * @date 08-September-2017 - 20:./Src/main.c **** * @brief this is the main! - 21:./Src/main.c **** ****************************************************************************** - 22:./Src/main.c **** * @attention - 23:./Src/main.c **** * - 24:./Src/main.c **** *

© Copyright (c) 2017 STMicroelectronics International N.V. - 25:./Src/main.c **** * All rights reserved.

- 26:./Src/main.c **** * - 27:./Src/main.c **** * Redistribution and use in source and binary forms, with or without - 28:./Src/main.c **** * modification, are permitted, provided that the following conditions are met: - 29:./Src/main.c **** * - 30:./Src/main.c **** * 1. Redistribution of source code must retain the above copyright notice, - 31:./Src/main.c **** * this list of conditions and the following disclaimer. - 32:./Src/main.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 33:./Src/main.c **** * this list of conditions and the following disclaimer in the documentation - ARM GAS /tmp/cc3y5xFn.s page 2 - - - 34:./Src/main.c **** * and/or other materials provided with the distribution. - 35:./Src/main.c **** * 3. Neither the name of STMicroelectronics nor the names of other - 36:./Src/main.c **** * contributors to this software may be used to endorse or promote products - 37:./Src/main.c **** * derived from this software without specific written permission. - 38:./Src/main.c **** * 4. This software, including modifications and/or derivative works of this - 39:./Src/main.c **** * software, must execute solely and exclusively on microcontroller or - 40:./Src/main.c **** * microprocessor devices manufactured by or for STMicroelectronics. - 41:./Src/main.c **** * 5. Redistribution and use of this software other than as permitted under - 42:./Src/main.c **** * this license is void and will automatically terminate your rights under - 43:./Src/main.c **** * this license. - 44:./Src/main.c **** * - 45:./Src/main.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" - 46:./Src/main.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT - 47:./Src/main.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A - 48:./Src/main.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY - 49:./Src/main.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT - 50:./Src/main.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - 51:./Src/main.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - 52:./Src/main.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - 53:./Src/main.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - 54:./Src/main.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - 55:./Src/main.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - 56:./Src/main.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 57:./Src/main.c **** * - 58:./Src/main.c **** ****************************************************************************** - 59:./Src/main.c **** */ - 60:./Src/main.c **** - 61:./Src/main.c **** /* Includes ------------------------------------------------------------------*/ - 62:./Src/main.c **** #include - 63:./Src/main.c **** #include - 64:./Src/main.c **** #include "stm32l0xx_ll_i2c.h" - 65:./Src/main.c **** #include "hw.h" - 66:./Src/main.c **** #include "low_power.h" - 67:./Src/main.c **** #include "lora.h" - 68:./Src/main.c **** //#include "bsp.h" - 69:./Src/main.c **** #include "timeServer.h" - 70:./Src/main.c **** #include "vcom.h" - 71:./Src/main.c **** #include "voc_sensor.h" - 72:./Src/main.c **** - 73:./Src/main.c **** /* Private typedef -----------------------------------------------------------*/ - 74:./Src/main.c **** /* Private define ------------------------------------------------------------*/ - 75:./Src/main.c **** - 76:./Src/main.c **** #define LPP_APP_PORT 99 - 77:./Src/main.c **** - 78:./Src/main.c **** /*! - 79:./Src/main.c **** * Defines the application data transmission duty cycle. 5s, value in [ms]. - 80:./Src/main.c **** */ - 81:./Src/main.c **** #define APP_TX_DUTYCYCLE 10000 - 82:./Src/main.c **** /*! - 83:./Src/main.c **** * LoRaWAN Adaptive Data Rate - 84:./Src/main.c **** * @note Please note that when ADR is enabled the end-device should be static - 85:./Src/main.c **** */ - 86:./Src/main.c **** #define LORAWAN_ADR_ON 1 - 87:./Src/main.c **** /*! - 88:./Src/main.c **** * LoRaWAN confirmed messages - 89:./Src/main.c **** */ - 90:./Src/main.c **** #define LORAWAN_CONFIRMED_MSG DISABLE - ARM GAS /tmp/cc3y5xFn.s page 3 - - - 91:./Src/main.c **** /*! - 92:./Src/main.c **** * LoRaWAN application port - 93:./Src/main.c **** * @note do not use 224. It is reserved for certification - 94:./Src/main.c **** */ - 95:./Src/main.c **** #define LORAWAN_APP_PORT 42 - 96:./Src/main.c **** //2 - 97:./Src/main.c **** /*! - 98:./Src/main.c **** * Number of trials for the join request. - 99:./Src/main.c **** */ - 100:./Src/main.c **** #define JOINREQ_NBTRIALS 3 - 101:./Src/main.c **** - 102:./Src/main.c **** /* Private macro -------------------------------------------------------------*/ - 103:./Src/main.c **** /* Private function prototypes -----------------------------------------------*/ - 104:./Src/main.c **** - 105:./Src/main.c **** /* call back when LoRa will transmit a frame*/ - 106:./Src/main.c **** static void LoraTxData(lora_AppData_t *AppData, FunctionalState *IsTxConfirmed); - 107:./Src/main.c **** - 108:./Src/main.c **** /* call back when LoRa has received a frame*/ - 109:./Src/main.c **** static void LoraRxData(lora_AppData_t *AppData); - 110:./Src/main.c **** - 111:./Src/main.c **** uint8_t HW_GetBatteryLevel(void) { - 26 .loc 1 111 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 @ link register save eliminated. - 112:./Src/main.c **** return 254; - 113:./Src/main.c **** } - 31 .loc 1 113 0 - 32 0000 FE20 movs r0, #254 - 33 @ sp needed - 34 0002 7047 bx lr - 35 .cfi_endproc - 36 .LFE230: - 38 .section .text.main,"ax",%progbits - 39 .align 1 - 40 .global main - 41 .syntax unified - 42 .code 16 - 43 .thumb_func - 44 .fpu softvfp - 46 main: - 47 .LFB231: - 114:./Src/main.c **** - 115:./Src/main.c **** /* Private variables ---------------------------------------------------------*/ - 116:./Src/main.c **** /* load call backs*/ - 117:./Src/main.c **** static LoRaMainCallback_t LoRaMainCallbacks = {HW_GetBatteryLevel, - 118:./Src/main.c **** HW_GetUniqueId, - 119:./Src/main.c **** HW_GetRandomSeed, - 120:./Src/main.c **** LoraTxData, - 121:./Src/main.c **** LoraRxData}; - 122:./Src/main.c **** - 123:./Src/main.c **** - 124:./Src/main.c **** #ifdef USE_B_L072Z_LRWAN1 - 125:./Src/main.c **** /*! - 126:./Src/main.c **** * Timer to handle the application Tx Led to toggle - 127:./Src/main.c **** */ - ARM GAS /tmp/cc3y5xFn.s page 4 - - - 128:./Src/main.c **** static TimerEvent_t TxLedTimer; - 129:./Src/main.c **** static void OnTimerLedEvent( void ); - 130:./Src/main.c **** #endif - 131:./Src/main.c **** /* ! - 132:./Src/main.c **** *Initialises the Lora Parameters - 133:./Src/main.c **** */ - 134:./Src/main.c **** static LoRaParam_t LoRaParamInit = {TX_ON_TIMER, - 135:./Src/main.c **** APP_TX_DUTYCYCLE, - 136:./Src/main.c **** CLASS_A, - 137:./Src/main.c **** LORAWAN_ADR_ON, - 138:./Src/main.c **** DR_0, - 139:./Src/main.c **** LORAWAN_PUBLIC_NETWORK, - 140:./Src/main.c **** JOINREQ_NBTRIALS}; - 141:./Src/main.c **** - 142:./Src/main.c **** /* Private functions ---------------------------------------------------------*/ - 143:./Src/main.c **** - 144:./Src/main.c **** #if 0 - 145:./Src/main.c **** typedef enum { - 146:./Src/main.c **** i2cSpeed_std, - 147:./Src/main.c **** i2cSpeed_fast, - 148:./Src/main.c **** i2cSpeed_fastPlus, - 149:./Src/main.c **** i2cSpeed_count, - 150:./Src/main.c **** } i2cSpeed_t; - 151:./Src/main.c **** - 152:./Src/main.c **** void i2cInit(I2C_TypeDef *i2c, i2cSpeed_t spd); - 153:./Src/main.c **** - 154:./Src/main.c **** #define I2C_7BIT_ADDR (0 << 31) - 155:./Src/main.c **** #define I2C_10BIT_ADDR (1 << 31) - 156:./Src/main.c **** - 157:./Src/main.c **** // Returns number of bytes written - 158:./Src/main.c **** uint32_t i2cWrite(I2C_TypeDef *i2c, uint32_t addr, uint8_t *txBuffer, - 159:./Src/main.c **** uint32_t len); - 160:./Src/main.c **** - 161:./Src/main.c **** // Returns number of bytes read - 162:./Src/main.c **** uint32_t i2cRead(I2C_TypeDef *i2c, uint8_t addr, uint8_t *rxBuffer, - 163:./Src/main.c **** uint32_t numBytes); - 164:./Src/main.c **** - 165:./Src/main.c **** #define I2C_READ 0 - 166:./Src/main.c **** #define I2C_WRITE 1 - 167:./Src/main.c **** - 168:./Src/main.c **** static uint32_t setupTiming(i2cSpeed_t spd, uint32_t clockFreq) { - 169:./Src/main.c **** (void) spd; - 170:./Src/main.c **** (void) clockFreq; - 171:./Src/main.c **** uint32_t presc = 0; - 172:./Src/main.c **** uint32_t sdadel = 2; - 173:./Src/main.c **** uint32_t scldel = 2; - 174:./Src/main.c **** uint32_t scll = 6; - 175:./Src/main.c **** uint32_t sclh = 7; - 176:./Src/main.c **** - 177:./Src/main.c **** return presc << 28 | - 178:./Src/main.c **** scldel << 20 | - 179:./Src/main.c **** sdadel << 16 | - 180:./Src/main.c **** sclh << 8 | - 181:./Src/main.c **** scll; - 182:./Src/main.c **** } - 183:./Src/main.c **** - 184:./Src/main.c **** void i2cInit(I2C_TypeDef *i2c, i2cSpeed_t spd) { - ARM GAS /tmp/cc3y5xFn.s page 5 - - - 185:./Src/main.c **** // Setup timing register - 186:./Src/main.c **** i2c->TIMINGR = setupTiming(spd, SystemCoreClock); - 187:./Src/main.c **** - 188:./Src/main.c **** // Reset state - 189:./Src/main.c **** i2c->CR1 &= ~I2C_CR1_PE; - 190:./Src/main.c **** } - 191:./Src/main.c **** - 192:./Src/main.c **** static uint32_t i2cSetup(uint32_t addr, uint8_t direction) { - 193:./Src/main.c **** uint32_t ret = 0; - 194:./Src/main.c **** if (addr & I2C_10BIT_ADDR) { - 195:./Src/main.c **** ret = (addr & 0x000003FF) | I2C_CR2_ADD10; - 196:./Src/main.c **** } else { - 197:./Src/main.c **** // 7 Bit Address - 198:./Src/main.c **** ret = (addr & 0x0000007F) << 1; - 199:./Src/main.c **** } - 200:./Src/main.c **** - 201:./Src/main.c **** if (direction == I2C_READ) { - 202:./Src/main.c **** ret |= I2C_CR2_RD_WRN; - 203:./Src/main.c **** if (addr & I2C_10BIT_ADDR) { - 204:./Src/main.c **** ret |= I2C_CR2_HEAD10R; - 205:./Src/main.c **** } - 206:./Src/main.c **** } - 207:./Src/main.c **** - 208:./Src/main.c **** return ret; - 209:./Src/main.c **** } - 210:./Src/main.c **** - 211:./Src/main.c **** // Will return the number of data bytes written to the device - 212:./Src/main.c **** uint32_t i2cWrite(I2C_TypeDef *i2c, uint32_t addr, uint8_t *txBuffer, - 213:./Src/main.c **** uint32_t len) { - 214:./Src/main.c **** - 215:./Src/main.c **** uint32_t numTxBytes = 0; - 216:./Src/main.c **** - 217:./Src/main.c **** i2c->CR1 &= ~I2C_CR1_PE; - 218:./Src/main.c **** i2c->CR2 = 0; - 219:./Src/main.c **** - 220:./Src/main.c **** i2c->CR2 = i2cSetup(addr, I2C_WRITE); - 221:./Src/main.c **** - 222:./Src/main.c **** if (len > 0xFF) { - 223:./Src/main.c **** i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD; - 224:./Src/main.c **** } else { - 225:./Src/main.c **** i2c->CR2 |= ((len & 0xFF) << 16) | I2C_CR2_AUTOEND; - 226:./Src/main.c **** } - 227:./Src/main.c **** i2c->CR1 |= I2C_CR1_PE; - 228:./Src/main.c **** i2c->CR2 |= I2C_CR2_START; - 229:./Src/main.c **** while(i2c->CR2 & I2C_CR2_START); - 230:./Src/main.c **** uint8_t done = 0; - 231:./Src/main.c **** uint32_t i = 0; - 232:./Src/main.c **** while (!done && i < 0x0000001F) { - 233:./Src/main.c **** i++; - 234:./Src/main.c **** if (i2c->ISR & I2C_ISR_NACKF) { - 235:./Src/main.c **** // Was not acknowledged, disable device and exit - 236:./Src/main.c **** done = 1; - 237:./Src/main.c **** } - 238:./Src/main.c **** - 239:./Src/main.c **** if (i2c->ISR & I2C_ISR_TXIS) { - 240:./Src/main.c **** // Device acknowledged and we must send the next byte - 241:./Src/main.c **** if (numTxBytes < len){ - ARM GAS /tmp/cc3y5xFn.s page 6 - - - 242:./Src/main.c **** i2c->TXDR = txBuffer[numTxBytes++]; - 243:./Src/main.c **** } - 244:./Src/main.c **** - 245:./Src/main.c **** i = 0; - 246:./Src/main.c **** - 247:./Src/main.c **** } - 248:./Src/main.c **** - 249:./Src/main.c **** if (i2c->ISR & I2C_ISR_TC) { - 250:./Src/main.c **** done = 1; - 251:./Src/main.c **** } - 252:./Src/main.c **** - 253:./Src/main.c **** if (i2c->ISR & I2C_ISR_TCR) { - 254:./Src/main.c **** i = 0; - 255:./Src/main.c **** if ((len - numTxBytes) > 0xFF) { - 256:./Src/main.c **** i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD; - 257:./Src/main.c **** } else { - 258:./Src/main.c **** i2c->CR2 &= ~(0x00FF0000 | I2C_CR2_RELOAD); - 259:./Src/main.c **** i2c->CR2 |= ((len - numTxBytes) & 0xFF) << 16 | - 260:./Src/main.c **** I2C_CR2_AUTOEND; - 261:./Src/main.c **** } - 262:./Src/main.c **** } - 263:./Src/main.c **** - 264:./Src/main.c **** } - 265:./Src/main.c **** i2c->CR1 &= ~I2C_CR1_PE; - 266:./Src/main.c **** return numTxBytes; - 267:./Src/main.c **** } - 268:./Src/main.c **** - 269:./Src/main.c **** uint32_t i2cRead(I2C_TypeDef *i2c, uint8_t addr, uint8_t *rxBuffer, - 270:./Src/main.c **** uint32_t numBytes) { - 271:./Src/main.c **** - 272:./Src/main.c **** uint32_t numRxBytes = 0; - 273:./Src/main.c **** - 274:./Src/main.c **** i2c->CR1 &= ~I2C_CR1_PE; - 275:./Src/main.c **** i2c->CR2 = 0; - 276:./Src/main.c **** - 277:./Src/main.c **** i2c->CR2 = i2cSetup(addr, I2C_READ); - 278:./Src/main.c **** - 279:./Src/main.c **** if (numBytes > 0xFF) { - 280:./Src/main.c **** i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD; - 281:./Src/main.c **** } else { - 282:./Src/main.c **** i2c->CR2 |= ((numBytes & 0xFF) << 16) | I2C_CR2_AUTOEND; - 283:./Src/main.c **** } - 284:./Src/main.c **** i2c->CR1 |= I2C_CR1_PE; - 285:./Src/main.c **** i2c->CR2 |= I2C_CR2_START; - 286:./Src/main.c **** - 287:./Src/main.c **** while(i2c->CR2 & I2C_CR2_START); - 288:./Src/main.c **** uint8_t done = 0; - 289:./Src/main.c **** uint32_t i = 0; - 290:./Src/main.c **** while (!done && i < 0x0000001F) { - 291:./Src/main.c **** i++; - 292:./Src/main.c **** - 293:./Src/main.c **** if (i2c->ISR & I2C_ISR_RXNE) { - 294:./Src/main.c **** // Device acknowledged and we must send the next byte - 295:./Src/main.c **** if (numRxBytes < numBytes){ - 296:./Src/main.c **** rxBuffer[numRxBytes++] = i2c->RXDR; - 297:./Src/main.c **** } - 298:./Src/main.c **** - ARM GAS /tmp/cc3y5xFn.s page 7 - - - 299:./Src/main.c **** i = 0; - 300:./Src/main.c **** } - 301:./Src/main.c **** - 302:./Src/main.c **** if (i2c->ISR & I2C_ISR_TC) { - 303:./Src/main.c **** done = 1; - 304:./Src/main.c **** } - 305:./Src/main.c **** - 306:./Src/main.c **** if (i2c->ISR & I2C_ISR_TCR) { - 307:./Src/main.c **** i = 0; - 308:./Src/main.c **** if ((numBytes - numRxBytes) > 0xFF) { - 309:./Src/main.c **** i2c->CR2 |= 0x00FF0000 | I2C_CR2_RELOAD; - 310:./Src/main.c **** } else { - 311:./Src/main.c **** i2c->CR2 &= ~(0x00FF0000 | I2C_CR2_RELOAD); - 312:./Src/main.c **** i2c->CR2 |= ((numBytes - numRxBytes) & 0xFF) << 16 | - 313:./Src/main.c **** I2C_CR2_AUTOEND; - 314:./Src/main.c **** } - 315:./Src/main.c **** } - 316:./Src/main.c **** - 317:./Src/main.c **** } - 318:./Src/main.c **** i2c->CR1 &= ~I2C_CR1_PE; - 319:./Src/main.c **** return numRxBytes; - 320:./Src/main.c **** } - 321:./Src/main.c **** #endif - 322:./Src/main.c **** - 323:./Src/main.c **** - 324:./Src/main.c **** /** - 325:./Src/main.c **** * @brief Main program - 326:./Src/main.c **** * @param None - 327:./Src/main.c **** * @retval None - 328:./Src/main.c **** */ - 329:./Src/main.c **** int main(void) - 330:./Src/main.c **** { - 48 .loc 1 330 0 - 49 .cfi_startproc - 50 @ Volatile: function does not return. - 51 @ args = 0, pretend = 0, frame = 32 - 52 @ frame_needed = 0, uses_anonymous_args = 0 - 53 0000 10B5 push {r4, lr} - 54 .LCFI0: - 55 .cfi_def_cfa_offset 8 - 56 .cfi_offset 4, -8 - 57 .cfi_offset 14, -4 - 58 0002 88B0 sub sp, sp, #32 - 59 .LCFI1: - 60 .cfi_def_cfa_offset 40 - 331:./Src/main.c **** /* STM32 HAL library initialization*/ - 332:./Src/main.c **** HAL_Init(); - 61 .loc 1 332 0 - 62 0004 FFF7FEFF bl HAL_Init - 63 .LVL0: - 333:./Src/main.c **** - 334:./Src/main.c **** /* Configure the system clock*/ - 335:./Src/main.c **** SystemClock_Config(); - 64 .loc 1 335 0 - 65 0008 FFF7FEFF bl SystemClock_Config - 66 .LVL1: - 336:./Src/main.c **** - ARM GAS /tmp/cc3y5xFn.s page 8 - - - 337:./Src/main.c **** /* Configure the debug mode*/ - 338:./Src/main.c **** DBG_Init(); - 67 .loc 1 338 0 - 68 000c FFF7FEFF bl DBG_Init - 69 .LVL2: - 70 .LBB2: - 339:./Src/main.c **** - 340:./Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); - 71 .loc 1 340 0 - 72 0010 154B ldr r3, .L4 - 73 0012 DA6A ldr r2, [r3, #44] - 74 0014 0124 movs r4, #1 - 75 0016 2243 orrs r2, r4 - 76 0018 DA62 str r2, [r3, #44] - 77 001a DA6A ldr r2, [r3, #44] - 78 001c 2240 ands r2, r4 - 79 001e 0192 str r2, [sp, #4] - 80 0020 019A ldr r2, [sp, #4] - 81 .LBE2: - 82 .LBB3: - 341:./Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); - 83 .loc 1 341 0 - 84 0022 D96A ldr r1, [r3, #44] - 85 0024 0422 movs r2, #4 - 86 0026 1143 orrs r1, r2 - 87 0028 D962 str r1, [r3, #44] - 88 002a DB6A ldr r3, [r3, #44] - 89 002c 1A40 ands r2, r3 - 90 002e 0292 str r2, [sp, #8] - 91 0030 029B ldr r3, [sp, #8] - 92 .LBE3: - 342:./Src/main.c **** - 343:./Src/main.c **** /* Configure the hardware*/ - 344:./Src/main.c **** HW_Init(); - 93 .loc 1 344 0 - 94 0032 FFF7FEFF bl HW_Init - 95 .LVL3: - 345:./Src/main.c **** MX_I2C1_Init(); - 96 .loc 1 345 0 - 97 0036 FFF7FEFF bl MX_I2C1_Init - 98 .LVL4: - 346:./Src/main.c **** - 347:./Src/main.c **** // BLINKY - 348:./Src/main.c **** GPIO_InitTypeDef initStruct = { 0 }; - 99 .loc 1 348 0 - 100 003a 1422 movs r2, #20 - 101 003c 0021 movs r1, #0 - 102 003e 03A8 add r0, sp, #12 - 103 0040 FFF7FEFF bl memset - 104 .LVL5: - 349:./Src/main.c **** initStruct.Mode =GPIO_MODE_OUTPUT_PP; - 105 .loc 1 349 0 - 106 0044 0494 str r4, [sp, #16] - 350:./Src/main.c **** initStruct.Pull = GPIO_NOPULL; - 351:./Src/main.c **** initStruct.Speed = GPIO_SPEED_HIGH; - 107 .loc 1 351 0 - 108 0046 0323 movs r3, #3 - ARM GAS /tmp/cc3y5xFn.s page 9 - - - 109 0048 0693 str r3, [sp, #24] - 352:./Src/main.c **** HW_GPIO_Init(GPIOC, GPIO_PIN_7, &initStruct); - 110 .loc 1 352 0 - 111 004a 03AA add r2, sp, #12 - 112 004c 8021 movs r1, #128 - 113 004e 0748 ldr r0, .L4+4 - 114 0050 FFF7FEFF bl HW_GPIO_Init - 115 .LVL6: - 353:./Src/main.c **** - 354:./Src/main.c **** /* USER CODE BEGIN 1 */ - 355:./Src/main.c **** /* USER CODE END 1 */ - 356:./Src/main.c **** voc_init(); - 116 .loc 1 356 0 - 117 0054 FFF7FEFF bl voc_init - 118 .LVL7: - 119 .L3: - 357:./Src/main.c **** - 358:./Src/main.c **** while(1) { - 359:./Src/main.c **** GPIOC->ODR ^= 1<<7; - 120 .loc 1 359 0 discriminator 1 - 121 0058 044A ldr r2, .L4+4 - 122 005a 5369 ldr r3, [r2, #20] - 123 005c 8021 movs r1, #128 - 124 005e 4B40 eors r3, r1 - 125 0060 5361 str r3, [r2, #20] - 360:./Src/main.c **** voc_measure(); - 126 .loc 1 360 0 discriminator 1 - 127 0062 FFF7FEFF bl voc_measure - 128 .LVL8: - 129 0066 F7E7 b .L3 - 130 .L5: - 131 .align 2 - 132 .L4: - 133 0068 00100240 .word 1073876992 - 134 006c 00080050 .word 1342179328 - 135 .cfi_endproc - 136 .LFE231: - 138 .text - 139 .Letext0: - 140 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 141 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 142 .file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 143 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 144 .file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" - 145 .file 7 "/usr/arm-none-eabi/include/sys/lock.h" - 146 .file 8 "/usr/arm-none-eabi/include/sys/_types.h" - 147 .file 9 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 148 .file 10 "/usr/arm-none-eabi/include/sys/reent.h" - 149 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 150 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h" - 151 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h" - 152 .file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h" - 153 .file 15 "Inc/hw_i2c.h" - 154 .file 16 "/usr/arm-none-eabi/include/math.h" - 155 .file 17 "Middlewares/Third_Party/Lora/Mac/LoRaMac.h" - 156 .file 18 "Middlewares/Third_Party/Lora/Core/lora.h" - 157 .file 19 "./Src/../Drivers/BME680/bme680_defs.h" - ARM GAS /tmp/cc3y5xFn.s page 10 - - - 158 .file 20 "./Src/voc_sensor.h" - 159 .file 21 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h" - 160 .file 22 "Inc/hw_msp.h" - 161 .file 23 "Inc/debug.h" - 162 .file 24 "Inc/hw_gpio.h" - 163 .file 25 "" - ARM GAS /tmp/cc3y5xFn.s page 11 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 main.c - /tmp/cc3y5xFn.s:16 .text.HW_GetBatteryLevel:0000000000000000 $t - /tmp/cc3y5xFn.s:23 .text.HW_GetBatteryLevel:0000000000000000 HW_GetBatteryLevel - /tmp/cc3y5xFn.s:39 .text.main:0000000000000000 $t - /tmp/cc3y5xFn.s:46 .text.main:0000000000000000 main - /tmp/cc3y5xFn.s:133 .text.main:0000000000000068 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -HAL_Init -SystemClock_Config -DBG_Init -HW_Init -MX_I2C1_Init -memset -HW_GPIO_Init -voc_init -voc_measure diff --git a/build/startup_stm32l073xx.d b/build/startup_stm32l073xx.d deleted file mode 100644 index 188269a..0000000 --- a/build/startup_stm32l073xx.d +++ /dev/null @@ -1 +0,0 @@ -build/startup_stm32l073xx.d: startup/startup_stm32l073xx.s diff --git a/build/stm32l0xx_hal.d b/build/stm32l0xx_hal.d deleted file mode 100644 index 32601d8..0000000 --- a/build/stm32l0xx_hal.d +++ /dev/null @@ -1,102 +0,0 @@ -build/stm32l0xx_hal.d: Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal.lst b/build/stm32l0xx_hal.lst deleted file mode 100644 index 7c39082..0000000 --- a/build/stm32l0xx_hal.lst +++ /dev/null @@ -1,1522 +0,0 @@ -ARM GAS /tmp/ccYJZGyl.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.HAL_MspInit,"ax",%progbits - 16 .align 1 - 17 .weak HAL_MspInit - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 HAL_MspInit: - 24 .LFB41: - 25 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @file stm32l0xx_hal.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief HAL module driver. - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * This is the common part of the HAL initialization - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** @verbatim - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** ============================================================================== - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** ##### How to use this driver ##### - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** ============================================================================== - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** [..] - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** The common HAL driver contains a set of generic and common APIs that can be - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** used by the PPP peripheral drivers and the user to start using the HAL. - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** [..] - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** The HAL contains two APIs categories: - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Common HAL APIs - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Services HAL APIs - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** @endverbatim - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** ****************************************************************************** - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @attention - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * Redistribution and use in source and binary forms, with or without modification, - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * are permitted provided that the following conditions are met: - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * 1. Redistributions of source code must retain the above copyright notice, - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * this list of conditions and the following disclaimer. - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * this list of conditions and the following disclaimer in the documentation - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * and/or other materials provided with the distribution. - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - ARM GAS /tmp/ccYJZGyl.s page 2 - - - 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * may be used to endorse or promote products derived from this software - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * without specific prior written permission. - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** ****************************************************************************** - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Includes ------------------------------------------------------------------*/ - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #include "stm32l0xx_hal.h" - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** @addtogroup STM32L0xx_HAL_Driver - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @{ - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #ifdef HAL_MODULE_ENABLED - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** @addtogroup HAL - 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief HAL module driver. - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @{ - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** @addtogroup HAL_Exported_Constants - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @{ - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** @defgroup SysTick System Tick - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @{ - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief uwTick_variable uwTick variable - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __IO uint32_t uwTick; - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @} - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** @defgroup HAL_Version HAL Version - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @{ - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief STM32L0xx HAL Driver version number - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #define __STM32L0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #define __STM32L0xx_HAL_VERSION_SUB1 (0x08U) /*!< [23:16] sub1 version */ - ARM GAS /tmp/ccYJZGyl.s page 3 - - - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #define __STM32L0xx_HAL_VERSION_SUB2 (0x02U) /*!< [15:8] sub2 version */ - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #define __STM32L0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #define __STM32L0xx_HAL_VERSION ((__STM32L0xx_HAL_VERSION_MAIN << 24U)\ - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** |(__STM32L0xx_HAL_VERSION_SUB1 << 16U)\ - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** |(__STM32L0xx_HAL_VERSION_SUB2 << 8U )\ - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** |(__STM32L0xx_HAL_VERSION_RC)) - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #define IDCODE_DEVID_MASK ((uint32_t)0x00000FFFU) - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @} - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @} - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** @defgroup HAL_Private HAL Private - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @{ - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @} - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** @addtogroup HAL_Exported_Functions HAL Exported Functions - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @{ - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** @addtogroup HAL_Exported_Functions_Group1 - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Initialization and de-initialization functions - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** @verbatim - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** =============================================================================== - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** ##### Initialization and de-initialization functions ##### - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** =============================================================================== - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** [..] This section provides functions allowing to: - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Initializes the Flash interface, the NVIC allocation and initial clock - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** configuration. It initializes the source of time base also when timeout - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** is needed and the backup domain when enabled. - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) de-Initializes common part of the HAL. - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Configure The time base source to have 1ms time base with a dedicated - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** Tick interrupt priority. - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (++) Systick timer is used by default as source of time base, but user - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** can eventually implement his proper time base source (a general purpose - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** timer for example or other time source), keeping in mind that Time base - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** handled in milliseconds basis. - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (++) Time base configuration function (HAL_InitTick ()) is called automatically - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** at the beginning of the program after reset by HAL_Init() or at any time - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** when clock is configured, by HAL_RCC_ClockConfig(). - 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (++) Source of time base is configured to generate interrupts at regular - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** time intervals. Care must be taken if HAL_Delay() is called from a - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** peripheral ISR process, the Tick interrupt line must have higher priority - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (numerically lower) than the peripheral interrupt. Otherwise the caller - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** ISR process will be blocked. - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (++) functions affecting time base configurations are declared as __weak - ARM GAS /tmp/ccYJZGyl.s page 4 - - - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** to make override possible in case of other implementations in user file. - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** @endverbatim - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @{ - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief This function configures the Flash prefetch, Flash preread and Buffer cache, - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * Configures time base source, NVIC and Low level hardware - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note This function is called at the beginning of program after reset and before - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * the clock configuration - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note The time base configuration is based on MSI clock when exiting from Reset. - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * Once done, time base tick start incrementing. - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * In the default implementation,Systick is used as source of time base. - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * the tick variable is incremented each 1ms in its ISR. - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval HAL status - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** HAL_StatusTypeDef HAL_Init(void) - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Configure Buffer cache, Flash prefetch, Flash preread */ - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #if (BUFFER_CACHE_DISABLE != 0) - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_FLASH_BUFFER_CACHE_DISABLE(); - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #endif /* BUFFER_CACHE_DISABLE */ - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #if (PREREAD_ENABLE != 0) - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_FLASH_PREREAD_BUFFER_ENABLE(); - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #endif /* PREREAD_ENABLE */ - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #if (PREFETCH_ENABLE != 0) - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #endif /* PREFETCH_ENABLE */ - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */ - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** HAL_InitTick(TICK_INT_PRIORITY); - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Init the low level hardware */ - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** HAL_MspInit(); - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Return function status */ - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** return HAL_OK; - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief This function de-Initializes common part of the HAL and stops the source - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * of time base. - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note This function is optional. - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval HAL status - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** HAL_StatusTypeDef HAL_DeInit(void) - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Reset of all peripherals */ - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_APB1_FORCE_RESET(); - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_APB2_FORCE_RESET(); - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); - ARM GAS /tmp/ccYJZGyl.s page 5 - - - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_AHB_FORCE_RESET(); - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_IOP_FORCE_RESET(); - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_IOP_RELEASE_RESET(); - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* De-Init the low level hardware */ - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** HAL_MspDeInit(); - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Return function status */ - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** return HAL_OK; - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Initializes the MSP. - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __weak void HAL_MspInit(void) - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 26 .loc 1 224 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 @ link register save eliminated. - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* NOTE : This function Should not be modified, when the callback is needed, - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** the HAL_MspInit could be implemented in the user file - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 31 .loc 1 228 0 - 32 @ sp needed - 33 0000 7047 bx lr - 34 .cfi_endproc - 35 .LFE41: - 37 .section .text.HAL_MspDeInit,"ax",%progbits - 38 .align 1 - 39 .weak HAL_MspDeInit - 40 .syntax unified - 41 .code 16 - 42 .thumb_func - 43 .fpu softvfp - 45 HAL_MspDeInit: - 46 .LFB42: - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief DeInitializes the MSP. - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __weak void HAL_MspDeInit(void) - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 47 .loc 1 235 0 - 48 .cfi_startproc - 49 @ args = 0, pretend = 0, frame = 0 - 50 @ frame_needed = 0, uses_anonymous_args = 0 - 51 @ link register save eliminated. - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* NOTE : This function Should not be modified, when the callback is needed, - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** the HAL_MspDeInit could be implemented in the user file - ARM GAS /tmp/ccYJZGyl.s page 6 - - - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 52 .loc 1 239 0 - 53 @ sp needed - 54 0000 7047 bx lr - 55 .cfi_endproc - 56 .LFE42: - 58 .section .text.HAL_DeInit,"ax",%progbits - 59 .align 1 - 60 .global HAL_DeInit - 61 .syntax unified - 62 .code 16 - 63 .thumb_func - 64 .fpu softvfp - 66 HAL_DeInit: - 67 .LFB40: - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Reset of all peripherals */ - 68 .loc 1 198 0 - 69 .cfi_startproc - 70 @ args = 0, pretend = 0, frame = 0 - 71 @ frame_needed = 0, uses_anonymous_args = 0 - 72 0000 10B5 push {r4, lr} - 73 .LCFI0: - 74 .cfi_def_cfa_offset 8 - 75 .cfi_offset 4, -8 - 76 .cfi_offset 14, -4 - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); - 77 .loc 1 200 0 - 78 0002 084B ldr r3, .L4 - 79 0004 0121 movs r1, #1 - 80 0006 4942 rsbs r1, r1, #0 - 81 0008 9962 str r1, [r3, #40] - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 82 .loc 1 201 0 - 83 000a 0022 movs r2, #0 - 84 000c 9A62 str r2, [r3, #40] - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); - 85 .loc 1 203 0 - 86 000e 5962 str r1, [r3, #36] - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 87 .loc 1 204 0 - 88 0010 5A62 str r2, [r3, #36] - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); - 89 .loc 1 206 0 - 90 0012 1962 str r1, [r3, #32] - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 91 .loc 1 207 0 - 92 0014 1A62 str r2, [r3, #32] - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __HAL_RCC_IOP_RELEASE_RESET(); - 93 .loc 1 209 0 - 94 0016 D961 str r1, [r3, #28] - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 95 .loc 1 210 0 - 96 0018 DA61 str r2, [r3, #28] - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 97 .loc 1 213 0 - 98 001a FFF7FEFF bl HAL_MspDeInit - ARM GAS /tmp/ccYJZGyl.s page 7 - - - 99 .LVL0: - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 100 .loc 1 217 0 - 101 001e 0020 movs r0, #0 - 102 @ sp needed - 103 0020 10BD pop {r4, pc} - 104 .L5: - 105 0022 C046 .align 2 - 106 .L4: - 107 0024 00100240 .word 1073876992 - 108 .cfi_endproc - 109 .LFE40: - 111 .global __aeabi_uidiv - 112 .section .text.HAL_InitTick,"ax",%progbits - 113 .align 1 - 114 .weak HAL_InitTick - 115 .syntax unified - 116 .code 16 - 117 .thumb_func - 118 .fpu softvfp - 120 HAL_InitTick: - 121 .LFB43: - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief This function configures the source of the time base. - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * The time source is configured to have 1ms time base with a dedicated - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * Tick interrupt priority. - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note This function is called automatically at the beginning of program after - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig(). - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note In the default implementation, SysTick timer is the source of time base. - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * It is used to generate interrupts at regular time intervals. - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * Care must be taken if HAL_Delay() is called from a peripheral ISR process, - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * The the SysTick interrupt must have higher priority (numerically lower) - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * than the peripheral interrupt. Otherwise the caller ISR process will be blocked. - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * The function is declared as __Weak to be overwritten in case of other - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * implementation in user file. - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @param TickPriority: Tick interrupt priority. - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval HAL status - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 122 .loc 1 259 0 - 123 .cfi_startproc - 124 @ args = 0, pretend = 0, frame = 0 - 125 @ frame_needed = 0, uses_anonymous_args = 0 - 126 .LVL1: - 127 0000 10B5 push {r4, lr} - 128 .LCFI1: - 129 .cfi_def_cfa_offset 8 - 130 .cfi_offset 4, -8 - 131 .cfi_offset 14, -4 - 132 0002 0400 movs r4, r0 - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /*Configure the SysTick to have interrupt in 1ms time basis*/ - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** HAL_SYSTICK_Config(SystemCoreClock/1000U); - 133 .loc 1 261 0 - 134 0004 074B ldr r3, .L7 - ARM GAS /tmp/ccYJZGyl.s page 8 - - - 135 0006 1868 ldr r0, [r3] - 136 .LVL2: - 137 0008 FA21 movs r1, #250 - 138 000a 8900 lsls r1, r1, #2 - 139 000c FFF7FEFF bl __aeabi_uidiv - 140 .LVL3: - 141 0010 FFF7FEFF bl HAL_SYSTICK_Config - 142 .LVL4: - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /*Configure the SysTick IRQ priority */ - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority ,0U); - 143 .loc 1 264 0 - 144 0014 0120 movs r0, #1 - 145 0016 0022 movs r2, #0 - 146 0018 2100 movs r1, r4 - 147 001a 4042 rsbs r0, r0, #0 - 148 001c FFF7FEFF bl HAL_NVIC_SetPriority - 149 .LVL5: - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Return function status */ - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** return HAL_OK; - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 150 .loc 1 268 0 - 151 0020 0020 movs r0, #0 - 152 @ sp needed - 153 .LVL6: - 154 0022 10BD pop {r4, pc} - 155 .L8: - 156 .align 2 - 157 .L7: - 158 0024 00000000 .word SystemCoreClock - 159 .cfi_endproc - 160 .LFE43: - 162 .section .text.HAL_Init,"ax",%progbits - 163 .align 1 - 164 .global HAL_Init - 165 .syntax unified - 166 .code 16 - 167 .thumb_func - 168 .fpu softvfp - 170 HAL_Init: - 171 .LFB39: - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Configure Buffer cache, Flash prefetch, Flash preread */ - 172 .loc 1 166 0 - 173 .cfi_startproc - 174 @ args = 0, pretend = 0, frame = 0 - 175 @ frame_needed = 0, uses_anonymous_args = 0 - 176 0000 10B5 push {r4, lr} - 177 .LCFI2: - 178 .cfi_def_cfa_offset 8 - 179 .cfi_offset 4, -8 - 180 .cfi_offset 14, -4 - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** #endif /* PREFETCH_ENABLE */ - 181 .loc 1 177 0 - 182 0002 064A ldr r2, .L10 - 183 0004 1368 ldr r3, [r2] - 184 0006 0221 movs r1, #2 - ARM GAS /tmp/ccYJZGyl.s page 9 - - - 185 0008 0B43 orrs r3, r1 - 186 000a 1360 str r3, [r2] - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 187 .loc 1 182 0 - 188 000c 0320 movs r0, #3 - 189 000e FFF7FEFF bl HAL_InitTick - 190 .LVL7: - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 191 .loc 1 185 0 - 192 0012 FFF7FEFF bl HAL_MspInit - 193 .LVL8: - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 194 .loc 1 189 0 - 195 0016 0020 movs r0, #0 - 196 @ sp needed - 197 0018 10BD pop {r4, pc} - 198 .L11: - 199 001a C046 .align 2 - 200 .L10: - 201 001c 00200240 .word 1073881088 - 202 .cfi_endproc - 203 .LFE39: - 205 .section .text.HAL_IncTick,"ax",%progbits - 206 .align 1 - 207 .weak HAL_IncTick - 208 .syntax unified - 209 .code 16 - 210 .thumb_func - 211 .fpu softvfp - 213 HAL_IncTick: - 214 .LFB44: - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @} - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** @addtogroup HAL_Exported_Functions_Group2 - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Peripheral Control functions - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** @verbatim - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** =============================================================================== - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** ##### HAL Control functions ##### - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** =============================================================================== - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** [..] This section provides functions allowing to: - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Provide a tick value in millisecond - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Provide a blocking delay in millisecond - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Suspend the time base source interrupt - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Resume the time base source interrupt - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Get the HAL API driver version - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Get the device identifier - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Get the device revision identifier - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Configure low power mode behavior when the MCU is in Debug mode - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** (+) Manage the VEREFINT feature (activation, lock, output selection) - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** @endverbatim - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @{ - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - ARM GAS /tmp/ccYJZGyl.s page 10 - - - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief This function is called to increment a global variable "uwTick" - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * used as application time base. - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note In the default implementation, this variable is incremented each 1ms - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * in Systick ISR. - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * implementations in user file. - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __weak void HAL_IncTick(void) - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 215 .loc 1 306 0 - 216 .cfi_startproc - 217 @ args = 0, pretend = 0, frame = 0 - 218 @ frame_needed = 0, uses_anonymous_args = 0 - 219 @ link register save eliminated. - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** uwTick++; - 220 .loc 1 307 0 - 221 0000 024A ldr r2, .L13 - 222 0002 1368 ldr r3, [r2] - 223 0004 0133 adds r3, r3, #1 - 224 0006 1360 str r3, [r2] - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 225 .loc 1 308 0 - 226 @ sp needed - 227 0008 7047 bx lr - 228 .L14: - 229 000a C046 .align 2 - 230 .L13: - 231 000c 00000000 .word .LANCHOR0 - 232 .cfi_endproc - 233 .LFE44: - 235 .section .text.HAL_GetTick,"ax",%progbits - 236 .align 1 - 237 .weak HAL_GetTick - 238 .syntax unified - 239 .code 16 - 240 .thumb_func - 241 .fpu softvfp - 243 HAL_GetTick: - 244 .LFB45: - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Provides a tick value in millisecond. - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * implementations in user file. - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval tick value - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __weak uint32_t HAL_GetTick(void) - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 245 .loc 1 317 0 - 246 .cfi_startproc - 247 @ args = 0, pretend = 0, frame = 0 - 248 @ frame_needed = 0, uses_anonymous_args = 0 - 249 @ link register save eliminated. - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** return uwTick; - ARM GAS /tmp/ccYJZGyl.s page 11 - - - 250 .loc 1 318 0 - 251 0000 014B ldr r3, .L16 - 252 0002 1868 ldr r0, [r3] - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 253 .loc 1 319 0 - 254 @ sp needed - 255 0004 7047 bx lr - 256 .L17: - 257 0006 C046 .align 2 - 258 .L16: - 259 0008 00000000 .word .LANCHOR0 - 260 .cfi_endproc - 261 .LFE45: - 263 .section .text.HAL_Delay,"ax",%progbits - 264 .align 1 - 265 .weak HAL_Delay - 266 .syntax unified - 267 .code 16 - 268 .thumb_func - 269 .fpu softvfp - 271 HAL_Delay: - 272 .LFB46: - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief This function provides accurate delay (in ms) based on a variable incremented. - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * It is used to generate interrupts at regular time intervals where uwTick - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * is incremented. - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note ThiS function is declared as __weak to be overwritten in case of other - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * implementations in user file. - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @param Delay: specifies the delay time length, in milliseconds. - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __weak void HAL_Delay(__IO uint32_t Delay) - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 273 .loc 1 332 0 - 274 .cfi_startproc - 275 @ args = 0, pretend = 0, frame = 8 - 276 @ frame_needed = 0, uses_anonymous_args = 0 - 277 .LVL9: - 278 0000 10B5 push {r4, lr} - 279 .LCFI3: - 280 .cfi_def_cfa_offset 8 - 281 .cfi_offset 4, -8 - 282 .cfi_offset 14, -4 - 283 0002 82B0 sub sp, sp, #8 - 284 .LCFI4: - 285 .cfi_def_cfa_offset 16 - 286 0004 0190 str r0, [sp, #4] - 287 .LVL10: - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** uint32_t tickstart = 0U; - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** tickstart = HAL_GetTick(); - 288 .loc 1 334 0 - 289 0006 FFF7FEFF bl HAL_GetTick - 290 .LVL11: - 291 000a 0400 movs r4, r0 - 292 .LVL12: - ARM GAS /tmp/ccYJZGyl.s page 12 - - - 293 .L19: - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** while((HAL_GetTick() - tickstart) < Delay) - 294 .loc 1 335 0 discriminator 1 - 295 000c FFF7FEFF bl HAL_GetTick - 296 .LVL13: - 297 0010 001B subs r0, r0, r4 - 298 0012 019B ldr r3, [sp, #4] - 299 0014 9842 cmp r0, r3 - 300 0016 F9D3 bcc .L19 - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 301 .loc 1 338 0 - 302 0018 02B0 add sp, sp, #8 - 303 @ sp needed - 304 .LVL14: - 305 001a 10BD pop {r4, pc} - 306 .cfi_endproc - 307 .LFE46: - 309 .section .text.HAL_SuspendTick,"ax",%progbits - 310 .align 1 - 311 .weak HAL_SuspendTick - 312 .syntax unified - 313 .code 16 - 314 .thumb_func - 315 .fpu softvfp - 317 HAL_SuspendTick: - 318 .LFB47: - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Suspends the Tick increment. - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_SuspendTick() - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * is called, the the SysTick interrupt will be disabled and so Tick increment - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * is suspended. - 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * implementations in user file. - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __weak void HAL_SuspendTick(void) - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 319 .loc 1 351 0 - 320 .cfi_startproc - 321 @ args = 0, pretend = 0, frame = 0 - 322 @ frame_needed = 0, uses_anonymous_args = 0 - 323 @ link register save eliminated. - 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Disable SysTick Interrupt */ - 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk; - 324 .loc 1 353 0 - 325 0000 024A ldr r2, .L21 - 326 0002 1368 ldr r3, [r2] - 327 0004 0221 movs r1, #2 - 328 0006 8B43 bics r3, r1 - 329 0008 1360 str r3, [r2] - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 330 .loc 1 354 0 - 331 @ sp needed - ARM GAS /tmp/ccYJZGyl.s page 13 - - - 332 000a 7047 bx lr - 333 .L22: - 334 .align 2 - 335 .L21: - 336 000c 10E000E0 .word -536813552 - 337 .cfi_endproc - 338 .LFE47: - 340 .section .text.HAL_ResumeTick,"ax",%progbits - 341 .align 1 - 342 .weak HAL_ResumeTick - 343 .syntax unified - 344 .code 16 - 345 .thumb_func - 346 .fpu softvfp - 348 HAL_ResumeTick: - 349 .LFB48: - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Resumes the Tick increment. - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_ResumeTick() - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * is called, the the SysTick interrupt will be enabled and so Tick increment - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * is resumed. - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * implementations in user file. - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** __weak void HAL_ResumeTick(void) - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 350 .loc 1 367 0 - 351 .cfi_startproc - 352 @ args = 0, pretend = 0, frame = 0 - 353 @ frame_needed = 0, uses_anonymous_args = 0 - 354 @ link register save eliminated. - 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Enable SysTick Interrupt */ - 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk; - 355 .loc 1 369 0 - 356 0000 024A ldr r2, .L24 - 357 0002 1368 ldr r3, [r2] - 358 0004 0221 movs r1, #2 - 359 0006 0B43 orrs r3, r1 - 360 0008 1360 str r3, [r2] - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 361 .loc 1 370 0 - 362 @ sp needed - 363 000a 7047 bx lr - 364 .L25: - 365 .align 2 - 366 .L24: - 367 000c 10E000E0 .word -536813552 - 368 .cfi_endproc - 369 .LFE48: - 371 .section .text.HAL_GetHalVersion,"ax",%progbits - 372 .align 1 - 373 .global HAL_GetHalVersion - 374 .syntax unified - 375 .code 16 - ARM GAS /tmp/ccYJZGyl.s page 14 - - - 376 .thumb_func - 377 .fpu softvfp - 379 HAL_GetHalVersion: - 380 .LFB49: - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Returns the HAL revision - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval version: 0xXYZR (8bits for each decimal, R for RC) - 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** uint32_t HAL_GetHalVersion(void) - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 381 .loc 1 377 0 - 382 .cfi_startproc - 383 @ args = 0, pretend = 0, frame = 0 - 384 @ frame_needed = 0, uses_anonymous_args = 0 - 385 @ link register save eliminated. - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** return __STM32L0xx_HAL_VERSION; - 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 386 .loc 1 379 0 - 387 0000 0048 ldr r0, .L27 - 388 @ sp needed - 389 0002 7047 bx lr - 390 .L28: - 391 .align 2 - 392 .L27: - 393 0004 00020801 .word 17302016 - 394 .cfi_endproc - 395 .LFE49: - 397 .section .text.HAL_GetREVID,"ax",%progbits - 398 .align 1 - 399 .global HAL_GetREVID - 400 .syntax unified - 401 .code 16 - 402 .thumb_func - 403 .fpu softvfp - 405 HAL_GetREVID: - 406 .LFB50: - 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Returns the device revision identifier. - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval Device revision identifier - 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** uint32_t HAL_GetREVID(void) - 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 407 .loc 1 386 0 - 408 .cfi_startproc - 409 @ args = 0, pretend = 0, frame = 0 - 410 @ frame_needed = 0, uses_anonymous_args = 0 - 411 @ link register save eliminated. - 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** return((DBGMCU->IDCODE) >> 16U); - 412 .loc 1 387 0 - 413 0000 014B ldr r3, .L30 - 414 0002 1868 ldr r0, [r3] - 415 0004 000C lsrs r0, r0, #16 - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 416 .loc 1 388 0 - 417 @ sp needed - ARM GAS /tmp/ccYJZGyl.s page 15 - - - 418 0006 7047 bx lr - 419 .L31: - 420 .align 2 - 421 .L30: - 422 0008 00580140 .word 1073829888 - 423 .cfi_endproc - 424 .LFE50: - 426 .section .text.HAL_GetDEVID,"ax",%progbits - 427 .align 1 - 428 .global HAL_GetDEVID - 429 .syntax unified - 430 .code 16 - 431 .thumb_func - 432 .fpu softvfp - 434 HAL_GetDEVID: - 435 .LFB51: - 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Returns the device identifier. - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval Device identifier - 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** uint32_t HAL_GetDEVID(void) - 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 436 .loc 1 395 0 - 437 .cfi_startproc - 438 @ args = 0, pretend = 0, frame = 0 - 439 @ frame_needed = 0, uses_anonymous_args = 0 - 440 @ link register save eliminated. - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK); - 441 .loc 1 396 0 - 442 0000 024B ldr r3, .L33 - 443 0002 1868 ldr r0, [r3] - 444 0004 0005 lsls r0, r0, #20 - 445 0006 000D lsrs r0, r0, #20 - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 446 .loc 1 397 0 - 447 @ sp needed - 448 0008 7047 bx lr - 449 .L34: - 450 000a C046 .align 2 - 451 .L33: - 452 000c 00580140 .word 1073829888 - 453 .cfi_endproc - 454 .LFE51: - 456 .section .text.HAL_DBGMCU_EnableDBGSleepMode,"ax",%progbits - 457 .align 1 - 458 .global HAL_DBGMCU_EnableDBGSleepMode - 459 .syntax unified - 460 .code 16 - 461 .thumb_func - 462 .fpu softvfp - 464 HAL_DBGMCU_EnableDBGSleepMode: - 465 .LFB52: - 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Enables the Debug Module during SLEEP mode - 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - ARM GAS /tmp/ccYJZGyl.s page 16 - - - 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_DBGMCU_EnableDBGSleepMode(void) - 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 466 .loc 1 404 0 - 467 .cfi_startproc - 468 @ args = 0, pretend = 0, frame = 0 - 469 @ frame_needed = 0, uses_anonymous_args = 0 - 470 @ link register save eliminated. - 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); - 471 .loc 1 405 0 - 472 0000 024A ldr r2, .L36 - 473 0002 5368 ldr r3, [r2, #4] - 474 0004 0121 movs r1, #1 - 475 0006 0B43 orrs r3, r1 - 476 0008 5360 str r3, [r2, #4] - 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 477 .loc 1 406 0 - 478 @ sp needed - 479 000a 7047 bx lr - 480 .L37: - 481 .align 2 - 482 .L36: - 483 000c 00580140 .word 1073829888 - 484 .cfi_endproc - 485 .LFE52: - 487 .section .text.HAL_DBGMCU_DisableDBGSleepMode,"ax",%progbits - 488 .align 1 - 489 .global HAL_DBGMCU_DisableDBGSleepMode - 490 .syntax unified - 491 .code 16 - 492 .thumb_func - 493 .fpu softvfp - 495 HAL_DBGMCU_DisableDBGSleepMode: - 496 .LFB53: - 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Disables the Debug Module during SLEEP mode - 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_DBGMCU_DisableDBGSleepMode(void) - 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 497 .loc 1 413 0 - 498 .cfi_startproc - 499 @ args = 0, pretend = 0, frame = 0 - 500 @ frame_needed = 0, uses_anonymous_args = 0 - 501 @ link register save eliminated. - 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); - 502 .loc 1 414 0 - 503 0000 024A ldr r2, .L39 - 504 0002 5368 ldr r3, [r2, #4] - 505 0004 0121 movs r1, #1 - 506 0006 8B43 bics r3, r1 - 507 0008 5360 str r3, [r2, #4] - 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 508 .loc 1 415 0 - 509 @ sp needed - 510 000a 7047 bx lr - ARM GAS /tmp/ccYJZGyl.s page 17 - - - 511 .L40: - 512 .align 2 - 513 .L39: - 514 000c 00580140 .word 1073829888 - 515 .cfi_endproc - 516 .LFE53: - 518 .section .text.HAL_DBGMCU_EnableDBGStopMode,"ax",%progbits - 519 .align 1 - 520 .global HAL_DBGMCU_EnableDBGStopMode - 521 .syntax unified - 522 .code 16 - 523 .thumb_func - 524 .fpu softvfp - 526 HAL_DBGMCU_EnableDBGStopMode: - 527 .LFB54: - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Enables the Debug Module during STOP mode - 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_DBGMCU_EnableDBGStopMode(void) - 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 528 .loc 1 422 0 - 529 .cfi_startproc - 530 @ args = 0, pretend = 0, frame = 0 - 531 @ frame_needed = 0, uses_anonymous_args = 0 - 532 @ link register save eliminated. - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); - 533 .loc 1 423 0 - 534 0000 024A ldr r2, .L42 - 535 0002 5368 ldr r3, [r2, #4] - 536 0004 0221 movs r1, #2 - 537 0006 0B43 orrs r3, r1 - 538 0008 5360 str r3, [r2, #4] - 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 539 .loc 1 424 0 - 540 @ sp needed - 541 000a 7047 bx lr - 542 .L43: - 543 .align 2 - 544 .L42: - 545 000c 00580140 .word 1073829888 - 546 .cfi_endproc - 547 .LFE54: - 549 .section .text.HAL_DBGMCU_DisableDBGStopMode,"ax",%progbits - 550 .align 1 - 551 .global HAL_DBGMCU_DisableDBGStopMode - 552 .syntax unified - 553 .code 16 - 554 .thumb_func - 555 .fpu softvfp - 557 HAL_DBGMCU_DisableDBGStopMode: - 558 .LFB55: - 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Disables the Debug Module during STOP mode - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - ARM GAS /tmp/ccYJZGyl.s page 18 - - - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_DBGMCU_DisableDBGStopMode(void) - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 559 .loc 1 431 0 - 560 .cfi_startproc - 561 @ args = 0, pretend = 0, frame = 0 - 562 @ frame_needed = 0, uses_anonymous_args = 0 - 563 @ link register save eliminated. - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); - 564 .loc 1 432 0 - 565 0000 024A ldr r2, .L45 - 566 0002 5368 ldr r3, [r2, #4] - 567 0004 0221 movs r1, #2 - 568 0006 8B43 bics r3, r1 - 569 0008 5360 str r3, [r2, #4] - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 570 .loc 1 433 0 - 571 @ sp needed - 572 000a 7047 bx lr - 573 .L46: - 574 .align 2 - 575 .L45: - 576 000c 00580140 .word 1073829888 - 577 .cfi_endproc - 578 .LFE55: - 580 .section .text.HAL_DBGMCU_EnableDBGStandbyMode,"ax",%progbits - 581 .align 1 - 582 .global HAL_DBGMCU_EnableDBGStandbyMode - 583 .syntax unified - 584 .code 16 - 585 .thumb_func - 586 .fpu softvfp - 588 HAL_DBGMCU_EnableDBGStandbyMode: - 589 .LFB56: - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Enables the Debug Module during STANDBY mode - 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_DBGMCU_EnableDBGStandbyMode(void) - 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 590 .loc 1 440 0 - 591 .cfi_startproc - 592 @ args = 0, pretend = 0, frame = 0 - 593 @ frame_needed = 0, uses_anonymous_args = 0 - 594 @ link register save eliminated. - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); - 595 .loc 1 441 0 - 596 0000 024A ldr r2, .L48 - 597 0002 5368 ldr r3, [r2, #4] - 598 0004 0421 movs r1, #4 - 599 0006 0B43 orrs r3, r1 - 600 0008 5360 str r3, [r2, #4] - 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 601 .loc 1 442 0 - 602 @ sp needed - 603 000a 7047 bx lr - ARM GAS /tmp/ccYJZGyl.s page 19 - - - 604 .L49: - 605 .align 2 - 606 .L48: - 607 000c 00580140 .word 1073829888 - 608 .cfi_endproc - 609 .LFE56: - 611 .section .text.HAL_DBGMCU_DisableDBGStandbyMode,"ax",%progbits - 612 .align 1 - 613 .global HAL_DBGMCU_DisableDBGStandbyMode - 614 .syntax unified - 615 .code 16 - 616 .thumb_func - 617 .fpu softvfp - 619 HAL_DBGMCU_DisableDBGStandbyMode: - 620 .LFB57: - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Disables the Debug Module during STANDBY mode - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_DBGMCU_DisableDBGStandbyMode(void) - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 621 .loc 1 449 0 - 622 .cfi_startproc - 623 @ args = 0, pretend = 0, frame = 0 - 624 @ frame_needed = 0, uses_anonymous_args = 0 - 625 @ link register save eliminated. - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); - 626 .loc 1 450 0 - 627 0000 024A ldr r2, .L51 - 628 0002 5368 ldr r3, [r2, #4] - 629 0004 0421 movs r1, #4 - 630 0006 8B43 bics r3, r1 - 631 0008 5360 str r3, [r2, #4] - 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 632 .loc 1 451 0 - 633 @ sp needed - 634 000a 7047 bx lr - 635 .L52: - 636 .align 2 - 637 .L51: - 638 000c 00580140 .word 1073829888 - 639 .cfi_endproc - 640 .LFE57: - 642 .section .text.HAL_DBGMCU_DBG_EnableLowPowerConfig,"ax",%progbits - 643 .align 1 - 644 .global HAL_DBGMCU_DBG_EnableLowPowerConfig - 645 .syntax unified - 646 .code 16 - 647 .thumb_func - 648 .fpu softvfp - 650 HAL_DBGMCU_DBG_EnableLowPowerConfig: - 651 .LFB58: - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Enable low power mode behavior when the MCU is in Debug mode. - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @param Periph: specifies the low power mode. - ARM GAS /tmp/ccYJZGyl.s page 20 - - - 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * This parameter can be any combination of the following values: - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode - 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg DBGMCU_STOP: Keep debugger connection during STOP mode - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_DBGMCU_DBG_EnableLowPowerConfig(uint32_t Periph) - 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 652 .loc 1 463 0 - 653 .cfi_startproc - 654 @ args = 0, pretend = 0, frame = 0 - 655 @ frame_needed = 0, uses_anonymous_args = 0 - 656 @ link register save eliminated. - 657 .LVL15: - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Check the parameters */ - 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** assert_param(IS_DBGMCU_PERIPH(Periph)); - 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** DBGMCU->CR |= Periph; - 658 .loc 1 467 0 - 659 0000 024A ldr r2, .L54 - 660 0002 5368 ldr r3, [r2, #4] - 661 0004 1843 orrs r0, r3 - 662 .LVL16: - 663 0006 5060 str r0, [r2, #4] - 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 664 .loc 1 469 0 - 665 @ sp needed - 666 0008 7047 bx lr - 667 .L55: - 668 000a C046 .align 2 - 669 .L54: - 670 000c 00580140 .word 1073829888 - 671 .cfi_endproc - 672 .LFE58: - 674 .section .text.HAL_DBGMCU_DBG_DisableLowPowerConfig,"ax",%progbits - 675 .align 1 - 676 .global HAL_DBGMCU_DBG_DisableLowPowerConfig - 677 .syntax unified - 678 .code 16 - 679 .thumb_func - 680 .fpu softvfp - 682 HAL_DBGMCU_DBG_DisableLowPowerConfig: - 683 .LFB59: - 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Disable low power mode behavior when the MCU is in Debug mode. - 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @param Periph: specifies the low power mode. - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * This parameter can be any combination of the following values: - 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode - 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg DBGMCU_STOP: Keep debugger connection during STOP mode - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode - 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_DBGMCU_DBG_DisableLowPowerConfig(uint32_t Periph) - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 684 .loc 1 480 0 - 685 .cfi_startproc - ARM GAS /tmp/ccYJZGyl.s page 21 - - - 686 @ args = 0, pretend = 0, frame = 0 - 687 @ frame_needed = 0, uses_anonymous_args = 0 - 688 @ link register save eliminated. - 689 .LVL17: - 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Check the parameters */ - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** assert_param(IS_DBGMCU_PERIPH(Periph)); - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** DBGMCU->CR &= ~Periph; - 690 .loc 1 484 0 - 691 0000 024A ldr r2, .L57 - 692 0002 5368 ldr r3, [r2, #4] - 693 0004 8343 bics r3, r0 - 694 0006 5360 str r3, [r2, #4] - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 695 .loc 1 486 0 - 696 @ sp needed - 697 0008 7047 bx lr - 698 .L58: - 699 000a C046 .align 2 - 700 .L57: - 701 000c 00580140 .word 1073829888 - 702 .cfi_endproc - 703 .LFE59: - 705 .section .text.HAL_SYSCFG_GetBootMode,"ax",%progbits - 706 .align 1 - 707 .global HAL_SYSCFG_GetBootMode - 708 .syntax unified - 709 .code 16 - 710 .thumb_func - 711 .fpu softvfp - 713 HAL_SYSCFG_GetBootMode: - 714 .LFB60: - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Returns the boot mode as configured by user. - 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval The boot mode as configured by user. The returned value can be one - 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * of the following values: - 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 0x00000000 : Boot is configured in Main Flash memory - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 0x00000100 : Boot is configured in System Flash memory - 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * - 0x00000300 : Boot is configured in Embedded SRAM memory - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** uint32_t HAL_SYSCFG_GetBootMode(void) - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 715 .loc 1 497 0 - 716 .cfi_startproc - 717 @ args = 0, pretend = 0, frame = 0 - 718 @ frame_needed = 0, uses_anonymous_args = 0 - 719 @ link register save eliminated. - 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** return (SYSCFG->CFGR1 & SYSCFG_CFGR1_BOOT_MODE); - 720 .loc 1 498 0 - 721 0000 024B ldr r3, .L60 - 722 0002 1868 ldr r0, [r3] - 723 0004 C023 movs r3, #192 - 724 0006 9B00 lsls r3, r3, #2 - 725 0008 1840 ands r0, r3 - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - ARM GAS /tmp/ccYJZGyl.s page 22 - - - 726 .loc 1 499 0 - 727 @ sp needed - 728 000a 7047 bx lr - 729 .L61: - 730 .align 2 - 731 .L60: - 732 000c 00000140 .word 1073807360 - 733 .cfi_endproc - 734 .LFE60: - 736 .section .text.HAL_SYSCFG_VREFINT_OutputSelect,"ax",%progbits - 737 .align 1 - 738 .global HAL_SYSCFG_VREFINT_OutputSelect - 739 .syntax unified - 740 .code 16 - 741 .thumb_func - 742 .fpu softvfp - 744 HAL_SYSCFG_VREFINT_OutputSelect: - 745 .LFB61: - 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Selects the output of internal reference voltage (VREFINT). - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * The VREFINT output can be routed to(PB0) or - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * (PB1) or both. - 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @param SYSCFG_Vrefint_OUTPUT: new state of the Vrefint output. - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * This parameter can be one of the following values: - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg SYSCFG_VREFINT_OUT_NONE - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg SYSCFG_VREFINT_OUT_PB0 - 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg SYSCFG_VREFINT_OUT_PB1 - 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @arg SYSCFG_VREFINT_OUT_PB0_PB1 - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_SYSCFG_VREFINT_OutputSelect(uint32_t SYSCFG_Vrefint_OUTPUT) - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 746 .loc 1 514 0 - 747 .cfi_startproc - 748 @ args = 0, pretend = 0, frame = 0 - 749 @ frame_needed = 0, uses_anonymous_args = 0 - 750 @ link register save eliminated. - 751 .LVL18: - 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Check the parameters */ - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** assert_param(IS_SYSCFG_VREFINT_OUT_SELECT(SYSCFG_Vrefint_OUTPUT)); - 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Set the output Vrefint pin */ - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** SYSCFG->CFGR3 &= ~(SYSCFG_CFGR3_VREF_OUT); - 752 .loc 1 519 0 - 753 0000 044B ldr r3, .L63 - 754 0002 1A6A ldr r2, [r3, #32] - 755 0004 3021 movs r1, #48 - 756 0006 8A43 bics r2, r1 - 757 0008 1A62 str r2, [r3, #32] - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** SYSCFG->CFGR3 |= (uint32_t)(SYSCFG_Vrefint_OUTPUT); - 758 .loc 1 520 0 - 759 000a 1A6A ldr r2, [r3, #32] - 760 000c 1043 orrs r0, r2 - 761 .LVL19: - 762 000e 1862 str r0, [r3, #32] - 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - ARM GAS /tmp/ccYJZGyl.s page 23 - - - 763 .loc 1 521 0 - 764 @ sp needed - 765 0010 7047 bx lr - 766 .L64: - 767 0012 C046 .align 2 - 768 .L63: - 769 0014 00000140 .word 1073807360 - 770 .cfi_endproc - 771 .LFE61: - 773 .section .text.HAL_SYSCFG_Enable_Lock_VREFINT,"ax",%progbits - 774 .align 1 - 775 .global HAL_SYSCFG_Enable_Lock_VREFINT - 776 .syntax unified - 777 .code 16 - 778 .thumb_func - 779 .fpu softvfp - 781 HAL_SYSCFG_Enable_Lock_VREFINT: - 782 .LFB62: - 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Lock the SYSCFG VREF register values - 525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_SYSCFG_Enable_Lock_VREFINT(void) - 528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 783 .loc 1 528 0 - 784 .cfi_startproc - 785 @ args = 0, pretend = 0, frame = 0 - 786 @ frame_needed = 0, uses_anonymous_args = 0 - 787 @ link register save eliminated. - 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Enable the LOCK by setting REF_LOCK bit in the CFGR3 register */ - 530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK); - 788 .loc 1 530 0 - 789 0000 034A ldr r2, .L66 - 790 0002 116A ldr r1, [r2, #32] - 791 0004 8023 movs r3, #128 - 792 0006 1B06 lsls r3, r3, #24 - 793 0008 0B43 orrs r3, r1 - 794 000a 1362 str r3, [r2, #32] - 531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 795 .loc 1 531 0 - 796 @ sp needed - 797 000c 7047 bx lr - 798 .L67: - 799 000e C046 .align 2 - 800 .L66: - 801 0010 00000140 .word 1073807360 - 802 .cfi_endproc - 803 .LFE62: - 805 .section .text.HAL_SYSCFG_Disable_Lock_VREFINT,"ax",%progbits - 806 .align 1 - 807 .global HAL_SYSCFG_Disable_Lock_VREFINT - 808 .syntax unified - 809 .code 16 - 810 .thumb_func - 811 .fpu softvfp - 813 HAL_SYSCFG_Disable_Lock_VREFINT: - ARM GAS /tmp/ccYJZGyl.s page 24 - - - 814 .LFB63: - 532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** - 533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /** - 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @brief Unlock the overall SYSCFG VREF register values - 535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** * @retval None - 536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** */ - 537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** void HAL_SYSCFG_Disable_Lock_VREFINT(void) - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** { - 815 .loc 1 538 0 - 816 .cfi_startproc - 817 @ args = 0, pretend = 0, frame = 0 - 818 @ frame_needed = 0, uses_anonymous_args = 0 - 819 @ link register save eliminated. - 539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** /* Disable the LOCK by setting REF_LOCK bit in the CFGR3 register */ - 540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK); - 820 .loc 1 540 0 - 821 0000 024A ldr r2, .L69 - 822 0002 136A ldr r3, [r2, #32] - 823 0004 5B00 lsls r3, r3, #1 - 824 0006 5B08 lsrs r3, r3, #1 - 825 0008 1362 str r3, [r2, #32] - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.c **** } - 826 .loc 1 541 0 - 827 @ sp needed - 828 000a 7047 bx lr - 829 .L70: - 830 .align 2 - 831 .L69: - 832 000c 00000140 .word 1073807360 - 833 .cfi_endproc - 834 .LFE63: - 836 .global uwTick - 837 .section .bss.uwTick,"aw",%nobits - 838 .align 2 - 839 .set .LANCHOR0,. + 0 - 842 uwTick: - 843 0000 00000000 .space 4 - 844 .text - 845 .Letext0: - 846 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 847 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 848 .file 4 "Drivers/CMSIS/Include/core_cm0plus.h" - 849 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 850 .file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 851 .file 7 "/usr/arm-none-eabi/include/sys/lock.h" - 852 .file 8 "/usr/arm-none-eabi/include/sys/_types.h" - 853 .file 9 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 854 .file 10 "/usr/arm-none-eabi/include/sys/reent.h" - 855 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 856 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h" - ARM GAS /tmp/ccYJZGyl.s page 25 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal.c - /tmp/ccYJZGyl.s:16 .text.HAL_MspInit:0000000000000000 $t - /tmp/ccYJZGyl.s:23 .text.HAL_MspInit:0000000000000000 HAL_MspInit - /tmp/ccYJZGyl.s:38 .text.HAL_MspDeInit:0000000000000000 $t - /tmp/ccYJZGyl.s:45 .text.HAL_MspDeInit:0000000000000000 HAL_MspDeInit - /tmp/ccYJZGyl.s:59 .text.HAL_DeInit:0000000000000000 $t - /tmp/ccYJZGyl.s:66 .text.HAL_DeInit:0000000000000000 HAL_DeInit - /tmp/ccYJZGyl.s:107 .text.HAL_DeInit:0000000000000024 $d - /tmp/ccYJZGyl.s:113 .text.HAL_InitTick:0000000000000000 $t - /tmp/ccYJZGyl.s:120 .text.HAL_InitTick:0000000000000000 HAL_InitTick - /tmp/ccYJZGyl.s:158 .text.HAL_InitTick:0000000000000024 $d - /tmp/ccYJZGyl.s:163 .text.HAL_Init:0000000000000000 $t - /tmp/ccYJZGyl.s:170 .text.HAL_Init:0000000000000000 HAL_Init - /tmp/ccYJZGyl.s:201 .text.HAL_Init:000000000000001c $d - /tmp/ccYJZGyl.s:206 .text.HAL_IncTick:0000000000000000 $t - /tmp/ccYJZGyl.s:213 .text.HAL_IncTick:0000000000000000 HAL_IncTick - /tmp/ccYJZGyl.s:231 .text.HAL_IncTick:000000000000000c $d - /tmp/ccYJZGyl.s:236 .text.HAL_GetTick:0000000000000000 $t - /tmp/ccYJZGyl.s:243 .text.HAL_GetTick:0000000000000000 HAL_GetTick - /tmp/ccYJZGyl.s:259 .text.HAL_GetTick:0000000000000008 $d - /tmp/ccYJZGyl.s:264 .text.HAL_Delay:0000000000000000 $t - /tmp/ccYJZGyl.s:271 .text.HAL_Delay:0000000000000000 HAL_Delay - /tmp/ccYJZGyl.s:310 .text.HAL_SuspendTick:0000000000000000 $t - /tmp/ccYJZGyl.s:317 .text.HAL_SuspendTick:0000000000000000 HAL_SuspendTick - /tmp/ccYJZGyl.s:336 .text.HAL_SuspendTick:000000000000000c $d - /tmp/ccYJZGyl.s:341 .text.HAL_ResumeTick:0000000000000000 $t - /tmp/ccYJZGyl.s:348 .text.HAL_ResumeTick:0000000000000000 HAL_ResumeTick - /tmp/ccYJZGyl.s:367 .text.HAL_ResumeTick:000000000000000c $d - /tmp/ccYJZGyl.s:372 .text.HAL_GetHalVersion:0000000000000000 $t - /tmp/ccYJZGyl.s:379 .text.HAL_GetHalVersion:0000000000000000 HAL_GetHalVersion - /tmp/ccYJZGyl.s:393 .text.HAL_GetHalVersion:0000000000000004 $d - /tmp/ccYJZGyl.s:398 .text.HAL_GetREVID:0000000000000000 $t - /tmp/ccYJZGyl.s:405 .text.HAL_GetREVID:0000000000000000 HAL_GetREVID - /tmp/ccYJZGyl.s:422 .text.HAL_GetREVID:0000000000000008 $d - /tmp/ccYJZGyl.s:427 .text.HAL_GetDEVID:0000000000000000 $t - /tmp/ccYJZGyl.s:434 .text.HAL_GetDEVID:0000000000000000 HAL_GetDEVID - /tmp/ccYJZGyl.s:452 .text.HAL_GetDEVID:000000000000000c $d - /tmp/ccYJZGyl.s:457 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000000000000 $t - /tmp/ccYJZGyl.s:464 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000000000000 HAL_DBGMCU_EnableDBGSleepMode - /tmp/ccYJZGyl.s:483 .text.HAL_DBGMCU_EnableDBGSleepMode:000000000000000c $d - /tmp/ccYJZGyl.s:488 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000000000000 $t - /tmp/ccYJZGyl.s:495 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000000000000 HAL_DBGMCU_DisableDBGSleepMode - /tmp/ccYJZGyl.s:514 .text.HAL_DBGMCU_DisableDBGSleepMode:000000000000000c $d - /tmp/ccYJZGyl.s:519 .text.HAL_DBGMCU_EnableDBGStopMode:0000000000000000 $t - /tmp/ccYJZGyl.s:526 .text.HAL_DBGMCU_EnableDBGStopMode:0000000000000000 HAL_DBGMCU_EnableDBGStopMode - /tmp/ccYJZGyl.s:545 .text.HAL_DBGMCU_EnableDBGStopMode:000000000000000c $d - /tmp/ccYJZGyl.s:550 .text.HAL_DBGMCU_DisableDBGStopMode:0000000000000000 $t - /tmp/ccYJZGyl.s:557 .text.HAL_DBGMCU_DisableDBGStopMode:0000000000000000 HAL_DBGMCU_DisableDBGStopMode - /tmp/ccYJZGyl.s:576 .text.HAL_DBGMCU_DisableDBGStopMode:000000000000000c $d - /tmp/ccYJZGyl.s:581 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000000000000 $t - /tmp/ccYJZGyl.s:588 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000000000000 HAL_DBGMCU_EnableDBGStandbyMode - /tmp/ccYJZGyl.s:607 .text.HAL_DBGMCU_EnableDBGStandbyMode:000000000000000c $d - /tmp/ccYJZGyl.s:612 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000000000000 $t - /tmp/ccYJZGyl.s:619 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000000000000 HAL_DBGMCU_DisableDBGStandbyMode - /tmp/ccYJZGyl.s:638 .text.HAL_DBGMCU_DisableDBGStandbyMode:000000000000000c $d - /tmp/ccYJZGyl.s:643 .text.HAL_DBGMCU_DBG_EnableLowPowerConfig:0000000000000000 $t - ARM GAS /tmp/ccYJZGyl.s page 26 - - - /tmp/ccYJZGyl.s:650 .text.HAL_DBGMCU_DBG_EnableLowPowerConfig:0000000000000000 HAL_DBGMCU_DBG_EnableLowPowerConfig - /tmp/ccYJZGyl.s:670 .text.HAL_DBGMCU_DBG_EnableLowPowerConfig:000000000000000c $d - /tmp/ccYJZGyl.s:675 .text.HAL_DBGMCU_DBG_DisableLowPowerConfig:0000000000000000 $t - /tmp/ccYJZGyl.s:682 .text.HAL_DBGMCU_DBG_DisableLowPowerConfig:0000000000000000 HAL_DBGMCU_DBG_DisableLowPowerConfig - /tmp/ccYJZGyl.s:701 .text.HAL_DBGMCU_DBG_DisableLowPowerConfig:000000000000000c $d - /tmp/ccYJZGyl.s:706 .text.HAL_SYSCFG_GetBootMode:0000000000000000 $t - /tmp/ccYJZGyl.s:713 .text.HAL_SYSCFG_GetBootMode:0000000000000000 HAL_SYSCFG_GetBootMode - /tmp/ccYJZGyl.s:732 .text.HAL_SYSCFG_GetBootMode:000000000000000c $d - /tmp/ccYJZGyl.s:737 .text.HAL_SYSCFG_VREFINT_OutputSelect:0000000000000000 $t - /tmp/ccYJZGyl.s:744 .text.HAL_SYSCFG_VREFINT_OutputSelect:0000000000000000 HAL_SYSCFG_VREFINT_OutputSelect - /tmp/ccYJZGyl.s:769 .text.HAL_SYSCFG_VREFINT_OutputSelect:0000000000000014 $d - /tmp/ccYJZGyl.s:774 .text.HAL_SYSCFG_Enable_Lock_VREFINT:0000000000000000 $t - /tmp/ccYJZGyl.s:781 .text.HAL_SYSCFG_Enable_Lock_VREFINT:0000000000000000 HAL_SYSCFG_Enable_Lock_VREFINT - /tmp/ccYJZGyl.s:801 .text.HAL_SYSCFG_Enable_Lock_VREFINT:0000000000000010 $d - /tmp/ccYJZGyl.s:806 .text.HAL_SYSCFG_Disable_Lock_VREFINT:0000000000000000 $t - /tmp/ccYJZGyl.s:813 .text.HAL_SYSCFG_Disable_Lock_VREFINT:0000000000000000 HAL_SYSCFG_Disable_Lock_VREFINT - /tmp/ccYJZGyl.s:832 .text.HAL_SYSCFG_Disable_Lock_VREFINT:000000000000000c $d - /tmp/ccYJZGyl.s:842 .bss.uwTick:0000000000000000 uwTick - /tmp/ccYJZGyl.s:838 .bss.uwTick:0000000000000000 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -__aeabi_uidiv -HAL_SYSTICK_Config -HAL_NVIC_SetPriority -SystemCoreClock diff --git a/build/stm32l0xx_hal_adc.d b/build/stm32l0xx_hal_adc.d deleted file mode 100644 index 29c0d6f..0000000 --- a/build/stm32l0xx_hal_adc.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_adc.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_adc.lst b/build/stm32l0xx_hal_adc.lst deleted file mode 100644 index 1172207..0000000 --- a/build/stm32l0xx_hal_adc.lst +++ /dev/null @@ -1,5657 +0,0 @@ -ARM GAS /tmp/ccHnSxqq.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_adc.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.ADC_ConversionStop,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 ADC_ConversionStop: - 23 .LFB63: - 24 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @file stm32l0xx_hal_adc.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief This file provides firmware functions to manage the following - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * functionalities of the Analog to Digital Convertor (ADC) - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * peripheral: - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * + Initialization and de-initialization functions - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * ++ Initialization and Configuration of ADC - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * + Operation functions - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * ++ Start, stop, get result of conversions of regular - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * group, using 3 possible modes: polling, interruption or DMA. - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * + Control functions - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * ++ Channels configuration on regular group - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * ++ Analog Watchdog configuration - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * + State functions - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * ++ ADC state machine management - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * ++ Interrupts and flags management - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Other functions (extended functions) are available in file - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * "stm32l0xx_hal_adc_ex.c". - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @verbatim - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ============================================================================== - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ##### ADC peripheral features ##### - 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ============================================================================== - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution. - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Interrupt generation at the end of regular conversion and in case of - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** analog watchdog or overrun events. - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Single and continuous conversion modes. - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Scan mode for conversion of several channels sequentially. - ARM GAS /tmp/ccHnSxqq.s page 2 - - - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Data alignment with in-built data coherency. - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Programmable sampling time (common for all channels) - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) External trigger (timer or EXTI) with configurable polarity - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) DMA request generation for transfer of conversions data of regular group. - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) ADC calibration - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) ADC conversion of regular group. - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) ADC supply requirements: 1.62 V to 3.6 V. - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** Vdda or to an external voltage reference). - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ##### How to use this driver ##### - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ============================================================================== - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** *** Configuration of top level parameters related to ADC *** - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ============================================================ - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] - 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Enable the ADC interface - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) As prerequisite, ADC clock must be configured at RCC top level. - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** Caution: On STM32L0, ADC clock frequency max is 16MHz (refer - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** to device datasheet). - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** Therefore, ADC clock prescaler must be configured in - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** function of ADC clock source frequency to remain below - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** this maximum frequency. - 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Two clock settings are mandatory: - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) ADC clock (core clock, also possibly conversion clock). - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) ADC clock (conversions clock). - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** Two possible clock sources: synchronous clock derived from APB clock - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** or asynchronous clock derived from ADC dedicated HSI RC oscillator - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** 16MHz. - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** If asynchronous clock is selected, parameter "HSIState" must be set either: - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - to "...HSIState = RCC_HSI_ON" to maintain the HSI16 oscillator - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** always enabled: can be used to supply the main system clock. - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Example: - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** Into HAL_ADC_MspInit() (recommended code location) or with - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** other device clock parameters configuration: - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory) - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HSI enable (optional: if asynchronous clock - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) RCC_OscInitTypeDef RCC_OscInitStructure; - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI16CalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSIState = RCC_HSI_ON; - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) RCC_OscInitStructure.PLL... (optional if used for system clock) - ARM GAS /tmp/ccHnSxqq.s page 3 - - - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure); - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) ADC clock source and clock prescaler are configured at ADC level with - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** parameter "ClockPrescaler" using function HAL_ADC_Init(). - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) ADC pins configuration - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Enable the clock for the ADC GPIOs - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_ENABLE() - 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Configure these ADC pins in analog mode - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_GPIO_Init() - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions: - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Configure the NVIC for ADC - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(ADCx_IRQn) - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** into the function of corresponding ADC interruption vector - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADCx_IRQHandler(). - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Optionally, in case of usage of DMA: - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Configure the DMA (DMA channel, mode normal or circular, ...) - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_DMA_Init(). - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Configure the NVIC for DMA - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn) - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** into the function of corresponding DMA interruption vector - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** DMAx_Channelx_IRQHandler(). - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** *** Configuration of ADC, group regular, channels parameters *** - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ================================================================ - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Configure the ADC parameters (resolution, data alignment, ...) - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** and regular group parameters (conversion trigger, sequencer, ...) - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_Init(). - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Configure the channels for regular group parameters (channel number, - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** channel rank into sequencer, ..., into regular group) - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_ConfigChannel(). - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Optionally, configure the analog watchdog parameters (channels - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** monitored, thresholds, ...) - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_AnalogWDGConfig(). - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) When device is in mode low-power (low-power run, low-power sleep or stop mode), - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init(). - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** In case of internal temperature sensor to be measured: - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** *** Execution of ADC conversions *** - 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ==================================== - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Optionally, perform an automatic ADC calibration to improve the - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** conversion accuracy - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADCEx_Calibration_Start(). - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 4 - - - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) ADC driver can be used among three modes: polling, interruption, - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** transfer by DMA. - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) ADC conversion by polling: - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_Start() - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Wait for ADC conversion completion - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_PollForConversion() - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Retrieve conversion results - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_GetValue() - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_Stop() - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) ADC conversion by interruption: - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_Start_IT() - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback() - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (this function must be implemented in user program) - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Retrieve conversion results - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_GetValue() - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_Stop_IT() - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) ADC conversion with transfer by DMA: - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_Start_DMA() - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback() - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (these functions must be implemented in user program) - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Conversion results are automatically transferred by DMA into - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** destination variable address. - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_ADC_Stop_DMA() - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (@) Callback functions must be implemented in user program: - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+@) HAL_ADC_ErrorCallback() - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog) - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+@) HAL_ADC_ConvCpltCallback() - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+@) HAL_ADC_ConvHalfCpltCallback - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** *** Deinitialization of ADC *** - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ============================================================ - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Disable the ADC interface - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) ADC clock can be hard reset and disabled at RCC top level. - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Hard reset of ADC peripherals - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET(). - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) ADC clock disable - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using the equivalent macro/functions as configuration step. - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) Example: - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** Into HAL_ADC_MspDeInit() (recommended code location) or with - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** other device clock parameters configuration: - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI; - ARM GAS /tmp/ccHnSxqq.s page 5 - - - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock) - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure); - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) ADC pins configuration - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Disable the clock for the ADC GPIOs - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_DISABLE() - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions: - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Disable the NVIC for ADC - 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(ADCx_IRQn) - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (#) Optionally, in case of usage of DMA: - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Deinitialize the DMA - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_DMA_Init(). - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (++) Disable the NVIC for DMA - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn) - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @endverbatim - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ****************************************************************************** - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @attention - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Redistribution and use in source and binary forms, with or without modification, - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * are permitted provided that the following conditions are met: - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * 1. Redistributions of source code must retain the above copyright notice, - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * this list of conditions and the following disclaimer. - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * this list of conditions and the following disclaimer in the documentation - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * and/or other materials provided with the distribution. - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * may be used to endorse or promote products derived from this software - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * without specific prior written permission. - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ****************************************************************************** - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Includes ------------------------------------------------------------------*/ - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** #include "stm32l0xx_hal.h" - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @addtogroup STM32L0xx_HAL_Driver - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 6 - - - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @defgroup ADC ADC - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief ADC HAL module driver - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** #ifdef HAL_ADC_MODULE_ENABLED - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Private typedef -----------------------------------------------------------*/ - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Private define ------------------------------------------------------------*/ - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @defgroup ADC_Private_Constants ADC Private Constants - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Delay for ADC stabilization time. */ - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Maximum delay is 1us (refer to device datasheet, parameter tSTART). */ - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Unit: us */ - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** #define ADC_STAB_DELAY_US ((uint32_t) 1U) - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Delay for temperature sensor stabilization time. */ - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */ - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Unit: us */ - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** #define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 10U) - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @} - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Private macro -------------------------------------------------------------*/ - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Private variables ---------------------------------------------------------*/ - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Private function prototypes -----------------------------------------------*/ - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc); - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc); - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc); - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static void ADC_DMAError(DMA_HandleTypeDef *hdma); - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static void ADC_DelayMicroSecond(uint32_t microSecond); - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @} - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Exported functions ---------------------------------------------------------*/ - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions ADC Exported Functions - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief ADC Initialization and Configuration functions - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @verbatim - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** =============================================================================== - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ##### Initialization and de-initialization functions ##### - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** =============================================================================== - ARM GAS /tmp/ccHnSxqq.s page 7 - - - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] This section provides functions allowing to: - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Initialize and configure the ADC. - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) De-initialize the ADC. - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @endverbatim - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Initialize the ADC peripheral and regular group according to - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * parameters specified in structure "ADC_InitTypeDef". - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note As prerequisite, ADC clock must be configured at RCC top level - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * depending on possible clock sources: APB clock of HSI clock. - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * See commented example code below that can be copied and uncommented - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * into HAL_ADC_MspInit(). - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * coming from ADC state reset. Following calls to this function can - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * be used to reconfigure some parameters of ADC_InitTypeDef - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * structure on the fly, without modifying MSP configuration. If ADC - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * MSP has to be modified again, HAL_ADC_DeInit() must be called - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * before HAL_ADC_Init(). - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * For parameters constraints, see comments of structure - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * "ADC_InitTypeDef". - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note This function configures the ADC within 2 scopes: scope of entire - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * ADC and scope of regular group. For parameters details, see comments - 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * of structure "ADC_InitTypeDef". - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note When device is in mode low-power (low-power run, low-power sleep or stop mode), - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * function "HAL_ADCEx_EnableVREFINT()" must be called before function HAL_ADC_Init() - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first). - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * In case of internal temperature sensor to be measured: - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly. - 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle - 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check ADC handle */ - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(hadc == NULL) - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); - 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); - 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); - 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); - 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); - 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); - ARM GAS /tmp/ccHnSxqq.s page 8 - - - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerFrequencyMode)); - 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff)); - 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTime)); - 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode)); - 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */ - 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* at RCC top level depending on both possible clock sources: */ - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* APB clock or HSI clock. */ - 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Refer to header of this file for more details on clock enabling procedure*/ - 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Actions performed only if ADC is coming from state reset: */ - 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Initialization of ADC MSP */ - 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - ADC voltage regulator enable */ - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(hadc->State == HAL_ADC_STATE_RESET) - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Initialize ADC error code */ - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); - 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Allocate lock resource and initialize it */ - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Lock = HAL_UNLOCKED; - 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Init the low level hardware */ - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_MspInit(hadc); - 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */ - 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* correctly completed. */ - 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* and if there is no conversion on going on regular group (ADC can be */ - 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* enabled anyway, in case of call of this function to update a parameter */ - 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* on the fly). */ - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) || - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET) ) - 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ - 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, - 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL); - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ - 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Parameters that can be updated only when ADC is disabled: */ - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - ADC clock mode */ - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - ADC clock prescaler */ - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - ADC Resolution */ - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET) - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Some parameters of this register are not reset, since they are set */ - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* by other functions and must be kept in case of usage of this */ - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* function on the fly (update of a parameter of ADC_InitTypeDef */ - ARM GAS /tmp/ccHnSxqq.s page 9 - - - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* without needing to reconfigure all other ADC groups/channels */ - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* parameters): */ - 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - internal measurement paths: Vbat, temperature sensor, Vref */ - 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* (set into HAL_ADC_ConfigChannel() ) */ - 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Configuration of ADC clock: clock source PCLK or asynchronous with - 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** selectable prescaler */ - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLOCK_PRESCALER(hadc); - 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Configuration of ADC: */ - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Resolution */ - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_RES); - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 |= hadc->Init.Resolution; - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set the Low Frequency mode */ - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC->CCR &= (uint32_t)~ADC_CCR_LFMEN; - 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC->CCR |=__HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode); - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable voltage regulator (if disabled at this step) */ - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN)) - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADVREGEN bit */ - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADVREGEN; - 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Configuration of ADC: */ - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Resolution */ - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Data alignment */ - 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Scan direction */ - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - External trigger to start conversion */ - 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - External trigger polarity */ - 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Continuous conversion mode */ - 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - DMA continuous request */ - 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Overrun */ - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - AutoDelay feature */ - 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Discontinuous mode */ - 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~(ADC_CFGR1_ALIGN | - 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_SCANDIR | - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_EXTSEL | - 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_EXTEN | - 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_CONT | - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_DMACFG | - 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_OVRMOD | - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_AUTDLY | - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_DISCEN ); - 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 |= (hadc->Init.DataAlign | - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CONTINUOUS(hadc->Init.ContinuousConvMode) | - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_DMACONTREQ(hadc->Init.DMAContinuousRequests) | - 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.Overrun | - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) | - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff)); - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable external trigger if trigger selection is different of software */ - ARM GAS /tmp/ccHnSxqq.s page 10 - - - 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* start. */ - 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: This configuration keeps the hardware feature of parameter */ - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ExternalTrigConvEdge "trigger edge none" equivalent to */ - 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* software start. */ - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv | - 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge; - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable discontinuous mode only if continuous mode is disabled */ - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.DiscontinuousConvMode == ENABLE) - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.ContinuousConvMode == DISABLE) - 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable the selected ADC group regular discontinuous mode */ - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 |= (ADC_CFGR1_DISCEN); - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else - 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ADC regular group discontinuous was intended to be enabled, */ - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* but ADC regular group modes continuous and sequencer discontinuous */ - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* cannot be enabled simultaneously. */ - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.OversamplingMode == ENABLE) - 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_OVERSAMPLING_RATIO(hadc->Init.Oversample.Ratio)); - 526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversample.RightBitShift)); - 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversample.TriggeredMode)); - 528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Configuration of Oversampler: */ - 530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Oversampling Ratio */ - 531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Right bit shift */ - 532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Triggered mode */ - 533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR2 &= ~( ADC_CFGR2_OVSR | - 535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR2_OVSS | - 536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR2_TOVS ); - 537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR2 |= ( hadc->Init.Oversample.Ratio | - 539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.Oversample.RightBitShift | - 540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.Oversample.TriggeredMode ); - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable OverSampling mode */ - 543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR2 |= ADC_CFGR2_OVSE; - 544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(HAL_IS_BIT_SET(hadc->Instance->CFGR2, ADC_CFGR2_OVSE)) - ARM GAS /tmp/ccHnSxqq.s page 11 - - - 548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable OverSampling mode if needed */ - 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR2 &= ~ADC_CFGR2_OVSE; - 551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear the old sampling time */ - 555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->SMPR &= (uint32_t)(~ADC_SMPR_SMPR); - 556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set the new sample time */ - 558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->SMPR |= hadc->Init.SamplingTime; - 559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear ADC error code */ - 561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); - 562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set the ADC state */ - 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, - 565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, - 566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY); - 567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ - 570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_OK; - 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Deinitialize the ADC peripheral registers to their default reset - 575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * values, with deinitialization of the ADC MSP. - 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note For devices with several ADCs: reset of ADC common registers is done - 577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * only if all ADCs sharing the same common group are disabled. - 578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * If this is not the case, reset of these common parameters reset is - 579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * bypassed without error reporting: it can be the intended behavior in - 580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * case of reset of a single ADC while the other ADCs sharing the same - 581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * common group is still running. - 582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle - 583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status - 584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) - 586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check ADC handle */ - 590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(hadc == NULL) - 591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; - 593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - 597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ - 599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); - 600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Stop potential conversion on going, on regular group */ - 602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); - 603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ - ARM GAS /tmp/ccHnSxqq.s page 12 - - - 605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) - 606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable the ADC peripheral */ - 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); - 609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ - 611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR) - 612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Change ADC state */ - 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_READY; - 615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */ - 620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* correctly completed. */ - 621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR) - 622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ========== Reset ADC registers ========== */ - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register IER */ - 626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | ADC_IT_EOCAL | ADC_IT_EOS | \ - 627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_IT_EOC | ADC_IT_RDY | ADC_IT_EOSMP )); - 628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register ISR */ - 631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_EOCAL | ADC_FLAG_OVR | ADC_FLAG_EOS | \ - 632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_FLAG_EOC | ADC_FLAG_EOSMP | ADC_FLAG_RDY)); - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register CR */ - 636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable voltage regulator */ - 637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: Regulator disable useful for power saving */ - 638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset ADVREGEN bit */ - 639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CR &= ~ADC_CR_ADVREGEN; - 640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Bits ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode "read-set": no direct reset applicable - 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* No action */ - 643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register CFGR1 */ - 645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | \ - 646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_DISCEN | ADC_CFGR1_AUTOFF | ADC_CFGR1_AUTDLY | \ - 647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_CONT | ADC_CFGR1_OVRMOD | ADC_CFGR1_EXTEN | \ - 648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | \ - 649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_SCANDIR| ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN); - 650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register CFGR2 */ - 652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR2 &= ~(ADC_CFGR2_TOVS | ADC_CFGR2_OVSS | ADC_CFGR2_OVSR | \ - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR2_OVSE | ADC_CFGR2_CKMODE ); - 654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register SMPR */ - 657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->SMPR &= ~(ADC_SMPR_SMPR); - 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register TR */ - 660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->TR &= ~(ADC_TR_LT | ADC_TR_HT); - 661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 13 - - - 662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register CALFACT */ - 663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT); - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register DR */ - 670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* bits in access mode read only, no direct reset applicable*/ - 671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset register CALFACT */ - 673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT); - 674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ========== Hard reset ADC peripheral ========== */ - 676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Performs a global reset of the entire ADC peripheral: ADC state is */ - 677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* forced to a similar state after device power-on. */ - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If needed, copy-paste and uncomment the following reset code into */ - 679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */ - 680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* */ - 681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* __HAL_RCC_ADC1_FORCE_RESET() */ - 682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* __HAL_RCC_ADC1_RELEASE_RESET() */ - 683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* DeInit the low level hardware */ - 685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_MspDeInit(hadc); - 686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to none */ - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); - 689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ - 691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_RESET; - 692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ - 695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); - 696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ - 698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return tmp_hal_status; - 699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Initialize the ADC MSP. - 703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle - 704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None - 705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) - 707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ - 709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** UNUSED(hadc); - 710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, - 712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** function HAL_ADC_MspInit must be implemented in the user file. - 713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief DeInitialize the ADC MSP. - 718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle - ARM GAS /tmp/ccHnSxqq.s page 14 - - - 719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None - 720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) - 722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ - 724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** UNUSED(hadc); - 725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, - 727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** function HAL_ADC_MspDeInit must be implemented in the user file. - 728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @} - 733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group2 ADC Input and Output operation functions - 736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief ADC IO operation functions - 737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - 738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @verbatim - 739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** =============================================================================== - 740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ##### IO operation functions ##### - 741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** =============================================================================== - 742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] This section provides functions allowing to: - 743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Start conversion of regular group. - 744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Stop conversion of regular group. - 745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Poll for conversion complete on regular group. - 746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Poll for conversion event. - 747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Get result of regular channel conversion. - 748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Start conversion of regular group and enable interruptions. - 749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Stop conversion of regular group and disable interruptions. - 750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Handle ADC interrupt request - 751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Start conversion of regular group and enable DMA transfer. - 752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Stop conversion of regular group and disable ADC DMA transfer. - 753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @endverbatim - 754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ - 755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Enable ADC, start conversion of regular group. - 759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Interruptions enabled in this function: None. - 760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle - 761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status - 762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) - 764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - 769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ - 771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - 772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process locked */ - 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_LOCK(hadc); - 775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 15 - - - 776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable the ADC peripheral */ - 777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ - 778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* performed automatically by hardware. */ - 779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) - 780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); - 782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ - 785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) - 786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ - 788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ - 789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ - 790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, - 791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A - 792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); - 793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset ADC all error code fields */ - 795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); - 796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ - 798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ - 799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ - 800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); - 801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ - 803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ - 804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* operations) */ - 805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); - 806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable conversion of regular group. */ - 808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ - 809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ - 810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* trigger event. */ - 811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; - 812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else - 815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; - 817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ - 820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return tmp_hal_status; - 821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group (and injected channels in - 825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * case of auto_injection mode), disable ADC peripheral. - 826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle - 827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status. - 828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) - 830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 16 - - - 833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - 835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process locked */ - 837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_LOCK(hadc); - 838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on ADC group regular */ - 840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); - 841:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ - 843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) - 844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 845:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ - 846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); - 847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ - 849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) - 850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 851:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ - 852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, - 853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 854:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY); - 855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 857:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ - 859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); - 860:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 861:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ - 862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return tmp_hal_status; - 863:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 865:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 866:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Wait for regular group conversion to be completed. - 867:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note ADC conversion flags EOS (end of sequence) and EOC (end of - 868:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * conversion) are cleared by this function, with an exception: - 869:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * if low power feature "LowPowerAutoWait" is enabled, flags are - 870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * not cleared to not interfere with this feature until data register - 871:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * is read using function HAL_ADC_GetValue(). - 872:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note This function cannot be used in a particular setup: ADC configured - 873:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * in DMA mode and polling for end of each conversion (ADC init - 874:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV). - 875:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * In this case, DMA resets the flag EOC and polling cannot be - 876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * performed on each conversion. Nevertheless, polling can still - 877:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * be performed on the complete sequence (ADC init - 878:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV). - 879:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle - 880:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param Timeout: Timeout value in millisecond. - 881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status - 882:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - 883:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) - 884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 885:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tickstart = 0; - 886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tmp_Flag_EOC = 0x00; - 887:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 888:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - ARM GAS /tmp/ccHnSxqq.s page 17 - - - 890:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 891:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If end of conversion selected to end of sequence conversions */ - 892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) - 893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_Flag_EOC = ADC_FLAG_EOS; - 895:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If end of conversion selected to end of unitary conversion */ - 897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else /* ADC_EOC_SINGLE_CONV */ - 898:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 899:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Verification that ADC configuration is compliant with polling for */ - 900:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* each conversion: */ - 901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Particular case is ADC configured in DMA mode and ADC sequencer with */ - 902:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* several ranks and polling for end of each conversion. */ - 903:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* For code simplicity sake, this particular case is generalized to */ - 904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ADC configured in DMA mode and and polling for end of each conversion. */ - 905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) - 906:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 907:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ - 908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 909:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 910:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ - 911:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); - 912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; - 914:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 915:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else - 916:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS); - 918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 919:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 920:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 921:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Get tick count */ - 922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tickstart = HAL_GetTick(); - 923:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Wait until End of unitary conversion or sequence conversions flag is raised */ - 925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) - 926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 927:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ - 928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY) - 929:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) - 931:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 932:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to timeout */ - 933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); - 934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ - 936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); - 937:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 938:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_TIMEOUT; - 939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 940:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 942:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine */ - 944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - 945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 946:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ - ARM GAS /tmp/ccHnSxqq.s page 18 - - - 947:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ - 948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) - 950:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 951:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ - 952:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) - 953:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 954:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ - 955:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ - 956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - 957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ - 959:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ - 960:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ - 961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* by overrun IRQ process below. */ - 962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); - 963:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ - 965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, - 966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 967:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY); - 968:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 969:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else - 970:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 971:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Change ADC state to error state */ - 972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 973:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ - 975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 976:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 977:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 978:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 979:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 980:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear end of conversion flag of regular group if low power feature */ - 981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ - 982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* until data register is read using function HAL_ADC_GetValue(). */ - 983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoWait == DISABLE) - 984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 985:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear regular group conversion flag */ - 986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); - 987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 988:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 989:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ - 990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_OK; - 991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** - 994:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Poll for ADC event. - 995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle - 996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param EventType: the ADC event type. - 997:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * This parameter can be one of the following values: - 998:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @arg ADC_AWD_EVENT: ADC Analog watchdog event - 999:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @arg ADC_OVR_EVENT: ADC Overrun event -1000:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param Timeout: Timeout value in millisecond. -1001:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note The relevant flag is cleared if found to be set, except for ADC_FLAG_OVR. -1002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Indeed, the latter is reset only if hadc->Init.Overrun field is set -1003:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * to ADC_OVR_DATA_OVERWRITTEN. Otherwise, data register may be potentially overwritten - ARM GAS /tmp/ccHnSxqq.s page 19 - - -1004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * by a new converted data as soon as OVR is cleared. -1005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * To reset OVR flag once the preserved data is retrieved, the user can resort -1006:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * to macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); -1007:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status -1008:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1009:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeou -1010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1011:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tickstart = 0U; -1012:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1013:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1015:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_EVENT_TYPE(EventType)); -1016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1017:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Get tick count */ -1018:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tickstart = HAL_GetTick(); -1019:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check selected event flag */ -1021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) -1022:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ -1024:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY) -1025:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if((Timeout == 0U) ||((HAL_GetTick() - tickstart ) > Timeout)) -1027:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1028:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to timeout */ -1029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); -1030:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ -1032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); -1033:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_TIMEOUT; -1035:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1036:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1039:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** switch(EventType) -1040:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Analog watchdog (level out of window) event */ -1042:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** case ADC_AWD_EVENT: -1043:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -1044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); -1045:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ -1047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); -1048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** break; -1049:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1050:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Overrun event */ -1051:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** default: /* Case ADC_OVR_EVENT */ -1052:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If overrun is set to overwrite previous data, overrun event is not */ -1053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* considered as an error. */ -1054:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ -1055:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* overrun ") */ -1056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) -1057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1058:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -1059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); -1060:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 20 - - -1061:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to overrun */ -1062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); -1063:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1064:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1065:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear ADC Overrun flag */ -1066:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); -1067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** break; -1068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ -1071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_OK; -1072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1073:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Enable ADC, start conversion of regular group with interruption. -1076:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Interruptions enabled in this function according to initialization -1077:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * setting : EOC (end of conversion), EOS (end of sequence), -1078:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * OVR overrun. -1079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. -1080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note To guarantee a proper reset of all interruptions once all the needed -1081:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * conversions are obtained, HAL_ADC_Stop_IT() must be called to ensure -1082:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * a correct stop of the IT-based conversions. -1083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note By default, HAL_ADC_Start_IT() doesn't enable the End Of Sampling -1084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * interruption. If required (e.g. in case of oversampling with trigger -1085:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * mode), the user must: -1086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * 1. first clear the EOSMP flag if set with macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EO -1087:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * 2. then enable the EOSMP interrupt with macro __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOSMP) -1088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * before calling HAL_ADC_Start_IT(). -1089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status -1091:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1092:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) -1093:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; -1095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1096:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1097:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1098:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ -1100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) -1101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process locked */ -1103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_LOCK(hadc); -1104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable the ADC peripheral */ -1106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ -1107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* performed automatically by hardware. */ -1108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) -1109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); -1111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ -1114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) -1115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -1117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ - ARM GAS /tmp/ccHnSxqq.s page 21 - - -1118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ -1119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, -1120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A -1121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); -1122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset ADC all error code fields */ -1124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); -1125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ -1127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ -1128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ -1129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); -1130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ -1132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ -1133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* operations) */ -1134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); -1135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable ADC end of conversion interrupt */ -1137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable ADC overrun interrupt */ -1138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** switch(hadc->Init.EOCSelection) -1139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** case ADC_EOC_SEQ_CONV: -1141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); -1142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); -1143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** break; -1144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ -1145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** default: -1146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); -1147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** break; -1148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable conversion of regular group. */ -1151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ -1152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ -1153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* trigger event. */ -1154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; -1155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -1158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; -1160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ -1163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return tmp_hal_status; -1164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group (and injected group in -1168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * case of auto_injection mode), disable interrution of -1169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * end-of-conversion, disable ADC peripheral. -1170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status. -1172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) -1174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - ARM GAS /tmp/ccHnSxqq.s page 22 - - -1175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; -1176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process locked */ -1181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_LOCK(hadc); -1182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on ADC group regular */ -1184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); -1185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ -1187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) -1188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC end of conversion interrupt for regular group */ -1190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC overrun interrupt */ -1191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); -1192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ -1194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); -1195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ -1197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) -1198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -1200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, -1201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, -1202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY); -1203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ -1207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); -1208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ -1210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return tmp_hal_status; -1211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Enable ADC, start conversion of regular group and transfer result through DMA. -1215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Interruptions enabled in this function: -1216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * overrun (if applicable), DMA half transfer, DMA transfer complete. -1217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. -1218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param pData: Destination Buffer address. -1220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param Length: Length of data to be transferred from ADC peripheral to memory (in bytes) -1221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status. -1222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) -1224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; -1226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ -1231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - ARM GAS /tmp/ccHnSxqq.s page 23 - - -1232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process locked */ -1234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_LOCK(hadc); -1235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable the ADC peripheral */ -1237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ -1238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* performed automatically by hardware. */ -1239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) -1240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); -1242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ -1245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) -1246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -1248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ -1249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ -1250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, -1251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A -1252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); -1253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset ADC all error code fields */ -1255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); -1256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ -1258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ -1259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ -1260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); -1261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set the DMA transfer complete callback */ -1263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; -1264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set the DMA half transfer complete callback */ -1266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; -1267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set the DMA error callback */ -1269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; -1270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ -1273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* start (in case of SW start): */ -1274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ -1276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ -1277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* operations) */ -1278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); -1279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable ADC overrun interrupt */ -1281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); -1282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable ADC DMA mode */ -1284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; -1285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Start the DMA channel */ -1287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); -1288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 24 - - -1289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable conversion of regular group. */ -1290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ -1291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ -1292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* trigger event. */ -1293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; -1294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -1297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; -1299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ -1302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return tmp_hal_status; -1303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group (and injected group in -1307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * case of auto_injection mode), disable ADC DMA transfer, disable -1308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * ADC peripheral. -1309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. -1310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status. -1312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) -1314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; -1316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process locked */ -1321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_LOCK(hadc); -1322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* 1. Stop potential ADC group regular conversion on going */ -1324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); -1325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ -1327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) -1328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ -1330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN); -1331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop */ -1333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* while DMA transfer is on going) */ -1334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); -1335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check if DMA channel effectively disabled */ -1337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status != HAL_OK) -1338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ -1340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); -1341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC overrun interrupt */ -1344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); -1345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 25 - - -1346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ -1347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */ -1348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* in memory a potential failing status. */ -1349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) -1350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); -1352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -1354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_Disable(hadc); -1356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ -1359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) -1360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -1362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, -1363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, -1364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY); -1365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ -1370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); -1371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ -1373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return tmp_hal_status; -1374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Get ADC regular group conversion result. -1378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Reading register DR automatically clears ADC flag EOC -1379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * (ADC group regular end of unitary conversion). -1380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note This function does not clear ADC flag EOS -1381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * (ADC group regular end of sequence conversion). -1382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Occurrence of flag EOS rising: -1383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - If sequencer is composed of 1 rank, flag EOS is equivalent -1384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * to flag EOC. -1385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - If sequencer is composed of several ranks, during the scan -1386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * sequence flag EOC only is raised, at the end of the scan sequence -1387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * both flags EOC and EOS are raised. -1388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * To clear this flag, either use function: -1389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming -1390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * model polling: @ref HAL_ADC_PollForConversion() -1391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). -1392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval ADC group regular conversion data -1394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) -1396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: EOC flag is not cleared here by software because automatically */ -1401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* cleared by hardware when reading register DR. */ -1402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 26 - - -1403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return ADC converted value */ -1404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return hadc->Instance->DR; -1405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Handle ADC interrupt request. -1409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None -1411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) -1413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); -1417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); -1418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ========== Check End of Conversion flag for regular group ========== */ -1420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) || -1421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) -1422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ -1424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) -1425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -1427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); -1428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ -1431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ -1432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && -1433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) -1434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ -1436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) -1437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ -1439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ -1440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) -1441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ -1443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ -1444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ -1445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* by overrun IRQ process below. */ -1446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); -1447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -1449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, -1450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, -1451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY); -1452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -1454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Change ADC state to error state */ -1456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); -1457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ -1459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - ARM GAS /tmp/ccHnSxqq.s page 27 - - -1460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Conversion complete callback */ -1465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: into callback, to determine if conversion has been triggered */ -1466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* from EOC or EOS, possibility to use: */ -1467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */ -1468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); -1469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear regular group conversion flag */ -1471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */ -1472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* conversion flags clear induces the release of the preserved data.*/ -1473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Therefore, if the preserved data value is needed, it must be */ -1474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* read preliminarily into HAL_ADC_ConvCpltCallback(). */ -1475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: Management of low power auto-wait enabled: flags must be cleared */ -1476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* by user when fetching ADC conversion data. */ -1477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* This case is managed in IRQ handler, but this low-power mode */ -1478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* should not be used with programming model IT or DMA. */ -1479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Refer to comment of parameter "LowPowerAutoWait". */ -1480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoWait != ENABLE) -1481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); -1483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ========== Check analog watchdog 1 flag ========== */ -1487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD)) -1488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -1490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); -1491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Level out of window 1 callback */ -1493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_LevelOutOfWindowCallback(hadc); -1494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear ADC Analog watchdog flag */ -1496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); -1497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ========== Check Overrun flag ========== */ -1502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR)) -1503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If overrun is set to overwrite previous data (default setting), */ -1505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* overrun event is not considered as an error. */ -1506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ -1507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* overrun ") */ -1508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Exception for usage with DMA overrun event always considered as an */ -1509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* error. */ -1510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) || -1511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) -1512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to overrun */ -1514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); -1515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear ADC overrun flag */ - ARM GAS /tmp/ccHnSxqq.s page 28 - - -1517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); -1518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Error callback */ -1520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); -1521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear the Overrun flag */ -1524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); -1525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Conversion complete callback in non-blocking mode. -1531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None -1533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) -1535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ -1537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** UNUSED(hadc); -1538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, -1540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** function HAL_ADC_ConvCpltCallback must be implemented in the user file. -1541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Conversion DMA half-transfer callback in non-blocking mode. -1546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None -1548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) -1550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ -1552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** UNUSED(hadc); -1553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, -1555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. -1556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Analog watchdog 1 callback in non-blocking mode. -1561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None -1563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) -1565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ -1567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** UNUSED(hadc); -1568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, -1570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file. -1571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 29 - - -1574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief ADC error callback in non-blocking mode -1576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * (ADC conversion with interruption or transfer by DMA). -1577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note In case of error due to overrun when using ADC with DMA transfer -1578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * (HAL ADC handle paramater "ErrorCode" to state "HAL_ADC_ERROR_OVR"): -1579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - Reinitialize the DMA using function "HAL_ADC_Stop_DMA()". -1580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * - If needed, restart a new ADC conversion using function -1581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * "HAL_ADC_Start_DMA()" -1582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * (this function is also clearing overrun flag) -1583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None -1585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) -1587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ -1589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** UNUSED(hadc); -1590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, -1592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** function HAL_ADC_ErrorCallback must be implemented in the user file. -1593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @} -1598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions -1601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Peripheral Control functions -1602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * -1603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @verbatim -1604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** =============================================================================== -1605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ##### Peripheral Control functions ##### -1606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** =============================================================================== -1607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] This section provides functions allowing to: -1608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Configure channels on regular group -1609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Configure the analog watchdog -1610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @endverbatim -1612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ -1613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Configure a channel to be assigned to ADC group regular. -1617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note In case of usage of internal measurement channels: -1618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * VrefInt/Vlcd(STM32L0x3xx only)/TempSensor. -1619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Sampling time constraints must be respected (sampling time can be -1620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * adjusted in function of ADC clock frequency and sampling time -1621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * setting). -1622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Refer to device datasheet for timings values, parameters TS_vrefint, -1623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * TS_vlcd (STM32L0x3xx only), TS_temp (values rough order: 5us to 17us). -1624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * These internal paths can be be disabled using function -1625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * HAL_ADC_DeInit(). -1626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: -1627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * This function initializes channel into ADC group regular, -1628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * following calls to this function can be used to reconfigure -1629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * some parameters of structure "ADC_ChannelConfTypeDef" on the fly, -1630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * without resetting the ADC. - ARM GAS /tmp/ccHnSxqq.s page 30 - - -1631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state: -1632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Refer to comments of structure "ADC_ChannelConfTypeDef". -1633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param sConfig: Structure of ADC channel assigned to ADC group regular. -1635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status -1636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) -1638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(sConfig->Channel)); -1642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_RANK(sConfig->Rank)); -1643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process locked */ -1645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_LOCK(hadc); -1646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ -1648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ -1649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* conversion on going on regular group: */ -1650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Channel number */ -1651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Management of internal measurement channels: Vbat/VrefInt/TempSensor */ -1652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET) -1653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ -1655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); -1656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ -1657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); -1658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; -1659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (sConfig->Rank != ADC_RANK_NONE) -1662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable selected channels */ -1664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CHSELR |= (uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK); -1665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Management of internal measurement channels: Vlcd (STM32L0x3xx only)/VrefInt/TempSensor */ -1667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* internal measurement paths enable: If internal channel selected, enable */ -1668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* dedicated internal buffers and path. */ -1669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If Temperature sensor channel is selected, then enable the internal */ -1671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* buffers and path */ -1672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR ) == (ADC_CHANNEL_TEMPSENSO -1673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC->CCR |= ADC_CCR_TSEN; -1675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Delay for temperature sensor stabilization time */ -1677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_DelayMicroSecond(ADC_TEMPSENSOR_DELAY_US); -1678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If VRefInt channel is selected, then enable the internal buffers and path */ -1681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC -1682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC->CCR |= ADC_CCR_VREFEN; -1684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx -1687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If Vlcd channel is selected, then enable the internal buffers and path */ - ARM GAS /tmp/ccHnSxqq.s page 31 - - -1688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANN -1689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC->CCR |= ADC_CCR_VLCDEN; -1691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** #endif -1693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -1695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Regular sequence configuration */ -1697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Reset the channel selection register from the selected channel */ -1698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CHSELR &= ~((uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK)); -1699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ -1701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* internal measurement paths disable: If internal channel selected, */ -1702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* disable dedicated internal buffers and path. */ -1703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR ) == (ADC_CHANNEL_TEMPSENSO -1704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC->CCR &= ~ADC_CCR_TSEN; -1706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If VRefInt channel is selected, then enable the internal buffers and path */ -1709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC -1710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC->CCR &= ~ADC_CCR_VREFEN; -1712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx -1715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If Vlcd channel is selected, then enable the internal buffers and path */ -1716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VLCD) == (ADC_CHANNEL_VLCD & ADC_CHANN -1717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC->CCR &= ~ADC_CCR_VLCDEN; -1719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** #endif -1721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ -1724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); -1725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ -1727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_OK; -1728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Configure the analog watchdog. -1732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: -1733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * This function initializes the selected analog watchdog, successive -1734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters -1735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting -1736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * the ADC. -1737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. -1738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * For parameters constraints, see comments of structure -1739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * "ADC_AnalogWDGConfTypeDef". -1740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Analog watchdog thresholds can be modified while ADC conversion -1741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * is on going. -1742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * In this case, some constraints must be taken into account: -1743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * the programmed threshold values are effective from the next -1744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * ADC EOC (end of unitary conversion). - ARM GAS /tmp/ccHnSxqq.s page 32 - - -1745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Considering that registers write delay may happen due to -1746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * bus activity, this might cause an uncertainty on the -1747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * effective timing of the new programmed threshold values. -1748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param AnalogWDGConfig: Structure of ADC analog watchdog configuration -1750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status -1751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* Analog -1753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; -1755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tmpAWDHighThresholdShifted; -1757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tmpAWDLowThresholdShifted; -1758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); -1762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); -1763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) -1765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); -1767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Verify if threshold is within the selected ADC resolution */ -1770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); -1771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); -1772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process locked */ -1774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_LOCK(hadc); -1775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ -1777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ -1778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* conversion on going on regular group: */ -1779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Analog watchdog channels */ -1780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Analog watchdog thresholds */ -1781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) -1782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Configure ADC Analog watchdog interrupt */ -1784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(AnalogWDGConfig->ITMode == ENABLE) -1785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable the ADC Analog watchdog interrupt */ -1787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD); -1788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -1790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable the ADC Analog watchdog interrupt */ -1792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD); -1793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Configuration of analog watchdog: */ -1796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Set the analog watchdog mode */ -1797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* - Set the Analog watchdog channel (is not used if watchdog */ -1798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* mode "all channels": ADC_CFGR1_AWD1SGL=0) */ -1799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL | -1800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_AWDEN | -1801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_AWDCH); - ARM GAS /tmp/ccHnSxqq.s page 33 - - -1802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode | -1804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (AnalogWDGConfig->Channel & ADC_CHANNEL_AWD_MASK)); -1805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Shift the offset in function of the selected ADC resolution: Thresholds */ -1808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ -1809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThre -1810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres -1811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Clear High & Low high thresholds */ -1813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->TR &= (uint32_t) ~ (ADC_TR_HT | ADC_TR_LT); -1814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set the high threshold */ -1816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->TR = ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted); -1817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set the low threshold */ -1818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->TR |= tmpAWDLowThresholdShifted; -1819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If a conversion is on going on regular group, no update could be done */ -1821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* on neither of the AWD configuration structure parameters. */ -1822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -1823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ -1825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); -1826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; -1828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ -1831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_UNLOCK(hadc); -1832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return function status */ -1834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return tmp_hal_status; -1835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @} -1840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1841:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions -1843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief ADC Peripheral State functions -1844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * -1845:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @verbatim -1846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** =============================================================================== -1847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ##### Peripheral state and errors functions ##### -1848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** =============================================================================== -1849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** [..] -1850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** This subsection provides functions to get in run-time the status of the -1851:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** peripheral. -1852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Check the ADC state -1853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (+) Check the ADC error code -1854:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** @endverbatim -1856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ -1857:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 34 - - -1859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1860:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Return the ADC handle state. -1861:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note ADC state machine is managed by bitfields, ADC status must be -1862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * compared with states bits. -1863:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * For example: -1864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) " -1865:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) " -1866:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1867:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval ADC handle state (bitfield on 32 bits) -1868:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1869:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc) -1870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1871:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1872:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1873:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1874:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return ADC handle state */ -1875:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return hadc->State; -1876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1877:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1878:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1879:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Return the ADC error code. -1880:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval ADC error code (bitfield on 32 bits) -1882:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1883:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) -1884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1885:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -1886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -1887:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1888:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return hadc->ErrorCode; -1889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1890:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1891:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @} -1893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1895:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @} -1897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1898:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1899:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions -1900:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @{ -1901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1902:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1903:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Enable the selected ADC. -1905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC must be disabled -1906:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * and voltage regulator must be enabled (done into HAL_ADC_Init()). -1907:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note If low power mode AutoPowerOff is enabled, power-on/off phases are -1908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * performed automatically by hardware. -1909:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * In this mode, this function is useless and must not be called because -1910:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * flag ADC_FLAG_RDY is not usable. -1911:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * Therefore, this function must be called under condition of -1912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)". -1913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1914:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status. -1915:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ - ARM GAS /tmp/ccHnSxqq.s page 35 - - -1916:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) -1917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tickstart = 0U; -1919:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1920:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ -1921:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* enabling phase not yet completed: flag ADC ready not yet set). */ -1922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ -1923:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* causes: ADC clock not running, ...). */ -1924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET) -1925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check if conditions to enable the ADC are fulfilled */ -1927:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_ENABLING_CONDITIONS(hadc) == RESET) -1928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1929:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ -1930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); -1931:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1932:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ -1933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); -1934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; -1936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1937:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1938:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Enable the ADC peripheral */ -1939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_ENABLE(hadc); -1940:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Delay for ADC stabilization time. */ -1942:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_DelayMicroSecond(ADC_STAB_DELAY_US); -1943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Get tick count */ -1945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tickstart = HAL_GetTick(); -1946:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1947:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Wait for ADC effectively enabled */ -1948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) -1949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1950:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) -1951:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1952:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ -1953:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); -1954:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1955:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ -1956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); -1957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; -1959:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1960:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1963:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return HAL status */ -1964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_OK; -1965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1967:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -1968:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Disable the selected ADC. -1969:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be -1970:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * stopped. -1971:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -1972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status. - ARM GAS /tmp/ccHnSxqq.s page 36 - - -1973:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -1974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) -1975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1976:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tickstart = 0U; -1977:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1978:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Verification if ADC is not already disabled: */ -1979:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ -1980:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* disabled. */ -1981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) != RESET) -1982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check if conditions to disable the ADC are fulfilled */ -1984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_DISABLING_CONDITIONS(hadc) != RESET) -1985:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable the ADC peripheral */ -1987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_DISABLE(hadc); -1988:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1989:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -1990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -1991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ -1992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); -1993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1994:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ -1995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); -1996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -1997:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; -1998:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -1999:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2000:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Wait for ADC effectively disabled */ -2001:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Get tick count */ -2002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tickstart = HAL_GetTick(); -2003:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) -2005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2006:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) -2007:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2008:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ -2009:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); -2010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2011:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ -2012:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); -2013:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; -2015:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2017:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2018:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2019:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return HAL status */ -2020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_OK; -2021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2022:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2024:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -2025:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Stop ADC conversion. -2026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be -2027:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * stopped to disable the ADC. -2028:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hadc: ADC handle -2029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval HAL status. - ARM GAS /tmp/ccHnSxqq.s page 37 - - -2030:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -2031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc) -2032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 25 .loc 1 2032 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 .LVL0: - 30 0000 70B5 push {r4, r5, r6, lr} - 31 .LCFI0: - 32 .cfi_def_cfa_offset 16 - 33 .cfi_offset 4, -16 - 34 .cfi_offset 5, -12 - 35 .cfi_offset 6, -8 - 36 .cfi_offset 14, -4 - 37 0002 0400 movs r4, r0 - 38 .LVL1: -2033:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tickstart = 0U; -2034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2035:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ -2036:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); -2037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Verification if ADC is not already stopped on regular group to bypass */ -2039:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* this function if not needed. */ -2040:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) - 39 .loc 1 2040 0 - 40 0004 0368 ldr r3, [r0] - 41 0006 9A68 ldr r2, [r3, #8] - 42 0008 5207 lsls r2, r2, #29 - 43 000a 21D5 bpl .L6 -2041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2042:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2043:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Stop potential conversion on going on regular group */ -2044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ -2045:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && - 44 .loc 1 2045 0 - 45 000c 9A68 ldr r2, [r3, #8] - 46 000e 5207 lsls r2, r2, #29 - 47 0010 06D5 bpl .L3 -2046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) - 48 .loc 1 2046 0 discriminator 1 - 49 0012 9A68 ldr r2, [r3, #8] -2045:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) - 50 .loc 1 2045 0 discriminator 1 - 51 0014 9207 lsls r2, r2, #30 - 52 0016 03D4 bmi .L3 -2047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Stop conversions on regular group */ -2049:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTP; - 53 .loc 1 2049 0 - 54 0018 9A68 ldr r2, [r3, #8] - 55 001a 1021 movs r1, #16 - 56 001c 0A43 orrs r2, r1 - 57 001e 9A60 str r2, [r3, #8] - 58 .L3: -2050:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2051:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 38 - - -2052:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Wait for conversion effectively stopped */ -2053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Get tick count */ -2054:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tickstart = HAL_GetTick(); - 59 .loc 1 2054 0 - 60 0020 FFF7FEFF bl HAL_GetTick - 61 .LVL2: - 62 0024 0500 movs r5, r0 - 63 .LVL3: - 64 .L4: -2055:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) - 65 .loc 1 2056 0 - 66 0026 2368 ldr r3, [r4] - 67 0028 9B68 ldr r3, [r3, #8] - 68 002a 5B07 lsls r3, r3, #29 - 69 002c 0ED5 bpl .L7 -2057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2058:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) - 70 .loc 1 2058 0 - 71 002e FFF7FEFF bl HAL_GetTick - 72 .LVL4: - 73 0032 401B subs r0, r0, r5 - 74 0034 0A28 cmp r0, #10 - 75 0036 F6D9 bls .L4 -2059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2060:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update ADC state machine to error */ -2061:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 76 .loc 1 2061 0 - 77 0038 A36D ldr r3, [r4, #88] - 78 003a 1022 movs r2, #16 - 79 003c 1343 orrs r3, r2 - 80 003e A365 str r3, [r4, #88] -2062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2063:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ -2064:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 81 .loc 1 2064 0 - 82 0040 E36D ldr r3, [r4, #92] - 83 0042 0F3A subs r2, r2, #15 - 84 0044 1343 orrs r3, r2 - 85 0046 E365 str r3, [r4, #92] -2065:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2066:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; - 86 .loc 1 2066 0 - 87 0048 0120 movs r0, #1 - 88 004a 02E0 b .L2 - 89 .L7: -2067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Return HAL status */ -2073:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_OK; - 90 .loc 1 2073 0 - 91 004c 0020 movs r0, #0 - 92 004e 00E0 b .L2 - 93 .LVL5: - ARM GAS /tmp/ccHnSxqq.s page 39 - - - 94 .L6: - 95 0050 0020 movs r0, #0 - 96 .LVL6: - 97 .L2: -2074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 98 .loc 1 2074 0 - 99 @ sp needed - 100 .LVL7: - 101 0052 70BD pop {r4, r5, r6, pc} - 102 .cfi_endproc - 103 .LFE63: - 105 .section .text.ADC_Disable,"ax",%progbits - 106 .align 1 - 107 .syntax unified - 108 .code 16 - 109 .thumb_func - 110 .fpu softvfp - 112 ADC_Disable: - 113 .LFB62: -1975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tickstart = 0U; - 114 .loc 1 1975 0 - 115 .cfi_startproc - 116 @ args = 0, pretend = 0, frame = 0 - 117 @ frame_needed = 0, uses_anonymous_args = 0 - 118 .LVL8: - 119 0000 70B5 push {r4, r5, r6, lr} - 120 .LCFI1: - 121 .cfi_def_cfa_offset 16 - 122 .cfi_offset 4, -16 - 123 .cfi_offset 5, -12 - 124 .cfi_offset 6, -8 - 125 .cfi_offset 14, -4 - 126 0002 0400 movs r4, r0 - 127 .LVL9: -1981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 128 .loc 1 1981 0 - 129 0004 0268 ldr r2, [r0] - 130 0006 9168 ldr r1, [r2, #8] - 131 0008 0323 movs r3, #3 - 132 000a 0B40 ands r3, r1 - 133 000c 012B cmp r3, #1 - 134 000e 01D0 beq .L15 -2020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 135 .loc 1 2020 0 - 136 0010 0020 movs r0, #0 - 137 .LVL10: - 138 .L9: -2021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 139 .loc 1 2021 0 - 140 @ sp needed - 141 .LVL11: - 142 0012 70BD pop {r4, r5, r6, pc} - 143 .LVL12: - 144 .L15: -1981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 145 .loc 1 1981 0 discriminator 1 - 146 0014 1368 ldr r3, [r2] - ARM GAS /tmp/ccHnSxqq.s page 40 - - - 147 0016 DB07 lsls r3, r3, #31 - 148 0018 2DD5 bpl .L14 -1984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 149 .loc 1 1984 0 - 150 001a 9168 ldr r1, [r2, #8] - 151 001c 0523 movs r3, #5 - 152 001e 0B40 ands r3, r1 - 153 0020 012B cmp r3, #1 - 154 0022 09D0 beq .L16 -1992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 155 .loc 1 1992 0 - 156 0024 836D ldr r3, [r0, #88] - 157 0026 1022 movs r2, #16 - 158 0028 1343 orrs r3, r2 - 159 002a 8365 str r3, [r0, #88] -1995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 160 .loc 1 1995 0 - 161 002c C36D ldr r3, [r0, #92] - 162 002e 0F3A subs r2, r2, #15 - 163 0030 1343 orrs r3, r2 - 164 0032 C365 str r3, [r0, #92] -1997:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 165 .loc 1 1997 0 - 166 0034 0120 movs r0, #1 - 167 .LVL13: - 168 0036 ECE7 b .L9 - 169 .LVL14: - 170 .L16: -1987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 171 .loc 1 1987 0 - 172 0038 9368 ldr r3, [r2, #8] - 173 003a 0221 movs r1, #2 - 174 003c 0B43 orrs r3, r1 - 175 003e 9360 str r3, [r2, #8] - 176 0040 0368 ldr r3, [r0] - 177 0042 0322 movs r2, #3 - 178 0044 1A60 str r2, [r3] -2002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 179 .loc 1 2002 0 - 180 0046 FFF7FEFF bl HAL_GetTick - 181 .LVL15: - 182 004a 0500 movs r5, r0 - 183 .LVL16: - 184 .L11: -2004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 185 .loc 1 2004 0 - 186 004c 2368 ldr r3, [r4] - 187 004e 9B68 ldr r3, [r3, #8] - 188 0050 DB07 lsls r3, r3, #31 - 189 0052 0ED5 bpl .L17 -2006:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 190 .loc 1 2006 0 - 191 0054 FFF7FEFF bl HAL_GetTick - 192 .LVL17: - 193 0058 401B subs r0, r0, r5 - 194 005a 0A28 cmp r0, #10 - 195 005c F6D9 bls .L11 - ARM GAS /tmp/ccHnSxqq.s page 41 - - -2009:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 196 .loc 1 2009 0 - 197 005e A36D ldr r3, [r4, #88] - 198 0060 1022 movs r2, #16 - 199 0062 1343 orrs r3, r2 - 200 0064 A365 str r3, [r4, #88] -2012:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 201 .loc 1 2012 0 - 202 0066 E36D ldr r3, [r4, #92] - 203 0068 0F3A subs r2, r2, #15 - 204 006a 1343 orrs r3, r2 - 205 006c E365 str r3, [r4, #92] -2014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 206 .loc 1 2014 0 - 207 006e 0120 movs r0, #1 - 208 0070 CFE7 b .L9 - 209 .L17: -2020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 210 .loc 1 2020 0 - 211 0072 0020 movs r0, #0 - 212 0074 CDE7 b .L9 - 213 .LVL18: - 214 .L14: - 215 0076 0020 movs r0, #0 - 216 .LVL19: - 217 0078 CBE7 b .L9 - 218 .cfi_endproc - 219 .LFE62: - 221 .global __aeabi_uidiv - 222 .section .text.ADC_Enable,"ax",%progbits - 223 .align 1 - 224 .syntax unified - 225 .code 16 - 226 .thumb_func - 227 .fpu softvfp - 229 ADC_Enable: - 230 .LFB61: -1917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tickstart = 0U; - 231 .loc 1 1917 0 - 232 .cfi_startproc - 233 @ args = 0, pretend = 0, frame = 8 - 234 @ frame_needed = 0, uses_anonymous_args = 0 - 235 .LVL20: - 236 0000 30B5 push {r4, r5, lr} - 237 .LCFI2: - 238 .cfi_def_cfa_offset 12 - 239 .cfi_offset 4, -12 - 240 .cfi_offset 5, -8 - 241 .cfi_offset 14, -4 - 242 0002 83B0 sub sp, sp, #12 - 243 .LCFI3: - 244 .cfi_def_cfa_offset 24 - 245 0004 0400 movs r4, r0 - 246 .LVL21: -1924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 247 .loc 1 1924 0 - 248 0006 0368 ldr r3, [r0] - ARM GAS /tmp/ccHnSxqq.s page 42 - - - 249 0008 9968 ldr r1, [r3, #8] - 250 000a 0322 movs r2, #3 - 251 000c 0A40 ands r2, r1 - 252 000e 012A cmp r2, #1 - 253 0010 0ED0 beq .L27 - 254 .L19: -1927:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 255 .loc 1 1927 0 - 256 0012 9968 ldr r1, [r3, #8] - 257 0014 1D4A ldr r2, .L30 - 258 0016 1142 tst r1, r2 - 259 0018 0FD1 bne .L28 -1939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 260 .loc 1 1939 0 - 261 001a 9A68 ldr r2, [r3, #8] - 262 001c 0121 movs r1, #1 - 263 001e 0A43 orrs r2, r1 - 264 0020 9A60 str r2, [r3, #8] - 265 .LVL22: - 266 .LBB6: - 267 .LBB7: -2075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2076:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2077:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -2078:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief DMA transfer complete callback. -2079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hdma: pointer to DMA handle. -2080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None -2081:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -2082:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) -2083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ -2085:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; -2086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2087:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ -2088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) -2089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -2091:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); -2092:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2093:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ -2094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ -2095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && -2096:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) -2097:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2098:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ -2099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) -2100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ -2102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ -2103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) -2104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ -2106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ -2107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ -2108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* by overrun IRQ process below. */ -2109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); -2110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 43 - - -2111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -2112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, -2113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, -2114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY); -2115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -2117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Change ADC state to error state */ -2119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); -2120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ -2122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); -2123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Conversion complete callback */ -2128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); -2129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** else -2131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Call DMA error callback */ -2133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback(hdma); -2134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -2138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief DMA half transfer complete callback. -2139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hdma: pointer to DMA handle. -2140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None -2141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -2142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) -2143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ -2145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; -2146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Half conversion callback */ -2148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_ConvHalfCpltCallback(hadc); -2149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -2152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief DMA error callback. -2153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param hdma: pointer to DMA handle. -2154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None -2155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -2156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static void ADC_DMAError(DMA_HandleTypeDef *hdma) -2157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ -2159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; -2160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC state */ -2162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); -2163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set ADC error code to DMA error */ -2165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); -2166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Error callback */ - ARM GAS /tmp/ccHnSxqq.s page 44 - - -2168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); -2169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } -2170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /** -2172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @brief Delay micro seconds -2173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @param microSecond : delay -2174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** * @retval None -2175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** */ -2176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** static void ADC_DelayMicroSecond(uint32_t microSecond) -2177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Compute number of CPU cycles to wait for */ -2179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __IO uint32_t waitLoopIndex = (microSecond * (SystemCoreClock / 1000000U)); - 268 .loc 1 2179 0 - 269 0022 1B4B ldr r3, .L30+4 - 270 0024 1868 ldr r0, [r3] - 271 .LVL23: - 272 0026 1B49 ldr r1, .L30+8 - 273 0028 FFF7FEFF bl __aeabi_uidiv - 274 .LVL24: - 275 002c 0190 str r0, [sp, #4] - 276 002e 12E0 b .L22 - 277 .LVL25: - 278 .L27: - 279 .LBE7: - 280 .LBE6: -1924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 281 .loc 1 1924 0 discriminator 1 - 282 0030 1A68 ldr r2, [r3] - 283 0032 D207 lsls r2, r2, #31 - 284 0034 EDD5 bpl .L19 -1964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 285 .loc 1 1964 0 - 286 0036 0020 movs r0, #0 - 287 .LVL26: - 288 0038 08E0 b .L20 - 289 .LVL27: - 290 .L28: -1930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 291 .loc 1 1930 0 - 292 003a A36D ldr r3, [r4, #88] - 293 003c 1022 movs r2, #16 - 294 003e 1343 orrs r3, r2 - 295 0040 A365 str r3, [r4, #88] -1933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 296 .loc 1 1933 0 - 297 0042 E36D ldr r3, [r4, #92] - 298 0044 0F3A subs r2, r2, #15 - 299 0046 1343 orrs r3, r2 - 300 0048 E365 str r3, [r4, #92] -1935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 301 .loc 1 1935 0 - 302 004a 0120 movs r0, #1 - 303 .LVL28: - 304 .L20: -1965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 305 .loc 1 1965 0 - 306 004c 03B0 add sp, sp, #12 - ARM GAS /tmp/ccHnSxqq.s page 45 - - - 307 @ sp needed - 308 .LVL29: - 309 004e 30BD pop {r4, r5, pc} - 310 .LVL30: - 311 .L23: - 312 .LBB9: - 313 .LBB8: -2180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** -2181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** while(waitLoopIndex != 0U) -2182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { -2183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** waitLoopIndex--; - 314 .loc 1 2183 0 - 315 0050 019B ldr r3, [sp, #4] - 316 0052 013B subs r3, r3, #1 - 317 0054 0193 str r3, [sp, #4] - 318 .L22: -2181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 319 .loc 1 2181 0 - 320 0056 019B ldr r3, [sp, #4] - 321 0058 002B cmp r3, #0 - 322 005a F9D1 bne .L23 - 323 .LVL31: - 324 .LBE8: - 325 .LBE9: -1945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 326 .loc 1 1945 0 - 327 005c FFF7FEFF bl HAL_GetTick - 328 .LVL32: - 329 0060 0500 movs r5, r0 - 330 .LVL33: - 331 .L24: -1948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 332 .loc 1 1948 0 - 333 0062 2368 ldr r3, [r4] - 334 0064 1B68 ldr r3, [r3] - 335 0066 DB07 lsls r3, r3, #31 - 336 0068 0ED4 bmi .L29 -1950:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 337 .loc 1 1950 0 - 338 006a FFF7FEFF bl HAL_GetTick - 339 .LVL34: - 340 006e 401B subs r0, r0, r5 - 341 0070 0A28 cmp r0, #10 - 342 0072 F6D9 bls .L24 -1953:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 343 .loc 1 1953 0 - 344 0074 A36D ldr r3, [r4, #88] - 345 0076 1022 movs r2, #16 - 346 0078 1343 orrs r3, r2 - 347 007a A365 str r3, [r4, #88] -1956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 348 .loc 1 1956 0 - 349 007c E36D ldr r3, [r4, #92] - 350 007e 0F3A subs r2, r2, #15 - 351 0080 1343 orrs r3, r2 - 352 0082 E365 str r3, [r4, #92] -1958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - ARM GAS /tmp/ccHnSxqq.s page 46 - - - 353 .loc 1 1958 0 - 354 0084 0120 movs r0, #1 - 355 0086 E1E7 b .L20 - 356 .L29: -1964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 357 .loc 1 1964 0 - 358 0088 0020 movs r0, #0 - 359 008a DFE7 b .L20 - 360 .L31: - 361 .align 2 - 362 .L30: - 363 008c 17000080 .word -2147483625 - 364 0090 00000000 .word SystemCoreClock - 365 0094 40420F00 .word 1000000 - 366 .cfi_endproc - 367 .LFE61: - 369 .section .text.HAL_ADC_MspInit,"ax",%progbits - 370 .align 1 - 371 .weak HAL_ADC_MspInit - 372 .syntax unified - 373 .code 16 - 374 .thumb_func - 375 .fpu softvfp - 377 HAL_ADC_MspInit: - 378 .LFB41: - 707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ - 379 .loc 1 707 0 - 380 .cfi_startproc - 381 @ args = 0, pretend = 0, frame = 0 - 382 @ frame_needed = 0, uses_anonymous_args = 0 - 383 @ link register save eliminated. - 384 .LVL35: - 714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 385 .loc 1 714 0 - 386 @ sp needed - 387 0000 7047 bx lr - 388 .cfi_endproc - 389 .LFE41: - 391 .section .text.HAL_ADC_Init,"ax",%progbits - 392 .align 1 - 393 .global HAL_ADC_Init - 394 .syntax unified - 395 .code 16 - 396 .thumb_func - 397 .fpu softvfp - 399 HAL_ADC_Init: - 400 .LFB39: - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 401 .loc 1 356 0 - 402 .cfi_startproc - 403 @ args = 0, pretend = 0, frame = 0 - 404 @ frame_needed = 0, uses_anonymous_args = 0 - 405 .LVL36: - 406 0000 70B5 push {r4, r5, r6, lr} - 407 .LCFI4: - 408 .cfi_def_cfa_offset 16 - 409 .cfi_offset 4, -16 - ARM GAS /tmp/ccHnSxqq.s page 47 - - - 410 .cfi_offset 5, -12 - 411 .cfi_offset 6, -8 - 412 .cfi_offset 14, -4 - 413 0002 041E subs r4, r0, #0 - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 414 .loc 1 359 0 - 415 0004 00D1 bne .LCB377 - 416 0006 DCE0 b .L50 @long jump - 417 .LCB377: - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 418 .loc 1 391 0 - 419 0008 836D ldr r3, [r0, #88] - 420 000a 002B cmp r3, #0 - 421 000c 2ED0 beq .L51 - 422 .LVL37: - 423 .L35: - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET) ) - 424 .loc 1 408 0 - 425 000e A36D ldr r3, [r4, #88] - 426 0010 DB06 lsls r3, r3, #27 - 427 0012 31D4 bmi .L36 - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 428 .loc 1 409 0 discriminator 1 - 429 0014 2168 ldr r1, [r4] - 430 0016 8B68 ldr r3, [r1, #8] - 431 0018 0422 movs r2, #4 - 432 001a 1A40 ands r2, r3 - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET) ) - 433 .loc 1 408 0 discriminator 1 - 434 001c 2CD1 bne .L36 - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 435 .loc 1 420 0 - 436 001e A36D ldr r3, [r4, #88] - 437 0020 6948 ldr r0, .L56 - 438 0022 0340 ands r3, r0 - 439 0024 0630 adds r0, r0, #6 - 440 0026 FF30 adds r0, r0, #255 - 441 0028 0343 orrs r3, r0 - 442 002a A365 str r3, [r4, #88] - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 443 .loc 1 429 0 - 444 002c 8868 ldr r0, [r1, #8] - 445 002e 0323 movs r3, #3 - 446 0030 0340 ands r3, r0 - 447 0032 012B cmp r3, #1 - 448 0034 29D0 beq .L52 - 449 .L38: - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 450 .loc 1 441 0 - 451 0036 6368 ldr r3, [r4, #4] - 452 0038 C020 movs r0, #192 - 453 003a 0006 lsls r0, r0, #24 - 454 003c 8342 cmp r3, r0 - 455 003e 28D0 beq .L40 - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 456 .loc 1 441 0 is_stmt 0 discriminator 2 - 457 0040 8020 movs r0, #128 - ARM GAS /tmp/ccHnSxqq.s page 48 - - - 458 0042 C005 lsls r0, r0, #23 - 459 0044 8342 cmp r3, r0 - 460 0046 24D0 beq .L40 - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 461 .loc 1 441 0 discriminator 4 - 462 0048 8020 movs r0, #128 - 463 004a 0006 lsls r0, r0, #24 - 464 004c 8342 cmp r3, r0 - 465 004e 20D0 beq .L40 - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 466 .loc 1 441 0 discriminator 6 - 467 0050 0B69 ldr r3, [r1, #16] - 468 0052 9B00 lsls r3, r3, #2 - 469 0054 9B08 lsrs r3, r3, #2 - 470 0056 0B61 str r3, [r1, #16] - 471 0058 5C4B ldr r3, .L56+4 - 472 005a 1968 ldr r1, [r3] - 473 005c 5C48 ldr r0, .L56+8 - 474 005e 0140 ands r1, r0 - 475 0060 1960 str r1, [r3] - 476 0062 1968 ldr r1, [r3] - 477 0064 6068 ldr r0, [r4, #4] - 478 0066 0143 orrs r1, r0 - 479 0068 1960 str r1, [r3] - 480 006a 1BE0 b .L42 - 481 .LVL38: - 482 .L51: - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 483 .loc 1 394 0 is_stmt 1 - 484 006c C365 str r3, [r0, #92] - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 485 .loc 1 397 0 - 486 006e 5422 movs r2, #84 - 487 0070 8354 strb r3, [r0, r2] - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 488 .loc 1 400 0 - 489 0072 FFF7FEFF bl HAL_ADC_MspInit - 490 .LVL39: - 491 0076 CAE7 b .L35 - 492 .L36: - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 493 .loc 1 412 0 - 494 0078 A36D ldr r3, [r4, #88] - 495 007a 1022 movs r2, #16 - 496 007c 1343 orrs r3, r2 - 497 007e A365 str r3, [r4, #88] - 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; - 498 .loc 1 415 0 - 499 0080 5423 movs r3, #84 - 500 0082 0022 movs r2, #0 - 501 0084 E254 strb r2, [r4, r3] - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 502 .loc 1 416 0 - 503 0086 0120 movs r0, #1 - 504 .L34: - 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 505 .loc 1 571 0 - ARM GAS /tmp/ccHnSxqq.s page 49 - - - 506 @ sp needed - 507 .LVL40: - 508 0088 70BD pop {r4, r5, r6, pc} - 509 .LVL41: - 510 .L52: - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 511 .loc 1 429 0 discriminator 1 - 512 008a 0B68 ldr r3, [r1] - 513 008c DB07 lsls r3, r3, #31 - 514 008e 13D4 bmi .L39 - 515 0090 D1E7 b .L38 - 516 .L40: - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 517 .loc 1 441 0 discriminator 5 - 518 0092 0B69 ldr r3, [r1, #16] - 519 0094 9B00 lsls r3, r3, #2 - 520 0096 9B08 lsrs r3, r3, #2 - 521 0098 0B61 str r3, [r1, #16] - 522 009a 2168 ldr r1, [r4] - 523 009c 0B69 ldr r3, [r1, #16] - 524 009e 6068 ldr r0, [r4, #4] - 525 00a0 0343 orrs r3, r0 - 526 00a2 0B61 str r3, [r1, #16] - 527 .L42: - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Instance->CFGR1 |= hadc->Init.Resolution; - 528 .loc 1 445 0 - 529 00a4 2168 ldr r1, [r4] - 530 00a6 CB68 ldr r3, [r1, #12] - 531 00a8 1820 movs r0, #24 - 532 00aa 8343 bics r3, r0 - 533 00ac CB60 str r3, [r1, #12] - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 534 .loc 1 446 0 - 535 00ae 2168 ldr r1, [r4] - 536 00b0 CB68 ldr r3, [r1, #12] - 537 00b2 A068 ldr r0, [r4, #8] - 538 00b4 0343 orrs r3, r0 - 539 00b6 CB60 str r3, [r1, #12] - 540 .L39: - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC->CCR |=__HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode); - 541 .loc 1 450 0 - 542 00b8 444B ldr r3, .L56+4 - 543 00ba 1968 ldr r1, [r3] - 544 00bc 4548 ldr r0, .L56+12 - 545 00be 0140 ands r1, r0 - 546 00c0 1960 str r1, [r3] - 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 547 .loc 1 451 0 - 548 00c2 1968 ldr r1, [r3] - 549 00c4 A06B ldr r0, [r4, #56] - 550 00c6 4006 lsls r0, r0, #25 - 551 00c8 0143 orrs r1, r0 - 552 00ca 1960 str r1, [r3] - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 553 .loc 1 454 0 - 554 00cc 2368 ldr r3, [r4] - 555 00ce 9968 ldr r1, [r3, #8] - ARM GAS /tmp/ccHnSxqq.s page 50 - - - 556 00d0 C900 lsls r1, r1, #3 - 557 00d2 04D4 bmi .L43 - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 558 .loc 1 457 0 - 559 00d4 9868 ldr r0, [r3, #8] - 560 00d6 8021 movs r1, #128 - 561 00d8 4905 lsls r1, r1, #21 - 562 00da 0143 orrs r1, r0 - 563 00dc 9960 str r1, [r3, #8] - 564 .L43: - 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_SCANDIR | - 565 .loc 1 471 0 - 566 00de 2168 ldr r1, [r4] - 567 00e0 CB68 ldr r3, [r1, #12] - 568 00e2 3D48 ldr r0, .L56+16 - 569 00e4 0340 ands r3, r0 - 570 00e6 CB60 str r3, [r1, #12] - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | - 571 .loc 1 482 0 - 572 00e8 2068 ldr r0, [r4] - 573 00ea C168 ldr r1, [r0, #12] - 574 00ec E368 ldr r3, [r4, #12] - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CONTINUOUS(hadc->Init.ContinuousConvMode) | - 575 .loc 1 483 0 - 576 00ee 2569 ldr r5, [r4, #16] - 577 00f0 022D cmp r5, #2 - 578 00f2 2AD0 beq .L53 - 579 .L44: - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | - 580 .loc 1 482 0 - 581 00f4 1343 orrs r3, r2 - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_DMACONTREQ(hadc->Init.DMAContinuousRequests) | - 582 .loc 1 484 0 - 583 00f6 226A ldr r2, [r4, #32] - 584 00f8 5203 lsls r2, r2, #13 - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CONTINUOUS(hadc->Init.ContinuousConvMode) | - 585 .loc 1 483 0 - 586 00fa 1343 orrs r3, r2 - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.Overrun | - 587 .loc 1 485 0 - 588 00fc 226B ldr r2, [r4, #48] - 589 00fe 5200 lsls r2, r2, #1 - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_DMACONTREQ(hadc->Init.DMAContinuousRequests) | - 590 .loc 1 484 0 - 591 0100 1343 orrs r3, r2 - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.Overrun | - 592 .loc 1 485 0 - 593 0102 626B ldr r2, [r4, #52] - 594 0104 1343 orrs r3, r2 - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff)); - 595 .loc 1 487 0 - 596 0106 A269 ldr r2, [r4, #24] - 597 0108 9203 lsls r2, r2, #14 - 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) | - 598 .loc 1 486 0 - 599 010a 1343 orrs r3, r2 - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - ARM GAS /tmp/ccHnSxqq.s page 51 - - - 600 .loc 1 488 0 - 601 010c E269 ldr r2, [r4, #28] - 602 010e D203 lsls r2, r2, #15 - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff)); - 603 .loc 1 487 0 - 604 0110 1343 orrs r3, r2 - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | - 605 .loc 1 482 0 - 606 0112 0B43 orrs r3, r1 - 607 0114 C360 str r3, [r0, #12] - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 608 .loc 1 495 0 - 609 0116 A36A ldr r3, [r4, #40] - 610 0118 C222 movs r2, #194 - 611 011a FF32 adds r2, r2, #255 - 612 011c 9342 cmp r3, r2 - 613 011e 05D0 beq .L45 - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge; - 614 .loc 1 497 0 - 615 0120 2168 ldr r1, [r4] - 616 0122 CA68 ldr r2, [r1, #12] - 617 0124 E06A ldr r0, [r4, #44] - 618 0126 0343 orrs r3, r0 - 619 0128 1343 orrs r3, r2 - 620 012a CB60 str r3, [r1, #12] - 621 .L45: - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 622 .loc 1 502 0 - 623 012c 636A ldr r3, [r4, #36] - 624 012e 012B cmp r3, #1 - 625 0130 0DD0 beq .L54 - 626 .L46: - 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 627 .loc 1 523 0 - 628 0132 236C ldr r3, [r4, #64] - 629 0134 012B cmp r3, #1 - 630 0136 1DD0 beq .L55 - 547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 631 .loc 1 547 0 - 632 0138 2368 ldr r3, [r4] - 633 013a 1A69 ldr r2, [r3, #16] - 634 013c D207 lsls r2, r2, #31 - 635 013e 2CD5 bpl .L49 - 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 636 .loc 1 550 0 - 637 0140 1A69 ldr r2, [r3, #16] - 638 0142 0121 movs r1, #1 - 639 0144 8A43 bics r2, r1 - 640 0146 1A61 str r2, [r3, #16] - 641 0148 27E0 b .L49 - 642 .L53: - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CONTINUOUS(hadc->Init.ContinuousConvMode) | - 643 .loc 1 483 0 - 644 014a 0422 movs r2, #4 - 645 014c D2E7 b .L44 - 646 .L54: - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - ARM GAS /tmp/ccHnSxqq.s page 52 - - - 647 .loc 1 504 0 - 648 014e 236A ldr r3, [r4, #32] - 649 0150 002B cmp r3, #0 - 650 0152 06D1 bne .L47 - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 651 .loc 1 507 0 - 652 0154 2268 ldr r2, [r4] - 653 0156 D168 ldr r1, [r2, #12] - 654 0158 8023 movs r3, #128 - 655 015a 5B02 lsls r3, r3, #9 - 656 015c 0B43 orrs r3, r1 - 657 015e D360 str r3, [r2, #12] - 658 0160 E7E7 b .L46 - 659 .L47: - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 660 .loc 1 516 0 - 661 0162 A36D ldr r3, [r4, #88] - 662 0164 2022 movs r2, #32 - 663 0166 1343 orrs r3, r2 - 664 0168 A365 str r3, [r4, #88] - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 665 .loc 1 519 0 - 666 016a E36D ldr r3, [r4, #92] - 667 016c 1F3A subs r2, r2, #31 - 668 016e 1343 orrs r3, r2 - 669 0170 E365 str r3, [r4, #92] - 670 0172 DEE7 b .L46 - 671 .L55: - 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR2_OVSS | - 672 .loc 1 534 0 - 673 0174 2268 ldr r2, [r4] - 674 0176 1369 ldr r3, [r2, #16] - 675 0178 1849 ldr r1, .L56+20 - 676 017a 0B40 ands r3, r1 - 677 017c 1361 str r3, [r2, #16] - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.Oversample.RightBitShift | - 678 .loc 1 538 0 - 679 017e 2168 ldr r1, [r4] - 680 0180 0A69 ldr r2, [r1, #16] - 681 0182 636C ldr r3, [r4, #68] - 682 0184 A06C ldr r0, [r4, #72] - 683 0186 0343 orrs r3, r0 - 539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.Oversample.TriggeredMode ); - 684 .loc 1 539 0 - 685 0188 E06C ldr r0, [r4, #76] - 686 018a 0343 orrs r3, r0 - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** hadc->Init.Oversample.RightBitShift | - 687 .loc 1 538 0 - 688 018c 1343 orrs r3, r2 - 689 018e 0B61 str r3, [r1, #16] - 543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 690 .loc 1 543 0 - 691 0190 2268 ldr r2, [r4] - 692 0192 1369 ldr r3, [r2, #16] - 693 0194 0121 movs r1, #1 - 694 0196 0B43 orrs r3, r1 - 695 0198 1361 str r3, [r2, #16] - ARM GAS /tmp/ccHnSxqq.s page 53 - - - 696 .L49: - 555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 697 .loc 1 555 0 - 698 019a 2268 ldr r2, [r4] - 699 019c 5369 ldr r3, [r2, #20] - 700 019e 0721 movs r1, #7 - 701 01a0 8B43 bics r3, r1 - 702 01a2 5361 str r3, [r2, #20] - 558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 703 .loc 1 558 0 - 704 01a4 2268 ldr r2, [r4] - 705 01a6 5369 ldr r3, [r2, #20] - 706 01a8 E16B ldr r1, [r4, #60] - 707 01aa 0B43 orrs r3, r1 - 708 01ac 5361 str r3, [r2, #20] - 561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 709 .loc 1 561 0 - 710 01ae 0023 movs r3, #0 - 711 01b0 E365 str r3, [r4, #92] - 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, - 712 .loc 1 564 0 - 713 01b2 A36D ldr r3, [r4, #88] - 714 01b4 0322 movs r2, #3 - 715 01b6 9343 bics r3, r2 - 716 01b8 023A subs r2, r2, #2 - 717 01ba 1343 orrs r3, r2 - 718 01bc A365 str r3, [r4, #88] - 570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 719 .loc 1 570 0 - 720 01be 0020 movs r0, #0 - 721 01c0 62E7 b .L34 - 722 .LVL42: - 723 .L50: - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 724 .loc 1 361 0 - 725 01c2 0120 movs r0, #1 - 726 .LVL43: - 727 01c4 60E7 b .L34 - 728 .L57: - 729 01c6 C046 .align 2 - 730 .L56: - 731 01c8 FDFEFFFF .word -259 - 732 01cc 08270140 .word 1073817352 - 733 01d0 FFFFC3FF .word -3932161 - 734 01d4 FFFFFFFD .word -33554433 - 735 01d8 1902FEFF .word -130535 - 736 01dc 03FCFFFF .word -1021 - 737 .cfi_endproc - 738 .LFE39: - 740 .section .text.HAL_ADC_MspDeInit,"ax",%progbits - 741 .align 1 - 742 .weak HAL_ADC_MspDeInit - 743 .syntax unified - 744 .code 16 - 745 .thumb_func - 746 .fpu softvfp - 748 HAL_ADC_MspDeInit: - ARM GAS /tmp/ccHnSxqq.s page 54 - - - 749 .LFB42: - 722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ - 750 .loc 1 722 0 - 751 .cfi_startproc - 752 @ args = 0, pretend = 0, frame = 0 - 753 @ frame_needed = 0, uses_anonymous_args = 0 - 754 @ link register save eliminated. - 755 .LVL44: - 729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 756 .loc 1 729 0 - 757 @ sp needed - 758 0000 7047 bx lr - 759 .cfi_endproc - 760 .LFE42: - 762 .section .text.HAL_ADC_DeInit,"ax",%progbits - 763 .align 1 - 764 .global HAL_ADC_DeInit - 765 .syntax unified - 766 .code 16 - 767 .thumb_func - 768 .fpu softvfp - 770 HAL_ADC_DeInit: - 771 .LFB40: - 586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 772 .loc 1 586 0 - 773 .cfi_startproc - 774 @ args = 0, pretend = 0, frame = 0 - 775 @ frame_needed = 0, uses_anonymous_args = 0 - 776 .LVL45: - 777 0000 70B5 push {r4, r5, r6, lr} - 778 .LCFI5: - 779 .cfi_def_cfa_offset 16 - 780 .cfi_offset 4, -16 - 781 .cfi_offset 5, -12 - 782 .cfi_offset 6, -8 - 783 .cfi_offset 14, -4 - 784 0002 041E subs r4, r0, #0 - 785 .LVL46: - 590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 786 .loc 1 590 0 - 787 0004 49D0 beq .L63 - 599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 788 .loc 1 599 0 - 789 0006 836D ldr r3, [r0, #88] - 790 0008 0222 movs r2, #2 - 791 000a 1343 orrs r3, r2 - 792 000c 8365 str r3, [r0, #88] - 602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 793 .loc 1 602 0 - 794 000e FFF7FEFF bl ADC_ConversionStop - 795 .LVL47: - 796 0012 051E subs r5, r0, #0 - 797 .LVL48: - 605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 798 .loc 1 605 0 - 799 0014 06D0 beq .L64 - 800 .LVL49: - ARM GAS /tmp/ccHnSxqq.s page 55 - - - 801 .L61: - 621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 802 .loc 1 621 0 - 803 0016 012D cmp r5, #1 - 804 0018 0DD1 bne .L65 - 805 .L62: - 695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 806 .loc 1 695 0 - 807 001a 5423 movs r3, #84 - 808 001c 0022 movs r2, #0 - 809 001e E254 strb r2, [r4, r3] - 810 .LVL50: - 811 .L60: - 699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 812 .loc 1 699 0 - 813 0020 2800 movs r0, r5 - 814 @ sp needed - 815 .LVL51: - 816 0022 70BD pop {r4, r5, r6, pc} - 817 .LVL52: - 818 .L64: - 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 819 .loc 1 608 0 - 820 0024 2000 movs r0, r4 - 821 .LVL53: - 822 0026 FFF7FEFF bl ADC_Disable - 823 .LVL54: - 824 002a 0500 movs r5, r0 - 825 .LVL55: - 611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 826 .loc 1 611 0 - 827 002c 0128 cmp r0, #1 - 828 002e F2D0 beq .L61 - 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 829 .loc 1 614 0 - 830 0030 0123 movs r3, #1 - 831 0032 A365 str r3, [r4, #88] - 832 0034 EFE7 b .L61 - 833 .LVL56: - 834 .L65: - 626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_IT_EOC | ADC_IT_RDY | ADC_IT_EOSMP )); - 835 .loc 1 626 0 - 836 0036 2268 ldr r2, [r4] - 837 0038 5368 ldr r3, [r2, #4] - 838 003a 1949 ldr r1, .L66 - 839 003c 0B40 ands r3, r1 - 840 003e 5360 str r3, [r2, #4] - 631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_FLAG_EOC | ADC_FLAG_EOSMP | ADC_FLAG_RDY)); - 841 .loc 1 631 0 - 842 0040 2368 ldr r3, [r4] - 843 0042 184A ldr r2, .L66+4 - 844 0044 1A60 str r2, [r3] - 639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 845 .loc 1 639 0 - 846 0046 2268 ldr r2, [r4] - 847 0048 9368 ldr r3, [r2, #8] - 848 004a 1749 ldr r1, .L66+8 - ARM GAS /tmp/ccHnSxqq.s page 56 - - - 849 004c 0B40 ands r3, r1 - 850 004e 9360 str r3, [r2, #8] - 645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_DISCEN | ADC_CFGR1_AUTOFF | ADC_CFGR1_AUTDLY | \ - 851 .loc 1 645 0 - 852 0050 2268 ldr r2, [r4] - 853 0052 D368 ldr r3, [r2, #12] - 854 0054 1549 ldr r1, .L66+12 - 855 0056 0B40 ands r3, r1 - 856 0058 D360 str r3, [r2, #12] - 652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR2_OVSE | ADC_CFGR2_CKMODE ); - 857 .loc 1 652 0 - 858 005a 2268 ldr r2, [r4] - 859 005c 1369 ldr r3, [r2, #16] - 860 005e 1449 ldr r1, .L66+16 - 861 0060 0B40 ands r3, r1 - 862 0062 1361 str r3, [r2, #16] - 657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 863 .loc 1 657 0 - 864 0064 2268 ldr r2, [r4] - 865 0066 5369 ldr r3, [r2, #20] - 866 0068 0721 movs r1, #7 - 867 006a 8B43 bics r3, r1 - 868 006c 5361 str r3, [r2, #20] - 660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 869 .loc 1 660 0 - 870 006e 2268 ldr r2, [r4] - 871 0070 136A ldr r3, [r2, #32] - 872 0072 1049 ldr r1, .L66+20 - 873 0074 0B40 ands r3, r1 - 874 0076 1362 str r3, [r2, #32] - 663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 875 .loc 1 663 0 - 876 0078 2168 ldr r1, [r4] - 877 007a B423 movs r3, #180 - 878 007c CA58 ldr r2, [r1, r3] - 879 007e 7F20 movs r0, #127 - 880 0080 8243 bics r2, r0 - 881 0082 CA50 str r2, [r1, r3] - 673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 882 .loc 1 673 0 - 883 0084 2168 ldr r1, [r4] - 884 0086 CA58 ldr r2, [r1, r3] - 885 0088 8243 bics r2, r0 - 886 008a CA50 str r2, [r1, r3] - 685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 887 .loc 1 685 0 - 888 008c 2000 movs r0, r4 - 889 008e FFF7FEFF bl HAL_ADC_MspDeInit - 890 .LVL57: - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 891 .loc 1 688 0 - 892 0092 0023 movs r3, #0 - 893 0094 E365 str r3, [r4, #92] - 691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 894 .loc 1 691 0 - 895 0096 A365 str r3, [r4, #88] - 896 0098 BFE7 b .L62 - ARM GAS /tmp/ccHnSxqq.s page 57 - - - 897 .LVL58: - 898 .L63: - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 899 .loc 1 592 0 - 900 009a 0125 movs r5, #1 - 901 009c C0E7 b .L60 - 902 .L67: - 903 009e C046 .align 2 - 904 .L66: - 905 00a0 60F7FFFF .word -2208 - 906 00a4 9F080000 .word 2207 - 907 00a8 FFFFFFEF .word -268435457 - 908 00ac 00023E83 .word -2093088256 - 909 00b0 02FCFF3F .word 1073740802 - 910 00b4 00F000F0 .word -268374016 - 911 .cfi_endproc - 912 .LFE40: - 914 .section .text.HAL_ADC_Start,"ax",%progbits - 915 .align 1 - 916 .global HAL_ADC_Start - 917 .syntax unified - 918 .code 16 - 919 .thumb_func - 920 .fpu softvfp - 922 HAL_ADC_Start: - 923 .LFB43: - 764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 924 .loc 1 764 0 - 925 .cfi_startproc - 926 @ args = 0, pretend = 0, frame = 0 - 927 @ frame_needed = 0, uses_anonymous_args = 0 - 928 .LVL59: - 929 0000 10B5 push {r4, lr} - 930 .LCFI6: - 931 .cfi_def_cfa_offset 8 - 932 .cfi_offset 4, -8 - 933 .cfi_offset 14, -4 - 934 0002 0400 movs r4, r0 - 935 .LVL60: - 771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 936 .loc 1 771 0 - 937 0004 0368 ldr r3, [r0] - 938 0006 9B68 ldr r3, [r3, #8] - 939 0008 5B07 lsls r3, r3, #29 - 940 000a 23D4 bmi .L71 - 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 941 .loc 1 774 0 - 942 000c 5423 movs r3, #84 - 943 000e C35C ldrb r3, [r0, r3] - 944 0010 012B cmp r3, #1 - 945 0012 21D0 beq .L72 - 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 946 .loc 1 774 0 is_stmt 0 discriminator 2 - 947 0014 5423 movs r3, #84 - 948 0016 0122 movs r2, #1 - 949 0018 C254 strb r2, [r0, r3] - 779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - ARM GAS /tmp/ccHnSxqq.s page 58 - - - 950 .loc 1 779 0 is_stmt 1 discriminator 2 - 951 001a C369 ldr r3, [r0, #28] - 952 001c 012B cmp r3, #1 - 953 001e 14D1 bne .L74 - 765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 954 .loc 1 765 0 - 955 0020 0020 movs r0, #0 - 956 .LVL61: - 957 .L70: - 790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A - 958 .loc 1 790 0 - 959 0022 A36D ldr r3, [r4, #88] - 960 0024 0D4A ldr r2, .L75 - 961 0026 1A40 ands r2, r3 - 962 0028 8023 movs r3, #128 - 963 002a 5B00 lsls r3, r3, #1 - 964 002c 1343 orrs r3, r2 - 965 002e A365 str r3, [r4, #88] - 795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 966 .loc 1 795 0 - 967 0030 0023 movs r3, #0 - 968 0032 E365 str r3, [r4, #92] - 800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 969 .loc 1 800 0 - 970 0034 5422 movs r2, #84 - 971 0036 A354 strb r3, [r4, r2] - 805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 972 .loc 1 805 0 - 973 0038 2368 ldr r3, [r4] - 974 003a 383A subs r2, r2, #56 - 975 003c 1A60 str r2, [r3] - 811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 976 .loc 1 811 0 - 977 003e 2268 ldr r2, [r4] - 978 0040 9368 ldr r3, [r2, #8] - 979 0042 0421 movs r1, #4 - 980 0044 0B43 orrs r3, r1 - 981 0046 9360 str r3, [r2, #8] - 982 .L69: - 821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 983 .loc 1 821 0 - 984 @ sp needed - 985 .LVL62: - 986 0048 10BD pop {r4, pc} - 987 .LVL63: - 988 .L74: - 781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 989 .loc 1 781 0 - 990 004a FFF7FEFF bl ADC_Enable - 991 .LVL64: - 785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 992 .loc 1 785 0 - 993 004e 0028 cmp r0, #0 - 994 0050 E7D0 beq .L70 - 995 0052 F9E7 b .L69 - 996 .LVL65: - 997 .L71: - ARM GAS /tmp/ccHnSxqq.s page 59 - - - 816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 998 .loc 1 816 0 - 999 0054 0220 movs r0, #2 - 1000 .LVL66: - 1001 0056 F7E7 b .L69 - 1002 .LVL67: - 1003 .L72: - 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1004 .loc 1 774 0 - 1005 0058 0220 movs r0, #2 - 1006 .LVL68: - 1007 005a F5E7 b .L69 - 1008 .L76: - 1009 .align 2 - 1010 .L75: - 1011 005c FEF0FFFF .word -3842 - 1012 .cfi_endproc - 1013 .LFE43: - 1015 .section .text.HAL_ADC_Stop,"ax",%progbits - 1016 .align 1 - 1017 .global HAL_ADC_Stop - 1018 .syntax unified - 1019 .code 16 - 1020 .thumb_func - 1021 .fpu softvfp - 1023 HAL_ADC_Stop: - 1024 .LFB44: - 830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 1025 .loc 1 830 0 - 1026 .cfi_startproc - 1027 @ args = 0, pretend = 0, frame = 0 - 1028 @ frame_needed = 0, uses_anonymous_args = 0 - 1029 .LVL69: - 1030 0000 10B5 push {r4, lr} - 1031 .LCFI7: - 1032 .cfi_def_cfa_offset 8 - 1033 .cfi_offset 4, -8 - 1034 .cfi_offset 14, -4 - 1035 0002 0400 movs r4, r0 - 1036 .LVL70: - 837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1037 .loc 1 837 0 - 1038 0004 5423 movs r3, #84 - 1039 0006 C35C ldrb r3, [r0, r3] - 1040 0008 012B cmp r3, #1 - 1041 000a 17D0 beq .L80 - 837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1042 .loc 1 837 0 is_stmt 0 discriminator 2 - 1043 000c 5423 movs r3, #84 - 1044 000e 0122 movs r2, #1 - 1045 0010 C254 strb r2, [r0, r3] - 840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1046 .loc 1 840 0 is_stmt 1 discriminator 2 - 1047 0012 FFF7FEFF bl ADC_ConversionStop - 1048 .LVL71: - 843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1049 .loc 1 843 0 discriminator 2 - ARM GAS /tmp/ccHnSxqq.s page 60 - - - 1050 0016 0028 cmp r0, #0 - 1051 0018 03D0 beq .L81 - 1052 .LVL72: - 1053 .L79: - 859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1054 .loc 1 859 0 - 1055 001a 5423 movs r3, #84 - 1056 001c 0022 movs r2, #0 - 1057 001e E254 strb r2, [r4, r3] - 1058 .LVL73: - 1059 .L78: - 863:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1060 .loc 1 863 0 - 1061 @ sp needed - 1062 .LVL74: - 1063 0020 10BD pop {r4, pc} - 1064 .LVL75: - 1065 .L81: - 846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1066 .loc 1 846 0 - 1067 0022 2000 movs r0, r4 - 1068 .LVL76: - 1069 0024 FFF7FEFF bl ADC_Disable - 1070 .LVL77: - 849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1071 .loc 1 849 0 - 1072 0028 0028 cmp r0, #0 - 1073 002a F6D1 bne .L79 - 852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 1074 .loc 1 852 0 - 1075 002c A36D ldr r3, [r4, #88] - 1076 002e 044A ldr r2, .L82 - 1077 0030 1340 ands r3, r2 - 1078 0032 0432 adds r2, r2, #4 - 1079 0034 FF32 adds r2, r2, #255 - 1080 0036 1343 orrs r3, r2 - 1081 0038 A365 str r3, [r4, #88] - 1082 003a EEE7 b .L79 - 1083 .LVL78: - 1084 .L80: - 837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1085 .loc 1 837 0 - 1086 003c 0220 movs r0, #2 - 1087 .LVL79: - 1088 003e EFE7 b .L78 - 1089 .L83: - 1090 .align 2 - 1091 .L82: - 1092 0040 FEFEFFFF .word -258 - 1093 .cfi_endproc - 1094 .LFE44: - 1096 .section .text.HAL_ADC_PollForConversion,"ax",%progbits - 1097 .align 1 - 1098 .global HAL_ADC_PollForConversion - 1099 .syntax unified - 1100 .code 16 - 1101 .thumb_func - ARM GAS /tmp/ccHnSxqq.s page 61 - - - 1102 .fpu softvfp - 1104 HAL_ADC_PollForConversion: - 1105 .LFB45: - 884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tickstart = 0; - 1106 .loc 1 884 0 - 1107 .cfi_startproc - 1108 @ args = 0, pretend = 0, frame = 0 - 1109 @ frame_needed = 0, uses_anonymous_args = 0 - 1110 .LVL80: - 1111 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 1112 .LCFI8: - 1113 .cfi_def_cfa_offset 24 - 1114 .cfi_offset 3, -24 - 1115 .cfi_offset 4, -20 - 1116 .cfi_offset 5, -16 - 1117 .cfi_offset 6, -12 - 1118 .cfi_offset 7, -8 - 1119 .cfi_offset 14, -4 - 1120 0002 0400 movs r4, r0 - 1121 0004 0E00 movs r6, r1 - 1122 .LVL81: - 892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1123 .loc 1 892 0 - 1124 0006 4569 ldr r5, [r0, #20] - 1125 0008 082D cmp r5, #8 - 1126 000a 04D0 beq .L85 - 905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1127 .loc 1 905 0 - 1128 000c 0368 ldr r3, [r0] - 1129 000e DB68 ldr r3, [r3, #12] - 1130 0010 DB07 lsls r3, r3, #31 - 1131 0012 19D4 bmi .L95 - 917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1132 .loc 1 917 0 - 1133 0014 0C25 movs r5, #12 - 1134 .L85: - 1135 .LVL82: - 922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1136 .loc 1 922 0 - 1137 0016 FFF7FEFF bl HAL_GetTick - 1138 .LVL83: - 1139 001a 0700 movs r7, r0 - 1140 .LVL84: - 1141 .L88: - 925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1142 .loc 1 925 0 - 1143 001c 2368 ldr r3, [r4] - 1144 001e 1A68 ldr r2, [r3] - 1145 0020 1542 tst r5, r2 - 1146 0022 1AD1 bne .L96 - 928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1147 .loc 1 928 0 - 1148 0024 731C adds r3, r6, #1 - 1149 0026 F9D0 beq .L88 - 930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1150 .loc 1 930 0 - 1151 0028 002E cmp r6, #0 - ARM GAS /tmp/ccHnSxqq.s page 62 - - - 1152 002a 04D0 beq .L89 - 930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1153 .loc 1 930 0 is_stmt 0 discriminator 1 - 1154 002c FFF7FEFF bl HAL_GetTick - 1155 .LVL85: - 1156 0030 C01B subs r0, r0, r7 - 1157 0032 B042 cmp r0, r6 - 1158 0034 F2D9 bls .L88 - 1159 .L89: - 933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1160 .loc 1 933 0 is_stmt 1 - 1161 0036 A36D ldr r3, [r4, #88] - 1162 0038 0422 movs r2, #4 - 1163 003a 1343 orrs r3, r2 - 1164 003c A365 str r3, [r4, #88] - 936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1165 .loc 1 936 0 - 1166 003e 5423 movs r3, #84 - 1167 0040 0022 movs r2, #0 - 1168 0042 E254 strb r2, [r4, r3] - 938:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1169 .loc 1 938 0 - 1170 0044 0320 movs r0, #3 - 1171 0046 07E0 b .L86 - 1172 .LVL86: - 1173 .L95: - 908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1174 .loc 1 908 0 - 1175 0048 836D ldr r3, [r0, #88] - 1176 004a 2022 movs r2, #32 - 1177 004c 1343 orrs r3, r2 - 1178 004e 8365 str r3, [r0, #88] - 911:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1179 .loc 1 911 0 - 1180 0050 5423 movs r3, #84 - 1181 0052 0022 movs r2, #0 - 1182 0054 C254 strb r2, [r0, r3] - 913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1183 .loc 1 913 0 - 1184 0056 0120 movs r0, #1 - 1185 .LVL87: - 1186 .L86: - 991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1187 .loc 1 991 0 - 1188 @ sp needed - 1189 .LVL88: - 1190 .LVL89: - 1191 0058 F8BD pop {r3, r4, r5, r6, r7, pc} - 1192 .LVL90: - 1193 .L96: - 944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1194 .loc 1 944 0 - 1195 005a A16D ldr r1, [r4, #88] - 1196 005c 8022 movs r2, #128 - 1197 005e 9200 lsls r2, r2, #2 - 1198 0060 0A43 orrs r2, r1 - 1199 0062 A265 str r2, [r4, #88] - ARM GAS /tmp/ccHnSxqq.s page 63 - - - 948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) - 1200 .loc 1 948 0 - 1201 0064 D968 ldr r1, [r3, #12] - 1202 0066 C022 movs r2, #192 - 1203 0068 1201 lsls r2, r2, #4 - 1204 006a 1142 tst r1, r2 - 1205 006c 13D1 bne .L91 - 948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) - 1206 .loc 1 948 0 is_stmt 0 discriminator 1 - 1207 006e 226A ldr r2, [r4, #32] - 1208 0070 002A cmp r2, #0 - 1209 0072 10D1 bne .L91 - 952:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1210 .loc 1 952 0 is_stmt 1 - 1211 0074 1A68 ldr r2, [r3] - 1212 0076 1207 lsls r2, r2, #28 - 1213 0078 0DD5 bpl .L91 - 956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1214 .loc 1 956 0 - 1215 007a 9A68 ldr r2, [r3, #8] - 1216 007c 5207 lsls r2, r2, #29 - 1217 007e 12D4 bmi .L92 - 962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1218 .loc 1 962 0 - 1219 0080 5A68 ldr r2, [r3, #4] - 1220 0082 0C21 movs r1, #12 - 1221 0084 8A43 bics r2, r1 - 1222 0086 5A60 str r2, [r3, #4] - 965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 1223 .loc 1 965 0 - 1224 0088 A36D ldr r3, [r4, #88] - 1225 008a 0C4A ldr r2, .L97 - 1226 008c 1340 ands r3, r2 - 1227 008e 0432 adds r2, r2, #4 - 1228 0090 FF32 adds r2, r2, #255 - 1229 0092 1343 orrs r3, r2 - 1230 0094 A365 str r3, [r4, #88] - 1231 .L91: - 983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1232 .loc 1 983 0 - 1233 0096 A369 ldr r3, [r4, #24] - 1234 0098 002B cmp r3, #0 - 1235 009a 0DD1 bne .L94 - 986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1236 .loc 1 986 0 - 1237 009c 2368 ldr r3, [r4] - 1238 009e 0C22 movs r2, #12 - 1239 00a0 1A60 str r2, [r3] - 990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1240 .loc 1 990 0 - 1241 00a2 0020 movs r0, #0 - 1242 00a4 D8E7 b .L86 - 1243 .L92: - 972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1244 .loc 1 972 0 - 1245 00a6 A36D ldr r3, [r4, #88] - 1246 00a8 2022 movs r2, #32 - ARM GAS /tmp/ccHnSxqq.s page 64 - - - 1247 00aa 1343 orrs r3, r2 - 1248 00ac A365 str r3, [r4, #88] - 975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1249 .loc 1 975 0 - 1250 00ae E36D ldr r3, [r4, #92] - 1251 00b0 1F3A subs r2, r2, #31 - 1252 00b2 1343 orrs r3, r2 - 1253 00b4 E365 str r3, [r4, #92] - 1254 00b6 EEE7 b .L91 - 1255 .L94: - 990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1256 .loc 1 990 0 - 1257 00b8 0020 movs r0, #0 - 1258 00ba CDE7 b .L86 - 1259 .L98: - 1260 .align 2 - 1261 .L97: - 1262 00bc FEFEFFFF .word -258 - 1263 .cfi_endproc - 1264 .LFE45: - 1266 .section .text.HAL_ADC_PollForEvent,"ax",%progbits - 1267 .align 1 - 1268 .global HAL_ADC_PollForEvent - 1269 .syntax unified - 1270 .code 16 - 1271 .thumb_func - 1272 .fpu softvfp - 1274 HAL_ADC_PollForEvent: - 1275 .LFB46: -1010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** uint32_t tickstart = 0U; - 1276 .loc 1 1010 0 - 1277 .cfi_startproc - 1278 @ args = 0, pretend = 0, frame = 0 - 1279 @ frame_needed = 0, uses_anonymous_args = 0 - 1280 .LVL91: - 1281 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 1282 .LCFI9: - 1283 .cfi_def_cfa_offset 24 - 1284 .cfi_offset 3, -24 - 1285 .cfi_offset 4, -20 - 1286 .cfi_offset 5, -16 - 1287 .cfi_offset 6, -12 - 1288 .cfi_offset 7, -8 - 1289 .cfi_offset 14, -4 - 1290 0002 0500 movs r5, r0 - 1291 0004 0C00 movs r4, r1 - 1292 0006 1600 movs r6, r2 - 1293 .LVL92: -1018:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1294 .loc 1 1018 0 - 1295 0008 FFF7FEFF bl HAL_GetTick - 1296 .LVL93: - 1297 000c 0700 movs r7, r0 - 1298 .LVL94: - 1299 .L101: -1021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1300 .loc 1 1021 0 - ARM GAS /tmp/ccHnSxqq.s page 65 - - - 1301 000e 2A68 ldr r2, [r5] - 1302 0010 1368 ldr r3, [r2] - 1303 0012 2340 ands r3, r4 - 1304 0014 A342 cmp r3, r4 - 1305 0016 11D0 beq .L109 -1024:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1306 .loc 1 1024 0 - 1307 0018 731C adds r3, r6, #1 - 1308 001a F8D0 beq .L101 -1026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1309 .loc 1 1026 0 - 1310 001c 002E cmp r6, #0 - 1311 001e 04D0 beq .L102 -1026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1312 .loc 1 1026 0 is_stmt 0 discriminator 1 - 1313 0020 FFF7FEFF bl HAL_GetTick - 1314 .LVL95: - 1315 0024 C01B subs r0, r0, r7 - 1316 0026 B042 cmp r0, r6 - 1317 0028 F1D9 bls .L101 - 1318 .L102: -1029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1319 .loc 1 1029 0 is_stmt 1 - 1320 002a AB6D ldr r3, [r5, #88] - 1321 002c 0422 movs r2, #4 - 1322 002e 1343 orrs r3, r2 - 1323 0030 AB65 str r3, [r5, #88] -1032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1324 .loc 1 1032 0 - 1325 0032 5423 movs r3, #84 - 1326 0034 0022 movs r2, #0 - 1327 0036 EA54 strb r2, [r5, r3] -1034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1328 .loc 1 1034 0 - 1329 0038 0320 movs r0, #3 - 1330 003a 10E0 b .L103 - 1331 .L109: -1039:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1332 .loc 1 1039 0 - 1333 003c 802C cmp r4, #128 - 1334 003e 0FD0 beq .L110 -1056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1335 .loc 1 1056 0 - 1336 0040 6B6B ldr r3, [r5, #52] - 1337 0042 002B cmp r3, #0 - 1338 0044 08D1 bne .L107 -1059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1339 .loc 1 1059 0 - 1340 0046 A96D ldr r1, [r5, #88] - 1341 0048 8023 movs r3, #128 - 1342 004a DB00 lsls r3, r3, #3 - 1343 004c 0B43 orrs r3, r1 - 1344 004e AB65 str r3, [r5, #88] -1062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1345 .loc 1 1062 0 - 1346 0050 EB6D ldr r3, [r5, #92] - 1347 0052 0221 movs r1, #2 - ARM GAS /tmp/ccHnSxqq.s page 66 - - - 1348 0054 0B43 orrs r3, r1 - 1349 0056 EB65 str r3, [r5, #92] - 1350 .L107: -1066:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** break; - 1351 .loc 1 1066 0 - 1352 0058 1023 movs r3, #16 - 1353 005a 1360 str r3, [r2] -1071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1354 .loc 1 1071 0 - 1355 005c 0020 movs r0, #0 - 1356 .L103: -1072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1357 .loc 1 1072 0 - 1358 @ sp needed - 1359 .LVL96: - 1360 .LVL97: - 1361 .LVL98: - 1362 .LVL99: - 1363 005e F8BD pop {r3, r4, r5, r6, r7, pc} - 1364 .LVL100: - 1365 .L110: -1044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1366 .loc 1 1044 0 - 1367 0060 A96D ldr r1, [r5, #88] - 1368 0062 8023 movs r3, #128 - 1369 0064 5B02 lsls r3, r3, #9 - 1370 0066 0B43 orrs r3, r1 - 1371 0068 AB65 str r3, [r5, #88] -1047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** break; - 1372 .loc 1 1047 0 - 1373 006a 8023 movs r3, #128 - 1374 006c 1360 str r3, [r2] -1071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1375 .loc 1 1071 0 - 1376 006e 0020 movs r0, #0 -1048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1377 .loc 1 1048 0 - 1378 0070 F5E7 b .L103 - 1379 .cfi_endproc - 1380 .LFE46: - 1382 .section .text.HAL_ADC_Start_IT,"ax",%progbits - 1383 .align 1 - 1384 .global HAL_ADC_Start_IT - 1385 .syntax unified - 1386 .code 16 - 1387 .thumb_func - 1388 .fpu softvfp - 1390 HAL_ADC_Start_IT: - 1391 .LFB47: -1093:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 1392 .loc 1 1093 0 - 1393 .cfi_startproc - 1394 @ args = 0, pretend = 0, frame = 0 - 1395 @ frame_needed = 0, uses_anonymous_args = 0 - 1396 .LVL101: - 1397 0000 10B5 push {r4, lr} - 1398 .LCFI10: - ARM GAS /tmp/ccHnSxqq.s page 67 - - - 1399 .cfi_def_cfa_offset 8 - 1400 .cfi_offset 4, -8 - 1401 .cfi_offset 14, -4 - 1402 0002 0400 movs r4, r0 - 1403 .LVL102: -1100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1404 .loc 1 1100 0 - 1405 0004 0368 ldr r3, [r0] - 1406 0006 9B68 ldr r3, [r3, #8] - 1407 0008 5B07 lsls r3, r3, #29 - 1408 000a 36D4 bmi .L117 -1103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1409 .loc 1 1103 0 - 1410 000c 5423 movs r3, #84 - 1411 000e C35C ldrb r3, [r0, r3] - 1412 0010 012B cmp r3, #1 - 1413 0012 34D0 beq .L118 -1103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1414 .loc 1 1103 0 is_stmt 0 discriminator 2 - 1415 0014 5423 movs r3, #84 - 1416 0016 0122 movs r2, #1 - 1417 0018 C254 strb r2, [r0, r3] -1108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1418 .loc 1 1108 0 is_stmt 1 discriminator 2 - 1419 001a C369 ldr r3, [r0, #28] - 1420 001c 012B cmp r3, #1 - 1421 001e 21D1 bne .L121 -1094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1422 .loc 1 1094 0 - 1423 0020 0020 movs r0, #0 - 1424 .LVL103: - 1425 .L113: -1119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A - 1426 .loc 1 1119 0 - 1427 0022 A36D ldr r3, [r4, #88] - 1428 0024 174A ldr r2, .L122 - 1429 0026 1A40 ands r2, r3 - 1430 0028 8023 movs r3, #128 - 1431 002a 5B00 lsls r3, r3, #1 - 1432 002c 1343 orrs r3, r2 - 1433 002e A365 str r3, [r4, #88] -1124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1434 .loc 1 1124 0 - 1435 0030 0023 movs r3, #0 - 1436 0032 E365 str r3, [r4, #92] -1129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1437 .loc 1 1129 0 - 1438 0034 5422 movs r2, #84 - 1439 0036 A354 strb r3, [r4, r2] -1134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1440 .loc 1 1134 0 - 1441 0038 2368 ldr r3, [r4] - 1442 003a 383A subs r2, r2, #56 - 1443 003c 1A60 str r2, [r3] -1138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1444 .loc 1 1138 0 - 1445 003e 6369 ldr r3, [r4, #20] - ARM GAS /tmp/ccHnSxqq.s page 68 - - - 1446 0040 082B cmp r3, #8 - 1447 0042 14D1 bne .L120 -1141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); - 1448 .loc 1 1141 0 - 1449 0044 2268 ldr r2, [r4] - 1450 0046 5368 ldr r3, [r2, #4] - 1451 0048 0421 movs r1, #4 - 1452 004a 8B43 bics r3, r1 - 1453 004c 5360 str r3, [r2, #4] -1142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** break; - 1454 .loc 1 1142 0 - 1455 004e 2268 ldr r2, [r4] - 1456 0050 5368 ldr r3, [r2, #4] - 1457 0052 1431 adds r1, r1, #20 - 1458 0054 0B43 orrs r3, r1 - 1459 0056 5360 str r3, [r2, #4] - 1460 .L116: -1154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1461 .loc 1 1154 0 - 1462 0058 2268 ldr r2, [r4] - 1463 005a 9368 ldr r3, [r2, #8] - 1464 005c 0421 movs r1, #4 - 1465 005e 0B43 orrs r3, r1 - 1466 0060 9360 str r3, [r2, #8] - 1467 .L112: -1164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1468 .loc 1 1164 0 - 1469 @ sp needed - 1470 .LVL104: - 1471 0062 10BD pop {r4, pc} - 1472 .LVL105: - 1473 .L121: -1110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1474 .loc 1 1110 0 - 1475 0064 FFF7FEFF bl ADC_Enable - 1476 .LVL106: -1114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1477 .loc 1 1114 0 - 1478 0068 0028 cmp r0, #0 - 1479 006a DAD0 beq .L113 - 1480 006c F9E7 b .L112 - 1481 .LVL107: - 1482 .L120: -1146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** break; - 1483 .loc 1 1146 0 - 1484 006e 2268 ldr r2, [r4] - 1485 0070 5368 ldr r3, [r2, #4] - 1486 0072 1C21 movs r1, #28 - 1487 0074 0B43 orrs r3, r1 - 1488 0076 5360 str r3, [r2, #4] -1147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1489 .loc 1 1147 0 - 1490 0078 EEE7 b .L116 - 1491 .LVL108: - 1492 .L117: -1159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1493 .loc 1 1159 0 - ARM GAS /tmp/ccHnSxqq.s page 69 - - - 1494 007a 0220 movs r0, #2 - 1495 .LVL109: - 1496 007c F1E7 b .L112 - 1497 .LVL110: - 1498 .L118: -1103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1499 .loc 1 1103 0 - 1500 007e 0220 movs r0, #2 - 1501 .LVL111: - 1502 0080 EFE7 b .L112 - 1503 .L123: - 1504 0082 C046 .align 2 - 1505 .L122: - 1506 0084 FEF0FFFF .word -3842 - 1507 .cfi_endproc - 1508 .LFE47: - 1510 .section .text.HAL_ADC_Stop_IT,"ax",%progbits - 1511 .align 1 - 1512 .global HAL_ADC_Stop_IT - 1513 .syntax unified - 1514 .code 16 - 1515 .thumb_func - 1516 .fpu softvfp - 1518 HAL_ADC_Stop_IT: - 1519 .LFB48: -1174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 1520 .loc 1 1174 0 - 1521 .cfi_startproc - 1522 @ args = 0, pretend = 0, frame = 0 - 1523 @ frame_needed = 0, uses_anonymous_args = 0 - 1524 .LVL112: - 1525 0000 10B5 push {r4, lr} - 1526 .LCFI11: - 1527 .cfi_def_cfa_offset 8 - 1528 .cfi_offset 4, -8 - 1529 .cfi_offset 14, -4 - 1530 0002 0400 movs r4, r0 - 1531 .LVL113: -1181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1532 .loc 1 1181 0 - 1533 0004 5423 movs r3, #84 - 1534 0006 C35C ldrb r3, [r0, r3] - 1535 0008 012B cmp r3, #1 - 1536 000a 1CD0 beq .L127 -1181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1537 .loc 1 1181 0 is_stmt 0 discriminator 2 - 1538 000c 5423 movs r3, #84 - 1539 000e 0122 movs r2, #1 - 1540 0010 C254 strb r2, [r0, r3] -1184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1541 .loc 1 1184 0 is_stmt 1 discriminator 2 - 1542 0012 FFF7FEFF bl ADC_ConversionStop - 1543 .LVL114: -1187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1544 .loc 1 1187 0 discriminator 2 - 1545 0016 0028 cmp r0, #0 - 1546 0018 03D0 beq .L128 - ARM GAS /tmp/ccHnSxqq.s page 70 - - - 1547 .LVL115: - 1548 .L126: -1207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1549 .loc 1 1207 0 - 1550 001a 5423 movs r3, #84 - 1551 001c 0022 movs r2, #0 - 1552 001e E254 strb r2, [r4, r3] - 1553 .LVL116: - 1554 .L125: -1211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1555 .loc 1 1211 0 - 1556 @ sp needed - 1557 .LVL117: - 1558 0020 10BD pop {r4, pc} - 1559 .LVL118: - 1560 .L128: -1191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1561 .loc 1 1191 0 - 1562 0022 2268 ldr r2, [r4] - 1563 0024 5368 ldr r3, [r2, #4] - 1564 0026 1C21 movs r1, #28 - 1565 0028 8B43 bics r3, r1 - 1566 002a 5360 str r3, [r2, #4] -1194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1567 .loc 1 1194 0 - 1568 002c 2000 movs r0, r4 - 1569 .LVL119: - 1570 002e FFF7FEFF bl ADC_Disable - 1571 .LVL120: -1197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1572 .loc 1 1197 0 - 1573 0032 0028 cmp r0, #0 - 1574 0034 F1D1 bne .L126 -1200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 1575 .loc 1 1200 0 - 1576 0036 A36D ldr r3, [r4, #88] - 1577 0038 044A ldr r2, .L129 - 1578 003a 1340 ands r3, r2 - 1579 003c 0432 adds r2, r2, #4 - 1580 003e FF32 adds r2, r2, #255 - 1581 0040 1343 orrs r3, r2 - 1582 0042 A365 str r3, [r4, #88] - 1583 0044 E9E7 b .L126 - 1584 .LVL121: - 1585 .L127: -1181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1586 .loc 1 1181 0 - 1587 0046 0220 movs r0, #2 - 1588 .LVL122: - 1589 0048 EAE7 b .L125 - 1590 .L130: - 1591 004a C046 .align 2 - 1592 .L129: - 1593 004c FEFEFFFF .word -258 - 1594 .cfi_endproc - 1595 .LFE48: - 1597 .section .text.HAL_ADC_Start_DMA,"ax",%progbits - ARM GAS /tmp/ccHnSxqq.s page 71 - - - 1598 .align 1 - 1599 .global HAL_ADC_Start_DMA - 1600 .syntax unified - 1601 .code 16 - 1602 .thumb_func - 1603 .fpu softvfp - 1605 HAL_ADC_Start_DMA: - 1606 .LFB49: -1224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 1607 .loc 1 1224 0 - 1608 .cfi_startproc - 1609 @ args = 0, pretend = 0, frame = 0 - 1610 @ frame_needed = 0, uses_anonymous_args = 0 - 1611 .LVL123: - 1612 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 1613 .LCFI12: - 1614 .cfi_def_cfa_offset 24 - 1615 .cfi_offset 3, -24 - 1616 .cfi_offset 4, -20 - 1617 .cfi_offset 5, -16 - 1618 .cfi_offset 6, -12 - 1619 .cfi_offset 7, -8 - 1620 .cfi_offset 14, -4 - 1621 0002 0400 movs r4, r0 - 1622 0004 0E00 movs r6, r1 - 1623 0006 1700 movs r7, r2 - 1624 .LVL124: -1231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1625 .loc 1 1231 0 - 1626 0008 0368 ldr r3, [r0] - 1627 000a 9B68 ldr r3, [r3, #8] - 1628 000c 5B07 lsls r3, r3, #29 - 1629 000e 3ED4 bmi .L134 -1234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1630 .loc 1 1234 0 - 1631 0010 5423 movs r3, #84 - 1632 0012 C35C ldrb r3, [r0, r3] - 1633 0014 012B cmp r3, #1 - 1634 0016 3CD0 beq .L135 -1234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1635 .loc 1 1234 0 is_stmt 0 discriminator 2 - 1636 0018 5423 movs r3, #84 - 1637 001a 0122 movs r2, #1 - 1638 .LVL125: - 1639 001c C254 strb r2, [r0, r3] -1239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1640 .loc 1 1239 0 is_stmt 1 discriminator 2 - 1641 001e C369 ldr r3, [r0, #28] - 1642 0020 012B cmp r3, #1 - 1643 0022 32D0 beq .L136 -1241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1644 .loc 1 1241 0 - 1645 0024 FFF7FEFF bl ADC_Enable - 1646 .LVL126: - 1647 0028 051E subs r5, r0, #0 - 1648 .LVL127: -1245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - ARM GAS /tmp/ccHnSxqq.s page 72 - - - 1649 .loc 1 1245 0 - 1650 002a 2CD1 bne .L132 - 1651 .LVL128: - 1652 .L133: -1250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A - 1653 .loc 1 1250 0 - 1654 002c A36D ldr r3, [r4, #88] - 1655 002e 1A4A ldr r2, .L137 - 1656 0030 1A40 ands r2, r3 - 1657 0032 8023 movs r3, #128 - 1658 0034 5B00 lsls r3, r3, #1 - 1659 0036 1343 orrs r3, r2 - 1660 0038 A365 str r3, [r4, #88] -1255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1661 .loc 1 1255 0 - 1662 003a 0023 movs r3, #0 - 1663 003c E365 str r3, [r4, #92] -1260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1664 .loc 1 1260 0 - 1665 003e 5422 movs r2, #84 - 1666 0040 A354 strb r3, [r4, r2] -1263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1667 .loc 1 1263 0 - 1668 0042 236D ldr r3, [r4, #80] - 1669 0044 154A ldr r2, .L137+4 - 1670 0046 DA62 str r2, [r3, #44] -1266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1671 .loc 1 1266 0 - 1672 0048 236D ldr r3, [r4, #80] - 1673 004a 154A ldr r2, .L137+8 - 1674 004c 1A63 str r2, [r3, #48] -1269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1675 .loc 1 1269 0 - 1676 004e 236D ldr r3, [r4, #80] - 1677 0050 144A ldr r2, .L137+12 - 1678 0052 5A63 str r2, [r3, #52] -1278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1679 .loc 1 1278 0 - 1680 0054 2368 ldr r3, [r4] - 1681 0056 1C22 movs r2, #28 - 1682 0058 1A60 str r2, [r3] -1281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1683 .loc 1 1281 0 - 1684 005a 2268 ldr r2, [r4] - 1685 005c 5368 ldr r3, [r2, #4] - 1686 005e 1021 movs r1, #16 - 1687 0060 0B43 orrs r3, r1 - 1688 0062 5360 str r3, [r2, #4] -1284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1689 .loc 1 1284 0 - 1690 0064 2268 ldr r2, [r4] - 1691 0066 D368 ldr r3, [r2, #12] - 1692 0068 0F39 subs r1, r1, #15 - 1693 006a 0B43 orrs r3, r1 - 1694 006c D360 str r3, [r2, #12] -1287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1695 .loc 1 1287 0 - ARM GAS /tmp/ccHnSxqq.s page 73 - - - 1696 006e 2168 ldr r1, [r4] - 1697 0070 4031 adds r1, r1, #64 - 1698 0072 3B00 movs r3, r7 - 1699 0074 3200 movs r2, r6 - 1700 0076 206D ldr r0, [r4, #80] - 1701 0078 FFF7FEFF bl HAL_DMA_Start_IT - 1702 .LVL129: -1293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1703 .loc 1 1293 0 - 1704 007c 2268 ldr r2, [r4] - 1705 007e 9368 ldr r3, [r2, #8] - 1706 0080 0421 movs r1, #4 - 1707 0082 0B43 orrs r3, r1 - 1708 0084 9360 str r3, [r2, #8] - 1709 .L132: -1303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1710 .loc 1 1303 0 - 1711 0086 2800 movs r0, r5 - 1712 @ sp needed - 1713 .LVL130: - 1714 .LVL131: - 1715 .LVL132: - 1716 0088 F8BD pop {r3, r4, r5, r6, r7, pc} - 1717 .LVL133: - 1718 .L136: -1225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1719 .loc 1 1225 0 - 1720 008a 0025 movs r5, #0 - 1721 008c CEE7 b .L133 - 1722 .LVL134: - 1723 .L134: -1298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1724 .loc 1 1298 0 - 1725 008e 0225 movs r5, #2 - 1726 0090 F9E7 b .L132 - 1727 .L135: -1234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1728 .loc 1 1234 0 - 1729 0092 0225 movs r5, #2 - 1730 0094 F7E7 b .L132 - 1731 .L138: - 1732 0096 C046 .align 2 - 1733 .L137: - 1734 0098 FEF0FFFF .word -3842 - 1735 009c 00000000 .word ADC_DMAConvCplt - 1736 00a0 00000000 .word ADC_DMAHalfConvCplt - 1737 00a4 00000000 .word ADC_DMAError - 1738 .cfi_endproc - 1739 .LFE49: - 1741 .section .text.HAL_ADC_Stop_DMA,"ax",%progbits - 1742 .align 1 - 1743 .global HAL_ADC_Stop_DMA - 1744 .syntax unified - 1745 .code 16 - 1746 .thumb_func - 1747 .fpu softvfp - 1749 HAL_ADC_Stop_DMA: - ARM GAS /tmp/ccHnSxqq.s page 74 - - - 1750 .LFB50: -1314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 1751 .loc 1 1314 0 - 1752 .cfi_startproc - 1753 @ args = 0, pretend = 0, frame = 0 - 1754 @ frame_needed = 0, uses_anonymous_args = 0 - 1755 .LVL135: - 1756 0000 70B5 push {r4, r5, r6, lr} - 1757 .LCFI13: - 1758 .cfi_def_cfa_offset 16 - 1759 .cfi_offset 4, -16 - 1760 .cfi_offset 5, -12 - 1761 .cfi_offset 6, -8 - 1762 .cfi_offset 14, -4 - 1763 0002 0500 movs r5, r0 - 1764 .LVL136: -1321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1765 .loc 1 1321 0 - 1766 0004 5423 movs r3, #84 - 1767 0006 C35C ldrb r3, [r0, r3] - 1768 0008 012B cmp r3, #1 - 1769 000a 32D0 beq .L145 -1321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1770 .loc 1 1321 0 is_stmt 0 discriminator 2 - 1771 000c 5423 movs r3, #84 - 1772 000e 0122 movs r2, #1 - 1773 0010 C254 strb r2, [r0, r3] -1324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1774 .loc 1 1324 0 is_stmt 1 discriminator 2 - 1775 0012 FFF7FEFF bl ADC_ConversionStop - 1776 .LVL137: - 1777 0016 041E subs r4, r0, #0 - 1778 .LVL138: -1327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1779 .loc 1 1327 0 discriminator 2 - 1780 0018 04D0 beq .L146 - 1781 .LVL139: - 1782 .L141: -1370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1783 .loc 1 1370 0 - 1784 001a 5423 movs r3, #84 - 1785 001c 0022 movs r2, #0 - 1786 001e EA54 strb r2, [r5, r3] - 1787 .LVL140: - 1788 .L140: -1374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1789 .loc 1 1374 0 - 1790 0020 2000 movs r0, r4 - 1791 @ sp needed - 1792 .LVL141: - 1793 0022 70BD pop {r4, r5, r6, pc} - 1794 .LVL142: - 1795 .L146: -1330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1796 .loc 1 1330 0 - 1797 0024 2A68 ldr r2, [r5] - 1798 0026 D368 ldr r3, [r2, #12] - ARM GAS /tmp/ccHnSxqq.s page 75 - - - 1799 0028 0121 movs r1, #1 - 1800 002a 8B43 bics r3, r1 - 1801 002c D360 str r3, [r2, #12] -1334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1802 .loc 1 1334 0 - 1803 002e 286D ldr r0, [r5, #80] - 1804 .LVL143: - 1805 0030 FFF7FEFF bl HAL_DMA_Abort - 1806 .LVL144: - 1807 0034 041E subs r4, r0, #0 - 1808 .LVL145: -1337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1809 .loc 1 1337 0 - 1810 0036 03D0 beq .L142 -1340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1811 .loc 1 1340 0 - 1812 0038 AB6D ldr r3, [r5, #88] - 1813 003a 4022 movs r2, #64 - 1814 003c 1343 orrs r3, r2 - 1815 003e AB65 str r3, [r5, #88] - 1816 .L142: -1344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1817 .loc 1 1344 0 - 1818 0040 2A68 ldr r2, [r5] - 1819 0042 5368 ldr r3, [r2, #4] - 1820 0044 1021 movs r1, #16 - 1821 0046 8B43 bics r3, r1 - 1822 0048 5360 str r3, [r2, #4] -1349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1823 .loc 1 1349 0 - 1824 004a 002C cmp r4, #0 - 1825 004c 0DD1 bne .L143 -1351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1826 .loc 1 1351 0 - 1827 004e 2800 movs r0, r5 - 1828 .LVL146: - 1829 0050 FFF7FEFF bl ADC_Disable - 1830 .LVL147: - 1831 0054 0400 movs r4, r0 - 1832 .LVL148: - 1833 .L144: -1359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1834 .loc 1 1359 0 - 1835 0056 002C cmp r4, #0 - 1836 0058 DFD1 bne .L141 -1362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 1837 .loc 1 1362 0 - 1838 005a AB6D ldr r3, [r5, #88] - 1839 005c 064A ldr r2, .L147 - 1840 005e 1340 ands r3, r2 - 1841 0060 0432 adds r2, r2, #4 - 1842 0062 FF32 adds r2, r2, #255 - 1843 0064 1343 orrs r3, r2 - 1844 0066 AB65 str r3, [r5, #88] - 1845 0068 D7E7 b .L141 - 1846 .LVL149: - 1847 .L143: - ARM GAS /tmp/ccHnSxqq.s page 76 - - -1355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1848 .loc 1 1355 0 - 1849 006a 2800 movs r0, r5 - 1850 .LVL150: - 1851 006c FFF7FEFF bl ADC_Disable - 1852 .LVL151: - 1853 0070 F1E7 b .L144 - 1854 .LVL152: - 1855 .L145: -1321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1856 .loc 1 1321 0 - 1857 0072 0224 movs r4, #2 - 1858 0074 D4E7 b .L140 - 1859 .L148: - 1860 0076 C046 .align 2 - 1861 .L147: - 1862 0078 FEFEFFFF .word -258 - 1863 .cfi_endproc - 1864 .LFE50: - 1866 .section .text.HAL_ADC_GetValue,"ax",%progbits - 1867 .align 1 - 1868 .global HAL_ADC_GetValue - 1869 .syntax unified - 1870 .code 16 - 1871 .thumb_func - 1872 .fpu softvfp - 1874 HAL_ADC_GetValue: - 1875 .LFB51: -1396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 1876 .loc 1 1396 0 - 1877 .cfi_startproc - 1878 @ args = 0, pretend = 0, frame = 0 - 1879 @ frame_needed = 0, uses_anonymous_args = 0 - 1880 @ link register save eliminated. - 1881 .LVL153: -1404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1882 .loc 1 1404 0 - 1883 0000 0368 ldr r3, [r0] - 1884 0002 186C ldr r0, [r3, #64] - 1885 .LVL154: -1405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1886 .loc 1 1405 0 - 1887 @ sp needed - 1888 0004 7047 bx lr - 1889 .cfi_endproc - 1890 .LFE51: - 1892 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits - 1893 .align 1 - 1894 .weak HAL_ADC_ConvCpltCallback - 1895 .syntax unified - 1896 .code 16 - 1897 .thumb_func - 1898 .fpu softvfp - 1900 HAL_ADC_ConvCpltCallback: - 1901 .LFB53: -1535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ - 1902 .loc 1 1535 0 - ARM GAS /tmp/ccHnSxqq.s page 77 - - - 1903 .cfi_startproc - 1904 @ args = 0, pretend = 0, frame = 0 - 1905 @ frame_needed = 0, uses_anonymous_args = 0 - 1906 @ link register save eliminated. - 1907 .LVL155: -1542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1908 .loc 1 1542 0 - 1909 @ sp needed - 1910 0000 7047 bx lr - 1911 .cfi_endproc - 1912 .LFE53: - 1914 .section .text.ADC_DMAConvCplt,"ax",%progbits - 1915 .align 1 - 1916 .syntax unified - 1917 .code 16 - 1918 .thumb_func - 1919 .fpu softvfp - 1921 ADC_DMAConvCplt: - 1922 .LFB64: -2083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ - 1923 .loc 1 2083 0 - 1924 .cfi_startproc - 1925 @ args = 0, pretend = 0, frame = 0 - 1926 @ frame_needed = 0, uses_anonymous_args = 0 - 1927 .LVL156: - 1928 0000 10B5 push {r4, lr} - 1929 .LCFI14: - 1930 .cfi_def_cfa_offset 8 - 1931 .cfi_offset 4, -8 - 1932 .cfi_offset 14, -4 -2085:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1933 .loc 1 2085 0 - 1934 0002 836A ldr r3, [r0, #40] - 1935 .LVL157: -2088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1936 .loc 1 2088 0 - 1937 0004 9A6D ldr r2, [r3, #88] - 1938 0006 5021 movs r1, #80 - 1939 0008 1142 tst r1, r2 - 1940 000a 03D0 beq .L156 -2133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1941 .loc 1 2133 0 - 1942 000c 1B6D ldr r3, [r3, #80] - 1943 .LVL158: - 1944 000e 5B6B ldr r3, [r3, #52] - 1945 0010 9847 blx r3 - 1946 .LVL159: - 1947 .L151: -2135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1948 .loc 1 2135 0 - 1949 @ sp needed - 1950 0012 10BD pop {r4, pc} - 1951 .LVL160: - 1952 .L156: -2091:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1953 .loc 1 2091 0 - 1954 0014 996D ldr r1, [r3, #88] - ARM GAS /tmp/ccHnSxqq.s page 78 - - - 1955 0016 8022 movs r2, #128 - 1956 0018 9200 lsls r2, r2, #2 - 1957 001a 0A43 orrs r2, r1 - 1958 001c 9A65 str r2, [r3, #88] -2095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) - 1959 .loc 1 2095 0 - 1960 001e 1A68 ldr r2, [r3] - 1961 0020 D068 ldr r0, [r2, #12] - 1962 .LVL161: - 1963 0022 C021 movs r1, #192 - 1964 0024 0901 lsls r1, r1, #4 - 1965 0026 0842 tst r0, r1 - 1966 0028 13D1 bne .L153 -2095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) - 1967 .loc 1 2095 0 is_stmt 0 discriminator 1 - 1968 002a 196A ldr r1, [r3, #32] - 1969 002c 0029 cmp r1, #0 - 1970 002e 10D1 bne .L153 -2099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1971 .loc 1 2099 0 is_stmt 1 - 1972 0030 1168 ldr r1, [r2] - 1973 0032 0907 lsls r1, r1, #28 - 1974 0034 0DD5 bpl .L153 -2103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 1975 .loc 1 2103 0 - 1976 0036 9168 ldr r1, [r2, #8] - 1977 0038 4907 lsls r1, r1, #29 - 1978 003a 0ED4 bmi .L154 -2109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 1979 .loc 1 2109 0 - 1980 003c 5168 ldr r1, [r2, #4] - 1981 003e 0C20 movs r0, #12 - 1982 0040 8143 bics r1, r0 - 1983 0042 5160 str r1, [r2, #4] -2112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 1984 .loc 1 2112 0 - 1985 0044 9A6D ldr r2, [r3, #88] - 1986 0046 0949 ldr r1, .L157 - 1987 0048 0A40 ands r2, r1 - 1988 004a 0431 adds r1, r1, #4 - 1989 004c FF31 adds r1, r1, #255 - 1990 004e 0A43 orrs r2, r1 - 1991 0050 9A65 str r2, [r3, #88] - 1992 .L153: -2128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 1993 .loc 1 2128 0 - 1994 0052 1800 movs r0, r3 - 1995 0054 FFF7FEFF bl HAL_ADC_ConvCpltCallback - 1996 .LVL162: - 1997 0058 DBE7 b .L151 - 1998 .LVL163: - 1999 .L154: -2119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2000 .loc 1 2119 0 - 2001 005a 9A6D ldr r2, [r3, #88] - 2002 005c 2021 movs r1, #32 - 2003 005e 0A43 orrs r2, r1 - ARM GAS /tmp/ccHnSxqq.s page 79 - - - 2004 0060 9A65 str r2, [r3, #88] -2122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2005 .loc 1 2122 0 - 2006 0062 DA6D ldr r2, [r3, #92] - 2007 0064 1F39 subs r1, r1, #31 - 2008 0066 0A43 orrs r2, r1 - 2009 0068 DA65 str r2, [r3, #92] - 2010 006a F2E7 b .L153 - 2011 .L158: - 2012 .align 2 - 2013 .L157: - 2014 006c FEFEFFFF .word -258 - 2015 .cfi_endproc - 2016 .LFE64: - 2018 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits - 2019 .align 1 - 2020 .weak HAL_ADC_ConvHalfCpltCallback - 2021 .syntax unified - 2022 .code 16 - 2023 .thumb_func - 2024 .fpu softvfp - 2026 HAL_ADC_ConvHalfCpltCallback: - 2027 .LFB54: -1550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ - 2028 .loc 1 1550 0 - 2029 .cfi_startproc - 2030 @ args = 0, pretend = 0, frame = 0 - 2031 @ frame_needed = 0, uses_anonymous_args = 0 - 2032 @ link register save eliminated. - 2033 .LVL164: -1557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2034 .loc 1 1557 0 - 2035 @ sp needed - 2036 0000 7047 bx lr - 2037 .cfi_endproc - 2038 .LFE54: - 2040 .section .text.ADC_DMAHalfConvCplt,"ax",%progbits - 2041 .align 1 - 2042 .syntax unified - 2043 .code 16 - 2044 .thumb_func - 2045 .fpu softvfp - 2047 ADC_DMAHalfConvCplt: - 2048 .LFB65: -2143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ - 2049 .loc 1 2143 0 - 2050 .cfi_startproc - 2051 @ args = 0, pretend = 0, frame = 0 - 2052 @ frame_needed = 0, uses_anonymous_args = 0 - 2053 .LVL165: - 2054 0000 10B5 push {r4, lr} - 2055 .LCFI15: - 2056 .cfi_def_cfa_offset 8 - 2057 .cfi_offset 4, -8 - 2058 .cfi_offset 14, -4 -2145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2059 .loc 1 2145 0 - ARM GAS /tmp/ccHnSxqq.s page 80 - - - 2060 0002 806A ldr r0, [r0, #40] - 2061 .LVL166: -2148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2062 .loc 1 2148 0 - 2063 0004 FFF7FEFF bl HAL_ADC_ConvHalfCpltCallback - 2064 .LVL167: -2149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2065 .loc 1 2149 0 - 2066 @ sp needed - 2067 0008 10BD pop {r4, pc} - 2068 .cfi_endproc - 2069 .LFE65: - 2071 .section .text.HAL_ADC_LevelOutOfWindowCallback,"ax",%progbits - 2072 .align 1 - 2073 .weak HAL_ADC_LevelOutOfWindowCallback - 2074 .syntax unified - 2075 .code 16 - 2076 .thumb_func - 2077 .fpu softvfp - 2079 HAL_ADC_LevelOutOfWindowCallback: - 2080 .LFB55: -1565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ - 2081 .loc 1 1565 0 - 2082 .cfi_startproc - 2083 @ args = 0, pretend = 0, frame = 0 - 2084 @ frame_needed = 0, uses_anonymous_args = 0 - 2085 @ link register save eliminated. - 2086 .LVL168: -1572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2087 .loc 1 1572 0 - 2088 @ sp needed - 2089 0000 7047 bx lr - 2090 .cfi_endproc - 2091 .LFE55: - 2093 .section .text.HAL_ADC_ErrorCallback,"ax",%progbits - 2094 .align 1 - 2095 .weak HAL_ADC_ErrorCallback - 2096 .syntax unified - 2097 .code 16 - 2098 .thumb_func - 2099 .fpu softvfp - 2101 HAL_ADC_ErrorCallback: - 2102 .LFB56: -1587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ - 2103 .loc 1 1587 0 - 2104 .cfi_startproc - 2105 @ args = 0, pretend = 0, frame = 0 - 2106 @ frame_needed = 0, uses_anonymous_args = 0 - 2107 @ link register save eliminated. - 2108 .LVL169: -1594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2109 .loc 1 1594 0 - 2110 @ sp needed - 2111 0000 7047 bx lr - 2112 .cfi_endproc - 2113 .LFE56: - 2115 .section .text.ADC_DMAError,"ax",%progbits - ARM GAS /tmp/ccHnSxqq.s page 81 - - - 2116 .align 1 - 2117 .syntax unified - 2118 .code 16 - 2119 .thumb_func - 2120 .fpu softvfp - 2122 ADC_DMAError: - 2123 .LFB66: -2157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ - 2124 .loc 1 2157 0 - 2125 .cfi_startproc - 2126 @ args = 0, pretend = 0, frame = 0 - 2127 @ frame_needed = 0, uses_anonymous_args = 0 - 2128 .LVL170: - 2129 0000 10B5 push {r4, lr} - 2130 .LCFI16: - 2131 .cfi_def_cfa_offset 8 - 2132 .cfi_offset 4, -8 - 2133 .cfi_offset 14, -4 -2159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2134 .loc 1 2159 0 - 2135 0002 806A ldr r0, [r0, #40] - 2136 .LVL171: -2162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2137 .loc 1 2162 0 - 2138 0004 836D ldr r3, [r0, #88] - 2139 0006 4022 movs r2, #64 - 2140 0008 1343 orrs r3, r2 - 2141 000a 8365 str r3, [r0, #88] -2165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2142 .loc 1 2165 0 - 2143 000c C36D ldr r3, [r0, #92] - 2144 000e 3C3A subs r2, r2, #60 - 2145 0010 1343 orrs r3, r2 - 2146 0012 C365 str r3, [r0, #92] -2168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2147 .loc 1 2168 0 - 2148 0014 FFF7FEFF bl HAL_ADC_ErrorCallback - 2149 .LVL172: -2169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2150 .loc 1 2169 0 - 2151 @ sp needed - 2152 0018 10BD pop {r4, pc} - 2153 .cfi_endproc - 2154 .LFE66: - 2156 .section .text.HAL_ADC_IRQHandler,"ax",%progbits - 2157 .align 1 - 2158 .global HAL_ADC_IRQHandler - 2159 .syntax unified - 2160 .code 16 - 2161 .thumb_func - 2162 .fpu softvfp - 2164 HAL_ADC_IRQHandler: - 2165 .LFB52: -1413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 2166 .loc 1 1413 0 - 2167 .cfi_startproc - 2168 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccHnSxqq.s page 82 - - - 2169 @ frame_needed = 0, uses_anonymous_args = 0 - 2170 .LVL173: - 2171 0000 10B5 push {r4, lr} - 2172 .LCFI17: - 2173 .cfi_def_cfa_offset 8 - 2174 .cfi_offset 4, -8 - 2175 .cfi_offset 14, -4 - 2176 0002 0400 movs r4, r0 -1420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) - 2177 .loc 1 1420 0 - 2178 0004 0368 ldr r3, [r0] - 2179 0006 1A68 ldr r2, [r3] - 2180 0008 5207 lsls r2, r2, #29 - 2181 000a 02D5 bpl .L165 -1420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) - 2182 .loc 1 1420 0 is_stmt 0 discriminator 1 - 2183 000c 5A68 ldr r2, [r3, #4] - 2184 000e 5207 lsls r2, r2, #29 - 2185 0010 05D4 bmi .L166 - 2186 .L165: -1421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2187 .loc 1 1421 0 is_stmt 1 discriminator 3 - 2188 0012 1A68 ldr r2, [r3] -1420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) - 2189 .loc 1 1420 0 discriminator 3 - 2190 0014 1207 lsls r2, r2, #28 - 2191 0016 2CD5 bpl .L167 -1421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2192 .loc 1 1421 0 - 2193 0018 5A68 ldr r2, [r3, #4] - 2194 001a 1207 lsls r2, r2, #28 - 2195 001c 29D5 bpl .L167 - 2196 .L166: -1424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2197 .loc 1 1424 0 - 2198 001e A26D ldr r2, [r4, #88] - 2199 0020 D206 lsls r2, r2, #27 - 2200 0022 04D4 bmi .L168 -1427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2201 .loc 1 1427 0 - 2202 0024 A16D ldr r1, [r4, #88] - 2203 0026 8022 movs r2, #128 - 2204 0028 9200 lsls r2, r2, #2 - 2205 002a 0A43 orrs r2, r1 - 2206 002c A265 str r2, [r4, #88] - 2207 .L168: -1432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) - 2208 .loc 1 1432 0 - 2209 002e D968 ldr r1, [r3, #12] - 2210 0030 C022 movs r2, #192 - 2211 0032 1201 lsls r2, r2, #4 - 2212 0034 1142 tst r1, r2 - 2213 0036 13D1 bne .L169 -1432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) - 2214 .loc 1 1432 0 is_stmt 0 discriminator 1 - 2215 0038 226A ldr r2, [r4, #32] - 2216 003a 002A cmp r2, #0 - ARM GAS /tmp/ccHnSxqq.s page 83 - - - 2217 003c 10D1 bne .L169 -1436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2218 .loc 1 1436 0 is_stmt 1 - 2219 003e 1A68 ldr r2, [r3] - 2220 0040 1207 lsls r2, r2, #28 - 2221 0042 0DD5 bpl .L169 -1440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2222 .loc 1 1440 0 - 2223 0044 9A68 ldr r2, [r3, #8] - 2224 0046 5207 lsls r2, r2, #29 - 2225 0048 34D4 bmi .L170 -1446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2226 .loc 1 1446 0 - 2227 004a 5A68 ldr r2, [r3, #4] - 2228 004c 0C21 movs r1, #12 - 2229 004e 8A43 bics r2, r1 - 2230 0050 5A60 str r2, [r3, #4] -1449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, - 2231 .loc 1 1449 0 - 2232 0052 A36D ldr r3, [r4, #88] - 2233 0054 224A ldr r2, .L176 - 2234 0056 1340 ands r3, r2 - 2235 0058 0432 adds r2, r2, #4 - 2236 005a FF32 adds r2, r2, #255 - 2237 005c 1343 orrs r3, r2 - 2238 005e A365 str r3, [r4, #88] - 2239 .L169: -1468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2240 .loc 1 1468 0 - 2241 0060 2000 movs r0, r4 - 2242 .LVL174: - 2243 0062 FFF7FEFF bl HAL_ADC_ConvCpltCallback - 2244 .LVL175: -1480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2245 .loc 1 1480 0 - 2246 0066 A369 ldr r3, [r4, #24] - 2247 0068 012B cmp r3, #1 - 2248 006a 02D0 beq .L167 -1482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2249 .loc 1 1482 0 - 2250 006c 2368 ldr r3, [r4] - 2251 006e 0C22 movs r2, #12 - 2252 0070 1A60 str r2, [r3] - 2253 .L167: -1487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2254 .loc 1 1487 0 - 2255 0072 2368 ldr r3, [r4] - 2256 0074 1A68 ldr r2, [r3] - 2257 0076 1206 lsls r2, r2, #24 - 2258 0078 02D5 bpl .L171 -1487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2259 .loc 1 1487 0 is_stmt 0 discriminator 1 - 2260 007a 5B68 ldr r3, [r3, #4] - 2261 007c 1B06 lsls r3, r3, #24 - 2262 007e 22D4 bmi .L175 - 2263 .L171: -1502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - ARM GAS /tmp/ccHnSxqq.s page 84 - - - 2264 .loc 1 1502 0 is_stmt 1 - 2265 0080 2368 ldr r3, [r4] - 2266 0082 1A68 ldr r2, [r3] - 2267 0084 D206 lsls r2, r2, #27 - 2268 0086 14D5 bpl .L164 -1502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2269 .loc 1 1502 0 is_stmt 0 discriminator 1 - 2270 0088 5A68 ldr r2, [r3, #4] - 2271 008a D206 lsls r2, r2, #27 - 2272 008c 11D5 bpl .L164 -1510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) - 2273 .loc 1 1510 0 is_stmt 1 - 2274 008e 626B ldr r2, [r4, #52] - 2275 0090 002A cmp r2, #0 - 2276 0092 02D0 beq .L173 -1511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2277 .loc 1 1511 0 discriminator 1 - 2278 0094 DA68 ldr r2, [r3, #12] -1510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) - 2279 .loc 1 1510 0 discriminator 1 - 2280 0096 D207 lsls r2, r2, #31 - 2281 0098 08D5 bpl .L174 - 2282 .L173: -1514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2283 .loc 1 1514 0 - 2284 009a E26D ldr r2, [r4, #92] - 2285 009c 0221 movs r1, #2 - 2286 009e 0A43 orrs r2, r1 - 2287 00a0 E265 str r2, [r4, #92] -1517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2288 .loc 1 1517 0 - 2289 00a2 1022 movs r2, #16 - 2290 00a4 1A60 str r2, [r3] -1520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2291 .loc 1 1520 0 - 2292 00a6 2000 movs r0, r4 - 2293 00a8 FFF7FEFF bl HAL_ADC_ErrorCallback - 2294 .LVL176: - 2295 .L174: -1524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2296 .loc 1 1524 0 - 2297 00ac 2368 ldr r3, [r4] - 2298 00ae 1022 movs r2, #16 - 2299 00b0 1A60 str r2, [r3] - 2300 .L164: -1527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2301 .loc 1 1527 0 - 2302 @ sp needed - 2303 .LVL177: - 2304 00b2 10BD pop {r4, pc} - 2305 .LVL178: - 2306 .L170: -1456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2307 .loc 1 1456 0 - 2308 00b4 A36D ldr r3, [r4, #88] - 2309 00b6 2022 movs r2, #32 - 2310 00b8 1343 orrs r3, r2 - ARM GAS /tmp/ccHnSxqq.s page 85 - - - 2311 00ba A365 str r3, [r4, #88] -1459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2312 .loc 1 1459 0 - 2313 00bc E36D ldr r3, [r4, #92] - 2314 00be 1F3A subs r2, r2, #31 - 2315 00c0 1343 orrs r3, r2 - 2316 00c2 E365 str r3, [r4, #92] - 2317 00c4 CCE7 b .L169 - 2318 .LVL179: - 2319 .L175: -1490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2320 .loc 1 1490 0 - 2321 00c6 A26D ldr r2, [r4, #88] - 2322 00c8 8023 movs r3, #128 - 2323 00ca 5B02 lsls r3, r3, #9 - 2324 00cc 1343 orrs r3, r2 - 2325 00ce A365 str r3, [r4, #88] -1493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2326 .loc 1 1493 0 - 2327 00d0 2000 movs r0, r4 - 2328 00d2 FFF7FEFF bl HAL_ADC_LevelOutOfWindowCallback - 2329 .LVL180: -1496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2330 .loc 1 1496 0 - 2331 00d6 2368 ldr r3, [r4] - 2332 00d8 8022 movs r2, #128 - 2333 00da 1A60 str r2, [r3] - 2334 00dc D0E7 b .L171 - 2335 .L177: - 2336 00de C046 .align 2 - 2337 .L176: - 2338 00e0 FEFEFFFF .word -258 - 2339 .cfi_endproc - 2340 .LFE52: - 2342 .section .text.HAL_ADC_ConfigChannel,"ax",%progbits - 2343 .align 1 - 2344 .global HAL_ADC_ConfigChannel - 2345 .syntax unified - 2346 .code 16 - 2347 .thumb_func - 2348 .fpu softvfp - 2350 HAL_ADC_ConfigChannel: - 2351 .LFB57: -1638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 2352 .loc 1 1638 0 - 2353 .cfi_startproc - 2354 @ args = 0, pretend = 0, frame = 8 - 2355 @ frame_needed = 0, uses_anonymous_args = 0 - 2356 .LVL181: - 2357 0000 30B5 push {r4, r5, lr} - 2358 .LCFI18: - 2359 .cfi_def_cfa_offset 12 - 2360 .cfi_offset 4, -12 - 2361 .cfi_offset 5, -8 - 2362 .cfi_offset 14, -4 - 2363 0002 83B0 sub sp, sp, #12 - 2364 .LCFI19: - ARM GAS /tmp/ccHnSxqq.s page 86 - - - 2365 .cfi_def_cfa_offset 24 - 2366 0004 0400 movs r4, r0 - 2367 0006 0D00 movs r5, r1 -1645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2368 .loc 1 1645 0 - 2369 0008 5423 movs r3, #84 - 2370 000a C35C ldrb r3, [r0, r3] - 2371 000c 012B cmp r3, #1 - 2372 000e 69D0 beq .L189 -1645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2373 .loc 1 1645 0 is_stmt 0 discriminator 2 - 2374 0010 5423 movs r3, #84 - 2375 0012 0122 movs r2, #1 - 2376 0014 C254 strb r2, [r0, r3] -1652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2377 .loc 1 1652 0 is_stmt 1 discriminator 2 - 2378 0016 0368 ldr r3, [r0] - 2379 0018 9A68 ldr r2, [r3, #8] - 2380 001a 5207 lsls r2, r2, #29 - 2381 001c 1CD4 bmi .L190 -1661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2382 .loc 1 1661 0 - 2383 001e 324A ldr r2, .L191 - 2384 0020 4968 ldr r1, [r1, #4] - 2385 .LVL182: - 2386 0022 9142 cmp r1, r2 - 2387 0024 3FD0 beq .L181 -1664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2388 .loc 1 1664 0 - 2389 0026 996A ldr r1, [r3, #40] - 2390 0028 2A68 ldr r2, [r5] - 2391 002a 5203 lsls r2, r2, #13 - 2392 002c 520B lsrs r2, r2, #13 - 2393 002e 0A43 orrs r2, r1 - 2394 0030 9A62 str r2, [r3, #40] -1672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2395 .loc 1 1672 0 - 2396 0032 2B68 ldr r3, [r5] - 2397 0034 5B03 lsls r3, r3, #13 - 2398 0036 1ED5 bpl .L182 -1674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2399 .loc 1 1674 0 - 2400 0038 2C4A ldr r2, .L191+4 - 2401 003a 1168 ldr r1, [r2] - 2402 003c 8023 movs r3, #128 - 2403 003e 1B04 lsls r3, r3, #16 - 2404 0040 0B43 orrs r3, r1 - 2405 0042 1360 str r3, [r2] - 2406 .LVL183: - 2407 .LBB10: - 2408 .LBB11: -2179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2409 .loc 1 2179 0 - 2410 0044 2A4B ldr r3, .L191+8 - 2411 0046 1868 ldr r0, [r3] - 2412 .LVL184: - 2413 0048 2A49 ldr r1, .L191+12 - ARM GAS /tmp/ccHnSxqq.s page 87 - - - 2414 004a FFF7FEFF bl __aeabi_uidiv - 2415 .LVL185: - 2416 004e 8300 lsls r3, r0, #2 - 2417 0050 1818 adds r0, r3, r0 - 2418 0052 4300 lsls r3, r0, #1 - 2419 0054 0193 str r3, [sp, #4] - 2420 0056 0BE0 b .L183 - 2421 .LVL186: - 2422 .L190: - 2423 .LBE11: - 2424 .LBE10: -1655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Process unlocked */ - 2425 .loc 1 1655 0 - 2426 0058 836D ldr r3, [r0, #88] - 2427 005a 2022 movs r2, #32 - 2428 005c 1343 orrs r3, r2 - 2429 005e 8365 str r3, [r0, #88] -1657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** return HAL_ERROR; - 2430 .loc 1 1657 0 - 2431 0060 5423 movs r3, #84 - 2432 0062 0022 movs r2, #0 - 2433 0064 C254 strb r2, [r0, r3] -1658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2434 .loc 1 1658 0 - 2435 0066 0120 movs r0, #1 - 2436 .LVL187: - 2437 0068 1BE0 b .L179 - 2438 .LVL188: - 2439 .L184: - 2440 .LBB13: - 2441 .LBB12: - 2442 .loc 1 2183 0 - 2443 006a 019B ldr r3, [sp, #4] - 2444 006c 013B subs r3, r3, #1 - 2445 006e 0193 str r3, [sp, #4] - 2446 .L183: -2181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2447 .loc 1 2181 0 - 2448 0070 019B ldr r3, [sp, #4] - 2449 0072 002B cmp r3, #0 - 2450 0074 F9D1 bne .L184 - 2451 .LVL189: - 2452 .L182: - 2453 .LBE12: - 2454 .LBE13: -1681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2455 .loc 1 1681 0 - 2456 0076 2B68 ldr r3, [r5] - 2457 0078 9B03 lsls r3, r3, #14 - 2458 007a 05D5 bpl .L185 -1683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2459 .loc 1 1683 0 - 2460 007c 1B4A ldr r2, .L191+4 - 2461 007e 1168 ldr r1, [r2] - 2462 0080 8023 movs r3, #128 - 2463 0082 DB03 lsls r3, r3, #15 - 2464 0084 0B43 orrs r3, r1 - ARM GAS /tmp/ccHnSxqq.s page 88 - - - 2465 0086 1360 str r3, [r2] - 2466 .L185: -1688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2467 .loc 1 1688 0 - 2468 0088 2B68 ldr r3, [r5] - 2469 008a DB03 lsls r3, r3, #15 - 2470 008c 05D5 bpl .L186 -1690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2471 .loc 1 1690 0 - 2472 008e 174A ldr r2, .L191+4 - 2473 0090 1168 ldr r1, [r2] - 2474 0092 8023 movs r3, #128 - 2475 0094 5B04 lsls r3, r3, #17 - 2476 0096 0B43 orrs r3, r1 - 2477 0098 1360 str r3, [r2] - 2478 .L186: -1724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2479 .loc 1 1724 0 - 2480 009a 5423 movs r3, #84 - 2481 009c 0022 movs r2, #0 - 2482 009e E254 strb r2, [r4, r3] -1727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2483 .loc 1 1727 0 - 2484 00a0 0020 movs r0, #0 - 2485 .L179: -1728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2486 .loc 1 1728 0 - 2487 00a2 03B0 add sp, sp, #12 - 2488 @ sp needed - 2489 .LVL190: - 2490 .LVL191: - 2491 00a4 30BD pop {r4, r5, pc} - 2492 .LVL192: - 2493 .L181: -1698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2494 .loc 1 1698 0 - 2495 00a6 996A ldr r1, [r3, #40] - 2496 00a8 2A68 ldr r2, [r5] - 2497 00aa 5203 lsls r2, r2, #13 - 2498 00ac 520B lsrs r2, r2, #13 - 2499 00ae 9143 bics r1, r2 - 2500 00b0 9962 str r1, [r3, #40] -1703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2501 .loc 1 1703 0 - 2502 00b2 2B68 ldr r3, [r5] - 2503 00b4 5B03 lsls r3, r3, #13 - 2504 00b6 04D5 bpl .L187 -1705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2505 .loc 1 1705 0 - 2506 00b8 0C4A ldr r2, .L191+4 - 2507 00ba 1368 ldr r3, [r2] - 2508 00bc 0E49 ldr r1, .L191+16 - 2509 00be 0B40 ands r3, r1 - 2510 00c0 1360 str r3, [r2] - 2511 .L187: -1709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2512 .loc 1 1709 0 - ARM GAS /tmp/ccHnSxqq.s page 89 - - - 2513 00c2 2B68 ldr r3, [r5] - 2514 00c4 9B03 lsls r3, r3, #14 - 2515 00c6 04D5 bpl .L188 -1711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2516 .loc 1 1711 0 - 2517 00c8 084A ldr r2, .L191+4 - 2518 00ca 1368 ldr r3, [r2] - 2519 00cc 0B49 ldr r1, .L191+20 - 2520 00ce 0B40 ands r3, r1 - 2521 00d0 1360 str r3, [r2] - 2522 .L188: -1716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2523 .loc 1 1716 0 - 2524 00d2 2B68 ldr r3, [r5] - 2525 00d4 DB03 lsls r3, r3, #15 - 2526 00d6 E0D5 bpl .L186 -1718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2527 .loc 1 1718 0 - 2528 00d8 044A ldr r2, .L191+4 - 2529 00da 1368 ldr r3, [r2] - 2530 00dc 0849 ldr r1, .L191+24 - 2531 00de 0B40 ands r3, r1 - 2532 00e0 1360 str r3, [r2] - 2533 00e2 DAE7 b .L186 - 2534 .LVL193: - 2535 .L189: -1645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2536 .loc 1 1645 0 - 2537 00e4 0220 movs r0, #2 - 2538 .LVL194: - 2539 00e6 DCE7 b .L179 - 2540 .L192: - 2541 .align 2 - 2542 .L191: - 2543 00e8 01100000 .word 4097 - 2544 00ec 08270140 .word 1073817352 - 2545 00f0 00000000 .word SystemCoreClock - 2546 00f4 40420F00 .word 1000000 - 2547 00f8 FFFF7FFF .word -8388609 - 2548 00fc FFFFBFFF .word -4194305 - 2549 0100 FFFFFFFE .word -16777217 - 2550 .cfi_endproc - 2551 .LFE57: - 2553 .section .text.HAL_ADC_AnalogWDGConfig,"ax",%progbits - 2554 .align 1 - 2555 .global HAL_ADC_AnalogWDGConfig - 2556 .syntax unified - 2557 .code 16 - 2558 .thumb_func - 2559 .fpu softvfp - 2561 HAL_ADC_AnalogWDGConfig: - 2562 .LFB58: -1753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 2563 .loc 1 1753 0 - 2564 .cfi_startproc - 2565 @ args = 0, pretend = 0, frame = 0 - 2566 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccHnSxqq.s page 90 - - - 2567 .LVL195: - 2568 0000 30B5 push {r4, r5, lr} - 2569 .LCFI20: - 2570 .cfi_def_cfa_offset 12 - 2571 .cfi_offset 4, -12 - 2572 .cfi_offset 5, -8 - 2573 .cfi_offset 14, -4 - 2574 .LVL196: -1774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2575 .loc 1 1774 0 - 2576 0002 5423 movs r3, #84 - 2577 0004 C35C ldrb r3, [r0, r3] - 2578 0006 012B cmp r3, #1 - 2579 0008 47D0 beq .L199 -1774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2580 .loc 1 1774 0 is_stmt 0 discriminator 2 - 2581 000a 5423 movs r3, #84 - 2582 000c 0122 movs r2, #1 - 2583 000e C254 strb r2, [r0, r3] -1781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2584 .loc 1 1781 0 is_stmt 1 discriminator 2 - 2585 0010 0368 ldr r3, [r0] - 2586 0012 9A68 ldr r2, [r3, #8] - 2587 0014 5207 lsls r2, r2, #29 - 2588 0016 3AD4 bmi .L195 -1784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** { - 2589 .loc 1 1784 0 - 2590 0018 8A68 ldr r2, [r1, #8] - 2591 001a 012A cmp r2, #1 - 2592 001c 32D0 beq .L200 -1792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2593 .loc 1 1792 0 - 2594 001e 5A68 ldr r2, [r3, #4] - 2595 0020 8024 movs r4, #128 - 2596 0022 A243 bics r2, r4 - 2597 0024 5A60 str r2, [r3, #4] - 2598 .L197: -1799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** ADC_CFGR1_AWDEN | - 2599 .loc 1 1799 0 - 2600 0026 0268 ldr r2, [r0] - 2601 0028 D368 ldr r3, [r2, #12] - 2602 002a 1D4C ldr r4, .L201 - 2603 002c 2340 ands r3, r4 - 2604 002e D360 str r3, [r2, #12] -1803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (AnalogWDGConfig->Channel & ADC_CHANNEL_AWD_MASK)); - 2605 .loc 1 1803 0 - 2606 0030 0468 ldr r4, [r0] - 2607 0032 E368 ldr r3, [r4, #12] -1804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2608 .loc 1 1804 0 - 2609 0034 F822 movs r2, #248 - 2610 0036 D205 lsls r2, r2, #23 - 2611 0038 4D68 ldr r5, [r1, #4] - 2612 003a 2A40 ands r2, r5 -1803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** (AnalogWDGConfig->Channel & ADC_CHANNEL_AWD_MASK)); - 2613 .loc 1 1803 0 - 2614 003c 0D68 ldr r5, [r1] - ARM GAS /tmp/ccHnSxqq.s page 91 - - - 2615 003e 2A43 orrs r2, r5 - 2616 0040 1343 orrs r3, r2 - 2617 0042 E360 str r3, [r4, #12] -1809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres - 2618 .loc 1 1809 0 - 2619 0044 0568 ldr r5, [r0] - 2620 0046 EB68 ldr r3, [r5, #12] - 2621 0048 DB08 lsrs r3, r3, #3 - 2622 004a 0322 movs r2, #3 - 2623 004c 1340 ands r3, r2 - 2624 004e 5B00 lsls r3, r3, #1 - 2625 0050 CC68 ldr r4, [r1, #12] - 2626 0052 9C40 lsls r4, r4, r3 - 2627 .LVL197: -1810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2628 .loc 1 1810 0 - 2629 0054 0B69 ldr r3, [r1, #16] - 2630 0056 E968 ldr r1, [r5, #12] - 2631 .LVL198: - 2632 0058 C908 lsrs r1, r1, #3 - 2633 005a 0A40 ands r2, r1 - 2634 005c 5200 lsls r2, r2, #1 - 2635 005e 9340 lsls r3, r3, r2 - 2636 0060 1A00 movs r2, r3 - 2637 .LVL199: -1813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2638 .loc 1 1813 0 - 2639 0062 2B6A ldr r3, [r5, #32] - 2640 0064 0F49 ldr r1, .L201+4 - 2641 0066 0B40 ands r3, r1 - 2642 0068 2B62 str r3, [r5, #32] -1816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Set the low threshold */ - 2643 .loc 1 1816 0 - 2644 006a 0168 ldr r1, [r0] - 2645 006c 2404 lsls r4, r4, #16 - 2646 .LVL200: - 2647 006e 0C62 str r4, [r1, #32] -1818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2648 .loc 1 1818 0 - 2649 0070 0168 ldr r1, [r0] - 2650 0072 0B6A ldr r3, [r1, #32] - 2651 0074 1343 orrs r3, r2 - 2652 0076 0B62 str r3, [r1, #32] -1754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2653 .loc 1 1754 0 - 2654 0078 0023 movs r3, #0 - 2655 .LVL201: - 2656 .L198: -1831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2657 .loc 1 1831 0 - 2658 007a 5422 movs r2, #84 - 2659 007c 0021 movs r1, #0 - 2660 007e 8154 strb r1, [r0, r2] - 2661 .LVL202: - 2662 .L194: -1835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2663 .loc 1 1835 0 - ARM GAS /tmp/ccHnSxqq.s page 92 - - - 2664 0080 1800 movs r0, r3 - 2665 .LVL203: - 2666 @ sp needed - 2667 0082 30BD pop {r4, r5, pc} - 2668 .LVL204: - 2669 .L200: -1787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2670 .loc 1 1787 0 - 2671 0084 5A68 ldr r2, [r3, #4] - 2672 0086 8024 movs r4, #128 - 2673 0088 2243 orrs r2, r4 - 2674 008a 5A60 str r2, [r3, #4] - 2675 008c CBE7 b .L197 - 2676 .L195: -1825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2677 .loc 1 1825 0 - 2678 008e 836D ldr r3, [r0, #88] - 2679 0090 2022 movs r2, #32 - 2680 0092 1343 orrs r3, r2 - 2681 0094 8365 str r3, [r0, #88] - 2682 .LVL205: -1827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2683 .loc 1 1827 0 - 2684 0096 0123 movs r3, #1 - 2685 0098 EFE7 b .L198 - 2686 .LVL206: - 2687 .L199: -1774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2688 .loc 1 1774 0 - 2689 009a 0223 movs r3, #2 - 2690 009c F0E7 b .L194 - 2691 .L202: - 2692 009e C046 .align 2 - 2693 .L201: - 2694 00a0 FFFF3F83 .word -2092957697 - 2695 00a4 00F000F0 .word -268374016 - 2696 .cfi_endproc - 2697 .LFE58: - 2699 .section .text.HAL_ADC_GetState,"ax",%progbits - 2700 .align 1 - 2701 .global HAL_ADC_GetState - 2702 .syntax unified - 2703 .code 16 - 2704 .thumb_func - 2705 .fpu softvfp - 2707 HAL_ADC_GetState: - 2708 .LFB59: -1870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 2709 .loc 1 1870 0 - 2710 .cfi_startproc - 2711 @ args = 0, pretend = 0, frame = 0 - 2712 @ frame_needed = 0, uses_anonymous_args = 0 - 2713 @ link register save eliminated. - 2714 .LVL207: -1875:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2715 .loc 1 1875 0 - 2716 0000 806D ldr r0, [r0, #88] - ARM GAS /tmp/ccHnSxqq.s page 93 - - - 2717 .LVL208: -1876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2718 .loc 1 1876 0 - 2719 @ sp needed - 2720 0002 7047 bx lr - 2721 .cfi_endproc - 2722 .LFE59: - 2724 .section .text.HAL_ADC_GetError,"ax",%progbits - 2725 .align 1 - 2726 .global HAL_ADC_GetError - 2727 .syntax unified - 2728 .code 16 - 2729 .thumb_func - 2730 .fpu softvfp - 2732 HAL_ADC_GetError: - 2733 .LFB60: -1884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** /* Check the parameters */ - 2734 .loc 1 1884 0 - 2735 .cfi_startproc - 2736 @ args = 0, pretend = 0, frame = 0 - 2737 @ frame_needed = 0, uses_anonymous_args = 0 - 2738 @ link register save eliminated. - 2739 .LVL209: -1888:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** } - 2740 .loc 1 1888 0 - 2741 0000 C06D ldr r0, [r0, #92] - 2742 .LVL210: -1889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.c **** - 2743 .loc 1 1889 0 - 2744 @ sp needed - 2745 0002 7047 bx lr - 2746 .cfi_endproc - 2747 .LFE60: - 2749 .text - 2750 .Letext0: - 2751 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 2752 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 2753 .file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 2754 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 2755 .file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" - 2756 .file 7 "/usr/arm-none-eabi/include/sys/lock.h" - 2757 .file 8 "/usr/arm-none-eabi/include/sys/_types.h" - 2758 .file 9 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 2759 .file 10 "/usr/arm-none-eabi/include/sys/reent.h" - 2760 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 2761 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h" - 2762 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h" - 2763 .file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h" - ARM GAS /tmp/ccHnSxqq.s page 94 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_adc.c - /tmp/ccHnSxqq.s:16 .text.ADC_ConversionStop:0000000000000000 $t - /tmp/ccHnSxqq.s:22 .text.ADC_ConversionStop:0000000000000000 ADC_ConversionStop - /tmp/ccHnSxqq.s:106 .text.ADC_Disable:0000000000000000 $t - /tmp/ccHnSxqq.s:112 .text.ADC_Disable:0000000000000000 ADC_Disable - /tmp/ccHnSxqq.s:223 .text.ADC_Enable:0000000000000000 $t - /tmp/ccHnSxqq.s:229 .text.ADC_Enable:0000000000000000 ADC_Enable - /tmp/ccHnSxqq.s:363 .text.ADC_Enable:000000000000008c $d - /tmp/ccHnSxqq.s:370 .text.HAL_ADC_MspInit:0000000000000000 $t - /tmp/ccHnSxqq.s:377 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit - /tmp/ccHnSxqq.s:392 .text.HAL_ADC_Init:0000000000000000 $t - /tmp/ccHnSxqq.s:399 .text.HAL_ADC_Init:0000000000000000 HAL_ADC_Init - /tmp/ccHnSxqq.s:731 .text.HAL_ADC_Init:00000000000001c8 $d - /tmp/ccHnSxqq.s:741 .text.HAL_ADC_MspDeInit:0000000000000000 $t - /tmp/ccHnSxqq.s:748 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit - /tmp/ccHnSxqq.s:763 .text.HAL_ADC_DeInit:0000000000000000 $t - /tmp/ccHnSxqq.s:770 .text.HAL_ADC_DeInit:0000000000000000 HAL_ADC_DeInit - /tmp/ccHnSxqq.s:905 .text.HAL_ADC_DeInit:00000000000000a0 $d - /tmp/ccHnSxqq.s:915 .text.HAL_ADC_Start:0000000000000000 $t - /tmp/ccHnSxqq.s:922 .text.HAL_ADC_Start:0000000000000000 HAL_ADC_Start - /tmp/ccHnSxqq.s:1011 .text.HAL_ADC_Start:000000000000005c $d - /tmp/ccHnSxqq.s:1016 .text.HAL_ADC_Stop:0000000000000000 $t - /tmp/ccHnSxqq.s:1023 .text.HAL_ADC_Stop:0000000000000000 HAL_ADC_Stop - /tmp/ccHnSxqq.s:1092 .text.HAL_ADC_Stop:0000000000000040 $d - /tmp/ccHnSxqq.s:1097 .text.HAL_ADC_PollForConversion:0000000000000000 $t - /tmp/ccHnSxqq.s:1104 .text.HAL_ADC_PollForConversion:0000000000000000 HAL_ADC_PollForConversion - /tmp/ccHnSxqq.s:1262 .text.HAL_ADC_PollForConversion:00000000000000bc $d - /tmp/ccHnSxqq.s:1267 .text.HAL_ADC_PollForEvent:0000000000000000 $t - /tmp/ccHnSxqq.s:1274 .text.HAL_ADC_PollForEvent:0000000000000000 HAL_ADC_PollForEvent - /tmp/ccHnSxqq.s:1383 .text.HAL_ADC_Start_IT:0000000000000000 $t - /tmp/ccHnSxqq.s:1390 .text.HAL_ADC_Start_IT:0000000000000000 HAL_ADC_Start_IT - /tmp/ccHnSxqq.s:1506 .text.HAL_ADC_Start_IT:0000000000000084 $d - /tmp/ccHnSxqq.s:1511 .text.HAL_ADC_Stop_IT:0000000000000000 $t - /tmp/ccHnSxqq.s:1518 .text.HAL_ADC_Stop_IT:0000000000000000 HAL_ADC_Stop_IT - /tmp/ccHnSxqq.s:1593 .text.HAL_ADC_Stop_IT:000000000000004c $d - /tmp/ccHnSxqq.s:1598 .text.HAL_ADC_Start_DMA:0000000000000000 $t - /tmp/ccHnSxqq.s:1605 .text.HAL_ADC_Start_DMA:0000000000000000 HAL_ADC_Start_DMA - /tmp/ccHnSxqq.s:1734 .text.HAL_ADC_Start_DMA:0000000000000098 $d - /tmp/ccHnSxqq.s:1921 .text.ADC_DMAConvCplt:0000000000000000 ADC_DMAConvCplt - /tmp/ccHnSxqq.s:2047 .text.ADC_DMAHalfConvCplt:0000000000000000 ADC_DMAHalfConvCplt - /tmp/ccHnSxqq.s:2122 .text.ADC_DMAError:0000000000000000 ADC_DMAError - /tmp/ccHnSxqq.s:1742 .text.HAL_ADC_Stop_DMA:0000000000000000 $t - /tmp/ccHnSxqq.s:1749 .text.HAL_ADC_Stop_DMA:0000000000000000 HAL_ADC_Stop_DMA - /tmp/ccHnSxqq.s:1862 .text.HAL_ADC_Stop_DMA:0000000000000078 $d - /tmp/ccHnSxqq.s:1867 .text.HAL_ADC_GetValue:0000000000000000 $t - /tmp/ccHnSxqq.s:1874 .text.HAL_ADC_GetValue:0000000000000000 HAL_ADC_GetValue - /tmp/ccHnSxqq.s:1893 .text.HAL_ADC_ConvCpltCallback:0000000000000000 $t - /tmp/ccHnSxqq.s:1900 .text.HAL_ADC_ConvCpltCallback:0000000000000000 HAL_ADC_ConvCpltCallback - /tmp/ccHnSxqq.s:1915 .text.ADC_DMAConvCplt:0000000000000000 $t - /tmp/ccHnSxqq.s:2014 .text.ADC_DMAConvCplt:000000000000006c $d - /tmp/ccHnSxqq.s:2019 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 $t - /tmp/ccHnSxqq.s:2026 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 HAL_ADC_ConvHalfCpltCallback - /tmp/ccHnSxqq.s:2041 .text.ADC_DMAHalfConvCplt:0000000000000000 $t - /tmp/ccHnSxqq.s:2072 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 $t - /tmp/ccHnSxqq.s:2079 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 HAL_ADC_LevelOutOfWindowCallback - /tmp/ccHnSxqq.s:2094 .text.HAL_ADC_ErrorCallback:0000000000000000 $t - ARM GAS /tmp/ccHnSxqq.s page 95 - - - /tmp/ccHnSxqq.s:2101 .text.HAL_ADC_ErrorCallback:0000000000000000 HAL_ADC_ErrorCallback - /tmp/ccHnSxqq.s:2116 .text.ADC_DMAError:0000000000000000 $t - /tmp/ccHnSxqq.s:2157 .text.HAL_ADC_IRQHandler:0000000000000000 $t - /tmp/ccHnSxqq.s:2164 .text.HAL_ADC_IRQHandler:0000000000000000 HAL_ADC_IRQHandler - /tmp/ccHnSxqq.s:2338 .text.HAL_ADC_IRQHandler:00000000000000e0 $d - /tmp/ccHnSxqq.s:2343 .text.HAL_ADC_ConfigChannel:0000000000000000 $t - /tmp/ccHnSxqq.s:2350 .text.HAL_ADC_ConfigChannel:0000000000000000 HAL_ADC_ConfigChannel - /tmp/ccHnSxqq.s:2543 .text.HAL_ADC_ConfigChannel:00000000000000e8 $d - /tmp/ccHnSxqq.s:2554 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 $t - /tmp/ccHnSxqq.s:2561 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 HAL_ADC_AnalogWDGConfig - /tmp/ccHnSxqq.s:2694 .text.HAL_ADC_AnalogWDGConfig:00000000000000a0 $d - /tmp/ccHnSxqq.s:2700 .text.HAL_ADC_GetState:0000000000000000 $t - /tmp/ccHnSxqq.s:2707 .text.HAL_ADC_GetState:0000000000000000 HAL_ADC_GetState - /tmp/ccHnSxqq.s:2725 .text.HAL_ADC_GetError:0000000000000000 $t - /tmp/ccHnSxqq.s:2732 .text.HAL_ADC_GetError:0000000000000000 HAL_ADC_GetError - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -HAL_GetTick -__aeabi_uidiv -SystemCoreClock -HAL_DMA_Start_IT -HAL_DMA_Abort diff --git a/build/stm32l0xx_hal_adc_ex.d b/build/stm32l0xx_hal_adc_ex.d deleted file mode 100644 index 5914f62..0000000 --- a/build/stm32l0xx_hal_adc_ex.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_adc_ex.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_adc_ex.lst b/build/stm32l0xx_hal_adc_ex.lst deleted file mode 100644 index 6e2b2e9..0000000 --- a/build/stm32l0xx_hal_adc_ex.lst +++ /dev/null @@ -1,924 +0,0 @@ -ARM GAS /tmp/ccS1GlwB.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_adc_ex.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.HAL_ADCEx_Calibration_Start,"ax",%progbits - 16 .align 1 - 17 .global HAL_ADCEx_Calibration_Start - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 HAL_ADCEx_Calibration_Start: - 24 .LFB39: - 25 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @file stm32l0xx_hal_adc_ex.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief This file provides firmware functions to manage the following - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * functionalities of the Analog to Digital Convertor (ADC) - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * peripheral: - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * + Operation functions - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * ++ Calibration - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * +++ ADC automatic self-calibration - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * +++ Calibration factors get or set - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * Other functions (generic functions) are available in file - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * "stm32l0xx_hal_adc.c". - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** @verbatim - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** [..] - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** (@) Sections "ADC peripheral features" and "How to use this driver" are - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** available in file of generic functions "stm32l0xx_hal_adc.c". - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** [..] - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** @endverbatim - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** ****************************************************************************** - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @attention - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * Redistribution and use in source and binary forms, with or without modification, - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * are permitted provided that the following conditions are met: - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * 1. Redistributions of source code must retain the above copyright notice, - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * this list of conditions and the following disclaimer. - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * this list of conditions and the following disclaimer in the documentation - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * and/or other materials provided with the distribution. - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - ARM GAS /tmp/ccS1GlwB.s page 2 - - - 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * may be used to endorse or promote products derived from this software - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * without specific prior written permission. - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** ****************************************************************************** - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/ - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** #include "stm32l0xx_hal.h" - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @addtogroup STM32L0xx_HAL_Driver - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @{ - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @defgroup ADCEx ADCEx - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief ADC Extended HAL module driver - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @{ - 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** #ifdef HAL_ADC_MODULE_ENABLED - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private typedef -----------------------------------------------------------*/ - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private define ------------------------------------------------------------*/ - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants - 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @{ - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Fixed timeout values for ADC calibration, enable settling time, disable */ - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* settling time. */ - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Values defined to be higher than worst cases: low clock frequency, */ - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* maximum prescaler. */ - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Unit: ms */ - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** #define ADC_CALIBRATION_TIMEOUT 10U - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Delay for VREFINT stabilization time. */ - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Internal reference startup time max value is 3ms (refer to device datasheet, parameter TVREFINT - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Unit: ms */ - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** #define SYSCFG_BUF_VREFINT_ENABLE_TIMEOUT ((uint32_t) 3U) - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Delay for TEMPSENSOR stabilization time. */ - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Temperature sensor startup time max value is 10us (refer to device datasheet, parameter tSTART) - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Unit: ms */ - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** #define SYSCFG_BUF_TEMPSENSOR_ENABLE_TIMEOUT ((uint32_t) 1U) - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private macro -------------------------------------------------------------*/ - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private variables ---------------------------------------------------------*/ - ARM GAS /tmp/ccS1GlwB.s page 3 - - - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Private function prototypes -----------------------------------------------*/ - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Exported functions --------------------------------------------------------*/ - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @{ - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief Extended IO operation functions - 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** @verbatim - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** =============================================================================== - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** ##### IO operation functions ##### - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** =============================================================================== - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** [..] This section provides functions allowing to: - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** (+) Perform the ADC calibration. - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** @endverbatim - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @{ - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief Perform an ADC automatic self-calibration - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * Calibration prerequisite: ADC must be disabled (execute this - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @note Calibration factor can be read after calibration, using function - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]). - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @param hadc ADC handle - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @param SingleDiff: Selection of single-ended or differential input - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * This parameter can be only of the following values: - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @arg ADC_SINGLE_ENDED: Channel in mode input single ended - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @retval HAL status - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff) - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 26 .loc 1 124 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 .LVL0: - 31 0000 70B5 push {r4, r5, r6, lr} - 32 .LCFI0: - 33 .cfi_def_cfa_offset 16 - 34 .cfi_offset 4, -16 - 35 .cfi_offset 5, -12 - 36 .cfi_offset 6, -8 - 37 .cfi_offset 14, -4 - 38 0002 0400 movs r4, r0 - 39 .LVL1: - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** uint32_t tickstart = 0U; - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** uint32_t backup_setting_adc_dma_transfer = 0U; /* Note: Variable not declared as volatile because - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Check the parameters */ - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Process locked */ - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** __HAL_LOCK(hadc); - ARM GAS /tmp/ccS1GlwB.s page 4 - - - 40 .loc 1 133 0 - 41 0004 5423 movs r3, #84 - 42 0006 C35C ldrb r3, [r0, r3] - 43 0008 012B cmp r3, #1 - 44 000a 49D0 beq .L7 - 45 .loc 1 133 0 is_stmt 0 discriminator 2 - 46 000c 5423 movs r3, #84 - 47 000e 0122 movs r2, #1 - 48 0010 C254 strb r2, [r0, r3] - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Calibration prerequisite: ADC must be disabled. */ - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** if (ADC_IS_ENABLE(hadc) == RESET) - 49 .loc 1 136 0 is_stmt 1 discriminator 2 - 50 0012 0368 ldr r3, [r0] - 51 0014 9968 ldr r1, [r3, #8] - 52 .LVL2: - 53 0016 0232 adds r2, r2, #2 - 54 0018 0A40 ands r2, r1 - 55 001a 012A cmp r2, #1 - 56 001c 08D1 bne .L3 - 57 .loc 1 136 0 is_stmt 0 discriminator 1 - 58 001e 1A68 ldr r2, [r3] - 59 0020 D207 lsls r2, r2, #31 - 60 0022 05D5 bpl .L3 - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Set ADC state */ - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY, - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL); - 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Disable ADC DMA transfer request during calibration */ - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Note: Specificity of this STM32 serie: Calibration factor is */ - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* available in data register and also transfered by DMA. */ - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* To not insert ADC calibration factor among ADC conversion data */ - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* in array variable, DMA transfer must be disabled during */ - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* calibration. */ - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_D - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Start ADC calibration */ - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** hadc->Instance->CR |= ADC_CR_ADCAL; - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Wait for calibration completion */ - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_ADC_STATE_ERROR_INTERNAL); - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Process unlocked */ - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - ARM GAS /tmp/ccS1GlwB.s page 5 - - - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** return HAL_ERROR; - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Restore ADC DMA transfer request after calibration */ - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer); - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Set ADC state */ - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** else - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 61 .loc 1 185 0 is_stmt 1 - 62 0024 836D ldr r3, [r0, #88] - 63 0026 2022 movs r2, #32 - 64 0028 1343 orrs r3, r2 - 65 002a 8365 str r3, [r0, #88] - 66 .LVL3: - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; - 67 .loc 1 187 0 - 68 002c 0120 movs r0, #1 - 69 .LVL4: - 70 002e 33E0 b .L4 - 71 .LVL5: - 72 .L3: - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY, - 73 .loc 1 139 0 - 74 0030 A26D ldr r2, [r4, #88] - 75 0032 1C49 ldr r1, .L9 - 76 0034 0A40 ands r2, r1 - 77 0036 0631 adds r1, r1, #6 - 78 0038 FF31 adds r1, r1, #255 - 79 003a 0A43 orrs r2, r1 - 80 003c A265 str r2, [r4, #88] - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); - 81 .loc 1 149 0 - 82 003e DE68 ldr r6, [r3, #12] - 83 0040 0131 adds r1, r1, #1 - 84 0042 0E40 ands r6, r1 - 85 .LVL6: - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 86 .loc 1 150 0 - 87 0044 DA68 ldr r2, [r3, #12] - 88 0046 8A43 bics r2, r1 - 89 0048 DA60 str r2, [r3, #12] - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 90 .loc 1 153 0 - 91 004a 2268 ldr r2, [r4] - 92 004c 9168 ldr r1, [r2, #8] - 93 004e 8023 movs r3, #128 - 94 0050 1B06 lsls r3, r3, #24 - 95 0052 0B43 orrs r3, r1 - ARM GAS /tmp/ccS1GlwB.s page 6 - - - 96 0054 9360 str r3, [r2, #8] - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 97 .loc 1 155 0 - 98 0056 FFF7FEFF bl HAL_GetTick - 99 .LVL7: - 100 005a 0500 movs r5, r0 - 101 .LVL8: - 102 .L5: - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 103 .loc 1 158 0 - 104 005c 2368 ldr r3, [r4] - 105 005e 9A68 ldr r2, [r3, #8] - 106 0060 002A cmp r2, #0 - 107 0062 0FDA bge .L8 - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 108 .loc 1 160 0 - 109 0064 FFF7FEFF bl HAL_GetTick - 110 .LVL9: - 111 0068 401B subs r0, r0, r5 - 112 006a 0A28 cmp r0, #10 - 113 006c F6D9 bls .L5 - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, - 114 .loc 1 163 0 - 115 006e A36D ldr r3, [r4, #88] - 116 0070 1222 movs r2, #18 - 117 0072 9343 bics r3, r2 - 118 0074 023A subs r2, r2, #2 - 119 0076 1343 orrs r3, r2 - 120 0078 A365 str r3, [r4, #88] - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 121 .loc 1 168 0 - 122 007a 5423 movs r3, #84 - 123 007c 0022 movs r2, #0 - 124 007e E254 strb r2, [r4, r3] - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 125 .loc 1 170 0 - 126 0080 0120 movs r0, #1 - 127 0082 0CE0 b .L2 - 128 .L8: - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 129 .loc 1 175 0 - 130 0084 DA68 ldr r2, [r3, #12] - 131 0086 1643 orrs r6, r2 - 132 .LVL10: - 133 0088 DE60 str r6, [r3, #12] - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, - 134 .loc 1 178 0 - 135 008a A36D ldr r3, [r4, #88] - 136 008c 0322 movs r2, #3 - 137 008e 9343 bics r3, r2 - 138 0090 023A subs r2, r2, #2 - 139 0092 1343 orrs r3, r2 - 140 0094 A365 str r3, [r4, #88] - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** uint32_t tickstart = 0U; - 141 .loc 1 125 0 - 142 0096 0020 movs r0, #0 - 143 .LVL11: - ARM GAS /tmp/ccS1GlwB.s page 7 - - - 144 .L4: - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Process unlocked */ - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); - 145 .loc 1 191 0 - 146 0098 5423 movs r3, #84 - 147 009a 0022 movs r2, #0 - 148 009c E254 strb r2, [r4, r3] - 149 .LVL12: - 150 .L2: - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Return function status */ - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** return tmp_hal_status; - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 151 .loc 1 195 0 - 152 @ sp needed - 153 .LVL13: - 154 009e 70BD pop {r4, r5, r6, pc} - 155 .LVL14: - 156 .L7: - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 157 .loc 1 133 0 - 158 00a0 0220 movs r0, #2 - 159 .LVL15: - 160 00a2 FCE7 b .L2 - 161 .L10: - 162 .align 2 - 163 .L9: - 164 00a4 FDFEFFFF .word -259 - 165 .cfi_endproc - 166 .LFE39: - 168 .section .text.HAL_ADCEx_Calibration_GetValue,"ax",%progbits - 169 .align 1 - 170 .global HAL_ADCEx_Calibration_GetValue - 171 .syntax unified - 172 .code 16 - 173 .thumb_func - 174 .fpu softvfp - 176 HAL_ADCEx_Calibration_GetValue: - 177 .LFB40: - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief Get the calibration factor. - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @param hadc: ADC handle. - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @param SingleDiff: This parameter can be only: - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @arg ADC_SINGLE_ENDED: Channel in mode input single ended. - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @retval Calibration value. - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff) - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 178 .loc 1 205 0 - 179 .cfi_startproc - 180 @ args = 0, pretend = 0, frame = 0 - 181 @ frame_needed = 0, uses_anonymous_args = 0 - 182 @ link register save eliminated. - 183 .LVL16: - ARM GAS /tmp/ccS1GlwB.s page 8 - - - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Check the parameters */ - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Return the ADC calibration value */ - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** return ((hadc->Instance->CALFACT) & 0x0000007FU); - 184 .loc 1 211 0 - 185 0000 0268 ldr r2, [r0] - 186 0002 B423 movs r3, #180 - 187 0004 D358 ldr r3, [r2, r3] - 188 0006 7F20 movs r0, #127 - 189 .LVL17: - 190 0008 1840 ands r0, r3 - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 191 .loc 1 212 0 - 192 @ sp needed - 193 000a 7047 bx lr - 194 .cfi_endproc - 195 .LFE40: - 197 .section .text.HAL_ADCEx_Calibration_SetValue,"ax",%progbits - 198 .align 1 - 199 .global HAL_ADCEx_Calibration_SetValue - 200 .syntax unified - 201 .code 16 - 202 .thumb_func - 203 .fpu softvfp - 205 HAL_ADCEx_Calibration_SetValue: - 206 .LFB41: - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** - 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief Set the calibration factor to overwrite automatic conversion result. - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * ADC must be enabled and no conversion is ongoing. - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @param hadc: ADC handle - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @param SingleDiff: This parameter can be only: - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @arg ADC_SINGLE_ENDED: Channel in mode input single ended. - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @param CalibrationFactor: Calibration factor (coded on 7 bits maximum) - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @retval HAL state - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 207 .loc 1 224 0 - 208 .cfi_startproc - 209 @ args = 0, pretend = 0, frame = 0 - 210 @ frame_needed = 0, uses_anonymous_args = 0 - 211 .LVL18: - 212 0000 30B5 push {r4, r5, lr} - 213 .LCFI1: - 214 .cfi_def_cfa_offset 12 - 215 .cfi_offset 4, -12 - 216 .cfi_offset 5, -8 - 217 .cfi_offset 14, -4 - 218 .LVL19: - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Check the parameters */ - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); - ARM GAS /tmp/ccS1GlwB.s page 9 - - - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** assert_param(IS_ADC_CALFACT(CalibrationFactor)); - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Process locked */ - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** __HAL_LOCK(hadc); - 219 .loc 1 233 0 - 220 0002 5423 movs r3, #84 - 221 0004 C35C ldrb r3, [r0, r3] - 222 0006 012B cmp r3, #1 - 223 0008 27D0 beq .L16 - 224 .loc 1 233 0 is_stmt 0 discriminator 2 - 225 000a 5423 movs r3, #84 - 226 000c 0121 movs r1, #1 - 227 .LVL20: - 228 000e C154 strb r1, [r0, r3] - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Verification of hardware constraints before modifying the calibration */ - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* factors register: ADC must be enabled, no conversion on going. */ - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** if ( (ADC_IS_ENABLE(hadc) != RESET) && - 229 .loc 1 237 0 is_stmt 1 discriminator 2 - 230 0010 0168 ldr r1, [r0] - 231 0012 8C68 ldr r4, [r1, #8] - 232 0014 513B subs r3, r3, #81 - 233 0016 2340 ands r3, r4 - 234 0018 012B cmp r3, #1 - 235 001a 0DD0 beq .L17 - 236 .L14: - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Set the selected ADC calibration value */ - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** hadc->Instance->CALFACT &= ~ADC_CALFACT_CALFACT; - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** hadc->Instance->CALFACT |= CalibrationFactor; - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** else - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 237 .loc 1 247 0 - 238 001c 836D ldr r3, [r0, #88] - 239 001e 1022 movs r2, #16 - 240 .LVL21: - 241 0020 1343 orrs r3, r2 - 242 0022 8365 str r3, [r0, #88] - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 243 .loc 1 249 0 - 244 0024 C36D ldr r3, [r0, #92] - 245 0026 0F3A subs r2, r2, #15 - 246 0028 1343 orrs r3, r2 - 247 002a C365 str r3, [r0, #92] - 248 .LVL22: - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; - 249 .loc 1 252 0 - 250 002c 0123 movs r3, #1 - 251 .LVL23: - 252 .L15: - ARM GAS /tmp/ccS1GlwB.s page 10 - - - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Process unlocked */ - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); - 253 .loc 1 256 0 - 254 002e 5422 movs r2, #84 - 255 0030 0021 movs r1, #0 - 256 0032 8154 strb r1, [r0, r2] - 257 .LVL24: - 258 .L13: - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Return function status */ - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** return tmp_hal_status; - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 259 .loc 1 260 0 - 260 0034 1800 movs r0, r3 - 261 .LVL25: - 262 @ sp needed - 263 0036 30BD pop {r4, r5, pc} - 264 .LVL26: - 265 .L17: - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) - 266 .loc 1 237 0 discriminator 1 - 267 0038 0B68 ldr r3, [r1] - 268 003a DB07 lsls r3, r3, #31 - 269 003c EED5 bpl .L14 - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 270 .loc 1 238 0 - 271 003e 8B68 ldr r3, [r1, #8] - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) - 272 .loc 1 237 0 - 273 0040 5B07 lsls r3, r3, #29 - 274 0042 EBD4 bmi .L14 - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** hadc->Instance->CALFACT |= CalibrationFactor; - 275 .loc 1 241 0 - 276 0044 B423 movs r3, #180 - 277 0046 CC58 ldr r4, [r1, r3] - 278 0048 7F25 movs r5, #127 - 279 004a AC43 bics r4, r5 - 280 004c CC50 str r4, [r1, r3] - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 281 .loc 1 242 0 - 282 004e 0468 ldr r4, [r0] - 283 0050 E158 ldr r1, [r4, r3] - 284 0052 0A43 orrs r2, r1 - 285 .LVL27: - 286 0054 E250 str r2, [r4, r3] - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 287 .loc 1 225 0 - 288 0056 0023 movs r3, #0 - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 289 .loc 1 242 0 - 290 0058 E9E7 b .L15 - 291 .LVL28: - 292 .L16: - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 293 .loc 1 233 0 - ARM GAS /tmp/ccS1GlwB.s page 11 - - - 294 005a 0223 movs r3, #2 - 295 005c EAE7 b .L13 - 296 .cfi_endproc - 297 .LFE41: - 299 .section .text.HAL_ADCEx_EnableVREFINT,"ax",%progbits - 300 .align 1 - 301 .global HAL_ADCEx_EnableVREFINT - 302 .syntax unified - 303 .code 16 - 304 .thumb_func - 305 .fpu softvfp - 307 HAL_ADCEx_EnableVREFINT: - 308 .LFB42: - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief Enables the buffer of Vrefint for the ADC, required when device is in mode low-power (l - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * This function must be called before function HAL_ADC_Init() - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first) - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * For more details on procedure and buffer current consumption, refer to device reference - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @note This is functional only if the LOCK is not set. - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @retval None - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnableVREFINT(void) - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 309 .loc 1 271 0 - 310 .cfi_startproc - 311 @ args = 0, pretend = 0, frame = 0 - 312 @ frame_needed = 0, uses_anonymous_args = 0 - 313 0000 10B5 push {r4, lr} - 314 .LCFI2: - 315 .cfi_def_cfa_offset 8 - 316 .cfi_offset 4, -8 - 317 .cfi_offset 14, -4 - 318 .LVL29: - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** uint32_t tickstart = 0U; - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Enable the Buffer for the ADC by setting ENBUF_SENSOR_ADC bit in the CFGR3 register */ - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC); - 319 .loc 1 275 0 - 320 0002 0B4A ldr r2, .L24 - 321 0004 116A ldr r1, [r2, #32] - 322 0006 8023 movs r3, #128 - 323 0008 5B00 lsls r3, r3, #1 - 324 000a 0B43 orrs r3, r1 - 325 000c 1362 str r3, [r2, #32] - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Wait for Vrefint buffer effectively enabled */ - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Get tick count */ - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); - 326 .loc 1 279 0 - 327 000e FFF7FEFF bl HAL_GetTick - 328 .LVL30: - 329 0012 0400 movs r4, r0 - 330 .LVL31: - 331 .L19: - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** while(HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF)) - ARM GAS /tmp/ccS1GlwB.s page 12 - - - 332 .loc 1 281 0 - 333 0014 064B ldr r3, .L24 - 334 0016 1B6A ldr r3, [r3, #32] - 335 0018 5B00 lsls r3, r3, #1 - 336 001a 06D4 bmi .L23 - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** if((HAL_GetTick() - tickstart) > SYSCFG_BUF_VREFINT_ENABLE_TIMEOUT) - 337 .loc 1 283 0 - 338 001c FFF7FEFF bl HAL_GetTick - 339 .LVL32: - 340 0020 001B subs r0, r0, r4 - 341 0022 0328 cmp r0, #3 - 342 0024 F6D9 bls .L19 - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** return HAL_ERROR; - 343 .loc 1 285 0 - 344 0026 0120 movs r0, #1 - 345 0028 00E0 b .L20 - 346 .L23: - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** return HAL_OK; - 347 .loc 1 289 0 - 348 002a 0020 movs r0, #0 - 349 .L20: - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 350 .loc 1 290 0 - 351 @ sp needed - 352 .LVL33: - 353 002c 10BD pop {r4, pc} - 354 .L25: - 355 002e C046 .align 2 - 356 .L24: - 357 0030 00000140 .word 1073807360 - 358 .cfi_endproc - 359 .LFE42: - 361 .section .text.HAL_ADCEx_DisableVREFINT,"ax",%progbits - 362 .align 1 - 363 .global HAL_ADCEx_DisableVREFINT - 364 .syntax unified - 365 .code 16 - 366 .thumb_func - 367 .fpu softvfp - 369 HAL_ADCEx_DisableVREFINT: - 370 .LFB43: - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief Disables the Buffer Vrefint for the ADC. - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @note This is functional only if the LOCK is not set. - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @retval None - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** void HAL_ADCEx_DisableVREFINT(void) - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 371 .loc 1 298 0 - 372 .cfi_startproc - 373 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccS1GlwB.s page 13 - - - 374 @ frame_needed = 0, uses_anonymous_args = 0 - 375 @ link register save eliminated. - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Disable the Vrefint by resetting ENBUF_SENSOR_ADC bit in the CFGR3 register */ - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC); - 376 .loc 1 300 0 - 377 0000 024A ldr r2, .L27 - 378 0002 136A ldr r3, [r2, #32] - 379 0004 0249 ldr r1, .L27+4 - 380 0006 0B40 ands r3, r1 - 381 0008 1362 str r3, [r2, #32] - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 382 .loc 1 301 0 - 383 @ sp needed - 384 000a 7047 bx lr - 385 .L28: - 386 .align 2 - 387 .L27: - 388 000c 00000140 .word 1073807360 - 389 0010 FFFEFFFF .word -257 - 390 .cfi_endproc - 391 .LFE43: - 393 .section .text.HAL_ADCEx_EnableVREFINTTempSensor,"ax",%progbits - 394 .align 1 - 395 .global HAL_ADCEx_EnableVREFINTTempSensor - 396 .syntax unified - 397 .code 16 - 398 .thumb_func - 399 .fpu softvfp - 401 HAL_ADCEx_EnableVREFINTTempSensor: - 402 .LFB44: - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief Enables the buffer of temperature sensor for the ADC, required when device is in mode low - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * This function must be called before function HAL_ADC_Init() - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * (in case of previous ADC operations: function HAL_ADC_DeInit() must be called first) - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * For more details on procedure and buffer current consumption, refer to device reference m - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @note This is functional only if the LOCK is not set. - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @retval None - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_EnableVREFINTTempSensor(void) - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 403 .loc 1 312 0 - 404 .cfi_startproc - 405 @ args = 0, pretend = 0, frame = 0 - 406 @ frame_needed = 0, uses_anonymous_args = 0 - 407 0000 10B5 push {r4, lr} - 408 .LCFI3: - 409 .cfi_def_cfa_offset 8 - 410 .cfi_offset 4, -8 - 411 .cfi_offset 14, -4 - 412 .LVL34: - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** uint32_t tickstart = 0U; - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Enable the Buffer for the ADC by setting ENBUF_SENSOR_ADC bit in the CFGR3 register */ - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC); - 413 .loc 1 316 0 - 414 0002 0B4A ldr r2, .L35 - ARM GAS /tmp/ccS1GlwB.s page 14 - - - 415 0004 116A ldr r1, [r2, #32] - 416 0006 8023 movs r3, #128 - 417 0008 9B00 lsls r3, r3, #2 - 418 000a 0B43 orrs r3, r1 - 419 000c 1362 str r3, [r2, #32] - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Wait for Vrefint buffer effectively enabled */ - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Get tick count */ - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); - 420 .loc 1 320 0 - 421 000e FFF7FEFF bl HAL_GetTick - 422 .LVL35: - 423 0012 0400 movs r4, r0 - 424 .LVL36: - 425 .L30: - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** while(HAL_IS_BIT_CLR(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF)) - 426 .loc 1 322 0 - 427 0014 064B ldr r3, .L35 - 428 0016 1B6A ldr r3, [r3, #32] - 429 0018 5B00 lsls r3, r3, #1 - 430 001a 06D4 bmi .L34 - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** if((HAL_GetTick() - tickstart) > SYSCFG_BUF_TEMPSENSOR_ENABLE_TIMEOUT) - 431 .loc 1 324 0 - 432 001c FFF7FEFF bl HAL_GetTick - 433 .LVL37: - 434 0020 001B subs r0, r0, r4 - 435 0022 0128 cmp r0, #1 - 436 0024 F6D9 bls .L30 - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** return HAL_ERROR; - 437 .loc 1 326 0 - 438 0026 0120 movs r0, #1 - 439 0028 00E0 b .L31 - 440 .L34: - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** return HAL_OK; - 441 .loc 1 330 0 - 442 002a 0020 movs r0, #0 - 443 .L31: - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 444 .loc 1 331 0 - 445 @ sp needed - 446 .LVL38: - 447 002c 10BD pop {r4, pc} - 448 .L36: - 449 002e C046 .align 2 - 450 .L35: - 451 0030 00000140 .word 1073807360 - 452 .cfi_endproc - 453 .LFE44: - 455 .section .text.HAL_ADCEx_DisableVREFINTTempSensor,"ax",%progbits - 456 .align 1 - 457 .global HAL_ADCEx_DisableVREFINTTempSensor - ARM GAS /tmp/ccS1GlwB.s page 15 - - - 458 .syntax unified - 459 .code 16 - 460 .thumb_func - 461 .fpu softvfp - 463 HAL_ADCEx_DisableVREFINTTempSensor: - 464 .LFB45: - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /** - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @brief Disables the VREFINT and Sensor for the ADC. - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @note This is functional only if the LOCK is not set. - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** * @retval None - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** */ - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** void HAL_ADCEx_DisableVREFINTTempSensor(void) - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** { - 465 .loc 1 339 0 - 466 .cfi_startproc - 467 @ args = 0, pretend = 0, frame = 0 - 468 @ frame_needed = 0, uses_anonymous_args = 0 - 469 @ link register save eliminated. - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** /* Disable the Vrefint by resetting ENBUF_SENSOR_ADC bit in the CFGR3 register */ - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC); - 470 .loc 1 341 0 - 471 0000 024A ldr r2, .L38 - 472 0002 136A ldr r3, [r2, #32] - 473 0004 0249 ldr r1, .L38+4 - 474 0006 0B40 ands r3, r1 - 475 0008 1362 str r3, [r2, #32] - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc_ex.c **** } - 476 .loc 1 342 0 - 477 @ sp needed - 478 000a 7047 bx lr - 479 .L39: - 480 .align 2 - 481 .L38: - 482 000c 00000140 .word 1073807360 - 483 0010 FFFDFFFF .word -513 - 484 .cfi_endproc - 485 .LFE45: - 487 .text - 488 .Letext0: - 489 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 490 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 491 .file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 492 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 493 .file 6 "/usr/arm-none-eabi/include/sys/lock.h" - 494 .file 7 "/usr/arm-none-eabi/include/sys/_types.h" - 495 .file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 496 .file 9 "/usr/arm-none-eabi/include/sys/reent.h" - 497 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" - 498 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 499 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h" - 500 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h" - 501 .file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h" - ARM GAS /tmp/ccS1GlwB.s page 16 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_adc_ex.c - /tmp/ccS1GlwB.s:16 .text.HAL_ADCEx_Calibration_Start:0000000000000000 $t - /tmp/ccS1GlwB.s:23 .text.HAL_ADCEx_Calibration_Start:0000000000000000 HAL_ADCEx_Calibration_Start - /tmp/ccS1GlwB.s:164 .text.HAL_ADCEx_Calibration_Start:00000000000000a4 $d - /tmp/ccS1GlwB.s:169 .text.HAL_ADCEx_Calibration_GetValue:0000000000000000 $t - /tmp/ccS1GlwB.s:176 .text.HAL_ADCEx_Calibration_GetValue:0000000000000000 HAL_ADCEx_Calibration_GetValue - /tmp/ccS1GlwB.s:198 .text.HAL_ADCEx_Calibration_SetValue:0000000000000000 $t - /tmp/ccS1GlwB.s:205 .text.HAL_ADCEx_Calibration_SetValue:0000000000000000 HAL_ADCEx_Calibration_SetValue - /tmp/ccS1GlwB.s:300 .text.HAL_ADCEx_EnableVREFINT:0000000000000000 $t - /tmp/ccS1GlwB.s:307 .text.HAL_ADCEx_EnableVREFINT:0000000000000000 HAL_ADCEx_EnableVREFINT - /tmp/ccS1GlwB.s:357 .text.HAL_ADCEx_EnableVREFINT:0000000000000030 $d - /tmp/ccS1GlwB.s:362 .text.HAL_ADCEx_DisableVREFINT:0000000000000000 $t - /tmp/ccS1GlwB.s:369 .text.HAL_ADCEx_DisableVREFINT:0000000000000000 HAL_ADCEx_DisableVREFINT - /tmp/ccS1GlwB.s:388 .text.HAL_ADCEx_DisableVREFINT:000000000000000c $d - /tmp/ccS1GlwB.s:394 .text.HAL_ADCEx_EnableVREFINTTempSensor:0000000000000000 $t - /tmp/ccS1GlwB.s:401 .text.HAL_ADCEx_EnableVREFINTTempSensor:0000000000000000 HAL_ADCEx_EnableVREFINTTempSensor - /tmp/ccS1GlwB.s:451 .text.HAL_ADCEx_EnableVREFINTTempSensor:0000000000000030 $d - /tmp/ccS1GlwB.s:456 .text.HAL_ADCEx_DisableVREFINTTempSensor:0000000000000000 $t - /tmp/ccS1GlwB.s:463 .text.HAL_ADCEx_DisableVREFINTTempSensor:0000000000000000 HAL_ADCEx_DisableVREFINTTempSensor - /tmp/ccS1GlwB.s:482 .text.HAL_ADCEx_DisableVREFINTTempSensor:000000000000000c $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -HAL_GetTick diff --git a/build/stm32l0xx_hal_comp.d b/build/stm32l0xx_hal_comp.d deleted file mode 100644 index 49b6966..0000000 --- a/build/stm32l0xx_hal_comp.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_comp.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_comp.lst b/build/stm32l0xx_hal_comp.lst deleted file mode 100644 index 1e9a007..0000000 --- a/build/stm32l0xx_hal_comp.lst +++ /dev/null @@ -1,32 +0,0 @@ -ARM GAS /tmp/ccN7bVXM.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_comp.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .Letext0: - 16 .file 1 "/usr/arm-none-eabi/include/machine/_default_types.h" - 17 .file 2 "/usr/arm-none-eabi/include/sys/_stdint.h" - 18 .file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 19 .file 4 "/usr/arm-none-eabi/include/sys/lock.h" - 20 .file 5 "/usr/arm-none-eabi/include/sys/_types.h" - 21 .file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 22 .file 7 "/usr/arm-none-eabi/include/sys/reent.h" - ARM GAS /tmp/ccN7bVXM.s page 2 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_comp.c - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_comp_ex.d b/build/stm32l0xx_hal_comp_ex.d deleted file mode 100644 index f5353e1..0000000 --- a/build/stm32l0xx_hal_comp_ex.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_comp_ex.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_comp_ex.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_comp_ex.lst b/build/stm32l0xx_hal_comp_ex.lst deleted file mode 100644 index 4103d13..0000000 --- a/build/stm32l0xx_hal_comp_ex.lst +++ /dev/null @@ -1,32 +0,0 @@ -ARM GAS /tmp/cc5ogqer.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_comp_ex.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .Letext0: - 16 .file 1 "/usr/arm-none-eabi/include/machine/_default_types.h" - 17 .file 2 "/usr/arm-none-eabi/include/sys/_stdint.h" - 18 .file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 19 .file 4 "/usr/arm-none-eabi/include/sys/lock.h" - 20 .file 5 "/usr/arm-none-eabi/include/sys/_types.h" - 21 .file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 22 .file 7 "/usr/arm-none-eabi/include/sys/reent.h" - ARM GAS /tmp/cc5ogqer.s page 2 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_comp_ex.c - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_cortex.d b/build/stm32l0xx_hal_cortex.d deleted file mode 100644 index 995cfb0..0000000 --- a/build/stm32l0xx_hal_cortex.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_cortex.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_cortex.lst b/build/stm32l0xx_hal_cortex.lst deleted file mode 100644 index 264d695..0000000 --- a/build/stm32l0xx_hal_cortex.lst +++ /dev/null @@ -1,2621 +0,0 @@ -ARM GAS /tmp/ccd4VzkJ.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_cortex.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.HAL_NVIC_SetPriority,"ax",%progbits - 16 .align 1 - 17 .global HAL_NVIC_SetPriority - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 HAL_NVIC_SetPriority: - 24 .LFB39: - 25 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @file stm32l0xx_hal_cortex.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief CORTEX HAL module driver. - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This file provides firmware functions to manage the following - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * functionalities of the CORTEX: - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * + Initialization and de-initialization functions - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * + Peripheral Control functions - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** @verbatim - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ============================================================================== - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ##### How to use this driver ##### - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ============================================================================== - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** [..] - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** *** How to configure Interrupts using CORTEX HAL driver *** - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** =========================================================== - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** [..] - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** This section provide functions allowing to configure the NVIC interrupts (IRQ). - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** The Cortex-M0+ exceptions are managed by CMSIS functions. - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (#) Enable and Configure the priority of the selected IRQ Channels. - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** The priority can be 0..3. - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** -@- Lower priority values gives higher priority. - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** -@- Priority Order: - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (#@) Lowest priority. - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (#@) Lowest hardware priority (IRQn position). - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - ARM GAS /tmp/ccd4VzkJ.s page 2 - - - 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** [..] - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** *** How to configure Systick using CORTEX HAL driver *** - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ======================================================== - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** [..] - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** Setup SysTick Timer for time base - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** is a CMSIS function that: - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (++) Configures the SysTick Reload register with value passed as function parameter. - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (++) Configures the SysTick IRQ priority to the lowest value (0x03). - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (++) Resets the SysTick Counter register. - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (++) Enables the SysTick Interrupt. - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (++) Starts the SysTick Counter. - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the function - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() function is defined - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** inside the stm32l0xx_hal_cortex.c file. - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (+) You can change the SysTick IRQ priority by calling the - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS funct - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (+) To adjust the SysTick time base, use the following formula: - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) - 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (++) Reload Value should not exceed 0xFFFFFF - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** @endverbatim - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ****************************************************************************** - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @attention - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * Redistribution and use in source and binary forms, with or without modification, - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * are permitted provided that the following conditions are met: - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * 1. Redistributions of source code must retain the above copyright notice, - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * this list of conditions and the following disclaimer. - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * this list of conditions and the following disclaimer in the documentation - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * and/or other materials provided with the distribution. - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * may be used to endorse or promote products derived from this software - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * without specific prior written permission. - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ARM GAS /tmp/ccd4VzkJ.s page 3 - - - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ****************************************************************************** - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Includes ------------------------------------------------------------------*/ - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** #include "stm32l0xx_hal.h" - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** @addtogroup STM32L0xx_HAL_Driver - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @{ - 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** #ifdef HAL_CORTEX_MODULE_ENABLED - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** @addtogroup CORTEX - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief CORTEX HAL module driver - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @{ - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Private types -------------------------------------------------------------*/ - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Private variables ---------------------------------------------------------*/ - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Private constants ---------------------------------------------------------*/ - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Private macros ------------------------------------------------------------*/ - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Private functions ---------------------------------------------------------*/ - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Exported functions --------------------------------------------------------*/ - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** @addtogroup CORTEX_Exported_Functions - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @{ - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** @addtogroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Initialization and Configuration functions - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** @verbatim - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ============================================================================== - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ##### Initialization and de-initialization functions ##### - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ============================================================================== - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** [..] - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** This section provides the CORTEX HAL driver functions allowing to configure Interrupts - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** Systick functionalities - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** @endverbatim - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @{ - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Sets the priority of an interrupt. - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param IRQn: External interrupt number . - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param PreemptPriority: The pre-emption priority for the IRQn channel. - 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This parameter can be a value between 0 and 3. - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * A lower priority value indicates a higher priority - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param SubPriority: The subpriority level for the IRQ channel. - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * with stm32l0xx devices, this parameter is a dummy value and it is ignored, because - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * no subpriority supported in Cortex M0+ based products. - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - ARM GAS /tmp/ccd4VzkJ.s page 4 - - - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 26 .loc 1 150 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 .LVL0: - 31 0000 70B5 push {r4, r5, r6, lr} - 32 .LCFI0: - 33 .cfi_def_cfa_offset 16 - 34 .cfi_offset 4, -16 - 35 .cfi_offset 5, -12 - 36 .cfi_offset 6, -8 - 37 .cfi_offset 14, -4 - 38 .LVL1: - 39 .LBB26: - 40 .LBB27: - 41 .file 2 "Drivers/CMSIS/Include/core_cm0plus.h" - 1:Drivers/CMSIS/Include/core_cm0plus.h **** /**************************************************************************//** - 2:Drivers/CMSIS/Include/core_cm0plus.h **** * @file core_cm0plus.h - 3:Drivers/CMSIS/Include/core_cm0plus.h **** * @brief CMSIS Cortex-M0+ Core Peripheral Access Layer Header File - 4:Drivers/CMSIS/Include/core_cm0plus.h **** * @version V4.30 - 5:Drivers/CMSIS/Include/core_cm0plus.h **** * @date 20. October 2015 - 6:Drivers/CMSIS/Include/core_cm0plus.h **** ******************************************************************************/ - 7:Drivers/CMSIS/Include/core_cm0plus.h **** /* Copyright (c) 2009 - 2015 ARM LIMITED - 8:Drivers/CMSIS/Include/core_cm0plus.h **** - 9:Drivers/CMSIS/Include/core_cm0plus.h **** All rights reserved. - 10:Drivers/CMSIS/Include/core_cm0plus.h **** Redistribution and use in source and binary forms, with or without - 11:Drivers/CMSIS/Include/core_cm0plus.h **** modification, are permitted provided that the following conditions are met: - 12:Drivers/CMSIS/Include/core_cm0plus.h **** - Redistributions of source code must retain the above copyright - 13:Drivers/CMSIS/Include/core_cm0plus.h **** notice, this list of conditions and the following disclaimer. - 14:Drivers/CMSIS/Include/core_cm0plus.h **** - Redistributions in binary form must reproduce the above copyright - 15:Drivers/CMSIS/Include/core_cm0plus.h **** notice, this list of conditions and the following disclaimer in the - 16:Drivers/CMSIS/Include/core_cm0plus.h **** documentation and/or other materials provided with the distribution. - 17:Drivers/CMSIS/Include/core_cm0plus.h **** - Neither the name of ARM nor the names of its contributors may be used - 18:Drivers/CMSIS/Include/core_cm0plus.h **** to endorse or promote products derived from this software without - 19:Drivers/CMSIS/Include/core_cm0plus.h **** specific prior written permission. - 20:Drivers/CMSIS/Include/core_cm0plus.h **** * - 21:Drivers/CMSIS/Include/core_cm0plus.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 22:Drivers/CMSIS/Include/core_cm0plus.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 23:Drivers/CMSIS/Include/core_cm0plus.h **** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - 24:Drivers/CMSIS/Include/core_cm0plus.h **** ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - 25:Drivers/CMSIS/Include/core_cm0plus.h **** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - 26:Drivers/CMSIS/Include/core_cm0plus.h **** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - 27:Drivers/CMSIS/Include/core_cm0plus.h **** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - 28:Drivers/CMSIS/Include/core_cm0plus.h **** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - 29:Drivers/CMSIS/Include/core_cm0plus.h **** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - 30:Drivers/CMSIS/Include/core_cm0plus.h **** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - 31:Drivers/CMSIS/Include/core_cm0plus.h **** POSSIBILITY OF SUCH DAMAGE. - 32:Drivers/CMSIS/Include/core_cm0plus.h **** ---------------------------------------------------------------------------*/ - 33:Drivers/CMSIS/Include/core_cm0plus.h **** - 34:Drivers/CMSIS/Include/core_cm0plus.h **** - 35:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined ( __ICCARM__ ) - 36:Drivers/CMSIS/Include/core_cm0plus.h **** #pragma system_include /* treat file as system include file for MISRA check */ - 37:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - 38:Drivers/CMSIS/Include/core_cm0plus.h **** #pragma clang system_header /* treat file as system include file */ - ARM GAS /tmp/ccd4VzkJ.s page 5 - - - 39:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 40:Drivers/CMSIS/Include/core_cm0plus.h **** - 41:Drivers/CMSIS/Include/core_cm0plus.h **** #ifndef __CORE_CM0PLUS_H_GENERIC - 42:Drivers/CMSIS/Include/core_cm0plus.h **** #define __CORE_CM0PLUS_H_GENERIC - 43:Drivers/CMSIS/Include/core_cm0plus.h **** - 44:Drivers/CMSIS/Include/core_cm0plus.h **** #include - 45:Drivers/CMSIS/Include/core_cm0plus.h **** - 46:Drivers/CMSIS/Include/core_cm0plus.h **** #ifdef __cplusplus - 47:Drivers/CMSIS/Include/core_cm0plus.h **** extern "C" { - 48:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 49:Drivers/CMSIS/Include/core_cm0plus.h **** - 50:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 51:Drivers/CMSIS/Include/core_cm0plus.h **** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions - 52:Drivers/CMSIS/Include/core_cm0plus.h **** CMSIS violates the following MISRA-C:2004 rules: - 53:Drivers/CMSIS/Include/core_cm0plus.h **** - 54:Drivers/CMSIS/Include/core_cm0plus.h **** \li Required Rule 8.5, object/function definition in header file.
- 55:Drivers/CMSIS/Include/core_cm0plus.h **** Function definitions in header files are used to allow 'inlining'. - 56:Drivers/CMSIS/Include/core_cm0plus.h **** - 57:Drivers/CMSIS/Include/core_cm0plus.h **** \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
- 58:Drivers/CMSIS/Include/core_cm0plus.h **** Unions are used for effective representation of core registers. - 59:Drivers/CMSIS/Include/core_cm0plus.h **** - 60:Drivers/CMSIS/Include/core_cm0plus.h **** \li Advisory Rule 19.7, Function-like macro defined.
- 61:Drivers/CMSIS/Include/core_cm0plus.h **** Function-like macros are used to allow more efficient code. - 62:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 63:Drivers/CMSIS/Include/core_cm0plus.h **** - 64:Drivers/CMSIS/Include/core_cm0plus.h **** - 65:Drivers/CMSIS/Include/core_cm0plus.h **** /******************************************************************************* - 66:Drivers/CMSIS/Include/core_cm0plus.h **** * CMSIS definitions - 67:Drivers/CMSIS/Include/core_cm0plus.h **** ******************************************************************************/ - 68:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 69:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup Cortex-M0+ - 70:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 71:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 72:Drivers/CMSIS/Include/core_cm0plus.h **** - 73:Drivers/CMSIS/Include/core_cm0plus.h **** /* CMSIS CM0+ definitions */ - 74:Drivers/CMSIS/Include/core_cm0plus.h **** #define __CM0PLUS_CMSIS_VERSION_MAIN (0x04U) /*!< [31:16] CMSIS H - 75:Drivers/CMSIS/Include/core_cm0plus.h **** #define __CM0PLUS_CMSIS_VERSION_SUB (0x1EU) /*!< [15:0] CMSIS H - 76:Drivers/CMSIS/Include/core_cm0plus.h **** #define __CM0PLUS_CMSIS_VERSION ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \ - 77:Drivers/CMSIS/Include/core_cm0plus.h **** __CM0PLUS_CMSIS_VERSION_SUB ) /*!< CMSIS HAL versi - 78:Drivers/CMSIS/Include/core_cm0plus.h **** - 79:Drivers/CMSIS/Include/core_cm0plus.h **** #define __CORTEX_M (0x00U) /*!< Cortex-M Core * - 80:Drivers/CMSIS/Include/core_cm0plus.h **** - 81:Drivers/CMSIS/Include/core_cm0plus.h **** - 82:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined ( __CC_ARM ) - 83:Drivers/CMSIS/Include/core_cm0plus.h **** #define __ASM __asm /*!< asm keyword for ARM Comp - 84:Drivers/CMSIS/Include/core_cm0plus.h **** #define __INLINE __inline /*!< inline keyword for ARM C - 85:Drivers/CMSIS/Include/core_cm0plus.h **** #define __STATIC_INLINE static __inline - 86:Drivers/CMSIS/Include/core_cm0plus.h **** - 87:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - 88:Drivers/CMSIS/Include/core_cm0plus.h **** #define __ASM __asm /*!< asm keyword for ARM Comp - 89:Drivers/CMSIS/Include/core_cm0plus.h **** #define __INLINE __inline /*!< inline keyword for ARM C - 90:Drivers/CMSIS/Include/core_cm0plus.h **** #define __STATIC_INLINE static __inline - 91:Drivers/CMSIS/Include/core_cm0plus.h **** - 92:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __GNUC__ ) - 93:Drivers/CMSIS/Include/core_cm0plus.h **** #define __ASM __asm /*!< asm keyword for GNU Comp - 94:Drivers/CMSIS/Include/core_cm0plus.h **** #define __INLINE inline /*!< inline keyword for GNU C - 95:Drivers/CMSIS/Include/core_cm0plus.h **** #define __STATIC_INLINE static inline - ARM GAS /tmp/ccd4VzkJ.s page 6 - - - 96:Drivers/CMSIS/Include/core_cm0plus.h **** - 97:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __ICCARM__ ) - 98:Drivers/CMSIS/Include/core_cm0plus.h **** #define __ASM __asm /*!< asm keyword for IAR Comp - 99:Drivers/CMSIS/Include/core_cm0plus.h **** #define __INLINE inline /*!< inline keyword for IAR C - 100:Drivers/CMSIS/Include/core_cm0plus.h **** #define __STATIC_INLINE static inline - 101:Drivers/CMSIS/Include/core_cm0plus.h **** - 102:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __TMS470__ ) - 103:Drivers/CMSIS/Include/core_cm0plus.h **** #define __ASM __asm /*!< asm keyword for TI CCS C - 104:Drivers/CMSIS/Include/core_cm0plus.h **** #define __STATIC_INLINE static inline - 105:Drivers/CMSIS/Include/core_cm0plus.h **** - 106:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __TASKING__ ) - 107:Drivers/CMSIS/Include/core_cm0plus.h **** #define __ASM __asm /*!< asm keyword for TASKING - 108:Drivers/CMSIS/Include/core_cm0plus.h **** #define __INLINE inline /*!< inline keyword for TASKI - 109:Drivers/CMSIS/Include/core_cm0plus.h **** #define __STATIC_INLINE static inline - 110:Drivers/CMSIS/Include/core_cm0plus.h **** - 111:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __CSMC__ ) - 112:Drivers/CMSIS/Include/core_cm0plus.h **** #define __packed - 113:Drivers/CMSIS/Include/core_cm0plus.h **** #define __ASM _asm /*!< asm keyword for COSMIC Co - 114:Drivers/CMSIS/Include/core_cm0plus.h **** #define __INLINE inline /*!< inline keyword for COSMIC - 115:Drivers/CMSIS/Include/core_cm0plus.h **** #define __STATIC_INLINE static inline - 116:Drivers/CMSIS/Include/core_cm0plus.h **** - 117:Drivers/CMSIS/Include/core_cm0plus.h **** #else - 118:Drivers/CMSIS/Include/core_cm0plus.h **** #error Unknown compiler - 119:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 120:Drivers/CMSIS/Include/core_cm0plus.h **** - 121:Drivers/CMSIS/Include/core_cm0plus.h **** /** __FPU_USED indicates whether an FPU is used or not. - 122:Drivers/CMSIS/Include/core_cm0plus.h **** This core does not support an FPU at all - 123:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 124:Drivers/CMSIS/Include/core_cm0plus.h **** #define __FPU_USED 0U - 125:Drivers/CMSIS/Include/core_cm0plus.h **** - 126:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined ( __CC_ARM ) - 127:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined __TARGET_FPU_VFP - 128:Drivers/CMSIS/Include/core_cm0plus.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - 129:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 130:Drivers/CMSIS/Include/core_cm0plus.h **** - 131:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) - 132:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined __ARM_PCS_VFP - 133:Drivers/CMSIS/Include/core_cm0plus.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - 134:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 135:Drivers/CMSIS/Include/core_cm0plus.h **** - 136:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __GNUC__ ) - 137:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined (__VFP_FP__) && !defined(__SOFTFP__) - 138:Drivers/CMSIS/Include/core_cm0plus.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - 139:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 140:Drivers/CMSIS/Include/core_cm0plus.h **** - 141:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __ICCARM__ ) - 142:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined __ARMVFP__ - 143:Drivers/CMSIS/Include/core_cm0plus.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - 144:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 145:Drivers/CMSIS/Include/core_cm0plus.h **** - 146:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __TMS470__ ) - 147:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined __TI_VFP_SUPPORT__ - 148:Drivers/CMSIS/Include/core_cm0plus.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - 149:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 150:Drivers/CMSIS/Include/core_cm0plus.h **** - 151:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __TASKING__ ) - 152:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined __FPU_VFP__ - ARM GAS /tmp/ccd4VzkJ.s page 7 - - - 153:Drivers/CMSIS/Include/core_cm0plus.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - 154:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 155:Drivers/CMSIS/Include/core_cm0plus.h **** - 156:Drivers/CMSIS/Include/core_cm0plus.h **** #elif defined ( __CSMC__ ) - 157:Drivers/CMSIS/Include/core_cm0plus.h **** #if ( __CSMC__ & 0x400U) - 158:Drivers/CMSIS/Include/core_cm0plus.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" - 159:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 160:Drivers/CMSIS/Include/core_cm0plus.h **** - 161:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 162:Drivers/CMSIS/Include/core_cm0plus.h **** - 163:Drivers/CMSIS/Include/core_cm0plus.h **** #include "core_cmInstr.h" /* Core Instruction Access */ - 164:Drivers/CMSIS/Include/core_cm0plus.h **** #include "core_cmFunc.h" /* Core Function Access */ - 165:Drivers/CMSIS/Include/core_cm0plus.h **** - 166:Drivers/CMSIS/Include/core_cm0plus.h **** #ifdef __cplusplus - 167:Drivers/CMSIS/Include/core_cm0plus.h **** } - 168:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 169:Drivers/CMSIS/Include/core_cm0plus.h **** - 170:Drivers/CMSIS/Include/core_cm0plus.h **** #endif /* __CORE_CM0PLUS_H_GENERIC */ - 171:Drivers/CMSIS/Include/core_cm0plus.h **** - 172:Drivers/CMSIS/Include/core_cm0plus.h **** #ifndef __CMSIS_GENERIC - 173:Drivers/CMSIS/Include/core_cm0plus.h **** - 174:Drivers/CMSIS/Include/core_cm0plus.h **** #ifndef __CORE_CM0PLUS_H_DEPENDANT - 175:Drivers/CMSIS/Include/core_cm0plus.h **** #define __CORE_CM0PLUS_H_DEPENDANT - 176:Drivers/CMSIS/Include/core_cm0plus.h **** - 177:Drivers/CMSIS/Include/core_cm0plus.h **** #ifdef __cplusplus - 178:Drivers/CMSIS/Include/core_cm0plus.h **** extern "C" { - 179:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 180:Drivers/CMSIS/Include/core_cm0plus.h **** - 181:Drivers/CMSIS/Include/core_cm0plus.h **** /* check device defines and use defaults */ - 182:Drivers/CMSIS/Include/core_cm0plus.h **** #if defined __CHECK_DEVICE_DEFINES - 183:Drivers/CMSIS/Include/core_cm0plus.h **** #ifndef __CM0PLUS_REV - 184:Drivers/CMSIS/Include/core_cm0plus.h **** #define __CM0PLUS_REV 0x0000U - 185:Drivers/CMSIS/Include/core_cm0plus.h **** #warning "__CM0PLUS_REV not defined in device header file; using default!" - 186:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 187:Drivers/CMSIS/Include/core_cm0plus.h **** - 188:Drivers/CMSIS/Include/core_cm0plus.h **** #ifndef __MPU_PRESENT - 189:Drivers/CMSIS/Include/core_cm0plus.h **** #define __MPU_PRESENT 0U - 190:Drivers/CMSIS/Include/core_cm0plus.h **** #warning "__MPU_PRESENT not defined in device header file; using default!" - 191:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 192:Drivers/CMSIS/Include/core_cm0plus.h **** - 193:Drivers/CMSIS/Include/core_cm0plus.h **** #ifndef __VTOR_PRESENT - 194:Drivers/CMSIS/Include/core_cm0plus.h **** #define __VTOR_PRESENT 0U - 195:Drivers/CMSIS/Include/core_cm0plus.h **** #warning "__VTOR_PRESENT not defined in device header file; using default!" - 196:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 197:Drivers/CMSIS/Include/core_cm0plus.h **** - 198:Drivers/CMSIS/Include/core_cm0plus.h **** #ifndef __NVIC_PRIO_BITS - 199:Drivers/CMSIS/Include/core_cm0plus.h **** #define __NVIC_PRIO_BITS 2U - 200:Drivers/CMSIS/Include/core_cm0plus.h **** #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" - 201:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 202:Drivers/CMSIS/Include/core_cm0plus.h **** - 203:Drivers/CMSIS/Include/core_cm0plus.h **** #ifndef __Vendor_SysTickConfig - 204:Drivers/CMSIS/Include/core_cm0plus.h **** #define __Vendor_SysTickConfig 0U - 205:Drivers/CMSIS/Include/core_cm0plus.h **** #warning "__Vendor_SysTickConfig not defined in device header file; using default!" - 206:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 207:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 208:Drivers/CMSIS/Include/core_cm0plus.h **** - 209:Drivers/CMSIS/Include/core_cm0plus.h **** /* IO definitions (access restrictions to peripheral registers) */ - ARM GAS /tmp/ccd4VzkJ.s page 8 - - - 210:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 211:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_glob_defs CMSIS Global Defines - 212:Drivers/CMSIS/Include/core_cm0plus.h **** - 213:Drivers/CMSIS/Include/core_cm0plus.h **** IO Type Qualifiers are used - 214:Drivers/CMSIS/Include/core_cm0plus.h **** \li to specify the access to peripheral variables. - 215:Drivers/CMSIS/Include/core_cm0plus.h **** \li for automatic generation of peripheral register debug information. - 216:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 217:Drivers/CMSIS/Include/core_cm0plus.h **** #ifdef __cplusplus - 218:Drivers/CMSIS/Include/core_cm0plus.h **** #define __I volatile /*!< Defines 'read only' permissions */ - 219:Drivers/CMSIS/Include/core_cm0plus.h **** #else - 220:Drivers/CMSIS/Include/core_cm0plus.h **** #define __I volatile const /*!< Defines 'read only' permissions */ - 221:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 222:Drivers/CMSIS/Include/core_cm0plus.h **** #define __O volatile /*!< Defines 'write only' permissions */ - 223:Drivers/CMSIS/Include/core_cm0plus.h **** #define __IO volatile /*!< Defines 'read / write' permissions */ - 224:Drivers/CMSIS/Include/core_cm0plus.h **** - 225:Drivers/CMSIS/Include/core_cm0plus.h **** /* following defines should be used for structure members */ - 226:Drivers/CMSIS/Include/core_cm0plus.h **** #define __IM volatile const /*! Defines 'read only' structure member permissions */ - 227:Drivers/CMSIS/Include/core_cm0plus.h **** #define __OM volatile /*! Defines 'write only' structure member permissions */ - 228:Drivers/CMSIS/Include/core_cm0plus.h **** #define __IOM volatile /*! Defines 'read / write' structure member permissions */ - 229:Drivers/CMSIS/Include/core_cm0plus.h **** - 230:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} end of group Cortex-M0+ */ - 231:Drivers/CMSIS/Include/core_cm0plus.h **** - 232:Drivers/CMSIS/Include/core_cm0plus.h **** - 233:Drivers/CMSIS/Include/core_cm0plus.h **** - 234:Drivers/CMSIS/Include/core_cm0plus.h **** /******************************************************************************* - 235:Drivers/CMSIS/Include/core_cm0plus.h **** * Register Abstraction - 236:Drivers/CMSIS/Include/core_cm0plus.h **** Core Register contain: - 237:Drivers/CMSIS/Include/core_cm0plus.h **** - Core Register - 238:Drivers/CMSIS/Include/core_cm0plus.h **** - Core NVIC Register - 239:Drivers/CMSIS/Include/core_cm0plus.h **** - Core SCB Register - 240:Drivers/CMSIS/Include/core_cm0plus.h **** - Core SysTick Register - 241:Drivers/CMSIS/Include/core_cm0plus.h **** - Core MPU Register - 242:Drivers/CMSIS/Include/core_cm0plus.h **** ******************************************************************************/ - 243:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 244:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_core_register Defines and Type Definitions - 245:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Type definitions and defines for Cortex-M processor based devices. - 246:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 247:Drivers/CMSIS/Include/core_cm0plus.h **** - 248:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 249:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_core_register - 250:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_CORE Status and Control Registers - 251:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Core Register type definitions. - 252:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 253:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 254:Drivers/CMSIS/Include/core_cm0plus.h **** - 255:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 256:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Union type to access the Application Program Status Register (APSR). - 257:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 258:Drivers/CMSIS/Include/core_cm0plus.h **** typedef union - 259:Drivers/CMSIS/Include/core_cm0plus.h **** { - 260:Drivers/CMSIS/Include/core_cm0plus.h **** struct - 261:Drivers/CMSIS/Include/core_cm0plus.h **** { - 262:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ - 263:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - 264:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - 265:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - 266:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - ARM GAS /tmp/ccd4VzkJ.s page 9 - - - 267:Drivers/CMSIS/Include/core_cm0plus.h **** } b; /*!< Structure used for bit access */ - 268:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t w; /*!< Type used for word access */ - 269:Drivers/CMSIS/Include/core_cm0plus.h **** } APSR_Type; - 270:Drivers/CMSIS/Include/core_cm0plus.h **** - 271:Drivers/CMSIS/Include/core_cm0plus.h **** /* APSR Register Definitions */ - 272:Drivers/CMSIS/Include/core_cm0plus.h **** #define APSR_N_Pos 31U /*!< APSR - 273:Drivers/CMSIS/Include/core_cm0plus.h **** #define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR - 274:Drivers/CMSIS/Include/core_cm0plus.h **** - 275:Drivers/CMSIS/Include/core_cm0plus.h **** #define APSR_Z_Pos 30U /*!< APSR - 276:Drivers/CMSIS/Include/core_cm0plus.h **** #define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR - 277:Drivers/CMSIS/Include/core_cm0plus.h **** - 278:Drivers/CMSIS/Include/core_cm0plus.h **** #define APSR_C_Pos 29U /*!< APSR - 279:Drivers/CMSIS/Include/core_cm0plus.h **** #define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR - 280:Drivers/CMSIS/Include/core_cm0plus.h **** - 281:Drivers/CMSIS/Include/core_cm0plus.h **** #define APSR_V_Pos 28U /*!< APSR - 282:Drivers/CMSIS/Include/core_cm0plus.h **** #define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR - 283:Drivers/CMSIS/Include/core_cm0plus.h **** - 284:Drivers/CMSIS/Include/core_cm0plus.h **** - 285:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 286:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Union type to access the Interrupt Program Status Register (IPSR). - 287:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 288:Drivers/CMSIS/Include/core_cm0plus.h **** typedef union - 289:Drivers/CMSIS/Include/core_cm0plus.h **** { - 290:Drivers/CMSIS/Include/core_cm0plus.h **** struct - 291:Drivers/CMSIS/Include/core_cm0plus.h **** { - 292:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - 293:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ - 294:Drivers/CMSIS/Include/core_cm0plus.h **** } b; /*!< Structure used for bit access */ - 295:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t w; /*!< Type used for word access */ - 296:Drivers/CMSIS/Include/core_cm0plus.h **** } IPSR_Type; - 297:Drivers/CMSIS/Include/core_cm0plus.h **** - 298:Drivers/CMSIS/Include/core_cm0plus.h **** /* IPSR Register Definitions */ - 299:Drivers/CMSIS/Include/core_cm0plus.h **** #define IPSR_ISR_Pos 0U /*!< IPSR - 300:Drivers/CMSIS/Include/core_cm0plus.h **** #define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR - 301:Drivers/CMSIS/Include/core_cm0plus.h **** - 302:Drivers/CMSIS/Include/core_cm0plus.h **** - 303:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 304:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Union type to access the Special-Purpose Program Status Registers (xPSR). - 305:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 306:Drivers/CMSIS/Include/core_cm0plus.h **** typedef union - 307:Drivers/CMSIS/Include/core_cm0plus.h **** { - 308:Drivers/CMSIS/Include/core_cm0plus.h **** struct - 309:Drivers/CMSIS/Include/core_cm0plus.h **** { - 310:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ - 311:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ - 312:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ - 313:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ - 314:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ - 315:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ - 316:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ - 317:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ - 318:Drivers/CMSIS/Include/core_cm0plus.h **** } b; /*!< Structure used for bit access */ - 319:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t w; /*!< Type used for word access */ - 320:Drivers/CMSIS/Include/core_cm0plus.h **** } xPSR_Type; - 321:Drivers/CMSIS/Include/core_cm0plus.h **** - 322:Drivers/CMSIS/Include/core_cm0plus.h **** /* xPSR Register Definitions */ - 323:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_N_Pos 31U /*!< xPSR - ARM GAS /tmp/ccd4VzkJ.s page 10 - - - 324:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR - 325:Drivers/CMSIS/Include/core_cm0plus.h **** - 326:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_Z_Pos 30U /*!< xPSR - 327:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR - 328:Drivers/CMSIS/Include/core_cm0plus.h **** - 329:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_C_Pos 29U /*!< xPSR - 330:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR - 331:Drivers/CMSIS/Include/core_cm0plus.h **** - 332:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_V_Pos 28U /*!< xPSR - 333:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR - 334:Drivers/CMSIS/Include/core_cm0plus.h **** - 335:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_T_Pos 24U /*!< xPSR - 336:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR - 337:Drivers/CMSIS/Include/core_cm0plus.h **** - 338:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_ISR_Pos 0U /*!< xPSR - 339:Drivers/CMSIS/Include/core_cm0plus.h **** #define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR - 340:Drivers/CMSIS/Include/core_cm0plus.h **** - 341:Drivers/CMSIS/Include/core_cm0plus.h **** - 342:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 343:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Union type to access the Control Registers (CONTROL). - 344:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 345:Drivers/CMSIS/Include/core_cm0plus.h **** typedef union - 346:Drivers/CMSIS/Include/core_cm0plus.h **** { - 347:Drivers/CMSIS/Include/core_cm0plus.h **** struct - 348:Drivers/CMSIS/Include/core_cm0plus.h **** { - 349:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ - 350:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ - 351:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ - 352:Drivers/CMSIS/Include/core_cm0plus.h **** } b; /*!< Structure used for bit access */ - 353:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t w; /*!< Type used for word access */ - 354:Drivers/CMSIS/Include/core_cm0plus.h **** } CONTROL_Type; - 355:Drivers/CMSIS/Include/core_cm0plus.h **** - 356:Drivers/CMSIS/Include/core_cm0plus.h **** /* CONTROL Register Definitions */ - 357:Drivers/CMSIS/Include/core_cm0plus.h **** #define CONTROL_SPSEL_Pos 1U /*!< CONT - 358:Drivers/CMSIS/Include/core_cm0plus.h **** #define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONT - 359:Drivers/CMSIS/Include/core_cm0plus.h **** - 360:Drivers/CMSIS/Include/core_cm0plus.h **** #define CONTROL_nPRIV_Pos 0U /*!< CONT - 361:Drivers/CMSIS/Include/core_cm0plus.h **** #define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONT - 362:Drivers/CMSIS/Include/core_cm0plus.h **** - 363:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} end of group CMSIS_CORE */ - 364:Drivers/CMSIS/Include/core_cm0plus.h **** - 365:Drivers/CMSIS/Include/core_cm0plus.h **** - 366:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 367:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_core_register - 368:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) - 369:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Type definitions for the NVIC Registers - 370:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 371:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 372:Drivers/CMSIS/Include/core_cm0plus.h **** - 373:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 374:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). - 375:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 376:Drivers/CMSIS/Include/core_cm0plus.h **** typedef struct - 377:Drivers/CMSIS/Include/core_cm0plus.h **** { - 378:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - 379:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t RESERVED0[31U]; - 380:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register - ARM GAS /tmp/ccd4VzkJ.s page 11 - - - 381:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t RSERVED1[31U]; - 382:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * - 383:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t RESERVED2[31U]; - 384:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register - 385:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t RESERVED3[31U]; - 386:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t RESERVED4[64U]; - 387:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ - 388:Drivers/CMSIS/Include/core_cm0plus.h **** } NVIC_Type; - 389:Drivers/CMSIS/Include/core_cm0plus.h **** - 390:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} end of group CMSIS_NVIC */ - 391:Drivers/CMSIS/Include/core_cm0plus.h **** - 392:Drivers/CMSIS/Include/core_cm0plus.h **** - 393:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 394:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_core_register - 395:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_SCB System Control Block (SCB) - 396:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Type definitions for the System Control Block Registers - 397:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 398:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 399:Drivers/CMSIS/Include/core_cm0plus.h **** - 400:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 401:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Structure type to access the System Control Block (SCB). - 402:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 403:Drivers/CMSIS/Include/core_cm0plus.h **** typedef struct - 404:Drivers/CMSIS/Include/core_cm0plus.h **** { - 405:Drivers/CMSIS/Include/core_cm0plus.h **** __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - 406:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regi - 407:Drivers/CMSIS/Include/core_cm0plus.h **** #if (__VTOR_PRESENT == 1U) - 408:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ - 409:Drivers/CMSIS/Include/core_cm0plus.h **** #else - 410:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t RESERVED0; - 411:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 412:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset - 413:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - 414:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register * - 415:Drivers/CMSIS/Include/core_cm0plus.h **** uint32_t RESERVED1; - 416:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registe - 417:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State - 418:Drivers/CMSIS/Include/core_cm0plus.h **** } SCB_Type; - 419:Drivers/CMSIS/Include/core_cm0plus.h **** - 420:Drivers/CMSIS/Include/core_cm0plus.h **** /* SCB CPUID Register Definitions */ - 421:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB - 422:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB - 423:Drivers/CMSIS/Include/core_cm0plus.h **** - 424:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_VARIANT_Pos 20U /*!< SCB - 425:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB - 426:Drivers/CMSIS/Include/core_cm0plus.h **** - 427:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB - 428:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB - 429:Drivers/CMSIS/Include/core_cm0plus.h **** - 430:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_PARTNO_Pos 4U /*!< SCB - 431:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB - 432:Drivers/CMSIS/Include/core_cm0plus.h **** - 433:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_REVISION_Pos 0U /*!< SCB - 434:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB - 435:Drivers/CMSIS/Include/core_cm0plus.h **** - 436:Drivers/CMSIS/Include/core_cm0plus.h **** /* SCB Interrupt Control State Register Definitions */ - 437:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB - ARM GAS /tmp/ccd4VzkJ.s page 12 - - - 438:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB - 439:Drivers/CMSIS/Include/core_cm0plus.h **** - 440:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB - 441:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB - 442:Drivers/CMSIS/Include/core_cm0plus.h **** - 443:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB - 444:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB - 445:Drivers/CMSIS/Include/core_cm0plus.h **** - 446:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB - 447:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB - 448:Drivers/CMSIS/Include/core_cm0plus.h **** - 449:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB - 450:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB - 451:Drivers/CMSIS/Include/core_cm0plus.h **** - 452:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB - 453:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB - 454:Drivers/CMSIS/Include/core_cm0plus.h **** - 455:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB - 456:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB - 457:Drivers/CMSIS/Include/core_cm0plus.h **** - 458:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB - 459:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB - 460:Drivers/CMSIS/Include/core_cm0plus.h **** - 461:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB - 462:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB - 463:Drivers/CMSIS/Include/core_cm0plus.h **** - 464:Drivers/CMSIS/Include/core_cm0plus.h **** #if (__VTOR_PRESENT == 1U) - 465:Drivers/CMSIS/Include/core_cm0plus.h **** /* SCB Interrupt Control State Register Definitions */ - 466:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_VTOR_TBLOFF_Pos 8U /*!< SCB - 467:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_VTOR_TBLOFF_Msk (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB - 468:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 469:Drivers/CMSIS/Include/core_cm0plus.h **** - 470:Drivers/CMSIS/Include/core_cm0plus.h **** /* SCB Application Interrupt and Reset Control Register Definitions */ - 471:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB - 472:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB - 473:Drivers/CMSIS/Include/core_cm0plus.h **** - 474:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB - 475:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB - 476:Drivers/CMSIS/Include/core_cm0plus.h **** - 477:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB - 478:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB - 479:Drivers/CMSIS/Include/core_cm0plus.h **** - 480:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB - 481:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB - 482:Drivers/CMSIS/Include/core_cm0plus.h **** - 483:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB - 484:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB - 485:Drivers/CMSIS/Include/core_cm0plus.h **** - 486:Drivers/CMSIS/Include/core_cm0plus.h **** /* SCB System Control Register Definitions */ - 487:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB - 488:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB - 489:Drivers/CMSIS/Include/core_cm0plus.h **** - 490:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB - 491:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB - 492:Drivers/CMSIS/Include/core_cm0plus.h **** - 493:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB - 494:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB - ARM GAS /tmp/ccd4VzkJ.s page 13 - - - 495:Drivers/CMSIS/Include/core_cm0plus.h **** - 496:Drivers/CMSIS/Include/core_cm0plus.h **** /* SCB Configuration Control Register Definitions */ - 497:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CCR_STKALIGN_Pos 9U /*!< SCB - 498:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB - 499:Drivers/CMSIS/Include/core_cm0plus.h **** - 500:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB - 501:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB - 502:Drivers/CMSIS/Include/core_cm0plus.h **** - 503:Drivers/CMSIS/Include/core_cm0plus.h **** /* SCB System Handler Control and State Register Definitions */ - 504:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB - 505:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB - 506:Drivers/CMSIS/Include/core_cm0plus.h **** - 507:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} end of group CMSIS_SCB */ - 508:Drivers/CMSIS/Include/core_cm0plus.h **** - 509:Drivers/CMSIS/Include/core_cm0plus.h **** - 510:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 511:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_core_register - 512:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_SysTick System Tick Timer (SysTick) - 513:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Type definitions for the System Timer Registers. - 514:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 515:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 516:Drivers/CMSIS/Include/core_cm0plus.h **** - 517:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 518:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Structure type to access the System Timer (SysTick). - 519:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 520:Drivers/CMSIS/Include/core_cm0plus.h **** typedef struct - 521:Drivers/CMSIS/Include/core_cm0plus.h **** { - 522:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regis - 523:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ - 524:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register * - 525:Drivers/CMSIS/Include/core_cm0plus.h **** __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ - 526:Drivers/CMSIS/Include/core_cm0plus.h **** } SysTick_Type; - 527:Drivers/CMSIS/Include/core_cm0plus.h **** - 528:Drivers/CMSIS/Include/core_cm0plus.h **** /* SysTick Control / Status Register Definitions */ - 529:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysT - 530:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysT - 531:Drivers/CMSIS/Include/core_cm0plus.h **** - 532:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysT - 533:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysT - 534:Drivers/CMSIS/Include/core_cm0plus.h **** - 535:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CTRL_TICKINT_Pos 1U /*!< SysT - 536:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysT - 537:Drivers/CMSIS/Include/core_cm0plus.h **** - 538:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CTRL_ENABLE_Pos 0U /*!< SysT - 539:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysT - 540:Drivers/CMSIS/Include/core_cm0plus.h **** - 541:Drivers/CMSIS/Include/core_cm0plus.h **** /* SysTick Reload Register Definitions */ - 542:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_LOAD_RELOAD_Pos 0U /*!< SysT - 543:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysT - 544:Drivers/CMSIS/Include/core_cm0plus.h **** - 545:Drivers/CMSIS/Include/core_cm0plus.h **** /* SysTick Current Register Definitions */ - 546:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_VAL_CURRENT_Pos 0U /*!< SysT - 547:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysT - 548:Drivers/CMSIS/Include/core_cm0plus.h **** - 549:Drivers/CMSIS/Include/core_cm0plus.h **** /* SysTick Calibration Register Definitions */ - 550:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CALIB_NOREF_Pos 31U /*!< SysT - 551:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysT - ARM GAS /tmp/ccd4VzkJ.s page 14 - - - 552:Drivers/CMSIS/Include/core_cm0plus.h **** - 553:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CALIB_SKEW_Pos 30U /*!< SysT - 554:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysT - 555:Drivers/CMSIS/Include/core_cm0plus.h **** - 556:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT - 557:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT - 558:Drivers/CMSIS/Include/core_cm0plus.h **** - 559:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} end of group CMSIS_SysTick */ - 560:Drivers/CMSIS/Include/core_cm0plus.h **** - 561:Drivers/CMSIS/Include/core_cm0plus.h **** #if (__MPU_PRESENT == 1U) - 562:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 563:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_core_register - 564:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_MPU Memory Protection Unit (MPU) - 565:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Type definitions for the Memory Protection Unit (MPU) - 566:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 567:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 568:Drivers/CMSIS/Include/core_cm0plus.h **** - 569:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 570:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Structure type to access the Memory Protection Unit (MPU). - 571:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 572:Drivers/CMSIS/Include/core_cm0plus.h **** typedef struct - 573:Drivers/CMSIS/Include/core_cm0plus.h **** { - 574:Drivers/CMSIS/Include/core_cm0plus.h **** __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ - 575:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ - 576:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ - 577:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register - 578:Drivers/CMSIS/Include/core_cm0plus.h **** __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Re - 579:Drivers/CMSIS/Include/core_cm0plus.h **** } MPU_Type; - 580:Drivers/CMSIS/Include/core_cm0plus.h **** - 581:Drivers/CMSIS/Include/core_cm0plus.h **** /* MPU Type Register Definitions */ - 582:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_TYPE_IREGION_Pos 16U /*!< MPU - 583:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU - 584:Drivers/CMSIS/Include/core_cm0plus.h **** - 585:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_TYPE_DREGION_Pos 8U /*!< MPU - 586:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU - 587:Drivers/CMSIS/Include/core_cm0plus.h **** - 588:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU - 589:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU - 590:Drivers/CMSIS/Include/core_cm0plus.h **** - 591:Drivers/CMSIS/Include/core_cm0plus.h **** /* MPU Control Register Definitions */ - 592:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU - 593:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU - 594:Drivers/CMSIS/Include/core_cm0plus.h **** - 595:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU - 596:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU - 597:Drivers/CMSIS/Include/core_cm0plus.h **** - 598:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_CTRL_ENABLE_Pos 0U /*!< MPU - 599:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU - 600:Drivers/CMSIS/Include/core_cm0plus.h **** - 601:Drivers/CMSIS/Include/core_cm0plus.h **** /* MPU Region Number Register Definitions */ - 602:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RNR_REGION_Pos 0U /*!< MPU - 603:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU - 604:Drivers/CMSIS/Include/core_cm0plus.h **** - 605:Drivers/CMSIS/Include/core_cm0plus.h **** /* MPU Region Base Address Register Definitions */ - 606:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RBAR_ADDR_Pos 8U /*!< MPU - 607:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RBAR_ADDR_Msk (0xFFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU - 608:Drivers/CMSIS/Include/core_cm0plus.h **** - ARM GAS /tmp/ccd4VzkJ.s page 15 - - - 609:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RBAR_VALID_Pos 4U /*!< MPU - 610:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU - 611:Drivers/CMSIS/Include/core_cm0plus.h **** - 612:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RBAR_REGION_Pos 0U /*!< MPU - 613:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU - 614:Drivers/CMSIS/Include/core_cm0plus.h **** - 615:Drivers/CMSIS/Include/core_cm0plus.h **** /* MPU Region Attribute and Size Register Definitions */ - 616:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_ATTRS_Pos 16U /*!< MPU - 617:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU - 618:Drivers/CMSIS/Include/core_cm0plus.h **** - 619:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_XN_Pos 28U /*!< MPU - 620:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU - 621:Drivers/CMSIS/Include/core_cm0plus.h **** - 622:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_AP_Pos 24U /*!< MPU - 623:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU - 624:Drivers/CMSIS/Include/core_cm0plus.h **** - 625:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_TEX_Pos 19U /*!< MPU - 626:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU - 627:Drivers/CMSIS/Include/core_cm0plus.h **** - 628:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_S_Pos 18U /*!< MPU - 629:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU - 630:Drivers/CMSIS/Include/core_cm0plus.h **** - 631:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_C_Pos 17U /*!< MPU - 632:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU - 633:Drivers/CMSIS/Include/core_cm0plus.h **** - 634:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_B_Pos 16U /*!< MPU - 635:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU - 636:Drivers/CMSIS/Include/core_cm0plus.h **** - 637:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_SRD_Pos 8U /*!< MPU - 638:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU - 639:Drivers/CMSIS/Include/core_cm0plus.h **** - 640:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_SIZE_Pos 1U /*!< MPU - 641:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU - 642:Drivers/CMSIS/Include/core_cm0plus.h **** - 643:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_ENABLE_Pos 0U /*!< MPU - 644:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU - 645:Drivers/CMSIS/Include/core_cm0plus.h **** - 646:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} end of group CMSIS_MPU */ - 647:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 648:Drivers/CMSIS/Include/core_cm0plus.h **** - 649:Drivers/CMSIS/Include/core_cm0plus.h **** - 650:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 651:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_core_register - 652:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) - 653:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible ov - 654:Drivers/CMSIS/Include/core_cm0plus.h **** Therefore they are not covered by the Cortex-M0+ header file. - 655:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 656:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 657:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} end of group CMSIS_CoreDebug */ - 658:Drivers/CMSIS/Include/core_cm0plus.h **** - 659:Drivers/CMSIS/Include/core_cm0plus.h **** - 660:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 661:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_core_register - 662:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_core_bitfield Core register bit field macros - 663:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). - 664:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 665:Drivers/CMSIS/Include/core_cm0plus.h **** */ - ARM GAS /tmp/ccd4VzkJ.s page 16 - - - 666:Drivers/CMSIS/Include/core_cm0plus.h **** - 667:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 668:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Mask and shift a bit field value for use in a register bit range. - 669:Drivers/CMSIS/Include/core_cm0plus.h **** \param[in] field Name of the register bit field. - 670:Drivers/CMSIS/Include/core_cm0plus.h **** \param[in] value Value of the bit field. - 671:Drivers/CMSIS/Include/core_cm0plus.h **** \return Masked and shifted value. - 672:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 673:Drivers/CMSIS/Include/core_cm0plus.h **** #define _VAL2FLD(field, value) ((value << field ## _Pos) & field ## _Msk) - 674:Drivers/CMSIS/Include/core_cm0plus.h **** - 675:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 676:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Mask and shift a register value to extract a bit filed value. - 677:Drivers/CMSIS/Include/core_cm0plus.h **** \param[in] field Name of the register bit field. - 678:Drivers/CMSIS/Include/core_cm0plus.h **** \param[in] value Value of register. - 679:Drivers/CMSIS/Include/core_cm0plus.h **** \return Masked and shifted bit field value. - 680:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 681:Drivers/CMSIS/Include/core_cm0plus.h **** #define _FLD2VAL(field, value) ((value & field ## _Msk) >> field ## _Pos) - 682:Drivers/CMSIS/Include/core_cm0plus.h **** - 683:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} end of group CMSIS_core_bitfield */ - 684:Drivers/CMSIS/Include/core_cm0plus.h **** - 685:Drivers/CMSIS/Include/core_cm0plus.h **** - 686:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 687:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_core_register - 688:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_core_base Core Definitions - 689:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Definitions for base addresses, unions, and structures. - 690:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 691:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 692:Drivers/CMSIS/Include/core_cm0plus.h **** - 693:Drivers/CMSIS/Include/core_cm0plus.h **** /* Memory mapping of Cortex-M0+ Hardware */ - 694:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCS_BASE (0xE000E000UL) /*!< System Control Space Bas - 695:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ - 696:Drivers/CMSIS/Include/core_cm0plus.h **** #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ - 697:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Bas - 698:Drivers/CMSIS/Include/core_cm0plus.h **** - 699:Drivers/CMSIS/Include/core_cm0plus.h **** #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct - 700:Drivers/CMSIS/Include/core_cm0plus.h **** #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration st - 701:Drivers/CMSIS/Include/core_cm0plus.h **** #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc - 702:Drivers/CMSIS/Include/core_cm0plus.h **** - 703:Drivers/CMSIS/Include/core_cm0plus.h **** #if (__MPU_PRESENT == 1U) - 704:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit * - 705:Drivers/CMSIS/Include/core_cm0plus.h **** #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit * - 706:Drivers/CMSIS/Include/core_cm0plus.h **** #endif - 707:Drivers/CMSIS/Include/core_cm0plus.h **** - 708:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} */ - 709:Drivers/CMSIS/Include/core_cm0plus.h **** - 710:Drivers/CMSIS/Include/core_cm0plus.h **** - 711:Drivers/CMSIS/Include/core_cm0plus.h **** - 712:Drivers/CMSIS/Include/core_cm0plus.h **** /******************************************************************************* - 713:Drivers/CMSIS/Include/core_cm0plus.h **** * Hardware Abstraction Layer - 714:Drivers/CMSIS/Include/core_cm0plus.h **** Core Function Interface contains: - 715:Drivers/CMSIS/Include/core_cm0plus.h **** - Core NVIC Functions - 716:Drivers/CMSIS/Include/core_cm0plus.h **** - Core SysTick Functions - 717:Drivers/CMSIS/Include/core_cm0plus.h **** - Core Register Access Functions - 718:Drivers/CMSIS/Include/core_cm0plus.h **** ******************************************************************************/ - 719:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 720:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference - 721:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 722:Drivers/CMSIS/Include/core_cm0plus.h **** - ARM GAS /tmp/ccd4VzkJ.s page 17 - - - 723:Drivers/CMSIS/Include/core_cm0plus.h **** - 724:Drivers/CMSIS/Include/core_cm0plus.h **** - 725:Drivers/CMSIS/Include/core_cm0plus.h **** /* ########################## NVIC functions #################################### */ - 726:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 727:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_Core_FunctionInterface - 728:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_Core_NVICFunctions NVIC Functions - 729:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Functions that manage interrupts and exceptions via the NVIC. - 730:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 731:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 732:Drivers/CMSIS/Include/core_cm0plus.h **** - 733:Drivers/CMSIS/Include/core_cm0plus.h **** /* Interrupt Priorities are WORD accessible only under ARMv6M */ - 734:Drivers/CMSIS/Include/core_cm0plus.h **** /* The following MACROS handle generation of the register offset and byte masks */ - 735:Drivers/CMSIS/Include/core_cm0plus.h **** #define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) - 736:Drivers/CMSIS/Include/core_cm0plus.h **** #define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) - 737:Drivers/CMSIS/Include/core_cm0plus.h **** #define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) - 738:Drivers/CMSIS/Include/core_cm0plus.h **** - 739:Drivers/CMSIS/Include/core_cm0plus.h **** - 740:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 741:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Enable External Interrupt - 742:Drivers/CMSIS/Include/core_cm0plus.h **** \details Enables a device-specific interrupt in the NVIC interrupt controller. - 743:Drivers/CMSIS/Include/core_cm0plus.h **** \param [in] IRQn External interrupt number. Value cannot be negative. - 744:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 745:Drivers/CMSIS/Include/core_cm0plus.h **** __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) - 746:Drivers/CMSIS/Include/core_cm0plus.h **** { - 747:Drivers/CMSIS/Include/core_cm0plus.h **** NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); - 748:Drivers/CMSIS/Include/core_cm0plus.h **** } - 749:Drivers/CMSIS/Include/core_cm0plus.h **** - 750:Drivers/CMSIS/Include/core_cm0plus.h **** - 751:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 752:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Disable External Interrupt - 753:Drivers/CMSIS/Include/core_cm0plus.h **** \details Disables a device-specific interrupt in the NVIC interrupt controller. - 754:Drivers/CMSIS/Include/core_cm0plus.h **** \param [in] IRQn External interrupt number. Value cannot be negative. - 755:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 756:Drivers/CMSIS/Include/core_cm0plus.h **** __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) - 757:Drivers/CMSIS/Include/core_cm0plus.h **** { - 758:Drivers/CMSIS/Include/core_cm0plus.h **** NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); - 759:Drivers/CMSIS/Include/core_cm0plus.h **** } - 760:Drivers/CMSIS/Include/core_cm0plus.h **** - 761:Drivers/CMSIS/Include/core_cm0plus.h **** - 762:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 763:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Get Pending Interrupt - 764:Drivers/CMSIS/Include/core_cm0plus.h **** \details Reads the pending register in the NVIC and returns the pending bit for the specified int - 765:Drivers/CMSIS/Include/core_cm0plus.h **** \param [in] IRQn Interrupt number. - 766:Drivers/CMSIS/Include/core_cm0plus.h **** \return 0 Interrupt status is not pending. - 767:Drivers/CMSIS/Include/core_cm0plus.h **** \return 1 Interrupt status is pending. - 768:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 769:Drivers/CMSIS/Include/core_cm0plus.h **** __STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) - 770:Drivers/CMSIS/Include/core_cm0plus.h **** { - 771:Drivers/CMSIS/Include/core_cm0plus.h **** return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL - 772:Drivers/CMSIS/Include/core_cm0plus.h **** } - 773:Drivers/CMSIS/Include/core_cm0plus.h **** - 774:Drivers/CMSIS/Include/core_cm0plus.h **** - 775:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 776:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Set Pending Interrupt - 777:Drivers/CMSIS/Include/core_cm0plus.h **** \details Sets the pending bit of an external interrupt. - 778:Drivers/CMSIS/Include/core_cm0plus.h **** \param [in] IRQn Interrupt number. Value cannot be negative. - 779:Drivers/CMSIS/Include/core_cm0plus.h **** */ - ARM GAS /tmp/ccd4VzkJ.s page 18 - - - 780:Drivers/CMSIS/Include/core_cm0plus.h **** __STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) - 781:Drivers/CMSIS/Include/core_cm0plus.h **** { - 782:Drivers/CMSIS/Include/core_cm0plus.h **** NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); - 783:Drivers/CMSIS/Include/core_cm0plus.h **** } - 784:Drivers/CMSIS/Include/core_cm0plus.h **** - 785:Drivers/CMSIS/Include/core_cm0plus.h **** - 786:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 787:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Clear Pending Interrupt - 788:Drivers/CMSIS/Include/core_cm0plus.h **** \details Clears the pending bit of an external interrupt. - 789:Drivers/CMSIS/Include/core_cm0plus.h **** \param [in] IRQn External interrupt number. Value cannot be negative. - 790:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 791:Drivers/CMSIS/Include/core_cm0plus.h **** __STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) - 792:Drivers/CMSIS/Include/core_cm0plus.h **** { - 793:Drivers/CMSIS/Include/core_cm0plus.h **** NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)); - 794:Drivers/CMSIS/Include/core_cm0plus.h **** } - 795:Drivers/CMSIS/Include/core_cm0plus.h **** - 796:Drivers/CMSIS/Include/core_cm0plus.h **** - 797:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 798:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Set Interrupt Priority - 799:Drivers/CMSIS/Include/core_cm0plus.h **** \details Sets the priority of an interrupt. - 800:Drivers/CMSIS/Include/core_cm0plus.h **** \note The priority cannot be set for every core interrupt. - 801:Drivers/CMSIS/Include/core_cm0plus.h **** \param [in] IRQn Interrupt number. - 802:Drivers/CMSIS/Include/core_cm0plus.h **** \param [in] priority Priority to set. - 803:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 804:Drivers/CMSIS/Include/core_cm0plus.h **** __STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) - 805:Drivers/CMSIS/Include/core_cm0plus.h **** { - 806:Drivers/CMSIS/Include/core_cm0plus.h **** if ((int32_t)(IRQn) < 0) - 42 .loc 2 806 0 - 43 0002 0028 cmp r0, #0 - 44 0004 11DB blt .L4 - 807:Drivers/CMSIS/Include/core_cm0plus.h **** { - 808:Drivers/CMSIS/Include/core_cm0plus.h **** SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn)) - 809:Drivers/CMSIS/Include/core_cm0plus.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 810:Drivers/CMSIS/Include/core_cm0plus.h **** } - 811:Drivers/CMSIS/Include/core_cm0plus.h **** else - 812:Drivers/CMSIS/Include/core_cm0plus.h **** { - 813:Drivers/CMSIS/Include/core_cm0plus.h **** NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn)) - 45 .loc 2 813 0 - 46 0006 8408 lsrs r4, r0, #2 - 47 0008 134D ldr r5, .L5 - 48 000a C034 adds r4, r4, #192 - 49 000c A400 lsls r4, r4, #2 - 50 000e 6259 ldr r2, [r4, r5] - 51 .LVL2: - 52 0010 0323 movs r3, #3 - 53 0012 1840 ands r0, r3 - 54 .LVL3: - 55 0014 C000 lsls r0, r0, #3 - 56 0016 FC33 adds r3, r3, #252 - 57 0018 1E00 movs r6, r3 - 58 001a 8640 lsls r6, r6, r0 - 59 001c B243 bics r2, r6 - 814:Drivers/CMSIS/Include/core_cm0plus.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 60 .loc 2 814 0 - 61 001e 8901 lsls r1, r1, #6 - 62 .LVL4: - 63 0020 0B40 ands r3, r1 - ARM GAS /tmp/ccd4VzkJ.s page 19 - - - 64 0022 8340 lsls r3, r3, r0 - 813:Drivers/CMSIS/Include/core_cm0plus.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 65 .loc 2 813 0 - 66 0024 1343 orrs r3, r2 - 67 0026 6351 str r3, [r4, r5] - 68 .LVL5: - 69 .L1: - 70 .LBE27: - 71 .LBE26: - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Check the parameters */ - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** NVIC_SetPriority(IRQn,PreemptPriority); - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 72 .loc 1 154 0 - 73 @ sp needed - 74 0028 70BD pop {r4, r5, r6, pc} - 75 .LVL6: - 76 .L4: - 77 .LBB29: - 78 .LBB28: - 808:Drivers/CMSIS/Include/core_cm0plus.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 79 .loc 2 808 0 - 80 002a C0B2 uxtb r0, r0 - 81 002c 0F22 movs r2, #15 - 82 .LVL7: - 83 002e 0240 ands r2, r0 - 84 0030 083A subs r2, r2, #8 - 85 0032 9208 lsrs r2, r2, #2 - 86 0034 0632 adds r2, r2, #6 - 87 0036 9200 lsls r2, r2, #2 - 88 0038 084B ldr r3, .L5+4 - 89 003a D318 adds r3, r2, r3 - 90 003c 5D68 ldr r5, [r3, #4] - 91 003e 0324 movs r4, #3 - 92 0040 2040 ands r0, r4 - 93 .LVL8: - 94 0042 C000 lsls r0, r0, #3 - 95 0044 FF22 movs r2, #255 - 96 0046 1400 movs r4, r2 - 97 0048 8440 lsls r4, r4, r0 - 98 004a A543 bics r5, r4 - 809:Drivers/CMSIS/Include/core_cm0plus.h **** } - 99 .loc 2 809 0 - 100 004c 8901 lsls r1, r1, #6 - 101 .LVL9: - 102 004e 0A40 ands r2, r1 - 103 0050 8240 lsls r2, r2, r0 - 808:Drivers/CMSIS/Include/core_cm0plus.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 104 .loc 2 808 0 - 105 0052 2A43 orrs r2, r5 - 106 0054 5A60 str r2, [r3, #4] - 107 0056 E7E7 b .L1 - 108 .L6: - 109 .align 2 - 110 .L5: - 111 0058 00E100E0 .word -536813312 - 112 005c 00ED00E0 .word -536810240 - ARM GAS /tmp/ccd4VzkJ.s page 20 - - - 113 .LBE28: - 114 .LBE29: - 115 .cfi_endproc - 116 .LFE39: - 118 .section .text.HAL_NVIC_EnableIRQ,"ax",%progbits - 119 .align 1 - 120 .global HAL_NVIC_EnableIRQ - 121 .syntax unified - 122 .code 16 - 123 .thumb_func - 124 .fpu softvfp - 126 HAL_NVIC_EnableIRQ: - 127 .LFB40: - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Enables a device specific interrupt in the NVIC interrupt controller. - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * function should be called before. - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param IRQn External interrupt number . - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 128 .loc 1 166 0 - 129 .cfi_startproc - 130 @ args = 0, pretend = 0, frame = 0 - 131 @ frame_needed = 0, uses_anonymous_args = 0 - 132 @ link register save eliminated. - 133 .LVL10: - 134 .LBB30: - 135 .LBB31: - 747:Drivers/CMSIS/Include/core_cm0plus.h **** } - 136 .loc 2 747 0 - 137 0000 1F23 movs r3, #31 - 138 0002 1840 ands r0, r3 - 139 .LVL11: - 140 0004 1E3B subs r3, r3, #30 - 141 0006 8340 lsls r3, r3, r0 - 142 0008 014A ldr r2, .L8 - 143 000a 1360 str r3, [r2] - 144 .LVL12: - 145 .LBE31: - 146 .LBE30: - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Check the parameters */ - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Enable interrupt */ - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** NVIC_EnableIRQ(IRQn); - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 147 .loc 1 172 0 - 148 @ sp needed - 149 000c 7047 bx lr - 150 .L9: - 151 000e C046 .align 2 - 152 .L8: - ARM GAS /tmp/ccd4VzkJ.s page 21 - - - 153 0010 00E100E0 .word -536813312 - 154 .cfi_endproc - 155 .LFE40: - 157 .section .text.HAL_NVIC_DisableIRQ,"ax",%progbits - 158 .align 1 - 159 .global HAL_NVIC_DisableIRQ - 160 .syntax unified - 161 .code 16 - 162 .thumb_func - 163 .fpu softvfp - 165 HAL_NVIC_DisableIRQ: - 166 .LFB41: - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Disables a device specific interrupt in the NVIC interrupt controller. - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param IRQn External interrupt number . - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 167 .loc 1 182 0 - 168 .cfi_startproc - 169 @ args = 0, pretend = 0, frame = 0 - 170 @ frame_needed = 0, uses_anonymous_args = 0 - 171 @ link register save eliminated. - 172 .LVL13: - 173 .LBB32: - 174 .LBB33: - 758:Drivers/CMSIS/Include/core_cm0plus.h **** } - 175 .loc 2 758 0 - 176 0000 1F23 movs r3, #31 - 177 0002 1840 ands r0, r3 - 178 .LVL14: - 179 0004 1E3B subs r3, r3, #30 - 180 0006 8340 lsls r3, r3, r0 - 181 0008 0149 ldr r1, .L11 - 182 000a 8022 movs r2, #128 - 183 000c 8B50 str r3, [r1, r2] - 184 .LVL15: - 185 .LBE33: - 186 .LBE32: - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Check the parameters */ - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Disable interrupt */ - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** NVIC_DisableIRQ(IRQn); - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 187 .loc 1 188 0 - 188 @ sp needed - 189 000e 7047 bx lr - 190 .L12: - 191 .align 2 - 192 .L11: - 193 0010 00E100E0 .word -536813312 - 194 .cfi_endproc - ARM GAS /tmp/ccd4VzkJ.s page 22 - - - 195 .LFE41: - 197 .section .text.HAL_NVIC_SystemReset,"ax",%progbits - 198 .align 1 - 199 .global HAL_NVIC_SystemReset - 200 .syntax unified - 201 .code 16 - 202 .thumb_func - 203 .fpu softvfp - 205 HAL_NVIC_SystemReset: - 206 .LFB42: - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Initiates a system reset request to reset the MCU. - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** void HAL_NVIC_SystemReset(void) - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 207 .loc 1 195 0 - 208 .cfi_startproc - 209 @ Volatile: function does not return. - 210 @ args = 0, pretend = 0, frame = 0 - 211 @ frame_needed = 0, uses_anonymous_args = 0 - 212 @ link register save eliminated. - 213 .LBB42: - 214 .LBB43: - 215 .LBB44: - 216 .LBB45: - 217 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" - 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** - 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h - 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS Cortex-M Core Function/Instruction Header File - 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V4.30 - 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 20. October 2015 - 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ - 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Copyright (c) 2009 - 2015 ARM LIMITED - 8:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9:Drivers/CMSIS/Include/cmsis_gcc.h **** All rights reserved. - 10:Drivers/CMSIS/Include/cmsis_gcc.h **** Redistribution and use in source and binary forms, with or without - 11:Drivers/CMSIS/Include/cmsis_gcc.h **** modification, are permitted provided that the following conditions are met: - 12:Drivers/CMSIS/Include/cmsis_gcc.h **** - Redistributions of source code must retain the above copyright - 13:Drivers/CMSIS/Include/cmsis_gcc.h **** notice, this list of conditions and the following disclaimer. - 14:Drivers/CMSIS/Include/cmsis_gcc.h **** - Redistributions in binary form must reproduce the above copyright - 15:Drivers/CMSIS/Include/cmsis_gcc.h **** notice, this list of conditions and the following disclaimer in the - 16:Drivers/CMSIS/Include/cmsis_gcc.h **** documentation and/or other materials provided with the distribution. - 17:Drivers/CMSIS/Include/cmsis_gcc.h **** - Neither the name of ARM nor the names of its contributors may be used - 18:Drivers/CMSIS/Include/cmsis_gcc.h **** to endorse or promote products derived from this software without - 19:Drivers/CMSIS/Include/cmsis_gcc.h **** specific prior written permission. - 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * - 21:Drivers/CMSIS/Include/cmsis_gcc.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 22:Drivers/CMSIS/Include/cmsis_gcc.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 23:Drivers/CMSIS/Include/cmsis_gcc.h **** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - 24:Drivers/CMSIS/Include/cmsis_gcc.h **** ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - 25:Drivers/CMSIS/Include/cmsis_gcc.h **** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - 26:Drivers/CMSIS/Include/cmsis_gcc.h **** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - 27:Drivers/CMSIS/Include/cmsis_gcc.h **** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - 28:Drivers/CMSIS/Include/cmsis_gcc.h **** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - 29:Drivers/CMSIS/Include/cmsis_gcc.h **** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - ARM GAS /tmp/ccd4VzkJ.s page 23 - - - 30:Drivers/CMSIS/Include/cmsis_gcc.h **** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - 31:Drivers/CMSIS/Include/cmsis_gcc.h **** POSSIBILITY OF SUCH DAMAGE. - 32:Drivers/CMSIS/Include/cmsis_gcc.h **** ---------------------------------------------------------------------------*/ - 33:Drivers/CMSIS/Include/cmsis_gcc.h **** - 34:Drivers/CMSIS/Include/cmsis_gcc.h **** - 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H - 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H - 37:Drivers/CMSIS/Include/cmsis_gcc.h **** - 38:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ - 39:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined ( __GNUC__ ) - 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push - 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" - 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" - 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" - 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 45:Drivers/CMSIS/Include/cmsis_gcc.h **** - 46:Drivers/CMSIS/Include/cmsis_gcc.h **** - 47:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ - 48:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface - 49:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - 50:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ - 51:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 52:Drivers/CMSIS/Include/cmsis_gcc.h **** - 53:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 54:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts - 55:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - 56:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 57:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 58:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) - 59:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 60:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); - 61:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 62:Drivers/CMSIS/Include/cmsis_gcc.h **** - 63:Drivers/CMSIS/Include/cmsis_gcc.h **** - 64:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 65:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts - 66:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. - 67:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 68:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 69:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) - 70:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 71:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); - 72:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 73:Drivers/CMSIS/Include/cmsis_gcc.h **** - 74:Drivers/CMSIS/Include/cmsis_gcc.h **** - 75:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 76:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register - 77:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. - 78:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value - 79:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 80:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void) - 81:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 82:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 83:Drivers/CMSIS/Include/cmsis_gcc.h **** - 84:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); - 85:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 86:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccd4VzkJ.s page 24 - - - 87:Drivers/CMSIS/Include/cmsis_gcc.h **** - 88:Drivers/CMSIS/Include/cmsis_gcc.h **** - 89:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 90:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register - 91:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. - 92:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set - 93:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 94:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control) - 95:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 96:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); - 97:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 98:Drivers/CMSIS/Include/cmsis_gcc.h **** - 99:Drivers/CMSIS/Include/cmsis_gcc.h **** - 100:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 101:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register - 102:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. - 103:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value - 104:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 105:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void) - 106:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 107:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 108:Drivers/CMSIS/Include/cmsis_gcc.h **** - 109:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); - 110:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 111:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 112:Drivers/CMSIS/Include/cmsis_gcc.h **** - 113:Drivers/CMSIS/Include/cmsis_gcc.h **** - 114:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 115:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register - 116:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. - 117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value - 118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 119:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void) - 120:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 122:Drivers/CMSIS/Include/cmsis_gcc.h **** - 123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); - 124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 125:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 126:Drivers/CMSIS/Include/cmsis_gcc.h **** - 127:Drivers/CMSIS/Include/cmsis_gcc.h **** - 128:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 129:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register - 130:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. - 131:Drivers/CMSIS/Include/cmsis_gcc.h **** - 132:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value - 133:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 134:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void) - 135:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 137:Drivers/CMSIS/Include/cmsis_gcc.h **** - 138:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); - 139:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 140:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 141:Drivers/CMSIS/Include/cmsis_gcc.h **** - 142:Drivers/CMSIS/Include/cmsis_gcc.h **** - 143:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccd4VzkJ.s page 25 - - - 144:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer - 145:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). - 146:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value - 147:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 148:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void) - 149:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 150:Drivers/CMSIS/Include/cmsis_gcc.h **** register uint32_t result; - 151:Drivers/CMSIS/Include/cmsis_gcc.h **** - 152:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp\n" : "=r" (result) ); - 153:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 155:Drivers/CMSIS/Include/cmsis_gcc.h **** - 156:Drivers/CMSIS/Include/cmsis_gcc.h **** - 157:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 158:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer - 159:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). - 160:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set - 161:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 162:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack) - 163:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 164:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp"); - 165:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 166:Drivers/CMSIS/Include/cmsis_gcc.h **** - 167:Drivers/CMSIS/Include/cmsis_gcc.h **** - 168:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 169:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer - 170:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). - 171:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value - 172:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 173:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void) - 174:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 175:Drivers/CMSIS/Include/cmsis_gcc.h **** register uint32_t result; - 176:Drivers/CMSIS/Include/cmsis_gcc.h **** - 177:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp\n" : "=r" (result) ); - 178:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 179:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 180:Drivers/CMSIS/Include/cmsis_gcc.h **** - 181:Drivers/CMSIS/Include/cmsis_gcc.h **** - 182:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 183:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer - 184:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). - 185:Drivers/CMSIS/Include/cmsis_gcc.h **** - 186:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set - 187:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 188:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack) - 189:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 190:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp"); - 191:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 192:Drivers/CMSIS/Include/cmsis_gcc.h **** - 193:Drivers/CMSIS/Include/cmsis_gcc.h **** - 194:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 195:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask - 196:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. - 197:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value - 198:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 199:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void) - 200:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccd4VzkJ.s page 26 - - - 201:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 202:Drivers/CMSIS/Include/cmsis_gcc.h **** - 203:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) ); - 204:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 205:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 206:Drivers/CMSIS/Include/cmsis_gcc.h **** - 207:Drivers/CMSIS/Include/cmsis_gcc.h **** - 208:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 209:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask - 210:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. - 211:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask - 212:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 213:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask) - 214:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 215:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 216:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 217:Drivers/CMSIS/Include/cmsis_gcc.h **** - 218:Drivers/CMSIS/Include/cmsis_gcc.h **** - 219:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__CORTEX_M >= 0x03U) - 220:Drivers/CMSIS/Include/cmsis_gcc.h **** - 221:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 222:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ - 223:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - 224:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 225:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 226:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void) - 227:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 228:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); - 229:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 230:Drivers/CMSIS/Include/cmsis_gcc.h **** - 231:Drivers/CMSIS/Include/cmsis_gcc.h **** - 232:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 233:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ - 234:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. - 235:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 236:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void) - 238:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 239:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); - 240:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 241:Drivers/CMSIS/Include/cmsis_gcc.h **** - 242:Drivers/CMSIS/Include/cmsis_gcc.h **** - 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority - 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. - 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value - 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void) - 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 250:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 251:Drivers/CMSIS/Include/cmsis_gcc.h **** - 252:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); - 253:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 254:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 255:Drivers/CMSIS/Include/cmsis_gcc.h **** - 256:Drivers/CMSIS/Include/cmsis_gcc.h **** - 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccd4VzkJ.s page 27 - - - 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority - 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. - 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set - 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value) - 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 264:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory"); - 265:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 266:Drivers/CMSIS/Include/cmsis_gcc.h **** - 267:Drivers/CMSIS/Include/cmsis_gcc.h **** - 268:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition - 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable - 271:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. - 272:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set - 273:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 274:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value) - 275:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory"); - 277:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 278:Drivers/CMSIS/Include/cmsis_gcc.h **** - 279:Drivers/CMSIS/Include/cmsis_gcc.h **** - 280:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 281:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask - 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. - 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value - 284:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 285:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void) - 286:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 287:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 288:Drivers/CMSIS/Include/cmsis_gcc.h **** - 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - 290:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 291:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 292:Drivers/CMSIS/Include/cmsis_gcc.h **** - 293:Drivers/CMSIS/Include/cmsis_gcc.h **** - 294:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 295:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask - 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. - 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set - 298:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 299:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask) - 300:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); - 302:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 303:Drivers/CMSIS/Include/cmsis_gcc.h **** - 304:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* (__CORTEX_M >= 0x03U) */ - 305:Drivers/CMSIS/Include/cmsis_gcc.h **** - 306:Drivers/CMSIS/Include/cmsis_gcc.h **** - 307:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) - 308:Drivers/CMSIS/Include/cmsis_gcc.h **** - 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR - 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. - 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value - 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void) - ARM GAS /tmp/ccd4VzkJ.s page 28 - - - 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 316:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - 317:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 318:Drivers/CMSIS/Include/cmsis_gcc.h **** - 319:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Empty asm statement works as a scheduling barrier */ - 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile (""); - 321:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - 322:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile (""); - 323:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 324:Drivers/CMSIS/Include/cmsis_gcc.h **** #else - 325:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0); - 326:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 327:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 328:Drivers/CMSIS/Include/cmsis_gcc.h **** - 329:Drivers/CMSIS/Include/cmsis_gcc.h **** - 330:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 331:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR - 332:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. - 333:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set - 334:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 335:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) - 336:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U) - 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Empty asm statement works as a scheduling barrier */ - 339:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile (""); - 340:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc"); - 341:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile (""); - 342:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 343:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 344:Drivers/CMSIS/Include/cmsis_gcc.h **** - 345:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */ - 346:Drivers/CMSIS/Include/cmsis_gcc.h **** - 347:Drivers/CMSIS/Include/cmsis_gcc.h **** - 348:Drivers/CMSIS/Include/cmsis_gcc.h **** - 349:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ - 350:Drivers/CMSIS/Include/cmsis_gcc.h **** - 351:Drivers/CMSIS/Include/cmsis_gcc.h **** - 352:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ - 353:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface - 354:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions - 355:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ - 356:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 357:Drivers/CMSIS/Include/cmsis_gcc.h **** - 358:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. - 359:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" - 360:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ - 361:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) - 362:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) - 363:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) - 364:Drivers/CMSIS/Include/cmsis_gcc.h **** #else - 365:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) - 366:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) - 367:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 368:Drivers/CMSIS/Include/cmsis_gcc.h **** - 369:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 370:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation - 371:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. - ARM GAS /tmp/ccd4VzkJ.s page 29 - - - 372:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 373:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__((always_inline)) __STATIC_INLINE void __NOP(void) - 374:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 375:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("nop"); - 376:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 377:Drivers/CMSIS/Include/cmsis_gcc.h **** - 378:Drivers/CMSIS/Include/cmsis_gcc.h **** - 379:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt - 381:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o - 382:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__((always_inline)) __STATIC_INLINE void __WFI(void) - 384:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 385:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("wfi"); - 386:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 387:Drivers/CMSIS/Include/cmsis_gcc.h **** - 388:Drivers/CMSIS/Include/cmsis_gcc.h **** - 389:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 390:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event - 391:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter - 392:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. - 393:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 394:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__((always_inline)) __STATIC_INLINE void __WFE(void) - 395:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 396:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("wfe"); - 397:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 398:Drivers/CMSIS/Include/cmsis_gcc.h **** - 399:Drivers/CMSIS/Include/cmsis_gcc.h **** - 400:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 401:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event - 402:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - 403:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 404:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__((always_inline)) __STATIC_INLINE void __SEV(void) - 405:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 406:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sev"); - 407:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 408:Drivers/CMSIS/Include/cmsis_gcc.h **** - 409:Drivers/CMSIS/Include/cmsis_gcc.h **** - 410:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 411:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier - 412:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, - 413:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, - 414:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. - 415:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 416:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__((always_inline)) __STATIC_INLINE void __ISB(void) - 417:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 418:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); - 419:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 420:Drivers/CMSIS/Include/cmsis_gcc.h **** - 421:Drivers/CMSIS/Include/cmsis_gcc.h **** - 422:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 423:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier - 424:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. - 425:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. - 426:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 427:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__((always_inline)) __STATIC_INLINE void __DSB(void) - 428:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccd4VzkJ.s page 30 - - - 429:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); - 218 .loc 3 429 0 - 219 .syntax divided - 220 @ 429 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 221 0000 BFF34F8F dsb 0xF - 222 @ 0 "" 2 - 223 .thumb - 224 .syntax unified - 225 .LBE45: - 226 .LBE44: - 815:Drivers/CMSIS/Include/core_cm0plus.h **** } - 816:Drivers/CMSIS/Include/core_cm0plus.h **** } - 817:Drivers/CMSIS/Include/core_cm0plus.h **** - 818:Drivers/CMSIS/Include/core_cm0plus.h **** - 819:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 820:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Get Interrupt Priority - 821:Drivers/CMSIS/Include/core_cm0plus.h **** \details Reads the priority of an interrupt. - 822:Drivers/CMSIS/Include/core_cm0plus.h **** The interrupt number can be positive to specify an external (device specific) interrupt, - 823:Drivers/CMSIS/Include/core_cm0plus.h **** or negative to specify an internal (core) interrupt. - 824:Drivers/CMSIS/Include/core_cm0plus.h **** \param [in] IRQn Interrupt number. - 825:Drivers/CMSIS/Include/core_cm0plus.h **** \return Interrupt Priority. - 826:Drivers/CMSIS/Include/core_cm0plus.h **** Value is aligned automatically to the implemented priority bits of the microc - 827:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 828:Drivers/CMSIS/Include/core_cm0plus.h **** __STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) - 829:Drivers/CMSIS/Include/core_cm0plus.h **** { - 830:Drivers/CMSIS/Include/core_cm0plus.h **** - 831:Drivers/CMSIS/Include/core_cm0plus.h **** if ((int32_t)(IRQn) < 0) - 832:Drivers/CMSIS/Include/core_cm0plus.h **** { - 833:Drivers/CMSIS/Include/core_cm0plus.h **** return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - - 834:Drivers/CMSIS/Include/core_cm0plus.h **** } - 835:Drivers/CMSIS/Include/core_cm0plus.h **** else - 836:Drivers/CMSIS/Include/core_cm0plus.h **** { - 837:Drivers/CMSIS/Include/core_cm0plus.h **** return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - - 838:Drivers/CMSIS/Include/core_cm0plus.h **** } - 839:Drivers/CMSIS/Include/core_cm0plus.h **** } - 840:Drivers/CMSIS/Include/core_cm0plus.h **** - 841:Drivers/CMSIS/Include/core_cm0plus.h **** - 842:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 843:Drivers/CMSIS/Include/core_cm0plus.h **** \brief System Reset - 844:Drivers/CMSIS/Include/core_cm0plus.h **** \details Initiates a system reset request to reset the MCU. - 845:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 846:Drivers/CMSIS/Include/core_cm0plus.h **** __STATIC_INLINE void NVIC_SystemReset(void) - 847:Drivers/CMSIS/Include/core_cm0plus.h **** { - 848:Drivers/CMSIS/Include/core_cm0plus.h **** __DSB(); /* Ensure all outstanding memor - 849:Drivers/CMSIS/Include/core_cm0plus.h **** buffered write are completed - 850:Drivers/CMSIS/Include/core_cm0plus.h **** SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 227 .loc 2 850 0 - 228 0004 034B ldr r3, .L15 - 229 0006 044A ldr r2, .L15+4 - 230 0008 DA60 str r2, [r3, #12] - 231 .LBB46: - 232 .LBB47: - 233 .loc 3 429 0 - 234 .syntax divided - 235 @ 429 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 236 000a BFF34F8F dsb 0xF - 237 @ 0 "" 2 - ARM GAS /tmp/ccd4VzkJ.s page 31 - - - 238 .thumb - 239 .syntax unified - 240 .L14: - 241 .LBE47: - 242 .LBE46: - 243 .LBB48: - 244 .LBB49: - 375:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 245 .loc 3 375 0 - 246 .syntax divided - 247 @ 375 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 248 000e C046 nop - 249 @ 0 "" 2 - 250 .thumb - 251 .syntax unified - 252 0010 FDE7 b .L14 - 253 .L16: - 254 0012 C046 .align 2 - 255 .L15: - 256 0014 00ED00E0 .word -536810240 - 257 0018 0400FA05 .word 100270084 - 258 .LBE49: - 259 .LBE48: - 260 .LBE43: - 261 .LBE42: - 262 .cfi_endproc - 263 .LFE42: - 265 .section .text.HAL_SYSTICK_Config,"ax",%progbits - 266 .align 1 - 267 .global HAL_SYSTICK_Config - 268 .syntax unified - 269 .code 16 - 270 .thumb_func - 271 .fpu softvfp - 273 HAL_SYSTICK_Config: - 274 .LFB43: - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* System Reset */ - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** NVIC_SystemReset(); - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * Counter is in free running mode to generate periodic interrupts. - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval status: - 0 Function succeeded. - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * - 1 Function failed. - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 275 .loc 1 208 0 - 276 .cfi_startproc - 277 @ args = 0, pretend = 0, frame = 0 - 278 @ frame_needed = 0, uses_anonymous_args = 0 - 279 @ link register save eliminated. - 280 .LVL16: - 281 .LBB50: - 282 .LBB51: - ARM GAS /tmp/ccd4VzkJ.s page 32 - - - 851:Drivers/CMSIS/Include/core_cm0plus.h **** SCB_AIRCR_SYSRESETREQ_Msk); - 852:Drivers/CMSIS/Include/core_cm0plus.h **** __DSB(); /* Ensure completion of memory - 853:Drivers/CMSIS/Include/core_cm0plus.h **** - 854:Drivers/CMSIS/Include/core_cm0plus.h **** for(;;) /* wait until reset */ - 855:Drivers/CMSIS/Include/core_cm0plus.h **** { - 856:Drivers/CMSIS/Include/core_cm0plus.h **** __NOP(); - 857:Drivers/CMSIS/Include/core_cm0plus.h **** } - 858:Drivers/CMSIS/Include/core_cm0plus.h **** } - 859:Drivers/CMSIS/Include/core_cm0plus.h **** - 860:Drivers/CMSIS/Include/core_cm0plus.h **** /*@} end of CMSIS_Core_NVICFunctions */ - 861:Drivers/CMSIS/Include/core_cm0plus.h **** - 862:Drivers/CMSIS/Include/core_cm0plus.h **** - 863:Drivers/CMSIS/Include/core_cm0plus.h **** - 864:Drivers/CMSIS/Include/core_cm0plus.h **** /* ################################## SysTick function ######################################## - 865:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 866:Drivers/CMSIS/Include/core_cm0plus.h **** \ingroup CMSIS_Core_FunctionInterface - 867:Drivers/CMSIS/Include/core_cm0plus.h **** \defgroup CMSIS_Core_SysTickFunctions SysTick Functions - 868:Drivers/CMSIS/Include/core_cm0plus.h **** \brief Functions that configure the System. - 869:Drivers/CMSIS/Include/core_cm0plus.h **** @{ - 870:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 871:Drivers/CMSIS/Include/core_cm0plus.h **** - 872:Drivers/CMSIS/Include/core_cm0plus.h **** #if (__Vendor_SysTickConfig == 0U) - 873:Drivers/CMSIS/Include/core_cm0plus.h **** - 874:Drivers/CMSIS/Include/core_cm0plus.h **** /** - 875:Drivers/CMSIS/Include/core_cm0plus.h **** \brief System Tick Configuration - 876:Drivers/CMSIS/Include/core_cm0plus.h **** \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. - 877:Drivers/CMSIS/Include/core_cm0plus.h **** Counter is in free running mode to generate periodic interrupts. - 878:Drivers/CMSIS/Include/core_cm0plus.h **** \param [in] ticks Number of ticks between two interrupts. - 879:Drivers/CMSIS/Include/core_cm0plus.h **** \return 0 Function succeeded. - 880:Drivers/CMSIS/Include/core_cm0plus.h **** \return 1 Function failed. - 881:Drivers/CMSIS/Include/core_cm0plus.h **** \note When the variable __Vendor_SysTickConfig is set to 1, then the - 882:Drivers/CMSIS/Include/core_cm0plus.h **** function SysTick_Config is not included. In this case, the file device. - 883:Drivers/CMSIS/Include/core_cm0plus.h **** must contain a vendor-specific implementation of this function. - 884:Drivers/CMSIS/Include/core_cm0plus.h **** */ - 885:Drivers/CMSIS/Include/core_cm0plus.h **** __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) - 886:Drivers/CMSIS/Include/core_cm0plus.h **** { - 887:Drivers/CMSIS/Include/core_cm0plus.h **** if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 283 .loc 2 887 0 - 284 0000 0138 subs r0, r0, #1 - 285 .LVL17: - 286 0002 0A4B ldr r3, .L20 - 287 0004 9842 cmp r0, r3 - 288 0006 0FD8 bhi .L19 - 888:Drivers/CMSIS/Include/core_cm0plus.h **** { - 889:Drivers/CMSIS/Include/core_cm0plus.h **** return (1UL); /* Reload value impossible */ - 890:Drivers/CMSIS/Include/core_cm0plus.h **** } - 891:Drivers/CMSIS/Include/core_cm0plus.h **** - 892:Drivers/CMSIS/Include/core_cm0plus.h **** SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 289 .loc 2 892 0 - 290 0008 094A ldr r2, .L20+4 - 291 000a 5060 str r0, [r2, #4] - 292 .LVL18: - 293 .LBB52: - 294 .LBB53: - 808:Drivers/CMSIS/Include/core_cm0plus.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 295 .loc 2 808 0 - 296 000c 0948 ldr r0, .L20+8 - ARM GAS /tmp/ccd4VzkJ.s page 33 - - - 297 .LVL19: - 298 000e 036A ldr r3, [r0, #32] - 299 0010 1B02 lsls r3, r3, #8 - 300 0012 1B0A lsrs r3, r3, #8 - 301 0014 C021 movs r1, #192 - 302 0016 0906 lsls r1, r1, #24 - 303 0018 0B43 orrs r3, r1 - 304 001a 0362 str r3, [r0, #32] - 305 .LVL20: - 306 .LBE53: - 307 .LBE52: - 893:Drivers/CMSIS/Include/core_cm0plus.h **** NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Int - 894:Drivers/CMSIS/Include/core_cm0plus.h **** SysTick->VAL = 0UL; /* Load the SysTick Counter Val - 308 .loc 2 894 0 - 309 001c 0023 movs r3, #0 - 310 001e 9360 str r3, [r2, #8] - 895:Drivers/CMSIS/Include/core_cm0plus.h **** SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 311 .loc 2 895 0 - 312 0020 0733 adds r3, r3, #7 - 313 0022 1360 str r3, [r2] - 896:Drivers/CMSIS/Include/core_cm0plus.h **** SysTick_CTRL_TICKINT_Msk | - 897:Drivers/CMSIS/Include/core_cm0plus.h **** SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTi - 898:Drivers/CMSIS/Include/core_cm0plus.h **** return (0UL); /* Function successful */ - 314 .loc 2 898 0 - 315 0024 0020 movs r0, #0 - 316 .LVL21: - 317 .L17: - 318 .LBE51: - 319 .LBE50: - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** return SysTick_Config(TicksNumb); - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 320 .loc 1 210 0 - 321 @ sp needed - 322 0026 7047 bx lr - 323 .LVL22: - 324 .L19: - 325 .LBB55: - 326 .LBB54: - 889:Drivers/CMSIS/Include/core_cm0plus.h **** } - 327 .loc 2 889 0 - 328 0028 0120 movs r0, #1 - 329 .LVL23: - 330 .LBE54: - 331 .LBE55: - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** return SysTick_Config(TicksNumb); - 332 .loc 1 209 0 - 333 002a FCE7 b .L17 - 334 .L21: - 335 .align 2 - 336 .L20: - 337 002c FFFFFF00 .word 16777215 - 338 0030 10E000E0 .word -536813552 - 339 0034 00ED00E0 .word -536810240 - 340 .cfi_endproc - 341 .LFE43: - 343 .section .text.HAL_NVIC_GetPriority,"ax",%progbits - 344 .align 1 - ARM GAS /tmp/ccd4VzkJ.s page 34 - - - 345 .global HAL_NVIC_GetPriority - 346 .syntax unified - 347 .code 16 - 348 .thumb_func - 349 .fpu softvfp - 351 HAL_NVIC_GetPriority: - 352 .LFB44: - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @} - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** @addtogroup CORTEX_Exported_Functions_Group2 Peripheral Control functions - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Cortex control functions - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** @verbatim - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ============================================================================== - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ##### Peripheral Control functions ##### - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ============================================================================== - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** [..] - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** This subsection provides a set of functions allowing to control the CORTEX - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** (NVIC, SYSTICK) functionalities. - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** @endverbatim - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @{ - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Gets the priority of an interrupt. - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param IRQn: External interrupt number. - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn) - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 353 .loc 1 240 0 - 354 .cfi_startproc - 355 @ args = 0, pretend = 0, frame = 0 - 356 @ frame_needed = 0, uses_anonymous_args = 0 - 357 @ link register save eliminated. - 358 .LVL24: - 359 .LBB58: - 360 .LBB59: - 831:Drivers/CMSIS/Include/core_cm0plus.h **** { - 361 .loc 2 831 0 - 362 0000 0028 cmp r0, #0 - 363 0002 0CDB blt .L25 - 837:Drivers/CMSIS/Include/core_cm0plus.h **** } - 364 .loc 2 837 0 - 365 0004 8308 lsrs r3, r0, #2 - 366 0006 C033 adds r3, r3, #192 - 367 0008 9B00 lsls r3, r3, #2 - 368 000a 0E4A ldr r2, .L26 - 369 000c 9B58 ldr r3, [r3, r2] - 370 000e 0322 movs r2, #3 - ARM GAS /tmp/ccd4VzkJ.s page 35 - - - 371 0010 1040 ands r0, r2 - 372 .LVL25: - 373 0012 C000 lsls r0, r0, #3 - 374 0014 C340 lsrs r3, r3, r0 - 375 0016 9809 lsrs r0, r3, #6 - 376 0018 0323 movs r3, #3 - 377 001a 1840 ands r0, r3 - 378 .LVL26: - 379 .L22: - 380 .LBE59: - 381 .LBE58: - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Get priority for Cortex-M system or device specific interrupts */ - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** return NVIC_GetPriority(IRQn); - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 382 .loc 1 243 0 - 383 @ sp needed - 384 001c 7047 bx lr - 385 .LVL27: - 386 .L25: - 387 .LBB61: - 388 .LBB60: - 833:Drivers/CMSIS/Include/core_cm0plus.h **** } - 389 .loc 2 833 0 - 390 001e C0B2 uxtb r0, r0 - 391 0020 0F23 movs r3, #15 - 392 0022 0340 ands r3, r0 - 393 0024 083B subs r3, r3, #8 - 394 0026 9B08 lsrs r3, r3, #2 - 395 0028 0633 adds r3, r3, #6 - 396 002a 9B00 lsls r3, r3, #2 - 397 002c 064A ldr r2, .L26+4 - 398 002e 9446 mov ip, r2 - 399 0030 6344 add r3, r3, ip - 400 0032 5B68 ldr r3, [r3, #4] - 401 0034 0322 movs r2, #3 - 402 0036 1040 ands r0, r2 - 403 .LVL28: - 404 0038 C000 lsls r0, r0, #3 - 405 003a C340 lsrs r3, r3, r0 - 406 003c 9B09 lsrs r3, r3, #6 - 407 003e 0320 movs r0, #3 - 408 0040 1840 ands r0, r3 - 409 0042 EBE7 b .L22 - 410 .L27: - 411 .align 2 - 412 .L26: - 413 0044 00E100E0 .word -536813312 - 414 0048 00ED00E0 .word -536810240 - 415 .LBE60: - 416 .LBE61: - 417 .cfi_endproc - 418 .LFE44: - 420 .section .text.HAL_NVIC_SetPendingIRQ,"ax",%progbits - 421 .align 1 - 422 .global HAL_NVIC_SetPendingIRQ - 423 .syntax unified - 424 .code 16 - ARM GAS /tmp/ccd4VzkJ.s page 36 - - - 425 .thumb_func - 426 .fpu softvfp - 428 HAL_NVIC_SetPendingIRQ: - 429 .LFB45: - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Sets Pending bit of an external interrupt. - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param IRQn: External interrupt number - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 430 .loc 1 253 0 - 431 .cfi_startproc - 432 @ args = 0, pretend = 0, frame = 0 - 433 @ frame_needed = 0, uses_anonymous_args = 0 - 434 @ link register save eliminated. - 435 .LVL29: - 436 .LBB62: - 437 .LBB63: - 782:Drivers/CMSIS/Include/core_cm0plus.h **** } - 438 .loc 2 782 0 - 439 0000 1F23 movs r3, #31 - 440 0002 1840 ands r0, r3 - 441 .LVL30: - 442 0004 1E3B subs r3, r3, #30 - 443 0006 8340 lsls r3, r3, r0 - 444 0008 0249 ldr r1, .L29 - 445 000a 8022 movs r2, #128 - 446 000c 5200 lsls r2, r2, #1 - 447 000e 8B50 str r3, [r1, r2] - 448 .LVL31: - 449 .LBE63: - 450 .LBE62: - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Set interrupt pending */ - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** NVIC_SetPendingIRQ(IRQn); - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 451 .loc 1 256 0 - 452 @ sp needed - 453 0010 7047 bx lr - 454 .L30: - 455 0012 C046 .align 2 - 456 .L29: - 457 0014 00E100E0 .word -536813312 - 458 .cfi_endproc - 459 .LFE45: - 461 .section .text.HAL_NVIC_GetPendingIRQ,"ax",%progbits - 462 .align 1 - 463 .global HAL_NVIC_GetPendingIRQ - 464 .syntax unified - 465 .code 16 - 466 .thumb_func - 467 .fpu softvfp - 469 HAL_NVIC_GetPendingIRQ: - 470 .LFB46: - ARM GAS /tmp/ccd4VzkJ.s page 37 - - - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Gets Pending Interrupt (reads the pending register in the NVIC - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * and returns the pending bit for the specified interrupt). - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param IRQn: External interrupt number . - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval status: - 0 Interrupt status is not pending. - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * - 1 Interrupt status is pending. - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 471 .loc 1 268 0 - 472 .cfi_startproc - 473 @ args = 0, pretend = 0, frame = 0 - 474 @ frame_needed = 0, uses_anonymous_args = 0 - 475 @ link register save eliminated. - 476 .LVL32: - 477 .LBB64: - 478 .LBB65: - 771:Drivers/CMSIS/Include/core_cm0plus.h **** } - 479 .loc 2 771 0 - 480 0000 044A ldr r2, .L32 - 481 0002 8023 movs r3, #128 - 482 0004 5B00 lsls r3, r3, #1 - 483 0006 D358 ldr r3, [r2, r3] - 484 0008 1F22 movs r2, #31 - 485 000a 1040 ands r0, r2 - 486 .LVL33: - 487 000c C340 lsrs r3, r3, r0 - 488 000e 0120 movs r0, #1 - 489 0010 1840 ands r0, r3 - 490 .LVL34: - 491 .LBE65: - 492 .LBE64: - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Return 1 if pending else 0 */ - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** return NVIC_GetPendingIRQ(IRQn); - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 493 .loc 1 271 0 - 494 @ sp needed - 495 0012 7047 bx lr - 496 .L33: - 497 .align 2 - 498 .L32: - 499 0014 00E100E0 .word -536813312 - 500 .cfi_endproc - 501 .LFE46: - 503 .section .text.HAL_NVIC_ClearPendingIRQ,"ax",%progbits - 504 .align 1 - 505 .global HAL_NVIC_ClearPendingIRQ - 506 .syntax unified - 507 .code 16 - 508 .thumb_func - 509 .fpu softvfp - 511 HAL_NVIC_ClearPendingIRQ: - 512 .LFB47: - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - ARM GAS /tmp/ccd4VzkJ.s page 38 - - - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Clears the pending bit of an external interrupt. - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param IRQn: External interrupt number . - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 513 .loc 1 281 0 - 514 .cfi_startproc - 515 @ args = 0, pretend = 0, frame = 0 - 516 @ frame_needed = 0, uses_anonymous_args = 0 - 517 @ link register save eliminated. - 518 .LVL35: - 519 .LBB66: - 520 .LBB67: - 793:Drivers/CMSIS/Include/core_cm0plus.h **** } - 521 .loc 2 793 0 - 522 0000 1F23 movs r3, #31 - 523 0002 1840 ands r0, r3 - 524 .LVL36: - 525 0004 1E3B subs r3, r3, #30 - 526 0006 8340 lsls r3, r3, r0 - 527 0008 0249 ldr r1, .L35 - 528 000a C022 movs r2, #192 - 529 000c 5200 lsls r2, r2, #1 - 530 000e 8B50 str r3, [r1, r2] - 531 .LVL37: - 532 .LBE67: - 533 .LBE66: - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Clear pending interrupt */ - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** NVIC_ClearPendingIRQ(IRQn); - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 534 .loc 1 284 0 - 535 @ sp needed - 536 0010 7047 bx lr - 537 .L36: - 538 0012 C046 .align 2 - 539 .L35: - 540 0014 00E100E0 .word -536813312 - 541 .cfi_endproc - 542 .LFE47: - 544 .section .text.HAL_SYSTICK_CLKSourceConfig,"ax",%progbits - 545 .align 1 - 546 .global HAL_SYSTICK_CLKSourceConfig - 547 .syntax unified - 548 .code 16 - 549 .thumb_func - 550 .fpu softvfp - 552 HAL_SYSTICK_CLKSourceConfig: - 553 .LFB48: - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Configures the SysTick clock source. - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param CLKSource: specifies the SysTick clock source. - ARM GAS /tmp/ccd4VzkJ.s page 39 - - - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * This parameter can be one of the following values: - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 554 .loc 1 296 0 - 555 .cfi_startproc - 556 @ args = 0, pretend = 0, frame = 0 - 557 @ frame_needed = 0, uses_anonymous_args = 0 - 558 @ link register save eliminated. - 559 .LVL38: - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Check the parameters */ - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** if (CLKSource == SYSTICK_CLKSOURCE_HCLK) - 560 .loc 1 299 0 - 561 0000 0428 cmp r0, #4 - 562 0002 05D0 beq .L40 - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** else - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; - 563 .loc 1 305 0 - 564 0004 054A ldr r2, .L41 - 565 0006 1368 ldr r3, [r2] - 566 0008 0421 movs r1, #4 - 567 000a 8B43 bics r3, r1 - 568 000c 1360 str r3, [r2] - 569 .L37: - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 570 .loc 1 307 0 - 571 @ sp needed - 572 000e 7047 bx lr - 573 .L40: - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 574 .loc 1 301 0 - 575 0010 024A ldr r2, .L41 - 576 0012 1368 ldr r3, [r2] - 577 0014 0421 movs r1, #4 - 578 0016 0B43 orrs r3, r1 - 579 0018 1360 str r3, [r2] - 580 001a F8E7 b .L37 - 581 .L42: - 582 .align 2 - 583 .L41: - 584 001c 10E000E0 .word -536813552 - 585 .cfi_endproc - 586 .LFE48: - 588 .section .text.HAL_SYSTICK_Callback,"ax",%progbits - 589 .align 1 - 590 .weak HAL_SYSTICK_Callback - 591 .syntax unified - 592 .code 16 - ARM GAS /tmp/ccd4VzkJ.s page 40 - - - 593 .thumb_func - 594 .fpu softvfp - 596 HAL_SYSTICK_Callback: - 597 .LFB50: - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief This function handles SYSTICK interrupt request. - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** void HAL_SYSTICK_IRQHandler(void) - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** HAL_SYSTICK_Callback(); - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief SYSTICK callback. - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** __weak void HAL_SYSTICK_Callback(void) - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 598 .loc 1 323 0 - 599 .cfi_startproc - 600 @ args = 0, pretend = 0, frame = 0 - 601 @ frame_needed = 0, uses_anonymous_args = 0 - 602 @ link register save eliminated. - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* NOTE : This function Should not be modified, when the callback is needed, - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** the HAL_SYSTICK_Callback could be implemented in the user file - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 603 .loc 1 327 0 - 604 @ sp needed - 605 0000 7047 bx lr - 606 .cfi_endproc - 607 .LFE50: - 609 .section .text.HAL_SYSTICK_IRQHandler,"ax",%progbits - 610 .align 1 - 611 .global HAL_SYSTICK_IRQHandler - 612 .syntax unified - 613 .code 16 - 614 .thumb_func - 615 .fpu softvfp - 617 HAL_SYSTICK_IRQHandler: - 618 .LFB49: - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** HAL_SYSTICK_Callback(); - 619 .loc 1 314 0 - 620 .cfi_startproc - 621 @ args = 0, pretend = 0, frame = 0 - 622 @ frame_needed = 0, uses_anonymous_args = 0 - 623 0000 10B5 push {r4, lr} - 624 .LCFI1: - 625 .cfi_def_cfa_offset 8 - 626 .cfi_offset 4, -8 - 627 .cfi_offset 14, -4 - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 628 .loc 1 315 0 - 629 0002 FFF7FEFF bl HAL_SYSTICK_Callback - 630 .LVL39: - ARM GAS /tmp/ccd4VzkJ.s page 41 - - - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 631 .loc 1 316 0 - 632 @ sp needed - 633 0006 10BD pop {r4, pc} - 634 .cfi_endproc - 635 .LFE49: - 637 .section .text.HAL_MPU_ConfigRegion,"ax",%progbits - 638 .align 1 - 639 .global HAL_MPU_ConfigRegion - 640 .syntax unified - 641 .code 16 - 642 .thumb_func - 643 .fpu softvfp - 645 HAL_MPU_ConfigRegion: - 646 .LFB51: - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** #if (__MPU_PRESENT == 1) - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /** - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @brief Initialize and configure the Region and the memory to be protected. - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * the initialization and configuration information. - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** * @retval None - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** */ - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 647 .loc 1 337 0 - 648 .cfi_startproc - 649 @ args = 0, pretend = 0, frame = 0 - 650 @ frame_needed = 0, uses_anonymous_args = 0 - 651 @ link register save eliminated. - 652 .LVL40: - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Check the parameters */ - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number)); - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable)); - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Set the Region number */ - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** MPU->RNR = MPU_Init->Number; - 653 .loc 1 343 0 - 654 0000 4279 ldrb r2, [r0, #5] - 655 0002 134B ldr r3, .L49 - 656 0004 9A60 str r2, [r3, #8] - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** if ((MPU_Init->Enable) == MPU_REGION_ENABLE) - 657 .loc 1 345 0 - 658 0006 0379 ldrb r3, [r0, #4] - 659 0008 012B cmp r3, #1 - 660 000a 04D0 beq .L48 - 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Check the parameters */ - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec)); - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission)); - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable)); - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable)); - 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable)); - 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable)); - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size)); - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - ARM GAS /tmp/ccd4VzkJ.s page 42 - - - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Set the base adsress and set the 4 LSB to 0 */ - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** MPU->RBAR = (MPU_Init->BaseAddress) & 0xfffffff0U; - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** /* Fill the field RASR */ - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); - 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** else - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** { - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** MPU->RBAR = 0x00U; - 661 .loc 1 371 0 - 662 000c 104B ldr r3, .L49 - 663 000e 0022 movs r2, #0 - 664 0010 DA60 str r2, [r3, #12] - 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** MPU->RASR = 0x00U; - 665 .loc 1 372 0 - 666 0012 1A61 str r2, [r3, #16] - 667 .L45: - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 668 .loc 1 374 0 - 669 @ sp needed - 670 0014 7047 bx lr - 671 .L48: - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** - 672 .loc 1 357 0 - 673 0016 0E33 adds r3, r3, #14 - 674 0018 0268 ldr r2, [r0] - 675 001a 9A43 bics r2, r3 - 676 001c 0C49 ldr r1, .L49 - 677 001e CA60 str r2, [r1, #12] - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - 678 .loc 1 360 0 - 679 0020 837A ldrb r3, [r0, #10] - 680 0022 1B07 lsls r3, r3, #28 - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - 681 .loc 1 361 0 - 682 0024 427A ldrb r2, [r0, #9] - 683 0026 1206 lsls r2, r2, #24 - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - 684 .loc 1 360 0 - 685 0028 1343 orrs r3, r2 - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - 686 .loc 1 362 0 - 687 002a C27A ldrb r2, [r0, #11] - 688 002c 9204 lsls r2, r2, #18 - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | - 689 .loc 1 361 0 - 690 002e 1343 orrs r3, r2 - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - 691 .loc 1 363 0 - ARM GAS /tmp/ccd4VzkJ.s page 43 - - - 692 0030 027B ldrb r2, [r0, #12] - 693 0032 5204 lsls r2, r2, #17 - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) | - 694 .loc 1 362 0 - 695 0034 1343 orrs r3, r2 - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - 696 .loc 1 364 0 - 697 0036 427B ldrb r2, [r0, #13] - 698 0038 1204 lsls r2, r2, #16 - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) | - 699 .loc 1 363 0 - 700 003a 1343 orrs r3, r2 - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - 701 .loc 1 365 0 - 702 003c C279 ldrb r2, [r0, #7] - 703 003e 1202 lsls r2, r2, #8 - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) | - 704 .loc 1 364 0 - 705 0040 1343 orrs r3, r2 - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); - 706 .loc 1 366 0 - 707 0042 8279 ldrb r2, [r0, #6] - 708 0044 5200 lsls r2, r2, #1 - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) | - 709 .loc 1 365 0 - 710 0046 1343 orrs r3, r2 - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** } - 711 .loc 1 367 0 - 712 0048 0279 ldrb r2, [r0, #4] - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos); - 713 .loc 1 366 0 - 714 004a 1343 orrs r3, r2 - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.c **** ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) | - 715 .loc 1 360 0 - 716 004c 0B61 str r3, [r1, #16] - 717 004e E1E7 b .L45 - 718 .L50: - 719 .align 2 - 720 .L49: - 721 0050 90ED00E0 .word -536810096 - 722 .cfi_endproc - 723 .LFE51: - 725 .text - 726 .Letext0: - 727 .file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 728 .file 5 "/usr/arm-none-eabi/include/machine/_default_types.h" - 729 .file 6 "/usr/arm-none-eabi/include/sys/_stdint.h" - 730 .file 7 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 731 .file 8 "/usr/arm-none-eabi/include/sys/lock.h" - 732 .file 9 "/usr/arm-none-eabi/include/sys/_types.h" - 733 .file 10 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 734 .file 11 "/usr/arm-none-eabi/include/sys/reent.h" - 735 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h" - ARM GAS /tmp/ccd4VzkJ.s page 44 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_cortex.c - /tmp/ccd4VzkJ.s:16 .text.HAL_NVIC_SetPriority:0000000000000000 $t - /tmp/ccd4VzkJ.s:23 .text.HAL_NVIC_SetPriority:0000000000000000 HAL_NVIC_SetPriority - /tmp/ccd4VzkJ.s:111 .text.HAL_NVIC_SetPriority:0000000000000058 $d - /tmp/ccd4VzkJ.s:119 .text.HAL_NVIC_EnableIRQ:0000000000000000 $t - /tmp/ccd4VzkJ.s:126 .text.HAL_NVIC_EnableIRQ:0000000000000000 HAL_NVIC_EnableIRQ - /tmp/ccd4VzkJ.s:153 .text.HAL_NVIC_EnableIRQ:0000000000000010 $d - /tmp/ccd4VzkJ.s:158 .text.HAL_NVIC_DisableIRQ:0000000000000000 $t - /tmp/ccd4VzkJ.s:165 .text.HAL_NVIC_DisableIRQ:0000000000000000 HAL_NVIC_DisableIRQ - /tmp/ccd4VzkJ.s:193 .text.HAL_NVIC_DisableIRQ:0000000000000010 $d - /tmp/ccd4VzkJ.s:198 .text.HAL_NVIC_SystemReset:0000000000000000 $t - /tmp/ccd4VzkJ.s:205 .text.HAL_NVIC_SystemReset:0000000000000000 HAL_NVIC_SystemReset - /tmp/ccd4VzkJ.s:256 .text.HAL_NVIC_SystemReset:0000000000000014 $d - /tmp/ccd4VzkJ.s:266 .text.HAL_SYSTICK_Config:0000000000000000 $t - /tmp/ccd4VzkJ.s:273 .text.HAL_SYSTICK_Config:0000000000000000 HAL_SYSTICK_Config - /tmp/ccd4VzkJ.s:337 .text.HAL_SYSTICK_Config:000000000000002c $d - /tmp/ccd4VzkJ.s:344 .text.HAL_NVIC_GetPriority:0000000000000000 $t - /tmp/ccd4VzkJ.s:351 .text.HAL_NVIC_GetPriority:0000000000000000 HAL_NVIC_GetPriority - /tmp/ccd4VzkJ.s:413 .text.HAL_NVIC_GetPriority:0000000000000044 $d - /tmp/ccd4VzkJ.s:421 .text.HAL_NVIC_SetPendingIRQ:0000000000000000 $t - /tmp/ccd4VzkJ.s:428 .text.HAL_NVIC_SetPendingIRQ:0000000000000000 HAL_NVIC_SetPendingIRQ - /tmp/ccd4VzkJ.s:457 .text.HAL_NVIC_SetPendingIRQ:0000000000000014 $d - /tmp/ccd4VzkJ.s:462 .text.HAL_NVIC_GetPendingIRQ:0000000000000000 $t - /tmp/ccd4VzkJ.s:469 .text.HAL_NVIC_GetPendingIRQ:0000000000000000 HAL_NVIC_GetPendingIRQ - /tmp/ccd4VzkJ.s:499 .text.HAL_NVIC_GetPendingIRQ:0000000000000014 $d - /tmp/ccd4VzkJ.s:504 .text.HAL_NVIC_ClearPendingIRQ:0000000000000000 $t - /tmp/ccd4VzkJ.s:511 .text.HAL_NVIC_ClearPendingIRQ:0000000000000000 HAL_NVIC_ClearPendingIRQ - /tmp/ccd4VzkJ.s:540 .text.HAL_NVIC_ClearPendingIRQ:0000000000000014 $d - /tmp/ccd4VzkJ.s:545 .text.HAL_SYSTICK_CLKSourceConfig:0000000000000000 $t - /tmp/ccd4VzkJ.s:552 .text.HAL_SYSTICK_CLKSourceConfig:0000000000000000 HAL_SYSTICK_CLKSourceConfig - /tmp/ccd4VzkJ.s:584 .text.HAL_SYSTICK_CLKSourceConfig:000000000000001c $d - /tmp/ccd4VzkJ.s:589 .text.HAL_SYSTICK_Callback:0000000000000000 $t - /tmp/ccd4VzkJ.s:596 .text.HAL_SYSTICK_Callback:0000000000000000 HAL_SYSTICK_Callback - /tmp/ccd4VzkJ.s:610 .text.HAL_SYSTICK_IRQHandler:0000000000000000 $t - /tmp/ccd4VzkJ.s:617 .text.HAL_SYSTICK_IRQHandler:0000000000000000 HAL_SYSTICK_IRQHandler - /tmp/ccd4VzkJ.s:638 .text.HAL_MPU_ConfigRegion:0000000000000000 $t - /tmp/ccd4VzkJ.s:645 .text.HAL_MPU_ConfigRegion:0000000000000000 HAL_MPU_ConfigRegion - /tmp/ccd4VzkJ.s:721 .text.HAL_MPU_ConfigRegion:0000000000000050 $d - .debug_frame:0000000000000010 $d - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_crc.d b/build/stm32l0xx_hal_crc.d deleted file mode 100644 index 02eaf8d..0000000 --- a/build/stm32l0xx_hal_crc.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_crc.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_crc.lst b/build/stm32l0xx_hal_crc.lst deleted file mode 100644 index 68170e3..0000000 --- a/build/stm32l0xx_hal_crc.lst +++ /dev/null @@ -1,32 +0,0 @@ -ARM GAS /tmp/ccv3vQQT.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_crc.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .Letext0: - 16 .file 1 "/usr/arm-none-eabi/include/machine/_default_types.h" - 17 .file 2 "/usr/arm-none-eabi/include/sys/_stdint.h" - 18 .file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 19 .file 4 "/usr/arm-none-eabi/include/sys/lock.h" - 20 .file 5 "/usr/arm-none-eabi/include/sys/_types.h" - 21 .file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 22 .file 7 "/usr/arm-none-eabi/include/sys/reent.h" - ARM GAS /tmp/ccv3vQQT.s page 2 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_crc.c - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_crc_ex.d b/build/stm32l0xx_hal_crc_ex.d deleted file mode 100644 index 01d7bfb..0000000 --- a/build/stm32l0xx_hal_crc_ex.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_crc_ex.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_crc_ex.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_crc_ex.lst b/build/stm32l0xx_hal_crc_ex.lst deleted file mode 100644 index 4a9686a..0000000 --- a/build/stm32l0xx_hal_crc_ex.lst +++ /dev/null @@ -1,32 +0,0 @@ -ARM GAS /tmp/ccbyCQhg.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_crc_ex.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .Letext0: - 16 .file 1 "/usr/arm-none-eabi/include/machine/_default_types.h" - 17 .file 2 "/usr/arm-none-eabi/include/sys/_stdint.h" - 18 .file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 19 .file 4 "/usr/arm-none-eabi/include/sys/lock.h" - 20 .file 5 "/usr/arm-none-eabi/include/sys/_types.h" - 21 .file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 22 .file 7 "/usr/arm-none-eabi/include/sys/reent.h" - ARM GAS /tmp/ccbyCQhg.s page 2 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_crc_ex.c - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_cryp.d b/build/stm32l0xx_hal_cryp.d deleted file mode 100644 index aa4e516..0000000 --- a/build/stm32l0xx_hal_cryp.d +++ /dev/null @@ -1,2 +0,0 @@ -build/stm32l0xx_hal_cryp.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp.c diff --git a/build/stm32l0xx_hal_cryp.lst b/build/stm32l0xx_hal_cryp.lst deleted file mode 100644 index e663b21..0000000 --- a/build/stm32l0xx_hal_cryp.lst +++ /dev/null @@ -1,25 +0,0 @@ -ARM GAS /tmp/ccrP1Afq.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_cryp.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .Letext0: - ARM GAS /tmp/ccrP1Afq.s page 2 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_cryp.c - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_cryp_ex.d b/build/stm32l0xx_hal_cryp_ex.d deleted file mode 100644 index ec2f911..0000000 --- a/build/stm32l0xx_hal_cryp_ex.d +++ /dev/null @@ -1,2 +0,0 @@ -build/stm32l0xx_hal_cryp_ex.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cryp_ex.c diff --git a/build/stm32l0xx_hal_cryp_ex.lst b/build/stm32l0xx_hal_cryp_ex.lst deleted file mode 100644 index 7af9196..0000000 --- a/build/stm32l0xx_hal_cryp_ex.lst +++ /dev/null @@ -1,25 +0,0 @@ -ARM GAS /tmp/ccnSeeEM.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_cryp_ex.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .Letext0: - ARM GAS /tmp/ccnSeeEM.s page 2 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_cryp_ex.c - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_dac.d b/build/stm32l0xx_hal_dac.d deleted file mode 100644 index 3490d7b..0000000 --- a/build/stm32l0xx_hal_dac.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_dac.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_dac.lst b/build/stm32l0xx_hal_dac.lst deleted file mode 100644 index 533f19d..0000000 --- a/build/stm32l0xx_hal_dac.lst +++ /dev/null @@ -1,32 +0,0 @@ -ARM GAS /tmp/ccDfPbDO.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_dac.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .Letext0: - 16 .file 1 "/usr/arm-none-eabi/include/machine/_default_types.h" - 17 .file 2 "/usr/arm-none-eabi/include/sys/_stdint.h" - 18 .file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 19 .file 4 "/usr/arm-none-eabi/include/sys/lock.h" - 20 .file 5 "/usr/arm-none-eabi/include/sys/_types.h" - 21 .file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 22 .file 7 "/usr/arm-none-eabi/include/sys/reent.h" - ARM GAS /tmp/ccDfPbDO.s page 2 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_dac.c - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_dac_ex.d b/build/stm32l0xx_hal_dac_ex.d deleted file mode 100644 index 11ff5c3..0000000 --- a/build/stm32l0xx_hal_dac_ex.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_dac_ex.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dac_ex.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_dac_ex.lst b/build/stm32l0xx_hal_dac_ex.lst deleted file mode 100644 index 86cf297..0000000 --- a/build/stm32l0xx_hal_dac_ex.lst +++ /dev/null @@ -1,32 +0,0 @@ -ARM GAS /tmp/cccMEG5F.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_dac_ex.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .Letext0: - 16 .file 1 "/usr/arm-none-eabi/include/machine/_default_types.h" - 17 .file 2 "/usr/arm-none-eabi/include/sys/_stdint.h" - 18 .file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 19 .file 4 "/usr/arm-none-eabi/include/sys/lock.h" - 20 .file 5 "/usr/arm-none-eabi/include/sys/_types.h" - 21 .file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 22 .file 7 "/usr/arm-none-eabi/include/sys/reent.h" - ARM GAS /tmp/cccMEG5F.s page 2 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_dac_ex.c - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_dma.d b/build/stm32l0xx_hal_dma.d deleted file mode 100644 index e692fe3..0000000 --- a/build/stm32l0xx_hal_dma.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_dma.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_dma.lst b/build/stm32l0xx_hal_dma.lst deleted file mode 100644 index 521add4..0000000 --- a/build/stm32l0xx_hal_dma.lst +++ /dev/null @@ -1,3299 +0,0 @@ -ARM GAS /tmp/ccJCJaQH.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_dma.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.HAL_DMA_Init,"ax",%progbits - 16 .align 1 - 17 .global HAL_DMA_Init - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 HAL_DMA_Init: - 24 .LFB39: - 25 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @file stm32l0xx_hal_dma.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief DMA HAL module driver. - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * This file provides firmware functions to manage the following - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * functionalities of the Direct Memory Access (DMA) peripheral: - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * + Initialization/de-initialization functions - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * + I/O operation functions - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * + Peripheral State functions - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** @verbatim - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ============================================================================== - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ##### How to use this driver ##### - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ============================================================================== - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** [..] - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (#) Enable and configure the peripheral to be connected to the DMA Channel - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (except for internal SRAM / FLASH memories: no initialization is - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** necessary). - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (#) For a given Channel, program the required configuration through the following parameters: - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** Channel request, Transfer Direction, Source and Destination data formats, - 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** Circular, Normal or peripheral flow control mode, Channel Priority level, - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** Source and Destination Increment mode using HAL_DMA_Init() function. - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** *** Polling mode IO operation *** - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ================================= - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** [..] - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** address and destination address and the Length of data to be transferred - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this - ARM GAS /tmp/ccJCJaQH.s page 2 - - - 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** case a fixed Timeout can be configured by User depending from his application. - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** *** Interrupt mode IO operation *** - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** =================================== - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** [..] - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() - 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** Source address and destination address and the Length of data to be transferred. In t - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** case the DMA interrupt is configured - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** add his own function by customization of function pointer XferCpltCallback and - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** XferErrorCallback (i.e a member of DMA handle structure). - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of er - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** detection. - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (#) Use HAL_DMA_Abort() function to abort the current transfer - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** @endverbatim - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ****************************************************************************** - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @attention - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * Redistribution and use in source and binary forms, with or without modification, - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * are permitted provided that the following conditions are met: - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * 1. Redistributions of source code must retain the above copyright notice, - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * this list of conditions and the following disclaimer. - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * this list of conditions and the following disclaimer in the documentation - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * and/or other materials provided with the distribution. - 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * may be used to endorse or promote products derived from this software - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * without specific prior written permission. - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ****************************************************************************** - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Includes ------------------------------------------------------------------*/ - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** #include "stm32l0xx_hal.h" - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** @addtogroup STM32L0xx_HAL_Driver - ARM GAS /tmp/ccJCJaQH.s page 3 - - - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @{ - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** #ifdef HAL_DMA_MODULE_ENABLED - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** @addtogroup DMA DMA - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief DMA HAL module driver - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @{ - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Private typedef -----------------------------------------------------------*/ - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** @addtogroup DMA_Private - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @{ - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000U) /* 1s */ - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @} - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** @addtogroup DMA_Exported_Functions DMA Exported Functions - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @{ - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** @addtogroup DMA_Exported_Functions_Group1 - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Initialization/de-initialization functions - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** @verbatim - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** =============================================================================== - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ##### Initialization and de-initialization functions ##### - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** =============================================================================== - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** [..] This section provides functions allowing to: - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Initialize and configure the DMA - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) De-Initialize the DMA - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** @endverbatim - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @{ - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Initializes the DMA according to the specified - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * parameters in the DMA_InitTypeDef and create the associated handle. - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval HAL status - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 26 .loc 1 140 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 .LVL0: - 31 0000 10B5 push {r4, lr} - 32 .LCFI0: - ARM GAS /tmp/ccJCJaQH.s page 4 - - - 33 .cfi_def_cfa_offset 8 - 34 .cfi_offset 4, -8 - 35 .cfi_offset 14, -4 - 36 .LVL1: - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** uint32_t tmp = 0U; - 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Check the DMA peripheral state */ - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(hdma == NULL) - 37 .loc 1 144 0 - 38 0002 0028 cmp r0, #0 - 39 0004 00D1 bne .LCB12 - 40 0006 82E0 b .L11 @long jump - 41 .LCB12: - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_ERROR; - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Check the parameters */ - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request)); - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(hdma->State == HAL_DMA_STATE_RESET) - 42 .loc 1 160 0 - 43 0008 2523 movs r3, #37 - 44 000a C35C ldrb r3, [r0, r3] - 45 000c 002B cmp r3, #0 - 46 000e 02D1 bne .L3 - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Allocate lock resource and initialize it */ - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Lock = HAL_UNLOCKED; - 47 .loc 1 163 0 - 48 0010 2433 adds r3, r3, #36 - 49 0012 0022 movs r2, #0 - 50 0014 C254 strb r2, [r0, r3] - 51 .L3: - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change DMA peripheral state */ - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; - 52 .loc 1 167 0 - 53 0016 2523 movs r3, #37 - 54 0018 0222 movs r2, #2 - 55 001a C254 strb r2, [r0, r3] - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Get the CR register value */ - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** tmp = hdma->Instance->CCR; - 56 .loc 1 170 0 - 57 001c 0168 ldr r1, [r0] - 58 001e 0B68 ldr r3, [r1] - 59 .LVL2: - ARM GAS /tmp/ccJCJaQH.s page 5 - - - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ - 60 .loc 1 173 0 - 61 0020 3C4A ldr r2, .L18 - 62 0022 1A40 ands r2, r3 - 63 .LVL3: - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA_CCR_DIR)); - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Prepare the DMA Channel configuration */ - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** tmp |= hdma->Init.Direction | - 64 .loc 1 178 0 - 65 0024 8368 ldr r3, [r0, #8] - 66 0026 C468 ldr r4, [r0, #12] - 67 0028 2343 orrs r3, r4 - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | - 68 .loc 1 179 0 - 69 002a 0469 ldr r4, [r0, #16] - 70 002c 2343 orrs r3, r4 - 71 002e 4469 ldr r4, [r0, #20] - 72 0030 2343 orrs r3, r4 - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 73 .loc 1 180 0 - 74 0032 8469 ldr r4, [r0, #24] - 75 0034 2343 orrs r3, r4 - 76 0036 C469 ldr r4, [r0, #28] - 77 0038 2343 orrs r3, r4 - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; - 78 .loc 1 181 0 - 79 003a 046A ldr r4, [r0, #32] - 80 003c 2343 orrs r3, r4 - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | - 81 .loc 1 178 0 - 82 003e 1343 orrs r3, r2 - 83 .LVL4: - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Write to DMA Channel CR register */ - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CCR = tmp; - 84 .loc 1 184 0 - 85 0040 0B60 str r3, [r1] - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Write to DMA channel selection register */ - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if (hdma->Instance == DMA1_Channel1) - 86 .loc 1 187 0 - 87 0042 0368 ldr r3, [r0] - 88 .LVL5: - 89 0044 344A ldr r2, .L18+4 - 90 0046 9342 cmp r3, r2 - 91 0048 1CD0 beq .L12 - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset request selection for DMA1 Channel1*/ - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S; - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure request selection for DMA1 Channel1 */ - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR |= hdma->Init.Request; - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - ARM GAS /tmp/ccJCJaQH.s page 6 - - - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel2) - 92 .loc 1 195 0 - 93 004a 344A ldr r2, .L18+8 - 94 004c 9342 cmp r3, r2 - 95 004e 27D0 beq .L13 - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset request selection for DMA1 Channel2*/ - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S; - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure request selection for DMA1 Channel2 */ - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << 4U); - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel3) - 96 .loc 1 203 0 - 97 0050 334A ldr r2, .L18+12 - 98 0052 9342 cmp r3, r2 - 99 0054 2FD0 beq .L14 - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset request selection for DMA1 Channel3*/ - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S; - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure request selection for DMA1 Channel3 */ - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 8U); - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel4) - 100 .loc 1 211 0 - 101 0056 334A ldr r2, .L18+16 - 102 0058 9342 cmp r3, r2 - 103 005a 37D0 beq .L15 - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset request selection for DMA1 Channel4*/ - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S; - 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure request selection for DMA1 Channel4 */ - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 12U); - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel5) - 104 .loc 1 219 0 - 105 005c 324A ldr r2, .L18+20 - 106 005e 9342 cmp r3, r2 - 107 0060 3FD0 beq .L16 - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset request selection for DMA1 Channel5*/ - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S; - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure request selection for DMA1 Channel5 */ - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 16U); - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** #if !defined (STM32L011xx) && !defined (STM32L021xx) - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel6) - 108 .loc 1 228 0 - 109 0062 324A ldr r2, .L18+24 - 110 0064 9342 cmp r3, r2 - 111 0066 47D0 beq .L17 - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset request selection for DMA1 Channel6*/ - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S; - ARM GAS /tmp/ccJCJaQH.s page 7 - - - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure request selection for DMA1 Channel6 */ - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 20U); - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel7) - 112 .loc 1 236 0 - 113 0068 314A ldr r2, .L18+28 - 114 006a 9342 cmp r3, r2 - 115 006c 13D1 bne .L5 - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset request selection for DMA1 Channel7*/ - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S; - 116 .loc 1 239 0 - 117 006e 314B ldr r3, .L18+32 - 118 0070 1A68 ldr r2, [r3] - 119 0072 3149 ldr r1, .L18+36 - 120 .LVL6: - 121 0074 0A40 ands r2, r1 - 122 0076 1A60 str r2, [r3] - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure request selection for DMA1 Channel7 */ - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << 24U); - 123 .loc 1 242 0 - 124 0078 1A68 ldr r2, [r3] - 125 007a 4168 ldr r1, [r0, #4] - 126 007c 0906 lsls r1, r1, #24 - 127 007e 0A43 orrs r2, r1 - 128 0080 1A60 str r2, [r3] - 129 0082 08E0 b .L5 - 130 .LVL7: - 131 .L12: - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 132 .loc 1 190 0 - 133 0084 2B4B ldr r3, .L18+32 - 134 0086 1A68 ldr r2, [r3] - 135 0088 0F21 movs r1, #15 - 136 .LVL8: - 137 008a 8A43 bics r2, r1 - 138 008c 1A60 str r2, [r3] - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 139 .loc 1 193 0 - 140 008e 1A68 ldr r2, [r3] - 141 0090 4168 ldr r1, [r0, #4] - 142 0092 0A43 orrs r2, r1 - 143 0094 1A60 str r2, [r3] - 144 .L5: - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** #endif - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Initialize the DMA state*/ - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; - 145 .loc 1 246 0 - 146 0096 2523 movs r3, #37 - 147 0098 0122 movs r2, #1 - 148 009a C254 strb r2, [r0, r3] - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_OK; - 149 .loc 1 248 0 - ARM GAS /tmp/ccJCJaQH.s page 8 - - - 150 009c 0020 movs r0, #0 - 151 .LVL9: - 152 .L2: - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 153 .loc 1 249 0 - 154 @ sp needed - 155 009e 10BD pop {r4, pc} - 156 .LVL10: - 157 .L13: - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 158 .loc 1 198 0 - 159 00a0 244B ldr r3, .L18+32 - 160 00a2 1A68 ldr r2, [r3] - 161 00a4 F021 movs r1, #240 - 162 .LVL11: - 163 00a6 8A43 bics r2, r1 - 164 00a8 1A60 str r2, [r3] - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 165 .loc 1 201 0 - 166 00aa 1A68 ldr r2, [r3] - 167 00ac 4168 ldr r1, [r0, #4] - 168 00ae 0901 lsls r1, r1, #4 - 169 00b0 0A43 orrs r2, r1 - 170 00b2 1A60 str r2, [r3] - 171 00b4 EFE7 b .L5 - 172 .LVL12: - 173 .L14: - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 174 .loc 1 206 0 - 175 00b6 1F4B ldr r3, .L18+32 - 176 00b8 1A68 ldr r2, [r3] - 177 00ba 2049 ldr r1, .L18+40 - 178 .LVL13: - 179 00bc 0A40 ands r2, r1 - 180 00be 1A60 str r2, [r3] - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 181 .loc 1 209 0 - 182 00c0 1A68 ldr r2, [r3] - 183 00c2 4168 ldr r1, [r0, #4] - 184 00c4 0902 lsls r1, r1, #8 - 185 00c6 0A43 orrs r2, r1 - 186 00c8 1A60 str r2, [r3] - 187 00ca E4E7 b .L5 - 188 .LVL14: - 189 .L15: - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 190 .loc 1 214 0 - 191 00cc 194B ldr r3, .L18+32 - 192 00ce 1A68 ldr r2, [r3] - 193 00d0 1B49 ldr r1, .L18+44 - 194 .LVL15: - 195 00d2 0A40 ands r2, r1 - 196 00d4 1A60 str r2, [r3] - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 197 .loc 1 217 0 - 198 00d6 1A68 ldr r2, [r3] - 199 00d8 4168 ldr r1, [r0, #4] - ARM GAS /tmp/ccJCJaQH.s page 9 - - - 200 00da 0903 lsls r1, r1, #12 - 201 00dc 0A43 orrs r2, r1 - 202 00de 1A60 str r2, [r3] - 203 00e0 D9E7 b .L5 - 204 .LVL16: - 205 .L16: - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 206 .loc 1 222 0 - 207 00e2 144B ldr r3, .L18+32 - 208 00e4 1A68 ldr r2, [r3] - 209 00e6 1749 ldr r1, .L18+48 - 210 .LVL17: - 211 00e8 0A40 ands r2, r1 - 212 00ea 1A60 str r2, [r3] - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 213 .loc 1 225 0 - 214 00ec 1A68 ldr r2, [r3] - 215 00ee 4168 ldr r1, [r0, #4] - 216 00f0 0904 lsls r1, r1, #16 - 217 00f2 0A43 orrs r2, r1 - 218 00f4 1A60 str r2, [r3] - 219 00f6 CEE7 b .L5 - 220 .LVL18: - 221 .L17: - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 222 .loc 1 231 0 - 223 00f8 0E4B ldr r3, .L18+32 - 224 00fa 1A68 ldr r2, [r3] - 225 00fc 1249 ldr r1, .L18+52 - 226 .LVL19: - 227 00fe 0A40 ands r2, r1 - 228 0100 1A60 str r2, [r3] - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 229 .loc 1 234 0 - 230 0102 1A68 ldr r2, [r3] - 231 0104 4168 ldr r1, [r0, #4] - 232 0106 0905 lsls r1, r1, #20 - 233 0108 0A43 orrs r2, r1 - 234 010a 1A60 str r2, [r3] - 235 010c C3E7 b .L5 - 236 .LVL20: - 237 .L11: - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 238 .loc 1 146 0 - 239 010e 0120 movs r0, #1 - 240 .LVL21: - 241 0110 C5E7 b .L2 - 242 .L19: - 243 0112 C046 .align 2 - 244 .L18: - 245 0114 0FC0FFFF .word -16369 - 246 0118 08000240 .word 1073872904 - 247 011c 1C000240 .word 1073872924 - 248 0120 30000240 .word 1073872944 - 249 0124 44000240 .word 1073872964 - 250 0128 58000240 .word 1073872984 - 251 012c 6C000240 .word 1073873004 - ARM GAS /tmp/ccJCJaQH.s page 10 - - - 252 0130 80000240 .word 1073873024 - 253 0134 A8000240 .word 1073873064 - 254 0138 FFFFFFF0 .word -251658241 - 255 013c FFF0FFFF .word -3841 - 256 0140 FF0FFFFF .word -61441 - 257 0144 FFFFF0FF .word -983041 - 258 0148 FFFF0FFF .word -15728641 - 259 .cfi_endproc - 260 .LFE39: - 262 .section .text.HAL_DMA_DeInit,"ax",%progbits - 263 .align 1 - 264 .global HAL_DMA_DeInit - 265 .syntax unified - 266 .code 16 - 267 .thumb_func - 268 .fpu softvfp - 270 HAL_DMA_DeInit: - 271 .LFB40: - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief DeInitializes the DMA peripheral - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval HAL status - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 272 .loc 1 258 0 - 273 .cfi_startproc - 274 @ args = 0, pretend = 0, frame = 0 - 275 @ frame_needed = 0, uses_anonymous_args = 0 - 276 .LVL22: - 277 0000 00B5 push {lr} - 278 .LCFI1: - 279 .cfi_def_cfa_offset 4 - 280 .cfi_offset 14, -4 - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Check the DMA peripheral state */ - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(hdma == NULL) - 281 .loc 1 260 0 - 282 0002 0028 cmp r0, #0 - 283 0004 00D1 bne .LCB261 - 284 0006 F5E0 b .L33 @long jump - 285 .LCB261: - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_ERROR; - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Check the DMA peripheral state */ - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(hdma->State == HAL_DMA_STATE_BUSY) - 286 .loc 1 266 0 - 287 0008 2523 movs r3, #37 - 288 000a C35C ldrb r3, [r0, r3] - 289 000c 022B cmp r3, #2 - 290 000e 00D1 bne .LCB266 - 291 0010 F2E0 b .L34 @long jump - 292 .LCB266: - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - ARM GAS /tmp/ccJCJaQH.s page 11 - - - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_ERROR; - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable the selected DMA Channelx */ - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma); - 293 .loc 1 272 0 - 294 0012 0268 ldr r2, [r0] - 295 0014 1368 ldr r3, [r2] - 296 0016 0121 movs r1, #1 - 297 0018 8B43 bics r3, r1 - 298 001a 1360 str r3, [r2] - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Reset DMA Channel control register */ - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CCR = 0U; - 299 .loc 1 275 0 - 300 001c 0268 ldr r2, [r0] - 301 001e 0023 movs r3, #0 - 302 0020 1360 str r3, [r2] - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Reset DMA Channel Number of Data to Transfer register */ - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CNDTR = 0U; - 303 .loc 1 278 0 - 304 0022 0268 ldr r2, [r0] - 305 0024 5360 str r3, [r2, #4] - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Reset DMA Channel peripheral address register */ - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CPAR = 0U; - 306 .loc 1 281 0 - 307 0026 0268 ldr r2, [r0] - 308 0028 9360 str r3, [r2, #8] - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Reset DMA Channel memory address register */ - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CMAR = 0U; - 309 .loc 1 284 0 - 310 002a 0268 ldr r2, [r0] - 311 002c D360 str r3, [r2, #12] - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Clear all flags */ - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); - 312 .loc 1 287 0 - 313 002e 0368 ldr r3, [r0] - 314 0030 724A ldr r2, .L69 - 315 0032 9342 cmp r3, r2 - 316 0034 14D0 beq .L35 - 317 .loc 1 287 0 is_stmt 0 discriminator 1 - 318 0036 724A ldr r2, .L69+4 - 319 0038 9342 cmp r3, r2 - 320 003a 2AD0 beq .L36 - 321 .loc 1 287 0 discriminator 3 - 322 003c 714A ldr r2, .L69+8 - 323 003e 9342 cmp r3, r2 - 324 0040 29D0 beq .L37 - 325 .loc 1 287 0 discriminator 5 - 326 0042 714A ldr r2, .L69+12 - 327 0044 9342 cmp r3, r2 - 328 0046 29D0 beq .L38 - 329 .loc 1 287 0 discriminator 7 - ARM GAS /tmp/ccJCJaQH.s page 12 - - - 330 0048 704A ldr r2, .L69+16 - 331 004a 9342 cmp r3, r2 - 332 004c 29D0 beq .L39 - 333 .loc 1 287 0 discriminator 9 - 334 004e 704A ldr r2, .L69+20 - 335 0050 9342 cmp r3, r2 - 336 0052 02D0 beq .L59 - 337 .loc 1 287 0 - 338 0054 8022 movs r2, #128 - 339 0056 5204 lsls r2, r2, #17 - 340 0058 03E0 b .L22 - 341 .L59: - 342 005a 8022 movs r2, #128 - 343 005c 5203 lsls r2, r2, #13 - 344 005e 00E0 b .L22 - 345 .L35: - 346 0060 0122 movs r2, #1 - 347 .L22: - 348 .loc 1 287 0 discriminator 24 - 349 0062 6C4B ldr r3, .L69+24 - 350 0064 5A60 str r2, [r3, #4] - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); - 351 .loc 1 288 0 is_stmt 1 discriminator 24 - 352 0066 0368 ldr r3, [r0] - 353 0068 644A ldr r2, .L69 - 354 006a 9342 cmp r3, r2 - 355 006c 1FD0 beq .L41 - 356 .loc 1 288 0 is_stmt 0 discriminator 1 - 357 006e 644A ldr r2, .L69+4 - 358 0070 9342 cmp r3, r2 - 359 0072 35D0 beq .L42 - 360 .loc 1 288 0 discriminator 3 - 361 0074 634A ldr r2, .L69+8 - 362 0076 9342 cmp r3, r2 - 363 0078 34D0 beq .L43 - 364 .loc 1 288 0 discriminator 5 - 365 007a 634A ldr r2, .L69+12 - 366 007c 9342 cmp r3, r2 - 367 007e 34D0 beq .L44 - 368 .loc 1 288 0 discriminator 7 - 369 0080 624A ldr r2, .L69+16 - 370 0082 9342 cmp r3, r2 - 371 0084 34D0 beq .L45 - 372 .loc 1 288 0 discriminator 9 - 373 0086 624A ldr r2, .L69+20 - 374 0088 9342 cmp r3, r2 - 375 008a 0DD0 beq .L60 - 376 .loc 1 288 0 - 377 008c 8022 movs r2, #128 - 378 008e 9204 lsls r2, r2, #18 - 379 0090 0EE0 b .L23 - 380 .L36: - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); - 381 .loc 1 287 0 is_stmt 1 - 382 0092 1022 movs r2, #16 - 383 0094 E5E7 b .L22 - 384 .L37: - ARM GAS /tmp/ccJCJaQH.s page 13 - - - 385 0096 8022 movs r2, #128 - 386 0098 5200 lsls r2, r2, #1 - 387 009a E2E7 b .L22 - 388 .L38: - 389 009c 8022 movs r2, #128 - 390 009e 5201 lsls r2, r2, #5 - 391 00a0 DFE7 b .L22 - 392 .L39: - 393 00a2 8022 movs r2, #128 - 394 00a4 5202 lsls r2, r2, #9 - 395 00a6 DCE7 b .L22 - 396 .L60: - 397 .loc 1 288 0 - 398 00a8 8022 movs r2, #128 - 399 00aa 9203 lsls r2, r2, #14 - 400 00ac 00E0 b .L23 - 401 .L41: - 402 00ae 0222 movs r2, #2 - 403 .L23: - 404 .loc 1 288 0 is_stmt 0 discriminator 24 - 405 00b0 584B ldr r3, .L69+24 - 406 00b2 5A60 str r2, [r3, #4] - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); - 407 .loc 1 289 0 is_stmt 1 discriminator 24 - 408 00b4 0368 ldr r3, [r0] - 409 00b6 514A ldr r2, .L69 - 410 00b8 9342 cmp r3, r2 - 411 00ba 1FD0 beq .L47 - 412 .loc 1 289 0 is_stmt 0 discriminator 1 - 413 00bc 504A ldr r2, .L69+4 - 414 00be 9342 cmp r3, r2 - 415 00c0 35D0 beq .L48 - 416 .loc 1 289 0 discriminator 3 - 417 00c2 504A ldr r2, .L69+8 - 418 00c4 9342 cmp r3, r2 - 419 00c6 34D0 beq .L49 - 420 .loc 1 289 0 discriminator 5 - 421 00c8 4F4A ldr r2, .L69+12 - 422 00ca 9342 cmp r3, r2 - 423 00cc 34D0 beq .L50 - 424 .loc 1 289 0 discriminator 7 - 425 00ce 4F4A ldr r2, .L69+16 - 426 00d0 9342 cmp r3, r2 - 427 00d2 34D0 beq .L51 - 428 .loc 1 289 0 discriminator 9 - 429 00d4 4E4A ldr r2, .L69+20 - 430 00d6 9342 cmp r3, r2 - 431 00d8 0DD0 beq .L61 - 432 .loc 1 289 0 - 433 00da 8022 movs r2, #128 - 434 00dc 1205 lsls r2, r2, #20 - 435 00de 0EE0 b .L24 - 436 .L42: - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); - 437 .loc 1 288 0 is_stmt 1 - 438 00e0 2022 movs r2, #32 - 439 00e2 E5E7 b .L23 - ARM GAS /tmp/ccJCJaQH.s page 14 - - - 440 .L43: - 441 00e4 8022 movs r2, #128 - 442 00e6 9200 lsls r2, r2, #2 - 443 00e8 E2E7 b .L23 - 444 .L44: - 445 00ea 8022 movs r2, #128 - 446 00ec 9201 lsls r2, r2, #6 - 447 00ee DFE7 b .L23 - 448 .L45: - 449 00f0 8022 movs r2, #128 - 450 00f2 9202 lsls r2, r2, #10 - 451 00f4 DCE7 b .L23 - 452 .L61: - 453 .loc 1 289 0 - 454 00f6 8022 movs r2, #128 - 455 00f8 1204 lsls r2, r2, #16 - 456 00fa 00E0 b .L24 - 457 .L47: - 458 00fc 0822 movs r2, #8 - 459 .L24: - 460 .loc 1 289 0 is_stmt 0 discriminator 24 - 461 00fe 454B ldr r3, .L69+24 - 462 0100 5A60 str r2, [r3, #4] - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); - 463 .loc 1 290 0 is_stmt 1 discriminator 24 - 464 0102 0368 ldr r3, [r0] - 465 0104 3D4A ldr r2, .L69 - 466 0106 9342 cmp r3, r2 - 467 0108 1FD0 beq .L53 - 468 .loc 1 290 0 is_stmt 0 discriminator 1 - 469 010a 3D4A ldr r2, .L69+4 - 470 010c 9342 cmp r3, r2 - 471 010e 3BD0 beq .L54 - 472 .loc 1 290 0 discriminator 3 - 473 0110 3C4A ldr r2, .L69+8 - 474 0112 9342 cmp r3, r2 - 475 0114 3AD0 beq .L55 - 476 .loc 1 290 0 discriminator 5 - 477 0116 3C4A ldr r2, .L69+12 - 478 0118 9342 cmp r3, r2 - 479 011a 3AD0 beq .L56 - 480 .loc 1 290 0 discriminator 7 - 481 011c 3B4A ldr r2, .L69+16 - 482 011e 9342 cmp r3, r2 - 483 0120 3AD0 beq .L57 - 484 .loc 1 290 0 discriminator 9 - 485 0122 3B4A ldr r2, .L69+20 - 486 0124 9342 cmp r3, r2 - 487 0126 0DD0 beq .L62 - 488 .loc 1 290 0 - 489 0128 8022 movs r2, #128 - 490 012a D204 lsls r2, r2, #19 - 491 012c 0EE0 b .L25 - 492 .L48: - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); - 493 .loc 1 289 0 is_stmt 1 - 494 012e 8022 movs r2, #128 - ARM GAS /tmp/ccJCJaQH.s page 15 - - - 495 0130 E5E7 b .L24 - 496 .L49: - 497 0132 8022 movs r2, #128 - 498 0134 1201 lsls r2, r2, #4 - 499 0136 E2E7 b .L24 - 500 .L50: - 501 0138 8022 movs r2, #128 - 502 013a 1202 lsls r2, r2, #8 - 503 013c DFE7 b .L24 - 504 .L51: - 505 013e 8022 movs r2, #128 - 506 0140 1203 lsls r2, r2, #12 - 507 0142 DCE7 b .L24 - 508 .L62: - 509 .loc 1 290 0 - 510 0144 8022 movs r2, #128 - 511 0146 D203 lsls r2, r2, #15 - 512 0148 00E0 b .L25 - 513 .L53: - 514 014a 0422 movs r2, #4 - 515 .L25: - 516 .loc 1 290 0 is_stmt 0 discriminator 24 - 517 014c 314B ldr r3, .L69+24 - 518 014e 5A60 str r2, [r3, #4] - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Reset DMA channel selection register */ - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if (hdma->Instance == DMA1_Channel1) - 519 .loc 1 293 0 is_stmt 1 discriminator 24 - 520 0150 0368 ldr r3, [r0] - 521 0152 2A4A ldr r2, .L69 - 522 0154 9342 cmp r3, r2 - 523 0156 22D0 beq .L63 - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset DMA request*/ - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C1S; - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel2) - 524 .loc 1 298 0 - 525 0158 294A ldr r2, .L69+4 - 526 015a 9342 cmp r3, r2 - 527 015c 2CD0 beq .L64 - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset DMA request*/ - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C2S; - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel3) - 528 .loc 1 303 0 - 529 015e 294A ldr r2, .L69+8 - 530 0160 9342 cmp r3, r2 - 531 0162 2FD0 beq .L65 - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset DMA request*/ - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C3S; - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel4) - 532 .loc 1 308 0 - 533 0164 284A ldr r2, .L69+12 - ARM GAS /tmp/ccJCJaQH.s page 16 - - - 534 0166 9342 cmp r3, r2 - 535 0168 32D0 beq .L66 - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset DMA request*/ - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C4S; - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel5) - 536 .loc 1 313 0 - 537 016a 284A ldr r2, .L69+16 - 538 016c 9342 cmp r3, r2 - 539 016e 35D0 beq .L67 - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset DMA request*/ - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C5S; - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** #if !defined (STM32L011xx) && !defined (STM32L021xx) - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel6) - 540 .loc 1 319 0 - 541 0170 274A ldr r2, .L69+20 - 542 0172 9342 cmp r3, r2 - 543 0174 38D0 beq .L68 - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset DMA request*/ - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C6S; - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else if (hdma->Instance == DMA1_Channel7) - 544 .loc 1 324 0 - 545 0176 284A ldr r2, .L69+28 - 546 0178 9342 cmp r3, r2 - 547 017a 15D1 bne .L27 - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /*Reset DMA request*/ - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA1_CSELR->CSELR &= ~DMA_CSELR_C7S; - 548 .loc 1 327 0 - 549 017c 274A ldr r2, .L69+32 - 550 017e 1368 ldr r3, [r2] - 551 0180 2749 ldr r1, .L69+36 - 552 0182 0B40 ands r3, r1 - 553 0184 1360 str r3, [r2] - 554 0186 0FE0 b .L27 - 555 .L54: - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 556 .loc 1 290 0 - 557 0188 4022 movs r2, #64 - 558 018a DFE7 b .L25 - 559 .L55: - 560 018c 8022 movs r2, #128 - 561 018e D200 lsls r2, r2, #3 - 562 0190 DCE7 b .L25 - 563 .L56: - 564 0192 8022 movs r2, #128 - 565 0194 D201 lsls r2, r2, #7 - 566 0196 D9E7 b .L25 - 567 .L57: - 568 0198 8022 movs r2, #128 - 569 019a D202 lsls r2, r2, #11 - 570 019c D6E7 b .L25 - ARM GAS /tmp/ccJCJaQH.s page 17 - - - 571 .L63: - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 572 .loc 1 296 0 - 573 019e 1F4A ldr r2, .L69+32 - 574 01a0 1368 ldr r3, [r2] - 575 01a2 0F21 movs r1, #15 - 576 01a4 8B43 bics r3, r1 - 577 01a6 1360 str r3, [r2] - 578 .L27: - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** #endif - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Initialise the error code */ - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 579 .loc 1 331 0 - 580 01a8 0023 movs r3, #0 - 581 01aa C363 str r3, [r0, #60] - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Initialize the DMA state */ - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_RESET; - 582 .loc 1 334 0 - 583 01ac 2522 movs r2, #37 - 584 01ae 8354 strb r3, [r0, r2] - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Release Lock */ - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 585 .loc 1 337 0 - 586 01b0 013A subs r2, r2, #1 - 587 01b2 8354 strb r3, [r0, r2] - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_OK; - 588 .loc 1 339 0 - 589 01b4 0020 movs r0, #0 - 590 .LVL23: - 591 .L21: - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 592 .loc 1 340 0 - 593 @ sp needed - 594 01b6 00BD pop {pc} - 595 .LVL24: - 596 .L64: - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 597 .loc 1 301 0 - 598 01b8 184A ldr r2, .L69+32 - 599 01ba 1368 ldr r3, [r2] - 600 01bc F021 movs r1, #240 - 601 01be 8B43 bics r3, r1 - 602 01c0 1360 str r3, [r2] - 603 01c2 F1E7 b .L27 - 604 .L65: - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 605 .loc 1 306 0 - 606 01c4 154A ldr r2, .L69+32 - 607 01c6 1368 ldr r3, [r2] - 608 01c8 1649 ldr r1, .L69+40 - 609 01ca 0B40 ands r3, r1 - 610 01cc 1360 str r3, [r2] - 611 01ce EBE7 b .L27 - ARM GAS /tmp/ccJCJaQH.s page 18 - - - 612 .L66: - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 613 .loc 1 311 0 - 614 01d0 124A ldr r2, .L69+32 - 615 01d2 1368 ldr r3, [r2] - 616 01d4 1449 ldr r1, .L69+44 - 617 01d6 0B40 ands r3, r1 - 618 01d8 1360 str r3, [r2] - 619 01da E5E7 b .L27 - 620 .L67: - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 621 .loc 1 316 0 - 622 01dc 0F4A ldr r2, .L69+32 - 623 01de 1368 ldr r3, [r2] - 624 01e0 1249 ldr r1, .L69+48 - 625 01e2 0B40 ands r3, r1 - 626 01e4 1360 str r3, [r2] - 627 01e6 DFE7 b .L27 - 628 .L68: - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 629 .loc 1 322 0 - 630 01e8 0C4A ldr r2, .L69+32 - 631 01ea 1368 ldr r3, [r2] - 632 01ec 1049 ldr r1, .L69+52 - 633 01ee 0B40 ands r3, r1 - 634 01f0 1360 str r3, [r2] - 635 01f2 D9E7 b .L27 - 636 .L33: - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 637 .loc 1 262 0 - 638 01f4 0120 movs r0, #1 - 639 .LVL25: - 640 01f6 DEE7 b .L21 - 641 .LVL26: - 642 .L34: - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 643 .loc 1 268 0 - 644 01f8 0120 movs r0, #1 - 645 .LVL27: - 646 01fa DCE7 b .L21 - 647 .L70: - 648 .align 2 - 649 .L69: - 650 01fc 08000240 .word 1073872904 - 651 0200 1C000240 .word 1073872924 - 652 0204 30000240 .word 1073872944 - 653 0208 44000240 .word 1073872964 - 654 020c 58000240 .word 1073872984 - 655 0210 6C000240 .word 1073873004 - 656 0214 00000240 .word 1073872896 - 657 0218 80000240 .word 1073873024 - 658 021c A8000240 .word 1073873064 - 659 0220 FFFFFFF0 .word -251658241 - 660 0224 FFF0FFFF .word -3841 - 661 0228 FF0FFFFF .word -61441 - 662 022c FFFFF0FF .word -983041 - 663 0230 FFFF0FFF .word -15728641 - ARM GAS /tmp/ccJCJaQH.s page 19 - - - 664 .cfi_endproc - 665 .LFE40: - 667 .section .text.HAL_DMA_Start,"ax",%progbits - 668 .align 1 - 669 .global HAL_DMA_Start - 670 .syntax unified - 671 .code 16 - 672 .thumb_func - 673 .fpu softvfp - 675 HAL_DMA_Start: - 676 .LFB41: - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @} - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** @addtogroup DMA_Exported_Functions_Group2 - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief I/O operation functions - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** @verbatim - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** =============================================================================== - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ##### IO operation functions ##### - 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** =============================================================================== - 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** [..] This section provides functions allowing to: - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Configure the source, destination address and data length and Start DMA transfer - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Configure the source, destination address and data length and - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** Start DMA transfer with interrupt - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Abort DMA transfer - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Poll for transfer complete - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Handle DMA interrupt request - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** @endverbatim - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @{ - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Starts the DMA Transfer. - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains - 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param SrcAddress: The source memory Buffer address - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param DstAddress: The destination memory Buffer address - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param DataLength: The length of data to be transferred from source to destination - 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval HAL status - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, - 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 677 .loc 1 375 0 - 678 .cfi_startproc - 679 @ args = 0, pretend = 0, frame = 0 - 680 @ frame_needed = 0, uses_anonymous_args = 0 - 681 .LVL28: - 682 0000 70B5 push {r4, r5, r6, lr} - 683 .LCFI2: - 684 .cfi_def_cfa_offset 16 - 685 .cfi_offset 4, -16 - 686 .cfi_offset 5, -12 - 687 .cfi_offset 6, -8 - ARM GAS /tmp/ccJCJaQH.s page 20 - - - 688 .cfi_offset 14, -4 - 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process locked */ - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_LOCK(hdma); - 689 .loc 1 377 0 - 690 0002 2424 movs r4, #36 - 691 0004 045D ldrb r4, [r0, r4] - 692 0006 012C cmp r4, #1 - 693 0008 1ED0 beq .L75 - 694 .loc 1 377 0 is_stmt 0 discriminator 2 - 695 000a 0126 movs r6, #1 - 696 000c 2424 movs r4, #36 - 697 000e 0655 strb r6, [r0, r4] - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change DMA peripheral state */ - 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; - 698 .loc 1 380 0 is_stmt 1 discriminator 2 - 699 0010 0134 adds r4, r4, #1 - 700 0012 0225 movs r5, #2 - 701 0014 0555 strb r5, [r0, r4] - 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Check the parameters */ - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable the peripheral */ - 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma); - 702 .loc 1 386 0 discriminator 2 - 703 0016 0568 ldr r5, [r0] - 704 0018 2C68 ldr r4, [r5] - 705 001a B443 bics r4, r6 - 706 001c 2C60 str r4, [r5] - 707 .LVL29: - 708 .LBB6: - 709 .LBB7: - 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ - 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Enable the Peripheral */ - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_ENABLE(hdma); - 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_OK; - 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Start the DMA Transfer with interrupt enabled. - 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param SrcAddress: The source memory Buffer address - 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param DstAddress: The destination memory Buffer address - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param DataLength: The length of data to be transferred from source to destination - 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval HAL status - 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres - 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process locked */ - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_LOCK(hdma); - 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - ARM GAS /tmp/ccJCJaQH.s page 21 - - - 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change DMA peripheral state */ - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; - 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Check the parameters */ - 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable the peripheral */ - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma); - 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ - 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Enable the transfer complete interrupt */ - 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC); - 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Enable the Half transfer complete interrupt */ - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT); - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Enable the transfer Error interrupt */ - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE); - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Enable the Peripheral */ - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_ENABLE(hdma); - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_OK; - 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Aborts the DMA Transfer. - 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval HAL status - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** uint32_t tickstart = 0U; - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable the channel */ - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma); - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Get timeout */ - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** tickstart = HAL_GetTick(); - 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Check if the DMA Channel is effectively disabled */ - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** while((hdma->Instance->CCR & DMA_CCR_EN) != 0U) - 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Check for the Timeout */ - 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if( (HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT) - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Update error code */ - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->ErrorCode |= HAL_DMA_ERROR_TIMEOUT; - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process Unlocked */ - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change the DMA state */ - 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_TIMEOUT; - ARM GAS /tmp/ccJCJaQH.s page 22 - - - 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_TIMEOUT; - 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process Unlocked */ - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change the DMA state*/ - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; - 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_OK; - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Aborts the DMA Transfer in Interrupt mode. - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval HAL status - 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; - 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(HAL_DMA_STATE_BUSY != hdma->State) - 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* no transfer ongoing */ - 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** status = HAL_ERROR; - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable DMA IT */ - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable the channel */ - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma); - 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Clear all flags */ - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change the DMA state */ - 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process Unlocked */ - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Call User Abort callback */ - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(hdma->XferAbortCallback != NULL) - 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->XferAbortCallback(hdma); - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return status; - 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - ARM GAS /tmp/ccJCJaQH.s page 23 - - - 525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Polling for transfer complete. - 526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param CompleteLevel: Specifies the DMA level complete. - 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param Timeout: Timeout duration. - 530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval HAL status - 531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t - 533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** uint32_t temp; - 535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** uint32_t tickstart = 0U; - 536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Get the level transfer complete flag */ - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(CompleteLevel == HAL_DMA_FULL_TRANSFER) - 539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Transfer Complete flag */ - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma); - 542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else - 544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Half Transfer Complete flag */ - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma); - 547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Get timeout */ - 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** tickstart = HAL_GetTick(); - 551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET) - 553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)) - 555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Clear the transfer error flags */ - 557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); - 558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Update error code */ - 560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE); - 561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change the DMA state */ - 563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State= HAL_DMA_STATE_ERROR; - 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process Unlocked */ - 566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_ERROR; - 569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Check for the Timeout */ - 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(Timeout != HAL_MAX_DELAY) - 572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout)) - 574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Update error code */ - 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT); - 577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change the DMA state */ - 579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State= HAL_DMA_STATE_TIMEOUT; - 580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process Unlocked */ - ARM GAS /tmp/ccJCJaQH.s page 24 - - - 582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_TIMEOUT; - 585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(CompleteLevel == HAL_DMA_FULL_TRANSFER) - 590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Clear the transfer complete flag */ - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); - 593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and - 595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** all transfers are complete) */ - 596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; - 597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process unlocked */ - 599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else - 602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Clear the half transfer complete flag */ - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); - 605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and - 607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** all transfers are complete) */ - 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY_HALF; - 609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process unlocked */ - 611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return HAL_OK; - 615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Handles DMA interrupt request. - 618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - 619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval None - 621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) - 623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Transfer Error Interrupt management ***************************************/ - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET) - 626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET) - 628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable the transfer error interrupt */ - 630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE); - 631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Clear the transfer error flag */ - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); - 634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Update error code */ - 636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->ErrorCode |= HAL_DMA_ERROR_TE; - 637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change the DMA state */ - ARM GAS /tmp/ccJCJaQH.s page 25 - - - 639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_ERROR; - 640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process Unlocked */ - 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if (hdma->XferErrorCallback != NULL) - 645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Transfer error callback */ - 647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->XferErrorCallback(hdma); - 648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Half Transfer Complete Interrupt management ******************************/ - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET) - 654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET) - 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ - 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable the half transfer interrupt */ - 661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Clear the half transfer complete flag */ - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); - 665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change DMA peripheral state */ - 667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY_HALF; - 668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(hdma->XferHalfCpltCallback != NULL) - 670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Half transfer callback */ - 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->XferHalfCpltCallback(hdma); - 673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Transfer Complete Interrupt management ***********************************/ - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET) - 679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET) - 681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Disable the transfer complete interrupt */ - 685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC); - 686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Clear the transfer complete flag */ - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); - 689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Update error code */ - 691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->ErrorCode |= HAL_DMA_ERROR_NONE; - 692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Change the DMA state */ - 694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; - 695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - ARM GAS /tmp/ccJCJaQH.s page 26 - - - 696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process Unlocked */ - 697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** __HAL_UNLOCK(hdma); - 698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if(hdma->XferCpltCallback != NULL) - 700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Transfer complete callback */ - 702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->XferCpltCallback(hdma); - 703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @} - 710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** @addtogroup DMA_Exported_Functions_Group3 - 713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Peripheral State functions - 714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * - 715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** @verbatim - 716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** =============================================================================== - 717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** ##### Peripheral State functions ##### - 718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** =============================================================================== - 719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** [..] - 720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** This subsection provides functions allowing to - 721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Check the DMA state - 722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** (+) Get error code - 723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** @endverbatim - 725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @{ - 726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Returns the DMA state. - 730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - 731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval HAL state - 733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) - 735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return hdma->State; - 737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Return the DMA error code - 741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains - 742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval DMA Error Code - 744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) - 746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return hdma->ErrorCode; - 748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @} - 752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - ARM GAS /tmp/ccJCJaQH.s page 27 - - - 753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @} - 756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Private macro -------------------------------------------------------------*/ - 758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Private variables ---------------------------------------------------------*/ - 759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Private function prototypes -----------------------------------------------*/ - 762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** @addtogroup DMA_Private - 763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @{ - 764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* - 767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @brief Sets the DMA Transfer parameter. - 768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - 769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. - 770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param SrcAddress: The source memory Buffer address - 771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param DstAddress: The destination memory Buffer address - 772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @param DataLength: The length of data to be transferred from source to destination - 773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** * @retval HAL status - 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** */ - 775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 - 776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure DMA Channel data length */ - 778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CNDTR = DataLength; - 710 .loc 1 778 0 discriminator 2 - 711 001e 0468 ldr r4, [r0] - 712 0020 6360 str r3, [r4, #4] - 779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Peripheral to Memory */ - 781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 713 .loc 1 781 0 discriminator 2 - 714 0022 8368 ldr r3, [r0, #8] - 715 .LVL30: - 716 0024 102B cmp r3, #16 - 717 0026 0AD0 beq .L76 - 782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure DMA Channel destination address */ - 784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CPAR = DstAddress; - 785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure DMA Channel source address */ - 787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CMAR = SrcAddress; - 788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Memory to Peripheral */ - 790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** else - 791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure DMA Channel source address */ - 793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CPAR = SrcAddress; - 718 .loc 1 793 0 - 719 0028 0368 ldr r3, [r0] - 720 002a 9960 str r1, [r3, #8] - 721 .LVL31: - 794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Configure DMA Channel destination address */ - 796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** hdma->Instance->CMAR = DstAddress; - 722 .loc 1 796 0 - ARM GAS /tmp/ccJCJaQH.s page 28 - - - 723 002c 0368 ldr r3, [r0] - 724 002e DA60 str r2, [r3, #12] - 725 .L74: - 726 .LVL32: - 727 .LBE7: - 728 .LBE6: - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 729 .loc 1 392 0 discriminator 2 - 730 0030 0268 ldr r2, [r0] - 731 .LVL33: - 732 0032 1368 ldr r3, [r2] - 733 0034 0121 movs r1, #1 - 734 .LVL34: - 735 0036 0B43 orrs r3, r1 - 736 0038 1360 str r3, [r2] - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 737 .loc 1 394 0 discriminator 2 - 738 003a 0020 movs r0, #0 - 739 .LVL35: - 740 .L72: - 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 741 .loc 1 395 0 - 742 @ sp needed - 743 003c 70BD pop {r4, r5, r6, pc} - 744 .LVL36: - 745 .L76: - 746 .LBB9: - 747 .LBB8: - 784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 748 .loc 1 784 0 - 749 003e 0368 ldr r3, [r0] - 750 0040 9A60 str r2, [r3, #8] - 751 .LVL37: - 787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 752 .loc 1 787 0 - 753 0042 0368 ldr r3, [r0] - 754 0044 D960 str r1, [r3, #12] - 755 0046 F3E7 b .L74 - 756 .LVL38: - 757 .L75: - 758 .LBE8: - 759 .LBE9: - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 760 .loc 1 377 0 - 761 0048 0220 movs r0, #2 - 762 .LVL39: - 763 004a F7E7 b .L72 - 764 .cfi_endproc - 765 .LFE41: - 767 .section .text.HAL_DMA_Start_IT,"ax",%progbits - 768 .align 1 - 769 .global HAL_DMA_Start_IT - 770 .syntax unified - 771 .code 16 - 772 .thumb_func - 773 .fpu softvfp - 775 HAL_DMA_Start_IT: - ARM GAS /tmp/ccJCJaQH.s page 29 - - - 776 .LFB42: - 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Process locked */ - 777 .loc 1 407 0 - 778 .cfi_startproc - 779 @ args = 0, pretend = 0, frame = 0 - 780 @ frame_needed = 0, uses_anonymous_args = 0 - 781 .LVL40: - 782 0000 70B5 push {r4, r5, r6, lr} - 783 .LCFI3: - 784 .cfi_def_cfa_offset 16 - 785 .cfi_offset 4, -16 - 786 .cfi_offset 5, -12 - 787 .cfi_offset 6, -8 - 788 .cfi_offset 14, -4 - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 789 .loc 1 409 0 - 790 0002 2424 movs r4, #36 - 791 0004 045D ldrb r4, [r0, r4] - 792 0006 012C cmp r4, #1 - 793 0008 2DD0 beq .L81 - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 794 .loc 1 409 0 is_stmt 0 discriminator 2 - 795 000a 0126 movs r6, #1 - 796 000c 2424 movs r4, #36 - 797 000e 0655 strb r6, [r0, r4] - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 798 .loc 1 412 0 is_stmt 1 discriminator 2 - 799 0010 0134 adds r4, r4, #1 - 800 0012 0225 movs r5, #2 - 801 0014 0555 strb r5, [r0, r4] - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 802 .loc 1 418 0 discriminator 2 - 803 0016 0568 ldr r5, [r0] - 804 0018 2C68 ldr r4, [r5] - 805 001a B443 bics r4, r6 - 806 001c 2C60 str r4, [r5] - 807 .LVL41: - 808 .LBB10: - 809 .LBB11: - 778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 810 .loc 1 778 0 discriminator 2 - 811 001e 0468 ldr r4, [r0] - 812 0020 6360 str r3, [r4, #4] - 781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 813 .loc 1 781 0 discriminator 2 - 814 0022 8368 ldr r3, [r0, #8] - 815 .LVL42: - 816 0024 102B cmp r3, #16 - 817 0026 19D0 beq .L82 - 793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 818 .loc 1 793 0 - 819 0028 0368 ldr r3, [r0] - 820 002a 9960 str r1, [r3, #8] - 821 .LVL43: - 822 .loc 1 796 0 - 823 002c 0368 ldr r3, [r0] - 824 002e DA60 str r2, [r3, #12] - ARM GAS /tmp/ccJCJaQH.s page 30 - - - 825 .L80: - 826 .LVL44: - 827 .LBE11: - 828 .LBE10: - 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 829 .loc 1 424 0 discriminator 2 - 830 0030 0268 ldr r2, [r0] - 831 .LVL45: - 832 0032 1368 ldr r3, [r2] - 833 0034 0221 movs r1, #2 - 834 .LVL46: - 835 0036 0B43 orrs r3, r1 - 836 0038 1360 str r3, [r2] - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 837 .loc 1 427 0 discriminator 2 - 838 003a 0268 ldr r2, [r0] - 839 003c 1368 ldr r3, [r2] - 840 003e 0231 adds r1, r1, #2 - 841 0040 0B43 orrs r3, r1 - 842 0042 1360 str r3, [r2] - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 843 .loc 1 430 0 discriminator 2 - 844 0044 0268 ldr r2, [r0] - 845 0046 1368 ldr r3, [r2] - 846 0048 0431 adds r1, r1, #4 - 847 004a 0B43 orrs r3, r1 - 848 004c 1360 str r3, [r2] - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 849 .loc 1 433 0 discriminator 2 - 850 004e 0268 ldr r2, [r0] - 851 0050 1368 ldr r3, [r2] - 852 0052 0739 subs r1, r1, #7 - 853 0054 0B43 orrs r3, r1 - 854 0056 1360 str r3, [r2] - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 855 .loc 1 435 0 discriminator 2 - 856 0058 0020 movs r0, #0 - 857 .LVL47: - 858 .L78: - 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 859 .loc 1 436 0 - 860 @ sp needed - 861 005a 70BD pop {r4, r5, r6, pc} - 862 .LVL48: - 863 .L82: - 864 .LBB13: - 865 .LBB12: - 784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 866 .loc 1 784 0 - 867 005c 0368 ldr r3, [r0] - 868 005e 9A60 str r2, [r3, #8] - 869 .LVL49: - 787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 870 .loc 1 787 0 - 871 0060 0368 ldr r3, [r0] - 872 0062 D960 str r1, [r3, #12] - 873 0064 E4E7 b .L80 - ARM GAS /tmp/ccJCJaQH.s page 31 - - - 874 .LVL50: - 875 .L81: - 876 .LBE12: - 877 .LBE13: - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 878 .loc 1 409 0 - 879 0066 0220 movs r0, #2 - 880 .LVL51: - 881 0068 F7E7 b .L78 - 882 .cfi_endproc - 883 .LFE42: - 885 .section .text.HAL_DMA_Abort,"ax",%progbits - 886 .align 1 - 887 .global HAL_DMA_Abort - 888 .syntax unified - 889 .code 16 - 890 .thumb_func - 891 .fpu softvfp - 893 HAL_DMA_Abort: - 894 .LFB43: - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** uint32_t tickstart = 0U; - 895 .loc 1 445 0 - 896 .cfi_startproc - 897 @ args = 0, pretend = 0, frame = 0 - 898 @ frame_needed = 0, uses_anonymous_args = 0 - 899 .LVL52: - 900 0000 70B5 push {r4, r5, r6, lr} - 901 .LCFI4: - 902 .cfi_def_cfa_offset 16 - 903 .cfi_offset 4, -16 - 904 .cfi_offset 5, -12 - 905 .cfi_offset 6, -8 - 906 .cfi_offset 14, -4 - 907 0002 0400 movs r4, r0 - 908 .LVL53: - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 909 .loc 1 449 0 - 910 0004 0268 ldr r2, [r0] - 911 0006 1368 ldr r3, [r2] - 912 0008 0121 movs r1, #1 - 913 000a 8B43 bics r3, r1 - 914 000c 1360 str r3, [r2] - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 915 .loc 1 452 0 - 916 000e FFF7FEFF bl HAL_GetTick - 917 .LVL54: - 918 0012 0500 movs r5, r0 - 919 .LVL55: - 920 .L84: - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 921 .loc 1 455 0 - 922 0014 2368 ldr r3, [r4] - 923 0016 1B68 ldr r3, [r3] - 924 0018 DB07 lsls r3, r3, #31 - 925 001a 12D5 bpl .L87 - 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 926 .loc 1 458 0 - ARM GAS /tmp/ccJCJaQH.s page 32 - - - 927 001c FFF7FEFF bl HAL_GetTick - 928 .LVL56: - 929 0020 401B subs r0, r0, r5 - 930 0022 FA23 movs r3, #250 - 931 0024 9B00 lsls r3, r3, #2 - 932 0026 9842 cmp r0, r3 - 933 0028 F4D9 bls .L84 - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 934 .loc 1 461 0 - 935 002a E36B ldr r3, [r4, #60] - 936 002c 2022 movs r2, #32 - 937 002e 1343 orrs r3, r2 - 938 0030 E363 str r3, [r4, #60] - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 939 .loc 1 464 0 - 940 0032 2423 movs r3, #36 - 941 0034 0022 movs r2, #0 - 942 0036 E254 strb r2, [r4, r3] - 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 943 .loc 1 467 0 - 944 0038 0133 adds r3, r3, #1 - 945 003a 0332 adds r2, r2, #3 - 946 003c E254 strb r2, [r4, r3] - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 947 .loc 1 469 0 - 948 003e 0320 movs r0, #3 - 949 0040 06E0 b .L85 - 950 .L87: - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 951 .loc 1 473 0 - 952 0042 2423 movs r3, #36 - 953 0044 0022 movs r2, #0 - 954 0046 E254 strb r2, [r4, r3] - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 955 .loc 1 476 0 - 956 0048 0133 adds r3, r3, #1 - 957 004a 0132 adds r2, r2, #1 - 958 004c E254 strb r2, [r4, r3] - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 959 .loc 1 478 0 - 960 004e 0020 movs r0, #0 - 961 .L85: - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 962 .loc 1 479 0 - 963 @ sp needed - 964 .LVL57: - 965 .LVL58: - 966 0050 70BD pop {r4, r5, r6, pc} - 967 .cfi_endproc - 968 .LFE43: - 970 .section .text.HAL_DMA_Abort_IT,"ax",%progbits - 971 .align 1 - 972 .global HAL_DMA_Abort_IT - 973 .syntax unified - 974 .code 16 - 975 .thumb_func - 976 .fpu softvfp - ARM GAS /tmp/ccJCJaQH.s page 33 - - - 978 HAL_DMA_Abort_IT: - 979 .LFB44: - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; - 980 .loc 1 488 0 - 981 .cfi_startproc - 982 @ args = 0, pretend = 0, frame = 0 - 983 @ frame_needed = 0, uses_anonymous_args = 0 - 984 .LVL59: - 985 0000 10B5 push {r4, lr} - 986 .LCFI5: - 987 .cfi_def_cfa_offset 8 - 988 .cfi_offset 4, -8 - 989 .cfi_offset 14, -4 - 990 .LVL60: - 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 991 .loc 1 491 0 - 992 0002 2523 movs r3, #37 - 993 0004 C35C ldrb r3, [r0, r3] - 994 0006 022B cmp r3, #2 - 995 0008 03D0 beq .L89 - 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 996 .loc 1 494 0 - 997 000a 0423 movs r3, #4 - 998 000c C363 str r3, [r0, #60] - 999 .LVL61: - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1000 .loc 1 496 0 - 1001 000e 0120 movs r0, #1 - 1002 .LVL62: - 1003 .L90: - 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1004 .loc 1 522 0 - 1005 @ sp needed - 1006 0010 10BD pop {r4, pc} - 1007 .LVL63: - 1008 .L89: - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1009 .loc 1 501 0 - 1010 0012 0268 ldr r2, [r0] - 1011 0014 1368 ldr r3, [r2] - 1012 0016 0E21 movs r1, #14 - 1013 0018 8B43 bics r3, r1 - 1014 001a 1360 str r3, [r2] - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1015 .loc 1 504 0 - 1016 001c 0268 ldr r2, [r0] - 1017 001e 1368 ldr r3, [r2] - 1018 0020 0D39 subs r1, r1, #13 - 1019 0022 8B43 bics r3, r1 - 1020 0024 1360 str r3, [r2] - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1021 .loc 1 507 0 - 1022 0026 0368 ldr r3, [r0] - 1023 0028 194A ldr r2, .L100 - 1024 002a 9342 cmp r3, r2 - 1025 002c 14D0 beq .L92 - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - ARM GAS /tmp/ccJCJaQH.s page 34 - - - 1026 .loc 1 507 0 is_stmt 0 discriminator 1 - 1027 002e 194A ldr r2, .L100+4 - 1028 0030 9342 cmp r3, r2 - 1029 0032 20D0 beq .L93 - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1030 .loc 1 507 0 discriminator 3 - 1031 0034 184A ldr r2, .L100+8 - 1032 0036 9342 cmp r3, r2 - 1033 0038 1FD0 beq .L94 - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1034 .loc 1 507 0 discriminator 5 - 1035 003a 184A ldr r2, .L100+12 - 1036 003c 9342 cmp r3, r2 - 1037 003e 1FD0 beq .L95 - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1038 .loc 1 507 0 discriminator 7 - 1039 0040 174A ldr r2, .L100+16 - 1040 0042 9342 cmp r3, r2 - 1041 0044 1FD0 beq .L96 - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1042 .loc 1 507 0 discriminator 9 - 1043 0046 174A ldr r2, .L100+20 - 1044 0048 9342 cmp r3, r2 - 1045 004a 02D0 beq .L99 - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1046 .loc 1 507 0 - 1047 004c 8022 movs r2, #128 - 1048 004e 5204 lsls r2, r2, #17 - 1049 0050 03E0 b .L91 - 1050 .L99: - 1051 0052 8022 movs r2, #128 - 1052 0054 5203 lsls r2, r2, #13 - 1053 0056 00E0 b .L91 - 1054 .L92: - 1055 0058 0122 movs r2, #1 - 1056 .L91: - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1057 .loc 1 507 0 discriminator 24 - 1058 005a 134B ldr r3, .L100+24 - 1059 005c 5A60 str r2, [r3, #4] - 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1060 .loc 1 510 0 is_stmt 1 discriminator 24 - 1061 005e 2523 movs r3, #37 - 1062 0060 0122 movs r2, #1 - 1063 0062 C254 strb r2, [r0, r3] - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1064 .loc 1 513 0 discriminator 24 - 1065 0064 013B subs r3, r3, #1 - 1066 0066 0022 movs r2, #0 - 1067 0068 C254 strb r2, [r0, r3] - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1068 .loc 1 516 0 discriminator 24 - 1069 006a 836B ldr r3, [r0, #56] - 1070 006c 002B cmp r3, #0 - 1071 006e 0DD0 beq .L98 - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1072 .loc 1 518 0 - ARM GAS /tmp/ccJCJaQH.s page 35 - - - 1073 0070 9847 blx r3 - 1074 .LVL64: - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1075 .loc 1 489 0 - 1076 0072 0020 movs r0, #0 - 1077 0074 CCE7 b .L90 - 1078 .LVL65: - 1079 .L93: - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1080 .loc 1 507 0 - 1081 0076 1022 movs r2, #16 - 1082 0078 EFE7 b .L91 - 1083 .L94: - 1084 007a 8022 movs r2, #128 - 1085 007c 5200 lsls r2, r2, #1 - 1086 007e ECE7 b .L91 - 1087 .L95: - 1088 0080 8022 movs r2, #128 - 1089 0082 5201 lsls r2, r2, #5 - 1090 0084 E9E7 b .L91 - 1091 .L96: - 1092 0086 8022 movs r2, #128 - 1093 0088 5202 lsls r2, r2, #9 - 1094 008a E6E7 b .L91 - 1095 .L98: - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1096 .loc 1 489 0 - 1097 008c 0020 movs r0, #0 - 1098 .LVL66: - 1099 008e BFE7 b .L90 - 1100 .L101: - 1101 .align 2 - 1102 .L100: - 1103 0090 08000240 .word 1073872904 - 1104 0094 1C000240 .word 1073872924 - 1105 0098 30000240 .word 1073872944 - 1106 009c 44000240 .word 1073872964 - 1107 00a0 58000240 .word 1073872984 - 1108 00a4 6C000240 .word 1073873004 - 1109 00a8 00000240 .word 1073872896 - 1110 .cfi_endproc - 1111 .LFE44: - 1113 .section .text.HAL_DMA_PollForTransfer,"ax",%progbits - 1114 .align 1 - 1115 .global HAL_DMA_PollForTransfer - 1116 .syntax unified - 1117 .code 16 - 1118 .thumb_func - 1119 .fpu softvfp - 1121 HAL_DMA_PollForTransfer: - 1122 .LFB45: - 533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** uint32_t temp; - 1123 .loc 1 533 0 - 1124 .cfi_startproc - 1125 @ args = 0, pretend = 0, frame = 8 - 1126 @ frame_needed = 0, uses_anonymous_args = 0 - 1127 .LVL67: - ARM GAS /tmp/ccJCJaQH.s page 36 - - - 1128 0000 F0B5 push {r4, r5, r6, r7, lr} - 1129 .LCFI6: - 1130 .cfi_def_cfa_offset 20 - 1131 .cfi_offset 4, -20 - 1132 .cfi_offset 5, -16 - 1133 .cfi_offset 6, -12 - 1134 .cfi_offset 7, -8 - 1135 .cfi_offset 14, -4 - 1136 0002 83B0 sub sp, sp, #12 - 1137 .LCFI7: - 1138 .cfi_def_cfa_offset 32 - 1139 0004 0500 movs r5, r0 - 1140 0006 0C00 movs r4, r1 - 1141 0008 1700 movs r7, r2 - 1142 .LVL68: - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1143 .loc 1 538 0 - 1144 000a 0029 cmp r1, #0 - 1145 000c 18D1 bne .L103 - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1146 .loc 1 541 0 - 1147 000e 0368 ldr r3, [r0] - 1148 0010 7F4A ldr r2, .L153 - 1149 .LVL69: - 1150 0012 9342 cmp r3, r2 - 1151 0014 2DD0 beq .L115 - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1152 .loc 1 541 0 is_stmt 0 discriminator 1 - 1153 0016 7F4A ldr r2, .L153+4 - 1154 0018 9342 cmp r3, r2 - 1155 001a 2FD0 beq .L116 - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1156 .loc 1 541 0 discriminator 3 - 1157 001c 7E4A ldr r2, .L153+8 - 1158 001e 9342 cmp r3, r2 - 1159 0020 2ED0 beq .L117 - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1160 .loc 1 541 0 discriminator 5 - 1161 0022 7E4A ldr r2, .L153+12 - 1162 0024 9342 cmp r3, r2 - 1163 0026 2ED0 beq .L118 - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1164 .loc 1 541 0 discriminator 7 - 1165 0028 7D4A ldr r2, .L153+16 - 1166 002a 9342 cmp r3, r2 - 1167 002c 2ED0 beq .L119 - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1168 .loc 1 541 0 discriminator 9 - 1169 002e 7D4A ldr r2, .L153+20 - 1170 0030 9342 cmp r3, r2 - 1171 0032 02D0 beq .L145 - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1172 .loc 1 541 0 - 1173 0034 8026 movs r6, #128 - 1174 0036 B604 lsls r6, r6, #18 - 1175 0038 1CE0 b .L104 - 1176 .L145: - ARM GAS /tmp/ccJCJaQH.s page 37 - - - 1177 003a 8026 movs r6, #128 - 1178 003c B603 lsls r6, r6, #14 - 1179 003e 19E0 b .L104 - 1180 .LVL70: - 1181 .L103: - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1182 .loc 1 546 0 is_stmt 1 - 1183 0040 0368 ldr r3, [r0] - 1184 0042 734A ldr r2, .L153 - 1185 .LVL71: - 1186 0044 9342 cmp r3, r2 - 1187 0046 24D0 beq .L121 - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1188 .loc 1 546 0 is_stmt 0 discriminator 1 - 1189 0048 724A ldr r2, .L153+4 - 1190 004a 9342 cmp r3, r2 - 1191 004c 23D0 beq .L122 - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1192 .loc 1 546 0 discriminator 3 - 1193 004e 724A ldr r2, .L153+8 - 1194 0050 9342 cmp r3, r2 - 1195 0052 22D0 beq .L123 - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1196 .loc 1 546 0 discriminator 5 - 1197 0054 714A ldr r2, .L153+12 - 1198 0056 9342 cmp r3, r2 - 1199 0058 22D0 beq .L124 - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1200 .loc 1 546 0 discriminator 7 - 1201 005a 714A ldr r2, .L153+16 - 1202 005c 9342 cmp r3, r2 - 1203 005e 22D0 beq .L125 - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1204 .loc 1 546 0 discriminator 9 - 1205 0060 704A ldr r2, .L153+20 - 1206 0062 9342 cmp r3, r2 - 1207 0064 02D0 beq .L146 - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1208 .loc 1 546 0 - 1209 0066 8026 movs r6, #128 - 1210 0068 F604 lsls r6, r6, #19 - 1211 006a 03E0 b .L104 - 1212 .L146: - 1213 006c 8026 movs r6, #128 - 1214 006e F603 lsls r6, r6, #15 - 1215 0070 00E0 b .L104 - 1216 .L115: - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1217 .loc 1 541 0 is_stmt 1 - 1218 0072 0226 movs r6, #2 - 1219 .L104: - 1220 .LVL72: - 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1221 .loc 1 550 0 - 1222 0074 FFF7FEFF bl HAL_GetTick - 1223 .LVL73: - 1224 0078 0190 str r0, [sp, #4] - ARM GAS /tmp/ccJCJaQH.s page 38 - - - 1225 .LVL74: - 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1226 .loc 1 552 0 - 1227 007a 1FE0 b .L109 - 1228 .LVL75: - 1229 .L116: - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1230 .loc 1 541 0 - 1231 007c 2026 movs r6, #32 - 1232 007e F9E7 b .L104 - 1233 .L117: - 1234 0080 8026 movs r6, #128 - 1235 0082 B600 lsls r6, r6, #2 - 1236 0084 F6E7 b .L104 - 1237 .L118: - 1238 0086 8026 movs r6, #128 - 1239 0088 B601 lsls r6, r6, #6 - 1240 008a F3E7 b .L104 - 1241 .L119: - 1242 008c 8026 movs r6, #128 - 1243 008e B602 lsls r6, r6, #10 - 1244 0090 F0E7 b .L104 - 1245 .L121: - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1246 .loc 1 546 0 - 1247 0092 0426 movs r6, #4 - 1248 0094 EEE7 b .L104 - 1249 .L122: - 1250 0096 4026 movs r6, #64 - 1251 0098 ECE7 b .L104 - 1252 .L123: - 1253 009a 8026 movs r6, #128 - 1254 009c F600 lsls r6, r6, #3 - 1255 009e E9E7 b .L104 - 1256 .L124: - 1257 00a0 8026 movs r6, #128 - 1258 00a2 F601 lsls r6, r6, #7 - 1259 00a4 E6E7 b .L104 - 1260 .L125: - 1261 00a6 8026 movs r6, #128 - 1262 00a8 F602 lsls r6, r6, #11 - 1263 00aa E3E7 b .L104 - 1264 .LVL76: - 1265 .L150: - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1266 .loc 1 554 0 - 1267 00ac 8023 movs r3, #128 - 1268 00ae 1B04 lsls r3, r3, #16 - 1269 00b0 00E0 b .L106 - 1270 .L127: - 1271 00b2 0823 movs r3, #8 - 1272 .L106: - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1273 .loc 1 554 0 is_stmt 0 discriminator 24 - 1274 00b4 1342 tst r3, r2 - 1275 00b6 28D1 bne .L147 - 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - ARM GAS /tmp/ccJCJaQH.s page 39 - - - 1276 .loc 1 571 0 is_stmt 1 - 1277 00b8 7B1C adds r3, r7, #1 - 1278 00ba 35D1 bne .L148 - 1279 .L109: - 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1280 .loc 1 552 0 - 1281 00bc 5A4B ldr r3, .L153+24 - 1282 00be 1B68 ldr r3, [r3] - 1283 00c0 1E42 tst r6, r3 - 1284 00c2 45D1 bne .L149 - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1285 .loc 1 554 0 - 1286 00c4 584B ldr r3, .L153+24 - 1287 00c6 1A68 ldr r2, [r3] - 1288 00c8 2B68 ldr r3, [r5] - 1289 00ca 5149 ldr r1, .L153 - 1290 00cc 8B42 cmp r3, r1 - 1291 00ce F0D0 beq .L127 - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1292 .loc 1 554 0 is_stmt 0 discriminator 1 - 1293 00d0 5049 ldr r1, .L153+4 - 1294 00d2 8B42 cmp r3, r1 - 1295 00d4 0ED0 beq .L128 - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1296 .loc 1 554 0 discriminator 3 - 1297 00d6 5049 ldr r1, .L153+8 - 1298 00d8 8B42 cmp r3, r1 - 1299 00da 0DD0 beq .L129 - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1300 .loc 1 554 0 discriminator 5 - 1301 00dc 4F49 ldr r1, .L153+12 - 1302 00de 8B42 cmp r3, r1 - 1303 00e0 0DD0 beq .L130 - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1304 .loc 1 554 0 discriminator 7 - 1305 00e2 4F49 ldr r1, .L153+16 - 1306 00e4 8B42 cmp r3, r1 - 1307 00e6 0DD0 beq .L131 - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1308 .loc 1 554 0 discriminator 9 - 1309 00e8 4E49 ldr r1, .L153+20 - 1310 00ea 8B42 cmp r3, r1 - 1311 00ec DED0 beq .L150 - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1312 .loc 1 554 0 - 1313 00ee 8023 movs r3, #128 - 1314 00f0 1B05 lsls r3, r3, #20 - 1315 00f2 DFE7 b .L106 - 1316 .L128: - 1317 00f4 8023 movs r3, #128 - 1318 00f6 DDE7 b .L106 - 1319 .L129: - 1320 00f8 8023 movs r3, #128 - 1321 00fa 1B01 lsls r3, r3, #4 - 1322 00fc DAE7 b .L106 - 1323 .L130: - 1324 00fe 8023 movs r3, #128 - ARM GAS /tmp/ccJCJaQH.s page 40 - - - 1325 0100 1B02 lsls r3, r3, #8 - 1326 0102 D7E7 b .L106 - 1327 .L131: - 1328 0104 8023 movs r3, #128 - 1329 0106 1B03 lsls r3, r3, #12 - 1330 0108 D4E7 b .L106 - 1331 .L147: - 557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1332 .loc 1 557 0 is_stmt 1 discriminator 24 - 1333 010a 474A ldr r2, .L153+24 - 1334 010c 5360 str r3, [r2, #4] - 1335 .LVL77: - 560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1336 .loc 1 560 0 discriminator 24 - 1337 010e EB6B ldr r3, [r5, #60] - 1338 0110 0122 movs r2, #1 - 1339 0112 1343 orrs r3, r2 - 1340 0114 EB63 str r3, [r5, #60] - 563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1341 .loc 1 563 0 discriminator 24 - 1342 0116 2523 movs r3, #37 - 1343 0118 0332 adds r2, r2, #3 - 1344 011a EA54 strb r2, [r5, r3] - 566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1345 .loc 1 566 0 discriminator 24 - 1346 011c 013B subs r3, r3, #1 - 1347 011e 0022 movs r2, #0 - 1348 0120 EA54 strb r2, [r5, r3] - 568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1349 .loc 1 568 0 discriminator 24 - 1350 0122 0120 movs r0, #1 - 1351 .L108: - 615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /** - 1352 .loc 1 615 0 - 1353 0124 03B0 add sp, sp, #12 - 1354 @ sp needed - 1355 .LVL78: - 1356 .LVL79: - 1357 .LVL80: - 1358 .LVL81: - 1359 0126 F0BD pop {r4, r5, r6, r7, pc} - 1360 .LVL82: - 1361 .L148: - 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1362 .loc 1 573 0 - 1363 0128 002F cmp r7, #0 - 1364 012a 05D0 beq .L110 - 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1365 .loc 1 573 0 is_stmt 0 discriminator 1 - 1366 012c FFF7FEFF bl HAL_GetTick - 1367 .LVL83: - 1368 0130 019B ldr r3, [sp, #4] - 1369 0132 C01A subs r0, r0, r3 - 1370 0134 B842 cmp r0, r7 - 1371 0136 C1D9 bls .L109 - 1372 .L110: - 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - ARM GAS /tmp/ccJCJaQH.s page 41 - - - 1373 .loc 1 576 0 is_stmt 1 - 1374 0138 EB6B ldr r3, [r5, #60] - 1375 013a 2022 movs r2, #32 - 1376 013c 1343 orrs r3, r2 - 1377 013e EB63 str r3, [r5, #60] - 579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1378 .loc 1 579 0 - 1379 0140 2523 movs r3, #37 - 1380 0142 1D3A subs r2, r2, #29 - 1381 0144 EA54 strb r2, [r5, r3] - 582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1382 .loc 1 582 0 - 1383 0146 013B subs r3, r3, #1 - 1384 0148 0022 movs r2, #0 - 1385 014a EA54 strb r2, [r5, r3] - 584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1386 .loc 1 584 0 - 1387 014c 0320 movs r0, #3 - 1388 014e E9E7 b .L108 - 1389 .L149: - 589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1390 .loc 1 589 0 - 1391 0150 002C cmp r4, #0 - 1392 0152 2ED1 bne .L112 - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1393 .loc 1 592 0 - 1394 0154 2B68 ldr r3, [r5] - 1395 0156 2E4A ldr r2, .L153 - 1396 0158 9342 cmp r3, r2 - 1397 015a 14D0 beq .L133 - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1398 .loc 1 592 0 is_stmt 0 discriminator 1 - 1399 015c 2D4A ldr r2, .L153+4 - 1400 015e 9342 cmp r3, r2 - 1401 0160 1CD0 beq .L134 - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1402 .loc 1 592 0 discriminator 3 - 1403 0162 2D4A ldr r2, .L153+8 - 1404 0164 9342 cmp r3, r2 - 1405 0166 1BD0 beq .L135 - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1406 .loc 1 592 0 discriminator 5 - 1407 0168 2C4A ldr r2, .L153+12 - 1408 016a 9342 cmp r3, r2 - 1409 016c 1BD0 beq .L136 - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1410 .loc 1 592 0 discriminator 7 - 1411 016e 2C4A ldr r2, .L153+16 - 1412 0170 9342 cmp r3, r2 - 1413 0172 1BD0 beq .L137 - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1414 .loc 1 592 0 discriminator 9 - 1415 0174 2B4A ldr r2, .L153+20 - 1416 0176 9342 cmp r3, r2 - 1417 0178 02D0 beq .L151 - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1418 .loc 1 592 0 - ARM GAS /tmp/ccJCJaQH.s page 42 - - - 1419 017a 8022 movs r2, #128 - 1420 017c 9204 lsls r2, r2, #18 - 1421 017e 03E0 b .L113 - 1422 .L151: - 1423 0180 8022 movs r2, #128 - 1424 0182 9203 lsls r2, r2, #14 - 1425 0184 00E0 b .L113 - 1426 .L133: - 1427 0186 0222 movs r2, #2 - 1428 .L113: - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1429 .loc 1 592 0 discriminator 24 - 1430 0188 274B ldr r3, .L153+24 - 1431 018a 5A60 str r2, [r3, #4] - 1432 .LVL84: - 596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1433 .loc 1 596 0 is_stmt 1 discriminator 24 - 1434 018c 2523 movs r3, #37 - 1435 018e 0122 movs r2, #1 - 1436 0190 EA54 strb r2, [r5, r3] - 599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1437 .loc 1 599 0 discriminator 24 - 1438 0192 013B subs r3, r3, #1 - 1439 0194 0022 movs r2, #0 - 1440 0196 EA54 strb r2, [r5, r3] - 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1441 .loc 1 614 0 discriminator 24 - 1442 0198 0020 movs r0, #0 - 1443 019a C3E7 b .L108 - 1444 .LVL85: - 1445 .L134: - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1446 .loc 1 592 0 - 1447 019c 2022 movs r2, #32 - 1448 019e F3E7 b .L113 - 1449 .L135: - 1450 01a0 8022 movs r2, #128 - 1451 01a2 9200 lsls r2, r2, #2 - 1452 01a4 F0E7 b .L113 - 1453 .L136: - 1454 01a6 8022 movs r2, #128 - 1455 01a8 9201 lsls r2, r2, #6 - 1456 01aa EDE7 b .L113 - 1457 .L137: - 1458 01ac 8022 movs r2, #128 - 1459 01ae 9202 lsls r2, r2, #10 - 1460 01b0 EAE7 b .L113 - 1461 .L112: - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1462 .loc 1 604 0 - 1463 01b2 2B68 ldr r3, [r5] - 1464 01b4 164A ldr r2, .L153 - 1465 01b6 9342 cmp r3, r2 - 1466 01b8 14D0 beq .L139 - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1467 .loc 1 604 0 is_stmt 0 discriminator 1 - 1468 01ba 164A ldr r2, .L153+4 - ARM GAS /tmp/ccJCJaQH.s page 43 - - - 1469 01bc 9342 cmp r3, r2 - 1470 01be 1CD0 beq .L140 - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1471 .loc 1 604 0 discriminator 3 - 1472 01c0 154A ldr r2, .L153+8 - 1473 01c2 9342 cmp r3, r2 - 1474 01c4 1BD0 beq .L141 - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1475 .loc 1 604 0 discriminator 5 - 1476 01c6 154A ldr r2, .L153+12 - 1477 01c8 9342 cmp r3, r2 - 1478 01ca 1BD0 beq .L142 - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1479 .loc 1 604 0 discriminator 7 - 1480 01cc 144A ldr r2, .L153+16 - 1481 01ce 9342 cmp r3, r2 - 1482 01d0 1BD0 beq .L143 - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1483 .loc 1 604 0 discriminator 9 - 1484 01d2 144A ldr r2, .L153+20 - 1485 01d4 9342 cmp r3, r2 - 1486 01d6 02D0 beq .L152 - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1487 .loc 1 604 0 - 1488 01d8 8022 movs r2, #128 - 1489 01da D204 lsls r2, r2, #19 - 1490 01dc 03E0 b .L114 - 1491 .L152: - 1492 01de 8022 movs r2, #128 - 1493 01e0 D203 lsls r2, r2, #15 - 1494 01e2 00E0 b .L114 - 1495 .L139: - 1496 01e4 0422 movs r2, #4 - 1497 .L114: - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1498 .loc 1 604 0 discriminator 24 - 1499 01e6 104B ldr r3, .L153+24 - 1500 01e8 5A60 str r2, [r3, #4] - 1501 .LVL86: - 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1502 .loc 1 608 0 is_stmt 1 discriminator 24 - 1503 01ea 2523 movs r3, #37 - 1504 01ec 0522 movs r2, #5 - 1505 01ee EA54 strb r2, [r5, r3] - 611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1506 .loc 1 611 0 discriminator 24 - 1507 01f0 013B subs r3, r3, #1 - 1508 01f2 0022 movs r2, #0 - 1509 01f4 EA54 strb r2, [r5, r3] - 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1510 .loc 1 614 0 discriminator 24 - 1511 01f6 0020 movs r0, #0 - 1512 01f8 94E7 b .L108 - 1513 .LVL87: - 1514 .L140: - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1515 .loc 1 604 0 - ARM GAS /tmp/ccJCJaQH.s page 44 - - - 1516 01fa 4022 movs r2, #64 - 1517 01fc F3E7 b .L114 - 1518 .L141: - 1519 01fe 8022 movs r2, #128 - 1520 0200 D200 lsls r2, r2, #3 - 1521 0202 F0E7 b .L114 - 1522 .L142: - 1523 0204 8022 movs r2, #128 - 1524 0206 D201 lsls r2, r2, #7 - 1525 0208 EDE7 b .L114 - 1526 .L143: - 1527 020a 8022 movs r2, #128 - 1528 020c D202 lsls r2, r2, #11 - 1529 020e EAE7 b .L114 - 1530 .L154: - 1531 .align 2 - 1532 .L153: - 1533 0210 08000240 .word 1073872904 - 1534 0214 1C000240 .word 1073872924 - 1535 0218 30000240 .word 1073872944 - 1536 021c 44000240 .word 1073872964 - 1537 0220 58000240 .word 1073872984 - 1538 0224 6C000240 .word 1073873004 - 1539 0228 00000240 .word 1073872896 - 1540 .cfi_endproc - 1541 .LFE45: - 1543 .section .text.HAL_DMA_IRQHandler,"ax",%progbits - 1544 .align 1 - 1545 .global HAL_DMA_IRQHandler - 1546 .syntax unified - 1547 .code 16 - 1548 .thumb_func - 1549 .fpu softvfp - 1551 HAL_DMA_IRQHandler: - 1552 .LFB46: - 623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** /* Transfer Error Interrupt management ***************************************/ - 1553 .loc 1 623 0 - 1554 .cfi_startproc - 1555 @ args = 0, pretend = 0, frame = 0 - 1556 @ frame_needed = 0, uses_anonymous_args = 0 - 1557 .LVL88: - 1558 0000 10B5 push {r4, lr} - 1559 .LCFI8: - 1560 .cfi_def_cfa_offset 8 - 1561 .cfi_offset 4, -8 - 1562 .cfi_offset 14, -4 - 1563 0002 0400 movs r4, r0 - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1564 .loc 1 625 0 - 1565 0004 974B ldr r3, .L209 - 1566 0006 1A68 ldr r2, [r3] - 1567 0008 0368 ldr r3, [r0] - 1568 000a 9749 ldr r1, .L209+4 - 1569 000c 8B42 cmp r3, r1 - 1570 000e 14D0 beq .L167 - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1571 .loc 1 625 0 is_stmt 0 discriminator 1 - ARM GAS /tmp/ccJCJaQH.s page 45 - - - 1572 0010 9649 ldr r1, .L209+8 - 1573 0012 8B42 cmp r3, r1 - 1574 0014 31D0 beq .L168 - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1575 .loc 1 625 0 discriminator 3 - 1576 0016 9649 ldr r1, .L209+12 - 1577 0018 8B42 cmp r3, r1 - 1578 001a 30D0 beq .L169 - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1579 .loc 1 625 0 discriminator 5 - 1580 001c 9549 ldr r1, .L209+16 - 1581 001e 8B42 cmp r3, r1 - 1582 0020 30D0 beq .L170 - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1583 .loc 1 625 0 discriminator 7 - 1584 0022 9549 ldr r1, .L209+20 - 1585 0024 8B42 cmp r3, r1 - 1586 0026 30D0 beq .L171 - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1587 .loc 1 625 0 discriminator 9 - 1588 0028 9449 ldr r1, .L209+24 - 1589 002a 8B42 cmp r3, r1 - 1590 002c 02D0 beq .L203 - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1591 .loc 1 625 0 - 1592 002e 8021 movs r1, #128 - 1593 0030 0905 lsls r1, r1, #20 - 1594 0032 03E0 b .L156 - 1595 .L203: - 1596 0034 8021 movs r1, #128 - 1597 0036 0904 lsls r1, r1, #16 - 1598 0038 00E0 b .L156 - 1599 .L167: - 1600 003a 0821 movs r1, #8 - 1601 .L156: - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1602 .loc 1 625 0 discriminator 24 - 1603 003c 1142 tst r1, r2 - 1604 003e 3CD0 beq .L157 - 627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1605 .loc 1 627 0 is_stmt 1 - 1606 0040 1A68 ldr r2, [r3] - 1607 0042 1207 lsls r2, r2, #28 - 1608 0044 39D5 bpl .L157 - 630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1609 .loc 1 630 0 - 1610 0046 1A68 ldr r2, [r3] - 1611 0048 0821 movs r1, #8 - 1612 004a 8A43 bics r2, r1 - 1613 004c 1A60 str r2, [r3] - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1614 .loc 1 633 0 - 1615 004e 2368 ldr r3, [r4] - 1616 0050 854A ldr r2, .L209+4 - 1617 0052 9342 cmp r3, r2 - 1618 0054 1FD0 beq .L173 - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - ARM GAS /tmp/ccJCJaQH.s page 46 - - - 1619 .loc 1 633 0 is_stmt 0 discriminator 1 - 1620 0056 854A ldr r2, .L209+8 - 1621 0058 9342 cmp r3, r2 - 1622 005a 46D0 beq .L174 - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1623 .loc 1 633 0 discriminator 3 - 1624 005c 844A ldr r2, .L209+12 - 1625 005e 9342 cmp r3, r2 - 1626 0060 45D0 beq .L175 - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1627 .loc 1 633 0 discriminator 5 - 1628 0062 844A ldr r2, .L209+16 - 1629 0064 9342 cmp r3, r2 - 1630 0066 45D0 beq .L176 - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1631 .loc 1 633 0 discriminator 7 - 1632 0068 834A ldr r2, .L209+20 - 1633 006a 9342 cmp r3, r2 - 1634 006c 45D0 beq .L177 - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1635 .loc 1 633 0 discriminator 9 - 1636 006e 834A ldr r2, .L209+24 - 1637 0070 9342 cmp r3, r2 - 1638 0072 0DD0 beq .L204 - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1639 .loc 1 633 0 - 1640 0074 8022 movs r2, #128 - 1641 0076 1205 lsls r2, r2, #20 - 1642 0078 0EE0 b .L158 - 1643 .L168: - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1644 .loc 1 625 0 is_stmt 1 - 1645 007a 8021 movs r1, #128 - 1646 007c DEE7 b .L156 - 1647 .L169: - 1648 007e 8021 movs r1, #128 - 1649 0080 0901 lsls r1, r1, #4 - 1650 0082 DBE7 b .L156 - 1651 .L170: - 1652 0084 8021 movs r1, #128 - 1653 0086 0902 lsls r1, r1, #8 - 1654 0088 D8E7 b .L156 - 1655 .L171: - 1656 008a 8021 movs r1, #128 - 1657 008c 0903 lsls r1, r1, #12 - 1658 008e D5E7 b .L156 - 1659 .L204: - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1660 .loc 1 633 0 - 1661 0090 8022 movs r2, #128 - 1662 0092 1204 lsls r2, r2, #16 - 1663 0094 00E0 b .L158 - 1664 .L173: - 1665 0096 0822 movs r2, #8 - 1666 .L158: - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1667 .loc 1 633 0 is_stmt 0 discriminator 24 - ARM GAS /tmp/ccJCJaQH.s page 47 - - - 1668 0098 724B ldr r3, .L209 - 1669 009a 5A60 str r2, [r3, #4] - 636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1670 .loc 1 636 0 is_stmt 1 discriminator 24 - 1671 009c E36B ldr r3, [r4, #60] - 1672 009e 0122 movs r2, #1 - 1673 00a0 1343 orrs r3, r2 - 1674 00a2 E363 str r3, [r4, #60] - 639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1675 .loc 1 639 0 discriminator 24 - 1676 00a4 2523 movs r3, #37 - 1677 00a6 0332 adds r2, r2, #3 - 1678 00a8 E254 strb r2, [r4, r3] - 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1679 .loc 1 642 0 discriminator 24 - 1680 00aa 013B subs r3, r3, #1 - 1681 00ac 0022 movs r2, #0 - 1682 00ae E254 strb r2, [r4, r3] - 644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1683 .loc 1 644 0 discriminator 24 - 1684 00b0 636B ldr r3, [r4, #52] - 1685 00b2 002B cmp r3, #0 - 1686 00b4 01D0 beq .L157 - 647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1687 .loc 1 647 0 - 1688 00b6 2000 movs r0, r4 - 1689 .LVL89: - 1690 00b8 9847 blx r3 - 1691 .LVL90: - 1692 .L157: - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1693 .loc 1 653 0 - 1694 00ba 6A4B ldr r3, .L209 - 1695 00bc 1A68 ldr r2, [r3] - 1696 00be 2368 ldr r3, [r4] - 1697 00c0 6949 ldr r1, .L209+4 - 1698 00c2 8B42 cmp r3, r1 - 1699 00c4 1FD0 beq .L179 - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1700 .loc 1 653 0 is_stmt 0 discriminator 1 - 1701 00c6 6949 ldr r1, .L209+8 - 1702 00c8 8B42 cmp r3, r1 - 1703 00ca 3FD0 beq .L180 - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1704 .loc 1 653 0 discriminator 3 - 1705 00cc 6849 ldr r1, .L209+12 - 1706 00ce 8B42 cmp r3, r1 - 1707 00d0 3ED0 beq .L181 - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1708 .loc 1 653 0 discriminator 5 - 1709 00d2 6849 ldr r1, .L209+16 - 1710 00d4 8B42 cmp r3, r1 - 1711 00d6 3ED0 beq .L182 - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1712 .loc 1 653 0 discriminator 7 - 1713 00d8 6749 ldr r1, .L209+20 - 1714 00da 8B42 cmp r3, r1 - ARM GAS /tmp/ccJCJaQH.s page 48 - - - 1715 00dc 3ED0 beq .L183 - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1716 .loc 1 653 0 discriminator 9 - 1717 00de 6749 ldr r1, .L209+24 - 1718 00e0 8B42 cmp r3, r1 - 1719 00e2 0DD0 beq .L205 - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1720 .loc 1 653 0 - 1721 00e4 8021 movs r1, #128 - 1722 00e6 C904 lsls r1, r1, #19 - 1723 00e8 0EE0 b .L159 - 1724 .LVL91: - 1725 .L174: - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1726 .loc 1 633 0 is_stmt 1 - 1727 00ea 8022 movs r2, #128 - 1728 00ec D4E7 b .L158 - 1729 .L175: - 1730 00ee 8022 movs r2, #128 - 1731 00f0 1201 lsls r2, r2, #4 - 1732 00f2 D1E7 b .L158 - 1733 .L176: - 1734 00f4 8022 movs r2, #128 - 1735 00f6 1202 lsls r2, r2, #8 - 1736 00f8 CEE7 b .L158 - 1737 .L177: - 1738 00fa 8022 movs r2, #128 - 1739 00fc 1203 lsls r2, r2, #12 - 1740 00fe CBE7 b .L158 - 1741 .LVL92: - 1742 .L205: - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1743 .loc 1 653 0 - 1744 0100 8021 movs r1, #128 - 1745 0102 C903 lsls r1, r1, #15 - 1746 0104 00E0 b .L159 - 1747 .L179: - 1748 0106 0421 movs r1, #4 - 1749 .L159: - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1750 .loc 1 653 0 is_stmt 0 discriminator 24 - 1751 0108 1142 tst r1, r2 - 1752 010a 38D0 beq .L160 - 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1753 .loc 1 655 0 is_stmt 1 - 1754 010c 1A68 ldr r2, [r3] - 1755 010e 5207 lsls r2, r2, #29 - 1756 0110 35D5 bpl .L160 - 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1757 .loc 1 658 0 - 1758 0112 1A68 ldr r2, [r3] - 1759 0114 9206 lsls r2, r2, #26 - 1760 0116 03D4 bmi .L161 - 661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1761 .loc 1 661 0 - 1762 0118 1A68 ldr r2, [r3] - 1763 011a 0421 movs r1, #4 - ARM GAS /tmp/ccJCJaQH.s page 49 - - - 1764 011c 8A43 bics r2, r1 - 1765 011e 1A60 str r2, [r3] - 1766 .L161: - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1767 .loc 1 664 0 - 1768 0120 2368 ldr r3, [r4] - 1769 0122 514A ldr r2, .L209+4 - 1770 0124 9342 cmp r3, r2 - 1771 0126 1FD0 beq .L185 - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1772 .loc 1 664 0 is_stmt 0 discriminator 1 - 1773 0128 504A ldr r2, .L209+8 - 1774 012a 9342 cmp r3, r2 - 1775 012c 3FD0 beq .L186 - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1776 .loc 1 664 0 discriminator 3 - 1777 012e 504A ldr r2, .L209+12 - 1778 0130 9342 cmp r3, r2 - 1779 0132 3ED0 beq .L187 - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1780 .loc 1 664 0 discriminator 5 - 1781 0134 4F4A ldr r2, .L209+16 - 1782 0136 9342 cmp r3, r2 - 1783 0138 3ED0 beq .L188 - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1784 .loc 1 664 0 discriminator 7 - 1785 013a 4F4A ldr r2, .L209+20 - 1786 013c 9342 cmp r3, r2 - 1787 013e 3ED0 beq .L189 - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1788 .loc 1 664 0 discriminator 9 - 1789 0140 4E4A ldr r2, .L209+24 - 1790 0142 9342 cmp r3, r2 - 1791 0144 0DD0 beq .L206 - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1792 .loc 1 664 0 - 1793 0146 8022 movs r2, #128 - 1794 0148 D204 lsls r2, r2, #19 - 1795 014a 0EE0 b .L162 - 1796 .L180: - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1797 .loc 1 653 0 is_stmt 1 - 1798 014c 4021 movs r1, #64 - 1799 014e DBE7 b .L159 - 1800 .L181: - 1801 0150 8021 movs r1, #128 - 1802 0152 C900 lsls r1, r1, #3 - 1803 0154 D8E7 b .L159 - 1804 .L182: - 1805 0156 8021 movs r1, #128 - 1806 0158 C901 lsls r1, r1, #7 - 1807 015a D5E7 b .L159 - 1808 .L183: - 1809 015c 8021 movs r1, #128 - 1810 015e C902 lsls r1, r1, #11 - 1811 0160 D2E7 b .L159 - 1812 .L206: - ARM GAS /tmp/ccJCJaQH.s page 50 - - - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1813 .loc 1 664 0 - 1814 0162 8022 movs r2, #128 - 1815 0164 D203 lsls r2, r2, #15 - 1816 0166 00E0 b .L162 - 1817 .L185: - 1818 0168 0422 movs r2, #4 - 1819 .L162: - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1820 .loc 1 664 0 is_stmt 0 discriminator 24 - 1821 016a 3E4B ldr r3, .L209 - 1822 016c 5A60 str r2, [r3, #4] - 667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1823 .loc 1 667 0 is_stmt 1 discriminator 24 - 1824 016e 2523 movs r3, #37 - 1825 0170 0522 movs r2, #5 - 1826 0172 E254 strb r2, [r4, r3] - 669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1827 .loc 1 669 0 discriminator 24 - 1828 0174 236B ldr r3, [r4, #48] - 1829 0176 002B cmp r3, #0 - 1830 0178 01D0 beq .L160 - 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1831 .loc 1 672 0 - 1832 017a 2000 movs r0, r4 - 1833 017c 9847 blx r3 - 1834 .LVL93: - 1835 .L160: - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1836 .loc 1 678 0 - 1837 017e 394B ldr r3, .L209 - 1838 0180 1A68 ldr r2, [r3] - 1839 0182 2368 ldr r3, [r4] - 1840 0184 3849 ldr r1, .L209+4 - 1841 0186 8B42 cmp r3, r1 - 1842 0188 1FD0 beq .L191 - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1843 .loc 1 678 0 is_stmt 0 discriminator 1 - 1844 018a 3849 ldr r1, .L209+8 - 1845 018c 8B42 cmp r3, r1 - 1846 018e 3FD0 beq .L192 - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1847 .loc 1 678 0 discriminator 3 - 1848 0190 3749 ldr r1, .L209+12 - 1849 0192 8B42 cmp r3, r1 - 1850 0194 3ED0 beq .L193 - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1851 .loc 1 678 0 discriminator 5 - 1852 0196 3749 ldr r1, .L209+16 - 1853 0198 8B42 cmp r3, r1 - 1854 019a 3ED0 beq .L194 - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1855 .loc 1 678 0 discriminator 7 - 1856 019c 3649 ldr r1, .L209+20 - 1857 019e 8B42 cmp r3, r1 - 1858 01a0 3ED0 beq .L195 - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - ARM GAS /tmp/ccJCJaQH.s page 51 - - - 1859 .loc 1 678 0 discriminator 9 - 1860 01a2 3649 ldr r1, .L209+24 - 1861 01a4 8B42 cmp r3, r1 - 1862 01a6 0DD0 beq .L207 - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1863 .loc 1 678 0 - 1864 01a8 8021 movs r1, #128 - 1865 01aa 8904 lsls r1, r1, #18 - 1866 01ac 0EE0 b .L163 - 1867 .L186: - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1868 .loc 1 664 0 is_stmt 1 - 1869 01ae 4022 movs r2, #64 - 1870 01b0 DBE7 b .L162 - 1871 .L187: - 1872 01b2 8022 movs r2, #128 - 1873 01b4 D200 lsls r2, r2, #3 - 1874 01b6 D8E7 b .L162 - 1875 .L188: - 1876 01b8 8022 movs r2, #128 - 1877 01ba D201 lsls r2, r2, #7 - 1878 01bc D5E7 b .L162 - 1879 .L189: - 1880 01be 8022 movs r2, #128 - 1881 01c0 D202 lsls r2, r2, #11 - 1882 01c2 D2E7 b .L162 - 1883 .L207: - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1884 .loc 1 678 0 - 1885 01c4 8021 movs r1, #128 - 1886 01c6 8903 lsls r1, r1, #14 - 1887 01c8 00E0 b .L163 - 1888 .L191: - 1889 01ca 0221 movs r1, #2 - 1890 .L163: - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1891 .loc 1 678 0 is_stmt 0 discriminator 24 - 1892 01cc 1142 tst r1, r2 - 1893 01ce 3DD0 beq .L155 - 680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1894 .loc 1 680 0 is_stmt 1 - 1895 01d0 1A68 ldr r2, [r3] - 1896 01d2 9207 lsls r2, r2, #30 - 1897 01d4 3AD5 bpl .L155 - 682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1898 .loc 1 682 0 - 1899 01d6 1A68 ldr r2, [r3] - 1900 01d8 9206 lsls r2, r2, #26 - 1901 01da 03D4 bmi .L165 - 685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1902 .loc 1 685 0 - 1903 01dc 1A68 ldr r2, [r3] - 1904 01de 0221 movs r1, #2 - 1905 01e0 8A43 bics r2, r1 - 1906 01e2 1A60 str r2, [r3] - 1907 .L165: - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - ARM GAS /tmp/ccJCJaQH.s page 52 - - - 1908 .loc 1 688 0 - 1909 01e4 2368 ldr r3, [r4] - 1910 01e6 204A ldr r2, .L209+4 - 1911 01e8 9342 cmp r3, r2 - 1912 01ea 1FD0 beq .L197 - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1913 .loc 1 688 0 is_stmt 0 discriminator 1 - 1914 01ec 1F4A ldr r2, .L209+8 - 1915 01ee 9342 cmp r3, r2 - 1916 01f0 2DD0 beq .L198 - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1917 .loc 1 688 0 discriminator 3 - 1918 01f2 1F4A ldr r2, .L209+12 - 1919 01f4 9342 cmp r3, r2 - 1920 01f6 2CD0 beq .L199 - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1921 .loc 1 688 0 discriminator 5 - 1922 01f8 1E4A ldr r2, .L209+16 - 1923 01fa 9342 cmp r3, r2 - 1924 01fc 2CD0 beq .L200 - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1925 .loc 1 688 0 discriminator 7 - 1926 01fe 1E4A ldr r2, .L209+20 - 1927 0200 9342 cmp r3, r2 - 1928 0202 2CD0 beq .L201 - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1929 .loc 1 688 0 discriminator 9 - 1930 0204 1D4A ldr r2, .L209+24 - 1931 0206 9342 cmp r3, r2 - 1932 0208 0DD0 beq .L208 - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1933 .loc 1 688 0 - 1934 020a 8022 movs r2, #128 - 1935 020c 9204 lsls r2, r2, #18 - 1936 020e 0EE0 b .L166 - 1937 .L192: - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1938 .loc 1 678 0 is_stmt 1 - 1939 0210 2021 movs r1, #32 - 1940 0212 DBE7 b .L163 - 1941 .L193: - 1942 0214 8021 movs r1, #128 - 1943 0216 8900 lsls r1, r1, #2 - 1944 0218 D8E7 b .L163 - 1945 .L194: - 1946 021a 8021 movs r1, #128 - 1947 021c 8901 lsls r1, r1, #6 - 1948 021e D5E7 b .L163 - 1949 .L195: - 1950 0220 8021 movs r1, #128 - 1951 0222 8902 lsls r1, r1, #10 - 1952 0224 D2E7 b .L163 - 1953 .L208: - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1954 .loc 1 688 0 - 1955 0226 8022 movs r2, #128 - 1956 0228 9203 lsls r2, r2, #14 - ARM GAS /tmp/ccJCJaQH.s page 53 - - - 1957 022a 00E0 b .L166 - 1958 .L197: - 1959 022c 0222 movs r2, #2 - 1960 .L166: - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1961 .loc 1 688 0 is_stmt 0 discriminator 24 - 1962 022e 0D4B ldr r3, .L209 - 1963 0230 5A60 str r2, [r3, #4] - 691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1964 .loc 1 691 0 is_stmt 1 discriminator 24 - 1965 0232 E36B ldr r3, [r4, #60] - 1966 0234 E363 str r3, [r4, #60] - 694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1967 .loc 1 694 0 discriminator 24 - 1968 0236 2523 movs r3, #37 - 1969 0238 0122 movs r2, #1 - 1970 023a E254 strb r2, [r4, r3] - 697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1971 .loc 1 697 0 discriminator 24 - 1972 023c 013B subs r3, r3, #1 - 1973 023e 0022 movs r2, #0 - 1974 0240 E254 strb r2, [r4, r3] - 699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** { - 1975 .loc 1 699 0 discriminator 24 - 1976 0242 E36A ldr r3, [r4, #44] - 1977 0244 002B cmp r3, #0 - 1978 0246 01D0 beq .L155 - 702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 1979 .loc 1 702 0 - 1980 0248 2000 movs r0, r4 - 1981 024a 9847 blx r3 - 1982 .LVL94: - 1983 .L155: - 706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1984 .loc 1 706 0 - 1985 @ sp needed - 1986 .LVL95: - 1987 024c 10BD pop {r4, pc} - 1988 .LVL96: - 1989 .L198: - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 1990 .loc 1 688 0 - 1991 024e 2022 movs r2, #32 - 1992 0250 EDE7 b .L166 - 1993 .L199: - 1994 0252 8022 movs r2, #128 - 1995 0254 9200 lsls r2, r2, #2 - 1996 0256 EAE7 b .L166 - 1997 .L200: - 1998 0258 8022 movs r2, #128 - 1999 025a 9201 lsls r2, r2, #6 - 2000 025c E7E7 b .L166 - 2001 .L201: - 2002 025e 8022 movs r2, #128 - 2003 0260 9202 lsls r2, r2, #10 - 2004 0262 E4E7 b .L166 - 2005 .L210: - ARM GAS /tmp/ccJCJaQH.s page 54 - - - 2006 .align 2 - 2007 .L209: - 2008 0264 00000240 .word 1073872896 - 2009 0268 08000240 .word 1073872904 - 2010 026c 1C000240 .word 1073872924 - 2011 0270 30000240 .word 1073872944 - 2012 0274 44000240 .word 1073872964 - 2013 0278 58000240 .word 1073872984 - 2014 027c 6C000240 .word 1073873004 - 2015 .cfi_endproc - 2016 .LFE46: - 2018 .section .text.HAL_DMA_GetState,"ax",%progbits - 2019 .align 1 - 2020 .global HAL_DMA_GetState - 2021 .syntax unified - 2022 .code 16 - 2023 .thumb_func - 2024 .fpu softvfp - 2026 HAL_DMA_GetState: - 2027 .LFB47: - 735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return hdma->State; - 2028 .loc 1 735 0 - 2029 .cfi_startproc - 2030 @ args = 0, pretend = 0, frame = 0 - 2031 @ frame_needed = 0, uses_anonymous_args = 0 - 2032 @ link register save eliminated. - 2033 .LVL97: - 736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 2034 .loc 1 736 0 - 2035 0000 2523 movs r3, #37 - 2036 0002 C05C ldrb r0, [r0, r3] - 2037 .LVL98: - 2038 0004 C0B2 uxtb r0, r0 - 737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 2039 .loc 1 737 0 - 2040 @ sp needed - 2041 0006 7047 bx lr - 2042 .cfi_endproc - 2043 .LFE47: - 2045 .section .text.HAL_DMA_GetError,"ax",%progbits - 2046 .align 1 - 2047 .global HAL_DMA_GetError - 2048 .syntax unified - 2049 .code 16 - 2050 .thumb_func - 2051 .fpu softvfp - 2053 HAL_DMA_GetError: - 2054 .LFB48: - 746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** return hdma->ErrorCode; - 2055 .loc 1 746 0 - 2056 .cfi_startproc - 2057 @ args = 0, pretend = 0, frame = 0 - 2058 @ frame_needed = 0, uses_anonymous_args = 0 - 2059 @ link register save eliminated. - 2060 .LVL99: - 747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** } - 2061 .loc 1 747 0 - ARM GAS /tmp/ccJCJaQH.s page 55 - - - 2062 0000 C06B ldr r0, [r0, #60] - 2063 .LVL100: - 748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.c **** - 2064 .loc 1 748 0 - 2065 @ sp needed - 2066 0002 7047 bx lr - 2067 .cfi_endproc - 2068 .LFE48: - 2070 .text - 2071 .Letext0: - 2072 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 2073 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 2074 .file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 2075 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 2076 .file 6 "/usr/arm-none-eabi/include/sys/lock.h" - 2077 .file 7 "/usr/arm-none-eabi/include/sys/_types.h" - 2078 .file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 2079 .file 9 "/usr/arm-none-eabi/include/sys/reent.h" - 2080 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" - 2081 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 2082 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h" - 2083 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h" - ARM GAS /tmp/ccJCJaQH.s page 56 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_dma.c - /tmp/ccJCJaQH.s:16 .text.HAL_DMA_Init:0000000000000000 $t - /tmp/ccJCJaQH.s:23 .text.HAL_DMA_Init:0000000000000000 HAL_DMA_Init - /tmp/ccJCJaQH.s:245 .text.HAL_DMA_Init:0000000000000114 $d - /tmp/ccJCJaQH.s:263 .text.HAL_DMA_DeInit:0000000000000000 $t - /tmp/ccJCJaQH.s:270 .text.HAL_DMA_DeInit:0000000000000000 HAL_DMA_DeInit - /tmp/ccJCJaQH.s:650 .text.HAL_DMA_DeInit:00000000000001fc $d - /tmp/ccJCJaQH.s:668 .text.HAL_DMA_Start:0000000000000000 $t - /tmp/ccJCJaQH.s:675 .text.HAL_DMA_Start:0000000000000000 HAL_DMA_Start - /tmp/ccJCJaQH.s:768 .text.HAL_DMA_Start_IT:0000000000000000 $t - /tmp/ccJCJaQH.s:775 .text.HAL_DMA_Start_IT:0000000000000000 HAL_DMA_Start_IT - /tmp/ccJCJaQH.s:886 .text.HAL_DMA_Abort:0000000000000000 $t - /tmp/ccJCJaQH.s:893 .text.HAL_DMA_Abort:0000000000000000 HAL_DMA_Abort - /tmp/ccJCJaQH.s:971 .text.HAL_DMA_Abort_IT:0000000000000000 $t - /tmp/ccJCJaQH.s:978 .text.HAL_DMA_Abort_IT:0000000000000000 HAL_DMA_Abort_IT - /tmp/ccJCJaQH.s:1103 .text.HAL_DMA_Abort_IT:0000000000000090 $d - /tmp/ccJCJaQH.s:1114 .text.HAL_DMA_PollForTransfer:0000000000000000 $t - /tmp/ccJCJaQH.s:1121 .text.HAL_DMA_PollForTransfer:0000000000000000 HAL_DMA_PollForTransfer - /tmp/ccJCJaQH.s:1533 .text.HAL_DMA_PollForTransfer:0000000000000210 $d - /tmp/ccJCJaQH.s:1544 .text.HAL_DMA_IRQHandler:0000000000000000 $t - /tmp/ccJCJaQH.s:1551 .text.HAL_DMA_IRQHandler:0000000000000000 HAL_DMA_IRQHandler - /tmp/ccJCJaQH.s:2008 .text.HAL_DMA_IRQHandler:0000000000000264 $d - /tmp/ccJCJaQH.s:2019 .text.HAL_DMA_GetState:0000000000000000 $t - /tmp/ccJCJaQH.s:2026 .text.HAL_DMA_GetState:0000000000000000 HAL_DMA_GetState - /tmp/ccJCJaQH.s:2046 .text.HAL_DMA_GetError:0000000000000000 $t - /tmp/ccJCJaQH.s:2053 .text.HAL_DMA_GetError:0000000000000000 HAL_DMA_GetError - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -HAL_GetTick diff --git a/build/stm32l0xx_hal_firewall.d b/build/stm32l0xx_hal_firewall.d deleted file mode 100644 index b9368ed..0000000 --- a/build/stm32l0xx_hal_firewall.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_firewall.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_firewall.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_firewall.lst b/build/stm32l0xx_hal_firewall.lst deleted file mode 100644 index 9cb36d1..0000000 --- a/build/stm32l0xx_hal_firewall.lst +++ /dev/null @@ -1,32 +0,0 @@ -ARM GAS /tmp/ccviRKHs.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_firewall.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .Letext0: - 16 .file 1 "/usr/arm-none-eabi/include/machine/_default_types.h" - 17 .file 2 "/usr/arm-none-eabi/include/sys/_stdint.h" - 18 .file 3 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 19 .file 4 "/usr/arm-none-eabi/include/sys/lock.h" - 20 .file 5 "/usr/arm-none-eabi/include/sys/_types.h" - 21 .file 6 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 22 .file 7 "/usr/arm-none-eabi/include/sys/reent.h" - ARM GAS /tmp/ccviRKHs.s page 2 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_firewall.c - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_flash.d b/build/stm32l0xx_hal_flash.d deleted file mode 100644 index b728878..0000000 --- a/build/stm32l0xx_hal_flash.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_flash.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_flash.lst b/build/stm32l0xx_hal_flash.lst deleted file mode 100644 index 4e43c4c..0000000 --- a/build/stm32l0xx_hal_flash.lst +++ /dev/null @@ -1,1990 +0,0 @@ -ARM GAS /tmp/ccqRvrNg.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_flash.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.FLASH_SetErrorCode,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 FLASH_SetErrorCode: - 23 .LFB51: - 24 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @file stm32l0xx_hal_flash.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief FLASH HAL module driver. - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * This file provides firmware functions to manage the following - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * functionalities of the internal FLASH memory: - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * + Program operations functions - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * + Memory Control functions - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * + Peripheral State functions - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** @verbatim - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ============================================================================== - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ##### FLASH peripheral features ##### - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ============================================================================== - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** to the Flash memory. It implements the erase and program Flash memory operations - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** and the read and write protection mechanisms. - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] The Flash memory interface accelerates code execution with a system of instruction - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** prefetch. - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] The FLASH main features are: - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Flash memory read operations - 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Flash memory program/erase operations - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Read / write protections - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Prefetch on I-Code - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Option Bytes programming - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ##### How to use this driver ##### - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ============================================================================== - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] - 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** This driver provides functions and macros to configure and program the FLASH - ARM GAS /tmp/ccqRvrNg.s page 2 - - - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** memory of all STM32L0xx devices. - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) FLASH Memory I/O Programming functions: this group includes all needed - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** functions to erase and program the main memory: - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Lock and Unlock the FLASH interface - 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Erase function: Erase page - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Program functions: Fast Word and Half Page(should be - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** executed from internal SRAM). - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) DATA EEPROM Programming functions: this group includes all - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** needed functions to erase and program the DATA EEPROM memory: - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Lock and Unlock the DATA EEPROM interface. - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Erase function: Erase Byte, erase HalfWord, erase Word, erase - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** Double Word (should be executed from internal SRAM). - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Program functions: Fast Program Byte, Fast Program Half-Word, - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** FastProgramWord, Program Byte, Program Half-Word, - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** Program Word and Program Double-Word (should be executed - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** from internal SRAM). - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) FLASH Option Bytes Programming functions: this group includes all needed - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** functions to manage the Option Bytes: - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Lock and Unlock the Option Bytes - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Set/Reset the write protection - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Set the Read protection Level - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Program the user Option Bytes - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Launch the Option Bytes loader - 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Set/Get the Read protection Level. - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Set/Get the BOR level. - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Get the Write protection. - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Get the user option bytes. - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) Interrupts and flags management functions : this group - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** includes all needed functions to: - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Handle FLASH interrupts - 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Wait for last FLASH operation according to its status - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Get error flag status - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) FLASH Interface configuration functions: this group includes - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** the management of following features: - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Enable/Disable the RUN PowerDown mode. - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Enable/Disable the SLEEP PowerDown mode. - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) FLASH Peripheral State methods: this group includes - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** the management of following features: - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Wait for the FLASH operation - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Get the specific FLASH error flag - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] In addition to these function, this driver includes a set of macros allowing - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** to handle the following operations: - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Set/Get the latency - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Enable/Disable the prefetch buffer - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Enable/Disable the preread buffer - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Enable/Disable the Flash power-down - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Enable/Disable the FLASH interrupts - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) Monitor the FLASH flags status - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - ARM GAS /tmp/ccqRvrNg.s page 3 - - - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ##### Programming operation functions ##### - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** =============================================================================== - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** This subsection provides a set of functions allowing to manage the FLASH - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** program operations. - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] The FLASH Memory Programming functions, includes the following functions: - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) HAL_FLASH_Unlock(void); - 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) HAL_FLASH_Lock(void); - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data) - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint32_t Data) - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] Any operation of erase or program should follow these steps: - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) Call the HAL_FLASH_Unlock() function to enable the flash control register and - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** program memory access. - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) Call the desired function to erase page or program data. - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) Call the HAL_FLASH_Lock() to disable the flash program memory access - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (recommended to protect the FLASH memory against possible unwanted operation). - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ##### Option Bytes Programming functions ##### - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ============================================================================== - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] The FLASH_Option Bytes Programming_functions, includes the following functions: - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) HAL_FLASH_OB_Unlock(void); - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) HAL_FLASH_OB_Lock(void); - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) HAL_FLASH_OB_Launch(void); - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (+) HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] Any operation of erase or program should follow these steps: - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) Call the HAL_FLASH_OB_Unlock() function to enable the Flash option control - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** register access. - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) Call the following functions to program the desired option bytes. - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) Once all needed option bytes to be programmed are correctly written, call the - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_FLASH_OB_Launch(void) function to launch the Option Bytes programming process. - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) Call the HAL_FLASH_OB_Lock() to disable the Flash option control register access (recommen - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** to protect the option Bytes against possible unwanted operations). - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] Proprietary code Read Out Protection (PcROP): - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) The PcROP sector is selected by using the same option bytes as the Write - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** protection. As a result, these 2 options are exclusive each other. - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (#) To activate PCROP mode for Flash sectors(s), you need to follow the sequence below: - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** (++) Use this function HAL_FLASHEx_AdvOBProgram with PCROPState = OB_PCROP_STATE_ENABLE. - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** @endverbatim - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ****************************************************************************** - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @attention - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * Redistribution and use in source and binary forms, with or without modification, - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * are permitted provided that the following conditions are met: - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * 1. Redistributions of source code must retain the above copyright notice, - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * this list of conditions and the following disclaimer. - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * this list of conditions and the following disclaimer in the documentation - ARM GAS /tmp/ccqRvrNg.s page 4 - - - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * and/or other materials provided with the distribution. - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * may be used to endorse or promote products derived from this software - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * without specific prior written permission. - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ****************************************************************************** - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Includes ------------------------------------------------------------------*/ - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** #include "stm32l0xx_hal.h" - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @addtogroup STM32L0xx_HAL_Driver - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** #ifdef HAL_FLASH_MODULE_ENABLED - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @defgroup FLASH FLASH - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief FLASH HAL module driver - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Private typedef -----------------------------------------------------------*/ - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Private define ------------------------------------------------------------*/ - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @defgroup FLASH_Private_Constants FLASH Private Constants - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @} - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Private macro ---------------------------- ---------------------------------*/ - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @defgroup FLASH_Private_Macros FLASH Private Macros - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @} - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Private variables ---------------------------------------------------------*/ - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @defgroup FLASH_Private_Variables FLASH Private Variables - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Variables used for Erase pages under interruption*/ - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** FLASH_ProcessTypeDef pFlash; - ARM GAS /tmp/ccqRvrNg.s page 5 - - - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @} - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Private function prototypes -----------------------------------------------*/ - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @defgroup FLASH_Private_Functions FLASH Private Functions - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** static void FLASH_SetErrorCode(void); - 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** extern void FLASH_PageErase(uint32_t PageAddress); - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @} - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Exported functions ---------------------------------------------------------*/ - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions FLASH Exported Functions - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Programming operation functions - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** @verbatim - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** @endverbatim - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Program word at a specified address - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @note To correctly run this function, the HAL_FLASH_Unlock() function - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * must be called before. - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * Call the HAL_FLASH_Lock() to disable the flash memory access - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * (recommended to protect the FLASH memory against possible unwanted operation). - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @param Address Specifie the address to be programmed. - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @param Data Specifie the data to be programmed - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data) - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Process Locked */ - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_LOCK(&pFlash); - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Check the parameters */ - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Wait for last operation to be completed */ - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(status == HAL_OK) - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - ARM GAS /tmp/ccqRvrNg.s page 6 - - - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Clean the error context */ - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /*Program word (32-bit) at a specified address.*/ - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** *(__IO uint32_t *)Address = Data; - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Wait for last operation to be completed */ - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Process Unlocked */ - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return status; - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Program word at a specified address with interrupt enabled. - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @param Address Specifie the address to be programmed. - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @param Data Specifie the data to be programmed - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint32_t Data) - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Process Locked */ - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_LOCK(&pFlash); - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Check the parameters */ - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Enable End of FLASH Operation and Error source interrupts */ - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.Address = Address; - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAM; - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Clean the error context */ - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_WORD) - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Program word (32-bit) at a specified address. */ - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** *(__IO uint32_t *)Address = Data; - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return status; - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief This function handles FLASH interrupt request. - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval None - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - ARM GAS /tmp/ccqRvrNg.s page 7 - - - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** void HAL_FLASH_IRQHandler(void) - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** uint32_t addresstmp = 0; - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Check FLASH operation error flags */ - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices, - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * as expected. If the user run an application using the first - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * cut of the STM32L031xx device or the first cut of the STM32L041xx - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * device, the check on the FLASH_FLAG_OPTVERR bit should be ignored. - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * Note :The revId of the device can be retrieved via the HAL_GetREVID() - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * function. - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) ) - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE) - 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Return the faulty sector */ - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** addresstmp = pFlash.Page; - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.Page = 0xFFFFFFFFU; - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** else - 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Return the faulty address */ - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** addresstmp = pFlash.Address; - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Save the Error code */ - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** FLASH_SetErrorCode(); - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* FLASH error interrupt user callback */ - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_FLASH_OperationErrorCallback(addresstmp); - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Stop the procedure ongoing */ - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Check FLASH End of Operation flag */ - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Process can continue only if no error detected */ - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE) - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE) - 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - ARM GAS /tmp/ccqRvrNg.s page 8 - - - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Nb of pages to erased can be decreased */ - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.NbPagesToErase--; - 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Check if there are still pages to erase */ - 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(pFlash.NbPagesToErase != 0U) - 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** addresstmp = pFlash.Page; - 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /*Indicate user which sector has been erased */ - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); - 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /*Increment sector number*/ - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** addresstmp = pFlash.Page + FLASH_PAGE_SIZE; - 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.Page = addresstmp; - 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* If the erase operation is completed, disable the ERASE Bit */ - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); - 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** FLASH_PageErase(addresstmp); - 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** else - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* No more pages to Erase, user callback can be called. */ - 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Reset Sector and stop Erase pages procedure */ - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.Page = addresstmp = 0xFFFFFFFFU; - 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); - 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** else - 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* If the program operation is completed, disable the PROG Bit */ - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); - 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Program ended. Return the selected address */ - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ - 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address); - 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Reset Address and stop Program procedure */ - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE) - 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Operation is completed, disable the PROG and ERASE */ - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** CLEAR_BIT(FLASH->PECR, (FLASH_PECR_ERASE | FLASH_PECR_PROG)); - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Disable End of FLASH Operation and Error source interrupts */ - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Process Unlocked */ - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - ARM GAS /tmp/ccqRvrNg.s page 9 - - - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief FLASH end of operation interrupt callback - 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @param ReturnValue: The value saved in this parameter depends on the ongoing procedure - 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - Pages Erase: Address of the page which has been erased - 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * (if 0xFFFFFFFF, it means that all the selected pages have been erased) - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - Program: Address which was selected for data program - 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval none - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue) - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** UNUSED(ReturnValue); - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** the HAL_FLASH_EndOfOperationCallback could be implemented in the user file - 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief FLASH operation error interrupt callback - 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @param ReturnValue: The value saved in this parameter depends on the ongoing procedure - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - Pages Erase: Address of the page which returned an error - 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - Program: Address which was selected for data program - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval none - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue) - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** UNUSED(ReturnValue); - 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, - 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** the HAL_FLASH_OperationErrorCallback could be implemented in the user file - 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @} - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief management functions - 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** @verbatim - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** =============================================================================== - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ##### Peripheral Control functions ##### - 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** =============================================================================== - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** This subsection provides a set of functions allowing to control the FLASH - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** memory operations. - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** @endverbatim - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - ARM GAS /tmp/ccqRvrNg.s page 10 - - - 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Unlock the FLASH control register access - 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval HAL Status - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Unlock(void) - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if (HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PRGLOCK)) - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Unlocking FLASH_PECR register access*/ - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK)) - 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY1); - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2); - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Unlocking the program memory access */ - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY1); - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY2); - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** else - 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_ERROR; - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_OK; - 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Locks the FLASH control register access - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval HAL Status - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Lock(void) - 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Set the PRGLOCK Bit to lock the FLASH Registers access */ - 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PRGLOCK); - 525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_OK; - 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Unlock the FLASH Option Control Registers access. - 531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval HAL Status - 532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void) - 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_OPTLOCK)) - 536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Unlocking FLASH_PECR register access*/ - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PELOCK)) - 539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Unlocking FLASH_PECR register access*/ - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY1); - 542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2); - 543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Unlocking the option bytes block access */ - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1); - 547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); - ARM GAS /tmp/ccqRvrNg.s page 11 - - - 548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** else - 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_ERROR; - 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_OK; - 555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Lock the FLASH Option Control Registers access. - 559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval HAL Status - 560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Lock(void) - 562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Set the OPTLOCK Bit to lock the option bytes block access */ - 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** SET_BIT(FLASH->PECR, FLASH_PECR_OPTLOCK); - 565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_OK; - 567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Launch the option byte loading. - 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @note This function will reset automatically the MCU. - 572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval HAL Status - 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Launch(void) - 575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ - 577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** SET_BIT(FLASH->PECR, FLASH_PECR_OBL_LAUNCH); - 578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Wait for last operation to be completed */ - 580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return(FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE)); - 581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @} - 585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group3 Peripheral errors functions - 588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Peripheral errors functions - 589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** @verbatim - 591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** =============================================================================== - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** ##### Peripheral Errors functions ##### - 593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** =============================================================================== - 594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** [..] - 595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** This subsection permit to get in run-time errors of the FLASH peripheral. - 596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** @endverbatim - 598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Get the specific FLASH error flag. - 603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval FLASH_ErrorCode The returned value can be: - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @ref FLASH_Error_Codes - ARM GAS /tmp/ccqRvrNg.s page 12 - - - 605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** uint32_t HAL_FLASH_GetError(void) - 607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return pFlash.ErrorCode; - 609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @} - 613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @} - 617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** @addtogroup FLASH_Private_Functions - 620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @{ - 621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Wait for a FLASH operation to complete. - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @param Timeout maximum flash operation timeout - 626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval HAL Status - 627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) - 629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. - 631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** Even if the FLASH operation fails, the BUSY flag will be reset and an error - 632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** flag will be set */ - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** uint32_t tickstart = HAL_GetTick(); - 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) - 637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if (Timeout != HAL_MAX_DELAY) - 639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) - 641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_TIMEOUT; - 643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Check FLASH End of Operation flag */ - 648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - 649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ - 651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - 652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || - 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || - 657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || - 659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || - 660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) ) - 661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - ARM GAS /tmp/ccqRvrNg.s page 13 - - - 662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /*Save the error code*/ - 663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices, - 665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving - 666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * as expected. If the user run an application using the first - 667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * cut of the STM32L031xx device or the first cut of the STM32L041xx - 668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * device, this error should be ignored. The revId of the device - 669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * can be retrieved via the HAL_GetREVID() function. - 670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** FLASH_SetErrorCode(); - 673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_ERROR; - 674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* There is no error flag set */ - 677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_OK; - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /** - 682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @brief Set the specific FLASH error flag. - 683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * @retval None - 684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - 685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** static void FLASH_SetErrorCode(void) - 686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 25 .loc 1 686 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 @ link register save eliminated. - 30 .LVL0: - 687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** uint32_t flags = 0; - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) - 31 .loc 1 689 0 - 32 0000 2A4B ldr r3, .L10 - 33 0002 9B69 ldr r3, [r3, #24] - 34 0004 DB05 lsls r3, r3, #23 - 35 0006 4FD5 bpl .L9 - 690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; - 36 .loc 1 691 0 - 37 0008 294A ldr r2, .L10+4 - 38 000a 5369 ldr r3, [r2, #20] - 39 000c 0221 movs r1, #2 - 40 000e 0B43 orrs r3, r1 - 41 0010 5361 str r3, [r2, #20] - 42 .LVL1: - 692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** flags |= FLASH_FLAG_WRPERR; - 43 .loc 1 692 0 - 44 0012 8023 movs r3, #128 - 45 0014 5B00 lsls r3, r3, #1 - 46 .LVL2: - 47 .L2: - 693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) - 48 .loc 1 694 0 - ARM GAS /tmp/ccqRvrNg.s page 14 - - - 49 0016 254A ldr r2, .L10 - 50 0018 9269 ldr r2, [r2, #24] - 51 001a 9205 lsls r2, r2, #22 - 52 001c 07D5 bpl .L3 - 695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; - 53 .loc 1 696 0 - 54 001e 2449 ldr r1, .L10+4 - 55 0020 4A69 ldr r2, [r1, #20] - 56 0022 0120 movs r0, #1 - 57 0024 0243 orrs r2, r0 - 58 0026 4A61 str r2, [r1, #20] - 697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** flags |= FLASH_FLAG_PGAERR; - 59 .loc 1 697 0 - 60 0028 8022 movs r2, #128 - 61 002a 9200 lsls r2, r2, #2 - 62 002c 1343 orrs r3, r2 - 63 .LVL3: - 64 .L3: - 698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)) - 65 .loc 1 699 0 - 66 002e 1F4A ldr r2, .L10 - 67 0030 9269 ldr r2, [r2, #24] - 68 0032 5205 lsls r2, r2, #21 - 69 0034 07D5 bpl .L4 - 700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_SIZE; - 70 .loc 1 701 0 - 71 0036 1E49 ldr r1, .L10+4 - 72 0038 4A69 ldr r2, [r1, #20] - 73 003a 0820 movs r0, #8 - 74 003c 0243 orrs r2, r0 - 75 003e 4A61 str r2, [r1, #20] - 702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** flags |= FLASH_FLAG_SIZERR; - 76 .loc 1 702 0 - 77 0040 8022 movs r2, #128 - 78 0042 D200 lsls r2, r2, #3 - 79 0044 1343 orrs r3, r2 - 80 .LVL4: - 81 .L4: - 703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) - 82 .loc 1 704 0 - 83 0046 194A ldr r2, .L10 - 84 0048 9269 ldr r2, [r2, #24] - 85 004a 1205 lsls r2, r2, #20 - 86 004c 07D5 bpl .L5 - 705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices, - 707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving - 708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * as expected. If the user run an application using the first - 709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * cut of the STM32L031xx device or the first cut of the STM32L041xx - 710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * device, this error should be ignored. The revId of the device - 711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * can be retrieved via the HAL_GetREVID() function. - 712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** * - 713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** */ - ARM GAS /tmp/ccqRvrNg.s page 15 - - - 714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; - 87 .loc 1 714 0 - 88 004e 1849 ldr r1, .L10+4 - 89 0050 4A69 ldr r2, [r1, #20] - 90 0052 0420 movs r0, #4 - 91 0054 0243 orrs r2, r0 - 92 0056 4A61 str r2, [r1, #20] - 715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** flags |= FLASH_FLAG_OPTVERR; - 93 .loc 1 715 0 - 94 0058 8022 movs r2, #128 - 95 005a 1201 lsls r2, r2, #4 - 96 005c 1343 orrs r3, r2 - 97 .LVL5: - 98 .L5: - 716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) - 99 .loc 1 718 0 - 100 005e 134A ldr r2, .L10 - 101 0060 9269 ldr r2, [r2, #24] - 102 0062 9204 lsls r2, r2, #18 - 103 0064 07D5 bpl .L6 - 719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; - 104 .loc 1 720 0 - 105 0066 1249 ldr r1, .L10+4 - 106 0068 4A69 ldr r2, [r1, #20] - 107 006a 1020 movs r0, #16 - 108 006c 0243 orrs r2, r0 - 109 006e 4A61 str r2, [r1, #20] - 721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** flags |= FLASH_FLAG_RDERR; - 110 .loc 1 721 0 - 111 0070 8022 movs r2, #128 - 112 0072 9201 lsls r2, r2, #6 - 113 0074 1343 orrs r3, r2 - 114 .LVL6: - 115 .L6: - 722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR)) - 116 .loc 1 723 0 - 117 0076 0D4A ldr r2, .L10 - 118 0078 9269 ldr r2, [r2, #24] - 119 007a 9203 lsls r2, r2, #14 - 120 007c 05D5 bpl .L7 - 724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_FWWERR; - 121 .loc 1 725 0 - 122 007e 0C48 ldr r0, .L10+4 - 123 0080 4269 ldr r2, [r0, #20] - 124 0082 2021 movs r1, #32 - 125 0084 0A43 orrs r2, r1 - 126 0086 4261 str r2, [r0, #20] - 726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** flags |= HAL_FLASH_ERROR_FWWERR; - 127 .loc 1 726 0 - 128 0088 0B43 orrs r3, r1 - 129 .LVL7: - 130 .L7: - ARM GAS /tmp/ccqRvrNg.s page 16 - - - 727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR)) - 131 .loc 1 728 0 - 132 008a 084A ldr r2, .L10 - 133 008c 9269 ldr r2, [r2, #24] - 134 008e D203 lsls r2, r2, #15 - 135 0090 07D5 bpl .L8 - 729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_NOTZERO; - 136 .loc 1 730 0 - 137 0092 0749 ldr r1, .L10+4 - 138 0094 4A69 ldr r2, [r1, #20] - 139 0096 4020 movs r0, #64 - 140 0098 0243 orrs r2, r0 - 141 009a 4A61 str r2, [r1, #20] - 731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** flags |= FLASH_FLAG_NOTZEROERR; - 142 .loc 1 731 0 - 143 009c 8022 movs r2, #128 - 144 009e 5202 lsls r2, r2, #9 - 145 00a0 1343 orrs r3, r2 - 146 .LVL8: - 147 .L8: - 732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Clear FLASH error pending bits */ - 735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(flags); - 148 .loc 1 735 0 - 149 00a2 024A ldr r2, .L10 - 150 00a4 9361 str r3, [r2, #24] - 736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 151 .loc 1 736 0 - 152 @ sp needed - 153 00a6 7047 bx lr - 154 .LVL9: - 155 .L9: - 687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 156 .loc 1 687 0 - 157 00a8 0023 movs r3, #0 - 158 00aa B4E7 b .L2 - 159 .L11: - 160 .align 2 - 161 .L10: - 162 00ac 00200240 .word 1073881088 - 163 00b0 00000000 .word .LANCHOR0 - 164 .cfi_endproc - 165 .LFE51: - 167 .section .text.HAL_FLASH_Program_IT,"ax",%progbits - 168 .align 1 - 169 .global HAL_FLASH_Program_IT - 170 .syntax unified - 171 .code 16 - 172 .thumb_func - 173 .fpu softvfp - 175 HAL_FLASH_Program_IT: - 176 .LFB40: - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; - 177 .loc 1 290 0 - ARM GAS /tmp/ccqRvrNg.s page 17 - - - 178 .cfi_startproc - 179 @ args = 0, pretend = 0, frame = 0 - 180 @ frame_needed = 0, uses_anonymous_args = 0 - 181 .LVL10: - 182 0000 70B5 push {r4, r5, r6, lr} - 183 .LCFI0: - 184 .cfi_def_cfa_offset 16 - 185 .cfi_offset 4, -16 - 186 .cfi_offset 5, -12 - 187 .cfi_offset 6, -8 - 188 .cfi_offset 14, -4 - 189 .LVL11: - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 190 .loc 1 294 0 - 191 0002 0D4B ldr r3, .L17 - 192 0004 1B7C ldrb r3, [r3, #16] - 193 0006 012B cmp r3, #1 - 194 0008 14D0 beq .L14 - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 195 .loc 1 294 0 is_stmt 0 discriminator 2 - 196 000a 0B4B ldr r3, .L17 - 197 000c 0124 movs r4, #1 - 198 000e 1C74 strb r4, [r3, #16] - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 199 .loc 1 301 0 is_stmt 1 discriminator 2 - 200 0010 0A4D ldr r5, .L17+4 - 201 0012 6E68 ldr r6, [r5, #4] - 202 0014 C024 movs r4, #192 - 203 0016 A402 lsls r4, r4, #10 - 204 0018 3443 orrs r4, r6 - 205 001a 6C60 str r4, [r5, #4] - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAM; - 206 .loc 1 303 0 discriminator 2 - 207 001c 9960 str r1, [r3, #8] - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Clean the error context */ - 208 .loc 1 304 0 discriminator 2 - 209 001e 0224 movs r4, #2 - 210 0020 1C70 strb r4, [r3] - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 211 .loc 1 306 0 discriminator 2 - 212 0022 0024 movs r4, #0 - 213 0024 5C61 str r4, [r3, #20] - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 214 .loc 1 308 0 discriminator 2 - 215 0026 0228 cmp r0, #2 - 216 0028 01D0 beq .L16 - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 217 .loc 1 313 0 - 218 002a 0020 movs r0, #0 - 219 .LVL12: - 220 .L13: - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 221 .loc 1 314 0 - 222 @ sp needed - 223 002c 70BD pop {r4, r5, r6, pc} - 224 .LVL13: - 225 .L16: - ARM GAS /tmp/ccqRvrNg.s page 18 - - - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 226 .loc 1 311 0 - 227 002e 0A60 str r2, [r1] - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 228 .loc 1 313 0 - 229 0030 0020 movs r0, #0 - 230 .LVL14: - 231 0032 FBE7 b .L13 - 232 .LVL15: - 233 .L14: - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 234 .loc 1 294 0 - 235 0034 0220 movs r0, #2 - 236 .LVL16: - 237 0036 F9E7 b .L13 - 238 .L18: - 239 .align 2 - 240 .L17: - 241 0038 00000000 .word .LANCHOR0 - 242 003c 00200240 .word 1073881088 - 243 .cfi_endproc - 244 .LFE40: - 246 .section .text.HAL_FLASH_EndOfOperationCallback,"ax",%progbits - 247 .align 1 - 248 .weak HAL_FLASH_EndOfOperationCallback - 249 .syntax unified - 250 .code 16 - 251 .thumb_func - 252 .fpu softvfp - 254 HAL_FLASH_EndOfOperationCallback: - 255 .LFB42: - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ - 256 .loc 1 445 0 - 257 .cfi_startproc - 258 @ args = 0, pretend = 0, frame = 0 - 259 @ frame_needed = 0, uses_anonymous_args = 0 - 260 @ link register save eliminated. - 261 .LVL17: - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 262 .loc 1 452 0 - 263 @ sp needed - 264 0000 7047 bx lr - 265 .cfi_endproc - 266 .LFE42: - 268 .section .text.HAL_FLASH_OperationErrorCallback,"ax",%progbits - 269 .align 1 - 270 .weak HAL_FLASH_OperationErrorCallback - 271 .syntax unified - 272 .code 16 - 273 .thumb_func - 274 .fpu softvfp - 276 HAL_FLASH_OperationErrorCallback: - 277 .LFB43: - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ - 278 .loc 1 462 0 - 279 .cfi_startproc - 280 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccqRvrNg.s page 19 - - - 281 @ frame_needed = 0, uses_anonymous_args = 0 - 282 @ link register save eliminated. - 283 .LVL18: - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 284 .loc 1 469 0 - 285 @ sp needed - 286 0000 7047 bx lr - 287 .cfi_endproc - 288 .LFE43: - 290 .section .text.HAL_FLASH_IRQHandler,"ax",%progbits - 291 .align 1 - 292 .global HAL_FLASH_IRQHandler - 293 .syntax unified - 294 .code 16 - 295 .thumb_func - 296 .fpu softvfp - 298 HAL_FLASH_IRQHandler: - 299 .LFB41: - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** uint32_t addresstmp = 0; - 300 .loc 1 321 0 - 301 .cfi_startproc - 302 @ args = 0, pretend = 0, frame = 0 - 303 @ frame_needed = 0, uses_anonymous_args = 0 - 304 0000 10B5 push {r4, lr} - 305 .LCFI1: - 306 .cfi_def_cfa_offset 8 - 307 .cfi_offset 4, -8 - 308 .cfi_offset 14, -4 - 309 .LVL19: - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 310 .loc 1 337 0 - 311 0002 3E4B ldr r3, .L31 - 312 0004 9B69 ldr r3, [r3, #24] - 313 0006 DB05 lsls r3, r3, #23 - 314 0008 17D4 bmi .L22 - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || - 315 .loc 1 338 0 discriminator 1 - 316 000a 3C4B ldr r3, .L31 - 317 000c 9B69 ldr r3, [r3, #24] - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 318 .loc 1 337 0 discriminator 1 - 319 000e 9B05 lsls r3, r3, #22 - 320 0010 13D4 bmi .L22 - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 321 .loc 1 339 0 - 322 0012 3A4B ldr r3, .L31 - 323 0014 9B69 ldr r3, [r3, #24] - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || - 324 .loc 1 338 0 - 325 0016 5B05 lsls r3, r3, #21 - 326 0018 0FD4 bmi .L22 - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || - 327 .loc 1 340 0 - 328 001a 384B ldr r3, .L31 - 329 001c 9B69 ldr r3, [r3, #24] - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 330 .loc 1 339 0 - ARM GAS /tmp/ccqRvrNg.s page 20 - - - 331 001e 1B05 lsls r3, r3, #20 - 332 0020 0BD4 bmi .L22 - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || - 333 .loc 1 341 0 - 334 0022 364B ldr r3, .L31 - 335 0024 9B69 ldr r3, [r3, #24] - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || - 336 .loc 1 340 0 - 337 0026 9B04 lsls r3, r3, #18 - 338 0028 07D4 bmi .L22 - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) ) - 339 .loc 1 342 0 - 340 002a 344B ldr r3, .L31 - 341 002c 9B69 ldr r3, [r3, #24] - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || - 342 .loc 1 341 0 - 343 002e 9B03 lsls r3, r3, #14 - 344 0030 03D4 bmi .L22 - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 345 .loc 1 343 0 - 346 0032 324B ldr r3, .L31 - 347 0034 9B69 ldr r3, [r3, #24] - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) ) - 348 .loc 1 342 0 - 349 0036 DB03 lsls r3, r3, #15 - 350 0038 0DD5 bpl .L23 - 351 .L22: - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 352 .loc 1 345 0 - 353 003a 314B ldr r3, .L31+4 - 354 003c 1B78 ldrb r3, [r3] - 355 003e 012B cmp r3, #1 - 356 0040 2ED0 beq .L30 - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 357 .loc 1 354 0 - 358 0042 2F4B ldr r3, .L31+4 - 359 0044 9C68 ldr r4, [r3, #8] - 360 .LVL20: - 361 .L25: - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 362 .loc 1 357 0 - 363 0046 FFF7FEFF bl FLASH_SetErrorCode - 364 .LVL21: - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 365 .loc 1 360 0 - 366 004a 2000 movs r0, r4 - 367 004c FFF7FEFF bl HAL_FLASH_OperationErrorCallback - 368 .LVL22: - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 369 .loc 1 363 0 - 370 0050 2B4B ldr r3, .L31+4 - 371 0052 0022 movs r2, #0 - 372 0054 1A70 strb r2, [r3] - 373 .LVL23: - 374 .L23: - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 375 .loc 1 367 0 - ARM GAS /tmp/ccqRvrNg.s page 21 - - - 376 0056 294B ldr r3, .L31 - 377 0058 9B69 ldr r3, [r3, #24] - 378 005a 9B07 lsls r3, r3, #30 - 379 005c 3DD5 bpl .L26 - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 380 .loc 1 370 0 - 381 005e 274B ldr r3, .L31 - 382 0060 0222 movs r2, #2 - 383 0062 9A61 str r2, [r3, #24] - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 384 .loc 1 373 0 - 385 0064 264B ldr r3, .L31+4 - 386 0066 1B78 ldrb r3, [r3] - 387 0068 002B cmp r3, #0 - 388 006a 36D0 beq .L26 - 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 389 .loc 1 375 0 - 390 006c 244B ldr r3, .L31+4 - 391 006e 1B78 ldrb r3, [r3] - 392 0070 012B cmp r3, #1 - 393 0072 24D1 bne .L27 - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 394 .loc 1 378 0 - 395 0074 224B ldr r3, .L31+4 - 396 0076 5A68 ldr r2, [r3, #4] - 397 0078 013A subs r2, r2, #1 - 398 007a 5A60 str r2, [r3, #4] - 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 399 .loc 1 381 0 - 400 007c 5B68 ldr r3, [r3, #4] - 401 007e 002B cmp r3, #0 - 402 0080 14D0 beq .L28 - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /*Indicate user which sector has been erased */ - 403 .loc 1 383 0 - 404 0082 1F4C ldr r4, .L31+4 - 405 0084 E068 ldr r0, [r4, #12] - 406 .LVL24: - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 407 .loc 1 385 0 - 408 0086 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback - 409 .LVL25: - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.Page = addresstmp; - 410 .loc 1 388 0 - 411 008a E068 ldr r0, [r4, #12] - 412 008c 8030 adds r0, r0, #128 - 413 .LVL26: - 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 414 .loc 1 389 0 - 415 008e E060 str r0, [r4, #12] - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 416 .loc 1 392 0 - 417 0090 1A4A ldr r2, .L31 - 418 0092 5368 ldr r3, [r2, #4] - 419 0094 1B49 ldr r1, .L31+8 - 420 0096 0B40 ands r3, r1 - 421 0098 5360 str r3, [r2, #4] - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - ARM GAS /tmp/ccqRvrNg.s page 22 - - - 422 .loc 1 394 0 - 423 009a FFF7FEFF bl FLASH_PageErase - 424 .LVL27: - 425 009e 1CE0 b .L26 - 426 .LVL28: - 427 .L30: - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.Page = 0xFFFFFFFFU; - 428 .loc 1 348 0 - 429 00a0 174B ldr r3, .L31+4 - 430 00a2 DC68 ldr r4, [r3, #12] - 431 .LVL29: - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 432 .loc 1 349 0 - 433 00a4 0122 movs r2, #1 - 434 00a6 5242 rsbs r2, r2, #0 - 435 00a8 DA60 str r2, [r3, #12] - 436 00aa CCE7 b .L25 - 437 .LVL30: - 438 .L28: - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - 439 .loc 1 400 0 - 440 00ac 144B ldr r3, .L31+4 - 441 00ae 0120 movs r0, #1 - 442 00b0 4042 rsbs r0, r0, #0 - 443 00b2 D860 str r0, [r3, #12] - 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ - 444 .loc 1 401 0 - 445 00b4 0022 movs r2, #0 - 446 00b6 1A70 strb r2, [r3] - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 447 .loc 1 403 0 - 448 00b8 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback - 449 .LVL31: - 450 00bc 0DE0 b .L26 - 451 .LVL32: - 452 .L27: - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 453 .loc 1 409 0 - 454 00be 0F4A ldr r2, .L31 - 455 00c0 5368 ldr r3, [r2, #4] - 456 00c2 0821 movs r1, #8 - 457 00c4 8B43 bics r3, r1 - 458 00c6 5360 str r3, [r2, #4] - 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 459 .loc 1 413 0 - 460 00c8 0D4C ldr r4, .L31+4 - 461 00ca A068 ldr r0, [r4, #8] - 462 00cc FFF7FEFF bl HAL_FLASH_EndOfOperationCallback - 463 .LVL33: - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; - 464 .loc 1 416 0 - 465 00d0 0123 movs r3, #1 - 466 00d2 5B42 rsbs r3, r3, #0 - 467 00d4 A360 str r3, [r4, #8] - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 468 .loc 1 417 0 - 469 00d6 0023 movs r3, #0 - ARM GAS /tmp/ccqRvrNg.s page 23 - - - 470 00d8 2370 strb r3, [r4] - 471 .L26: - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 472 .loc 1 423 0 - 473 00da 094B ldr r3, .L31+4 - 474 00dc 1B78 ldrb r3, [r3] - 475 00de 002B cmp r3, #0 - 476 00e0 0BD1 bne .L21 - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 477 .loc 1 426 0 - 478 00e2 064B ldr r3, .L31 - 479 00e4 5A68 ldr r2, [r3, #4] - 480 00e6 0849 ldr r1, .L31+12 - 481 00e8 0A40 ands r2, r1 - 482 00ea 5A60 str r2, [r3, #4] - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 483 .loc 1 429 0 - 484 00ec 5A68 ldr r2, [r3, #4] - 485 00ee 0749 ldr r1, .L31+16 - 486 00f0 0A40 ands r2, r1 - 487 00f2 5A60 str r2, [r3, #4] - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 488 .loc 1 432 0 - 489 00f4 024B ldr r3, .L31+4 - 490 00f6 0022 movs r2, #0 - 491 00f8 1A74 strb r2, [r3, #16] - 492 .L21: - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 493 .loc 1 434 0 - 494 @ sp needed - 495 00fa 10BD pop {r4, pc} - 496 .L32: - 497 .align 2 - 498 .L31: - 499 00fc 00200240 .word 1073881088 - 500 0100 00000000 .word .LANCHOR0 - 501 0104 FFFDFFFF .word -513 - 502 0108 F7FDFFFF .word -521 - 503 010c FFFFFCFF .word -196609 - 504 .cfi_endproc - 505 .LFE41: - 507 .section .text.HAL_FLASH_Unlock,"ax",%progbits - 508 .align 1 - 509 .global HAL_FLASH_Unlock - 510 .syntax unified - 511 .code 16 - 512 .thumb_func - 513 .fpu softvfp - 515 HAL_FLASH_Unlock: - 516 .LFB44: - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if (HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_PRGLOCK)) - 517 .loc 1 495 0 - 518 .cfi_startproc - 519 @ args = 0, pretend = 0, frame = 0 - 520 @ frame_needed = 0, uses_anonymous_args = 0 - 521 @ link register save eliminated. - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - ARM GAS /tmp/ccqRvrNg.s page 24 - - - 522 .loc 1 496 0 - 523 0000 0A4B ldr r3, .L37 - 524 0002 5B68 ldr r3, [r3, #4] - 525 0004 9B07 lsls r3, r3, #30 - 526 0006 0FD5 bpl .L36 - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 527 .loc 1 499 0 - 528 0008 084B ldr r3, .L37 - 529 000a 5B68 ldr r3, [r3, #4] - 530 000c DB07 lsls r3, r3, #31 - 531 000e 04D5 bpl .L35 - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2); - 532 .loc 1 501 0 - 533 0010 064B ldr r3, .L37 - 534 0012 074A ldr r2, .L37+4 - 535 0014 DA60 str r2, [r3, #12] - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 536 .loc 1 502 0 - 537 0016 074A ldr r2, .L37+8 - 538 0018 DA60 str r2, [r3, #12] - 539 .L35: - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->PRGKEYR, FLASH_PRGKEY2); - 540 .loc 1 506 0 - 541 001a 044B ldr r3, .L37 - 542 001c 064A ldr r2, .L37+12 - 543 001e 1A61 str r2, [r3, #16] - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 544 .loc 1 507 0 - 545 0020 064A ldr r2, .L37+16 - 546 0022 1A61 str r2, [r3, #16] - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 547 .loc 1 514 0 - 548 0024 0020 movs r0, #0 - 549 .L34: - 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 550 .loc 1 515 0 - 551 @ sp needed - 552 0026 7047 bx lr - 553 .L36: - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 554 .loc 1 511 0 - 555 0028 0120 movs r0, #1 - 556 002a FCE7 b .L34 - 557 .L38: - 558 .align 2 - 559 .L37: - 560 002c 00200240 .word 1073881088 - 561 0030 EFCDAB89 .word -1985229329 - 562 0034 05040302 .word 33752069 - 563 0038 BFAE9D8C .word -1935823169 - 564 003c 16151413 .word 320083222 - 565 .cfi_endproc - 566 .LFE44: - 568 .section .text.HAL_FLASH_Lock,"ax",%progbits - 569 .align 1 - 570 .global HAL_FLASH_Lock - 571 .syntax unified - ARM GAS /tmp/ccqRvrNg.s page 25 - - - 572 .code 16 - 573 .thumb_func - 574 .fpu softvfp - 576 HAL_FLASH_Lock: - 577 .LFB45: - 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Set the PRGLOCK Bit to lock the FLASH Registers access */ - 578 .loc 1 522 0 - 579 .cfi_startproc - 580 @ args = 0, pretend = 0, frame = 0 - 581 @ frame_needed = 0, uses_anonymous_args = 0 - 582 @ link register save eliminated. - 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 583 .loc 1 524 0 - 584 0000 034A ldr r2, .L40 - 585 0002 5368 ldr r3, [r2, #4] - 586 0004 0221 movs r1, #2 - 587 0006 0B43 orrs r3, r1 - 588 0008 5360 str r3, [r2, #4] - 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 589 .loc 1 527 0 - 590 000a 0020 movs r0, #0 - 591 @ sp needed - 592 000c 7047 bx lr - 593 .L41: - 594 000e C046 .align 2 - 595 .L40: - 596 0010 00200240 .word 1073881088 - 597 .cfi_endproc - 598 .LFE45: - 600 .section .text.HAL_FLASH_OB_Unlock,"ax",%progbits - 601 .align 1 - 602 .global HAL_FLASH_OB_Unlock - 603 .syntax unified - 604 .code 16 - 605 .thumb_func - 606 .fpu softvfp - 608 HAL_FLASH_OB_Unlock: - 609 .LFB46: - 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** if(HAL_IS_BIT_SET(FLASH->PECR, FLASH_PECR_OPTLOCK)) - 610 .loc 1 534 0 - 611 .cfi_startproc - 612 @ args = 0, pretend = 0, frame = 0 - 613 @ frame_needed = 0, uses_anonymous_args = 0 - 614 @ link register save eliminated. - 535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 615 .loc 1 535 0 - 616 0000 0A4B ldr r3, .L46 - 617 0002 5B68 ldr r3, [r3, #4] - 618 0004 5B07 lsls r3, r3, #29 - 619 0006 0FD5 bpl .L45 - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 620 .loc 1 538 0 - 621 0008 084B ldr r3, .L46 - 622 000a 5B68 ldr r3, [r3, #4] - 623 000c DB07 lsls r3, r3, #31 - 624 000e 04D5 bpl .L44 - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->PEKEYR, FLASH_PEKEY2); - ARM GAS /tmp/ccqRvrNg.s page 26 - - - 625 .loc 1 541 0 - 626 0010 064B ldr r3, .L46 - 627 0012 074A ldr r2, .L46+4 - 628 0014 DA60 str r2, [r3, #12] - 542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 629 .loc 1 542 0 - 630 0016 074A ldr r2, .L46+8 - 631 0018 DA60 str r2, [r3, #12] - 632 .L44: - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); - 633 .loc 1 546 0 - 634 001a 044B ldr r3, .L46 - 635 001c 064A ldr r2, .L46+12 - 636 001e 5A61 str r2, [r3, #20] - 547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 637 .loc 1 547 0 - 638 0020 064A ldr r2, .L46+16 - 639 0022 5A61 str r2, [r3, #20] - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 640 .loc 1 554 0 - 641 0024 0020 movs r0, #0 - 642 .L43: - 555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 643 .loc 1 555 0 - 644 @ sp needed - 645 0026 7047 bx lr - 646 .L45: - 551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 647 .loc 1 551 0 - 648 0028 0120 movs r0, #1 - 649 002a FCE7 b .L43 - 650 .L47: - 651 .align 2 - 652 .L46: - 653 002c 00200240 .word 1073881088 - 654 0030 EFCDAB89 .word -1985229329 - 655 0034 05040302 .word 33752069 - 656 0038 C8D9EAFB .word -68494904 - 657 003c 27262524 .word 606414375 - 658 .cfi_endproc - 659 .LFE46: - 661 .section .text.HAL_FLASH_OB_Lock,"ax",%progbits - 662 .align 1 - 663 .global HAL_FLASH_OB_Lock - 664 .syntax unified - 665 .code 16 - 666 .thumb_func - 667 .fpu softvfp - 669 HAL_FLASH_OB_Lock: - 670 .LFB47: - 562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Set the OPTLOCK Bit to lock the option bytes block access */ - 671 .loc 1 562 0 - 672 .cfi_startproc - 673 @ args = 0, pretend = 0, frame = 0 - 674 @ frame_needed = 0, uses_anonymous_args = 0 - 675 @ link register save eliminated. - 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - ARM GAS /tmp/ccqRvrNg.s page 27 - - - 676 .loc 1 564 0 - 677 0000 034A ldr r2, .L49 - 678 0002 5368 ldr r3, [r2, #4] - 679 0004 0421 movs r1, #4 - 680 0006 0B43 orrs r3, r1 - 681 0008 5360 str r3, [r2, #4] - 567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 682 .loc 1 567 0 - 683 000a 0020 movs r0, #0 - 684 @ sp needed - 685 000c 7047 bx lr - 686 .L50: - 687 000e C046 .align 2 - 688 .L49: - 689 0010 00200240 .word 1073881088 - 690 .cfi_endproc - 691 .LFE47: - 693 .section .text.HAL_FLASH_GetError,"ax",%progbits - 694 .align 1 - 695 .global HAL_FLASH_GetError - 696 .syntax unified - 697 .code 16 - 698 .thumb_func - 699 .fpu softvfp - 701 HAL_FLASH_GetError: - 702 .LFB49: - 607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return pFlash.ErrorCode; - 703 .loc 1 607 0 - 704 .cfi_startproc - 705 @ args = 0, pretend = 0, frame = 0 - 706 @ frame_needed = 0, uses_anonymous_args = 0 - 707 @ link register save eliminated. - 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 708 .loc 1 608 0 - 709 0000 014B ldr r3, .L52 - 710 0002 5869 ldr r0, [r3, #20] - 609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 711 .loc 1 609 0 - 712 @ sp needed - 713 0004 7047 bx lr - 714 .L53: - 715 0006 C046 .align 2 - 716 .L52: - 717 0008 00000000 .word .LANCHOR0 - 718 .cfi_endproc - 719 .LFE49: - 721 .section .text.FLASH_WaitForLastOperation,"ax",%progbits - 722 .align 1 - 723 .global FLASH_WaitForLastOperation - 724 .syntax unified - 725 .code 16 - 726 .thumb_func - 727 .fpu softvfp - 729 FLASH_WaitForLastOperation: - 730 .LFB50: - 629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. - 731 .loc 1 629 0 - ARM GAS /tmp/ccqRvrNg.s page 28 - - - 732 .cfi_startproc - 733 @ args = 0, pretend = 0, frame = 0 - 734 @ frame_needed = 0, uses_anonymous_args = 0 - 735 .LVL34: - 736 0000 70B5 push {r4, r5, r6, lr} - 737 .LCFI2: - 738 .cfi_def_cfa_offset 16 - 739 .cfi_offset 4, -16 - 740 .cfi_offset 5, -12 - 741 .cfi_offset 6, -8 - 742 .cfi_offset 14, -4 - 743 0002 0400 movs r4, r0 - 634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 744 .loc 1 634 0 - 745 0004 FFF7FEFF bl HAL_GetTick - 746 .LVL35: - 747 0008 0500 movs r5, r0 - 748 .LVL36: - 749 .L56: - 636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 750 .loc 1 636 0 - 751 000a 1D4B ldr r3, .L65 - 752 000c 9B69 ldr r3, [r3, #24] - 753 000e DB07 lsls r3, r3, #31 - 754 0010 0AD5 bpl .L64 - 638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 755 .loc 1 638 0 - 756 0012 631C adds r3, r4, #1 - 757 0014 F9D0 beq .L56 - 640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 758 .loc 1 640 0 - 759 0016 002C cmp r4, #0 - 760 0018 2DD0 beq .L61 - 640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 761 .loc 1 640 0 is_stmt 0 discriminator 1 - 762 001a FFF7FEFF bl HAL_GetTick - 763 .LVL37: - 764 001e 401B subs r0, r0, r5 - 765 0020 A042 cmp r0, r4 - 766 0022 F2D9 bls .L56 - 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 767 .loc 1 642 0 is_stmt 1 - 768 0024 0320 movs r0, #3 - 769 0026 25E0 b .L57 - 770 .L64: - 648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 771 .loc 1 648 0 - 772 0028 154B ldr r3, .L65 - 773 002a 9B69 ldr r3, [r3, #24] - 774 002c 9B07 lsls r3, r3, #30 - 775 002e 02D5 bpl .L59 - 651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 776 .loc 1 651 0 - 777 0030 134B ldr r3, .L65 - 778 0032 0222 movs r2, #2 - 779 0034 9A61 str r2, [r3, #24] - 780 .L59: - ARM GAS /tmp/ccqRvrNg.s page 29 - - - 654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 781 .loc 1 654 0 - 782 0036 124B ldr r3, .L65 - 783 0038 9B69 ldr r3, [r3, #24] - 784 003a DB05 lsls r3, r3, #23 - 785 003c 17D4 bmi .L60 - 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || - 786 .loc 1 655 0 discriminator 1 - 787 003e 104B ldr r3, .L65 - 788 0040 9B69 ldr r3, [r3, #24] - 654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 789 .loc 1 654 0 discriminator 1 - 790 0042 9B05 lsls r3, r3, #22 - 791 0044 13D4 bmi .L60 - 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 792 .loc 1 656 0 - 793 0046 0E4B ldr r3, .L65 - 794 0048 9B69 ldr r3, [r3, #24] - 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || - 795 .loc 1 655 0 - 796 004a 5B05 lsls r3, r3, #21 - 797 004c 0FD4 bmi .L60 - 657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || - 798 .loc 1 657 0 - 799 004e 0C4B ldr r3, .L65 - 800 0050 9B69 ldr r3, [r3, #24] - 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 801 .loc 1 656 0 - 802 0052 1B05 lsls r3, r3, #20 - 803 0054 0BD4 bmi .L60 - 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || - 804 .loc 1 658 0 - 805 0056 0A4B ldr r3, .L65 - 806 0058 9B69 ldr r3, [r3, #24] - 657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || - 807 .loc 1 657 0 - 808 005a 9B04 lsls r3, r3, #18 - 809 005c 07D4 bmi .L60 - 659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) ) - 810 .loc 1 659 0 - 811 005e 084B ldr r3, .L65 - 812 0060 9B69 ldr r3, [r3, #24] - 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || - 813 .loc 1 658 0 - 814 0062 9B03 lsls r3, r3, #14 - 815 0064 03D4 bmi .L60 - 660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 816 .loc 1 660 0 - 817 0066 064B ldr r3, .L65 - 818 0068 9B69 ldr r3, [r3, #24] - 659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) ) - 819 .loc 1 659 0 - 820 006a DB03 lsls r3, r3, #15 - 821 006c 05D5 bpl .L63 - 822 .L60: - 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** return HAL_ERROR; - 823 .loc 1 672 0 - ARM GAS /tmp/ccqRvrNg.s page 30 - - - 824 006e FFF7FEFF bl FLASH_SetErrorCode - 825 .LVL38: - 673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 826 .loc 1 673 0 - 827 0072 0120 movs r0, #1 - 828 .L57: - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 829 .loc 1 678 0 - 830 @ sp needed - 831 .LVL39: - 832 .LVL40: - 833 0074 70BD pop {r4, r5, r6, pc} - 834 .LVL41: - 835 .L61: - 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 836 .loc 1 642 0 - 837 0076 0320 movs r0, #3 - 838 0078 FCE7 b .L57 - 839 .L63: - 677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 840 .loc 1 677 0 - 841 007a 0020 movs r0, #0 - 842 007c FAE7 b .L57 - 843 .L66: - 844 007e C046 .align 2 - 845 .L65: - 846 0080 00200240 .word 1073881088 - 847 .cfi_endproc - 848 .LFE50: - 850 .section .text.HAL_FLASH_Program,"ax",%progbits - 851 .align 1 - 852 .global HAL_FLASH_Program - 853 .syntax unified - 854 .code 16 - 855 .thumb_func - 856 .fpu softvfp - 858 HAL_FLASH_Program: - 859 .LFB39: - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; - 860 .loc 1 248 0 - 861 .cfi_startproc - 862 @ args = 0, pretend = 0, frame = 0 - 863 @ frame_needed = 0, uses_anonymous_args = 0 - 864 .LVL42: - 865 0000 70B5 push {r4, r5, r6, lr} - 866 .LCFI3: - 867 .cfi_def_cfa_offset 16 - 868 .cfi_offset 4, -16 - 869 .cfi_offset 5, -12 - 870 .cfi_offset 6, -8 - 871 .cfi_offset 14, -4 - 872 0002 0C00 movs r4, r1 - 873 0004 1500 movs r5, r2 - 874 .LVL43: - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 875 .loc 1 252 0 - 876 0006 0D4B ldr r3, .L72 - ARM GAS /tmp/ccqRvrNg.s page 31 - - - 877 0008 1B7C ldrb r3, [r3, #16] - 878 000a 012B cmp r3, #1 - 879 000c 13D0 beq .L70 - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 880 .loc 1 252 0 is_stmt 0 discriminator 2 - 881 000e 0B4B ldr r3, .L72 - 882 0010 0122 movs r2, #1 - 883 .LVL44: - 884 0012 1A74 strb r2, [r3, #16] - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 885 .loc 1 259 0 is_stmt 1 discriminator 2 - 886 0014 0A48 ldr r0, .L72+4 - 887 .LVL45: - 888 0016 FFF7FEFF bl FLASH_WaitForLastOperation - 889 .LVL46: - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** { - 890 .loc 1 261 0 discriminator 2 - 891 001a 0028 cmp r0, #0 - 892 001c 03D0 beq .L71 - 893 .LVL47: - 894 .L69: - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 895 .loc 1 274 0 - 896 001e 074B ldr r3, .L72 - 897 0020 0022 movs r2, #0 - 898 0022 1A74 strb r2, [r3, #16] - 899 .LVL48: - 900 .L68: - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 901 .loc 1 277 0 - 902 @ sp needed - 903 .LVL49: - 904 .LVL50: - 905 0024 70BD pop {r4, r5, r6, pc} - 906 .LVL51: - 907 .L71: - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 908 .loc 1 264 0 - 909 0026 054B ldr r3, .L72 - 910 0028 0022 movs r2, #0 - 911 002a 5A61 str r2, [r3, #20] - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 912 .loc 1 267 0 - 913 002c 2560 str r5, [r4] - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 914 .loc 1 270 0 - 915 002e 0448 ldr r0, .L72+4 - 916 .LVL52: - 917 0030 FFF7FEFF bl FLASH_WaitForLastOperation - 918 .LVL53: - 919 0034 F3E7 b .L69 - 920 .LVL54: - 921 .L70: - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 922 .loc 1 252 0 - 923 0036 0220 movs r0, #2 - 924 .LVL55: - ARM GAS /tmp/ccqRvrNg.s page 32 - - - 925 0038 F4E7 b .L68 - 926 .L73: - 927 003a C046 .align 2 - 928 .L72: - 929 003c 00000000 .word .LANCHOR0 - 930 0040 50C30000 .word 50000 - 931 .cfi_endproc - 932 .LFE39: - 934 .section .text.HAL_FLASH_OB_Launch,"ax",%progbits - 935 .align 1 - 936 .global HAL_FLASH_OB_Launch - 937 .syntax unified - 938 .code 16 - 939 .thumb_func - 940 .fpu softvfp - 942 HAL_FLASH_OB_Launch: - 943 .LFB48: - 575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ - 944 .loc 1 575 0 - 945 .cfi_startproc - 946 @ args = 0, pretend = 0, frame = 0 - 947 @ frame_needed = 0, uses_anonymous_args = 0 - 948 0000 10B5 push {r4, lr} - 949 .LCFI4: - 950 .cfi_def_cfa_offset 8 - 951 .cfi_offset 4, -8 - 952 .cfi_offset 14, -4 - 577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 953 .loc 1 577 0 - 954 0002 054A ldr r2, .L75 - 955 0004 5168 ldr r1, [r2, #4] - 956 0006 8023 movs r3, #128 - 957 0008 DB02 lsls r3, r3, #11 - 958 000a 0B43 orrs r3, r1 - 959 000c 5360 str r3, [r2, #4] - 580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** } - 960 .loc 1 580 0 - 961 000e 0348 ldr r0, .L75+4 - 962 0010 FFF7FEFF bl FLASH_WaitForLastOperation - 963 .LVL56: - 581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash.c **** - 964 .loc 1 581 0 - 965 @ sp needed - 966 0014 10BD pop {r4, pc} - 967 .L76: - 968 0016 C046 .align 2 - 969 .L75: - 970 0018 00200240 .word 1073881088 - 971 001c 50C30000 .word 50000 - 972 .cfi_endproc - 973 .LFE48: - 975 .global pFlash - 976 .section .bss.pFlash,"aw",%nobits - 977 .align 2 - 978 .set .LANCHOR0,. + 0 - 981 pFlash: - 982 0000 00000000 .space 24 - ARM GAS /tmp/ccqRvrNg.s page 33 - - - 982 00000000 - 982 00000000 - 982 00000000 - 982 00000000 - 983 .text - 984 .Letext0: - 985 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 986 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 987 .file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 988 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 989 .file 6 "/usr/arm-none-eabi/include/sys/lock.h" - 990 .file 7 "/usr/arm-none-eabi/include/sys/_types.h" - 991 .file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 992 .file 9 "/usr/arm-none-eabi/include/sys/reent.h" - 993 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" - 994 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 995 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h" - 996 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h" - ARM GAS /tmp/ccqRvrNg.s page 34 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_flash.c - /tmp/ccqRvrNg.s:16 .text.FLASH_SetErrorCode:0000000000000000 $t - /tmp/ccqRvrNg.s:22 .text.FLASH_SetErrorCode:0000000000000000 FLASH_SetErrorCode - /tmp/ccqRvrNg.s:162 .text.FLASH_SetErrorCode:00000000000000ac $d - /tmp/ccqRvrNg.s:168 .text.HAL_FLASH_Program_IT:0000000000000000 $t - /tmp/ccqRvrNg.s:175 .text.HAL_FLASH_Program_IT:0000000000000000 HAL_FLASH_Program_IT - /tmp/ccqRvrNg.s:241 .text.HAL_FLASH_Program_IT:0000000000000038 $d - /tmp/ccqRvrNg.s:247 .text.HAL_FLASH_EndOfOperationCallback:0000000000000000 $t - /tmp/ccqRvrNg.s:254 .text.HAL_FLASH_EndOfOperationCallback:0000000000000000 HAL_FLASH_EndOfOperationCallback - /tmp/ccqRvrNg.s:269 .text.HAL_FLASH_OperationErrorCallback:0000000000000000 $t - /tmp/ccqRvrNg.s:276 .text.HAL_FLASH_OperationErrorCallback:0000000000000000 HAL_FLASH_OperationErrorCallback - /tmp/ccqRvrNg.s:291 .text.HAL_FLASH_IRQHandler:0000000000000000 $t - /tmp/ccqRvrNg.s:298 .text.HAL_FLASH_IRQHandler:0000000000000000 HAL_FLASH_IRQHandler - /tmp/ccqRvrNg.s:499 .text.HAL_FLASH_IRQHandler:00000000000000fc $d - /tmp/ccqRvrNg.s:508 .text.HAL_FLASH_Unlock:0000000000000000 $t - /tmp/ccqRvrNg.s:515 .text.HAL_FLASH_Unlock:0000000000000000 HAL_FLASH_Unlock - /tmp/ccqRvrNg.s:560 .text.HAL_FLASH_Unlock:000000000000002c $d - /tmp/ccqRvrNg.s:569 .text.HAL_FLASH_Lock:0000000000000000 $t - /tmp/ccqRvrNg.s:576 .text.HAL_FLASH_Lock:0000000000000000 HAL_FLASH_Lock - /tmp/ccqRvrNg.s:596 .text.HAL_FLASH_Lock:0000000000000010 $d - /tmp/ccqRvrNg.s:601 .text.HAL_FLASH_OB_Unlock:0000000000000000 $t - /tmp/ccqRvrNg.s:608 .text.HAL_FLASH_OB_Unlock:0000000000000000 HAL_FLASH_OB_Unlock - /tmp/ccqRvrNg.s:653 .text.HAL_FLASH_OB_Unlock:000000000000002c $d - /tmp/ccqRvrNg.s:662 .text.HAL_FLASH_OB_Lock:0000000000000000 $t - /tmp/ccqRvrNg.s:669 .text.HAL_FLASH_OB_Lock:0000000000000000 HAL_FLASH_OB_Lock - /tmp/ccqRvrNg.s:689 .text.HAL_FLASH_OB_Lock:0000000000000010 $d - /tmp/ccqRvrNg.s:694 .text.HAL_FLASH_GetError:0000000000000000 $t - /tmp/ccqRvrNg.s:701 .text.HAL_FLASH_GetError:0000000000000000 HAL_FLASH_GetError - /tmp/ccqRvrNg.s:717 .text.HAL_FLASH_GetError:0000000000000008 $d - /tmp/ccqRvrNg.s:722 .text.FLASH_WaitForLastOperation:0000000000000000 $t - /tmp/ccqRvrNg.s:729 .text.FLASH_WaitForLastOperation:0000000000000000 FLASH_WaitForLastOperation - /tmp/ccqRvrNg.s:846 .text.FLASH_WaitForLastOperation:0000000000000080 $d - /tmp/ccqRvrNg.s:851 .text.HAL_FLASH_Program:0000000000000000 $t - /tmp/ccqRvrNg.s:858 .text.HAL_FLASH_Program:0000000000000000 HAL_FLASH_Program - /tmp/ccqRvrNg.s:929 .text.HAL_FLASH_Program:000000000000003c $d - /tmp/ccqRvrNg.s:935 .text.HAL_FLASH_OB_Launch:0000000000000000 $t - /tmp/ccqRvrNg.s:942 .text.HAL_FLASH_OB_Launch:0000000000000000 HAL_FLASH_OB_Launch - /tmp/ccqRvrNg.s:970 .text.HAL_FLASH_OB_Launch:0000000000000018 $d - /tmp/ccqRvrNg.s:981 .bss.pFlash:0000000000000000 pFlash - /tmp/ccqRvrNg.s:977 .bss.pFlash:0000000000000000 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -FLASH_PageErase -HAL_GetTick diff --git a/build/stm32l0xx_hal_flash_ex.d b/build/stm32l0xx_hal_flash_ex.d deleted file mode 100644 index 1029895..0000000 --- a/build/stm32l0xx_hal_flash_ex.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_flash_ex.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_flash_ex.lst b/build/stm32l0xx_hal_flash_ex.lst deleted file mode 100644 index 9789dd7..0000000 --- a/build/stm32l0xx_hal_flash_ex.lst +++ /dev/null @@ -1,3227 +0,0 @@ -ARM GAS /tmp/cc9alhJF.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_flash_ex.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.FLASH_OB_ProtectedSectorsConfig,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 FLASH_OB_ProtectedSectorsConfig: - 23 .LFB62: - 24 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @file stm32l0xx_hal_flash_ex.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Extended FLASH HAL module driver. - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This file provides firmware functions to manage the following - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * functionalities of the internal FLASH memory: - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * + FLASH Interface configuration - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * + FLASH Memory Erasing - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * + DATA EEPROM Programming/Erasing - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * + Option Bytes Programming - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * + Interrupts management - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** @verbatim - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ============================================================================== - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ##### Flash peripheral Extended features ##### - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ============================================================================== - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** [..] Comparing to other products, the FLASH interface for STM32L0xx - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** devices contains the following additional features - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (+) Erase functions - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (+) DATA_EEPROM memory management - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (+) BOOT option bit configuration - 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (+) PCROP protection for all sectors - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ##### How to use this driver ##### - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ============================================================================== - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** [..] This driver provides functions to configure and program the FLASH memory - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** of all STM32L0xx. It includes: - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (+) Full DATA_EEPROM erase and program management - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (+) Boot activation - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (+) PCROP protection configuration and control for all pages - 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9alhJF.s page 2 - - - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** @endverbatim - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ****************************************************************************** - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @attention - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * Redistribution and use in source and binary forms, with or without modification, - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * are permitted provided that the following conditions are met: - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * 1. Redistributions of source code must retain the above copyright notice, - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * this list of conditions and the following disclaimer. - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * this list of conditions and the following disclaimer in the documentation - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * and/or other materials provided with the distribution. - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * may be used to endorse or promote products derived from this software - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * without specific prior written permission. - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ****************************************************************************** - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Includes ------------------------------------------------------------------*/ - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #include "stm32l0xx_hal.h" - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @addtogroup STM32L0xx_HAL_Driver - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #ifdef HAL_FLASH_MODULE_ENABLED - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @addtogroup FLASH - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Variables - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Variables used for Erase pages under interruption*/ - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** extern FLASH_ProcessTypeDef pFlash; - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @defgroup FLASHEx FLASHEx - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief FLASH HAL Extension module driver - ARM GAS /tmp/cc9alhJF.s page 3 - - - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Private typedef -----------------------------------------------------------*/ - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Private define ------------------------------------------------------------*/ - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Private macro -------------------------------------------------------------*/ - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Private variables ---------------------------------------------------------*/ - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Private function prototypes -----------------------------------------------*/ - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress); - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(FLASH_OPTR_BFB2) - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t OB_BOOT); - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* FLASH_OPTR_BFB2 */ - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint8_t OB_RDP); - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY); - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BORConfig(uint8_t OB_BOR); - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetRDP(void); - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void); - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetBOR(void); - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetBOOTBit1(void); - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BOOTBit1Config(uint8_t OB_BootBit1); - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProtectedSectorsConfig(uint32_t Sector, uint32_t Sector2, uint32 - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #else - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProtectedSectorsConfig(uint32_t Sector, uint32_t NewState); - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void); - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP2(void); - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Exported functions ---------------------------------------------------------*/ - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions - ARM GAS /tmp/cc9alhJF.s page 4 - - - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief FLASH Memory Erasing functions - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** @verbatim - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ============================================================================== - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ##### FLASH Erasing Programming functions ##### - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ============================================================================== - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** [..] The FLASH Memory Erasing functions, includes the following functions: - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (+) @ref HAL_FLASHEx_Erase: return only when erase has been done - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (+) @ref HAL_FLASHEx_Erase_IT: end of erase is done when @ref HAL_FLASH_EndOfOperationCallback - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** is called with parameter 0xFFFFFFFF - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** [..] Any operation of erase should follow these steps: - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Call the @ref HAL_FLASH_Unlock() function to enable the flash control register and - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** program memory access. - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Call the desired function to erase page. - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Call the @ref HAL_FLASH_Lock() to disable the flash program memory access - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (recommended to protect the FLASH memory against possible unwanted operation). - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** @endverbatim - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory Pages - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * must be called before. - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * contains the configuration information for the erasing. - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param[out] PageError pointer to variable that - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * contains the configuration information on faulty page in case of error - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * (0xFFFFFFFF means that all the pages have been correctly erased) - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t address = 0U; - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Locked */ - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status == HAL_OK) - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /*Initialization of PageError variable*/ - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** *PageError = 0xFFFFFFFFU; - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_NBPAGES(pEraseInit->NbPages)); - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); - ARM GAS /tmp/cc9alhJF.s page 5 - - - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS((pEraseInit->PageAddress & ~(FLASH_PAGE_SIZE - 1U)) + pEr - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Erase page by page to be done*/ - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** for(address = pEraseInit->PageAddress; - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** FLASH_PageErase(address); - 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the ERASE Bit */ - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status != HAL_OK) - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* In case of error, stop erase procedure and return the faulty address */ - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** *PageError = address; - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** break; - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Unlocked */ - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Perform a page erase of the specified FLASH memory pages with interrupt enabled - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * must be called before. - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * End of erase is done when @ref HAL_FLASH_EndOfOperationCallback is called with paramet - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * 0xFFFFFFFF - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * contains the configuration information for the erasing. - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* If procedure already ongoing, reject the next one */ - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE) - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return HAL_ERROR; - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_NBPAGES(pEraseInit->NbPages)); - ARM GAS /tmp/cc9alhJF.s page 6 - - - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS((pEraseInit->PageAddress & ~(FLASH_PAGE_SIZE - 1)) + pErase - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Locked */ - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status == HAL_OK) - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Enable End of FLASH Operation and Error source interrupts */ - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE; - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.NbPagesToErase = pEraseInit->NbPages; - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.Page = pEraseInit->PageAddress; - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /*Erase 1st page and wait for IT*/ - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** FLASH_PageErase(pEraseInit->PageAddress); - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** else - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Unlocked */ - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Option Bytes Programming functions - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** @verbatim - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ============================================================================== - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ##### Option Bytes Programming functions ##### - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ============================================================================== - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** [..] Any operation of erase or program should follow these steps: - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Call the @ref HAL_FLASH_OB_Unlock() function to enable the Flash option control - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** register access. - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Call following function to program the desired option bytes. - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (++) @ref HAL_FLASHEx_OBProgram: - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - To Enable/Disable the desired sector write protection. - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - To set the desired read Protection Level. - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - To configure the user option Bytes: IWDG, STOP and the Standby. - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - To Set the BOR level. - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Once all needed option bytes to be programmed are correctly written, call the - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** @ref HAL_FLASH_OB_Launch(void) function to launch the Option Bytes programming process. - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Call the @ref HAL_FLASH_OB_Lock() to disable the Flash option control register access (reco - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** to protect the option Bytes against possible unwanted operations). - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9alhJF.s page 7 - - - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** [..] Proprietary code Read Out Protection (PcROP): - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) The PcROP sector is selected by using the same option bytes as the Write - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** protection (nWRPi bits). As a result, these 2 options are exclusive each other. - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) In order to activate the PcROP (change the function of the nWRPi option bits), - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** the WPRMOD option bit must be activated. - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) The active value of nWRPi bits is inverted when PCROP mode is active, this - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** means: if WPRMOD = 1 and nWRPi = 1 (default value), then the user sector "i" - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** is read/write protected. - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) To activate PCROP mode for Flash sector(s), you need to call the following function: - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (++) @ref HAL_FLASHEx_AdvOBProgram in selecting sectors to be read/write protected - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (++) @ref HAL_FLASHEx_OB_SelectPCROP to enable the read/write protection - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** @endverbatim - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Program option bytes - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * contains the configuration information for the programming. - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Locked */ - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); - 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /*Write protection configuration*/ - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_WRPSTATE(pOBInit->WRPState)); - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_OB_ProtectedSectorsConfig(pOBInit->WRPSector, pOBInit->WRPSector2, pOBInit->WRPS - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #else - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_OB_ProtectedSectorsConfig(pOBInit->WRPSector, pOBInit->WRPState); - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status != HAL_OK) - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Unlocked */ - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Read protection configuration*/ - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) - 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_OB_RDPConfig(pOBInit->RDPLevel); - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status != HAL_OK) - 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Unlocked */ - ARM GAS /tmp/cc9alhJF.s page 8 - - - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* USER configuration*/ - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) - 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_OB_UserConfig(pOBInit->USERConfig & OB_IWDG_SW, - 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_STOP_NORST, - 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_STDBY_NORST); - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status != HAL_OK) - 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Unlocked */ - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* BOR Level configuration*/ - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR) - 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_OB_BORConfig(pOBInit->BORLevel); - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status != HAL_OK) - 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Unlocked */ - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); - 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Program BOOT Bit1 config option byte */ - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if ((pOBInit->OptionType & OPTIONBYTE_BOOT_BIT1) == OPTIONBYTE_BOOT_BIT1) - 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_OB_BOOTBit1Config(pOBInit->BOOTBit1Config); - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Unlocked */ - 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); - 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Get the Option byte configuration - 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that - 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * contains the configuration information for the programming. - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval None - 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR; - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get WRP sector */ - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->WRPSector = FLASH_OB_GetWRP(); - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || - ARM GAS /tmp/cc9alhJF.s page 9 - - - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->WRPSector2 = FLASH_OB_GetWRP2(); - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /*Get RDP Level*/ - 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->RDPLevel = FLASH_OB_GetRDP(); - 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /*Get USER*/ - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->USERConfig = FLASH_OB_GetUser(); - 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /*Get BOR Level*/ - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->BORLevel = FLASH_OB_GetBOR(); - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get BOOT bit 1 config OB */ - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->BOOTBit1Config = FLASH_OB_GetBOOTBit1(); - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(FLASH_OPTR_WPRMOD) || defined(FLASH_OPTR_BFB2) - 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Program option bytes - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * contains the configuration information for the programming. - 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status - 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit) - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_OBEX(pAdvOBInit->OptionType)); - 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(FLASH_OPTR_WPRMOD) - 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Program PCROP option byte*/ - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if ((pAdvOBInit->OptionType & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP) - 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState)); - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || - 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_OB_ProtectedSectorsConfig(pAdvOBInit->PCROPSector, pAdvOBInit->PCROPSector2, pAd - 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #else - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_OB_ProtectedSectorsConfig(pAdvOBInit->PCROPSector, pAdvOBInit->PCROPState); - 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* FLASH_OPTR_WPRMOD */ - 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(FLASH_OPTR_BFB2) - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Program BOOT config option byte */ - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if ((pAdvOBInit->OptionType & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG) - 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig); - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* FLASH_OPTR_BFB2 */ - ARM GAS /tmp/cc9alhJF.s page 10 - - - 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Get the OBEX byte configuration - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that - 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * contains the configuration information for the programming. - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval None - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit) - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pAdvOBInit->OptionType = 0; - 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(FLASH_OPTR_WPRMOD) - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pAdvOBInit->OptionType |= OPTIONBYTE_PCROP; - 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get PCROP state */ - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pAdvOBInit->PCROPState = (FLASH->OPTR & FLASH_OPTR_WPRMOD) >> FLASH_OPTR_WPRMOD_Pos; - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get PCROP protected sector */ - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pAdvOBInit->PCROPSector = FLASH->WRPR; - 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || - 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get PCROP protected sector */ - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pAdvOBInit->PCROPSector2 = FLASH->WRPR2; - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* FLASH_OPTR_WPRMOD */ - 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(FLASH_OPTR_BFB2) - 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pAdvOBInit->OptionType |= OPTIONBYTE_BOOTCONFIG; - 525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get Boot config OB */ - 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pAdvOBInit->BootConfig = (FLASH->OPTR & FLASH_OPTR_BFB2) >> 16U; - 528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* FLASH_OPTR_BFB2 */ - 530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* FLASH_OPTR_WPRMOD || FLASH_OPTR_BFB2 */ - 533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(FLASH_OPTR_WPRMOD) - 535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Select the Protection Mode (WPRMOD). - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note Once WPRMOD bit is active, unprotection of a protected sector is not possible - 539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPER - 540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL status - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void) - 543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; - 545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint16_t tmp1 = 0; - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t tmp2 = 0; - 547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint8_t optiontmp = 0; - ARM GAS /tmp/cc9alhJF.s page 11 - - - 548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint16_t optiontmp2 = 0; - 549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Mask RDP Byte */ - 553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** optiontmp = (uint8_t)(*(__IO uint8_t *)(OB_BASE)); - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Update Option Byte */ - 556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** optiontmp2 = (uint16_t)(OB_PCROP_SELECTED | optiontmp); - 557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* calculate the option byte to write */ - 559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp1 = (uint16_t)(~(optiontmp2 )); - 560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2)); - 561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) - 563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ - 565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* program PCRop */ - 568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->RDP = tmp2; - 569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the Read protection operation Status */ - 575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Deselect the Protection Mode (WPRMOD). - 580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note Once WPRMOD bit is active, unprotection of a protected sector is not possible - 581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPER - 582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL status - 583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void) - 585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; - 587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint16_t tmp1 = 0; - 588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t tmp2 = 0; - 589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint8_t optiontmp = 0; - 590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint16_t optiontmp2 = 0; - 591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Mask RDP Byte */ - 595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** optiontmp = (uint8_t)(*(__IO uint8_t *)(OB_BASE)); - 596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Update Option Byte */ - 598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** optiontmp2 = (uint16_t)(OB_PCROP_DESELECTED | optiontmp); - 599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* calculate the option byte to write */ - 601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp1 = (uint16_t)(~(optiontmp2 )); - 602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2)); - 603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) - ARM GAS /tmp/cc9alhJF.s page 12 - - - 605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ - 607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* program PCRop */ - 610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->RDP = tmp2; - 611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the Read protection operation Status */ - 617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* FLASH_OPTR_WPRMOD */ - 621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} - 624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group3 DATA EEPROM Programming functions - 627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief DATA EEPROM Programming functions - 628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** @verbatim - 630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** =============================================================================== - 631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ##### DATA EEPROM Programming functions ##### - 632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** =============================================================================== - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** [..] Any operation of erase or program should follow these steps: - 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Call the @ref HAL_FLASHEx_DATAEEPROM_Unlock() function to enable the data EEPROM access - 636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** and Flash program erase control register access. - 637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Call the desired function to erase or program data. - 638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** (#) Call the @ref HAL_FLASHEx_DATAEEPROM_Lock() to disable the data EEPROM access - 639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** and Flash program erase control register access(recommended - 640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** to protect the DATA_EEPROM against possible unwanted operation). - 641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** @endverbatim - 643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Unlocks the data memory and FLASH_PECR register access. - 648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status - 649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void) - 651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if((FLASH->PECR & FLASH_PECR_PELOCK) != RESET) - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Unlocking the Data memory and FLASH_PECR register access*/ - 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** FLASH->PEKEYR = FLASH_PEKEY1; - 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** FLASH->PEKEYR = FLASH_PEKEY2; - 657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** else - 659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return HAL_ERROR; - 661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - ARM GAS /tmp/cc9alhJF.s page 13 - - - 662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return HAL_OK; - 663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Locks the Data memory and FLASH_PECR register access. - 667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status - 668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void) - 670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Set the PELOCK Bit to lock the data memory and FLASH_PECR register access */ - 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PELOCK); - 673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return HAL_OK; - 675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Erase a word in data memory. - 679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param Address specifies the address to be erased. - 680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASHEx_DATAEEPROM_Unlock() function - 681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * must be called before. - 682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASHEx_DATAEEPROM_Lock() to the data EEPROM access - 683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * and Flash program erase control register access(recommended to protect - 684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * the DATA_EEPROM against possible unwanted operation). - 685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status - 686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t Address) - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; - 690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_FLASH_DATA_ADDRESS(Address)); - 693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) - 698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ - 700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Write 00000000h to valid address in the data memory */ - 703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** *(__IO uint32_t *) Address = 0x00000000U; - 704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the erase status */ - 709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Program word at a specified address - 714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASHEx_DATAEEPROM_Unlock() function - 715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * must be called before. - 716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASHEx_DATAEEPROM_Unlock() to he data EEPROM access - 717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * and Flash program erase control register access(recommended to protect - 718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * the DATA_EEPROM against possible unwanted operation). - ARM GAS /tmp/cc9alhJF.s page 14 - - - 719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram() can be called before - 720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * this function to configure the Fixed Time Programming. - 721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param TypeProgram Indicate the way to program at a specified address. - 722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be a value of @ref FLASHEx_Type_Program_Data - 723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param Address specifie the address to be programmed. - 724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param Data specifie the data to be programmed - 725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status - 727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t - 730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Locked */ - 734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); - 735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_TYPEPROGRAMDATA(TypeProgram)); - 738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_FLASH_DATA_ADDRESS(Address)); - 739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) - 744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ - 746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(TypeProgram == FLASH_TYPEPROGRAMDATA_WORD) - 749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Program word (32-bit) at a specified address.*/ - 751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** *(__IO uint32_t *)Address = Data; - 752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** else if(TypeProgram == FLASH_TYPEPROGRAMDATA_HALFWORD) - 754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Program halfword (16-bit) at a specified address.*/ - 756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** *(__IO uint16_t *)Address = (uint16_t) Data; - 757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** else if(TypeProgram == FLASH_TYPEPROGRAMDATA_BYTE) - 759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Program byte (8-bit) at a specified address.*/ - 761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** *(__IO uint8_t *)Address = (uint8_t) Data; - 762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** else - 764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = HAL_ERROR; - 766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status != HAL_OK) - 769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Process Unlocked */ - ARM GAS /tmp/cc9alhJF.s page 15 - - - 776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); - 777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Enable DATA EEPROM fixed Time programming (2*Tprog). - 783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval None - 784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void) - 786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** SET_BIT(FLASH->PECR, FLASH_PECR_FIX); - 788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Disables DATA EEPROM fixed Time programming (2*Tprog). - 792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval None - 793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void) - 795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_FIX); - 797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} - 801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} - 805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Functions - 808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ - 809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* - 812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ============================================================================== - 813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OPTIONS BYTES - 814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** ============================================================================== - 815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Enables or disables the read out protection. - 818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_OB_Unlock() function - 819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * must be called before. - 820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param OB_RDP specifies the read protection level. - 821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be: - 822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection - 823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory - 824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Chip protection - 825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * !!!Warning!!! When enabling OB_RDP_LEVEL_2 it's no more possible to go back to level 1 or 0 - 827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * - 828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL status - 829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint8_t OB_RDP) - 831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; - ARM GAS /tmp/cc9alhJF.s page 16 - - - 833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U; - 834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_OB_RDP(OB_RDP)); - 837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp1 = (uint32_t)(OB->RDP & FLASH_OPTR_RDPROT); - 839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(FLASH_OPTR_WPRMOD) - 841:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Mask WPRMOD bit */ - 842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp3 = (uint32_t)(OB->RDP & FLASH_OPTR_WPRMOD); - 843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 845:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* calculate the option byte to write */ - 846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp1 = (~((uint32_t)(OB_RDP | tmp3))); - 847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)(OB_RDP | tmp3))); - 848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 851:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) - 853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 854:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ - 855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 857:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* program read protection level */ - 858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->RDP = tmp2; - 859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 860:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 861:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 863:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the Read protection operation Status */ - 865:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 866:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 867:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 868:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 869:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Programs the FLASH brownout reset threshold level Option Byte. - 870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param OB_BOR Selects the brownout reset threshold level. - 871:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be one of the following values: - 872:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOR_OFF BOR is disabled at power down, the reset is asserted when the VDD - 873:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * power supply reaches the PDR(Power Down Reset) threshold (1.5V) - 874:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOR_LEVEL1 BOR Reset threshold levels for 1.7V - 1.8V VDD power supply - 875:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOR_LEVEL2 BOR Reset threshold levels for 1.9V - 2.0V VDD power supply - 876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOR_LEVEL3 BOR Reset threshold levels for 2.3V - 2.4V VDD power supply - 877:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOR_LEVEL4 BOR Reset threshold levels for 2.55V - 2.65V VDD power supply - 878:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOR_LEVEL5 BOR Reset threshold levels for 2.8V - 2.9V VDD power supply - 879:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL status - 880:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BORConfig(uint8_t OB_BOR) - 882:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 883:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; - 884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t tmp = 0, tmp1 = 0; - 885:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 887:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_OB_BOR_LEVEL(OB_BOR)); - 888:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get the User Option byte register */ - ARM GAS /tmp/cc9alhJF.s page 17 - - - 890:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp1 = OB->USER & ((~FLASH_OPTR_BOR_LEV) >> 16U); - 891:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Calculate the option byte to write - [0xFF | nUSER | 0x00 | USER]*/ - 893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp = (uint32_t)~((OB_BOR | tmp1)) << 16U; - 894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp |= (OB_BOR | tmp1); - 895:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 898:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 899:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) - 900:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ - 902:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 903:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Write the BOR Option Byte */ - 905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->USER = tmp; - 906:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 907:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 909:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 910:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 911:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the Option Byte BOR programmation Status */ - 912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 914:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 915:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 916:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Sets or resets the BOOT bit1 option bit. - 917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param OB_BootBit1 Set or Reset the BOOT bit1 option bit. - 918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be one of the following values: - 919:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOOT_BIT1_RESET BOOT1 option bit reset - 920:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOOT_BIT1_SET BOOT1 option bit set - 921:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL status - 922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 923:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BOOTBit1Config(uint8_t OB_BootBit1) - 924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; - 926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t tmp = 0, tmp1 = 0, OB_Bits = ((uint32_t) OB_BootBit1) << 15; - 927:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ - 929:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1(OB_BootBit1)); - 930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 931:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get the User Option byte register */ - 932:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp1 = OB->USER & ((~FLASH_OPTR_BOOT1) >> 16U); - 933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Calculate the user option byte to write */ - 935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp = (~(OB_Bits | tmp1)) << 16U; - 936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp |= OB_Bits | tmp1; - 937:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 938:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 940:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) - 942:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ - 944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Program OB */ - 946:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->USER = tmp; - ARM GAS /tmp/cc9alhJF.s page 18 - - - 947:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 950:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 951:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 952:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 953:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 954:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 955:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Returns the FLASH User Option Bytes values. - 956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval The FLASH User Option Bytes. - 957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void) - 959:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 960:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the User Option Byte */ - 961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return (uint8_t)((FLASH->OPTR & FLASH_OPTR_USER) >> 16U); - 962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 963:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Returns the FLASH Read Protection level. - 966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval FLASH RDP level - 967:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be one of the following values: - 968:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection - 969:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory - 970:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection - 971:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetRDP(void) - 973:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return (uint8_t)(FLASH->OPTR & FLASH_OPTR_RDPROT); - 975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 976:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 977:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 978:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Returns the FLASH BOR level. - 979:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval The BOR level Option Bytes. - 980:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetBOR(void) - 982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the BOR level */ - 984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return (uint8_t)((FLASH->OPTR & (uint32_t)FLASH_OPTR_BOR_LEV) >> 16U); - 985:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 988:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Returns the FLASH BOOT bit1 value. - 989:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval The BOOT bit 1 value Option Bytes. - 990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ - 991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetBOOTBit1(void) - 992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the BOR level */ - 994:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return (FLASH->OPTR & FLASH_OPTR_BOOT1) >> FLASH_OPTR_BOOT1_Pos; - 995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 997:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 998:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** - 999:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Returns the FLASH Write Protection Option Bytes value. -1000:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval The FLASH Write Protection Option Bytes value. -1001:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void) -1003:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - ARM GAS /tmp/cc9alhJF.s page 19 - - -1004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */ -1005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return (uint32_t)(FLASH->WRPR); -1006:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1007:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1008:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || -1009:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** -1010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Returns the FLASH Write Protection Option Bytes value. -1011:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval The FLASH Write Protection Option Bytes value. -1012:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1013:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP2(void) -1014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1015:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */ -1016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return (uint32_t)(FLASH->WRPR2); -1017:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1018:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */ -1019:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || -1021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** -1022:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Write Option Byte of the desired pages of the Flash. -1023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param Sector specifies the sectors to be write protected. -1024:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param Sector2 specifies the sectors to be write protected (only stm32l07xxx and stm32l08xxx d -1025:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param NewState new state of the specified FLASH Pages Write protection. -1026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be: -1027:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_WRPSTATE_ENABLE -1028:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_WRPSTATE_DISABLE -1029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef -1030:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProtectedSectorsConfig(uint32_t Sector, uint32_t Sector2, uint32_ -1032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #else -1033:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** -1034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Write Option Byte of the desired pages of the Flash. -1035:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param Sector specifies the sectors to be write protected. -1036:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param NewState new state of the specified FLASH Pages Write protection. -1037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be: -1038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_WRPSTATE_ENABLE -1039:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_WRPSTATE_DISABLE -1040:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef -1041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1042:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProtectedSectorsConfig(uint32_t Sector, uint32_t NewState) -1043:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif -1044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 25 .loc 1 1044 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 .LVL0: - 30 0000 70B5 push {r4, r5, r6, lr} - 31 .LCFI0: - 32 .cfi_def_cfa_offset 16 - 33 .cfi_offset 4, -16 - 34 .cfi_offset 5, -12 - 35 .cfi_offset 6, -8 - 36 .cfi_offset 14, -4 - 37 0002 0400 movs r4, r0 - 38 0004 0E00 movs r6, r1 - 39 0006 1500 movs r5, r2 - 40 .LVL1: - ARM GAS /tmp/cc9alhJF.s page 20 - - -1045:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; -1046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t WRP_Data = 0; -1047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t OB_WRP = Sector; -1048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1049:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ -1050:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 41 .loc 1 1050 0 - 42 0008 2948 ldr r0, .L9 - 43 .LVL2: - 44 000a FFF7FEFF bl FLASH_WaitForLastOperation - 45 .LVL3: -1051:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1052:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) - 46 .loc 1 1052 0 - 47 000e 0028 cmp r0, #0 - 48 0010 2DD1 bne .L2 -1053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1054:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ -1055:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 49 .loc 1 1055 0 - 50 0012 284B ldr r3, .L9+4 - 51 0014 0022 movs r2, #0 - 52 0016 5A61 str r2, [r3, #20] -1056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Update WRP only if at least 1 selected sector */ -1058:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (OB_WRP != 0x00000000U) - 53 .loc 1 1058 0 - 54 0018 002C cmp r4, #0 - 55 001a 0BD0 beq .L3 -1059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1060:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if ((OB_WRP & WRP_MASK_LOW) != 0x00000000U) - 56 .loc 1 1060 0 - 57 001c 2304 lsls r3, r4, #16 - 58 001e 09D0 beq .L3 -1061:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (NewState != OB_WRPSTATE_DISABLE) - 59 .loc 1 1062 0 - 60 0020 002D cmp r5, #0 - 61 0022 28D0 beq .L4 -1063:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1064:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** WRP_Data = (uint16_t)(((OB_WRP & WRP_MASK_LOW) | OB->WRP01)); - 62 .loc 1 1064 0 - 63 0024 2449 ldr r1, .L9+8 - 64 0026 8B68 ldr r3, [r1, #8] - 65 0028 2343 orrs r3, r4 - 66 002a 9BB2 uxth r3, r3 - 67 .LVL4: -1065:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->WRP01 = (uint32_t)(~(WRP_Data) << 16U) | (WRP_Data); - 68 .loc 1 1065 0 - 69 002c DA43 mvns r2, r3 - 70 002e 1204 lsls r2, r2, #16 - 71 0030 1343 orrs r3, r2 - 72 .LVL5: - 73 0032 8B60 str r3, [r1, #8] - 74 .L3: -1066:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** else - ARM GAS /tmp/cc9alhJF.s page 21 - - -1068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** WRP_Data = (uint16_t)(~OB_WRP & (WRP_MASK_LOW & OB->WRP01)); -1070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->WRP01 = (uint32_t)((~WRP_Data) << 16U) | (WRP_Data); -1071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1073:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || -1075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Update WRP only if at least 1 selected sector */ -1076:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (OB_WRP != 0x00000000U) - 75 .loc 1 1076 0 - 76 0034 002C cmp r4, #0 - 77 0036 0CD0 beq .L5 -1077:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1078:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if ((OB_WRP & WRP_MASK_HIGH) != 0x00000000U) - 78 .loc 1 1078 0 - 79 0038 230C lsrs r3, r4, #16 - 80 003a 0AD0 beq .L5 -1079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (NewState != OB_WRPSTATE_DISABLE) - 81 .loc 1 1080 0 - 82 003c 002D cmp r5, #0 - 83 003e 23D0 beq .L6 -1081:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1082:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** WRP_Data = (uint16_t)((((OB_WRP & WRP_MASK_HIGH) >> 16U | OB->WRP23))); - 84 .loc 1 1082 0 - 85 0040 1C00 movs r4, r3 - 86 .LVL6: - 87 0042 1D4A ldr r2, .L9+8 - 88 0044 D368 ldr r3, [r2, #12] - 89 0046 1C43 orrs r4, r3 - 90 0048 A4B2 uxth r4, r4 - 91 .LVL7: -1083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->WRP23 = (uint32_t)(~(WRP_Data) << 16U) | (WRP_Data); - 92 .loc 1 1083 0 - 93 004a E343 mvns r3, r4 - 94 004c 1B04 lsls r3, r3, #16 - 95 004e 1C43 orrs r4, r3 - 96 .LVL8: - 97 0050 D460 str r4, [r2, #12] - 98 .L5: - 99 .LVL9: -1084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1085:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** else -1086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1087:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** WRP_Data = (uint16_t)((((~OB_WRP & WRP_MASK_HIGH) >> 16U & OB->WRP23))); -1088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->WRP23 = (uint32_t)((~WRP_Data) << 16U) | (WRP_Data); -1089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1091:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1092:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1093:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB_WRP = Sector2; -1094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Update WRP only if at least 1 selected sector */ -1095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (OB_WRP != 0x00000000U) - 100 .loc 1 1095 0 - 101 0052 002E cmp r6, #0 - 102 0054 0BD0 beq .L2 -1096:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - ARM GAS /tmp/cc9alhJF.s page 22 - - -1097:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if ((OB_WRP & WRP_MASK_LOW) != 0x00000000U) - 103 .loc 1 1097 0 - 104 0056 3304 lsls r3, r6, #16 - 105 0058 09D0 beq .L2 -1098:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (NewState != OB_WRPSTATE_DISABLE) - 106 .loc 1 1099 0 - 107 005a 002D cmp r5, #0 - 108 005c 1ED1 bne .L8 -1100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** WRP_Data = (uint16_t)(((OB_WRP & WRP_MASK_LOW) | OB->WRP45)); -1102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->WRP45 =(uint32_t)(~(WRP_Data) << 16U) | (WRP_Data); -1103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** else -1105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** WRP_Data = (uint16_t)(~OB_WRP & (WRP_MASK_LOW & OB->WRP45)); - 109 .loc 1 1106 0 - 110 005e 1649 ldr r1, .L9+8 - 111 0060 0B69 ldr r3, [r1, #16] - 112 0062 B343 bics r3, r6 - 113 0064 9BB2 uxth r3, r3 - 114 .LVL10: -1107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->WRP45 = (uint32_t)((~WRP_Data) << 16U) | (WRP_Data); - 115 .loc 1 1107 0 - 116 0066 DA43 mvns r2, r3 - 117 0068 1204 lsls r2, r2, #16 - 118 006a 1343 orrs r3, r2 - 119 .LVL11: - 120 006c 0B61 str r3, [r1, #16] - 121 .LVL12: - 122 .L2: -1108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* STM32L071xx || STM32L072xx || STM32L073xx || STM32L081xx || STM32L082xx || STM32L083xx */ -1112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ -1114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 123 .loc 1 1114 0 - 124 006e 1048 ldr r0, .L9 - 125 .LVL13: - 126 0070 FFF7FEFF bl FLASH_WaitForLastOperation - 127 .LVL14: -1115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the write protection operation Status */ -1117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; -1118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 128 .loc 1 1118 0 - 129 @ sp needed - 130 .LVL15: - 131 0074 70BD pop {r4, r5, r6, pc} - 132 .LVL16: - 133 .L4: -1069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->WRP01 = (uint32_t)((~WRP_Data) << 16U) | (WRP_Data); - 134 .loc 1 1069 0 - 135 0076 1049 ldr r1, .L9+8 - 136 0078 8B68 ldr r3, [r1, #8] - ARM GAS /tmp/cc9alhJF.s page 23 - - - 137 007a A343 bics r3, r4 - 138 007c 9BB2 uxth r3, r3 - 139 .LVL17: -1070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 140 .loc 1 1070 0 - 141 007e DA43 mvns r2, r3 - 142 0080 1204 lsls r2, r2, #16 - 143 0082 1343 orrs r3, r2 - 144 .LVL18: - 145 0084 8B60 str r3, [r1, #8] - 146 0086 D5E7 b .L3 - 147 .L6: -1087:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->WRP23 = (uint32_t)((~WRP_Data) << 16U) | (WRP_Data); - 148 .loc 1 1087 0 - 149 0088 E443 mvns r4, r4 - 150 .LVL19: - 151 008a 240C lsrs r4, r4, #16 - 152 .LVL20: - 153 008c 0A4A ldr r2, .L9+8 - 154 008e D368 ldr r3, [r2, #12] - 155 0090 2340 ands r3, r4 - 156 .LVL21: -1088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 157 .loc 1 1088 0 - 158 0092 DC43 mvns r4, r3 - 159 0094 2404 lsls r4, r4, #16 - 160 0096 1C43 orrs r4, r3 - 161 0098 D460 str r4, [r2, #12] - 162 009a DAE7 b .L5 - 163 .LVL22: - 164 .L8: -1101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->WRP45 =(uint32_t)(~(WRP_Data) << 16U) | (WRP_Data); - 165 .loc 1 1101 0 - 166 009c 064A ldr r2, .L9+8 - 167 009e 1369 ldr r3, [r2, #16] - 168 00a0 1E43 orrs r6, r3 - 169 .LVL23: - 170 00a2 B6B2 uxth r6, r6 - 171 .LVL24: -1102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 172 .loc 1 1102 0 - 173 00a4 F343 mvns r3, r6 - 174 00a6 1B04 lsls r3, r3, #16 - 175 00a8 1E43 orrs r6, r3 - 176 .LVL25: - 177 00aa 1661 str r6, [r2, #16] - 178 00ac DFE7 b .L2 - 179 .L10: - 180 00ae C046 .align 2 - 181 .L9: - 182 00b0 50C30000 .word 50000 - 183 00b4 00000000 .word pFlash - 184 00b8 0000F81F .word 536346624 - 185 .cfi_endproc - 186 .LFE62: - 188 .section .text.HAL_FLASHEx_Erase,"ax",%progbits - 189 .align 1 - ARM GAS /tmp/cc9alhJF.s page 24 - - - 190 .global HAL_FLASHEx_Erase - 191 .syntax unified - 192 .code 16 - 193 .thumb_func - 194 .fpu softvfp - 196 HAL_FLASHEx_Erase: - 197 .LFB39: - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 198 .loc 1 188 0 - 199 .cfi_startproc - 200 @ args = 0, pretend = 0, frame = 0 - 201 @ frame_needed = 0, uses_anonymous_args = 0 - 202 .LVL26: - 203 0000 F0B5 push {r4, r5, r6, r7, lr} - 204 .LCFI1: - 205 .cfi_def_cfa_offset 20 - 206 .cfi_offset 4, -20 - 207 .cfi_offset 5, -16 - 208 .cfi_offset 6, -12 - 209 .cfi_offset 7, -8 - 210 .cfi_offset 14, -4 - 211 0002 C646 mov lr, r8 - 212 0004 00B5 push {lr} - 213 .LCFI2: - 214 .cfi_def_cfa_offset 24 - 215 .cfi_offset 8, -24 - 216 0006 0600 movs r6, r0 - 217 0008 8846 mov r8, r1 - 218 .LVL27: - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 219 .loc 1 193 0 - 220 000a 204B ldr r3, .L19 - 221 000c 1B7C ldrb r3, [r3, #16] - 222 000e 012B cmp r3, #1 - 223 0010 3AD0 beq .L17 - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 224 .loc 1 193 0 is_stmt 0 discriminator 2 - 225 0012 1E4B ldr r3, .L19 - 226 0014 0122 movs r2, #1 - 227 0016 1A74 strb r2, [r3, #16] - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 228 .loc 1 196 0 is_stmt 1 discriminator 2 - 229 0018 1D48 ldr r0, .L19+4 - 230 .LVL28: - 231 001a FFF7FEFF bl FLASH_WaitForLastOperation - 232 .LVL29: - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 233 .loc 1 198 0 discriminator 2 - 234 001e 0028 cmp r0, #0 - 235 0020 2CD1 bne .L13 - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 236 .loc 1 201 0 - 237 0022 0123 movs r3, #1 - 238 0024 5B42 rsbs r3, r3, #0 - 239 0026 4246 mov r2, r8 - 240 0028 1360 str r3, [r2] - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); - ARM GAS /tmp/cc9alhJF.s page 25 - - - 241 .loc 1 210 0 - 242 002a 7568 ldr r5, [r6, #4] - 243 .LVL30: - 244 .L14: - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) - 245 .loc 1 211 0 discriminator 1 - 246 002c B368 ldr r3, [r6, #8] - 247 002e DB01 lsls r3, r3, #7 - 248 0030 7268 ldr r2, [r6, #4] - 249 0032 9446 mov ip, r2 - 250 0034 6344 add r3, r3, ip - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); - 251 .loc 1 210 0 discriminator 1 - 252 0036 AB42 cmp r3, r5 - 253 0038 20D9 bls .L13 - 254 .LVL31: - 255 .LBB18: - 256 .LBB19: -1119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** -1121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. -1122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param OB_IWDG Selects the WDG mode. -1123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be one of the following values: -1124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_IWDG_SW Software WDG selected -1125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_IWDG_HW Hardware WDG selected -1126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param OB_STOP Reset event when entering STOP mode. -1127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be one of the following values: -1128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_STOP_NORST No reset generated when entering in STOP -1129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_STOP_RST Reset generated when entering in STOP -1130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param OB_STDBY Reset event when entering Standby mode. -1131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be one of the following values: -1132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_STDBY_NORST No reset generated when entering in STANDBY -1133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_STDBY_RST Reset generated when entering in STANDBY -1134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL status -1135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY) -1137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; -1139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t tmp = 0, tmp1 = 0; -1140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ -1142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE(OB_IWDG)); -1143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE(OB_STOP)); -1144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE(OB_STDBY)); -1145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get the User Option byte register */ -1147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp1 = OB->USER & ((~FLASH_OPTR_USER) >> 16U); -1148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Calculate the user option byte to write */ -1150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp = (uint32_t)(((uint32_t)~((uint32_t)((uint32_t)(OB_IWDG) | (uint32_t)(OB_STOP) | (uint32_t)(O -1151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp |= ((uint32_t)(OB_IWDG) | ((uint32_t)OB_STOP) | (uint32_t)(OB_STDBY) | tmp1); -1152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ -1154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); -1155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) -1157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - ARM GAS /tmp/cc9alhJF.s page 26 - - -1158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ -1159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; -1160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Write the User Option Byte */ -1162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->USER = tmp; -1163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ -1165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); -1166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the Option Byte program Status */ -1169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; -1170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #if defined(FLASH_OPTR_BFB2) -1173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** -1174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Configures to boot from Bank1 or Bank2. -1175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param OB_BOOT select the FLASH Bank to boot from. -1176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be one of the following values: -1177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * This parameter can be one of the following values: -1178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOOT_BANK1 BFB2 option bit reset -1179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @arg @ref OB_BOOT_BANK2 BFB2 option bit set -1180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval HAL status -1181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t OB_BOOT) -1183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; -1185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** uint32_t tmp = 0U, tmp1 = 0U; -1186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Check the parameters */ -1188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT_BANK(OB_BOOT)); -1189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get the User Option byte register and BOR Level*/ -1191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp1 = OB->USER & ((~FLASH_OPTR_BFB2) >> 16U); -1192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Calculate the option byte to write */ -1194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp = (uint32_t)~(OB_BOOT | tmp1) << 16U; -1195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp |= (OB_BOOT | tmp1); -1196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ -1198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); -1199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if(status == HAL_OK) -1201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ -1203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; -1204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Write the BOOT Option Byte */ -1206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** OB->USER = tmp; -1207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ -1209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); -1210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } -1211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Return the Option Byte program Status */ -1213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; -1214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - ARM GAS /tmp/cc9alhJF.s page 27 - - -1215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif /* FLASH_OPTR_BFB2 */ -1217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** -1219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} -1220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** -1223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @} -1224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @addtogroup FLASH -1227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ -1228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Functions -1232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @{ -1233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /** -1236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @brief Erases a specified page in program memory. -1237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @param PageAddress The page address in program memory to be erased. -1238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @note A Page is erased in the Program memory only if the address to load -1239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes). -1240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** * @retval None -1241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** */ -1242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress) -1243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { -1244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ -1245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 257 .loc 1 1245 0 - 258 003a 0022 movs r2, #0 - 259 003c 134B ldr r3, .L19 - 260 003e 5A61 str r2, [r3, #20] -1246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Set the ERASE bit */ -1248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); - 261 .loc 1 1248 0 - 262 0040 144C ldr r4, .L19+8 - 263 0042 6168 ldr r1, [r4, #4] - 264 0044 8023 movs r3, #128 - 265 0046 9B00 lsls r3, r3, #2 - 266 0048 0B43 orrs r3, r1 - 267 004a 6360 str r3, [r4, #4] -1249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Set PROG bit */ -1251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PROG); - 268 .loc 1 1251 0 - 269 004c 6368 ldr r3, [r4, #4] - 270 004e 0827 movs r7, #8 - 271 0050 3B43 orrs r3, r7 - 272 0052 6360 str r3, [r4, #4] -1252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** -1253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Write 00000000h to the first word of the program page to erase */ -1254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** *(__IO uint32_t *)(uint32_t)(PageAddress & ~(FLASH_PAGE_SIZE - 1)) = 0x00000000; - 273 .loc 1 1254 0 - ARM GAS /tmp/cc9alhJF.s page 28 - - - 274 0054 7F23 movs r3, #127 - 275 0056 2900 movs r1, r5 - 276 0058 9943 bics r1, r3 - 277 005a 0A60 str r2, [r1] - 278 .LVL32: - 279 .LBE19: - 280 .LBE18: - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 281 .loc 1 217 0 - 282 005c 0C48 ldr r0, .L19+4 - 283 .LVL33: - 284 005e FFF7FEFF bl FLASH_WaitForLastOperation - 285 .LVL34: - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); - 286 .loc 1 220 0 - 287 0062 6368 ldr r3, [r4, #4] - 288 0064 BB43 bics r3, r7 - 289 0066 6360 str r3, [r4, #4] - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 290 .loc 1 221 0 - 291 0068 6368 ldr r3, [r4, #4] - 292 006a 0B4A ldr r2, .L19+12 - 293 006c 1340 ands r3, r2 - 294 006e 6360 str r3, [r4, #4] - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 295 .loc 1 223 0 - 296 0070 0028 cmp r0, #0 - 297 0072 01D1 bne .L18 - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 298 .loc 1 212 0 - 299 0074 8035 adds r5, r5, #128 - 300 .LVL35: - 301 0076 D9E7 b .L14 - 302 .L18: - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** break; - 303 .loc 1 226 0 - 304 0078 4346 mov r3, r8 - 305 007a 1D60 str r5, [r3] - 306 .LVL36: - 307 .L13: - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 308 .loc 1 233 0 - 309 007c 034B ldr r3, .L19 - 310 007e 0022 movs r2, #0 - 311 0080 1A74 strb r2, [r3, #16] - 312 .LVL37: - 313 .L12: - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 314 .loc 1 236 0 - 315 @ sp needed - 316 .LVL38: - 317 .LVL39: - 318 0082 04BC pop {r2} - 319 0084 9046 mov r8, r2 - 320 0086 F0BD pop {r4, r5, r6, r7, pc} - 321 .LVL40: - 322 .L17: - ARM GAS /tmp/cc9alhJF.s page 29 - - - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 323 .loc 1 193 0 - 324 0088 0220 movs r0, #2 - 325 .LVL41: - 326 008a FAE7 b .L12 - 327 .L20: - 328 .align 2 - 329 .L19: - 330 008c 00000000 .word pFlash - 331 0090 50C30000 .word 50000 - 332 0094 00200240 .word 1073881088 - 333 0098 FFFDFFFF .word -513 - 334 .cfi_endproc - 335 .LFE39: - 337 .section .text.HAL_FLASHEx_Erase_IT,"ax",%progbits - 338 .align 1 - 339 .global HAL_FLASHEx_Erase_IT - 340 .syntax unified - 341 .code 16 - 342 .thumb_func - 343 .fpu softvfp - 345 HAL_FLASHEx_Erase_IT: - 346 .LFB40: - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 347 .loc 1 252 0 - 348 .cfi_startproc - 349 @ args = 0, pretend = 0, frame = 0 - 350 @ frame_needed = 0, uses_anonymous_args = 0 - 351 .LVL42: - 352 0000 70B5 push {r4, r5, r6, lr} - 353 .LCFI3: - 354 .cfi_def_cfa_offset 16 - 355 .cfi_offset 4, -16 - 356 .cfi_offset 5, -12 - 357 .cfi_offset 6, -8 - 358 .cfi_offset 14, -4 - 359 0002 0400 movs r4, r0 - 360 .LVL43: - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 361 .loc 1 256 0 - 362 0004 1A4B ldr r3, .L27 - 363 0006 1B78 ldrb r3, [r3] - 364 0008 002B cmp r3, #0 - 365 000a 2CD1 bne .L24 - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 366 .loc 1 268 0 - 367 000c 184B ldr r3, .L27 - 368 000e 1B7C ldrb r3, [r3, #16] - 369 0010 012B cmp r3, #1 - 370 0012 2AD0 beq .L25 - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 371 .loc 1 268 0 is_stmt 0 discriminator 2 - 372 0014 164B ldr r3, .L27 - 373 0016 0122 movs r2, #1 - 374 0018 1A74 strb r2, [r3, #16] - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 375 .loc 1 271 0 is_stmt 1 discriminator 2 - ARM GAS /tmp/cc9alhJF.s page 30 - - - 376 001a 1648 ldr r0, .L27+4 - 377 .LVL44: - 378 001c FFF7FEFF bl FLASH_WaitForLastOperation - 379 .LVL45: - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 380 .loc 1 273 0 discriminator 2 - 381 0020 0028 cmp r0, #0 - 382 0022 03D0 beq .L26 - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 383 .loc 1 288 0 - 384 0024 124B ldr r3, .L27 - 385 0026 0022 movs r2, #0 - 386 0028 1A74 strb r2, [r3, #16] - 387 002a 1DE0 b .L22 - 388 .L26: - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 389 .loc 1 276 0 - 390 002c 124B ldr r3, .L27+8 - 391 002e 5968 ldr r1, [r3, #4] - 392 0030 C022 movs r2, #192 - 393 0032 9202 lsls r2, r2, #10 - 394 0034 0A43 orrs r2, r1 - 395 0036 5A60 str r2, [r3, #4] - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.NbPagesToErase = pEraseInit->NbPages; - 396 .loc 1 278 0 - 397 0038 0D4A ldr r2, .L27 - 398 003a 0121 movs r1, #1 - 399 003c 1170 strb r1, [r2] - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pFlash.Page = pEraseInit->PageAddress; - 400 .loc 1 279 0 - 401 003e A168 ldr r1, [r4, #8] - 402 0040 5160 str r1, [r2, #4] - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 403 .loc 1 280 0 - 404 0042 6168 ldr r1, [r4, #4] - 405 0044 D160 str r1, [r2, #12] - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 406 .loc 1 283 0 - 407 0046 6168 ldr r1, [r4, #4] - 408 .LVL46: - 409 .LBB20: - 410 .LBB21: -1245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 411 .loc 1 1245 0 - 412 0048 0024 movs r4, #0 - 413 .LVL47: - 414 004a 5461 str r4, [r2, #20] -1248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 415 .loc 1 1248 0 - 416 004c 5D68 ldr r5, [r3, #4] - 417 004e 8022 movs r2, #128 - 418 0050 9200 lsls r2, r2, #2 - 419 0052 2A43 orrs r2, r5 - 420 0054 5A60 str r2, [r3, #4] -1251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 421 .loc 1 1251 0 - 422 0056 5A68 ldr r2, [r3, #4] - ARM GAS /tmp/cc9alhJF.s page 31 - - - 423 0058 0825 movs r5, #8 - 424 005a 2A43 orrs r2, r5 - 425 005c 5A60 str r2, [r3, #4] - 426 .loc 1 1254 0 - 427 005e 7F23 movs r3, #127 - 428 0060 9943 bics r1, r3 - 429 .LVL48: - 430 0062 0C60 str r4, [r1] - 431 0064 00E0 b .L22 - 432 .LVL49: - 433 .L24: - 434 .LBE21: - 435 .LBE20: - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 436 .loc 1 258 0 - 437 0066 0120 movs r0, #1 - 438 .LVL50: - 439 .L22: - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 440 .loc 1 292 0 - 441 @ sp needed - 442 0068 70BD pop {r4, r5, r6, pc} - 443 .LVL51: - 444 .L25: - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 445 .loc 1 268 0 - 446 006a 0220 movs r0, #2 - 447 .LVL52: - 448 006c FCE7 b .L22 - 449 .L28: - 450 006e C046 .align 2 - 451 .L27: - 452 0070 00000000 .word pFlash - 453 0074 50C30000 .word 50000 - 454 0078 00200240 .word 1073881088 - 455 .cfi_endproc - 456 .LFE40: - 458 .section .text.HAL_FLASHEx_OBProgram,"ax",%progbits - 459 .align 1 - 460 .global HAL_FLASHEx_OBProgram - 461 .syntax unified - 462 .code 16 - 463 .thumb_func - 464 .fpu softvfp - 466 HAL_FLASHEx_OBProgram: - 467 .LFB41: - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 468 .loc 1 344 0 - 469 .cfi_startproc - 470 @ args = 0, pretend = 0, frame = 0 - 471 @ frame_needed = 0, uses_anonymous_args = 0 - 472 .LVL53: - 473 0000 70B5 push {r4, r5, r6, lr} - 474 .LCFI4: - 475 .cfi_def_cfa_offset 16 - 476 .cfi_offset 4, -16 - 477 .cfi_offset 5, -12 - ARM GAS /tmp/cc9alhJF.s page 32 - - - 478 .cfi_offset 6, -8 - 479 .cfi_offset 14, -4 - 480 0002 0400 movs r4, r0 - 481 .LVL54: - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 482 .loc 1 348 0 - 483 0004 514B ldr r3, .L50 - 484 0006 1B7C ldrb r3, [r3, #16] - 485 0008 012B cmp r3, #1 - 486 000a 00D1 bne .LCB475 - 487 000c 9CE0 b .L40 @long jump - 488 .LCB475: - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 489 .loc 1 348 0 is_stmt 0 discriminator 2 - 490 000e 0123 movs r3, #1 - 491 0010 4E4A ldr r2, .L50 - 492 0012 1374 strb r3, [r2, #16] - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 493 .loc 1 354 0 is_stmt 1 discriminator 2 - 494 0014 0268 ldr r2, [r0] - 495 0016 1342 tst r3, r2 - 496 0018 11D1 bne .L42 - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 497 .loc 1 345 0 - 498 001a 0120 movs r0, #1 - 499 .LVL55: - 500 .L31: - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 501 .loc 1 371 0 - 502 001c 2368 ldr r3, [r4] - 503 001e 9B07 lsls r3, r3, #30 - 504 0020 18D4 bmi .L43 - 505 .LVL56: - 506 .L32: - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 507 .loc 1 383 0 - 508 0022 2368 ldr r3, [r4] - 509 0024 5B07 lsls r3, r3, #29 - 510 0026 34D4 bmi .L44 - 511 .LVL57: - 512 .L34: - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 513 .loc 1 397 0 - 514 0028 2368 ldr r3, [r4] - 515 002a 1B07 lsls r3, r3, #28 - 516 002c 56D4 bmi .L45 - 517 .LVL58: - 518 .L36: - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 519 .loc 1 409 0 - 520 002e 2368 ldr r3, [r4] - 521 0030 DB06 lsls r3, r3, #27 - 522 0032 00D5 bpl .LCB522 - 523 0034 6FE0 b .L46 @long jump - 524 .LCB522: - 525 .LVL59: - 526 .L38: - ARM GAS /tmp/cc9alhJF.s page 33 - - - 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 527 .loc 1 414 0 - 528 0036 454B ldr r3, .L50 - 529 0038 0022 movs r2, #0 - 530 003a 1A74 strb r2, [r3, #16] - 531 .LVL60: - 532 .L30: - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 533 .loc 1 417 0 - 534 @ sp needed - 535 003c 70BD pop {r4, r5, r6, pc} - 536 .LVL61: - 537 .L42: - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #else - 538 .loc 1 358 0 - 539 003e 4268 ldr r2, [r0, #4] - 540 0040 C168 ldr r1, [r0, #12] - 541 0042 8068 ldr r0, [r0, #8] - 542 .LVL62: - 543 0044 FFF7FEFF bl FLASH_OB_ProtectedSectorsConfig - 544 .LVL63: - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 545 .loc 1 362 0 - 546 0048 0028 cmp r0, #0 - 547 004a E7D0 beq .L31 - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 548 .loc 1 365 0 - 549 004c 3F4B ldr r3, .L50 - 550 004e 0022 movs r2, #0 - 551 0050 1A74 strb r2, [r3, #16] - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 552 .loc 1 366 0 - 553 0052 F3E7 b .L30 - 554 .L43: - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status != HAL_OK) - 555 .loc 1 373 0 - 556 0054 237C ldrb r3, [r4, #16] - 557 .LVL64: - 558 .LBB30: - 559 .LBB31: - 838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 560 .loc 1 838 0 - 561 0056 3E4A ldr r2, .L50+4 - 562 0058 1168 ldr r1, [r2] - 563 .LVL65: - 842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 564 .loc 1 842 0 - 565 005a 1268 ldr r2, [r2] - 566 005c 8021 movs r1, #128 - 567 005e 4900 lsls r1, r1, #1 - 568 0060 0A40 ands r2, r1 - 569 .LVL66: - 846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)(OB_RDP | tmp3))); - 570 .loc 1 846 0 - 571 0062 1343 orrs r3, r2 - 572 .LVL67: - 573 0064 DD43 mvns r5, r3 - ARM GAS /tmp/cc9alhJF.s page 34 - - - 574 .LVL68: - 847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 575 .loc 1 847 0 - 576 0066 2D04 lsls r5, r5, #16 - 577 .LVL69: - 578 0068 1D43 orrs r5, r3 - 579 .LVL70: - 850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 580 .loc 1 850 0 - 581 006a 3A48 ldr r0, .L50+8 - 582 .LVL71: - 583 006c FFF7FEFF bl FLASH_WaitForLastOperation - 584 .LVL72: - 852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 585 .loc 1 852 0 - 586 0070 0028 cmp r0, #0 - 587 0072 05D0 beq .L47 - 588 .LVL73: - 589 .L33: - 590 .LBE31: - 591 .LBE30: - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 592 .loc 1 374 0 - 593 0074 0028 cmp r0, #0 - 594 0076 D4D0 beq .L32 - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 595 .loc 1 377 0 - 596 0078 344B ldr r3, .L50 - 597 007a 0022 movs r2, #0 - 598 007c 1A74 strb r2, [r3, #16] - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 599 .loc 1 378 0 - 600 007e DDE7 b .L30 - 601 .LVL74: - 602 .L47: - 603 .LBB33: - 604 .LBB32: - 855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 605 .loc 1 855 0 - 606 0080 324B ldr r3, .L50 - 607 0082 0022 movs r2, #0 - 608 0084 5A61 str r2, [r3, #20] - 858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 609 .loc 1 858 0 - 610 0086 324B ldr r3, .L50+4 - 611 0088 1D60 str r5, [r3] - 861:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 612 .loc 1 861 0 - 613 008a 3248 ldr r0, .L50+8 - 614 .LVL75: - 615 008c FFF7FEFF bl FLASH_WaitForLastOperation - 616 .LVL76: - 617 0090 F0E7 b .L33 - 618 .LVL77: - 619 .L44: - 620 .LBE32: - 621 .LBE33: - ARM GAS /tmp/cc9alhJF.s page 35 - - - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->USERConfig & OB_STOP_NORST, - 622 .loc 1 385 0 - 623 0092 A37C ldrb r3, [r4, #18] - 624 0094 1021 movs r1, #16 - 625 0096 1940 ands r1, r3 - 626 0098 2020 movs r0, #32 - 627 .LVL78: - 628 009a 1840 ands r0, r3 - 629 009c 4022 movs r2, #64 - 630 009e 1A40 ands r2, r3 - 631 .LVL79: - 632 .LBB34: - 633 .LBB35: -1147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 634 .loc 1 1147 0 - 635 00a0 2B4B ldr r3, .L50+4 - 636 00a2 5B68 ldr r3, [r3, #4] - 637 00a4 2C4D ldr r5, .L50+12 - 638 00a6 2B40 ands r3, r5 - 639 .LVL80: -1150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp |= ((uint32_t)(OB_IWDG) | ((uint32_t)OB_STOP) | (uint32_t)(OB_STDBY) | tmp1); - 640 .loc 1 1150 0 - 641 00a8 0143 orrs r1, r0 - 642 .LVL81: - 643 00aa 0A43 orrs r2, r1 - 644 .LVL82: - 645 00ac 1343 orrs r3, r2 - 646 .LVL83: - 647 00ae DD43 mvns r5, r3 - 648 00b0 2D04 lsls r5, r5, #16 - 649 .LVL84: -1151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 650 .loc 1 1151 0 - 651 00b2 1D43 orrs r5, r3 - 652 .LVL85: -1154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 653 .loc 1 1154 0 - 654 00b4 2748 ldr r0, .L50+8 - 655 .LVL86: - 656 00b6 FFF7FEFF bl FLASH_WaitForLastOperation - 657 .LVL87: -1156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 658 .loc 1 1156 0 - 659 00ba 0028 cmp r0, #0 - 660 00bc 05D0 beq .L48 - 661 .LVL88: - 662 .L35: - 663 .LBE35: - 664 .LBE34: - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 665 .loc 1 388 0 - 666 00be 0028 cmp r0, #0 - 667 00c0 B2D0 beq .L34 - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 668 .loc 1 391 0 - 669 00c2 224B ldr r3, .L50 - 670 00c4 0022 movs r2, #0 - ARM GAS /tmp/cc9alhJF.s page 36 - - - 671 00c6 1A74 strb r2, [r3, #16] - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 672 .loc 1 392 0 - 673 00c8 B8E7 b .L30 - 674 .LVL89: - 675 .L48: - 676 .LBB37: - 677 .LBB36: -1159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 678 .loc 1 1159 0 - 679 00ca 204B ldr r3, .L50 - 680 00cc 0022 movs r2, #0 - 681 00ce 5A61 str r2, [r3, #20] -1162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 682 .loc 1 1162 0 - 683 00d0 1F4B ldr r3, .L50+4 - 684 00d2 5D60 str r5, [r3, #4] -1165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 685 .loc 1 1165 0 - 686 00d4 1F48 ldr r0, .L50+8 - 687 .LVL90: - 688 00d6 FFF7FEFF bl FLASH_WaitForLastOperation - 689 .LVL91: - 690 00da F0E7 b .L35 - 691 .LVL92: - 692 .L45: - 693 .LBE36: - 694 .LBE37: - 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if (status != HAL_OK) - 695 .loc 1 399 0 - 696 00dc 637C ldrb r3, [r4, #17] - 697 .LVL93: - 698 .LBB38: - 699 .LBB39: - 890:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 700 .loc 1 890 0 - 701 00de 1C4A ldr r2, .L50+4 - 702 00e0 5268 ldr r2, [r2, #4] - 703 00e2 1E49 ldr r1, .L50+16 - 704 00e4 0A40 ands r2, r1 - 705 .LVL94: - 893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp |= (OB_BOR | tmp1); - 706 .loc 1 893 0 - 707 00e6 1343 orrs r3, r2 - 708 .LVL95: - 709 00e8 DD43 mvns r5, r3 - 710 00ea 2D04 lsls r5, r5, #16 - 711 .LVL96: - 894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 712 .loc 1 894 0 - 713 00ec 1D43 orrs r5, r3 - 714 .LVL97: - 897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 715 .loc 1 897 0 - 716 00ee 1948 ldr r0, .L50+8 - 717 .LVL98: - 718 00f0 FFF7FEFF bl FLASH_WaitForLastOperation - ARM GAS /tmp/cc9alhJF.s page 37 - - - 719 .LVL99: - 899:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 720 .loc 1 899 0 - 721 00f4 0028 cmp r0, #0 - 722 00f6 05D0 beq .L49 - 723 .LVL100: - 724 .L37: - 725 .LBE39: - 726 .LBE38: - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 727 .loc 1 400 0 - 728 00f8 0028 cmp r0, #0 - 729 00fa 98D0 beq .L36 - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** return status; - 730 .loc 1 403 0 - 731 00fc 134B ldr r3, .L50 - 732 00fe 0022 movs r2, #0 - 733 0100 1A74 strb r2, [r3, #16] - 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 734 .loc 1 404 0 - 735 0102 9BE7 b .L30 - 736 .LVL101: - 737 .L49: - 738 .LBB41: - 739 .LBB40: - 902:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 740 .loc 1 902 0 - 741 0104 114B ldr r3, .L50 - 742 0106 0022 movs r2, #0 - 743 0108 5A61 str r2, [r3, #20] - 905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 744 .loc 1 905 0 - 745 010a 114B ldr r3, .L50+4 - 746 010c 5D60 str r5, [r3, #4] - 908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 747 .loc 1 908 0 - 748 010e 1148 ldr r0, .L50+8 - 749 .LVL102: - 750 0110 FFF7FEFF bl FLASH_WaitForLastOperation - 751 .LVL103: - 752 0114 F0E7 b .L37 - 753 .LVL104: - 754 .L46: - 755 .LBE40: - 756 .LBE41: - 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 757 .loc 1 411 0 - 758 0116 E37C ldrb r3, [r4, #19] - 759 .LVL105: - 760 .LBB42: - 761 .LBB43: - 926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 762 .loc 1 926 0 - 763 0118 DB03 lsls r3, r3, #15 - 764 .LVL106: - 932:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 765 .loc 1 932 0 - ARM GAS /tmp/cc9alhJF.s page 38 - - - 766 011a 0D4A ldr r2, .L50+4 - 767 011c 5268 ldr r2, [r2, #4] - 768 011e 5204 lsls r2, r2, #17 - 769 0120 520C lsrs r2, r2, #17 - 770 .LVL107: - 935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp |= OB_Bits | tmp1; - 771 .loc 1 935 0 - 772 0122 1343 orrs r3, r2 - 773 .LVL108: - 774 0124 DC43 mvns r4, r3 - 775 .LVL109: - 776 0126 2404 lsls r4, r4, #16 - 777 .LVL110: - 936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 778 .loc 1 936 0 - 779 0128 1C43 orrs r4, r3 - 780 .LVL111: - 939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 781 .loc 1 939 0 - 782 012a 0A48 ldr r0, .L50+8 - 783 .LVL112: - 784 012c FFF7FEFF bl FLASH_WaitForLastOperation - 785 .LVL113: - 941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 786 .loc 1 941 0 - 787 0130 0028 cmp r0, #0 - 788 0132 00D0 beq .LCB858 - 789 0134 7FE7 b .L38 @long jump - 790 .LCB858: - 944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Program OB */ - 791 .loc 1 944 0 - 792 0136 054B ldr r3, .L50 - 793 0138 0022 movs r2, #0 - 794 013a 5A61 str r2, [r3, #20] - 946:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ - 795 .loc 1 946 0 - 796 013c 044B ldr r3, .L50+4 - 797 013e 5C60 str r4, [r3, #4] - 948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 798 .loc 1 948 0 - 799 0140 0448 ldr r0, .L50+8 - 800 .LVL114: - 801 0142 FFF7FEFF bl FLASH_WaitForLastOperation - 802 .LVL115: - 803 0146 76E7 b .L38 - 804 .LVL116: - 805 .L40: - 806 .LBE43: - 807 .LBE42: - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 808 .loc 1 348 0 - 809 0148 0220 movs r0, #2 - 810 .LVL117: - 811 014a 77E7 b .L30 - 812 .L51: - 813 .align 2 - 814 .L50: - ARM GAS /tmp/cc9alhJF.s page 39 - - - 815 014c 00000000 .word pFlash - 816 0150 0000F81F .word 536346624 - 817 0154 50C30000 .word 50000 - 818 0158 8FFF0000 .word 65423 - 819 015c F0FF0000 .word 65520 - 820 .cfi_endproc - 821 .LFE41: - 823 .section .text.HAL_FLASHEx_OBGetConfig,"ax",%progbits - 824 .align 1 - 825 .global HAL_FLASHEx_OBGetConfig - 826 .syntax unified - 827 .code 16 - 828 .thumb_func - 829 .fpu softvfp - 831 HAL_FLASHEx_OBGetConfig: - 832 .LFB42: - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR; - 833 .loc 1 427 0 - 834 .cfi_startproc - 835 @ args = 0, pretend = 0, frame = 0 - 836 @ frame_needed = 0, uses_anonymous_args = 0 - 837 @ link register save eliminated. - 838 .LVL118: - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 839 .loc 1 428 0 - 840 0000 0F23 movs r3, #15 - 841 0002 0360 str r3, [r0] - 842 .LBB44: - 843 .LBB45: -1005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 844 .loc 1 1005 0 - 845 0004 0A4B ldr r3, .L53 - 846 0006 1A6A ldr r2, [r3, #32] - 847 .LBE45: - 848 .LBE44: - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 849 .loc 1 431 0 - 850 0008 8260 str r2, [r0, #8] - 851 .LBB46: - 852 .LBB47: -1016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 853 .loc 1 1016 0 - 854 000a 8022 movs r2, #128 - 855 000c 9A58 ldr r2, [r3, r2] - 856 .LBE47: - 857 .LBE46: - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 858 .loc 1 434 0 - 859 000e C260 str r2, [r0, #12] - 860 .LBB48: - 861 .LBB49: - 974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 862 .loc 1 974 0 - 863 0010 DA69 ldr r2, [r3, #28] - 864 .LBE49: - 865 .LBE48: - 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9alhJF.s page 40 - - - 866 .loc 1 438 0 - 867 0012 0274 strb r2, [r0, #16] - 868 .LBB50: - 869 .LBB51: - 961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 870 .loc 1 961 0 - 871 0014 D969 ldr r1, [r3, #28] - 872 0016 090C lsrs r1, r1, #16 - 873 0018 7022 movs r2, #112 - 874 001a 0A40 ands r2, r1 - 875 .LBE51: - 876 .LBE50: - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 877 .loc 1 441 0 - 878 001c 8274 strb r2, [r0, #18] - 879 .LBB52: - 880 .LBB53: - 984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 881 .loc 1 984 0 - 882 001e D969 ldr r1, [r3, #28] - 883 0020 090C lsrs r1, r1, #16 - 884 0022 0F22 movs r2, #15 - 885 0024 0A40 ands r2, r1 - 886 .LBE53: - 887 .LBE52: - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 888 .loc 1 444 0 - 889 0026 4274 strb r2, [r0, #17] - 890 .LBB54: - 891 .LBB55: - 994:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 892 .loc 1 994 0 - 893 0028 DB69 ldr r3, [r3, #28] - 894 002a DB0F lsrs r3, r3, #31 - 895 .LBE55: - 896 .LBE54: - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 897 .loc 1 447 0 - 898 002c C374 strb r3, [r0, #19] - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 899 .loc 1 448 0 - 900 @ sp needed - 901 002e 7047 bx lr - 902 .L54: - 903 .align 2 - 904 .L53: - 905 0030 00200240 .word 1073881088 - 906 .cfi_endproc - 907 .LFE42: - 909 .section .text.HAL_FLASHEx_AdvOBProgram,"ax",%progbits - 910 .align 1 - 911 .global HAL_FLASHEx_AdvOBProgram - 912 .syntax unified - 913 .code 16 - 914 .thumb_func - 915 .fpu softvfp - 917 HAL_FLASHEx_AdvOBProgram: - ARM GAS /tmp/cc9alhJF.s page 41 - - - 918 .LFB43: - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 919 .loc 1 460 0 - 920 .cfi_startproc - 921 @ args = 0, pretend = 0, frame = 0 - 922 @ frame_needed = 0, uses_anonymous_args = 0 - 923 .LVL119: - 924 0000 10B5 push {r4, lr} - 925 .LCFI5: - 926 .cfi_def_cfa_offset 8 - 927 .cfi_offset 4, -8 - 928 .cfi_offset 14, -4 - 929 0002 0400 movs r4, r0 - 930 .LVL120: - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 931 .loc 1 469 0 - 932 0004 0368 ldr r3, [r0] - 933 0006 DB07 lsls r3, r3, #31 - 934 0008 04D4 bmi .L60 - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 935 .loc 1 461 0 - 936 000a 0120 movs r0, #1 - 937 .LVL121: - 938 .L56: - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 939 .loc 1 485 0 - 940 000c 2368 ldr r3, [r4] - 941 000e 9B07 lsls r3, r3, #30 - 942 0010 06D4 bmi .L61 - 943 .LVL122: - 944 .L57: - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 945 .loc 1 493 0 - 946 @ sp needed - 947 0012 10BD pop {r4, pc} - 948 .LVL123: - 949 .L60: - 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #else - 950 .loc 1 474 0 - 951 0014 4268 ldr r2, [r0, #4] - 952 0016 C168 ldr r1, [r0, #12] - 953 0018 8068 ldr r0, [r0, #8] - 954 .LVL124: - 955 001a FFF7FEFF bl FLASH_OB_ProtectedSectorsConfig - 956 .LVL125: - 957 001e F5E7 b .L56 - 958 .L61: - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 959 .loc 1 487 0 - 960 0020 237C ldrb r3, [r4, #16] - 961 .LVL126: - 962 .LBB58: - 963 .LBB59: -1191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 964 .loc 1 1191 0 - 965 0022 0B4A ldr r2, .L62 - 966 0024 5268 ldr r2, [r2, #4] - ARM GAS /tmp/cc9alhJF.s page 42 - - - 967 0026 0B49 ldr r1, .L62+4 - 968 0028 0A40 ands r2, r1 - 969 .LVL127: -1194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp |= (OB_BOOT | tmp1); - 970 .loc 1 1194 0 - 971 002a 1343 orrs r3, r2 - 972 .LVL128: - 973 002c DC43 mvns r4, r3 - 974 .LVL129: - 975 002e 2404 lsls r4, r4, #16 - 976 .LVL130: -1195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 977 .loc 1 1195 0 - 978 0030 1C43 orrs r4, r3 - 979 .LVL131: -1198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 980 .loc 1 1198 0 - 981 0032 0948 ldr r0, .L62+8 - 982 .LVL132: - 983 0034 FFF7FEFF bl FLASH_WaitForLastOperation - 984 .LVL133: -1200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 985 .loc 1 1200 0 - 986 0038 0028 cmp r0, #0 - 987 003a EAD1 bne .L57 -1203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 988 .loc 1 1203 0 - 989 003c 074B ldr r3, .L62+12 - 990 003e 0022 movs r2, #0 - 991 0040 5A61 str r2, [r3, #20] -1206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 992 .loc 1 1206 0 - 993 0042 034B ldr r3, .L62 - 994 0044 5C60 str r4, [r3, #4] -1209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 995 .loc 1 1209 0 - 996 0046 0448 ldr r0, .L62+8 - 997 .LVL134: - 998 0048 FFF7FEFF bl FLASH_WaitForLastOperation - 999 .LVL135: - 1000 004c E1E7 b .L57 - 1001 .L63: - 1002 004e C046 .align 2 - 1003 .L62: - 1004 0050 0000F81F .word 536346624 - 1005 0054 7FFF0000 .word 65407 - 1006 0058 50C30000 .word 50000 - 1007 005c 00000000 .word pFlash - 1008 .LBE59: - 1009 .LBE58: - 1010 .cfi_endproc - 1011 .LFE43: - 1013 .section .text.HAL_FLASHEx_AdvOBGetConfig,"ax",%progbits - 1014 .align 1 - 1015 .global HAL_FLASHEx_AdvOBGetConfig - 1016 .syntax unified - 1017 .code 16 - ARM GAS /tmp/cc9alhJF.s page 43 - - - 1018 .thumb_func - 1019 .fpu softvfp - 1021 HAL_FLASHEx_AdvOBGetConfig: - 1022 .LFB44: - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** pAdvOBInit->OptionType = 0; - 1023 .loc 1 503 0 - 1024 .cfi_startproc - 1025 @ args = 0, pretend = 0, frame = 0 - 1026 @ frame_needed = 0, uses_anonymous_args = 0 - 1027 @ link register save eliminated. - 1028 .LVL136: - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1029 .loc 1 508 0 - 1030 0000 0122 movs r2, #1 - 1031 0002 0260 str r2, [r0] - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Get PCROP protected sector */ - 1032 .loc 1 512 0 - 1033 0004 084B ldr r3, .L65 - 1034 0006 D969 ldr r1, [r3, #28] - 1035 0008 090A lsrs r1, r1, #8 - 1036 000a 0A40 ands r2, r1 - 1037 000c 4260 str r2, [r0, #4] - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1038 .loc 1 514 0 - 1039 000e 1A6A ldr r2, [r3, #32] - 1040 0010 8260 str r2, [r0, #8] - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** #endif - 1041 .loc 1 518 0 - 1042 0012 8022 movs r2, #128 - 1043 0014 9A58 ldr r2, [r3, r2] - 1044 0016 C260 str r2, [r0, #12] - 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1045 .loc 1 524 0 - 1046 0018 0322 movs r2, #3 - 1047 001a 0260 str r2, [r0] - 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1048 .loc 1 527 0 - 1049 001c DA69 ldr r2, [r3, #28] - 1050 001e 120C lsrs r2, r2, #16 - 1051 0020 8023 movs r3, #128 - 1052 0022 1340 ands r3, r2 - 1053 0024 0382 strh r3, [r0, #16] - 530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1054 .loc 1 530 0 - 1055 @ sp needed - 1056 0026 7047 bx lr - 1057 .L66: - 1058 .align 2 - 1059 .L65: - 1060 0028 00200240 .word 1073881088 - 1061 .cfi_endproc - 1062 .LFE44: - 1064 .section .text.HAL_FLASHEx_OB_SelectPCROP,"ax",%progbits - 1065 .align 1 - 1066 .global HAL_FLASHEx_OB_SelectPCROP - 1067 .syntax unified - 1068 .code 16 - ARM GAS /tmp/cc9alhJF.s page 44 - - - 1069 .thumb_func - 1070 .fpu softvfp - 1072 HAL_FLASHEx_OB_SelectPCROP: - 1073 .LFB45: - 543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; - 1074 .loc 1 543 0 - 1075 .cfi_startproc - 1076 @ args = 0, pretend = 0, frame = 0 - 1077 @ frame_needed = 0, uses_anonymous_args = 0 - 1078 0000 10B5 push {r4, lr} - 1079 .LCFI6: - 1080 .cfi_def_cfa_offset 8 - 1081 .cfi_offset 4, -8 - 1082 .cfi_offset 14, -4 - 1083 .LVL137: - 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1084 .loc 1 550 0 - 1085 0002 0B48 ldr r0, .L70 - 1086 0004 FFF7FEFF bl FLASH_WaitForLastOperation - 1087 .LVL138: - 553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1088 .loc 1 553 0 - 1089 0008 0A4B ldr r3, .L70+4 - 1090 000a 1B78 ldrb r3, [r3] - 1091 .LVL139: - 556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1092 .loc 1 556 0 - 1093 000c 8022 movs r2, #128 - 1094 000e 5200 lsls r2, r2, #1 - 1095 0010 1A43 orrs r2, r3 - 1096 .LVL140: - 559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2)); - 1097 .loc 1 559 0 - 1098 0012 D343 mvns r3, r2 - 1099 .LVL141: - 560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1100 .loc 1 560 0 - 1101 0014 1B04 lsls r3, r3, #16 - 1102 .LVL142: - 1103 0016 1343 orrs r3, r2 - 1104 .LVL143: - 562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 1105 .loc 1 562 0 - 1106 0018 0028 cmp r0, #0 - 1107 001a 00D0 beq .L69 - 1108 .LVL144: - 1109 .L68: - 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1110 .loc 1 576 0 - 1111 @ sp needed - 1112 001c 10BD pop {r4, pc} - 1113 .LVL145: - 1114 .L69: - 565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1115 .loc 1 565 0 - 1116 001e 064A ldr r2, .L70+8 - 1117 .LVL146: - ARM GAS /tmp/cc9alhJF.s page 45 - - - 1118 0020 0021 movs r1, #0 - 1119 0022 5161 str r1, [r2, #20] - 568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1120 .loc 1 568 0 - 1121 0024 034A ldr r2, .L70+4 - 1122 0026 1360 str r3, [r2] - 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1123 .loc 1 571 0 - 1124 0028 0148 ldr r0, .L70 - 1125 .LVL147: - 1126 002a FFF7FEFF bl FLASH_WaitForLastOperation - 1127 .LVL148: - 1128 002e F5E7 b .L68 - 1129 .L71: - 1130 .align 2 - 1131 .L70: - 1132 0030 50C30000 .word 50000 - 1133 0034 0000F81F .word 536346624 - 1134 0038 00000000 .word pFlash - 1135 .cfi_endproc - 1136 .LFE45: - 1138 .section .text.HAL_FLASHEx_OB_DeSelectPCROP,"ax",%progbits - 1139 .align 1 - 1140 .global HAL_FLASHEx_OB_DeSelectPCROP - 1141 .syntax unified - 1142 .code 16 - 1143 .thumb_func - 1144 .fpu softvfp - 1146 HAL_FLASHEx_OB_DeSelectPCROP: - 1147 .LFB46: - 585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; - 1148 .loc 1 585 0 - 1149 .cfi_startproc - 1150 @ args = 0, pretend = 0, frame = 0 - 1151 @ frame_needed = 0, uses_anonymous_args = 0 - 1152 0000 10B5 push {r4, lr} - 1153 .LCFI7: - 1154 .cfi_def_cfa_offset 8 - 1155 .cfi_offset 4, -8 - 1156 .cfi_offset 14, -4 - 1157 .LVL149: - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1158 .loc 1 592 0 - 1159 0002 0A48 ldr r0, .L75 - 1160 0004 FFF7FEFF bl FLASH_WaitForLastOperation - 1161 .LVL150: - 595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1162 .loc 1 595 0 - 1163 0008 094B ldr r3, .L75+4 - 1164 000a 1A78 ldrb r2, [r3] - 1165 000c D2B2 uxtb r2, r2 - 1166 .LVL151: - 601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** tmp2 = (uint32_t)(((uint32_t)((uint32_t)(tmp1) << 16U)) | ((uint32_t)optiontmp2)); - 1167 .loc 1 601 0 - 1168 000e D343 mvns r3, r2 - 1169 .LVL152: - 602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9alhJF.s page 46 - - - 1170 .loc 1 602 0 - 1171 0010 1B04 lsls r3, r3, #16 - 1172 .LVL153: - 1173 0012 1343 orrs r3, r2 - 1174 .LVL154: - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 1175 .loc 1 604 0 - 1176 0014 0028 cmp r0, #0 - 1177 0016 00D0 beq .L74 - 1178 .LVL155: - 1179 .L73: - 618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1180 .loc 1 618 0 - 1181 @ sp needed - 1182 0018 10BD pop {r4, pc} - 1183 .LVL156: - 1184 .L74: - 607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1185 .loc 1 607 0 - 1186 001a 064A ldr r2, .L75+8 - 1187 .LVL157: - 1188 001c 0021 movs r1, #0 - 1189 001e 5161 str r1, [r2, #20] - 610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1190 .loc 1 610 0 - 1191 0020 034A ldr r2, .L75+4 - 1192 0022 1360 str r3, [r2] - 613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1193 .loc 1 613 0 - 1194 0024 0148 ldr r0, .L75 - 1195 .LVL158: - 1196 0026 FFF7FEFF bl FLASH_WaitForLastOperation - 1197 .LVL159: - 1198 002a F5E7 b .L73 - 1199 .L76: - 1200 .align 2 - 1201 .L75: - 1202 002c 50C30000 .word 50000 - 1203 0030 0000F81F .word 536346624 - 1204 0034 00000000 .word pFlash - 1205 .cfi_endproc - 1206 .LFE46: - 1208 .section .text.HAL_FLASHEx_DATAEEPROM_Unlock,"ax",%progbits - 1209 .align 1 - 1210 .global HAL_FLASHEx_DATAEEPROM_Unlock - 1211 .syntax unified - 1212 .code 16 - 1213 .thumb_func - 1214 .fpu softvfp - 1216 HAL_FLASHEx_DATAEEPROM_Unlock: - 1217 .LFB47: - 651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** if((FLASH->PECR & FLASH_PECR_PELOCK) != RESET) - 1218 .loc 1 651 0 - 1219 .cfi_startproc - 1220 @ args = 0, pretend = 0, frame = 0 - 1221 @ frame_needed = 0, uses_anonymous_args = 0 - 1222 @ link register save eliminated. - ARM GAS /tmp/cc9alhJF.s page 47 - - - 652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 1223 .loc 1 652 0 - 1224 0000 064B ldr r3, .L80 - 1225 0002 5B68 ldr r3, [r3, #4] - 1226 0004 DB07 lsls r3, r3, #31 - 1227 0006 06D5 bpl .L79 - 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** FLASH->PEKEYR = FLASH_PEKEY2; - 1228 .loc 1 655 0 - 1229 0008 044B ldr r3, .L80 - 1230 000a 054A ldr r2, .L80+4 - 1231 000c DA60 str r2, [r3, #12] - 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1232 .loc 1 656 0 - 1233 000e 054A ldr r2, .L80+8 - 1234 0010 DA60 str r2, [r3, #12] - 662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1235 .loc 1 662 0 - 1236 0012 0020 movs r0, #0 - 1237 .L78: - 663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1238 .loc 1 663 0 - 1239 @ sp needed - 1240 0014 7047 bx lr - 1241 .L79: - 660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1242 .loc 1 660 0 - 1243 0016 0120 movs r0, #1 - 1244 0018 FCE7 b .L78 - 1245 .L81: - 1246 001a C046 .align 2 - 1247 .L80: - 1248 001c 00200240 .word 1073881088 - 1249 0020 EFCDAB89 .word -1985229329 - 1250 0024 05040302 .word 33752069 - 1251 .cfi_endproc - 1252 .LFE47: - 1254 .section .text.HAL_FLASHEx_DATAEEPROM_Lock,"ax",%progbits - 1255 .align 1 - 1256 .global HAL_FLASHEx_DATAEEPROM_Lock - 1257 .syntax unified - 1258 .code 16 - 1259 .thumb_func - 1260 .fpu softvfp - 1262 HAL_FLASHEx_DATAEEPROM_Lock: - 1263 .LFB48: - 670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Set the PELOCK Bit to lock the data memory and FLASH_PECR register access */ - 1264 .loc 1 670 0 - 1265 .cfi_startproc - 1266 @ args = 0, pretend = 0, frame = 0 - 1267 @ frame_needed = 0, uses_anonymous_args = 0 - 1268 @ link register save eliminated. - 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1269 .loc 1 672 0 - 1270 0000 034A ldr r2, .L83 - 1271 0002 5368 ldr r3, [r2, #4] - 1272 0004 0121 movs r1, #1 - 1273 0006 0B43 orrs r3, r1 - ARM GAS /tmp/cc9alhJF.s page 48 - - - 1274 0008 5360 str r3, [r2, #4] - 675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1275 .loc 1 675 0 - 1276 000a 0020 movs r0, #0 - 1277 @ sp needed - 1278 000c 7047 bx lr - 1279 .L84: - 1280 000e C046 .align 2 - 1281 .L83: - 1282 0010 00200240 .word 1073881088 - 1283 .cfi_endproc - 1284 .LFE48: - 1286 .section .text.HAL_FLASHEx_DATAEEPROM_Erase,"ax",%progbits - 1287 .align 1 - 1288 .global HAL_FLASHEx_DATAEEPROM_Erase - 1289 .syntax unified - 1290 .code 16 - 1291 .thumb_func - 1292 .fpu softvfp - 1294 HAL_FLASHEx_DATAEEPROM_Erase: - 1295 .LFB49: - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; - 1296 .loc 1 688 0 - 1297 .cfi_startproc - 1298 @ args = 0, pretend = 0, frame = 0 - 1299 @ frame_needed = 0, uses_anonymous_args = 0 - 1300 .LVL160: - 1301 0000 10B5 push {r4, lr} - 1302 .LCFI8: - 1303 .cfi_def_cfa_offset 8 - 1304 .cfi_offset 4, -8 - 1305 .cfi_offset 14, -4 - 1306 0002 0400 movs r4, r0 - 1307 .LVL161: - 695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1308 .loc 1 695 0 - 1309 0004 0648 ldr r0, .L88 - 1310 .LVL162: - 1311 0006 FFF7FEFF bl FLASH_WaitForLastOperation - 1312 .LVL163: - 697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 1313 .loc 1 697 0 - 1314 000a 0028 cmp r0, #0 - 1315 000c 00D0 beq .L87 - 1316 .LVL164: - 1317 .L86: - 710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1318 .loc 1 710 0 - 1319 @ sp needed - 1320 .LVL165: - 1321 000e 10BD pop {r4, pc} - 1322 .LVL166: - 1323 .L87: - 700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1324 .loc 1 700 0 - 1325 0010 0023 movs r3, #0 - 1326 0012 044A ldr r2, .L88+4 - ARM GAS /tmp/cc9alhJF.s page 49 - - - 1327 0014 5361 str r3, [r2, #20] - 703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1328 .loc 1 703 0 - 1329 0016 2360 str r3, [r4] - 705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1330 .loc 1 705 0 - 1331 0018 0148 ldr r0, .L88 - 1332 .LVL167: - 1333 001a FFF7FEFF bl FLASH_WaitForLastOperation - 1334 .LVL168: - 1335 001e F6E7 b .L86 - 1336 .L89: - 1337 .align 2 - 1338 .L88: - 1339 0020 50C30000 .word 50000 - 1340 0024 00000000 .word pFlash - 1341 .cfi_endproc - 1342 .LFE49: - 1344 .section .text.HAL_FLASHEx_DATAEEPROM_Program,"ax",%progbits - 1345 .align 1 - 1346 .global HAL_FLASHEx_DATAEEPROM_Program - 1347 .syntax unified - 1348 .code 16 - 1349 .thumb_func - 1350 .fpu softvfp - 1352 HAL_FLASHEx_DATAEEPROM_Program: - 1353 .LFB50: - 730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; - 1354 .loc 1 730 0 - 1355 .cfi_startproc - 1356 @ args = 0, pretend = 0, frame = 0 - 1357 @ frame_needed = 0, uses_anonymous_args = 0 - 1358 .LVL169: - 1359 0000 70B5 push {r4, r5, r6, lr} - 1360 .LCFI9: - 1361 .cfi_def_cfa_offset 16 - 1362 .cfi_offset 4, -16 - 1363 .cfi_offset 5, -12 - 1364 .cfi_offset 6, -8 - 1365 .cfi_offset 14, -4 - 1366 0002 0400 movs r4, r0 - 1367 0004 0E00 movs r6, r1 - 1368 0006 1500 movs r5, r2 - 1369 .LVL170: - 734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1370 .loc 1 734 0 - 1371 0008 124B ldr r3, .L100 - 1372 000a 1B7C ldrb r3, [r3, #16] - 1373 000c 012B cmp r3, #1 - 1374 000e 1FD0 beq .L96 - 734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1375 .loc 1 734 0 is_stmt 0 discriminator 2 - 1376 0010 104B ldr r3, .L100 - 1377 0012 0122 movs r2, #1 - 1378 .LVL171: - 1379 0014 1A74 strb r2, [r3, #16] - 741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9alhJF.s page 50 - - - 1380 .loc 1 741 0 is_stmt 1 discriminator 2 - 1381 0016 1048 ldr r0, .L100+4 - 1382 .LVL172: - 1383 0018 FFF7FEFF bl FLASH_WaitForLastOperation - 1384 .LVL173: - 743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 1385 .loc 1 743 0 discriminator 2 - 1386 001c 0028 cmp r0, #0 - 1387 001e 0CD1 bne .L92 - 746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1388 .loc 1 746 0 - 1389 0020 0C4B ldr r3, .L100 - 1390 0022 0022 movs r2, #0 - 1391 0024 5A61 str r2, [r3, #20] - 748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 1392 .loc 1 748 0 - 1393 0026 022C cmp r4, #2 - 1394 0028 06D0 beq .L97 - 753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 1395 .loc 1 753 0 - 1396 002a 012C cmp r4, #1 - 1397 002c 09D0 beq .L98 - 758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** { - 1398 .loc 1 758 0 - 1399 002e 002C cmp r4, #0 - 1400 0030 0AD1 bne .L99 - 761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1401 .loc 1 761 0 - 1402 0032 EDB2 uxtb r5, r5 - 1403 .LVL174: - 1404 0034 3570 strb r5, [r6] - 1405 0036 00E0 b .L92 - 1406 .LVL175: - 1407 .L97: - 751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1408 .loc 1 751 0 - 1409 0038 3560 str r5, [r6] - 1410 .LVL176: - 1411 .L92: - 776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1412 .loc 1 776 0 - 1413 003a 064B ldr r3, .L100 - 1414 003c 0022 movs r2, #0 - 1415 003e 1A74 strb r2, [r3, #16] - 1416 .LVL177: - 1417 .L91: - 779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1418 .loc 1 779 0 - 1419 @ sp needed - 1420 .LVL178: - 1421 .LVL179: - 1422 0040 70BD pop {r4, r5, r6, pc} - 1423 .LVL180: - 1424 .L98: - 756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1425 .loc 1 756 0 - 1426 0042 ADB2 uxth r5, r5 - ARM GAS /tmp/cc9alhJF.s page 51 - - - 1427 .LVL181: - 1428 0044 3580 strh r5, [r6] - 1429 0046 F8E7 b .L92 - 1430 .LVL182: - 1431 .L99: - 771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1432 .loc 1 771 0 - 1433 0048 0348 ldr r0, .L100+4 - 1434 004a FFF7FEFF bl FLASH_WaitForLastOperation - 1435 .LVL183: - 1436 004e F4E7 b .L92 - 1437 .LVL184: - 1438 .L96: - 734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1439 .loc 1 734 0 - 1440 0050 0220 movs r0, #2 - 1441 .LVL185: - 1442 0052 F5E7 b .L91 - 1443 .L101: - 1444 .align 2 - 1445 .L100: - 1446 0054 00000000 .word pFlash - 1447 0058 50C30000 .word 50000 - 1448 .cfi_endproc - 1449 .LFE50: - 1451 .section .text.HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram,"ax",%progbits - 1452 .align 1 - 1453 .global HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram - 1454 .syntax unified - 1455 .code 16 - 1456 .thumb_func - 1457 .fpu softvfp - 1459 HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram: - 1460 .LFB51: - 786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** SET_BIT(FLASH->PECR, FLASH_PECR_FIX); - 1461 .loc 1 786 0 - 1462 .cfi_startproc - 1463 @ args = 0, pretend = 0, frame = 0 - 1464 @ frame_needed = 0, uses_anonymous_args = 0 - 1465 @ link register save eliminated. - 787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1466 .loc 1 787 0 - 1467 0000 034A ldr r2, .L103 - 1468 0002 5168 ldr r1, [r2, #4] - 1469 0004 8023 movs r3, #128 - 1470 0006 5B00 lsls r3, r3, #1 - 1471 0008 0B43 orrs r3, r1 - 1472 000a 5360 str r3, [r2, #4] - 788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1473 .loc 1 788 0 - 1474 @ sp needed - 1475 000c 7047 bx lr - 1476 .L104: - 1477 000e C046 .align 2 - 1478 .L103: - 1479 0010 00200240 .word 1073881088 - 1480 .cfi_endproc - ARM GAS /tmp/cc9alhJF.s page 52 - - - 1481 .LFE51: - 1483 .section .text.HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram,"ax",%progbits - 1484 .align 1 - 1485 .global HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram - 1486 .syntax unified - 1487 .code 16 - 1488 .thumb_func - 1489 .fpu softvfp - 1491 HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram: - 1492 .LFB52: - 795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_FIX); - 1493 .loc 1 795 0 - 1494 .cfi_startproc - 1495 @ args = 0, pretend = 0, frame = 0 - 1496 @ frame_needed = 0, uses_anonymous_args = 0 - 1497 @ link register save eliminated. - 796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1498 .loc 1 796 0 - 1499 0000 024A ldr r2, .L106 - 1500 0002 5368 ldr r3, [r2, #4] - 1501 0004 0249 ldr r1, .L106+4 - 1502 0006 0B40 ands r3, r1 - 1503 0008 5360 str r3, [r2, #4] - 797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1504 .loc 1 797 0 - 1505 @ sp needed - 1506 000a 7047 bx lr - 1507 .L107: - 1508 .align 2 - 1509 .L106: - 1510 000c 00200240 .word 1073881088 - 1511 0010 FFFEFFFF .word -257 - 1512 .cfi_endproc - 1513 .LFE52: - 1515 .section .text.FLASH_PageErase,"ax",%progbits - 1516 .align 1 - 1517 .global FLASH_PageErase - 1518 .syntax unified - 1519 .code 16 - 1520 .thumb_func - 1521 .fpu softvfp - 1523 FLASH_PageErase: - 1524 .LFB65: -1243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** /* Clean the error context */ - 1525 .loc 1 1243 0 - 1526 .cfi_startproc - 1527 @ args = 0, pretend = 0, frame = 0 - 1528 @ frame_needed = 0, uses_anonymous_args = 0 - 1529 .LVL186: - 1530 0000 10B5 push {r4, lr} - 1531 .LCFI10: - 1532 .cfi_def_cfa_offset 8 - 1533 .cfi_offset 4, -8 - 1534 .cfi_offset 14, -4 -1245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1535 .loc 1 1245 0 - 1536 0002 0021 movs r1, #0 - ARM GAS /tmp/cc9alhJF.s page 53 - - - 1537 0004 074B ldr r3, .L109 - 1538 0006 5961 str r1, [r3, #20] -1248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1539 .loc 1 1248 0 - 1540 0008 074B ldr r3, .L109+4 - 1541 000a 5C68 ldr r4, [r3, #4] - 1542 000c 8022 movs r2, #128 - 1543 000e 9200 lsls r2, r2, #2 - 1544 0010 2243 orrs r2, r4 - 1545 0012 5A60 str r2, [r3, #4] -1251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** - 1546 .loc 1 1251 0 - 1547 0014 5A68 ldr r2, [r3, #4] - 1548 0016 0824 movs r4, #8 - 1549 0018 2243 orrs r2, r4 - 1550 001a 5A60 str r2, [r3, #4] - 1551 .loc 1 1254 0 - 1552 001c 7F23 movs r3, #127 - 1553 001e 9843 bics r0, r3 - 1554 .LVL187: - 1555 0020 0160 str r1, [r0] -1255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ex.c **** } - 1556 .loc 1 1255 0 - 1557 @ sp needed - 1558 0022 10BD pop {r4, pc} - 1559 .L110: - 1560 .align 2 - 1561 .L109: - 1562 0024 00000000 .word pFlash - 1563 0028 00200240 .word 1073881088 - 1564 .cfi_endproc - 1565 .LFE65: - 1567 .text - 1568 .Letext0: - 1569 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 1570 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 1571 .file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 1572 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 1573 .file 6 "/usr/arm-none-eabi/include/sys/lock.h" - 1574 .file 7 "/usr/arm-none-eabi/include/sys/_types.h" - 1575 .file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 1576 .file 9 "/usr/arm-none-eabi/include/sys/reent.h" - 1577 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" - 1578 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 1579 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h" - 1580 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h" - ARM GAS /tmp/cc9alhJF.s page 54 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_flash_ex.c - /tmp/cc9alhJF.s:16 .text.FLASH_OB_ProtectedSectorsConfig:0000000000000000 $t - /tmp/cc9alhJF.s:22 .text.FLASH_OB_ProtectedSectorsConfig:0000000000000000 FLASH_OB_ProtectedSectorsConfig - /tmp/cc9alhJF.s:182 .text.FLASH_OB_ProtectedSectorsConfig:00000000000000b0 $d - /tmp/cc9alhJF.s:189 .text.HAL_FLASHEx_Erase:0000000000000000 $t - /tmp/cc9alhJF.s:196 .text.HAL_FLASHEx_Erase:0000000000000000 HAL_FLASHEx_Erase - /tmp/cc9alhJF.s:330 .text.HAL_FLASHEx_Erase:000000000000008c $d - /tmp/cc9alhJF.s:338 .text.HAL_FLASHEx_Erase_IT:0000000000000000 $t - /tmp/cc9alhJF.s:345 .text.HAL_FLASHEx_Erase_IT:0000000000000000 HAL_FLASHEx_Erase_IT - /tmp/cc9alhJF.s:452 .text.HAL_FLASHEx_Erase_IT:0000000000000070 $d - /tmp/cc9alhJF.s:459 .text.HAL_FLASHEx_OBProgram:0000000000000000 $t - /tmp/cc9alhJF.s:466 .text.HAL_FLASHEx_OBProgram:0000000000000000 HAL_FLASHEx_OBProgram - /tmp/cc9alhJF.s:815 .text.HAL_FLASHEx_OBProgram:000000000000014c $d - /tmp/cc9alhJF.s:824 .text.HAL_FLASHEx_OBGetConfig:0000000000000000 $t - /tmp/cc9alhJF.s:831 .text.HAL_FLASHEx_OBGetConfig:0000000000000000 HAL_FLASHEx_OBGetConfig - /tmp/cc9alhJF.s:905 .text.HAL_FLASHEx_OBGetConfig:0000000000000030 $d - /tmp/cc9alhJF.s:910 .text.HAL_FLASHEx_AdvOBProgram:0000000000000000 $t - /tmp/cc9alhJF.s:917 .text.HAL_FLASHEx_AdvOBProgram:0000000000000000 HAL_FLASHEx_AdvOBProgram - /tmp/cc9alhJF.s:1004 .text.HAL_FLASHEx_AdvOBProgram:0000000000000050 $d - /tmp/cc9alhJF.s:1014 .text.HAL_FLASHEx_AdvOBGetConfig:0000000000000000 $t - /tmp/cc9alhJF.s:1021 .text.HAL_FLASHEx_AdvOBGetConfig:0000000000000000 HAL_FLASHEx_AdvOBGetConfig - /tmp/cc9alhJF.s:1060 .text.HAL_FLASHEx_AdvOBGetConfig:0000000000000028 $d - /tmp/cc9alhJF.s:1065 .text.HAL_FLASHEx_OB_SelectPCROP:0000000000000000 $t - /tmp/cc9alhJF.s:1072 .text.HAL_FLASHEx_OB_SelectPCROP:0000000000000000 HAL_FLASHEx_OB_SelectPCROP - /tmp/cc9alhJF.s:1132 .text.HAL_FLASHEx_OB_SelectPCROP:0000000000000030 $d - /tmp/cc9alhJF.s:1139 .text.HAL_FLASHEx_OB_DeSelectPCROP:0000000000000000 $t - /tmp/cc9alhJF.s:1146 .text.HAL_FLASHEx_OB_DeSelectPCROP:0000000000000000 HAL_FLASHEx_OB_DeSelectPCROP - /tmp/cc9alhJF.s:1202 .text.HAL_FLASHEx_OB_DeSelectPCROP:000000000000002c $d - /tmp/cc9alhJF.s:1209 .text.HAL_FLASHEx_DATAEEPROM_Unlock:0000000000000000 $t - /tmp/cc9alhJF.s:1216 .text.HAL_FLASHEx_DATAEEPROM_Unlock:0000000000000000 HAL_FLASHEx_DATAEEPROM_Unlock - /tmp/cc9alhJF.s:1248 .text.HAL_FLASHEx_DATAEEPROM_Unlock:000000000000001c $d - /tmp/cc9alhJF.s:1255 .text.HAL_FLASHEx_DATAEEPROM_Lock:0000000000000000 $t - /tmp/cc9alhJF.s:1262 .text.HAL_FLASHEx_DATAEEPROM_Lock:0000000000000000 HAL_FLASHEx_DATAEEPROM_Lock - /tmp/cc9alhJF.s:1282 .text.HAL_FLASHEx_DATAEEPROM_Lock:0000000000000010 $d - /tmp/cc9alhJF.s:1287 .text.HAL_FLASHEx_DATAEEPROM_Erase:0000000000000000 $t - /tmp/cc9alhJF.s:1294 .text.HAL_FLASHEx_DATAEEPROM_Erase:0000000000000000 HAL_FLASHEx_DATAEEPROM_Erase - /tmp/cc9alhJF.s:1339 .text.HAL_FLASHEx_DATAEEPROM_Erase:0000000000000020 $d - /tmp/cc9alhJF.s:1345 .text.HAL_FLASHEx_DATAEEPROM_Program:0000000000000000 $t - /tmp/cc9alhJF.s:1352 .text.HAL_FLASHEx_DATAEEPROM_Program:0000000000000000 HAL_FLASHEx_DATAEEPROM_Program - /tmp/cc9alhJF.s:1446 .text.HAL_FLASHEx_DATAEEPROM_Program:0000000000000054 $d - /tmp/cc9alhJF.s:1452 .text.HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram:0000000000000000 $t - /tmp/cc9alhJF.s:1459 .text.HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram:0000000000000000 HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram - /tmp/cc9alhJF.s:1479 .text.HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram:0000000000000010 $d - /tmp/cc9alhJF.s:1484 .text.HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram:0000000000000000 $t - /tmp/cc9alhJF.s:1491 .text.HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram:0000000000000000 HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram - /tmp/cc9alhJF.s:1510 .text.HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram:000000000000000c $d - /tmp/cc9alhJF.s:1516 .text.FLASH_PageErase:0000000000000000 $t - /tmp/cc9alhJF.s:1523 .text.FLASH_PageErase:0000000000000000 FLASH_PageErase - /tmp/cc9alhJF.s:1562 .text.FLASH_PageErase:0000000000000024 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -FLASH_WaitForLastOperation -pFlash diff --git a/build/stm32l0xx_hal_flash_ramfunc.d b/build/stm32l0xx_hal_flash_ramfunc.d deleted file mode 100644 index cb2e20b..0000000 --- a/build/stm32l0xx_hal_flash_ramfunc.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_flash_ramfunc.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_flash_ramfunc.lst b/build/stm32l0xx_hal_flash_ramfunc.lst deleted file mode 100644 index 7e2f3b5..0000000 --- a/build/stm32l0xx_hal_flash_ramfunc.lst +++ /dev/null @@ -1,1527 +0,0 @@ -ARM GAS /tmp/ccviJFHV.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_flash_ramfunc.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .RamFunc,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 FLASHRAM_WaitForLastOperation: - 23 .LFB46: - 24 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @file stm32l0xx_hal_flash_ramfunc.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief FLASH RAMFUNC driver. - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * This file provides a Flash firmware functions which should be - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * executed from internal SRAM - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @verbatim - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *** ARM Compiler *** - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** -------------------- - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** [..] RAM functions are defined using the toolchain options. - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** Functions that are be executed in RAM should reside in a separate - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** source module. Using the 'Options for File' dialog you can simply change - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** the 'Code / Const' area of a module to a memory space in physical RAM. - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** Available memory areas are declared in the 'Target' tab of the - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** Options for Target' dialog. - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *** ICCARM Compiler *** - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** ----------------------- - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *** GNU Compiler *** - 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** -------------------- - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** [..] RAM functions are defined using a specific toolchain attribute - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** "__attribute__((section(".RamFunc")))". - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** @endverbatim - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** ****************************************************************************** - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @attention - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - ARM GAS /tmp/ccviJFHV.s page 2 - - - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * Redistribution and use in source and binary forms, with or without modification, - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * are permitted provided that the following conditions are met: - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * 1. Redistributions of source code must retain the above copyright notice, - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * this list of conditions and the following disclaimer. - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * this list of conditions and the following disclaimer in the documentation - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * and/or other materials provided with the distribution. - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * may be used to endorse or promote products derived from this software - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * without specific prior written permission. - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** ****************************************************************************** - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Includes ------------------------------------------------------------------*/ - 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** #include "stm32l0xx_hal.h" - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @addtogroup STM32L0xx_HAL_Driver - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** #ifdef HAL_FLASH_MODULE_ENABLED - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @addtogroup FLASH - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @addtogroup FLASH_Private_Variables - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** extern FLASH_ProcessTypeDef pFlash; - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @} - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @} - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief FLASH functions executed from RAM - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Private typedef -----------------------------------------------------------*/ - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Private define ------------------------------------------------------------*/ - ARM GAS /tmp/ccviJFHV.s page 3 - - - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Private macro -------------------------------------------------------------*/ - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Private variables ---------------------------------------------------------*/ - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Private function prototypes -----------------------------------------------*/ - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @defgroup FLASH_RAMFUNC_Private_Functions FLASH RAM Private Functions - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** static __RAM_FUNC FLASHRAM_WaitForLastOperation(uint32_t Timeout); - 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** static __RAM_FUNC FLASHRAM_SetErrorCode(void); - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @} - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Private functions ---------------------------------------------------------*/ - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAM Exported Functions - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** @verbatim - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** =============================================================================== - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** ##### ramfunc functions ##### - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** =============================================================================== - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** [..] - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** This subsection provides a set of functions that should be executed from RAM - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** transfers. - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** @endverbatim - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief Enable the power down mode during RUN mode. - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note This function can be used only when the user code is running from Internal SRAM. - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @retval HAL status - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void) - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Enable the Power Down in Run mode*/ - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_POWER_DOWN_ENABLE(); - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return HAL_OK; - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief Disable the power down mode during RUN mode. - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note This function can be used only when the user code is running from Internal SRAM. - 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @retval HAL status - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void) - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Disable the Power Down in Run mode*/ - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_POWER_DOWN_DISABLE(); - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - ARM GAS /tmp/ccviJFHV.s page 4 - - - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return HAL_OK; - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @} - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group2 Programming and erasing operation functions - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** @verbatim - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** @endverbatim - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** #if defined(FLASH_PECR_PARALLBANK) - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief Erases a specified 2 pages in program memory in parallel. - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note This function can be used only for STM32L07xxx/STM32L08xxx devices. - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * To correctly run this function, the @ref HAL_FLASH_Unlock() function - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * must be called before. - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * (recommended to protect the FLASH memory against possible unwanted operation). - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param Page_Address1: The page address in program memory to be erased in - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * the first Bank (BANK1). This parameter should be between FLASH_BASE - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * and FLASH_BANK1_END. - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param Page_Address2: The page address in program memory to be erased in - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * the second Bank (BANK2). This parameter should be between FLASH_BANK2_BASE - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * and FLASH_BANK2_END. - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note A Page is erased in the Program memory only if the address to load - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes). - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @retval HAL status - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __RAM_FUNC HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2) - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** HAL_StatusTypeDef status = HAL_OK; - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Wait for last operation to be completed */ - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(status == HAL_OK) - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Proceed to erase the page */ - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PROG); - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Write 00000000h to the first word of the first program page to erase */ - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *(__IO uint32_t *)Page_Address1 = 0x00000000U; - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Write 00000000h to the first word of the second program page to erase */ - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *(__IO uint32_t *)Page_Address2 = 0x00000000U; - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Wait for last operation to be completed */ - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */ - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); - ARM GAS /tmp/ccviJFHV.s page 5 - - - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Return the Erase Status */ - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return status; - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief Program 2 half pages in program memory in parallel (half page size is 16 Words). - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note This function can be used only for STM32L07xxx/STM32L08xxx devices. - 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param Address1: specifies the first address to be written in the first bank - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * (BANK1). This parameter should be between FLASH_BASE and (FLASH_BANK1_END - FLASH_PAGE_S - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param pBuffer1: pointer to the buffer containing the data to be written - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * to the first half page in the first bank. - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param Address2: specifies the second address to be written in the second bank - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * (BANK2). This parameter should be between FLASH_BANK2_BASE and (FLASH_BANK2_END - FLASH_ - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param pBuffer2: pointer to the buffer containing the data to be written - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * to the second half page in the second bank. - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * must be called before. - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * (recommended to protect the FLASH memory against possible unwanted operation). - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note Half page write is possible only from SRAM. - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note A half page is written to the program memory only if the first - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * address to load is the start address of a half page (multiple of 64 - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * bytes) and the 15 remaining words to load are in the same half page. - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note During the Program memory half page write all read operations are - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * forbidden (this includes DMA read operations and debugger read - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * operations such as breakpoints, periodic updates, etc.). - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note If a PGAERR is set during a Program memory half page write, the - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * complete write operation is aborted. Software should then reset the - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * FPRG and PROG/DATA bits and restart the write operation from the - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * beginning. - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @retval HAL status - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __RAM_FUNC HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Addr - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** uint32_t count = 0U; - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** HAL_StatusTypeDef status = HAL_OK; - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Wait for last operation to be completed */ - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(status == HAL_OK) - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Proceed to program the new half page */ - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PROG); - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Wait for last operation to be completed */ - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(status == HAL_OK) - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Disable all IRQs */ - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __disable_irq(); - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Write the first half page directly with 16 different words */ - ARM GAS /tmp/ccviJFHV.s page 6 - - - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** while(count < 16U) - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Address1 doesn't need to be increased */ - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *(__IO uint32_t*) Address1 = *pBuffer1; - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pBuffer1++; - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** count ++; - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Write the second half page directly with 16 different words */ - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** count = 0U; - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** while(count < 16U) - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Address2 doesn't need to be increased */ - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *(__IO uint32_t*) Address2 = *pBuffer2; - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pBuffer2++; - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** count ++; - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Enable IRQs */ - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __enable_irq(); - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Wait for last operation to be completed */ - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */ - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Return the Write Status */ - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return status; - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** #endif /* FLASH_PECR_PARALLBANK */ - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief Program a half page in program memory. - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param Address: specifies the address to be written. - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param pBuffer: pointer to the buffer containing the data to be written to - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * the half page. - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * must be called before. - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * (recommended to protect the FLASH memory against possible unwanted operation) - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note Half page write is possible only from SRAM. - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note A half page is written to the program memory only if the first - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * address to load is the start address of a half page (multiple of 64 - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * bytes) and the 15 remaining words to load are in the same half page. - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note During the Program memory half page write all read operations are - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * forbidden (this includes DMA read operations and debugger read - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * operations such as breakpoints, periodic updates, etc.). - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @note If a PGAERR is set during a Program memory half page write, the - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * complete write operation is aborted. Software should then reset the - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * FPRG and PROG/DATA bits and restart the write operation from the - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * beginning. - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @retval HAL status - ARM GAS /tmp/ccviJFHV.s page 7 - - - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __RAM_FUNC HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer) - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** uint32_t count = 0U; - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** HAL_StatusTypeDef status = HAL_OK; - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Wait for last operation to be completed */ - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(status == HAL_OK) - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Proceed to program the new half page */ - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PROG); - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Disable all IRQs */ - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __disable_irq(); - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Write one half page directly with 16 different words */ - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** while(count < 16U) - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Address doesn't need to be increased */ - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *(__IO uint32_t*) Address = *pBuffer; - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pBuffer++; - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** count ++; - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Enable IRQs */ - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __enable_irq(); - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Wait for last operation to be completed */ - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* If the write operation is completed, disable the PROG and FPRG bits */ - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Return the Write Status */ - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return status; - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @} - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group3 Peripheral errors functions - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief Peripheral errors functions - 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** @verbatim - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** =============================================================================== - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** ##### Peripheral errors functions ##### - 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** =============================================================================== - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** [..] - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** This subsection permit to get in run-time errors of the FLASH peripheral. - 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** @endverbatim - ARM GAS /tmp/ccviJFHV.s page 8 - - - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief Get the specific FLASH errors flag. - 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param Error pointer is the error value. It can be a mixed of: - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) - 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @arg @ref HAL_FLASH_ERROR_SIZE FLASH Programming Parallelism error flag - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @arg @ref HAL_FLASH_ERROR_PGA FLASH Programming Alignment error flag - 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @arg @ref HAL_FLASH_ERROR_WRP FLASH Write protected error flag - 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @arg @ref HAL_FLASH_ERROR_OPTV FLASH Option valid error flag - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @arg @ref HAL_FLASH_ERROR_FWWERR FLASH Write or Erase operation aborted - 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @arg @ref HAL_FLASH_ERROR_NOTZERO FLASH Write operation is done in a not-erased regi - 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @retval HAL Status - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __RAM_FUNC HAL_FLASHEx_GetError(uint32_t * Error) - 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *Error = pFlash.ErrorCode; - 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return HAL_OK; - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @} - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @} - 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** @addtogroup FLASH_RAMFUNC_Private_Functions - 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @{ - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief Set the specific FLASH error flag. - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @retval HAL Status - 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** static __RAM_FUNC FLASHRAM_SetErrorCode(void) - 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** uint32_t flags = 0; - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) - 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; - 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_WRPERR; - 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) - 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_PGAERR; - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR)) - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_SIZE; - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_SIZERR; - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) - ARM GAS /tmp/ccviJFHV.s page 9 - - - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices, - 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving - 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * as expected. If the user run an application using the first - 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * cut of the STM32L031xx device or the first cut of the STM32L041xx - 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * device, this error should be ignored. The revId of the device - 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * can be retrieved via the HAL_GetREVID() function. - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_OPTVERR; - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_RDERR; - 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR)) - 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_FWWERR; - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= HAL_FLASH_ERROR_FWWERR; - 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR)) - 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_NOTZERO; - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_NOTZEROERR; - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Clear FLASH error pending bits */ - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_CLEAR_FLAG(flags); - 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return HAL_OK; - 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /** - 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @brief Wait for a FLASH operation to complete. - 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @param Timeout: maximum flash operationtimeout - 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * @retval HAL status - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** static __RAM_FUNC FLASHRAM_WaitForLastOperation(uint32_t Timeout) - 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 25 .loc 1 475 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 @ link register save eliminated. - 30 .LVL0: - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. - 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** Even if the FLASH operation fails, the BUSY flag will be reset and an error - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flag will be set */ - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) && (Timeout != 0x00U)) - 31 .loc 1 480 0 - 32 0000 00E0 b .L2 - 33 .L4: - 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - ARM GAS /tmp/ccviJFHV.s page 10 - - - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** Timeout--; - 34 .loc 1 482 0 - 35 0002 0138 subs r0, r0, #1 - 36 .LVL1: - 37 .L2: - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 38 .loc 1 480 0 - 39 0004 434B ldr r3, .L18 - 40 0006 9B69 ldr r3, [r3, #24] - 41 0008 DB07 lsls r3, r3, #31 - 42 000a 01D5 bpl .L3 - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 43 .loc 1 480 0 is_stmt 0 discriminator 1 - 44 000c 0028 cmp r0, #0 - 45 000e F8D1 bne .L4 - 46 .L3: - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(Timeout == 0x00U) - 47 .loc 1 485 0 is_stmt 1 - 48 0010 0028 cmp r0, #0 - 49 0012 00D1 bne .LCB28 - 50 0014 79E0 b .L15 @long jump - 51 .LCB28: - 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return HAL_TIMEOUT; - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Check FLASH End of Operation flag */ - 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - 52 .loc 1 491 0 - 53 0016 3F4B ldr r3, .L18 - 54 0018 9B69 ldr r3, [r3, #24] - 55 001a 9B07 lsls r3, r3, #30 - 56 001c 02D5 bpl .L6 - 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Clear FLASH End of Operation pending bit */ - 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - 57 .loc 1 494 0 - 58 001e 3D4B ldr r3, .L18 - 59 0020 0222 movs r2, #2 - 60 0022 9A61 str r2, [r3, #24] - 61 .L6: - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if( __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || - 62 .loc 1 497 0 - 63 0024 3B4B ldr r3, .L18 - 64 0026 9B69 ldr r3, [r3, #24] - 65 0028 DB05 lsls r3, r3, #23 - 66 002a 17D4 bmi .L7 - 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 67 .loc 1 498 0 discriminator 1 - 68 002c 394B ldr r3, .L18 - 69 002e 9B69 ldr r3, [r3, #24] - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 70 .loc 1 497 0 discriminator 1 - ARM GAS /tmp/ccviJFHV.s page 11 - - - 71 0030 9B05 lsls r3, r3, #22 - 72 0032 13D4 bmi .L7 - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || - 73 .loc 1 499 0 - 74 0034 374B ldr r3, .L18 - 75 0036 9B69 ldr r3, [r3, #24] - 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) || - 76 .loc 1 498 0 - 77 0038 5B05 lsls r3, r3, #21 - 78 003a 0FD4 bmi .L7 - 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 79 .loc 1 500 0 - 80 003c 354B ldr r3, .L18 - 81 003e 9B69 ldr r3, [r3, #24] - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_SIZERR) || - 82 .loc 1 499 0 - 83 0040 1B05 lsls r3, r3, #20 - 84 0042 0BD4 bmi .L7 - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || - 85 .loc 1 501 0 - 86 0044 334B ldr r3, .L18 - 87 0046 9B69 ldr r3, [r3, #24] - 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 88 .loc 1 500 0 - 89 0048 9B04 lsls r3, r3, #18 - 90 004a 07D4 bmi .L7 - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || - 91 .loc 1 502 0 - 92 004c 314B ldr r3, .L18 - 93 004e 9B69 ldr r3, [r3, #24] - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || - 94 .loc 1 501 0 - 95 0050 9B03 lsls r3, r3, #14 - 96 0052 03D4 bmi .L7 - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_NOTZEROERR) ) - 97 .loc 1 503 0 - 98 0054 2F4B ldr r3, .L18 - 99 0056 9B69 ldr r3, [r3, #24] - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_FWWERR) || - 100 .loc 1 502 0 - 101 0058 DB03 lsls r3, r3, #15 - 102 005a 58D5 bpl .L16 - 103 .L7: - 104 .LVL2: - 105 .LBB12: - 106 .LBB13: - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 107 .loc 1 418 0 - 108 005c 2D4B ldr r3, .L18 - 109 005e 9B69 ldr r3, [r3, #24] - 110 0060 DB05 lsls r3, r3, #23 - 111 0062 07D5 bpl .L17 - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_WRPERR; - 112 .loc 1 420 0 - 113 0064 2C4A ldr r2, .L18+4 - 114 0066 5369 ldr r3, [r2, #20] - 115 0068 0221 movs r1, #2 - ARM GAS /tmp/ccviJFHV.s page 12 - - - 116 006a 0B43 orrs r3, r1 - 117 006c 5361 str r3, [r2, #20] - 118 .LVL3: - 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 119 .loc 1 421 0 - 120 006e 8023 movs r3, #128 - 121 0070 5B00 lsls r3, r3, #1 - 122 0072 00E0 b .L8 - 123 .LVL4: - 124 .L17: - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 125 .loc 1 416 0 - 126 0074 0023 movs r3, #0 - 127 .LVL5: - 128 .L8: - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 129 .loc 1 423 0 - 130 0076 274A ldr r2, .L18 - 131 0078 9269 ldr r2, [r2, #24] - 132 007a 9205 lsls r2, r2, #22 - 133 007c 07D5 bpl .L9 - 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_PGAERR; - 134 .loc 1 425 0 - 135 007e 2649 ldr r1, .L18+4 - 136 0080 4A69 ldr r2, [r1, #20] - 137 0082 0120 movs r0, #1 - 138 .LVL6: - 139 0084 0243 orrs r2, r0 - 140 0086 4A61 str r2, [r1, #20] - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 141 .loc 1 426 0 - 142 0088 8022 movs r2, #128 - 143 008a 9200 lsls r2, r2, #2 - 144 008c 1343 orrs r3, r2 - 145 .LVL7: - 146 .L9: - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 147 .loc 1 428 0 - 148 008e 214A ldr r2, .L18 - 149 0090 9269 ldr r2, [r2, #24] - 150 0092 5205 lsls r2, r2, #21 - 151 0094 07D5 bpl .L10 - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_SIZERR; - 152 .loc 1 430 0 - 153 0096 2049 ldr r1, .L18+4 - 154 0098 4A69 ldr r2, [r1, #20] - 155 009a 0820 movs r0, #8 - 156 009c 0243 orrs r2, r0 - 157 009e 4A61 str r2, [r1, #20] - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 158 .loc 1 431 0 - 159 00a0 8022 movs r2, #128 - 160 00a2 D200 lsls r2, r2, #3 - 161 00a4 1343 orrs r3, r2 - 162 .LVL8: - 163 .L10: - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - ARM GAS /tmp/ccviJFHV.s page 13 - - - 164 .loc 1 433 0 - 165 00a6 1B4A ldr r2, .L18 - 166 00a8 9269 ldr r2, [r2, #24] - 167 00aa 1205 lsls r2, r2, #20 - 168 00ac 07D5 bpl .L11 - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_OPTVERR; - 169 .loc 1 443 0 - 170 00ae 1A49 ldr r1, .L18+4 - 171 00b0 4A69 ldr r2, [r1, #20] - 172 00b2 0420 movs r0, #4 - 173 00b4 0243 orrs r2, r0 - 174 00b6 4A61 str r2, [r1, #20] - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 175 .loc 1 444 0 - 176 00b8 8022 movs r2, #128 - 177 00ba 1201 lsls r2, r2, #4 - 178 00bc 1343 orrs r3, r2 - 179 .LVL9: - 180 .L11: - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 181 .loc 1 447 0 - 182 00be 154A ldr r2, .L18 - 183 00c0 9269 ldr r2, [r2, #24] - 184 00c2 9204 lsls r2, r2, #18 - 185 00c4 07D5 bpl .L12 - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_RDERR; - 186 .loc 1 449 0 - 187 00c6 1449 ldr r1, .L18+4 - 188 00c8 4A69 ldr r2, [r1, #20] - 189 00ca 1020 movs r0, #16 - 190 00cc 0243 orrs r2, r0 - 191 00ce 4A61 str r2, [r1, #20] - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 192 .loc 1 450 0 - 193 00d0 8022 movs r2, #128 - 194 00d2 9201 lsls r2, r2, #6 - 195 00d4 1343 orrs r3, r2 - 196 .LVL10: - 197 .L12: - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 198 .loc 1 452 0 - 199 00d6 0F4A ldr r2, .L18 - 200 00d8 9269 ldr r2, [r2, #24] - 201 00da 9203 lsls r2, r2, #14 - 202 00dc 05D5 bpl .L13 - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= HAL_FLASH_ERROR_FWWERR; - 203 .loc 1 454 0 - 204 00de 0E48 ldr r0, .L18+4 - 205 00e0 4269 ldr r2, [r0, #20] - 206 00e2 2021 movs r1, #32 - 207 00e4 0A43 orrs r2, r1 - 208 00e6 4261 str r2, [r0, #20] - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 209 .loc 1 455 0 - 210 00e8 0B43 orrs r3, r1 - 211 .LVL11: - 212 .L13: - ARM GAS /tmp/ccviJFHV.s page 14 - - - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 213 .loc 1 457 0 - 214 00ea 0A4A ldr r2, .L18 - 215 00ec 9269 ldr r2, [r2, #24] - 216 00ee D203 lsls r2, r2, #15 - 217 00f0 07D5 bpl .L14 - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** flags |= FLASH_FLAG_NOTZEROERR; - 218 .loc 1 459 0 - 219 00f2 0949 ldr r1, .L18+4 - 220 00f4 4A69 ldr r2, [r1, #20] - 221 00f6 4020 movs r0, #64 - 222 00f8 0243 orrs r2, r0 - 223 00fa 4A61 str r2, [r1, #20] - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 224 .loc 1 460 0 - 225 00fc 8022 movs r2, #128 - 226 00fe 5202 lsls r2, r2, #9 - 227 0100 1343 orrs r3, r2 - 228 .LVL12: - 229 .L14: - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 230 .loc 1 464 0 - 231 0102 044A ldr r2, .L18 - 232 0104 9361 str r3, [r2, #24] - 233 .LBE13: - 234 .LBE12: - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /*Save the error code*/ - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* WARNING : On the first cut of STM32L031xx and STM32L041xx devices, - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * (RefID = 0x1000) the FLASH_FLAG_OPTVERR bit was not behaving - 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * as expected. If the user run an application using the first - 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * cut of the STM32L031xx device or the first cut of the STM32L041xx - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * device, this error should be ignored. The revId of the device - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * can be retrieved via the HAL_GetREVID() function. - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** * - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** */ - 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** FLASHRAM_SetErrorCode(); - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return HAL_ERROR; - 235 .loc 1 516 0 - 236 0106 0120 movs r0, #1 - 237 .LVL13: - 238 .L5: - 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* There is no error flag set */ - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return HAL_OK; - 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 239 .loc 1 521 0 - 240 @ sp needed - 241 0108 7047 bx lr - 242 .LVL14: - 243 .L15: - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 244 .loc 1 487 0 - 245 010a 0320 movs r0, #3 - 246 .LVL15: - ARM GAS /tmp/ccviJFHV.s page 15 - - - 247 010c FCE7 b .L5 - 248 .LVL16: - 249 .L16: - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 250 .loc 1 520 0 - 251 010e 0020 movs r0, #0 - 252 .LVL17: - 253 0110 FAE7 b .L5 - 254 .L19: - 255 0112 C046 .align 2 - 256 .L18: - 257 0114 00200240 .word 1073881088 - 258 0118 00000000 .word pFlash - 259 .cfi_endproc - 260 .LFE46: - 262 .align 1 - 263 .global HAL_FLASHEx_EnableRunPowerDown - 264 .syntax unified - 265 .code 16 - 266 .thumb_func - 267 .fpu softvfp - 269 HAL_FLASHEx_EnableRunPowerDown: - 270 .LFB39: - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Enable the Power Down in Run mode*/ - 271 .loc 1 132 0 - 272 .cfi_startproc - 273 @ args = 0, pretend = 0, frame = 0 - 274 @ frame_needed = 0, uses_anonymous_args = 0 - 275 @ link register save eliminated. - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 276 .loc 1 134 0 - 277 011c 054B ldr r3, .L21 - 278 011e 064A ldr r2, .L21+4 - 279 0120 9A60 str r2, [r3, #8] - 280 0122 064A ldr r2, .L21+8 - 281 0124 9A60 str r2, [r3, #8] - 282 0126 1A68 ldr r2, [r3] - 283 0128 1021 movs r1, #16 - 284 012a 0A43 orrs r2, r1 - 285 012c 1A60 str r2, [r3] - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 286 .loc 1 137 0 - 287 012e 0020 movs r0, #0 - 288 @ sp needed - 289 0130 7047 bx lr - 290 .L22: - 291 0132 C046 .align 2 - 292 .L21: - 293 0134 00200240 .word 1073881088 - 294 0138 37261504 .word 68494903 - 295 013c FDFCFBFA .word -84148995 - 296 .cfi_endproc - 297 .LFE39: - 299 .align 1 - 300 .global HAL_FLASHEx_DisableRunPowerDown - 301 .syntax unified - 302 .code 16 - ARM GAS /tmp/ccviJFHV.s page 16 - - - 303 .thumb_func - 304 .fpu softvfp - 306 HAL_FLASHEx_DisableRunPowerDown: - 307 .LFB40: - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Disable the Power Down in Run mode*/ - 308 .loc 1 145 0 - 309 .cfi_startproc - 310 @ args = 0, pretend = 0, frame = 0 - 311 @ frame_needed = 0, uses_anonymous_args = 0 - 312 @ link register save eliminated. - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 313 .loc 1 147 0 - 314 0140 054B ldr r3, .L24 - 315 0142 064A ldr r2, .L24+4 - 316 0144 9A60 str r2, [r3, #8] - 317 0146 064A ldr r2, .L24+8 - 318 0148 9A60 str r2, [r3, #8] - 319 014a 1A68 ldr r2, [r3] - 320 014c 1021 movs r1, #16 - 321 014e 8A43 bics r2, r1 - 322 0150 1A60 str r2, [r3] - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 323 .loc 1 150 0 - 324 0152 0020 movs r0, #0 - 325 @ sp needed - 326 0154 7047 bx lr - 327 .L25: - 328 0156 C046 .align 2 - 329 .L24: - 330 0158 00200240 .word 1073881088 - 331 015c 37261504 .word 68494903 - 332 0160 FDFCFBFA .word -84148995 - 333 .cfi_endproc - 334 .LFE40: - 336 .align 1 - 337 .global HAL_FLASHEx_EraseParallelPage - 338 .syntax unified - 339 .code 16 - 340 .thumb_func - 341 .fpu softvfp - 343 HAL_FLASHEx_EraseParallelPage: - 344 .LFB41: - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** HAL_StatusTypeDef status = HAL_OK; - 345 .loc 1 182 0 - 346 .cfi_startproc - 347 @ args = 0, pretend = 0, frame = 0 - 348 @ frame_needed = 0, uses_anonymous_args = 0 - 349 .LVL18: - 350 0164 F8B5 push {r3, r4, r5, r6, r7, lr} - 351 .LCFI0: - 352 .cfi_def_cfa_offset 24 - 353 .cfi_offset 3, -24 - 354 .cfi_offset 4, -20 - 355 .cfi_offset 5, -16 - 356 .cfi_offset 6, -12 - 357 .cfi_offset 7, -8 - 358 .cfi_offset 14, -4 - ARM GAS /tmp/ccviJFHV.s page 17 - - - 359 0166 0600 movs r6, r0 - 360 0168 0D00 movs r5, r1 - 361 .LVL19: - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 362 .loc 1 186 0 - 363 016a 1348 ldr r0, .L29 - 364 .LVL20: - 365 016c FFF748FF bl FLASHRAM_WaitForLastOperation - 366 .LVL21: - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 367 .loc 1 188 0 - 368 0170 0028 cmp r0, #0 - 369 0172 00D0 beq .L28 - 370 .LVL22: - 371 .L27: - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 372 .loc 1 210 0 - 373 @ sp needed - 374 .LVL23: - 375 .LVL24: - 376 0174 F8BD pop {r3, r4, r5, r6, r7, pc} - 377 .LVL25: - 378 .L28: - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); - 379 .loc 1 191 0 - 380 0176 114C ldr r4, .L29+4 - 381 0178 6268 ldr r2, [r4, #4] - 382 017a 8023 movs r3, #128 - 383 017c 1B02 lsls r3, r3, #8 - 384 017e 1343 orrs r3, r2 - 385 0180 6360 str r3, [r4, #4] - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PROG); - 386 .loc 1 192 0 - 387 0182 6268 ldr r2, [r4, #4] - 388 0184 8023 movs r3, #128 - 389 0186 9B00 lsls r3, r3, #2 - 390 0188 1343 orrs r3, r2 - 391 018a 6360 str r3, [r4, #4] - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 392 .loc 1 193 0 - 393 018c 6368 ldr r3, [r4, #4] - 394 018e 0827 movs r7, #8 - 395 0190 3B43 orrs r3, r7 - 396 0192 6360 str r3, [r4, #4] - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** /* Write 00000000h to the first word of the second program page to erase */ - 397 .loc 1 196 0 - 398 0194 0023 movs r3, #0 - 399 0196 3360 str r3, [r6] - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 400 .loc 1 198 0 - 401 0198 2B60 str r3, [r5] - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 402 .loc 1 201 0 - 403 019a 0748 ldr r0, .L29 - 404 .LVL26: - 405 019c FFF730FF bl FLASHRAM_WaitForLastOperation - 406 .LVL27: - ARM GAS /tmp/ccviJFHV.s page 18 - - - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); - 407 .loc 1 204 0 - 408 01a0 6368 ldr r3, [r4, #4] - 409 01a2 BB43 bics r3, r7 - 410 01a4 6360 str r3, [r4, #4] - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); - 411 .loc 1 205 0 - 412 01a6 6368 ldr r3, [r4, #4] - 413 01a8 054A ldr r2, .L29+8 - 414 01aa 1340 ands r3, r2 - 415 01ac 6360 str r3, [r4, #4] - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 416 .loc 1 206 0 - 417 01ae 6368 ldr r3, [r4, #4] - 418 01b0 044A ldr r2, .L29+12 - 419 01b2 1340 ands r3, r2 - 420 01b4 6360 str r3, [r4, #4] - 421 01b6 DDE7 b .L27 - 422 .L30: - 423 .align 2 - 424 .L29: - 425 01b8 50C30000 .word 50000 - 426 01bc 00200240 .word 1073881088 - 427 01c0 FFFDFFFF .word -513 - 428 01c4 FF7FFFFF .word -32769 - 429 .cfi_endproc - 430 .LFE41: - 432 .align 1 - 433 .global HAL_FLASHEx_ProgramParallelHalfPage - 434 .syntax unified - 435 .code 16 - 436 .thumb_func - 437 .fpu softvfp - 439 HAL_FLASHEx_ProgramParallelHalfPage: - 440 .LFB42: - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** uint32_t count = 0U; - 441 .loc 1 241 0 - 442 .cfi_startproc - 443 @ args = 0, pretend = 0, frame = 0 - 444 @ frame_needed = 0, uses_anonymous_args = 0 - 445 .LVL28: - 446 01c8 F8B5 push {r3, r4, r5, r6, r7, lr} - 447 .LCFI1: - 448 .cfi_def_cfa_offset 24 - 449 .cfi_offset 3, -24 - 450 .cfi_offset 4, -20 - 451 .cfi_offset 5, -16 - 452 .cfi_offset 6, -12 - 453 .cfi_offset 7, -8 - 454 .cfi_offset 14, -4 - 455 01ca 0700 movs r7, r0 - 456 01cc 0D00 movs r5, r1 - 457 01ce 1600 movs r6, r2 - 458 01d0 1C00 movs r4, r3 - 459 .LVL29: - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 460 .loc 1 246 0 - ARM GAS /tmp/ccviJFHV.s page 19 - - - 461 01d2 1D48 ldr r0, .L39 - 462 .LVL30: - 463 01d4 FFF714FF bl FLASHRAM_WaitForLastOperation - 464 .LVL31: - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 465 .loc 1 248 0 - 466 01d8 0028 cmp r0, #0 - 467 01da 00D0 beq .L38 - 468 .LVL32: - 469 .L32: - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** #endif /* FLASH_PECR_PARALLBANK */ - 470 .loc 1 296 0 - 471 @ sp needed - 472 .LVL33: - 473 .LVL34: - 474 .LVL35: - 475 .LVL36: - 476 01dc F8BD pop {r3, r4, r5, r6, r7, pc} - 477 .LVL37: - 478 .L38: - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); - 479 .loc 1 251 0 - 480 01de 1B4B ldr r3, .L39+4 - 481 01e0 5968 ldr r1, [r3, #4] - 482 01e2 8022 movs r2, #128 - 483 01e4 1202 lsls r2, r2, #8 - 484 01e6 0A43 orrs r2, r1 - 485 01e8 5A60 str r2, [r3, #4] - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PROG); - 486 .loc 1 252 0 - 487 01ea 5968 ldr r1, [r3, #4] - 488 01ec 8022 movs r2, #128 - 489 01ee D200 lsls r2, r2, #3 - 490 01f0 0A43 orrs r2, r1 - 491 01f2 5A60 str r2, [r3, #4] - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 492 .loc 1 253 0 - 493 01f4 5A68 ldr r2, [r3, #4] - 494 01f6 0821 movs r1, #8 - 495 01f8 0A43 orrs r2, r1 - 496 01fa 5A60 str r2, [r3, #4] - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** if(status == HAL_OK) - 497 .loc 1 256 0 - 498 01fc 1248 ldr r0, .L39 - 499 .LVL38: - 500 01fe FFF7FFFE bl FLASHRAM_WaitForLastOperation - 501 .LVL39: - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 502 .loc 1 257 0 - 503 0202 0028 cmp r0, #0 - 504 0204 12D1 bne .L33 - 505 .LBB14: - 506 .LBB15: - 507 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" - 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** - 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h - 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS Cortex-M Core Function/Instruction Header File - ARM GAS /tmp/ccviJFHV.s page 20 - - - 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V4.30 - 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 20. October 2015 - 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ - 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Copyright (c) 2009 - 2015 ARM LIMITED - 8:Drivers/CMSIS/Include/cmsis_gcc.h **** - 9:Drivers/CMSIS/Include/cmsis_gcc.h **** All rights reserved. - 10:Drivers/CMSIS/Include/cmsis_gcc.h **** Redistribution and use in source and binary forms, with or without - 11:Drivers/CMSIS/Include/cmsis_gcc.h **** modification, are permitted provided that the following conditions are met: - 12:Drivers/CMSIS/Include/cmsis_gcc.h **** - Redistributions of source code must retain the above copyright - 13:Drivers/CMSIS/Include/cmsis_gcc.h **** notice, this list of conditions and the following disclaimer. - 14:Drivers/CMSIS/Include/cmsis_gcc.h **** - Redistributions in binary form must reproduce the above copyright - 15:Drivers/CMSIS/Include/cmsis_gcc.h **** notice, this list of conditions and the following disclaimer in the - 16:Drivers/CMSIS/Include/cmsis_gcc.h **** documentation and/or other materials provided with the distribution. - 17:Drivers/CMSIS/Include/cmsis_gcc.h **** - Neither the name of ARM nor the names of its contributors may be used - 18:Drivers/CMSIS/Include/cmsis_gcc.h **** to endorse or promote products derived from this software without - 19:Drivers/CMSIS/Include/cmsis_gcc.h **** specific prior written permission. - 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * - 21:Drivers/CMSIS/Include/cmsis_gcc.h **** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 22:Drivers/CMSIS/Include/cmsis_gcc.h **** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 23:Drivers/CMSIS/Include/cmsis_gcc.h **** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - 24:Drivers/CMSIS/Include/cmsis_gcc.h **** ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE - 25:Drivers/CMSIS/Include/cmsis_gcc.h **** LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - 26:Drivers/CMSIS/Include/cmsis_gcc.h **** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - 27:Drivers/CMSIS/Include/cmsis_gcc.h **** SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - 28:Drivers/CMSIS/Include/cmsis_gcc.h **** INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - 29:Drivers/CMSIS/Include/cmsis_gcc.h **** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - 30:Drivers/CMSIS/Include/cmsis_gcc.h **** ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - 31:Drivers/CMSIS/Include/cmsis_gcc.h **** POSSIBILITY OF SUCH DAMAGE. - 32:Drivers/CMSIS/Include/cmsis_gcc.h **** ---------------------------------------------------------------------------*/ - 33:Drivers/CMSIS/Include/cmsis_gcc.h **** - 34:Drivers/CMSIS/Include/cmsis_gcc.h **** - 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H - 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H - 37:Drivers/CMSIS/Include/cmsis_gcc.h **** - 38:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ - 39:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined ( __GNUC__ ) - 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push - 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" - 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" - 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" - 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - 45:Drivers/CMSIS/Include/cmsis_gcc.h **** - 46:Drivers/CMSIS/Include/cmsis_gcc.h **** - 47:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ - 48:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface - 49:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions - 50:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ - 51:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 52:Drivers/CMSIS/Include/cmsis_gcc.h **** - 53:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 54:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts - 55:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. - 56:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 57:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 58:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void) - 59:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 60:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); - ARM GAS /tmp/ccviJFHV.s page 21 - - - 61:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 62:Drivers/CMSIS/Include/cmsis_gcc.h **** - 63:Drivers/CMSIS/Include/cmsis_gcc.h **** - 64:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - 65:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts - 66:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. - 67:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - 68:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - 69:Drivers/CMSIS/Include/cmsis_gcc.h **** __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void) - 70:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 71:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); - 508 .loc 2 71 0 - 509 .syntax divided - 510 @ 71 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 511 0206 72B6 cpsid i - 512 @ 0 "" 2 - 513 .thumb - 514 .syntax unified - 515 .LBE15: - 516 .LBE14: - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** HAL_StatusTypeDef status = HAL_OK; - 517 .loc 1 242 0 - 518 0208 0023 movs r3, #0 - 519 020a 02E0 b .L34 - 520 .LVL40: - 521 .L35: - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pBuffer1++; - 522 .loc 1 266 0 - 523 020c 04CD ldmia r5!, {r2} - 524 .LVL41: - 525 020e 3A60 str r2, [r7] - 526 .LVL42: - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 527 .loc 1 268 0 - 528 0210 0133 adds r3, r3, #1 - 529 .LVL43: - 530 .L34: - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 531 .loc 1 263 0 - 532 0212 0F2B cmp r3, #15 - 533 0214 FAD9 bls .L35 - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** while(count < 16U) - 534 .loc 1 272 0 - 535 0216 0023 movs r3, #0 - 536 .LVL44: - 537 0218 02E0 b .L36 - 538 .LVL45: - 539 .L37: - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pBuffer2++; - 540 .loc 1 276 0 - 541 021a 04CC ldmia r4!, {r2} - 542 .LVL46: - 543 021c 3260 str r2, [r6] - 544 .LVL47: - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 545 .loc 1 278 0 - 546 021e 0133 adds r3, r3, #1 - ARM GAS /tmp/ccviJFHV.s page 22 - - - 547 .LVL48: - 548 .L36: - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 549 .loc 1 273 0 - 550 0220 0F2B cmp r3, #15 - 551 0222 FAD9 bls .L37 - 552 .LBB16: - 553 .LBB17: - 60:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 554 .loc 2 60 0 - 555 .syntax divided - 556 @ 60 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 557 0224 62B6 cpsie i - 558 @ 0 "" 2 - 559 .thumb - 560 .syntax unified - 561 .LBE17: - 562 .LBE16: - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 563 .loc 1 285 0 - 564 0226 0848 ldr r0, .L39 - 565 .LVL49: - 566 0228 FFF7EAFE bl FLASHRAM_WaitForLastOperation - 567 .LVL50: - 568 .L33: - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); - 569 .loc 1 289 0 - 570 022c 074B ldr r3, .L39+4 - 571 022e 5A68 ldr r2, [r3, #4] - 572 0230 0821 movs r1, #8 - 573 0232 8A43 bics r2, r1 - 574 0234 5A60 str r2, [r3, #4] - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); - 575 .loc 1 290 0 - 576 0236 5A68 ldr r2, [r3, #4] - 577 0238 0549 ldr r1, .L39+8 - 578 023a 0A40 ands r2, r1 - 579 023c 5A60 str r2, [r3, #4] - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 580 .loc 1 291 0 - 581 023e 5A68 ldr r2, [r3, #4] - 582 0240 0449 ldr r1, .L39+12 - 583 0242 0A40 ands r2, r1 - 584 0244 5A60 str r2, [r3, #4] - 585 0246 C9E7 b .L32 - 586 .L40: - 587 .align 2 - 588 .L39: - 589 0248 50C30000 .word 50000 - 590 024c 00200240 .word 1073881088 - 591 0250 FFFBFFFF .word -1025 - 592 0254 FF7FFFFF .word -32769 - 593 .cfi_endproc - 594 .LFE42: - 596 .align 1 - 597 .global HAL_FLASHEx_HalfPageProgram - 598 .syntax unified - ARM GAS /tmp/ccviJFHV.s page 23 - - - 599 .code 16 - 600 .thumb_func - 601 .fpu softvfp - 603 HAL_FLASHEx_HalfPageProgram: - 604 .LFB43: - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** uint32_t count = 0U; - 605 .loc 1 322 0 - 606 .cfi_startproc - 607 @ args = 0, pretend = 0, frame = 0 - 608 @ frame_needed = 0, uses_anonymous_args = 0 - 609 .LVL51: - 610 0258 70B5 push {r4, r5, r6, lr} - 611 .LCFI2: - 612 .cfi_def_cfa_offset 16 - 613 .cfi_offset 4, -16 - 614 .cfi_offset 5, -12 - 615 .cfi_offset 6, -8 - 616 .cfi_offset 14, -4 - 617 025a 0500 movs r5, r0 - 618 025c 0C00 movs r4, r1 - 619 .LVL52: - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 620 .loc 1 327 0 - 621 025e 1248 ldr r0, .L45 - 622 .LVL53: - 623 0260 FFF7CEFE bl FLASHRAM_WaitForLastOperation - 624 .LVL54: - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 625 .loc 1 329 0 - 626 0264 0028 cmp r0, #0 - 627 0266 1ED1 bne .L42 - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** SET_BIT(FLASH->PECR, FLASH_PECR_PROG); - 628 .loc 1 332 0 - 629 0268 104B ldr r3, .L45+4 - 630 026a 5968 ldr r1, [r3, #4] - 631 026c 8022 movs r2, #128 - 632 026e D200 lsls r2, r2, #3 - 633 0270 0A43 orrs r2, r1 - 634 0272 5A60 str r2, [r3, #4] - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 635 .loc 1 333 0 - 636 0274 5A68 ldr r2, [r3, #4] - 637 0276 0821 movs r1, #8 - 638 0278 0A43 orrs r2, r1 - 639 027a 5A60 str r2, [r3, #4] - 640 .LBB18: - 641 .LBB19: - 642 .loc 2 71 0 - 643 .syntax divided - 644 @ 71 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 645 027c 72B6 cpsid i - 646 @ 0 "" 2 - 647 .thumb - 648 .syntax unified - 649 .LBE19: - 650 .LBE18: - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** HAL_StatusTypeDef status = HAL_OK; - ARM GAS /tmp/ccviJFHV.s page 24 - - - 651 .loc 1 323 0 - 652 027e 0023 movs r3, #0 - 653 0280 02E0 b .L43 - 654 .LVL55: - 655 .L44: - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** pBuffer++; - 656 .loc 1 342 0 - 657 0282 04CC ldmia r4!, {r2} - 658 .LVL56: - 659 0284 2A60 str r2, [r5] - 660 .LVL57: - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 661 .loc 1 344 0 - 662 0286 0133 adds r3, r3, #1 - 663 .LVL58: - 664 .L43: - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** { - 665 .loc 1 339 0 - 666 0288 0F2B cmp r3, #15 - 667 028a FAD9 bls .L44 - 668 .LBB20: - 669 .LBB21: - 60:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 670 .loc 2 60 0 - 671 .syntax divided - 672 @ 60 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 673 028c 62B6 cpsie i - 674 @ 0 "" 2 - 675 .thumb - 676 .syntax unified - 677 .LBE21: - 678 .LBE20: - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 679 .loc 1 351 0 - 680 028e 0648 ldr r0, .L45 - 681 .LVL59: - 682 0290 FFF7B6FE bl FLASHRAM_WaitForLastOperation - 683 .LVL60: - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); - 684 .loc 1 354 0 - 685 0294 054B ldr r3, .L45+4 - 686 0296 5A68 ldr r2, [r3, #4] - 687 0298 0821 movs r1, #8 - 688 029a 8A43 bics r2, r1 - 689 029c 5A60 str r2, [r3, #4] - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** } - 690 .loc 1 355 0 - 691 029e 5A68 ldr r2, [r3, #4] - 692 02a0 0349 ldr r1, .L45+8 - 693 02a2 0A40 ands r2, r1 - 694 02a4 5A60 str r2, [r3, #4] - 695 .LVL61: - 696 .L42: - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 697 .loc 1 360 0 - 698 @ sp needed - 699 .LVL62: - ARM GAS /tmp/ccviJFHV.s page 25 - - - 700 .LVL63: - 701 02a6 70BD pop {r4, r5, r6, pc} - 702 .L46: - 703 .align 2 - 704 .L45: - 705 02a8 50C30000 .word 50000 - 706 02ac 00200240 .word 1073881088 - 707 02b0 FFFBFFFF .word -1025 - 708 .cfi_endproc - 709 .LFE43: - 711 .align 1 - 712 .global HAL_FLASHEx_GetError - 713 .syntax unified - 714 .code 16 - 715 .thumb_func - 716 .fpu softvfp - 718 HAL_FLASHEx_GetError: - 719 .LFB44: - 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** *Error = pFlash.ErrorCode; - 720 .loc 1 393 0 - 721 .cfi_startproc - 722 @ args = 0, pretend = 0, frame = 0 - 723 @ frame_needed = 0, uses_anonymous_args = 0 - 724 @ link register save eliminated. - 725 .LVL64: - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** return HAL_OK; - 726 .loc 1 394 0 - 727 02b4 024B ldr r3, .L48 - 728 02b6 5B69 ldr r3, [r3, #20] - 729 02b8 0360 str r3, [r0] - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_flash_ramfunc.c **** - 730 .loc 1 396 0 - 731 02ba 0020 movs r0, #0 - 732 .LVL65: - 733 @ sp needed - 734 02bc 7047 bx lr - 735 .L49: - 736 02be C046 .align 2 - 737 .L48: - 738 02c0 00000000 .word pFlash - 739 .cfi_endproc - 740 .LFE44: - 742 .text - 743 .Letext0: - 744 .file 3 "/usr/arm-none-eabi/include/machine/_default_types.h" - 745 .file 4 "/usr/arm-none-eabi/include/sys/_stdint.h" - 746 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 747 .file 6 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 748 .file 7 "/usr/arm-none-eabi/include/sys/lock.h" - 749 .file 8 "/usr/arm-none-eabi/include/sys/_types.h" - 750 .file 9 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 751 .file 10 "/usr/arm-none-eabi/include/sys/reent.h" - 752 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 753 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h" - ARM GAS /tmp/ccviJFHV.s page 26 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_flash_ramfunc.c - /tmp/ccviJFHV.s:16 .RamFunc:0000000000000000 $t - /tmp/ccviJFHV.s:22 .RamFunc:0000000000000000 FLASHRAM_WaitForLastOperation - /tmp/ccviJFHV.s:257 .RamFunc:0000000000000114 $d - /tmp/ccviJFHV.s:262 .RamFunc:000000000000011c $t - /tmp/ccviJFHV.s:269 .RamFunc:000000000000011c HAL_FLASHEx_EnableRunPowerDown - /tmp/ccviJFHV.s:293 .RamFunc:0000000000000134 $d - /tmp/ccviJFHV.s:299 .RamFunc:0000000000000140 $t - /tmp/ccviJFHV.s:306 .RamFunc:0000000000000140 HAL_FLASHEx_DisableRunPowerDown - /tmp/ccviJFHV.s:330 .RamFunc:0000000000000158 $d - /tmp/ccviJFHV.s:336 .RamFunc:0000000000000164 $t - /tmp/ccviJFHV.s:343 .RamFunc:0000000000000164 HAL_FLASHEx_EraseParallelPage - /tmp/ccviJFHV.s:425 .RamFunc:00000000000001b8 $d - /tmp/ccviJFHV.s:432 .RamFunc:00000000000001c8 $t - /tmp/ccviJFHV.s:439 .RamFunc:00000000000001c8 HAL_FLASHEx_ProgramParallelHalfPage - /tmp/ccviJFHV.s:589 .RamFunc:0000000000000248 $d - /tmp/ccviJFHV.s:596 .RamFunc:0000000000000258 $t - /tmp/ccviJFHV.s:603 .RamFunc:0000000000000258 HAL_FLASHEx_HalfPageProgram - /tmp/ccviJFHV.s:705 .RamFunc:00000000000002a8 $d - /tmp/ccviJFHV.s:711 .RamFunc:00000000000002b4 $t - /tmp/ccviJFHV.s:718 .RamFunc:00000000000002b4 HAL_FLASHEx_GetError - /tmp/ccviJFHV.s:738 .RamFunc:00000000000002c0 $d - .debug_frame:0000000000000010 $d - -UNDEFINED SYMBOLS -pFlash diff --git a/build/stm32l0xx_hal_gpio.d b/build/stm32l0xx_hal_gpio.d deleted file mode 100644 index 2ac70d2..0000000 --- a/build/stm32l0xx_hal_gpio.d +++ /dev/null @@ -1,103 +0,0 @@ -build/stm32l0xx_hal_gpio.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_gpio.lst b/build/stm32l0xx_hal_gpio.lst deleted file mode 100644 index fef8baa..0000000 --- a/build/stm32l0xx_hal_gpio.lst +++ /dev/null @@ -1,1503 +0,0 @@ -ARM GAS /tmp/ccJYgg6T.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_gpio.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.HAL_GPIO_Init,"ax",%progbits - 16 .align 1 - 17 .global HAL_GPIO_Init - 18 .syntax unified - 19 .code 16 - 20 .thumb_func - 21 .fpu softvfp - 23 HAL_GPIO_Init: - 24 .LFB39: - 25 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @file stm32l0xx_hal_gpio.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief GPIO HAL module driver. - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * This file provides firmware functions to manage the following - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * functionalities of the General Purpose Input/Output (GPIO) peripheral: - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * + Initialization and de-initialization functions - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * + IO operation functions - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** @verbatim - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ============================================================================== - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ##### GPIO Peripheral features ##### - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ============================================================================== - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** [..] - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** configured by software in several modes: - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) Input mode - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) Analog mode - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) Output mode - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) Alternate function mode - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) External interrupt/event lines - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (+) During and just after reset, the alternate functions and external interrupt - 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** lines are not active and the I/O ports are configured in input floating mode. - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** activated or not. - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** type and the IO speed can be selected depending on the VDD value. - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (+) The microcontroller IO pins are connected to onboard peripherals/modules through a - ARM GAS /tmp/ccJYgg6T.s page 2 - - - 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** multiplexer that allows only one peripheral alternate function (AF) connected - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** to an IO pin at a time. In this way, there can be no conflict between peripherals - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** sharing the same IO pin. - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (+) All ports have external interrupt/event capability. To use external interrupt - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** lines, the port must be configured in input mode. All available GPIO pins are - 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (+) The external interrupt/event controller consists of up to 28 edge detectors - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (16 lines are connected to GPIO) for generating event/interrupt requests (each - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** input line can be independently configured to select the type (interrupt or event) - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** and the corresponding trigger event (rising or falling or both). Each line can - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** also be masked independently. - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ##### How to use this driver ##### - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ============================================================================== - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** [..] - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) Enable the GPIO IOPORT clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE(). - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** structure. - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) In case of Output or alternate function mode selection: the speed is - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** configured through "Speed" member from GPIO_InitTypeDef structure. - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) In alternate mode is selection, the alternate function connected to the IO - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** is configured through "Alternate" member from GPIO_InitTypeDef structure. - 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) Analog mode is required when a pin is to be used as ADC channel - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** or DAC output. - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (++) In case of external interrupt/event selection the "Mode" member from - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIO_InitTypeDef structure select the type (interrupt or event) and - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both). - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using - 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** HAL_NVIC_EnableIRQ(). - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) HAL_GPIO_DeInit allows to set register values to their reset value. This function - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** is also to be used when unconfiguring pin which was used as an external interrupt - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** or in event mode. That is the only way to reset the corresponding bit in - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI & SYSCFG registers. - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) During and just after reset, the alternate functions are not - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** active and the GPIO pins are configured in input floating mode (except JTAG - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** pins). - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** priority over the GPIO function. - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - ARM GAS /tmp/ccJYgg6T.s page 3 - - - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** general purpose PH0 and PH1, respectively, when the HSE oscillator is off. - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** The HSE has priority over the GPIO function. - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** @endverbatim - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ****************************************************************************** - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @attention - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * Redistribution and use in source and binary forms, with or without modification, - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * are permitted provided that the following conditions are met: - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * 1. Redistributions of source code must retain the above copyright notice, - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * this list of conditions and the following disclaimer. - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * this list of conditions and the following disclaimer in the documentation - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * and/or other materials provided with the distribution. - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * may be used to endorse or promote products derived from this software - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * without specific prior written permission. - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ****************************************************************************** - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Includes ------------------------------------------------------------------*/ - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #include "stm32l0xx_hal.h" - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** @addtogroup STM32L0xx_HAL_Driver - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @{ - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #ifdef HAL_GPIO_MODULE_ENABLED - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** @addtogroup GPIO - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief GPIO HAL module driver - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @{ - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** @addtogroup GPIO_Private - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @{ - 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Private define ------------------------------------------------------------*/ - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #define GPIO_MODE ((uint32_t)0x00000003U) - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #define EXTI_MODE ((uint32_t)0x10000000U) - ARM GAS /tmp/ccJYgg6T.s page 4 - - - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #define GPIO_MODE_IT ((uint32_t)0x00010000U) - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #define GPIO_MODE_EVT ((uint32_t)0x00020000U) - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #define RISING_EDGE ((uint32_t)0x00100000U) - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #define FALLING_EDGE ((uint32_t)0x00200000U) - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010U) - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** #define GPIO_NUMBER ((uint32_t)16U) - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @} - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** @addtogroup GPIO_Exported_Functions - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @{ - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** @addtogroup GPIO_Exported_Functions_Group1 - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief Initialization and de-initialization functions - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** @verbatim - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** =============================================================================== - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ##### Initialization and de-initialization functions ##### - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** =============================================================================== - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** @endverbatim - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @{ - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0XX family d - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * Note that GPIOE is not available on all devices. - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * the configuration information for the specified GPIO peripheral. - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @retval None - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 26 .loc 1 184 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 .LVL0: - 31 0000 F0B5 push {r4, r5, r6, r7, lr} - 32 .LCFI0: - 33 .cfi_def_cfa_offset 20 - 34 .cfi_offset 4, -20 - 35 .cfi_offset 5, -16 - 36 .cfi_offset 6, -12 - 37 .cfi_offset 7, -8 - 38 .cfi_offset 14, -4 - 39 0002 C646 mov lr, r8 - 40 0004 00B5 push {lr} - 41 .LCFI1: - 42 .cfi_def_cfa_offset 24 - 43 .cfi_offset 8, -24 - 44 .LVL1: - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** uint32_t position = 0x00U; - ARM GAS /tmp/ccJYgg6T.s page 5 - - - 45 .loc 1 185 0 - 46 0006 0023 movs r3, #0 - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** uint32_t iocurrent = 0x00U; - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** uint32_t temp = 0x00U; - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Check the parameters */ - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,(GPIO_Init->Pin))); - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure the port pins */ - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** while (((GPIO_Init->Pin) >> position) != 0) - 47 .loc 1 195 0 - 48 0008 38E0 b .L2 - 49 .LVL2: - 50 .L21: - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Get the IO position */ - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** iocurrent = (GPIO_Init->Pin) & (1U << position); - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if(iocurrent) - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /*--------------------- GPIO Mode Configuration ------------------------*/ - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* In case of Alternate function mode selection */ - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Check if the Alternate function is compliant with the GPIO in use */ - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_AF_AVAILABLE(GPIOx,(GPIO_Init->Alternate))); - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure Alternate function mapped with the current IO */ - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp = GPIOx->AFR[position >> 3U]; - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~((uint32_t)0xFU << ((uint32_t)(position & (uint32_t)0x07U) * 4U)) ; - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07U) * 4U)) - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->AFR[position >> 3U] = temp; - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* In case of Output or Alternate function mode selection */ - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Check the Speed parameter */ - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure the IO Speed */ - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp = GPIOx->OSPEEDR; - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U)); - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2U)); - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure the IO Output Type */ - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp= GPIOx->OTYPER; - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->OTYPER = temp; - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp = GPIOx->MODER; - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODE0 << (position * 2U)); - ARM GAS /tmp/ccJYgg6T.s page 6 - - - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->MODER = temp; - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Activate the Pull-up or Pull down resistor for the current IO */ - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp = GPIOx->PUPDR; - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2U)); - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->PUPDR = temp; - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /*--------------------- EXTI Mode Configuration ------------------------*/ - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Enable SYSCFG Clock */ - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp = SYSCFG->EXTICR[position >> 2U]; - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** CLEAR_BIT(temp, ((uint32_t)0x0FU) << (4U * (position & 0x03U))); - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03U))); - 51 .loc 1 255 0 - 52 000a 0526 movs r6, #5 - 53 000c 00E0 b .L8 - 54 .L14: - 55 000e 0026 movs r6, #0 - 56 .L8: - 57 .loc 1 255 0 is_stmt 0 discriminator 24 - 58 0010 AE40 lsls r6, r6, r5 - 59 0012 3500 movs r5, r6 - 60 0014 3D43 orrs r5, r7 - 61 .LVL3: - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] = temp; - 62 .loc 1 256 0 is_stmt 1 discriminator 24 - 63 0016 0234 adds r4, r4, #2 - 64 0018 A400 lsls r4, r4, #2 - 65 001a 584E ldr r6, .L22 - 66 001c A551 str r5, [r4, r6] - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Clear EXTI line configuration */ - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp = EXTI->IMR; - 67 .loc 1 259 0 discriminator 24 - 68 001e 584C ldr r4, .L22+4 - 69 0020 2568 ldr r5, [r4] - 70 .LVL4: - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~((uint32_t)iocurrent); - 71 .loc 1 260 0 discriminator 24 - 72 0022 4246 mov r2, r8 - 73 0024 D443 mvns r4, r2 - 74 0026 2E00 movs r6, r5 - 75 0028 2640 ands r6, r4 - 76 .LVL5: - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 77 .loc 1 261 0 discriminator 24 - 78 002a 4A68 ldr r2, [r1, #4] - 79 002c D203 lsls r2, r2, #15 - 80 002e 02D5 bpl .L9 - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= iocurrent; - ARM GAS /tmp/ccJYgg6T.s page 7 - - - 81 .loc 1 263 0 - 82 0030 4246 mov r2, r8 - 83 0032 1543 orrs r5, r2 - 84 0034 2E00 movs r6, r5 - 85 .LVL6: - 86 .L9: - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->IMR = temp; - 87 .loc 1 265 0 - 88 0036 524D ldr r5, .L22+4 - 89 0038 2E60 str r6, [r5] - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp = EXTI->EMR; - 90 .loc 1 267 0 - 91 003a 6D68 ldr r5, [r5, #4] - 92 .LVL7: - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~((uint32_t)iocurrent); - 93 .loc 1 268 0 - 94 003c 2E00 movs r6, r5 - 95 003e 2640 ands r6, r4 - 96 .LVL8: - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 97 .loc 1 269 0 - 98 0040 4A68 ldr r2, [r1, #4] - 99 0042 9203 lsls r2, r2, #14 - 100 0044 02D5 bpl .L10 - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= iocurrent; - 101 .loc 1 271 0 - 102 0046 4246 mov r2, r8 - 103 0048 1543 orrs r5, r2 - 104 004a 2E00 movs r6, r5 - 105 .LVL9: - 106 .L10: - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->EMR = temp; - 107 .loc 1 273 0 - 108 004c 4C4D ldr r5, .L22+4 - 109 004e 6E60 str r6, [r5, #4] - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp = EXTI->RTSR; - 110 .loc 1 276 0 - 111 0050 AD68 ldr r5, [r5, #8] - 112 .LVL10: - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~((uint32_t)iocurrent); - 113 .loc 1 277 0 - 114 0052 2E00 movs r6, r5 - 115 0054 2640 ands r6, r4 - 116 .LVL11: - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 117 .loc 1 278 0 - 118 0056 4A68 ldr r2, [r1, #4] - 119 0058 D202 lsls r2, r2, #11 - 120 005a 02D5 bpl .L11 - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= iocurrent; - ARM GAS /tmp/ccJYgg6T.s page 8 - - - 121 .loc 1 280 0 - 122 005c 4246 mov r2, r8 - 123 005e 1543 orrs r5, r2 - 124 0060 2E00 movs r6, r5 - 125 .LVL12: - 126 .L11: - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->RTSR = temp; - 127 .loc 1 282 0 - 128 0062 474D ldr r5, .L22+4 - 129 0064 AE60 str r6, [r5, #8] - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp = EXTI->FTSR; - 130 .loc 1 284 0 - 131 0066 ED68 ldr r5, [r5, #12] - 132 .LVL13: - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~((uint32_t)iocurrent); - 133 .loc 1 285 0 - 134 0068 2C40 ands r4, r5 - 135 .LVL14: - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 136 .loc 1 286 0 - 137 006a 4A68 ldr r2, [r1, #4] - 138 006c 9202 lsls r2, r2, #10 - 139 006e 02D5 bpl .L12 - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= iocurrent; - 140 .loc 1 288 0 - 141 0070 4246 mov r2, r8 - 142 0072 2A43 orrs r2, r5 - 143 0074 1400 movs r4, r2 - 144 .LVL15: - 145 .L12: - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->FTSR = temp; - 146 .loc 1 290 0 - 147 0076 424A ldr r2, .L22+4 - 148 0078 D460 str r4, [r2, #12] - 149 .LVL16: - 150 .L3: - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** position++; - 151 .loc 1 293 0 - 152 007a 0133 adds r3, r3, #1 - 153 .LVL17: - 154 .L2: - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 155 .loc 1 195 0 - 156 007c 0A68 ldr r2, [r1] - 157 007e 1400 movs r4, r2 - 158 0080 DC40 lsrs r4, r4, r3 - 159 0082 77D0 beq .L20 - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 160 .loc 1 198 0 - 161 0084 0124 movs r4, #1 - 162 0086 9C40 lsls r4, r4, r3 - ARM GAS /tmp/ccJYgg6T.s page 9 - - - 163 0088 2240 ands r2, r4 - 164 008a 9046 mov r8, r2 - 165 .LVL18: - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 166 .loc 1 200 0 - 167 008c F5D0 beq .L3 - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 168 .loc 1 204 0 - 169 008e 4D68 ldr r5, [r1, #4] - 170 0090 022D cmp r5, #2 - 171 0092 01D0 beq .L4 - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 172 .loc 1 204 0 is_stmt 0 discriminator 1 - 173 0094 122D cmp r5, #18 - 174 0096 0ED1 bne .L5 - 175 .L4: - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~((uint32_t)0xFU << ((uint32_t)(position & (uint32_t)0x07U) * 4U)) ; - 176 .loc 1 209 0 is_stmt 1 - 177 0098 DD08 lsrs r5, r3, #3 - 178 009a 0835 adds r5, r5, #8 - 179 009c AD00 lsls r5, r5, #2 - 180 009e 2F58 ldr r7, [r5, r0] - 181 .LVL19: - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07U) * 4U)) - 182 .loc 1 210 0 - 183 00a0 0726 movs r6, #7 - 184 00a2 1E40 ands r6, r3 - 185 00a4 B600 lsls r6, r6, #2 - 186 00a6 0F22 movs r2, #15 - 187 .LVL20: - 188 00a8 B240 lsls r2, r2, r6 - 189 00aa 9743 bics r7, r2 - 190 .LVL21: - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->AFR[position >> 3U] = temp; - 191 .loc 1 211 0 - 192 00ac 0A69 ldr r2, [r1, #16] - 193 00ae B240 lsls r2, r2, r6 - 194 00b0 1600 movs r6, r2 - 195 00b2 3E43 orrs r6, r7 - 196 .LVL22: - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 197 .loc 1 212 0 - 198 00b4 2E50 str r6, [r5, r0] - 199 .LVL23: - 200 .L5: - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 201 .loc 1 216 0 - 202 00b6 4D68 ldr r5, [r1, #4] - 203 00b8 6E1E subs r6, r5, #1 - 204 00ba 012E cmp r6, #1 - 205 00bc 03D9 bls .L6 - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - 206 .loc 1 216 0 is_stmt 0 discriminator 1 - 207 00be 112D cmp r5, #17 - 208 00c0 01D0 beq .L6 - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 209 .loc 1 217 0 is_stmt 1 - ARM GAS /tmp/ccJYgg6T.s page 10 - - - 210 00c2 122D cmp r5, #18 - 211 00c4 12D1 bne .L7 - 212 .L6: - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U)); - 213 .loc 1 222 0 - 214 00c6 8568 ldr r5, [r0, #8] - 215 .LVL24: - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2U)); - 216 .loc 1 223 0 - 217 00c8 5F00 lsls r7, r3, #1 - 218 00ca 0326 movs r6, #3 - 219 00cc BE40 lsls r6, r6, r7 - 220 00ce B543 bics r5, r6 - 221 .LVL25: - 222 00d0 2E00 movs r6, r5 - 223 .LVL26: - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; - 224 .loc 1 224 0 - 225 00d2 CD68 ldr r5, [r1, #12] - 226 .LVL27: - 227 00d4 BD40 lsls r5, r5, r7 - 228 00d6 3543 orrs r5, r6 - 229 .LVL28: - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 230 .loc 1 225 0 - 231 00d8 8560 str r5, [r0, #8] - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 232 .loc 1 228 0 - 233 00da 4568 ldr r5, [r0, #4] - 234 .LVL29: - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); - 235 .loc 1 229 0 - 236 00dc A543 bics r5, r4 - 237 .LVL30: - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->OTYPER = temp; - 238 .loc 1 230 0 - 239 00de 4A68 ldr r2, [r1, #4] - 240 00e0 1609 lsrs r6, r2, #4 - 241 00e2 0124 movs r4, #1 - 242 00e4 3440 ands r4, r6 - 243 00e6 9C40 lsls r4, r4, r3 - 244 00e8 2C43 orrs r4, r5 - 245 .LVL31: - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 246 .loc 1 231 0 - 247 00ea 4460 str r4, [r0, #4] - 248 .LVL32: - 249 .L7: - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODE0 << (position * 2U)); - 250 .loc 1 235 0 - 251 00ec 0768 ldr r7, [r0] - 252 .LVL33: - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); - 253 .loc 1 236 0 - 254 00ee 5E00 lsls r6, r3, #1 - 255 00f0 0324 movs r4, #3 - 256 00f2 2500 movs r5, r4 - ARM GAS /tmp/ccJYgg6T.s page 11 - - - 257 00f4 B540 lsls r5, r5, r6 - 258 00f6 ED43 mvns r5, r5 - 259 00f8 2F40 ands r7, r5 - 260 .LVL34: - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->MODER = temp; - 261 .loc 1 237 0 - 262 00fa 4A68 ldr r2, [r1, #4] - 263 00fc 1440 ands r4, r2 - 264 00fe B440 lsls r4, r4, r6 - 265 0100 3C43 orrs r4, r7 - 266 .LVL35: - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 267 .loc 1 238 0 - 268 0102 0460 str r4, [r0] - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); - 269 .loc 1 241 0 - 270 0104 C468 ldr r4, [r0, #12] - 271 .LVL36: - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2U)); - 272 .loc 1 242 0 - 273 0106 2540 ands r5, r4 - 274 .LVL37: - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->PUPDR = temp; - 275 .loc 1 243 0 - 276 0108 8C68 ldr r4, [r1, #8] - 277 010a B440 lsls r4, r4, r6 - 278 010c 2C43 orrs r4, r5 - 279 .LVL38: - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 280 .loc 1 244 0 - 281 010e C460 str r4, [r0, #12] - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 282 .loc 1 248 0 - 283 0110 4A68 ldr r2, [r1, #4] - 284 0112 D200 lsls r2, r2, #3 - 285 0114 B1D5 bpl .L3 - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 286 .loc 1 251 0 - 287 0116 1B4D ldr r5, .L22+8 - 288 0118 6C6B ldr r4, [r5, #52] - 289 .LVL39: - 290 011a 0126 movs r6, #1 - 291 011c 3443 orrs r4, r6 - 292 011e 6C63 str r4, [r5, #52] - 293 .LVL40: - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** CLEAR_BIT(temp, ((uint32_t)0x0FU) << (4U * (position & 0x03U))); - 294 .loc 1 253 0 - 295 0120 9C08 lsrs r4, r3, #2 - 296 0122 A51C adds r5, r4, #2 - 297 0124 AD00 lsls r5, r5, #2 - 298 0126 154E ldr r6, .L22 - 299 0128 AF59 ldr r7, [r5, r6] - 300 .LVL41: - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03U))); - 301 .loc 1 254 0 - 302 012a 0326 movs r6, #3 - 303 012c 1E40 ands r6, r3 - ARM GAS /tmp/ccJYgg6T.s page 12 - - - 304 012e B500 lsls r5, r6, #2 - 305 0130 0F26 movs r6, #15 - 306 0132 AE40 lsls r6, r6, r5 - 307 0134 B743 bics r7, r6 - 308 .LVL42: - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] = temp; - 309 .loc 1 255 0 - 310 0136 A026 movs r6, #160 - 311 0138 F605 lsls r6, r6, #23 - 312 013a B042 cmp r0, r6 - 313 013c 00D1 bne .LCB317 - 314 013e 66E7 b .L14 @long jump - 315 .LCB317: - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] = temp; - 316 .loc 1 255 0 is_stmt 0 discriminator 1 - 317 0140 114E ldr r6, .L22+12 - 318 0142 B042 cmp r0, r6 - 319 0144 0ED0 beq .L15 - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] = temp; - 320 .loc 1 255 0 discriminator 3 - 321 0146 114E ldr r6, .L22+16 - 322 0148 B042 cmp r0, r6 - 323 014a 0DD0 beq .L16 - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] = temp; - 324 .loc 1 255 0 discriminator 5 - 325 014c 104E ldr r6, .L22+20 - 326 014e B042 cmp r0, r6 - 327 0150 0CD0 beq .L17 - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] = temp; - 328 .loc 1 255 0 discriminator 7 - 329 0152 104E ldr r6, .L22+24 - 330 0154 B042 cmp r0, r6 - 331 0156 0BD0 beq .L18 - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] = temp; - 332 .loc 1 255 0 discriminator 9 - 333 0158 0F4E ldr r6, .L22+28 - 334 015a B042 cmp r0, r6 - 335 015c 00D1 bne .LCB332 - 336 015e 54E7 b .L21 @long jump - 337 .LCB332: - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] = temp; - 338 .loc 1 255 0 - 339 0160 0626 movs r6, #6 - 340 0162 55E7 b .L8 - 341 .L15: - 342 0164 0126 movs r6, #1 - 343 0166 53E7 b .L8 - 344 .L16: - 345 0168 0226 movs r6, #2 - 346 016a 51E7 b .L8 - 347 .L17: - 348 016c 0326 movs r6, #3 - 349 016e 4FE7 b .L8 - 350 .L18: - 351 0170 0426 movs r6, #4 - 352 0172 4DE7 b .L8 - 353 .LVL43: - ARM GAS /tmp/ccJYgg6T.s page 13 - - - 354 .L20: - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 355 .loc 1 295 0 is_stmt 1 - 356 @ sp needed - 357 0174 04BC pop {r2} - 358 0176 9046 mov r8, r2 - 359 0178 F0BD pop {r4, r5, r6, r7, pc} - 360 .L23: - 361 017a C046 .align 2 - 362 .L22: - 363 017c 00000140 .word 1073807360 - 364 0180 00040140 .word 1073808384 - 365 0184 00100240 .word 1073876992 - 366 0188 00040050 .word 1342178304 - 367 018c 00080050 .word 1342179328 - 368 0190 000C0050 .word 1342180352 - 369 0194 00100050 .word 1342181376 - 370 0198 001C0050 .word 1342184448 - 371 .cfi_endproc - 372 .LFE39: - 374 .section .text.HAL_GPIO_DeInit,"ax",%progbits - 375 .align 1 - 376 .global HAL_GPIO_DeInit - 377 .syntax unified - 378 .code 16 - 379 .thumb_func - 380 .fpu softvfp - 382 HAL_GPIO_DeInit: - 383 .LFB40: - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief De-initializes the GPIOx peripheral registers to their default reset values. - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0XX family d - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * Note that GPIOE is not available on all devices. - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @retval None - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 384 .loc 1 307 0 - 385 .cfi_startproc - 386 @ args = 0, pretend = 0, frame = 0 - 387 @ frame_needed = 0, uses_anonymous_args = 0 - 388 .LVL44: - 389 0000 F0B5 push {r4, r5, r6, r7, lr} - 390 .LCFI2: - 391 .cfi_def_cfa_offset 20 - 392 .cfi_offset 4, -20 - 393 .cfi_offset 5, -16 - 394 .cfi_offset 6, -12 - 395 .cfi_offset 7, -8 - 396 .cfi_offset 14, -4 - 397 0002 D646 mov lr, r10 - 398 0004 4F46 mov r7, r9 - ARM GAS /tmp/ccJYgg6T.s page 14 - - - 399 0006 4646 mov r6, r8 - 400 0008 C0B5 push {r6, r7, lr} - 401 .LCFI3: - 402 .cfi_def_cfa_offset 32 - 403 .cfi_offset 8, -32 - 404 .cfi_offset 9, -28 - 405 .cfi_offset 10, -24 - 406 .LVL45: - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** uint32_t position = 0x00U; - 407 .loc 1 308 0 - 408 000a 0023 movs r3, #0 - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** uint32_t iocurrent = 0x00U; - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** uint32_t tmp = 0x00U; - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Check the parameters */ - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin)); - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure the port pins */ - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** while ((GPIO_Pin >> position) != 0) - 409 .loc 1 316 0 - 410 000c 06E0 b .L25 - 411 .LVL46: - 412 .L37: - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Get the IO position */ - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** iocurrent = (GPIO_Pin) & (1U << position); - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if(iocurrent) - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /*------------------------- GPIO Mode Configuration --------------------*/ - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure IO Direction in Input Floting Mode */ - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->MODER |= (GPIO_MODER_MODE0 << (position * 2U)); - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure the default Alternate Function in current IO */ - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->AFR[position >> 3U] &= ~((uint32_t)0xFU << ((uint32_t)(position & (uint32_t)0x07U) * 4 - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure the default value for IO Speed */ - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U)); - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Configure the default value IO Output Type */ - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Deactivate the Pull-up oand Pull-down resistor for the current IO */ - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /*------------------------- EXTI Mode Configuration --------------------*/ - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Clear the External Interrupt or Event for the current IO */ - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** tmp = SYSCFG->EXTICR[position >> 2U]; - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** tmp &= (((uint32_t)0x0FU) << (4U * (position & 0x03U))); - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if(tmp == (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)))) - 413 .loc 1 344 0 - 414 000e 0525 movs r5, #5 - 415 0010 00E0 b .L27 - 416 .L29: - 417 0012 0025 movs r5, #0 - 418 .L27: - ARM GAS /tmp/ccJYgg6T.s page 15 - - - 419 .loc 1 344 0 is_stmt 0 discriminator 24 - 420 0014 9540 lsls r5, r5, r2 - 421 0016 A542 cmp r5, r4 - 422 0018 54D0 beq .L35 - 423 .LVL47: - 424 .L26: - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** tmp = ((uint32_t)0x0FU) << (4U * (position & 0x03U)); - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2U] &= ~tmp; - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Clear EXTI line configuration */ - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->IMR &= ~((uint32_t)iocurrent); - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); - 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** position++; - 425 .loc 1 358 0 is_stmt 1 - 426 001a 0133 adds r3, r3, #1 - 427 .LVL48: - 428 .L25: - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 429 .loc 1 316 0 - 430 001c 0A00 movs r2, r1 - 431 001e DA40 lsrs r2, r2, r3 - 432 0020 66D0 beq .L36 - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 433 .loc 1 319 0 - 434 0022 0122 movs r2, #1 - 435 0024 9A40 lsls r2, r2, r3 - 436 0026 0C00 movs r4, r1 - 437 0028 1440 ands r4, r2 - 438 002a A446 mov ip, r4 - 439 .LVL49: - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 440 .loc 1 321 0 - 441 002c F5D0 beq .L26 - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 442 .loc 1 325 0 - 443 002e 0668 ldr r6, [r0] - 444 0030 5D00 lsls r5, r3, #1 - 445 0032 0324 movs r4, #3 - 446 .LVL50: - 447 0034 A246 mov r10, r4 - 448 0036 2700 movs r7, r4 - 449 0038 AF40 lsls r7, r7, r5 - 450 003a 3D00 movs r5, r7 - 451 003c 3E43 orrs r6, r7 - 452 003e 0660 str r6, [r0] - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 453 .loc 1 328 0 - 454 0040 DF08 lsrs r7, r3, #3 - 455 0042 0837 adds r7, r7, #8 - 456 0044 BF00 lsls r7, r7, #2 - ARM GAS /tmp/ccJYgg6T.s page 16 - - - 457 0046 3C58 ldr r4, [r7, r0] - 458 0048 A146 mov r9, r4 - 459 004a 0726 movs r6, #7 - 460 004c 1E40 ands r6, r3 - 461 004e B600 lsls r6, r6, #2 - 462 0050 0F24 movs r4, #15 - 463 0052 A046 mov r8, r4 - 464 0054 B440 lsls r4, r4, r6 - 465 0056 2600 movs r6, r4 - 466 0058 4C46 mov r4, r9 - 467 005a B443 bics r4, r6 - 468 005c 3C50 str r4, [r7, r0] - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 469 .loc 1 331 0 - 470 005e 8668 ldr r6, [r0, #8] - 471 0060 ED43 mvns r5, r5 - 472 0062 2E40 ands r6, r5 - 473 0064 8660 str r6, [r0, #8] - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 474 .loc 1 334 0 - 475 0066 4668 ldr r6, [r0, #4] - 476 0068 9643 bics r6, r2 - 477 006a 4660 str r6, [r0, #4] - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 478 .loc 1 337 0 - 479 006c C268 ldr r2, [r0, #12] - 480 006e 1540 ands r5, r2 - 481 0070 C560 str r5, [r0, #12] - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** tmp &= (((uint32_t)0x0FU) << (4U * (position & 0x03U))); - 482 .loc 1 342 0 - 483 0072 9E08 lsrs r6, r3, #2 - 484 0074 B51C adds r5, r6, #2 - 485 0076 AD00 lsls r5, r5, #2 - 486 0078 204A ldr r2, .L38 - 487 007a AD58 ldr r5, [r5, r2] - 488 .LVL51: - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if(tmp == (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)))) - 489 .loc 1 343 0 - 490 007c 5246 mov r2, r10 - 491 007e 1A40 ands r2, r3 - 492 0080 9200 lsls r2, r2, #2 - 493 0082 4746 mov r7, r8 - 494 0084 9740 lsls r7, r7, r2 - 495 0086 2C00 movs r4, r5 - 496 0088 3C40 ands r4, r7 - 497 .LVL52: - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 498 .loc 1 344 0 - 499 008a A025 movs r5, #160 - 500 008c ED05 lsls r5, r5, #23 - 501 008e A842 cmp r0, r5 - 502 0090 BFD0 beq .L29 - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 503 .loc 1 344 0 is_stmt 0 discriminator 1 - 504 0092 1B4D ldr r5, .L38+4 - 505 0094 A842 cmp r0, r5 - 506 0096 0DD0 beq .L30 - ARM GAS /tmp/ccJYgg6T.s page 17 - - - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 507 .loc 1 344 0 discriminator 3 - 508 0098 1A4D ldr r5, .L38+8 - 509 009a A842 cmp r0, r5 - 510 009c 0CD0 beq .L31 - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 511 .loc 1 344 0 discriminator 5 - 512 009e 1A4D ldr r5, .L38+12 - 513 00a0 A842 cmp r0, r5 - 514 00a2 0BD0 beq .L32 - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 515 .loc 1 344 0 discriminator 7 - 516 00a4 194D ldr r5, .L38+16 - 517 00a6 A842 cmp r0, r5 - 518 00a8 0AD0 beq .L33 - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 519 .loc 1 344 0 discriminator 9 - 520 00aa 194D ldr r5, .L38+20 - 521 00ac A842 cmp r0, r5 - 522 00ae AED0 beq .L37 - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 523 .loc 1 344 0 - 524 00b0 0625 movs r5, #6 - 525 00b2 AFE7 b .L27 - 526 .L30: - 527 00b4 0125 movs r5, #1 - 528 00b6 ADE7 b .L27 - 529 .L31: - 530 00b8 0225 movs r5, #2 - 531 00ba ABE7 b .L27 - 532 .L32: - 533 00bc 0325 movs r5, #3 - 534 00be A9E7 b .L27 - 535 .L33: - 536 00c0 0425 movs r5, #4 - 537 00c2 A7E7 b .L27 - 538 .L35: - 539 .LVL53: - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 540 .loc 1 347 0 is_stmt 1 - 541 00c4 0D4D ldr r5, .L38 - 542 00c6 B21C adds r2, r6, #2 - 543 00c8 9200 lsls r2, r2, #2 - 544 00ca 5459 ldr r4, [r2, r5] - 545 00cc BC43 bics r4, r7 - 546 00ce 5451 str r4, [r2, r5] - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); - 547 .loc 1 350 0 - 548 00d0 104C ldr r4, .L38+24 - 549 00d2 2568 ldr r5, [r4] - 550 00d4 6246 mov r2, ip - 551 00d6 D243 mvns r2, r2 - 552 00d8 1540 ands r5, r2 - 553 00da 2560 str r5, [r4] - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 554 .loc 1 351 0 - 555 00dc 6568 ldr r5, [r4, #4] - ARM GAS /tmp/ccJYgg6T.s page 18 - - - 556 00de 1540 ands r5, r2 - 557 00e0 6560 str r5, [r4, #4] - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); - 558 .loc 1 354 0 - 559 00e2 A568 ldr r5, [r4, #8] - 560 00e4 1540 ands r5, r2 - 561 00e6 A560 str r5, [r4, #8] - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 562 .loc 1 355 0 - 563 00e8 E568 ldr r5, [r4, #12] - 564 00ea 2A40 ands r2, r5 - 565 00ec E260 str r2, [r4, #12] - 566 00ee 94E7 b .L26 - 567 .LVL54: - 568 .L36: - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 569 .loc 1 360 0 - 570 @ sp needed - 571 00f0 1CBC pop {r2, r3, r4} - 572 00f2 9046 mov r8, r2 - 573 00f4 9946 mov r9, r3 - 574 00f6 A246 mov r10, r4 - 575 00f8 F0BD pop {r4, r5, r6, r7, pc} - 576 .L39: - 577 00fa C046 .align 2 - 578 .L38: - 579 00fc 00000140 .word 1073807360 - 580 0100 00040050 .word 1342178304 - 581 0104 00080050 .word 1342179328 - 582 0108 000C0050 .word 1342180352 - 583 010c 00100050 .word 1342181376 - 584 0110 001C0050 .word 1342184448 - 585 0114 00040140 .word 1073808384 - 586 .cfi_endproc - 587 .LFE40: - 589 .section .text.HAL_GPIO_ReadPin,"ax",%progbits - 590 .align 1 - 591 .global HAL_GPIO_ReadPin - 592 .syntax unified - 593 .code 16 - 594 .thumb_func - 595 .fpu softvfp - 597 HAL_GPIO_ReadPin: - 598 .LFB41: - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @} - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** @addtogroup GPIO_Exported_Functions_Group2 - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief GPIO Read and Write - 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * - 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** @verbatim - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** =============================================================================== - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** ##### IO operation functions ##### - 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** =============================================================================== - ARM GAS /tmp/ccJYgg6T.s page 19 - - - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** @endverbatim - 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @{ - 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief Reads the specified input port pin. - 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family d - 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * Note that GPIOE is not available on all devices. - 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to read. - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * This parameter can be GPIO_PIN_x where x can be (0..15). - 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @retval The input port pin value. - 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 599 .loc 1 388 0 - 600 .cfi_startproc - 601 @ args = 0, pretend = 0, frame = 0 - 602 @ frame_needed = 0, uses_anonymous_args = 0 - 603 @ link register save eliminated. - 604 .LVL55: - 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIO_PinState bitstatus; - 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Check the parameters */ - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin)); - 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 605 .loc 1 394 0 - 606 0000 0369 ldr r3, [r0, #16] - 607 0002 0B42 tst r3, r1 - 608 0004 01D1 bne .L43 - 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** bitstatus = GPIO_PIN_SET; - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** else - 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** bitstatus = GPIO_PIN_RESET; - 609 .loc 1 400 0 - 610 0006 0020 movs r0, #0 - 611 .LVL56: - 612 .L41: - 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** return bitstatus; - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 613 .loc 1 403 0 - 614 @ sp needed - 615 0008 7047 bx lr - 616 .LVL57: - 617 .L43: - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 618 .loc 1 396 0 - 619 000a 0120 movs r0, #1 - 620 .LVL58: - 621 000c FCE7 b .L41 - 622 .cfi_endproc - 623 .LFE41: - ARM GAS /tmp/ccJYgg6T.s page 20 - - - 625 .section .text.HAL_GPIO_WritePin,"ax",%progbits - 626 .align 1 - 627 .global HAL_GPIO_WritePin - 628 .syntax unified - 629 .code 16 - 630 .thumb_func - 631 .fpu softvfp - 633 HAL_GPIO_WritePin: - 634 .LFB42: - 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief Sets or clears the selected data port bit. - 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR register to allow atomic read/modify - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between - 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * the read and the modify access. - 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family d - 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * Note that GPIOE is not available on all devices. - 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written. - 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param PinState: specifies the value to be written to the selected bit. - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * This parameter can be one of the GPIO_PinState enum values: - 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * GPIO_PIN_RESET: to clear the port pin - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * GPIO_PIN_SET: to set the port pin - 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @retval None - 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) - 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 635 .loc 1 424 0 - 636 .cfi_startproc - 637 @ args = 0, pretend = 0, frame = 0 - 638 @ frame_needed = 0, uses_anonymous_args = 0 - 639 @ link register save eliminated. - 640 .LVL59: - 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Check the parameters */ - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin)); - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_ACTION(PinState)); - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if(PinState != GPIO_PIN_RESET) - 641 .loc 1 429 0 - 642 0000 002A cmp r2, #0 - 643 0002 01D1 bne .L47 - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->BSRR = GPIO_Pin; - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** else - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->BRR = GPIO_Pin ; - 644 .loc 1 435 0 - 645 0004 8162 str r1, [r0, #40] - 646 .L44: - 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 647 .loc 1 437 0 - 648 @ sp needed - ARM GAS /tmp/ccJYgg6T.s page 21 - - - 649 0006 7047 bx lr - 650 .L47: - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 651 .loc 1 431 0 - 652 0008 8161 str r1, [r0, #24] - 653 000a FCE7 b .L44 - 654 .cfi_endproc - 655 .LFE42: - 657 .section .text.HAL_GPIO_TogglePin,"ax",%progbits - 658 .align 1 - 659 .global HAL_GPIO_TogglePin - 660 .syntax unified - 661 .code 16 - 662 .thumb_func - 663 .fpu softvfp - 665 HAL_GPIO_TogglePin: - 666 .LFB43: - 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief Toggles the specified GPIO pins. - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIOx: Where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family d - 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * Note that GPIOE is not available on all devices. - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIO_Pin: Specifies the pins to be toggled. - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @retval None - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 667 .loc 1 448 0 - 668 .cfi_startproc - 669 @ args = 0, pretend = 0, frame = 0 - 670 @ frame_needed = 0, uses_anonymous_args = 0 - 671 @ link register save eliminated. - 672 .LVL60: - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Check the parameters */ - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin)); - 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->ODR ^= GPIO_Pin; - 673 .loc 1 452 0 - 674 0000 4369 ldr r3, [r0, #20] - 675 0002 5940 eors r1, r3 - 676 .LVL61: - 677 0004 4161 str r1, [r0, #20] - 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 678 .loc 1 453 0 - 679 @ sp needed - 680 0006 7047 bx lr - 681 .cfi_endproc - 682 .LFE43: - 684 .section .text.HAL_GPIO_LockPin,"ax",%progbits - 685 .align 1 - 686 .global HAL_GPIO_LockPin - 687 .syntax unified - 688 .code 16 - 689 .thumb_func - 690 .fpu softvfp - 692 HAL_GPIO_LockPin: - ARM GAS /tmp/ccJYgg6T.s page 22 - - - 693 .LFB44: - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief Locks GPIO Pins configuration registers. - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, - 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @note The configuration of the locked GPIO pins can no longer be modified - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * until the next reset. - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIOx: where x can be (A..E and H) to select the GPIO peripheral for STM32L0xx family. - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * Note that GPIOE is not available on all devices. - 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to be locked. - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * All port bits are not necessarily available on all GPIOs. - 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @retval None - 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 694 .loc 1 469 0 - 695 .cfi_startproc - 696 @ args = 0, pretend = 0, frame = 8 - 697 @ frame_needed = 0, uses_anonymous_args = 0 - 698 @ link register save eliminated. - 699 .LVL62: - 700 0000 82B0 sub sp, sp, #8 - 701 .LCFI4: - 702 .cfi_def_cfa_offset 8 - 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** __IO uint32_t tmp = GPIO_LCKR_LCKK; - 703 .loc 1 470 0 - 704 0002 8022 movs r2, #128 - 705 0004 5202 lsls r2, r2, #9 - 706 0006 0192 str r2, [sp, #4] - 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Check the parameters */ - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx,GPIO_Pin)); - 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Apply lock key write sequence */ - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** tmp |= GPIO_Pin; - 707 .loc 1 476 0 - 708 0008 019B ldr r3, [sp, #4] - 709 000a 0B43 orrs r3, r1 - 710 000c 0193 str r3, [sp, #4] - 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->LCKR = tmp; - 711 .loc 1 478 0 - 712 000e 019B ldr r3, [sp, #4] - 713 0010 C361 str r3, [r0, #28] - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->LCKR = GPIO_Pin; - 714 .loc 1 480 0 - 715 0012 C161 str r1, [r0, #28] - 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** GPIOx->LCKR = tmp; - 716 .loc 1 482 0 - 717 0014 019B ldr r3, [sp, #4] - 718 0016 C361 str r3, [r0, #28] - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Read LCKK bit*/ - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** tmp = GPIOx->LCKR; - ARM GAS /tmp/ccJYgg6T.s page 23 - - - 719 .loc 1 484 0 - 720 0018 C369 ldr r3, [r0, #28] - 721 001a 0193 str r3, [sp, #4] - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) - 722 .loc 1 486 0 - 723 001c C369 ldr r3, [r0, #28] - 724 001e 1342 tst r3, r2 - 725 0020 02D1 bne .L52 - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** return HAL_OK; - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** else - 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** return HAL_ERROR; - 726 .loc 1 492 0 - 727 0022 0120 movs r0, #1 - 728 .LVL63: - 729 .L50: - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 730 .loc 1 494 0 - 731 0024 02B0 add sp, sp, #8 - 732 @ sp needed - 733 0026 7047 bx lr - 734 .LVL64: - 735 .L52: - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 736 .loc 1 488 0 - 737 0028 0020 movs r0, #0 - 738 .LVL65: - 739 002a FBE7 b .L50 - 740 .cfi_endproc - 741 .LFE44: - 743 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits - 744 .align 1 - 745 .weak HAL_GPIO_EXTI_Callback - 746 .syntax unified - 747 .code 16 - 748 .thumb_func - 749 .fpu softvfp - 751 HAL_GPIO_EXTI_Callback: - 752 .LFB46: - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief This function handles EXTI interrupt request. - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIO_Pin: Specifies the pins connected to the EXTI line. - 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @retval None - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* EXTI line interrupt detected */ - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - ARM GAS /tmp/ccJYgg6T.s page 24 - - - 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /** - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @brief EXTI line detection callbacks. - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @param GPIO_Pin: Specifies the pins connected to the EXTI line. - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** * @retval None - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 753 .loc 1 516 0 - 754 .cfi_startproc - 755 @ args = 0, pretend = 0, frame = 0 - 756 @ frame_needed = 0, uses_anonymous_args = 0 - 757 @ link register save eliminated. - 758 .LVL66: - 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* Prevent unused argument(s) compilation warning */ - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** UNUSED(GPIO_Pin); - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* NOTE: This function Should not be modified, when the callback is needed, - 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** the HAL_GPIO_EXTI_Callback could be implemented in the user file - 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** */ - 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 759 .loc 1 523 0 - 760 @ sp needed - 761 0000 7047 bx lr - 762 .cfi_endproc - 763 .LFE46: - 765 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits - 766 .align 1 - 767 .global HAL_GPIO_EXTI_IRQHandler - 768 .syntax unified - 769 .code 16 - 770 .thumb_func - 771 .fpu softvfp - 773 HAL_GPIO_EXTI_IRQHandler: - 774 .LFB45: - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** /* EXTI line interrupt detected */ - 775 .loc 1 501 0 - 776 .cfi_startproc - 777 @ args = 0, pretend = 0, frame = 0 - 778 @ frame_needed = 0, uses_anonymous_args = 0 - 779 .LVL67: - 780 0000 10B5 push {r4, lr} - 781 .LCFI5: - 782 .cfi_def_cfa_offset 8 - 783 .cfi_offset 4, -8 - 784 .cfi_offset 14, -4 - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** { - 785 .loc 1 503 0 - 786 0002 054B ldr r3, .L57 - 787 0004 5B69 ldr r3, [r3, #20] - 788 0006 1842 tst r0, r3 - 789 0008 00D1 bne .L56 - 790 .LVL68: - 791 .L54: - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 792 .loc 1 508 0 - 793 @ sp needed - ARM GAS /tmp/ccJYgg6T.s page 25 - - - 794 000a 10BD pop {r4, pc} - 795 .LVL69: - 796 .L56: - 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); - 797 .loc 1 505 0 - 798 000c 024B ldr r3, .L57 - 799 000e 5861 str r0, [r3, #20] - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** } - 800 .loc 1 506 0 - 801 0010 FFF7FEFF bl HAL_GPIO_EXTI_Callback - 802 .LVL70: - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.c **** - 803 .loc 1 508 0 - 804 0014 F9E7 b .L54 - 805 .L58: - 806 0016 C046 .align 2 - 807 .L57: - 808 0018 00040140 .word 1073808384 - 809 .cfi_endproc - 810 .LFE45: - 812 .text - 813 .Letext0: - 814 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" - 815 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" - 816 .file 4 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h" - 817 .file 5 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h" - 818 .file 6 "/usr/arm-none-eabi/include/sys/lock.h" - 819 .file 7 "/usr/arm-none-eabi/include/sys/_types.h" - 820 .file 8 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h" - 821 .file 9 "/usr/arm-none-eabi/include/sys/reent.h" - 822 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h" - 823 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h" - 824 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h" - ARM GAS /tmp/ccJYgg6T.s page 26 - - -DEFINED SYMBOLS - *ABS*:0000000000000000 stm32l0xx_hal_gpio.c - /tmp/ccJYgg6T.s:16 .text.HAL_GPIO_Init:0000000000000000 $t - /tmp/ccJYgg6T.s:23 .text.HAL_GPIO_Init:0000000000000000 HAL_GPIO_Init - /tmp/ccJYgg6T.s:363 .text.HAL_GPIO_Init:000000000000017c $d - /tmp/ccJYgg6T.s:375 .text.HAL_GPIO_DeInit:0000000000000000 $t - /tmp/ccJYgg6T.s:382 .text.HAL_GPIO_DeInit:0000000000000000 HAL_GPIO_DeInit - /tmp/ccJYgg6T.s:579 .text.HAL_GPIO_DeInit:00000000000000fc $d - /tmp/ccJYgg6T.s:590 .text.HAL_GPIO_ReadPin:0000000000000000 $t - /tmp/ccJYgg6T.s:597 .text.HAL_GPIO_ReadPin:0000000000000000 HAL_GPIO_ReadPin - /tmp/ccJYgg6T.s:626 .text.HAL_GPIO_WritePin:0000000000000000 $t - /tmp/ccJYgg6T.s:633 .text.HAL_GPIO_WritePin:0000000000000000 HAL_GPIO_WritePin - /tmp/ccJYgg6T.s:658 .text.HAL_GPIO_TogglePin:0000000000000000 $t - /tmp/ccJYgg6T.s:665 .text.HAL_GPIO_TogglePin:0000000000000000 HAL_GPIO_TogglePin - /tmp/ccJYgg6T.s:685 .text.HAL_GPIO_LockPin:0000000000000000 $t - /tmp/ccJYgg6T.s:692 .text.HAL_GPIO_LockPin:0000000000000000 HAL_GPIO_LockPin - /tmp/ccJYgg6T.s:744 .text.HAL_GPIO_EXTI_Callback:0000000000000000 $t - /tmp/ccJYgg6T.s:751 .text.HAL_GPIO_EXTI_Callback:0000000000000000 HAL_GPIO_EXTI_Callback - /tmp/ccJYgg6T.s:766 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 $t - /tmp/ccJYgg6T.s:773 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 HAL_GPIO_EXTI_IRQHandler - /tmp/ccJYgg6T.s:808 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000018 $d - .debug_frame:0000000000000010 $d - -NO UNDEFINED SYMBOLS diff --git a/build/stm32l0xx_hal_i2c.d b/build/stm32l0xx_hal_i2c.d deleted file mode 100644 index 488c77d..0000000 --- a/build/stm32l0xx_hal_i2c.d +++ /dev/null @@ -1,105 +0,0 @@ -build/stm32l0xx_hal_i2c.d: \ - Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c Inc/vcom.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h \ - Inc/stm32l0xx_hal_conf.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h \ - Drivers/CMSIS/Include/core_cm0plus.h \ - Drivers/CMSIS/Include/core_cmInstr.h Drivers/CMSIS/Include/cmsis_gcc.h \ - Drivers/CMSIS/Include/core_cmFunc.h \ - Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h \ - Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h - -Inc/vcom.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal.h: - -Inc/stm32l0xx_hal_conf.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l0xx.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h: - -Drivers/CMSIS/Include/core_cm0plus.h: - -Drivers/CMSIS/Include/core_cmInstr.h: - -Drivers/CMSIS/Include/cmsis_gcc.h: - -Drivers/CMSIS/Include/core_cmFunc.h: - -Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_gpio_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_dma.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_adc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_flash_ramfunc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_i2c_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_iwdg.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_spi.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_tim_ex.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart.h: - -Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_uart_ex.h: diff --git a/build/stm32l0xx_hal_i2c.lst b/build/stm32l0xx_hal_i2c.lst deleted file mode 100644 index 31eebb5..0000000 --- a/build/stm32l0xx_hal_i2c.lst +++ /dev/null @@ -1,17938 +0,0 @@ -ARM GAS /tmp/ccpuPECZ.s page 1 - - - 1 .cpu cortex-m0plus - 2 .eabi_attribute 20, 1 - 3 .eabi_attribute 21, 1 - 4 .eabi_attribute 23, 3 - 5 .eabi_attribute 24, 1 - 6 .eabi_attribute 25, 1 - 7 .eabi_attribute 26, 1 - 8 .eabi_attribute 30, 1 - 9 .eabi_attribute 34, 0 - 10 .eabi_attribute 18, 4 - 11 .file "stm32l0xx_hal_i2c.c" - 12 .text - 13 .Ltext0: - 14 .cfi_sections .debug_frame - 15 .section .text.I2C_DMASlaveTransmitCplt,"ax",%progbits - 16 .align 1 - 17 .syntax unified - 18 .code 16 - 19 .thumb_func - 20 .fpu softvfp - 22 I2C_DMASlaveTransmitCplt: - 23 .LFB99: - 24 .file 1 "./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c" - 1:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 2:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ****************************************************************************** - 3:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @file stm32l0xx_hal_i2c.c - 4:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @author MCD Application Team - 5:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C HAL module driver. - 6:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * This file provides firmware functions to manage the following - 7:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * functionalities of the Inter Integrated Circuit (I2C) peripheral: - 8:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * + Initialization and de-initialization functions - 9:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * + IO operation functions - 10:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * + Peripheral State and Errors functions - 11:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * - 12:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** @verbatim - 13:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ============================================================================== - 14:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ##### How to use this driver ##### - 15:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ============================================================================== - 16:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 17:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** The I2C HAL driver can be used as follows: - 18:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 19:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) Declare a I2C_HandleTypeDef handle structure, for example: - 20:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_HandleTypeDef hi2c; - 21:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 22:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: - 23:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (##) Enable the I2Cx interface clock - 24:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (##) I2C pins configuration - 25:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Enable the clock for the I2C GPIOs - 26:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Configure I2C pins as alternate function open-drain - 27:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (##) NVIC configuration if you need to use interrupt process - 28:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Configure the I2Cx interrupt priority - 29:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Enable the NVIC I2C IRQ Channel - 30:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (##) DMA Configuration if you need to use DMA process - 31:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel - 32:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Enable the DMAx interface clock using - 33:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Configure the DMA handle parameters - 34:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Configure the DMA Tx or Rx channel - ARM GAS /tmp/ccpuPECZ.s page 2 - - - 35:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle - 36:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on - 37:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the DMA Tx or Rx channel - 38:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 39:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addres - 40:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure - 41:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 42:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level H - 43:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. - 44:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 45:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceRead - 46:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 47:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : - 48:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 49:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** *** Polling mode IO operation *** - 50:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ================================= - 51:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 52:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit( - 53:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() - 54:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() - 55:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() - 56:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 57:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** *** Polling mode IO MEM operation *** - 58:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ===================================== - 59:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 60:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_W - 61:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_ - 62:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 63:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 64:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** *** Interrupt mode IO operation *** - 65:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** =================================== - 66:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 67:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Trans - 68:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can - 69:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - 70:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receiv - 71:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can - 72:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - 73:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmi - 74:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can - 75:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() - 76:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_ - 77:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can - 78:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() - 79:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - 80:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_ErrorCallback() - 81:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - 82:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - 83:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - 84:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. - 85:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication - 86:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 87:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 88:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** *** Interrupt mode IO sequential operation *** - 89:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ============================================== - 90:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 91:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (@) These interfaces allow to manage a sequential transfer with a repeated start condition - ARM GAS /tmp/ccpuPECZ.s page 3 - - - 92:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** when a direction change during transfer - 93:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 94:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) A specific option field manage the different steps of a sequential transfer - 95:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below: - 96:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfa - 97:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start con - 98:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** and data to transfer without a final stop condition - 99:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a - 100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** and data to transfer without a final stop condition, an then permit a c - 101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** several times (like HAL_I2C_Master_Sequential_Transmit_IT() then HAL_I2 - 102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart - 103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th - 104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if no direction change and without a final stop condition in both cases - 105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart - 106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th - 107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if no direction change and with a final stop condition in both cases - 108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Differents sequential I2C interfaces are listed below: - 110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_ - 111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is execut - 112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - 113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I - 114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed - 115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - 116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - 117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - 118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - 119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() - 120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can - 121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code to check the Address Match Code and the transmission direction request - 122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can - 123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_ListenCpltCallback() - 124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I - 125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is execute - 126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() - 127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2 - 128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed a - 129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() - 130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - 131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_ErrorCallback() - 132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - 133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - 134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - 135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. - 136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication - 137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** *** Interrupt mode IO MEM operation *** - 139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ======================================= - 140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address - 142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_Mem_Write_IT() - 143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can - 144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() - 145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address - 146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_Mem_Read_IT() - 147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can - 148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() - ARM GAS /tmp/ccpuPECZ.s page 4 - - - 149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - 150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_ErrorCallback() - 151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** *** DMA mode IO operation *** - 153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ============================== - 154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using - 156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_Master_Transmit_DMA() - 157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can - 158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - 159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode (DMA) using - 160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_Master_Receive_DMA() - 161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can - 162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - 163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using - 164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_Slave_Transmit_DMA() - 165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can - 166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() - 167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using - 168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_Slave_Receive_DMA() - 169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can - 170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() - 171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - 172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_ErrorCallback() - 173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() - 174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can - 175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_AbortCpltCallback() - 176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. - 177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication - 178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** *** DMA mode IO MEM operation *** - 180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ================================= - 181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using - 183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_Mem_Write_DMA() - 184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can - 185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() - 186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using - 187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_Mem_Read_DMA() - 188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can - 189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() - 190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can - 191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** add his own code by customization of function pointer HAL_I2C_ErrorCallback() - 192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** *** I2C HAL driver macros list *** - 195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ================================== - 196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** Below the list of most used macros in I2C HAL driver. - 198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE: Enable the I2C peripheral - 200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE: Disable the I2C peripheral - 201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode - 202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not - 203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag - 204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt - 205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt - ARM GAS /tmp/ccpuPECZ.s page 5 - - - 206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (@) You can refer to the I2C HAL driver header file for more useful macros - 209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** @endverbatim - 211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ****************************************************************************** - 212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @attention - 213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * - 214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** *

© COPYRIGHT(c) 2016 STMicroelectronics

- 215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * - 216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * Redistribution and use in source and binary forms, with or without modification, - 217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * are permitted provided that the following conditions are met: - 218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * 1. Redistributions of source code must retain the above copyright notice, - 219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * this list of conditions and the following disclaimer. - 220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, - 221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * this list of conditions and the following disclaimer in the documentation - 222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * and/or other materials provided with the distribution. - 223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * 3. Neither the name of STMicroelectronics nor the names of its contributors - 224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * may be used to endorse or promote products derived from this software - 225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * without specific prior written permission. - 226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * - 227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - 228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - 229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - 230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - 231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - 232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - 233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - 234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - 235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - 236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - 237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * - 238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ****************************************************************************** - 239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Includes ------------------------------------------------------------------*/ - 242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #include - 243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #include "stm32l0xx_hal.h" - 244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @addtogroup STM32L0xx_HAL_Driver - 246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ - 247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @defgroup I2C I2C - 250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C HAL module driver - 251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ - 252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #ifdef HAL_I2C_MODULE_ENABLED - 255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private typedef -----------------------------------------------------------*/ - 257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private define ------------------------------------------------------------*/ - 258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @defgroup I2C_Private_Define I2C Private Define - 260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ - 261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */ - ARM GAS /tmp/ccpuPECZ.s page 6 - - - 263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */ - 264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */ - 265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */ - 266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */ - 267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */ - 268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_TIMEOUT_TC (25U) /*!< 25 ms */ - 269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */ - 270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */ - 271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */ - 272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define MAX_NBYTE_SIZE 255U - 274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define SlaveAddr_SHIFT 7U - 275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define SlaveAddr_MSK 0x06U - 276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private define for @ref PreviousState usage */ - 278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~( - 279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) - 280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MOD - 281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MOD - 282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MOD - 283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MOD - 284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MOD - 285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MOD - 286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private define to centralize the enable/disable of Interrupts */ - 289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_XFER_TX_IT (0x00000001U) - 290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_XFER_RX_IT (0x00000002U) - 291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_XFER_LISTEN_IT (0x00000004U) - 292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_XFER_ERROR_IT (0x00000011U) - 294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_XFER_CPLT_IT (0x00000012U) - 295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_XFER_RELOAD_IT (0x00000012U) - 296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private define Sequential Transfer Options default/reset value */ - 298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_NO_OPTION_FRAME (0xFFFF0000U) - 299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @} - 301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private macro -------------------------------------------------------------*/ - 304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** #define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) ((((__HANDLE__)->State) == HAL_I2C_STATE_BUSY_TX) ? \ - 305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ((uint32_t)((__HANDLE__)->hdmatx->Instance->CNDTR)) : \ - 306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ((uint32_t)((__HANDLE__)->hdmarx->Instance->CNDTR))) - 307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private variables ---------------------------------------------------------*/ - 309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private function prototypes -----------------------------------------------*/ - 310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @defgroup I2C_Private_Functions I2C Private Functions - 312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ - 313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private functions to handle DMA transfer */ - 315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); - 316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); - 317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); - 318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); - 319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma); - ARM GAS /tmp/ccpuPECZ.s page 7 - - - 320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma); - 321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private functions to handle IT transfer */ - 323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); - 324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c); - 325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c); - 326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); - 327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); - 328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); - 329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode); - 330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private functions to handle IT transfer */ - 332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint1 - 333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16 - 334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private functions for I2C transfer IRQ handler */ - 336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint - 337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint3 - 338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uin - 339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint - 340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private functions to handle flags during polling transfer */ - 342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta - 343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, - 344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, - 345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, - 346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_ - 347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private functions to centralize the enable/disable of Interrupts */ - 349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); - 350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); - 351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private functions to flush TXDR register */ - 353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c); - 354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Private functions to handle start, restart or stop a transfer */ - 356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_ - 357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @} - 359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Exported functions --------------------------------------------------------*/ - 362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions I2C Exported Functions - 364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ - 365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions - 368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Initialization and Configuration functions - 369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * - 370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** @verbatim - 371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** =============================================================================== - 372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ##### Initialization and de-initialization functions ##### - 373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** =============================================================================== - 374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] This subsection provides a set of functions allowing to initialize and - 375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** deinitialize the I2Cx peripheral: - 376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 8 - - - 377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) User must Implement HAL_I2C_MspInit() function in which he configures - 378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). - 379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Call the function HAL_I2C_Init() to configure the selected device with - 381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the selected configuration: - 382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Clock Timing - 383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Own Address 1 - 384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Addressing mode (Master, Slave) - 385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Dual Addressing mode - 386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Own Address 2 - 387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Own Address 2 Mask - 388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) General call mode - 389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Nostretch mode - 390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (+) Call the function HAL_I2C_DeInit() to restore the default configuration - 392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** of the selected I2Cx peripheral. - 393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** @endverbatim - 395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ - 396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Initializes the I2C according to the specified parameters - 400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in the I2C_InitTypeDef and initialize the associated handle. - 401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - 402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. - 403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status - 404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) - 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the I2C handle allocation */ - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c == NULL) - 409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ - 414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - 415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); - 416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); - 417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); - 418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); - 419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); - 420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); - 421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); - 422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_RESET) - 424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Allocate lock resource and initialize it */ - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Lock = HAL_UNLOCKED; - 427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_MspInit(hi2c); - 430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; - 433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 9 - - - 434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable the selected I2C peripheral */ - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); - 436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ - 438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Configure I2Cx: Frequency range */ - 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; - 440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ - 442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Own Address1 before set the Own Address1 configuration */ - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; - 444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Configure I2Cx: Own Address1 and ack own address1 mode */ - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); - 449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else /* I2C_ADDRESSINGMODE_10BIT */ - 451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); - 453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /*---------------------------- I2Cx CR2 Configuration ----------------------*/ - 456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Configure I2Cx: Addressing Master mode */ - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - 458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 = (I2C_CR2_ADD10); - 460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); - 463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ - 465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Own Address2 before set the Own Address2 configuration */ - 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; - 467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Configure I2Cx: Dual mode and Own Address2 */ - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddr - 470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /*---------------------------- I2Cx CR1 Configuration ----------------------*/ - 472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Configure I2Cx: Generalcall and NoStretch mode */ - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); - 474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the selected I2C peripheral */ - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_ENABLE(hi2c); - 477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; - 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief DeInitialize the I2C peripheral. - 488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - 489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. - 490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status - ARM GAS /tmp/ccpuPECZ.s page 10 - - - 491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the I2C handle allocation */ - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c == NULL) - 496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ - 501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - 502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; - 504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable the I2C Peripheral Clock */ - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); - 507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_MspDeInit(hi2c); - 510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Release Lock */ - 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); - 518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Initialize the I2C MSP. - 524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - 525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. - 526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None - 527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) - 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ - 531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); - 532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, - 534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_MspInit could be implemented in the user file - 535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief DeInitialize the I2C MSP. - 540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - 541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. - 542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None - 543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) - 545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ - 547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); - ARM GAS /tmp/ccpuPECZ.s page 11 - - - 548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, - 550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_MspDeInit could be implemented in the user file - 551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @} - 556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions - 559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Data transfers functions - 560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * - 561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** @verbatim - 562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** =============================================================================== - 563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ##### IO operation functions ##### - 564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** =============================================================================== - 565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] - 566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** This subsection provides a set of functions allowing to manage the I2C data - 567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** transfers. - 568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) There are two modes of transfer: - 570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) Blocking mode : The communication is performed in the polling mode. - 571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** The status of all data processing is returned by the same function - 572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** after finishing transfer. - 573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) No-Blocking mode : The communication is performed using Interrupts - 574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** or DMA. These functions return the status of the transfer startup. - 575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** The end of the data processing will be indicated through the - 576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when - 577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** using DMA mode. - 578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) Blocking mode functions are : - 580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit() - 581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive() - 582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit() - 583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive() - 584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write() - 585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read() - 586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_IsDeviceReady() - 587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) No-Blocking mode functions with Interrupt are : - 589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_IT() - 590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_IT() - 591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_IT() - 592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_IT() - 593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_IT() - 594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_IT() - 595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) No-Blocking mode functions with DMA are : - 597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_DMA() - 598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_DMA() - 599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_DMA() - 600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_DMA() - 601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_DMA() - 602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_DMA() - 603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: - ARM GAS /tmp/ccpuPECZ.s page 12 - - - 605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_MemTxCpltCallback() - 606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_MemRxCpltCallback() - 607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_MasterTxCpltCallback() - 608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_MasterRxCpltCallback() - 609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_SlaveTxCpltCallback() - 610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_SlaveRxCpltCallback() - 611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (++) HAL_I2C_ErrorCallback() - 612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** @endverbatim - 614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ - 615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Transmits in master mode an amount of data in blocking mode. - 619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - 620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. - 621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value - 622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface - 623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer - 624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent - 625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration - 626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status - 627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pD - 629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) - 633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ - 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); - 636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ - 638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); - 639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK - 641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; - 646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; - 647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ - 650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; - 651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; - 653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ - 655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) - 657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; - 659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRIT - 660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - ARM GAS /tmp/ccpuPECZ.s page 13 - - - 662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRI - 665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) - 668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ - 670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Write data to TXDR */ - 682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - 683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; - 685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - 687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TCR flag is set */ - 689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - 690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) - 695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; - 697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - 698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; - 702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - 703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - 708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOPF flag is set */ - 709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - ARM GAS /tmp/ccpuPECZ.s page 14 - - - 719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ - 722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ - 725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); - 726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ - 731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); - 732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; - 734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; - 738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Receives in master mode an amount of data in blocking mode. - 743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - 744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. - 745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value - 746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface - 747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer - 748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent - 749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration - 750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status - 751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pDa - 753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) - 757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ - 759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); - 760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ - 762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); - 763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK - 765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; - 770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; - 771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ - 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; - 775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - ARM GAS /tmp/ccpuPECZ.s page 15 - - - 776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; - 777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ - 779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - 780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) - 781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; - 783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ - 784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; - 788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_REA - 789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) - 792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ - 794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Read data from RXDR */ - 807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; - 808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; - 809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) - 812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TCR flag is set */ - 814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) - 815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) - 820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; - 822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - 823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; - 827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - 828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - ARM GAS /tmp/ccpuPECZ.s page 16 - - - 833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOPF flag is set */ - 834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 841:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 845:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ - 847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ - 850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); - 851:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 854:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ - 856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); - 857:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; - 859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 860:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 861:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; - 863:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 865:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 866:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 867:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Transmits in slave mode an amount of data in blocking mode. - 868:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - 869:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. - 870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer - 871:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent - 872:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration - 873:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status - 874:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ - 875:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, ui - 876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 877:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 878:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 879:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) - 880:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) - 882:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 883:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 885:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ - 886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); - 887:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 888:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ - 889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); - ARM GAS /tmp/ccpuPECZ.s page 17 - - - 890:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 891:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; - 892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; - 893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 895:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ - 896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; - 897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 898:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; - 899:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 900:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable Address Acknowledge */ - 901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - 902:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 903:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ - 904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - 905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 906:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ - 907:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; - 908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 909:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 910:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 911:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ADDR flag */ - 912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - 913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 914:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If 10bit addressing mode is selected */ - 915:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) - 916:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ - 918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - 919:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 920:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ - 921:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; - 922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 923:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ADDR flag */ - 926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); - 927:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 929:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until DIR flag is set Transmitter mode */ - 930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK) - 931:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 932:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ - 933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; - 934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 937:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) - 938:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ - 940:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 942:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ - 943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; - 944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 946:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 18 - - - 947:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 950:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 951:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 952:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 953:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 954:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 955:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Write data to TXDR */ - 956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); - 957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 959:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 960:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOP flag is set */ - 961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 963:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ - 964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; - 965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 967:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 968:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Normal use case for Transmitter mode */ - 969:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* A NACK is generated to confirm the end of transfer */ - 970:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 971:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - 973:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 976:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 977:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 978:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP flag */ - 979:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 980:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ - 982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) - 983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ - 985:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; - 986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 988:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 989:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ - 990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; - 991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 994:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ - 996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); - 997:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 998:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; - 999:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1000:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1001:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1003:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - ARM GAS /tmp/ccpuPECZ.s page 19 - - -1004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1006:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1007:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in blocking mode -1008:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1009:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1011:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1012:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -1013:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1015:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uin -1016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1017:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; -1018:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1019:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -1022:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1024:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1025:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1027:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1028:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ -1029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); -1030:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; -1032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; -1033:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1035:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1036:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -1039:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1040:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable Address Acknowledge */ -1041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; -1042:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1043:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ -1044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) -1045:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ -1047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; -1048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1049:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1050:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1051:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ADDR flag */ -1052:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); -1053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1054:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until DIR flag is reset Receiver mode */ -1055:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK) -1056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ -1058:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; -1059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1060:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - ARM GAS /tmp/ccpuPECZ.s page 20 - - -1061:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) -1063:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1064:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ -1065:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) -1066:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ -1068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; -1069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Store Last receive data if any */ -1071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) -1072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1073:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Read data from RXDR */ -1074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; -1075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -1076:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1077:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1078:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) -1079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1081:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1082:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1085:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1087:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Read data from RXDR */ -1089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; -1090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -1091:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1092:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1093:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOP flag is set */ -1094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) -1095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1096:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ -1097:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; -1098:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -1100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP flag */ -1110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -1111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ -1113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) -1114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ -1116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; -1117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - ARM GAS /tmp/ccpuPECZ.s page 21 - - -1118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ -1121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; -1122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -1124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -1125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt -1139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -1142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -1143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t -1148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -1150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) -1154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; -1162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; -1163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -1169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; -1170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -1172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -1174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; - ARM GAS /tmp/ccpuPECZ.s page 22 - - -1175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; -1180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ -1183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ -1184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); -1185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -1191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ -1194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* possible to enable all of these */ -1195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX -1196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); -1197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt -1208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -1211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -1212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t * -1217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -1219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) -1223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; -1231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; - ARM GAS /tmp/ccpuPECZ.s page 23 - - -1232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -1238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; -1239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -1241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -1243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -1244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; -1249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ -1252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ -1253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); -1254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -1260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ -1263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* possible to enable all of these */ -1264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX -1265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); -1266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt -1277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -1284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); - ARM GAS /tmp/ccpuPECZ.s page 24 - - -1289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; -1291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; -1292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable Address Acknowledge */ -1295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; -1296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -1302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; -1303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -1309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ -1312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* possible to enable all of these */ -1313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX -1314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); -1315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt -1326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -1333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; -1340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; -1341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable Address Acknowledge */ -1344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; -1345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 25 - - -1346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -1351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; -1352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -1358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ -1361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* possible to enable all of these */ -1362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX -1363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); -1364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with DMA -1375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -1378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -1379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t -1384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -1386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) -1390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; -1398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; -1399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; - ARM GAS /tmp/ccpuPECZ.s page 26 - - -1403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -1405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; -1406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -1408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -1410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -1411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; -1416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) -1419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ -1421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; -1422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the DMA error callback */ -1424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; -1425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ -1427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; -1428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; -1429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the DMA channel */ -1431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSi -1432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ -1434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ -1435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); -1436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Update XferCount value */ -1438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; -1439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -1445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ -1447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); -1448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable DMA Request */ -1450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; -1451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ -1455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; -1456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ -1458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ -1459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRI - ARM GAS /tmp/ccpuPECZ.s page 27 - - -1460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -1466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ -1468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* possible to enable all of these */ -1469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_ -1470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); -1471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with DMA -1483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -1486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -1487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t -1492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -1494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) -1498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; -1506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; -1507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -1513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; -1514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -1516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 28 - - -1517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -1518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -1519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; -1524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) -1527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ -1529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; -1530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the DMA error callback */ -1532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; -1533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ -1535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; -1536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; -1537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the DMA channel */ -1539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSi -1540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ -1542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ -1543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); -1544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Update XferCount value */ -1546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; -1547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -1553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ -1555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); -1556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable DMA Request */ -1558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; -1559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ -1563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; -1564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ -1566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ -1567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_REA -1568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current - ARM GAS /tmp/ccpuPECZ.s page 29 - - -1574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ -1576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* possible to enable all of these */ -1577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_ -1578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); -1579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA -1590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size -1597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -1601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; -1608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; -1609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -1616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; -1617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ -1619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; -1620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the DMA error callback */ -1622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; -1623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ -1625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; -1626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; -1627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the DMA channel */ -1629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize -1630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 30 - - -1631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable Address Acknowledge */ -1632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; -1633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -1639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ -1641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); -1642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable DMA Request */ -1644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; -1645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with DMA -1656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) -1663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -1667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; -1674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; -1675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -1682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; -1683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ -1685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; -1686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the DMA error callback */ - ARM GAS /tmp/ccpuPECZ.s page 31 - - -1688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; -1689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ -1691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; -1692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; -1693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the DMA channel */ -1695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize -1696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable Address Acknowledge */ -1698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; -1699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -1704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -1705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -1706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ -1707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); -1708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable DMA Request */ -1710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; -1711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Write an amount of data in blocking mode to a specific memory address -1721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -1724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -1725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddress Internal memory address -1726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address -1727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -1730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddre -1733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; -1735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -1737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); -1738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -1742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - ARM GAS /tmp/ccpuPECZ.s page 32 - - -1745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ -1750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); -1751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK -1753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; -1758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; -1759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -1765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ -1767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL -1768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -1770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ -1784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -1785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -1787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); -1788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); -1793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** do -1796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ -1798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) -1799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -1801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 33 - - -1802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Write data to TXDR */ -1811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); -1812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -1813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; -1814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) -1816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TCR flag is set */ -1818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) -1819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -1824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -1826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); -1827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); -1832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (hi2c->XferCount > 0U); -1837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ -1839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ -1840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) -1841:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -1843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1845:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1851:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ -1853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -1854:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ -1856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); -1857:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - ARM GAS /tmp/ccpuPECZ.s page 34 - - -1859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -1860:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1861:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1863:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -1865:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1866:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1867:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1868:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -1869:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1871:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1872:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -1873:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Read an amount of data in blocking mode from a specific memory address -1874:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -1875:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -1876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -1877:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -1878:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddress Internal memory address -1879:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address -1880:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -1881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -1882:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -1883:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -1884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -1885:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddres -1886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1887:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; -1888:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -1890:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); -1891:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -1893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -1895:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("Bad pData or Size=0\r\n"); -1897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1898:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1899:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1900:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -1901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -1902:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1903:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ -1904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); -1905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1906:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK -1907:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("Timeout\r\n"); -1909:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1910:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1911:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; -1913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; -1914:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -1915:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 35 - - -1916:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -1917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -1918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -1919:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -1920:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1921:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ -1922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_ -1923:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("Error in memory read - %d\r\n", hi2c->ErrorCode); -1925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -1926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1927:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1929:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1931:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1932:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -1934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -1935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1937:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1938:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ -1940:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ -1941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -1942:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -1944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ -1945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1946:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1947:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_REA -1950:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1951:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1952:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** do -1953:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1954:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ -1955:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) -1956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("waiting for flag timeout1\r\n"); -1958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -1959:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1960:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Read data from RXDR */ -1962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; -1963:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; -1964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -1965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) -1967:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1968:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TCR flag is set */ -1969:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) -1970:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1971:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("waiting for flag timeout2\r\n"); -1972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - ARM GAS /tmp/ccpuPECZ.s page 36 - - -1973:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -1976:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1977:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -1978:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); -1979:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1980:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -1983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); -1984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1985:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (hi2c->XferCount > 0U); -1988:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -1989:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ -1990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ -1991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) -1992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -1994:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -1995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("waiting for stop error %d\r\n", hi2c->ErrorCode); -1996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -1997:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -1998:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -1999:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2000:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2001:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2003:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ -2005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -2006:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2007:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ -2008:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); -2009:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -2011:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -2012:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2013:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2015:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2017:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2018:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2019:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("busy!!\r\n"); -2021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2022:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2024:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2025:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory addres -2026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2027:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2028:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -2029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface - ARM GAS /tmp/ccpuPECZ.s page 37 - - -2030:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddress Internal memory address -2031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address -2032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -2033:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -2034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2035:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2036:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd -2037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; -2039:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -2040:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -2042:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); -2043:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -2045:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -2047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2049:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2050:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2051:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) -2052:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2054:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2055:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2058:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ -2060:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); -2061:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; -2063:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; -2064:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -2065:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2066:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -2067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -2068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -2069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -2070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; -2071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -2073:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -2075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -2076:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2077:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2078:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -2080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; -2081:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2082:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ -2084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstar -2085:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - ARM GAS /tmp/ccpuPECZ.s page 38 - - -2087:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2091:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2092:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2093:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2096:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2097:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2098:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ -2101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); -2102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -2107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -2108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -2109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ -2111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* possible to enable all of these */ -2112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX -2113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); -2114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory addre -2125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -2128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -2129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddress Internal memory address -2130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address -2131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -2132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -2133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAdd -2136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; -2138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -2139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -2141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); -2142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) - ARM GAS /tmp/ccpuPECZ.s page 39 - - -2144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -2146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) -2151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ -2159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); -2160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; -2162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; -2163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -2164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -2166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -2167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -2168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -2169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; -2170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -2172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -2174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -2175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -2179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; -2180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ -2183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart -2184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -2186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ -2200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); - ARM GAS /tmp/ccpuPECZ.s page 40 - - -2201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -2206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -2207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -2208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ -2210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* possible to enable all of these */ -2211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX -2212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); -2213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address -2223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -2226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -2227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddress Internal memory address -2228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address -2229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -2230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -2231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemA -2234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; -2236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -2237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -2239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); -2240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -2242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -2244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) -2249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ -2257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); - ARM GAS /tmp/ccpuPECZ.s page 41 - - -2258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; -2260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; -2261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -2262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -2264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -2265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -2266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -2267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; -2268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -2270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -2272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -2273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -2277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; -2278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ -2281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstar -2282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -2284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ -2298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; -2299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the DMA error callback */ -2301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; -2302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ -2304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; -2305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; -2306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the DMA channel */ -2308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize -2309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address */ -2311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ -2312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); -2313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Update XferCount value */ - ARM GAS /tmp/ccpuPECZ.s page 42 - - -2315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; -2316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -2321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -2322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -2323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ -2324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); -2325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable DMA Request */ -2327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; -2328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. -2339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -2342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -2343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddress Internal memory address -2344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address -2345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -2346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be read -2347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd -2350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; -2352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -2353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -2355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); -2356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -2358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -2360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) -2365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 43 - - -2372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ -2373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); -2374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; -2376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; -2377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -2378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -2380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -2381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -2382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -2383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; -2384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -2386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -2388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -2389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -2393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; -2394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ -2397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart -2398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -2400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ -2414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; -2415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the DMA error callback */ -2417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; -2418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ -2420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; -2421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; -2422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the DMA channel */ -2424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize -2425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ -2427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, I2C_GENERATE_START_READ); -2428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 44 - - -2429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Update XferCount value */ -2430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; -2431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable DMA Request */ -2436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; -2437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -2439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -2440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -2441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ -2442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); -2443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Checks if target device is ready for communication. -2454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @note This function is used with Memory devices -2455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -2458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -2459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Trials Number of trials -2460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -2461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Tria -2464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; -2466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __IO uint32_t I2C_Trials = 0U; -2468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -2470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) -2472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; -2480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -2481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** do -2483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Generate Start */ -2485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress); - ARM GAS /tmp/ccpuPECZ.s page 45 - - -2486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ -2488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOPF flag is set or a NACK flag is set*/ -2489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tickstart = HAL_GetTick(); -2490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (__HAL_I2C_GET_FLAG(hi2c, I2C_F -2491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) -2493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) -2495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Device is ready */ -2497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -2498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check if the NACKF flag has not been set */ -2506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) -2507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ -2509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) -2510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ -2515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -2516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Device is ready */ -2518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -2519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ -2528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) -2529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -2534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -2535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag, auto generated with autoend*/ -2537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -2538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check if the maximum allowed number of trials has been reached */ -2541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_Trials++ == Trials) -2542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 46 - - -2543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Generate Stop */ -2544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; -2545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ -2547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) -2548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ -2553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -2554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (I2C_Trials < Trials); -2557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -2559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -2564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Inte -2573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during -2574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -2577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -2578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -2579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -2580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS -2581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddres -2584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -2586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; -2587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -2589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); -2590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -2592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; -2597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; -2598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -2599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 47 - - -2600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -2601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -2602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -2603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; -2604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; -2605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If size > MAX_NBYTE_SIZE, use reload mode */ -2607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -2608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -2610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -2611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -2615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; -2616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If transfer direction not change, do not generate Restart Condition */ -2619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ -2620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) -2621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; -2623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ -2626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest); -2627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -2632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -2633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -2634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); -2635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Inter -2646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during -2647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -2650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -2651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -2652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -2653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS -2654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress - ARM GAS /tmp/ccpuPECZ.s page 48 - - -2657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -2659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; -2660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -2662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); -2663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -2665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; -2670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; -2671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -2672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -2674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -2675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -2676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; -2677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; -2678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ -2680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -2681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -2683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -2684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -2688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; -2689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If transfer direction not change, do not generate Restart Condition */ -2692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ -2693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) -2694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; -2696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ -2699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest); -2700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -2705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -2706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -2707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); -2708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; - ARM GAS /tmp/ccpuPECZ.s page 49 - - -2714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit -2719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during -2720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -2723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -2724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS -2725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uin -2728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -2730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); -2731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN) -2733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -2735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ -2740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); -2741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ -2746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ -2747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) -2748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable associated Interrupts */ -2750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); -2751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; -2754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; -2755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -2756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable Address Acknowledge */ -2758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; -2759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -2761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -2762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -2763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -2764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; -2765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; -2766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) -2768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ -2770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ - ARM GAS /tmp/ccpuPECZ.s page 50 - - -2771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); -2772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -2778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -2779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -2780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* REnable ADDR interrupt */ -2781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); -2782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with -2793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during -2794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param pData Pointer to data buffer -2797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Amount of data to be sent -2798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS -2799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint -2802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -2804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); -2805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN) -2807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) -2809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ -2814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); -2815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ -2820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ -2821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) -2822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable associated Interrupts */ -2824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); -2825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; - ARM GAS /tmp/ccpuPECZ.s page 51 - - -2828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; -2829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -2830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable Address Acknowledge */ -2832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; -2833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare transfer parameters */ -2835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; -2836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; -2837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -2838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; -2839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; -2840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2841:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) -2842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ -2844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ -2845:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); -2846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2851:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -2852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -2853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -2854:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* REnable ADDR interrupt */ -2855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); -2856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2857:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2860:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2861:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2863:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2865:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2866:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Enable the Address listen mode with Interrupt. -2867:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2868:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2869:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2871:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c) -2872:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2873:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) -2874:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2875:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; -2876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; -2877:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2878:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the Address Match interrupt */ -2879:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); -2880:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2882:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2883:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 52 - - -2885:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2887:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2888:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2890:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Disable the Address listen mode with Interrupt. -2891:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C -2893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2895:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) -2896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ -2898:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tmp; -2899:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2900:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address listen mode only if a transfer is not ongoing */ -2901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) -2902:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2903:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK; -2904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); -2905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -2906:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -2907:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -2908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2909:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable the Address Match interrupt */ -2910:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); -2911:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2914:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2915:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2916:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; -2917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2919:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2920:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2921:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Abort a master I2C IT or DMA process communication with Interrupt. -2922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2923:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -2925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -2926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -2927:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) -2929:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MASTER) -2931:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2932:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -2933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -2934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Interrupts */ -2936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); -2937:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); -2938:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set State at HAL_I2C_STATE_ABORT */ -2940:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_ABORT; -2941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 53 - - -2942:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */ -2943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfe -2944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP); -2945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2946:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -2947:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -2948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process -2950:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current -2951:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** process unlock */ -2952:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); -2953:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2954:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -2955:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -2957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wrong usage of abort function */ -2959:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* This function should be used only in case of abort monitored by master device */ -2960:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -2961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2963:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @} -2966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2967:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2968:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks -2969:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ -2970:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2971:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2973:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief This function handles I2C event interrupt request. -2974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2976:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -2977:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2978:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) -2979:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2980:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ -2981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); -2982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); -2983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C events treatment -------------------------------------*/ -2985:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferISR != NULL) -2986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -2987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR(hi2c, itflags, itsources); -2988:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2989:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -2990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -2991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -2992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief This function handles I2C error interrupt request. -2993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -2994:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -2995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -2996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -2997:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) -2998:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 54 - - -2999:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); -3000:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); -3001:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C Bus error interrupt occurred ------------------------------------*/ -3003:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET)) -3004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; -3006:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3007:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear BERR flag */ -3008:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); -3009:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3011:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ -3012:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERRI) != RESET)) -3013:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; -3015:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear OVR flag */ -3017:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); -3018:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3019:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ -3021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERRI) != RESET)) -3022:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; -3024:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3025:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ARLO flag */ -3026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); -3027:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3028:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the Error Callback in case of Error detected */ -3030:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->ErrorCode & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C -3031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); -3033:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3035:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3036:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Master Tx Transfer completed callback. -3038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3039:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3040:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3042:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) -3043:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3045:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_MasterTxCpltCallback could be implemented in the user file -3049:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3050:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3051:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3052:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Master Rx Transfer completed callback. -3054:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3055:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. - ARM GAS /tmp/ccpuPECZ.s page 55 - - -3056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3058:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) -3059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3060:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3061:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3063:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3064:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_MasterRxCpltCallback could be implemented in the user file -3065:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3066:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @brief Slave Tx Transfer completed callback. -3069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3073:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) -3074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3076:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3077:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3078:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file -3080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3081:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3082:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Slave Rx Transfer completed callback. -3085:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3087:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) -3090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3091:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3092:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3093:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file -3096:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3097:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3098:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Slave Address Match callback. -3101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFE -3104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param AddrMatchCode Address Match Code -3105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrM -3108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(TransferDirection); -3112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(AddrMatchCode); - ARM GAS /tmp/ccpuPECZ.s page 56 - - -3113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_AddrCallback() could be implemented in the user file -3116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Listen Complete callback. -3121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) -3126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_ListenCpltCallback() could be implemented in the user file -3132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Memory Tx Transfer completed callback. -3137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) -3142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_MemTxCpltCallback could be implemented in the user file -3148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Memory Rx Transfer completed callback. -3153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) -3158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_MemRxCpltCallback could be implemented in the user file -3164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C error callback. -3169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - ARM GAS /tmp/ccpuPECZ.s page 57 - - -3170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) -3174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_ErrorCallback could be implemented in the user file -3180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C abort callback. -3185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) -3190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hi2c); -3193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, -3195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** the HAL_I2C_AbortCpltCallback could be implemented in the user file -3196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @} -3201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions -3204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Peripheral State, Mode and Error functions -3205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * -3206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** @verbatim -3207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** =============================================================================== -3208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ##### Peripheral State, Mode and Error functions ##### -3209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** =============================================================================== -3210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** [..] -3211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** This subsection permit to get in run-time the status of the peripheral -3212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** and the data flow. -3213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** @endverbatim -3215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ -3216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Return the I2C handle state. -3220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL state -3223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) -3225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Return I2C handle state */ - ARM GAS /tmp/ccpuPECZ.s page 58 - - -3227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return hi2c->State; -3228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Returns the I2C Master, Slave, Memory or no mode. -3232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for I2C module -3234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL mode -3235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c) -3237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return hi2c->Mode; -3239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Return the I2C error code. -3243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval I2C Error Code -3246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) -3248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return hi2c->ErrorCode; -3250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @} -3254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @} -3258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** @addtogroup I2C_Private_Functions -3261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @{ -3262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt. -3266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. -3269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. -3270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -3271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint -3273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint16_t devaddress = 0U; -3275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ -3277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -3278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) -3280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -3282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -3283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 59 - - -3284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set corresponding Error Code */ -3285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ -3286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ -3287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; -3288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Flush TX register */ -3290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); -3291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET)) -3293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Read data from RXDR */ -3295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; -3296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; -3297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -3298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET)) -3300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Write data to TXDR */ -3302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); -3303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; -3304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -3305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET)) -3307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferSize == 0U) && (hi2c->XferCount != 0U)) -3309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); -3311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -3313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -3315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); -3316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -3320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) -3321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, hi2c->XferOptions, I2C_NO_STARTSTOP) -3323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); -3327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ -3333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) -3334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ -3336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITMasterSequentialCplt(hi2c); -3337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ - ARM GAS /tmp/ccpuPECZ.s page 60 - - -3341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -3342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); -3343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_TC) != RESET) && ((ITSources & I2C_IT_TCI) != RESET)) -3347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) -3349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) -3351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ -3353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) -3354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Generate Stop */ -3356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; -3357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ -3361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITMasterSequentialCplt(hi2c); -3362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ -3368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -3369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); -3370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) -3374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Master complete process */ -3376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); -3377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -3383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt. -3387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. -3390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. -3391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -3392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint3 -3394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process locked */ -3396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -3397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 61 - - -3398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) -3399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check that I2C transfer finished */ -3401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ -3402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Mean XferCount == 0*/ -3403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* So clear Flag NACKF only */ -3404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) -3405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((hi2c->XferOptions == I2C_FIRST_AND_LAST_FRAME) || (hi2c->XferOptions == I2C_LAST_FRAME) -3407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->State == HAL_I2C_STATE_LISTEN)) -3408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Listen complete process */ -3410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, ITFlags); -3411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if ((hi2c->XferOptions != I2C_NO_OPTION_FRAME) && (hi2c->State == HAL_I2C_STATE_BUSY_TX_ -3413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -3415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -3416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Flush TX register */ -3418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); -3419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Last Byte is Transmitted */ -3421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ -3422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITSlaveSequentialCplt(hi2c); -3423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -3427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -3428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ -3433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -3434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -3435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ -3437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; -3438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_RXNE) != RESET) && ((ITSources & I2C_IT_RXI) != RESET)) -3441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > 0U) -3443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Read data from RXDR */ -3445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; -3446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; -3447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -3448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferCount == 0U) && \ -3451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferOptions != I2C_NO_OPTION_FRAME)) -3452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ -3454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITSlaveSequentialCplt(hi2c); - ARM GAS /tmp/ccpuPECZ.s page 62 - - -3455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET)) -3458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, ITFlags); -3460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_TXIS) != RESET) && ((ITSources & I2C_IT_TXI) != RESET)) -3462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Write data to TXDR only if XferCount not reach "0" */ -3464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* A TXIS flag can be set, during STOP treatment */ -3465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check if all Datas have already been sent */ -3466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ -3467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > 0U) -3468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Write data to TXDR */ -3470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = (*hi2c->pBuffPtr++); -3471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -3472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; -3473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferOptions == I2C_NEXT_FRAME) || (hi2c->XferOptions == I2C_FIRST_FRAME)) -3477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Last Byte is Transmitted */ -3479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ -3480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITSlaveSequentialCplt(hi2c); -3481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check if STOPF is set */ -3486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) -3487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Slave complete process */ -3489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, ITFlags); -3490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -3496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA. -3500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. -3503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. -3504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -3505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uin -3507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint16_t devaddress = 0U; -3509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; -3510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Locked */ - ARM GAS /tmp/ccpuPECZ.s page 63 - - -3512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -3513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) -3515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -3517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -3518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set corresponding Error Code */ -3520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; -3521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ -3523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ -3524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ -3525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); -3526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Flush TX register */ -3528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); -3529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_TCR) != RESET) && ((ITSources & I2C_IT_TCI) != RESET)) -3531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable TC interrupt */ -3533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); -3534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) -3536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Recover Slave address */ -3538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD); -3539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ -3541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -3542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -3544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; -3545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -3549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; -3550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the new XferSize in Nbytes register */ -3553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); -3554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Update XferCount value */ -3556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; -3557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable DMA Request */ -3559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) -3560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; -3562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; -3566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else - ARM GAS /tmp/ccpuPECZ.s page 64 - - -3569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ -3571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -3572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); -3573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) -3576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Master complete process */ -3578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); -3579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -3585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA. -3589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. -3592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. -3593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -3594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint -3596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process locked */ -3598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_LOCK(hi2c); -3599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((ITFlags & I2C_FLAG_AF) != RESET) && ((ITSources & I2C_IT_NACKI) != RESET)) -3601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check that I2C transfer finished */ -3603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ -3604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Mean XferCount == 0 */ -3605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* So clear Flag NACKF only */ -3606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_GET_DMA_REMAIN_DATA(hi2c) == 0U) -3607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -3609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -3610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ -3614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -3615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -3616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ -3618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; -3619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET)) -3622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ADDR flag */ -3624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); -3625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - ARM GAS /tmp/ccpuPECZ.s page 65 - - -3626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET)) -3627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Slave complete process */ -3629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, ITFlags); -3630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -3636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for write reques -3640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -3643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -3644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddress Internal memory address -3645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address -3646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -3647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Tickstart Tick start value -3648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -3649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint1 -3651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); -3653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ -3655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) -3656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -3658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -3660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -3664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ -3668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) -3669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Memory Address */ -3671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); -3672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ -3674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send MSB of Memory Address */ -3677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); -3678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ -3680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) -3681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - ARM GAS /tmp/ccpuPECZ.s page 66 - - -3683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -3685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -3689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send LSB of Memory Address */ -3693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); -3694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TCR flag is set */ -3697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) -3698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -3700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -3703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for read request -3707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -3708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -3709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value -3710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * in datasheet must be shift at right before call interface -3711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddress Internal memory address -3712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address -3713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -3714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Tickstart Tick start value -3715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -3716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16 -3718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); -3720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ -3722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) -3723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("I2C_RequestMemoryRead error %d\r\n", hi2c->ErrorCode); -3725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -3726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -3728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -3732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ -3736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) -3737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send Memory Address */ -3739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - ARM GAS /tmp/ccpuPECZ.s page 67 - - -3740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ -3742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send MSB of Memory Address */ -3745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); -3746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ -3748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) -3749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("I2C_RequestMemoryRead error2 %d\r\n", hi2c->ErrorCode); -3751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) -3752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -3754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -3758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Send LSB of Memory Address */ -3762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); -3763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until TC flag is set */ -3766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) -3767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("I2C_RequestMemoryRead TIMEOUT\r\n"); -3769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -3770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -3773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C Address complete process callback. -3777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c I2C handle. -3778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. -3779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -3782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint8_t transferdirection = 0U; -3784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint16_t slaveaddrcode = 0U; -3785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint16_t ownadd1code = 0U; -3786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint16_t ownadd2code = 0U; -3787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -3789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(ITFlags); -3790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* In case of Listen state, need to inform upper layer of address match code event */ -3792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->State & HAL_I2C_STATE_LISTEN) == HAL_I2C_STATE_LISTEN) -3793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** transferdirection = I2C_GET_DIR(hi2c); -3795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); -3796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); - ARM GAS /tmp/ccpuPECZ.s page 68 - - -3797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); -3798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If 10bits addressing mode is selected */ -3800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) -3801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK)) -3803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** slaveaddrcode = ownadd1code; -3805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->AddrEventCount++; -3806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) -3807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Reset Address Event counter */ -3809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->AddrEventCount = 0U; -3810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ADDR flag */ -3812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); -3813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call Slave Addr callback */ -3818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); -3819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** slaveaddrcode = ownadd2code; -3824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable ADDR Interrupts */ -3826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); -3827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call Slave Addr callback */ -3832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); -3833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* else 7 bits addressing mode is selected */ -3836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable ADDR Interrupts */ -3839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); -3840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3841:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call Slave Addr callback */ -3845:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); -3846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Else clear address flag only */ -3849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3851:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ADDR flag */ -3852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); -3853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 69 - - -3854:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3857:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3860:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C Master sequential complete process. -3861:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c I2C handle. -3862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3863:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITMasterSequentialCplt(I2C_HandleTypeDef *hi2c) -3865:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3866:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Reset I2C handle mode */ -3867:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -3868:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3869:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No Generate Stop, to permit restart mode */ -3870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */ -3871:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) -3872:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3873:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -3874:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; -3875:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -3876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3877:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Interrupts */ -3878:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); -3879:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3880:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3882:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3883:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -3884:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); -3885:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ -3887:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -3888:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -3890:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; -3891:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -3892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Interrupts */ -3894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); -3895:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3898:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3899:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -3900:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); -3901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3902:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3903:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3905:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C Slave sequential complete process. -3906:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c I2C handle. -3907:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3909:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITSlaveSequentialCplt(I2C_HandleTypeDef *hi2c) -3910:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 70 - - -3911:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Reset I2C handle mode */ -3912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -3913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3914:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) -3915:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3916:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ -3917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; -3918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; -3919:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3920:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Interrupts */ -3921:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); -3922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3923:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the Tx complete callback to inform upper layer of the end of transmit process */ -3927:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); -3928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3929:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) -3931:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3932:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */ -3933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; -3934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; -3935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3936:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Interrupts */ -3937:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); -3938:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3939:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3940:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3942:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the Rx complete callback to inform upper layer of the end of receive process */ -3943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); -3944:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3946:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3947:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -3948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C Master complete process. -3949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c I2C handle. -3950:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. -3951:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -3952:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -3953:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -3954:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3955:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ -3956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -3957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ -3959:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); -3960:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Reset handle parameters */ -3962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; -3963:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -3964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -3965:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((ITFlags & I2C_FLAG_AF) != RESET) -3967:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 71 - - -3968:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -3969:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -3970:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3971:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set acknowledge error code */ -3972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; -3973:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Flush TX register */ -3976:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); -3977:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3978:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Interrupts */ -3979:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_RX_IT); -3980:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3981:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -3982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->ErrorCode != HAL_I2C_ERROR_NONE) || (hi2c->State == HAL_I2C_STATE_ABORT)) -3983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3984:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -3985:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); -3986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -3987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_TX */ -3988:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) -3989:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -3991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) -3993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -3994:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -3995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -3997:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -3998:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -3999:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -4000:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_MemTxCpltCallback(hi2c); -4001:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4003:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4006:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4007:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4008:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4009:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -4010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); -4011:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4012:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4013:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ -4014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) -4015:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4017:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4018:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) -4019:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4022:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4024:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 72 - - -4025:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_MemRxCpltCallback(hi2c); -4026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4027:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4028:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4030:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4033:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4034:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); -4035:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4036:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4039:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4040:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C Slave complete process. -4041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c I2C handle. -4042:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. -4043:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4045:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -4046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ -4048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -4049:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4050:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear ADDR flag */ -4051:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); -4052:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable all interrupts */ -4054:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); -4055:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4056:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Address Acknowledge */ -4057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; -4058:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ -4060:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); -4061:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Flush TX register */ -4063:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); -4064:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4065:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ -4066:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) || -4067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)) -4068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = I2C_GET_DMA_REMAIN_DATA(hi2c); -4070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* All data are not transferred, so set error code accordingly */ -4073:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) -4074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ -4076:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; -4077:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4078:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Store Last receive data if any */ -4080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((ITFlags & I2C_FLAG_RXNE) != RESET)) -4081:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 73 - - -4082:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Read data from RXDR */ -4083:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; -4084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4085:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) -4086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4087:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; -4088:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -4089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ -4091:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; -4092:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4093:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; -4096:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4097:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -4098:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) -4100:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -4102:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); -4103:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ -4105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) -4106:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4107:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call I2C Listen complete process */ -4108:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, ITFlags); -4109:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4111:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) -4112:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -4114:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4118:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ -4120:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); -4121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4122:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -4123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) -4124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4125:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4126:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4128:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4130:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the Slave Rx Complete callback */ -4131:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); -4132:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4134:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4137:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4138:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); - ARM GAS /tmp/ccpuPECZ.s page 74 - - -4139:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4140:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the Slave Tx Complete callback */ -4141:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); -4142:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4144:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4146:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C Listen complete process. -4147:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c I2C handle. -4148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. -4149:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) -4152:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Reset handle parameters */ -4154:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -4155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; -4156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4157:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4158:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -4159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4160:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Store Last receive data if any */ -4161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (((ITFlags & I2C_FLAG_RXNE) != RESET)) -4162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Read data from RXDR */ -4164:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (*hi2c->pBuffPtr++) = hi2c->Instance->RXDR; -4165:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) -4167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; -4169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; -4170:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ -4172:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; -4173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4175:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4176:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable all Interrupts*/ -4177:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); -4178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACK Flag */ -4180:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -4181:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4182:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ -4186:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); -4187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4189:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4190:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C interrupts error process. -4191:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c I2C handle. -4192:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param ErrorCode Error code to handle. -4193:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4194:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4195:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) - ARM GAS /tmp/ccpuPECZ.s page 75 - - -4196:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4197:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Reset handle parameters */ -4198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4199:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; -4200:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = 0U; -4201:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set new error code */ -4203:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= ErrorCode; -4204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4205:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Interrupts */ -4206:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) || -4207:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) || -4208:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)) -4209:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4210:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable all interrupts, except interrupts related to LISTEN state */ -4211:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); -4212:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4213:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* keep HAL_I2C_STATE_LISTEN if set */ -4214:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; -4215:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; -4216:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; -4217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4218:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4219:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable all interrupts */ -4221:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); -4222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4223:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If state is an abort treatment on goind, don't change state */ -4224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* This change will be do later */ -4225:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State != HAL_I2C_STATE_ABORT) -4226:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4227:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set HAL_I2C_STATE_READY */ -4228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4229:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; -4231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; -4232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4233:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4234:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Abort DMA TX transfer if any */ -4235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) -4236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; -4238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4239:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : -4240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ -4241:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; -4242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4244:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4245:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4246:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Abort DMA TX */ -4247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) -4248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4249:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ -4250:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); -4251:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4252:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - ARM GAS /tmp/ccpuPECZ.s page 76 - - -4253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Abort DMA RX transfer if any */ -4254:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) -4255:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; -4257:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4258:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : -4259:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ -4260:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; -4261:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4262:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4263:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4264:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4265:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Abort DMA RX */ -4266:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) -4267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4268:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ -4269:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); -4270:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4272:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_ABORT) -4273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4274:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4275:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4276:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4277:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4278:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4279:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -4280:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_AbortCpltCallback(hi2c); -4281:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4282:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4283:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4286:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4287:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -4288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_ErrorCallback(hi2c); -4289:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4293:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief I2C Tx data register flush process. -4294:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c I2C handle. -4295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4296:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4297:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) -4298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If a pending TXIS flag is set */ -4300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Write a dummy data in TXDR to clear it */ -4301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) -4302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->TXDR = 0x00U; -4304:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4306:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Flush TX register if not empty */ -4307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) -4308:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); - ARM GAS /tmp/ccpuPECZ.s page 77 - - -4310:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4311:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4312:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4313:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4314:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief DMA I2C master transmit process complete callback. -4315:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hdma DMA handle -4316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4317:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4318:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) -4319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; -4321:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable DMA Request */ -4323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; -4324:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4325:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ -4326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) -4327:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4328:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable STOP interrupt */ -4329:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); -4330:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4331:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ -4332:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Update Buffer pointer */ -4335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; -4336:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the XferSize to transfer */ -4338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -4339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -4341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4342:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4343:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -4345:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4346:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the DMA channel */ -4348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c- -4349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable TC interrupts */ -4351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); -4352:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4355:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4356:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief DMA I2C slave transmit process complete callback. -4357:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hdma DMA handle -4358:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4359:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4360:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) -4361:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 25 .loc 1 4361 0 - 26 .cfi_startproc - 27 @ args = 0, pretend = 0, frame = 0 - 28 @ frame_needed = 0, uses_anonymous_args = 0 - 29 @ link register save eliminated. - ARM GAS /tmp/ccpuPECZ.s page 78 - - - 30 .LVL0: -4362:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -4363:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hdma); -4364:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ -4366:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ -4367:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ -4368:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 31 .loc 1 4368 0 - 32 @ sp needed - 33 0000 7047 bx lr - 34 .cfi_endproc - 35 .LFE99: - 37 .section .text.I2C_DMASlaveReceiveCplt,"ax",%progbits - 38 .align 1 - 39 .syntax unified - 40 .code 16 - 41 .thumb_func - 42 .fpu softvfp - 44 I2C_DMASlaveReceiveCplt: - 45 .LFB101: -4369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4370:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief DMA I2C master receive process complete callback. -4372:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hdma DMA handle -4373:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4374:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4375:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) -4376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; -4378:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4379:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable DMA Request */ -4380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; -4381:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4382:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ -4383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) -4384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4385:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable STOP interrupt */ -4386:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); -4387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4388:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ -4389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4390:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Update Buffer pointer */ -4392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; -4393:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4394:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Set the XferSize to transfer */ -4395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) -4396:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; -4398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4400:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; -4402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable the DMA channel */ - ARM GAS /tmp/ccpuPECZ.s page 79 - - -4405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c- -4406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable TC interrupts */ -4408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); -4409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4411:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4412:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4413:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief DMA I2C slave receive process complete callback. -4414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hdma DMA handle -4415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4416:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4417:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) -4418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 46 .loc 1 4418 0 - 47 .cfi_startproc - 48 @ args = 0, pretend = 0, frame = 0 - 49 @ frame_needed = 0, uses_anonymous_args = 0 - 50 @ link register save eliminated. - 51 .LVL1: -4419:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ -4420:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** UNUSED(hdma); -4421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4422:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ -4423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ -4424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ -4425:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 52 .loc 1 4425 0 - 53 @ sp needed - 54 0000 7047 bx lr - 55 .cfi_endproc - 56 .LFE101: - 58 .section .text.I2C_Disable_IRQ,"ax",%progbits - 59 .align 1 - 60 .syntax unified - 61 .code 16 - 62 .thumb_func - 63 .fpu softvfp - 65 I2C_Disable_IRQ: - 66 .LFB111: -4426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief DMA I2C communication error callback. -4429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hdma DMA handle -4430:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma) -4433:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4434:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; -4435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4436:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Acknowledge */ -4437:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; -4438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -4440:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); -4441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4442:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 80 - - -4443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4444:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief DMA I2C communication abort callback -4445:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * (To be called at end of DMA Abort procedure). -4446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hdma DMA handle. -4447:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4449:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) -4450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4451:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; -4452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4453:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable Acknowledge */ -4454:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; -4455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4456:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Reset AbortCpltCallback */ -4457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; -4458:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; -4459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4460:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check if come from abort from user */ -4461:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) -4462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4463:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4464:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4465:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -4466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_AbortCpltCallback(hi2c); -4467:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4468:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4470:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ -4471:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** HAL_I2C_ErrorCallback(hi2c); -4472:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4474:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4475:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout. -4477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -4478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -4479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Flag Specifies the I2C flag to check. -4480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Status The new Flag status (SET or RESET). -4481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -4482:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Tickstart Tick start value -4483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -4484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4485:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta -4486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) -4488:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4489:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check for the Timeout */ -4490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) -4491:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) -4493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4496:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - ARM GAS /tmp/ccpuPECZ.s page 81 - - -4500:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4501:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4502:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -4504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. -4508:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -4509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -4510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -4511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Tickstart Tick start value -4512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -4513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, -4515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) -4517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check if a NACK is detected */ -4519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) -4520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("I2C_WaitOnTXISFlagUntilTimeout ->I2C_IsAcknowledgeFailed error\r\n"); -4522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -4523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4524:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4525:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check for the Timeout */ -4526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) -4527:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) -4529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; -4531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4533:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4534:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** PRINTF("I2C_WaitOnTXISFlagUntilTimeout timeout\r\n"); -4538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -4539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4540:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4541:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -4543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4544:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. -4547:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -4548:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -4549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -4550:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Tickstart Tick start value -4551:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -4552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4553:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, -4554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) -4556:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 82 - - -4557:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check if a NACK is detected */ -4558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) -4559:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -4561:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4562:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check for the Timeout */ -4564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) -4565:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; -4567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4569:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4572:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -4574:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4575:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -4577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4578:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4579:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. -4581:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -4582:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -4583:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -4584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Tickstart Tick start value -4585:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -4586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4587:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, -4588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) -4590:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4591:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check if a NACK is detected */ -4592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) -4593:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -4595:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4596:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check if a STOPF is detected */ -4598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) -4599:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ -4601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -4602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4603:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ -4604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); -4605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; -4607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4610:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - ARM GAS /tmp/ccpuPECZ.s page 83 - - -4614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check for the Timeout */ -4617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) -4618:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; -4620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4621:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4624:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -4626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4627:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -4629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4630:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4631:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief This function handles Acknowledge failed detection during an I2C Communication. -4633:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -4634:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -4635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Timeout Timeout duration -4636:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Tickstart Tick start value -4637:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -4638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4639:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_ -4640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) -4642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4643:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Wait until STOP Flag is reset */ -4644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* AutoEnd should be initiate after AF */ -4645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) -4646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check for the Timeout */ -4648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) -4649:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout)) -4651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4654:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; -4658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4660:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4661:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4662:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear NACKF Flag */ -4663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); -4664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4665:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear STOP Flag */ -4666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); -4667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Flush TX register */ -4669:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); -4670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 84 - - -4671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ -4672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); -4673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_AF; -4675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; -4676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; -4677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Process Unlocked */ -4679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); -4680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; -4682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -4684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4687:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag ar -4688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c I2C handle. -4689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param DevAddress Specifies the slave address to be programmed. -4690:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Size Specifies the number of bytes to be programmed. -4691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * This parameter must be a value between 0 and 255. -4692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Mode New state of the I2C START condition generation. -4693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * This parameter can be one of the following values: -4694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @arg @ref I2C_RELOAD_MODE Enable Reload mode . -4695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode. -4696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @arg @ref I2C_SOFTEND_MODE Enable Software end mode. -4697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param Request New state of the I2C START condition generation. -4698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * This parameter can be one of the following values: -4699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition. -4700:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0). -4701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request. -4702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. -4703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval None -4704:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4705:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_ -4706:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4707:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the parameters */ -4708:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); -4709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_TRANSFER_MODE(Mode)); -4710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** assert_param(IS_TRANSFER_REQUEST(Request)); -4711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* update CR2 register */ -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** MODIFY_REG(hi2c->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEN -4714:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ -4715:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Manage the enabling of Interrupts. -4719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -4720:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -4721:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. -4722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -4723:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) -4725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4726:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tmpisr = 0U; -4727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 85 - - -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->XferISR == I2C_Master_ISR_DMA) || \ -4729:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) -4730:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) -4732:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ -4734:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; -4735:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT) -4738:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ -4740:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; -4741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4742:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) -4744:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable STOP interrupts */ -4746:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; -4747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4749:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT) -4750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable TC interrupts */ -4752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; -4753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4755:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** else -4756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) -4758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, and ADDR interrupts */ -4760:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; -4761:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) -4764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4765:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ -4766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; -4767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) -4770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ -4772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; -4773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) -4776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4777:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable STOP interrupts */ -4778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; -4779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4781:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable interrupts only at the end */ -4783:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* to avoid the risk of I2C interrupt handle execution before */ -4784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* all interrupts requested done */ - ARM GAS /tmp/ccpuPECZ.s page 86 - - -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_ENABLE_IT(hi2c, tmpisr); -4786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -4788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4789:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4790:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** -4791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @brief Manage the disabling of Interrupts. -4792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains -4793:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * the configuration information for the specified I2C. -4794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. -4795:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** * @retval HAL status -4796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** */ -4797:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) -4798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 67 .loc 1 4798 0 - 68 .cfi_startproc - 69 @ args = 0, pretend = 0, frame = 0 - 70 @ frame_needed = 0, uses_anonymous_args = 0 - 71 .LVL2: - 72 0000 30B5 push {r4, r5, lr} - 73 .LCFI0: - 74 .cfi_def_cfa_offset 12 - 75 .cfi_offset 4, -12 - 76 .cfi_offset 5, -8 - 77 .cfi_offset 14, -4 - 78 .LVL3: -4799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tmpisr = 0U; -4800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4801:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) - 79 .loc 1 4801 0 - 80 0002 CB07 lsls r3, r1, #31 - 81 0004 09D5 bpl .L10 - 82 .LVL4: -4802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4803:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable TC and TXI interrupts */ -4804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_TXI; -4805:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN) - 83 .loc 1 4806 0 - 84 0006 4123 movs r3, #65 - 85 0008 C35C ldrb r3, [r0, r3] - 86 000a 2822 movs r2, #40 - 87 000c 1340 ands r3, r2 - 88 000e 282B cmp r3, #40 - 89 0010 01D0 beq .L13 -4807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ -4809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 90 .loc 1 4809 0 - 91 0012 F223 movs r3, #242 - 92 0014 02E0 b .L4 - 93 .L13: -4804:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 94 .loc 1 4804 0 - 95 0016 1A33 adds r3, r3, #26 - 96 0018 00E0 b .L4 - 97 .LVL5: - ARM GAS /tmp/ccpuPECZ.s page 87 - - - 98 .L10: -4799:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 99 .loc 1 4799 0 - 100 001a 0023 movs r3, #0 - 101 .LVL6: - 102 .L4: -4810:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) - 103 .loc 1 4813 0 - 104 001c 8A07 lsls r2, r1, #30 - 105 001e 09D5 bpl .L5 -4814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable TC and RXI interrupts */ -4816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_RXI; - 106 .loc 1 4816 0 - 107 0020 4424 movs r4, #68 - 108 0022 1C43 orrs r4, r3 - 109 .LVL7: -4817:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((hi2c->State & HAL_I2C_STATE_LISTEN) != HAL_I2C_STATE_LISTEN) - 110 .loc 1 4818 0 - 111 0024 4122 movs r2, #65 - 112 0026 825C ldrb r2, [r0, r2] - 113 0028 2825 movs r5, #40 - 114 002a 2A40 ands r2, r5 - 115 002c 282A cmp r2, #40 - 116 002e 15D0 beq .L12 -4819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ -4821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 117 .loc 1 4821 0 - 118 0030 F422 movs r2, #244 - 119 0032 1343 orrs r3, r2 - 120 .LVL8: - 121 .L5: -4822:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4824:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) - 122 .loc 1 4825 0 - 123 0034 4A07 lsls r2, r1, #29 - 124 0036 01D5 bpl .L6 -4826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable ADDR, NACK and STOP interrupts */ -4828:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; - 125 .loc 1 4828 0 - 126 0038 B822 movs r2, #184 - 127 003a 1343 orrs r3, r2 - 128 .LVL9: - 129 .L6: -4829:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT) - 130 .loc 1 4831 0 - 131 003c 1122 movs r2, #17 - ARM GAS /tmp/ccpuPECZ.s page 88 - - - 132 003e 0A40 ands r2, r1 - 133 0040 112A cmp r2, #17 - 134 0042 0DD0 beq .L14 - 135 .L7: - 136 0044 1222 movs r2, #18 - 137 0046 1140 ands r1, r2 - 138 .LVL10: -4832:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4833:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ -4834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; -4835:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4837:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) - 139 .loc 1 4837 0 - 140 0048 1229 cmp r1, #18 - 141 004a 0CD0 beq .L15 - 142 .L8: -4838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4839:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable STOP interrupts */ -4840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; -4841:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4843:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT) - 143 .loc 1 4843 0 - 144 004c 1229 cmp r1, #18 - 145 004e 0DD0 beq .L16 - 146 .L9: -4844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { -4845:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Enable TC interrupts */ -4846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; -4847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } -4848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4849:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Disable interrupts only at the end */ -4850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* to avoid a breaking situation like at "t" time */ -4851:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* all disable interrupts request are not done */ -4852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, tmpisr); - 147 .loc 1 4852 0 - 148 0050 0168 ldr r1, [r0] - 149 0052 0A68 ldr r2, [r1] - 150 0054 9A43 bics r2, r3 - 151 0056 0A60 str r2, [r1] -4853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** -4854:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_OK; -4855:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 152 .loc 1 4855 0 - 153 0058 0020 movs r0, #0 - 154 .LVL11: - 155 @ sp needed - 156 005a 30BD pop {r4, r5, pc} - 157 .LVL12: - 158 .L12: -4816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 159 .loc 1 4816 0 - 160 005c 2300 movs r3, r4 - 161 005e E9E7 b .L5 - 162 .LVL13: - 163 .L14: - ARM GAS /tmp/ccpuPECZ.s page 89 - - -4834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 164 .loc 1 4834 0 - 165 0060 7F32 adds r2, r2, #127 - 166 0062 1343 orrs r3, r2 - 167 .LVL14: - 168 0064 EEE7 b .L7 - 169 .LVL15: - 170 .L15: -4840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 171 .loc 1 4840 0 - 172 0066 0E32 adds r2, r2, #14 - 173 0068 1343 orrs r3, r2 - 174 .LVL16: - 175 006a EFE7 b .L8 - 176 .L16: -4846:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 177 .loc 1 4846 0 - 178 006c 4022 movs r2, #64 - 179 006e 1343 orrs r3, r2 - 180 .LVL17: - 181 0070 EEE7 b .L9 - 182 .cfi_endproc - 183 .LFE111: - 185 .section .text.I2C_IsAcknowledgeFailed,"ax",%progbits - 186 .align 1 - 187 .syntax unified - 188 .code 16 - 189 .thumb_func - 190 .fpu softvfp - 192 I2C_IsAcknowledgeFailed: - 193 .LFB108: -4640:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 194 .loc 1 4640 0 - 195 .cfi_startproc - 196 @ args = 0, pretend = 0, frame = 0 - 197 @ frame_needed = 0, uses_anonymous_args = 0 - 198 .LVL18: - 199 0000 70B5 push {r4, r5, r6, lr} - 200 .LCFI1: - 201 .cfi_def_cfa_offset 16 - 202 .cfi_offset 4, -16 - 203 .cfi_offset 5, -12 - 204 .cfi_offset 6, -8 - 205 .cfi_offset 14, -4 - 206 0002 0400 movs r4, r0 - 207 0004 0E00 movs r6, r1 - 208 0006 1500 movs r5, r2 -4641:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 209 .loc 1 4641 0 - 210 0008 0368 ldr r3, [r0] - 211 000a 9B69 ldr r3, [r3, #24] - 212 000c DB06 lsls r3, r3, #27 - 213 000e 16D5 bpl .L25 - 214 .LVL19: - 215 .L20: -4645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 216 .loc 1 4645 0 - ARM GAS /tmp/ccpuPECZ.s page 90 - - - 217 0010 2368 ldr r3, [r4] - 218 0012 9A69 ldr r2, [r3, #24] - 219 0014 9206 lsls r2, r2, #26 - 220 0016 14D4 bmi .L26 -4648:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 221 .loc 1 4648 0 - 222 0018 731C adds r3, r6, #1 - 223 001a F9D0 beq .L20 -4650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 224 .loc 1 4650 0 - 225 001c 002E cmp r6, #0 - 226 001e 04D0 beq .L21 -4650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 227 .loc 1 4650 0 is_stmt 0 discriminator 1 - 228 0020 FFF7FEFF bl HAL_GetTick - 229 .LVL20: - 230 0024 401B subs r0, r0, r5 - 231 0026 B042 cmp r0, r6 - 232 0028 F2D9 bls .L20 - 233 .L21: -4652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 234 .loc 1 4652 0 is_stmt 1 - 235 002a 4123 movs r3, #65 - 236 002c 2022 movs r2, #32 - 237 002e E254 strb r2, [r4, r3] -4653:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 238 .loc 1 4653 0 - 239 0030 0023 movs r3, #0 - 240 0032 2232 adds r2, r2, #34 - 241 0034 A354 strb r3, [r4, r2] -4656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 242 .loc 1 4656 0 - 243 0036 023A subs r2, r2, #2 - 244 0038 A354 strb r3, [r4, r2] -4657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 245 .loc 1 4657 0 - 246 003a 0320 movs r0, #3 - 247 003c 24E0 b .L19 - 248 .LVL21: - 249 .L25: -4683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 250 .loc 1 4683 0 - 251 003e 0020 movs r0, #0 - 252 .LVL22: - 253 0040 22E0 b .L19 - 254 .LVL23: - 255 .L26: -4663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 256 .loc 1 4663 0 - 257 0042 1022 movs r2, #16 - 258 0044 DA61 str r2, [r3, #28] -4666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 259 .loc 1 4666 0 - 260 0046 2368 ldr r3, [r4] - 261 0048 1032 adds r2, r2, #16 - 262 004a DA61 str r2, [r3, #28] - 263 .LVL24: - ARM GAS /tmp/ccpuPECZ.s page 91 - - - 264 .LBB142: - 265 .LBB143: -4301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 266 .loc 1 4301 0 - 267 004c 2368 ldr r3, [r4] - 268 004e 9A69 ldr r2, [r3, #24] - 269 0050 9207 lsls r2, r2, #30 - 270 0052 01D5 bpl .L23 -4303:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 271 .loc 1 4303 0 - 272 0054 0022 movs r2, #0 - 273 0056 9A62 str r2, [r3, #40] - 274 .L23: -4307:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 275 .loc 1 4307 0 - 276 0058 2368 ldr r3, [r4] - 277 005a 9A69 ldr r2, [r3, #24] - 278 005c D207 lsls r2, r2, #31 - 279 005e 03D4 bmi .L24 -4309:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 280 .loc 1 4309 0 - 281 0060 9A69 ldr r2, [r3, #24] - 282 0062 0121 movs r1, #1 - 283 0064 0A43 orrs r2, r1 - 284 0066 9A61 str r2, [r3, #24] - 285 .L24: - 286 .LVL25: - 287 .LBE143: - 288 .LBE142: -4672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 289 .loc 1 4672 0 - 290 0068 2268 ldr r2, [r4] - 291 006a 5368 ldr r3, [r2, #4] - 292 006c 0749 ldr r1, .L27 - 293 006e 0B40 ands r3, r1 - 294 0070 5360 str r3, [r2, #4] -4674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 295 .loc 1 4674 0 - 296 0072 0423 movs r3, #4 - 297 0074 6364 str r3, [r4, #68] -4675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 298 .loc 1 4675 0 - 299 0076 3D33 adds r3, r3, #61 - 300 0078 2022 movs r2, #32 - 301 007a E254 strb r2, [r4, r3] -4676:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 302 .loc 1 4676 0 - 303 007c 0023 movs r3, #0 - 304 007e 2232 adds r2, r2, #34 - 305 0080 A354 strb r3, [r4, r2] -4679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 306 .loc 1 4679 0 - 307 0082 023A subs r2, r2, #2 - 308 0084 A354 strb r3, [r4, r2] -4681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 309 .loc 1 4681 0 - 310 0086 0120 movs r0, #1 - ARM GAS /tmp/ccpuPECZ.s page 92 - - - 311 .L19: -4684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 312 .loc 1 4684 0 - 313 @ sp needed - 314 .LVL26: - 315 .LVL27: - 316 .LVL28: - 317 0088 70BD pop {r4, r5, r6, pc} - 318 .L28: - 319 008a C046 .align 2 - 320 .L27: - 321 008c 00E800FE .word -33495040 - 322 .cfi_endproc - 323 .LFE108: - 325 .section .text.I2C_WaitOnFlagUntilTimeout,"ax",%progbits - 326 .align 1 - 327 .syntax unified - 328 .code 16 - 329 .thumb_func - 330 .fpu softvfp - 332 I2C_WaitOnFlagUntilTimeout: - 333 .LFB104: -4486:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 334 .loc 1 4486 0 - 335 .cfi_startproc - 336 @ args = 4, pretend = 0, frame = 0 - 337 @ frame_needed = 0, uses_anonymous_args = 0 - 338 .LVL29: - 339 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 340 .LCFI2: - 341 .cfi_def_cfa_offset 24 - 342 .cfi_offset 3, -24 - 343 .cfi_offset 4, -20 - 344 .cfi_offset 5, -16 - 345 .cfi_offset 6, -12 - 346 .cfi_offset 7, -8 - 347 .cfi_offset 14, -4 - 348 0002 0600 movs r6, r0 - 349 0004 0C00 movs r4, r1 - 350 0006 1700 movs r7, r2 - 351 0008 1D00 movs r5, r3 - 352 .LVL30: - 353 .L31: -4487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 354 .loc 1 4487 0 - 355 000a 3368 ldr r3, [r6] - 356 000c 9B69 ldr r3, [r3, #24] - 357 000e 2340 ands r3, r4 - 358 0010 1B1B subs r3, r3, r4 - 359 0012 5A42 rsbs r2, r3, #0 - 360 0014 5341 adcs r3, r3, r2 - 361 0016 BB42 cmp r3, r7 - 362 0018 13D1 bne .L35 -4490:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 363 .loc 1 4490 0 - 364 001a 6B1C adds r3, r5, #1 - 365 001c F5D0 beq .L31 - ARM GAS /tmp/ccpuPECZ.s page 93 - - -4492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 366 .loc 1 4492 0 - 367 001e 002D cmp r5, #0 - 368 0020 05D0 beq .L32 -4492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 369 .loc 1 4492 0 is_stmt 0 discriminator 1 - 370 0022 FFF7FEFF bl HAL_GetTick - 371 .LVL31: - 372 0026 069B ldr r3, [sp, #24] - 373 0028 C01A subs r0, r0, r3 - 374 002a A842 cmp r0, r5 - 375 002c EDD9 bls .L31 - 376 .L32: -4494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 377 .loc 1 4494 0 is_stmt 1 - 378 002e 4123 movs r3, #65 - 379 0030 2022 movs r2, #32 - 380 0032 F254 strb r2, [r6, r3] -4495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 381 .loc 1 4495 0 - 382 0034 0023 movs r3, #0 - 383 0036 2232 adds r2, r2, #34 - 384 0038 B354 strb r3, [r6, r2] -4498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 385 .loc 1 4498 0 - 386 003a 023A subs r2, r2, #2 - 387 003c B354 strb r3, [r6, r2] -4499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 388 .loc 1 4499 0 - 389 003e 0320 movs r0, #3 - 390 0040 00E0 b .L33 - 391 .L35: -4503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 392 .loc 1 4503 0 - 393 0042 0020 movs r0, #0 - 394 .L33: -4504:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 395 .loc 1 4504 0 - 396 @ sp needed - 397 .LVL32: - 398 .LVL33: - 399 .LVL34: - 400 0044 F8BD pop {r3, r4, r5, r6, r7, pc} - 401 .cfi_endproc - 402 .LFE104: - 404 .section .text.I2C_WaitOnSTOPFlagUntilTimeout,"ax",%progbits - 405 .align 1 - 406 .syntax unified - 407 .code 16 - 408 .thumb_func - 409 .fpu softvfp - 411 I2C_WaitOnSTOPFlagUntilTimeout: - 412 .LFB106: -4554:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) - 413 .loc 1 4554 0 - 414 .cfi_startproc - 415 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccpuPECZ.s page 94 - - - 416 @ frame_needed = 0, uses_anonymous_args = 0 - 417 .LVL35: - 418 0000 70B5 push {r4, r5, r6, lr} - 419 .LCFI3: - 420 .cfi_def_cfa_offset 16 - 421 .cfi_offset 4, -16 - 422 .cfi_offset 5, -12 - 423 .cfi_offset 6, -8 - 424 .cfi_offset 14, -4 - 425 0002 0500 movs r5, r0 - 426 0004 0C00 movs r4, r1 - 427 0006 1600 movs r6, r2 - 428 .LVL36: - 429 .L37: -4555:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 430 .loc 1 4555 0 - 431 0008 2B68 ldr r3, [r5] - 432 000a 9B69 ldr r3, [r3, #24] - 433 000c 9B06 lsls r3, r3, #26 - 434 000e 1AD4 bmi .L42 -4558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 435 .loc 1 4558 0 - 436 0010 3200 movs r2, r6 - 437 0012 2100 movs r1, r4 - 438 0014 2800 movs r0, r5 - 439 0016 FFF7FEFF bl I2C_IsAcknowledgeFailed - 440 .LVL37: - 441 001a 0028 cmp r0, #0 - 442 001c 15D1 bne .L41 -4564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 443 .loc 1 4564 0 - 444 001e 002C cmp r4, #0 - 445 0020 04D0 beq .L39 -4564:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 446 .loc 1 4564 0 is_stmt 0 discriminator 1 - 447 0022 FFF7FEFF bl HAL_GetTick - 448 .LVL38: - 449 0026 801B subs r0, r0, r6 - 450 0028 A042 cmp r0, r4 - 451 002a EDD9 bls .L37 - 452 .L39: -4566:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 453 .loc 1 4566 0 is_stmt 1 - 454 002c 6B6C ldr r3, [r5, #68] - 455 002e 2022 movs r2, #32 - 456 0030 1343 orrs r3, r2 - 457 0032 6B64 str r3, [r5, #68] -4567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 458 .loc 1 4567 0 - 459 0034 4123 movs r3, #65 - 460 0036 EA54 strb r2, [r5, r3] -4568:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 461 .loc 1 4568 0 - 462 0038 0023 movs r3, #0 - 463 003a 2232 adds r2, r2, #34 - 464 003c AB54 strb r3, [r5, r2] -4571:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 95 - - - 465 .loc 1 4571 0 - 466 003e 023A subs r2, r2, #2 - 467 0040 AB54 strb r3, [r5, r2] -4573:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 468 .loc 1 4573 0 - 469 0042 0320 movs r0, #3 - 470 .L38: -4577:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 471 .loc 1 4577 0 - 472 @ sp needed - 473 .LVL39: - 474 .LVL40: - 475 .LVL41: - 476 0044 70BD pop {r4, r5, r6, pc} - 477 .LVL42: - 478 .L42: -4576:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 479 .loc 1 4576 0 - 480 0046 0020 movs r0, #0 - 481 0048 FCE7 b .L38 - 482 .L41: -4560:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 483 .loc 1 4560 0 - 484 004a 0120 movs r0, #1 - 485 004c FAE7 b .L38 - 486 .cfi_endproc - 487 .LFE106: - 489 .section .text.I2C_WaitOnRXNEFlagUntilTimeout,"ax",%progbits - 490 .align 1 - 491 .syntax unified - 492 .code 16 - 493 .thumb_func - 494 .fpu softvfp - 496 I2C_WaitOnRXNEFlagUntilTimeout: - 497 .LFB107: -4588:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 498 .loc 1 4588 0 - 499 .cfi_startproc - 500 @ args = 0, pretend = 0, frame = 0 - 501 @ frame_needed = 0, uses_anonymous_args = 0 - 502 .LVL43: - 503 0000 70B5 push {r4, r5, r6, lr} - 504 .LCFI4: - 505 .cfi_def_cfa_offset 16 - 506 .cfi_offset 4, -16 - 507 .cfi_offset 5, -12 - 508 .cfi_offset 6, -8 - 509 .cfi_offset 14, -4 - 510 0002 0400 movs r4, r0 - 511 0004 0D00 movs r5, r1 - 512 0006 1600 movs r6, r2 - 513 .LVL44: - 514 .L44: -4589:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 515 .loc 1 4589 0 - 516 0008 2368 ldr r3, [r4] - 517 000a 9B69 ldr r3, [r3, #24] - ARM GAS /tmp/ccpuPECZ.s page 96 - - - 518 000c 5B07 lsls r3, r3, #29 - 519 000e 2DD4 bmi .L50 -4592:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 520 .loc 1 4592 0 - 521 0010 3200 movs r2, r6 - 522 0012 2900 movs r1, r5 - 523 0014 2000 movs r0, r4 - 524 0016 FFF7FEFF bl I2C_IsAcknowledgeFailed - 525 .LVL45: - 526 001a 0028 cmp r0, #0 - 527 001c 28D1 bne .L49 -4598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 528 .loc 1 4598 0 - 529 001e 2368 ldr r3, [r4] - 530 0020 9A69 ldr r2, [r3, #24] - 531 0022 9206 lsls r2, r2, #26 - 532 0024 11D4 bmi .L51 -4617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 533 .loc 1 4617 0 - 534 0026 002D cmp r5, #0 - 535 0028 04D0 beq .L47 -4617:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 536 .loc 1 4617 0 is_stmt 0 discriminator 1 - 537 002a FFF7FEFF bl HAL_GetTick - 538 .LVL46: - 539 002e 801B subs r0, r0, r6 - 540 0030 A842 cmp r0, r5 - 541 0032 E9D9 bls .L44 - 542 .L47: -4619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 543 .loc 1 4619 0 is_stmt 1 - 544 0034 636C ldr r3, [r4, #68] - 545 0036 2022 movs r2, #32 - 546 0038 1343 orrs r3, r2 - 547 003a 6364 str r3, [r4, #68] -4620:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 548 .loc 1 4620 0 - 549 003c 4123 movs r3, #65 - 550 003e E254 strb r2, [r4, r3] -4623:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 551 .loc 1 4623 0 - 552 0040 013B subs r3, r3, #1 - 553 0042 0022 movs r2, #0 - 554 0044 E254 strb r2, [r4, r3] -4625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 555 .loc 1 4625 0 - 556 0046 0320 movs r0, #3 - 557 .L45: -4629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 558 .loc 1 4629 0 - 559 @ sp needed - 560 .LVL47: - 561 .LVL48: - 562 .LVL49: - 563 0048 70BD pop {r4, r5, r6, pc} - 564 .LVL50: - 565 .L51: - ARM GAS /tmp/ccpuPECZ.s page 97 - - -4601:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 566 .loc 1 4601 0 - 567 004a 2022 movs r2, #32 - 568 004c DA61 str r2, [r3, #28] -4604:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 569 .loc 1 4604 0 - 570 004e 2168 ldr r1, [r4] - 571 0050 4B68 ldr r3, [r1, #4] - 572 0052 0848 ldr r0, .L52 - 573 0054 0340 ands r3, r0 - 574 0056 4B60 str r3, [r1, #4] -4606:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 575 .loc 1 4606 0 - 576 0058 0023 movs r3, #0 - 577 005a 6364 str r3, [r4, #68] -4607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 578 .loc 1 4607 0 - 579 005c 4121 movs r1, #65 - 580 005e 6254 strb r2, [r4, r1] -4608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 581 .loc 1 4608 0 - 582 0060 2232 adds r2, r2, #34 - 583 0062 A354 strb r3, [r4, r2] -4611:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 584 .loc 1 4611 0 - 585 0064 023A subs r2, r2, #2 - 586 0066 A354 strb r3, [r4, r2] -4613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 587 .loc 1 4613 0 - 588 0068 0120 movs r0, #1 - 589 006a EDE7 b .L45 - 590 .L50: -4628:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 591 .loc 1 4628 0 - 592 006c 0020 movs r0, #0 - 593 006e EBE7 b .L45 - 594 .L49: -4594:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 595 .loc 1 4594 0 - 596 0070 0120 movs r0, #1 - 597 0072 E9E7 b .L45 - 598 .L53: - 599 .align 2 - 600 .L52: - 601 0074 00E800FE .word -33495040 - 602 .cfi_endproc - 603 .LFE107: - 605 .section .text.I2C_WaitOnTXISFlagUntilTimeout,"ax",%progbits - 606 .align 1 - 607 .syntax unified - 608 .code 16 - 609 .thumb_func - 610 .fpu softvfp - 612 I2C_WaitOnTXISFlagUntilTimeout: - 613 .LFB105: -4515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) - 614 .loc 1 4515 0 - ARM GAS /tmp/ccpuPECZ.s page 98 - - - 615 .cfi_startproc - 616 @ args = 0, pretend = 0, frame = 0 - 617 @ frame_needed = 0, uses_anonymous_args = 0 - 618 .LVL51: - 619 0000 70B5 push {r4, r5, r6, lr} - 620 .LCFI5: - 621 .cfi_def_cfa_offset 16 - 622 .cfi_offset 4, -16 - 623 .cfi_offset 5, -12 - 624 .cfi_offset 6, -8 - 625 .cfi_offset 14, -4 - 626 0002 0400 movs r4, r0 - 627 0004 0D00 movs r5, r1 - 628 0006 1600 movs r6, r2 - 629 .LVL52: - 630 .L58: -4516:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 631 .loc 1 4516 0 - 632 0008 2368 ldr r3, [r4] - 633 000a 9B69 ldr r3, [r3, #24] - 634 000c 9B07 lsls r3, r3, #30 - 635 000e 24D4 bmi .L61 -4519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 636 .loc 1 4519 0 - 637 0010 3200 movs r2, r6 - 638 0012 2900 movs r1, r5 - 639 0014 2000 movs r0, r4 - 640 0016 FFF7FEFF bl I2C_IsAcknowledgeFailed - 641 .LVL53: - 642 001a 0028 cmp r0, #0 - 643 001c 18D1 bne .L62 -4526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 644 .loc 1 4526 0 - 645 001e 6B1C adds r3, r5, #1 - 646 0020 F2D0 beq .L58 -4528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 647 .loc 1 4528 0 - 648 0022 002D cmp r5, #0 - 649 0024 04D0 beq .L59 -4528:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 650 .loc 1 4528 0 is_stmt 0 discriminator 1 - 651 0026 FFF7FEFF bl HAL_GetTick - 652 .LVL54: - 653 002a 801B subs r0, r0, r6 - 654 002c A842 cmp r0, r5 - 655 002e EBD9 bls .L58 - 656 .L59: -4530:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 657 .loc 1 4530 0 is_stmt 1 - 658 0030 636C ldr r3, [r4, #68] - 659 0032 2022 movs r2, #32 - 660 0034 1343 orrs r3, r2 - 661 0036 6364 str r3, [r4, #68] -4531:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 662 .loc 1 4531 0 - 663 0038 4123 movs r3, #65 - 664 003a E254 strb r2, [r4, r3] - ARM GAS /tmp/ccpuPECZ.s page 99 - - -4532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 665 .loc 1 4532 0 - 666 003c 0023 movs r3, #0 - 667 003e 2232 adds r2, r2, #34 - 668 0040 A354 strb r3, [r4, r2] -4535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 669 .loc 1 4535 0 - 670 0042 023A subs r2, r2, #2 - 671 0044 A354 strb r3, [r4, r2] -4537:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 672 .loc 1 4537 0 - 673 0046 0648 ldr r0, .L63 - 674 0048 FFF7FEFF bl vcom_Send - 675 .LVL55: -4538:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 676 .loc 1 4538 0 - 677 004c 0320 movs r0, #3 - 678 004e 05E0 b .L57 - 679 .L62: -4521:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 680 .loc 1 4521 0 - 681 0050 0448 ldr r0, .L63+4 - 682 0052 FFF7FEFF bl vcom_Send - 683 .LVL56: -4522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 684 .loc 1 4522 0 - 685 0056 0120 movs r0, #1 - 686 0058 00E0 b .L57 - 687 .L61: -4542:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 688 .loc 1 4542 0 - 689 005a 0020 movs r0, #0 - 690 .L57: -4543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 691 .loc 1 4543 0 - 692 @ sp needed - 693 .LVL57: - 694 .LVL58: - 695 .LVL59: - 696 005c 70BD pop {r4, r5, r6, pc} - 697 .L64: - 698 005e C046 .align 2 - 699 .L63: - 700 0060 44000000 .word .LC2 - 701 0064 00000000 .word .LC0 - 702 .cfi_endproc - 703 .LFE105: - 705 .section .text.I2C_RequestMemoryWrite,"ax",%progbits - 706 .align 1 - 707 .syntax unified - 708 .code 16 - 709 .thumb_func - 710 .fpu softvfp - 712 I2C_RequestMemoryWrite: - 713 .LFB88: -3651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); - 714 .loc 1 3651 0 - ARM GAS /tmp/ccpuPECZ.s page 100 - - - 715 .cfi_startproc - 716 @ args = 8, pretend = 0, frame = 0 - 717 @ frame_needed = 0, uses_anonymous_args = 0 - 718 .LVL60: - 719 0000 F0B5 push {r4, r5, r6, r7, lr} - 720 .LCFI6: - 721 .cfi_def_cfa_offset 20 - 722 .cfi_offset 4, -20 - 723 .cfi_offset 5, -16 - 724 .cfi_offset 6, -12 - 725 .cfi_offset 7, -8 - 726 .cfi_offset 14, -4 - 727 0002 83B0 sub sp, sp, #12 - 728 .LCFI7: - 729 .cfi_def_cfa_offset 32 - 730 0004 0600 movs r6, r0 - 731 0006 1500 movs r5, r2 - 732 0008 1C00 movs r4, r3 -3652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 733 .loc 1 3652 0 - 734 000a DAB2 uxtb r2, r3 - 735 .LVL61: - 736 .LBB144: - 737 .LBB145: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 738 .loc 1 4713 0 - 739 000c 0068 ldr r0, [r0] - 740 .LVL62: - 741 000e 4368 ldr r3, [r0, #4] - 742 .LVL63: - 743 0010 1F4F ldr r7, .L73 - 744 0012 3B40 ands r3, r7 - 745 0014 8905 lsls r1, r1, #22 - 746 .LVL64: - 747 0016 890D lsrs r1, r1, #22 - 748 0018 1204 lsls r2, r2, #16 - 749 .LVL65: - 750 001a 1143 orrs r1, r2 - 751 001c 1D4A ldr r2, .L73+4 - 752 001e 1143 orrs r1, r2 - 753 0020 1943 orrs r1, r3 - 754 0022 4160 str r1, [r0, #4] - 755 .LVL66: - 756 .LBE145: - 757 .LBE144: -3655:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 758 .loc 1 3655 0 - 759 0024 099A ldr r2, [sp, #36] - 760 0026 0899 ldr r1, [sp, #32] - 761 0028 3000 movs r0, r6 - 762 002a FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout - 763 .LVL67: - 764 002e 0028 cmp r0, #0 - 765 0030 05D0 beq .L66 -3657:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 766 .loc 1 3657 0 - 767 0032 736C ldr r3, [r6, #68] - ARM GAS /tmp/ccpuPECZ.s page 101 - - - 768 0034 042B cmp r3, #4 - 769 0036 26D1 bne .L71 -3659:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 770 .loc 1 3659 0 - 771 0038 0120 movs r0, #1 - 772 .L67: -3703:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 773 .loc 1 3703 0 - 774 003a 03B0 add sp, sp, #12 - 775 @ sp needed - 776 .LVL68: - 777 003c F0BD pop {r4, r5, r6, r7, pc} - 778 .LVL69: - 779 .L66: -3668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 780 .loc 1 3668 0 - 781 003e 012C cmp r4, #1 - 782 0040 0ED1 bne .L68 -3671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 783 .loc 1 3671 0 - 784 0042 3368 ldr r3, [r6] - 785 0044 EDB2 uxtb r5, r5 - 786 0046 9D62 str r5, [r3, #40] - 787 .L69: -3697:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 788 .loc 1 3697 0 - 789 0048 099B ldr r3, [sp, #36] - 790 004a 0093 str r3, [sp] - 791 004c 089B ldr r3, [sp, #32] - 792 004e 0022 movs r2, #0 - 793 0050 8021 movs r1, #128 - 794 0052 3000 movs r0, r6 - 795 0054 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 796 .LVL70: - 797 0058 0028 cmp r0, #0 - 798 005a EED0 beq .L67 -3699:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 799 .loc 1 3699 0 - 800 005c 0320 movs r0, #3 - 801 005e ECE7 b .L67 - 802 .L68: -3677:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 803 .loc 1 3677 0 - 804 0060 3368 ldr r3, [r6] - 805 0062 2A0A lsrs r2, r5, #8 - 806 0064 9A62 str r2, [r3, #40] -3680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 807 .loc 1 3680 0 - 808 0066 099A ldr r2, [sp, #36] - 809 0068 0899 ldr r1, [sp, #32] - 810 006a 3000 movs r0, r6 - 811 006c FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout - 812 .LVL71: - 813 0070 0028 cmp r0, #0 - 814 0072 04D0 beq .L70 -3682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 815 .loc 1 3682 0 - ARM GAS /tmp/ccpuPECZ.s page 102 - - - 816 0074 736C ldr r3, [r6, #68] - 817 0076 042B cmp r3, #4 - 818 0078 07D1 bne .L72 -3684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 819 .loc 1 3684 0 - 820 007a 0120 movs r0, #1 - 821 007c DDE7 b .L67 - 822 .L70: -3693:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 823 .loc 1 3693 0 - 824 007e 3368 ldr r3, [r6] - 825 0080 EDB2 uxtb r5, r5 - 826 0082 9D62 str r5, [r3, #40] - 827 0084 E0E7 b .L69 - 828 .L71: -3663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 829 .loc 1 3663 0 - 830 0086 0320 movs r0, #3 - 831 0088 D7E7 b .L67 - 832 .L72: -3688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 833 .loc 1 3688 0 - 834 008a 0320 movs r0, #3 - 835 008c D5E7 b .L67 - 836 .L74: - 837 008e C046 .align 2 - 838 .L73: - 839 0090 009800FC .word -67069952 - 840 0094 00200081 .word -2130698240 - 841 .cfi_endproc - 842 .LFE88: - 844 .section .text.I2C_RequestMemoryRead,"ax",%progbits - 845 .align 1 - 846 .syntax unified - 847 .code 16 - 848 .thumb_func - 849 .fpu softvfp - 851 I2C_RequestMemoryRead: - 852 .LFB89: -3718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); - 853 .loc 1 3718 0 - 854 .cfi_startproc - 855 @ args = 8, pretend = 0, frame = 0 - 856 @ frame_needed = 0, uses_anonymous_args = 0 - 857 .LVL72: - 858 0000 F0B5 push {r4, r5, r6, r7, lr} - 859 .LCFI8: - 860 .cfi_def_cfa_offset 20 - 861 .cfi_offset 4, -20 - 862 .cfi_offset 5, -16 - 863 .cfi_offset 6, -12 - 864 .cfi_offset 7, -8 - 865 .cfi_offset 14, -4 - 866 0002 83B0 sub sp, sp, #12 - 867 .LCFI9: - 868 .cfi_def_cfa_offset 32 - 869 0004 0600 movs r6, r0 - ARM GAS /tmp/ccpuPECZ.s page 103 - - - 870 0006 1400 movs r4, r2 - 871 0008 1D00 movs r5, r3 -3719:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 872 .loc 1 3719 0 - 873 000a DAB2 uxtb r2, r3 - 874 .LVL73: - 875 .LBB146: - 876 .LBB147: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 877 .loc 1 4713 0 - 878 000c 0068 ldr r0, [r0] - 879 .LVL74: - 880 000e 4368 ldr r3, [r0, #4] - 881 .LVL75: - 882 0010 254F ldr r7, .L86 - 883 0012 3B40 ands r3, r7 - 884 0014 8905 lsls r1, r1, #22 - 885 .LVL76: - 886 0016 890D lsrs r1, r1, #22 - 887 0018 1204 lsls r2, r2, #16 - 888 .LVL77: - 889 001a 1143 orrs r1, r2 - 890 001c 234A ldr r2, .L86+4 - 891 001e 1143 orrs r1, r2 - 892 0020 1943 orrs r1, r3 - 893 0022 4160 str r1, [r0, #4] - 894 .LVL78: - 895 .LBE147: - 896 .LBE146: -3722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 897 .loc 1 3722 0 - 898 0024 099A ldr r2, [sp, #36] - 899 0026 0899 ldr r1, [sp, #32] - 900 0028 3000 movs r0, r6 - 901 002a FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout - 902 .LVL79: - 903 002e 0028 cmp r0, #0 - 904 0030 10D1 bne .L83 -3736:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 905 .loc 1 3736 0 - 906 0032 012D cmp r5, #1 - 907 0034 17D1 bne .L78 -3739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 908 .loc 1 3739 0 - 909 0036 3368 ldr r3, [r6] - 910 0038 E4B2 uxtb r4, r4 - 911 003a 9C62 str r4, [r3, #40] - 912 .L79: -3766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 913 .loc 1 3766 0 - 914 003c 099B ldr r3, [sp, #36] - 915 003e 0093 str r3, [sp] - 916 0040 089B ldr r3, [sp, #32] - 917 0042 0022 movs r2, #0 - 918 0044 4021 movs r1, #64 - 919 0046 3000 movs r0, r6 - 920 0048 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - ARM GAS /tmp/ccpuPECZ.s page 104 - - - 921 .LVL80: - 922 004c 0028 cmp r0, #0 - 923 004e 21D1 bne .L84 - 924 .L77: -3773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 925 .loc 1 3773 0 - 926 0050 03B0 add sp, sp, #12 - 927 @ sp needed - 928 .LVL81: - 929 0052 F0BD pop {r4, r5, r6, r7, pc} - 930 .LVL82: - 931 .L83: -3724:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 932 .loc 1 3724 0 - 933 0054 716C ldr r1, [r6, #68] - 934 0056 1648 ldr r0, .L86+8 - 935 0058 FFF7FEFF bl vcom_Send - 936 .LVL83: -3725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 937 .loc 1 3725 0 - 938 005c 736C ldr r3, [r6, #68] - 939 005e 042B cmp r3, #4 - 940 0060 1DD1 bne .L81 -3727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 941 .loc 1 3727 0 - 942 0062 0120 movs r0, #1 - 943 0064 F4E7 b .L77 - 944 .L78: -3745:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 945 .loc 1 3745 0 - 946 0066 3368 ldr r3, [r6] - 947 0068 220A lsrs r2, r4, #8 - 948 006a 9A62 str r2, [r3, #40] -3748:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 949 .loc 1 3748 0 - 950 006c 099A ldr r2, [sp, #36] - 951 006e 0899 ldr r1, [sp, #32] - 952 0070 3000 movs r0, r6 - 953 0072 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout - 954 .LVL84: - 955 0076 0028 cmp r0, #0 - 956 0078 03D1 bne .L85 -3762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 957 .loc 1 3762 0 - 958 007a 3368 ldr r3, [r6] - 959 007c E4B2 uxtb r4, r4 - 960 007e 9C62 str r4, [r3, #40] - 961 0080 DCE7 b .L79 - 962 .L85: -3750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 963 .loc 1 3750 0 - 964 0082 716C ldr r1, [r6, #68] - 965 0084 0B48 ldr r0, .L86+12 - 966 0086 FFF7FEFF bl vcom_Send - 967 .LVL85: -3751:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 968 .loc 1 3751 0 - ARM GAS /tmp/ccpuPECZ.s page 105 - - - 969 008a 736C ldr r3, [r6, #68] - 970 008c 042B cmp r3, #4 - 971 008e 08D1 bne .L82 -3753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 972 .loc 1 3753 0 - 973 0090 0120 movs r0, #1 - 974 0092 DDE7 b .L77 - 975 .L84: -3768:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 976 .loc 1 3768 0 - 977 0094 0848 ldr r0, .L86+16 - 978 0096 FFF7FEFF bl vcom_Send - 979 .LVL86: -3769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 980 .loc 1 3769 0 - 981 009a 0320 movs r0, #3 - 982 009c D8E7 b .L77 - 983 .L81: -3731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 984 .loc 1 3731 0 - 985 009e 0320 movs r0, #3 - 986 00a0 D6E7 b .L77 - 987 .L82: -3757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 988 .loc 1 3757 0 - 989 00a2 0320 movs r0, #3 - 990 00a4 D4E7 b .L77 - 991 .L87: - 992 00a6 C046 .align 2 - 993 .L86: - 994 00a8 009800FC .word -67069952 - 995 00ac 00200080 .word -2147475456 - 996 00b0 00000000 .word .LC4 - 997 00b4 24000000 .word .LC6 - 998 00b8 48000000 .word .LC8 - 999 .cfi_endproc - 1000 .LFE89: - 1002 .section .text.I2C_DMAMasterTransmitCplt,"ax",%progbits - 1003 .align 1 - 1004 .syntax unified - 1005 .code 16 - 1006 .thumb_func - 1007 .fpu softvfp - 1009 I2C_DMAMasterTransmitCplt: - 1010 .LFB98: -4319:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 1011 .loc 1 4319 0 - 1012 .cfi_startproc - 1013 @ args = 0, pretend = 0, frame = 0 - 1014 @ frame_needed = 0, uses_anonymous_args = 0 - 1015 .LVL87: - 1016 0000 10B5 push {r4, lr} - 1017 .LCFI10: - 1018 .cfi_def_cfa_offset 8 - 1019 .cfi_offset 4, -8 - 1020 .cfi_offset 14, -4 -4320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 106 - - - 1021 .loc 1 4320 0 - 1022 0002 846A ldr r4, [r0, #40] - 1023 .LVL88: -4323:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1024 .loc 1 4323 0 - 1025 0004 2268 ldr r2, [r4] - 1026 0006 1368 ldr r3, [r2] - 1027 0008 1E49 ldr r1, .L101 - 1028 000a 0B40 ands r3, r1 - 1029 000c 1360 str r3, [r2] -4326:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1030 .loc 1 4326 0 - 1031 000e 638D ldrh r3, [r4, #42] - 1032 0010 9BB2 uxth r3, r3 - 1033 0012 002B cmp r3, #0 - 1034 0014 10D1 bne .L89 - 1035 .LVL89: - 1036 .LBB148: - 1037 .LBB149: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 1038 .loc 1 4728 0 - 1039 0016 636B ldr r3, [r4, #52] - 1040 0018 1B4A ldr r2, .L101+4 - 1041 001a 9342 cmp r3, r2 - 1042 001c 0AD0 beq .L95 - 1043 001e 1B4A ldr r2, .L101+8 - 1044 0020 9342 cmp r3, r2 - 1045 0022 05D0 beq .L99 -4778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1046 .loc 1 4778 0 - 1047 0024 F421 movs r1, #244 - 1048 .L90: - 1049 .LVL90: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1050 .loc 1 4785 0 - 1051 0026 2268 ldr r2, [r4] - 1052 0028 1368 ldr r3, [r2] - 1053 002a 0B43 orrs r3, r1 - 1054 002c 1360 str r3, [r2] - 1055 .LVL91: - 1056 .L88: - 1057 .LBE149: - 1058 .LBE148: -4353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1059 .loc 1 4353 0 - 1060 @ sp needed - 1061 .LVL92: - 1062 002e 10BD pop {r4, pc} - 1063 .LVL93: - 1064 .L99: - 1065 .LBB151: - 1066 .LBB150: -4752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1067 .loc 1 4752 0 - 1068 0030 6021 movs r1, #96 - 1069 0032 F8E7 b .L90 - 1070 .L95: - ARM GAS /tmp/ccpuPECZ.s page 107 - - - 1071 0034 6021 movs r1, #96 - 1072 0036 F6E7 b .L90 - 1073 .LVL94: - 1074 .L89: - 1075 .LBE150: - 1076 .LBE151: -4335:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1077 .loc 1 4335 0 - 1078 0038 218D ldrh r1, [r4, #40] - 1079 003a 636A ldr r3, [r4, #36] - 1080 003c 9C46 mov ip, r3 - 1081 003e 6144 add r1, r1, ip - 1082 0040 6162 str r1, [r4, #36] -4338:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1083 .loc 1 4338 0 - 1084 0042 638D ldrh r3, [r4, #42] - 1085 0044 9BB2 uxth r3, r3 - 1086 0046 FF2B cmp r3, #255 - 1087 0048 14D9 bls .L92 -4340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1088 .loc 1 4340 0 - 1089 004a FF23 movs r3, #255 - 1090 004c 2385 strh r3, [r4, #40] - 1091 .L93: -4348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1092 .loc 1 4348 0 - 1093 004e 2268 ldr r2, [r4] - 1094 0050 2832 adds r2, r2, #40 - 1095 0052 238D ldrh r3, [r4, #40] - 1096 0054 A06B ldr r0, [r4, #56] - 1097 .LVL95: - 1098 0056 FFF7FEFF bl HAL_DMA_Start_IT - 1099 .LVL96: - 1100 .LBB152: - 1101 .LBB153: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 1102 .loc 1 4728 0 - 1103 005a 636B ldr r3, [r4, #52] - 1104 005c 0A4A ldr r2, .L101+4 - 1105 005e 9342 cmp r3, r2 - 1106 0060 0DD0 beq .L97 - 1107 0062 0A4A ldr r2, .L101+8 - 1108 0064 9342 cmp r3, r2 - 1109 0066 08D0 beq .L100 -4778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1110 .loc 1 4778 0 - 1111 0068 F421 movs r1, #244 - 1112 .L94: - 1113 .LVL97: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1114 .loc 1 4785 0 - 1115 006a 2268 ldr r2, [r4] - 1116 006c 1368 ldr r3, [r2] - 1117 006e 0B43 orrs r3, r1 - 1118 0070 1360 str r3, [r2] - 1119 .LBE153: - 1120 .LBE152: - ARM GAS /tmp/ccpuPECZ.s page 108 - - -4353:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1121 .loc 1 4353 0 - 1122 0072 DCE7 b .L88 - 1123 .LVL98: - 1124 .L92: -4344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1125 .loc 1 4344 0 - 1126 0074 638D ldrh r3, [r4, #42] - 1127 0076 2385 strh r3, [r4, #40] - 1128 0078 E9E7 b .L93 - 1129 .LVL99: - 1130 .L100: - 1131 .LBB155: - 1132 .LBB154: -4752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1133 .loc 1 4752 0 - 1134 007a 6021 movs r1, #96 - 1135 007c F5E7 b .L94 - 1136 .L97: - 1137 007e 6021 movs r1, #96 - 1138 0080 F3E7 b .L94 - 1139 .L102: - 1140 0082 C046 .align 2 - 1141 .L101: - 1142 0084 FFBFFFFF .word -16385 - 1143 0088 00000000 .word I2C_Master_ISR_DMA - 1144 008c 00000000 .word I2C_Slave_ISR_DMA - 1145 .LBE154: - 1146 .LBE155: - 1147 .cfi_endproc - 1148 .LFE98: - 1150 .section .text.I2C_DMAMasterReceiveCplt,"ax",%progbits - 1151 .align 1 - 1152 .syntax unified - 1153 .code 16 - 1154 .thumb_func - 1155 .fpu softvfp - 1157 I2C_DMAMasterReceiveCplt: - 1158 .LFB100: -4376:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 1159 .loc 1 4376 0 - 1160 .cfi_startproc - 1161 @ args = 0, pretend = 0, frame = 0 - 1162 @ frame_needed = 0, uses_anonymous_args = 0 - 1163 .LVL100: - 1164 0000 10B5 push {r4, lr} - 1165 .LCFI11: - 1166 .cfi_def_cfa_offset 8 - 1167 .cfi_offset 4, -8 - 1168 .cfi_offset 14, -4 -4377:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1169 .loc 1 4377 0 - 1170 0002 846A ldr r4, [r0, #40] - 1171 .LVL101: -4380:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1172 .loc 1 4380 0 - 1173 0004 2268 ldr r2, [r4] - ARM GAS /tmp/ccpuPECZ.s page 109 - - - 1174 0006 1368 ldr r3, [r2] - 1175 0008 1E49 ldr r1, .L116 - 1176 000a 0B40 ands r3, r1 - 1177 000c 1360 str r3, [r2] -4383:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1178 .loc 1 4383 0 - 1179 000e 638D ldrh r3, [r4, #42] - 1180 0010 9BB2 uxth r3, r3 - 1181 0012 002B cmp r3, #0 - 1182 0014 10D1 bne .L104 - 1183 .LVL102: - 1184 .LBB156: - 1185 .LBB157: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 1186 .loc 1 4728 0 - 1187 0016 636B ldr r3, [r4, #52] - 1188 0018 1B4A ldr r2, .L116+4 - 1189 001a 9342 cmp r3, r2 - 1190 001c 0AD0 beq .L110 - 1191 001e 1B4A ldr r2, .L116+8 - 1192 0020 9342 cmp r3, r2 - 1193 0022 05D0 beq .L114 -4778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1194 .loc 1 4778 0 - 1195 0024 F421 movs r1, #244 - 1196 .L105: - 1197 .LVL103: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1198 .loc 1 4785 0 - 1199 0026 2268 ldr r2, [r4] - 1200 0028 1368 ldr r3, [r2] - 1201 002a 0B43 orrs r3, r1 - 1202 002c 1360 str r3, [r2] - 1203 .LVL104: - 1204 .L103: - 1205 .LBE157: - 1206 .LBE156: -4410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1207 .loc 1 4410 0 - 1208 @ sp needed - 1209 .LVL105: - 1210 002e 10BD pop {r4, pc} - 1211 .LVL106: - 1212 .L114: - 1213 .LBB159: - 1214 .LBB158: -4752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1215 .loc 1 4752 0 - 1216 0030 6021 movs r1, #96 - 1217 0032 F8E7 b .L105 - 1218 .L110: - 1219 0034 6021 movs r1, #96 - 1220 0036 F6E7 b .L105 - 1221 .LVL107: - 1222 .L104: - 1223 .LBE158: - 1224 .LBE159: - ARM GAS /tmp/ccpuPECZ.s page 110 - - -4392:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1225 .loc 1 4392 0 - 1226 0038 228D ldrh r2, [r4, #40] - 1227 003a 636A ldr r3, [r4, #36] - 1228 003c 9C46 mov ip, r3 - 1229 003e 6244 add r2, r2, ip - 1230 0040 6262 str r2, [r4, #36] -4395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1231 .loc 1 4395 0 - 1232 0042 638D ldrh r3, [r4, #42] - 1233 0044 9BB2 uxth r3, r3 - 1234 0046 FF2B cmp r3, #255 - 1235 0048 14D9 bls .L107 -4397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1236 .loc 1 4397 0 - 1237 004a FF23 movs r3, #255 - 1238 004c 2385 strh r3, [r4, #40] - 1239 .L108: -4405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1240 .loc 1 4405 0 - 1241 004e 2168 ldr r1, [r4] - 1242 0050 2431 adds r1, r1, #36 - 1243 0052 238D ldrh r3, [r4, #40] - 1244 0054 E06B ldr r0, [r4, #60] - 1245 .LVL108: - 1246 0056 FFF7FEFF bl HAL_DMA_Start_IT - 1247 .LVL109: - 1248 .LBB160: - 1249 .LBB161: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 1250 .loc 1 4728 0 - 1251 005a 636B ldr r3, [r4, #52] - 1252 005c 0A4A ldr r2, .L116+4 - 1253 005e 9342 cmp r3, r2 - 1254 0060 0DD0 beq .L112 - 1255 0062 0A4A ldr r2, .L116+8 - 1256 0064 9342 cmp r3, r2 - 1257 0066 08D0 beq .L115 -4778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1258 .loc 1 4778 0 - 1259 0068 F421 movs r1, #244 - 1260 .L109: - 1261 .LVL110: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1262 .loc 1 4785 0 - 1263 006a 2268 ldr r2, [r4] - 1264 006c 1368 ldr r3, [r2] - 1265 006e 0B43 orrs r3, r1 - 1266 0070 1360 str r3, [r2] - 1267 .LBE161: - 1268 .LBE160: -4410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1269 .loc 1 4410 0 - 1270 0072 DCE7 b .L103 - 1271 .LVL111: - 1272 .L107: -4401:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - ARM GAS /tmp/ccpuPECZ.s page 111 - - - 1273 .loc 1 4401 0 - 1274 0074 638D ldrh r3, [r4, #42] - 1275 0076 2385 strh r3, [r4, #40] - 1276 0078 E9E7 b .L108 - 1277 .LVL112: - 1278 .L115: - 1279 .LBB163: - 1280 .LBB162: -4752:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1281 .loc 1 4752 0 - 1282 007a 6021 movs r1, #96 - 1283 007c F5E7 b .L109 - 1284 .L112: - 1285 007e 6021 movs r1, #96 - 1286 0080 F3E7 b .L109 - 1287 .L117: - 1288 0082 C046 .align 2 - 1289 .L116: - 1290 0084 FF7FFFFF .word -32769 - 1291 0088 00000000 .word I2C_Master_ISR_DMA - 1292 008c 00000000 .word I2C_Slave_ISR_DMA - 1293 .LBE162: - 1294 .LBE163: - 1295 .cfi_endproc - 1296 .LFE100: - 1298 .section .text.HAL_I2C_MspInit,"ax",%progbits - 1299 .align 1 - 1300 .weak HAL_I2C_MspInit - 1301 .syntax unified - 1302 .code 16 - 1303 .thumb_func - 1304 .fpu softvfp - 1306 HAL_I2C_MspInit: - 1307 .LFB41: - 529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ - 1308 .loc 1 529 0 - 1309 .cfi_startproc - 1310 @ args = 0, pretend = 0, frame = 0 - 1311 @ frame_needed = 0, uses_anonymous_args = 0 - 1312 @ link register save eliminated. - 1313 .LVL113: - 536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1314 .loc 1 536 0 - 1315 @ sp needed - 1316 0000 7047 bx lr - 1317 .cfi_endproc - 1318 .LFE41: - 1320 .section .text.HAL_I2C_Init,"ax",%progbits - 1321 .align 1 - 1322 .global HAL_I2C_Init - 1323 .syntax unified - 1324 .code 16 - 1325 .thumb_func - 1326 .fpu softvfp - 1328 HAL_I2C_Init: - 1329 .LFB39: - 406:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the I2C handle allocation */ - ARM GAS /tmp/ccpuPECZ.s page 112 - - - 1330 .loc 1 406 0 - 1331 .cfi_startproc - 1332 @ args = 0, pretend = 0, frame = 0 - 1333 @ frame_needed = 0, uses_anonymous_args = 0 - 1334 .LVL114: - 1335 0000 10B5 push {r4, lr} - 1336 .LCFI12: - 1337 .cfi_def_cfa_offset 8 - 1338 .cfi_offset 4, -8 - 1339 .cfi_offset 14, -4 - 1340 0002 041E subs r4, r0, #0 - 408:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1341 .loc 1 408 0 - 1342 0004 59D0 beq .L125 - 423:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1343 .loc 1 423 0 - 1344 0006 4123 movs r3, #65 - 1345 0008 C35C ldrb r3, [r0, r3] - 1346 000a 002B cmp r3, #0 - 1347 000c 43D0 beq .L126 - 1348 .LVL115: - 1349 .L121: - 432:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1350 .loc 1 432 0 - 1351 000e 4123 movs r3, #65 - 1352 0010 2422 movs r2, #36 - 1353 0012 E254 strb r2, [r4, r3] - 435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1354 .loc 1 435 0 - 1355 0014 2268 ldr r2, [r4] - 1356 0016 1368 ldr r3, [r2] - 1357 0018 0121 movs r1, #1 - 1358 001a 8B43 bics r3, r1 - 1359 001c 1360 str r3, [r2] - 439:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1360 .loc 1 439 0 - 1361 001e 2268 ldr r2, [r4] - 1362 0020 274B ldr r3, .L129 - 1363 0022 6168 ldr r1, [r4, #4] - 1364 0024 0B40 ands r3, r1 - 1365 0026 1361 str r3, [r2, #16] - 443:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1366 .loc 1 443 0 - 1367 0028 2268 ldr r2, [r4] - 1368 002a 9368 ldr r3, [r2, #8] - 1369 002c 2549 ldr r1, .L129+4 - 1370 002e 0B40 ands r3, r1 - 1371 0030 9360 str r3, [r2, #8] - 446:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1372 .loc 1 446 0 - 1373 0032 E368 ldr r3, [r4, #12] - 1374 0034 012B cmp r3, #1 - 1375 0036 34D0 beq .L127 - 452:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1376 .loc 1 452 0 - 1377 0038 2268 ldr r2, [r4] - 1378 003a 8423 movs r3, #132 - ARM GAS /tmp/ccpuPECZ.s page 113 - - - 1379 003c 1B02 lsls r3, r3, #8 - 1380 003e A168 ldr r1, [r4, #8] - 1381 0040 0B43 orrs r3, r1 - 1382 0042 9360 str r3, [r2, #8] - 1383 .L123: - 457:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1384 .loc 1 457 0 - 1385 0044 E368 ldr r3, [r4, #12] - 1386 0046 022B cmp r3, #2 - 1387 0048 32D0 beq .L128 - 1388 .L124: - 462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1389 .loc 1 462 0 - 1390 004a 2268 ldr r2, [r4] - 1391 004c 5168 ldr r1, [r2, #4] - 1392 004e 1E4B ldr r3, .L129+8 - 1393 0050 0B43 orrs r3, r1 - 1394 0052 5360 str r3, [r2, #4] - 466:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1395 .loc 1 466 0 - 1396 0054 2268 ldr r2, [r4] - 1397 0056 D368 ldr r3, [r2, #12] - 1398 0058 1A49 ldr r1, .L129+4 - 1399 005a 0B40 ands r3, r1 - 1400 005c D360 str r3, [r2, #12] - 469:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1401 .loc 1 469 0 - 1402 005e 2369 ldr r3, [r4, #16] - 1403 0060 6269 ldr r2, [r4, #20] - 1404 0062 1343 orrs r3, r2 - 1405 0064 A269 ldr r2, [r4, #24] - 1406 0066 1202 lsls r2, r2, #8 - 1407 0068 2168 ldr r1, [r4] - 1408 006a 1343 orrs r3, r2 - 1409 006c CB60 str r3, [r1, #12] - 473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1410 .loc 1 473 0 - 1411 006e 2268 ldr r2, [r4] - 1412 0070 E369 ldr r3, [r4, #28] - 1413 0072 216A ldr r1, [r4, #32] - 1414 0074 0B43 orrs r3, r1 - 1415 0076 1360 str r3, [r2] - 476:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1416 .loc 1 476 0 - 1417 0078 2268 ldr r2, [r4] - 1418 007a 1368 ldr r3, [r2] - 1419 007c 0121 movs r1, #1 - 1420 007e 0B43 orrs r3, r1 - 1421 0080 1360 str r3, [r2] - 478:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - 1422 .loc 1 478 0 - 1423 0082 0023 movs r3, #0 - 1424 0084 6364 str r3, [r4, #68] - 479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; - 1425 .loc 1 479 0 - 1426 0086 4122 movs r2, #65 - 1427 0088 1F31 adds r1, r1, #31 - ARM GAS /tmp/ccpuPECZ.s page 114 - - - 1428 008a A154 strb r1, [r4, r2] - 480:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 1429 .loc 1 480 0 - 1430 008c 2363 str r3, [r4, #48] - 481:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1431 .loc 1 481 0 - 1432 008e 0132 adds r2, r2, #1 - 1433 0090 A354 strb r3, [r4, r2] - 483:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1434 .loc 1 483 0 - 1435 0092 0020 movs r0, #0 - 1436 .L120: - 484:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1437 .loc 1 484 0 - 1438 @ sp needed - 1439 .LVL116: - 1440 0094 10BD pop {r4, pc} - 1441 .LVL117: - 1442 .L126: - 426:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1443 .loc 1 426 0 - 1444 0096 4033 adds r3, r3, #64 - 1445 0098 0022 movs r2, #0 - 1446 009a C254 strb r2, [r0, r3] - 429:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1447 .loc 1 429 0 - 1448 009c FFF7FEFF bl HAL_I2C_MspInit - 1449 .LVL118: - 1450 00a0 B5E7 b .L121 - 1451 .L127: - 448:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1452 .loc 1 448 0 - 1453 00a2 2268 ldr r2, [r4] - 1454 00a4 8023 movs r3, #128 - 1455 00a6 1B02 lsls r3, r3, #8 - 1456 00a8 A168 ldr r1, [r4, #8] - 1457 00aa 0B43 orrs r3, r1 - 1458 00ac 9360 str r3, [r2, #8] - 1459 00ae C9E7 b .L123 - 1460 .L128: - 459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1461 .loc 1 459 0 - 1462 00b0 2368 ldr r3, [r4] - 1463 00b2 8022 movs r2, #128 - 1464 00b4 1201 lsls r2, r2, #4 - 1465 00b6 5A60 str r2, [r3, #4] - 1466 00b8 C7E7 b .L124 - 1467 .LVL119: - 1468 .L125: - 410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1469 .loc 1 410 0 - 1470 00ba 0120 movs r0, #1 - 1471 .LVL120: - 1472 00bc EAE7 b .L120 - 1473 .L130: - 1474 00be C046 .align 2 - 1475 .L129: - ARM GAS /tmp/ccpuPECZ.s page 115 - - - 1476 00c0 FFFFFFF0 .word -251658241 - 1477 00c4 FF7FFFFF .word -32769 - 1478 00c8 00800002 .word 33587200 - 1479 .cfi_endproc - 1480 .LFE39: - 1482 .section .text.HAL_I2C_MspDeInit,"ax",%progbits - 1483 .align 1 - 1484 .weak HAL_I2C_MspDeInit - 1485 .syntax unified - 1486 .code 16 - 1487 .thumb_func - 1488 .fpu softvfp - 1490 HAL_I2C_MspDeInit: - 1491 .LFB42: - 545:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ - 1492 .loc 1 545 0 - 1493 .cfi_startproc - 1494 @ args = 0, pretend = 0, frame = 0 - 1495 @ frame_needed = 0, uses_anonymous_args = 0 - 1496 @ link register save eliminated. - 1497 .LVL121: - 552:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1498 .loc 1 552 0 - 1499 @ sp needed - 1500 0000 7047 bx lr - 1501 .cfi_endproc - 1502 .LFE42: - 1504 .section .text.HAL_I2C_DeInit,"ax",%progbits - 1505 .align 1 - 1506 .global HAL_I2C_DeInit - 1507 .syntax unified - 1508 .code 16 - 1509 .thumb_func - 1510 .fpu softvfp - 1512 HAL_I2C_DeInit: - 1513 .LFB40: - 493:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /* Check the I2C handle allocation */ - 1514 .loc 1 493 0 - 1515 .cfi_startproc - 1516 @ args = 0, pretend = 0, frame = 0 - 1517 @ frame_needed = 0, uses_anonymous_args = 0 - 1518 .LVL122: - 1519 0000 70B5 push {r4, r5, r6, lr} - 1520 .LCFI13: - 1521 .cfi_def_cfa_offset 16 - 1522 .cfi_offset 4, -16 - 1523 .cfi_offset 5, -12 - 1524 .cfi_offset 6, -8 - 1525 .cfi_offset 14, -4 - 1526 0002 041E subs r4, r0, #0 - 495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1527 .loc 1 495 0 - 1528 0004 13D0 beq .L134 - 503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1529 .loc 1 503 0 - 1530 0006 4125 movs r5, #65 - 1531 0008 2423 movs r3, #36 - ARM GAS /tmp/ccpuPECZ.s page 116 - - - 1532 000a 4355 strb r3, [r0, r5] - 506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1533 .loc 1 506 0 - 1534 000c 0268 ldr r2, [r0] - 1535 000e 1368 ldr r3, [r2] - 1536 0010 0121 movs r1, #1 - 1537 0012 8B43 bics r3, r1 - 1538 0014 1360 str r3, [r2] - 509:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1539 .loc 1 509 0 - 1540 0016 FFF7FEFF bl HAL_I2C_MspDeInit - 1541 .LVL123: - 511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; - 1542 .loc 1 511 0 - 1543 001a 0023 movs r3, #0 - 1544 001c 6364 str r3, [r4, #68] - 512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; - 1545 .loc 1 512 0 - 1546 001e 6355 strb r3, [r4, r5] - 513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 1547 .loc 1 513 0 - 1548 0020 2363 str r3, [r4, #48] - 514:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1549 .loc 1 514 0 - 1550 0022 4222 movs r2, #66 - 1551 0024 A354 strb r3, [r4, r2] - 517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1552 .loc 1 517 0 - 1553 0026 023A subs r2, r2, #2 - 1554 0028 A354 strb r3, [r4, r2] - 519:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1555 .loc 1 519 0 - 1556 002a 0020 movs r0, #0 - 1557 .L133: - 520:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1558 .loc 1 520 0 - 1559 @ sp needed - 1560 .LVL124: - 1561 002c 70BD pop {r4, r5, r6, pc} - 1562 .LVL125: - 1563 .L134: - 497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1564 .loc 1 497 0 - 1565 002e 0120 movs r0, #1 - 1566 .LVL126: - 1567 0030 FCE7 b .L133 - 1568 .cfi_endproc - 1569 .LFE40: - 1571 .section .text.HAL_I2C_Master_Transmit,"ax",%progbits - 1572 .align 1 - 1573 .global HAL_I2C_Master_Transmit - 1574 .syntax unified - 1575 .code 16 - 1576 .thumb_func - 1577 .fpu softvfp - 1579 HAL_I2C_Master_Transmit: - 1580 .LFB43: - ARM GAS /tmp/ccpuPECZ.s page 117 - - - 629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 1581 .loc 1 629 0 - 1582 .cfi_startproc - 1583 @ args = 4, pretend = 0, frame = 8 - 1584 @ frame_needed = 0, uses_anonymous_args = 0 - 1585 .LVL127: - 1586 0000 F0B5 push {r4, r5, r6, r7, lr} - 1587 .LCFI14: - 1588 .cfi_def_cfa_offset 20 - 1589 .cfi_offset 4, -20 - 1590 .cfi_offset 5, -16 - 1591 .cfi_offset 6, -12 - 1592 .cfi_offset 7, -8 - 1593 .cfi_offset 14, -4 - 1594 0002 85B0 sub sp, sp, #20 - 1595 .LCFI15: - 1596 .cfi_def_cfa_offset 40 - 1597 0004 0400 movs r4, r0 - 1598 0006 0D00 movs r5, r1 - 1599 0008 1700 movs r7, r2 - 1600 000a 0393 str r3, [sp, #12] - 1601 .LVL128: - 632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1602 .loc 1 632 0 - 1603 000c 4123 movs r3, #65 - 1604 .LVL129: - 1605 000e C35C ldrb r3, [r0, r3] - 1606 0010 202B cmp r3, #32 - 1607 0012 00D0 beq .LCB1634 - 1608 0014 BDE0 b .L147 @long jump - 1609 .LCB1634: - 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1610 .loc 1 635 0 - 1611 0016 2033 adds r3, r3, #32 - 1612 0018 C35C ldrb r3, [r0, r3] - 1613 001a 012B cmp r3, #1 - 1614 001c 00D1 bne .LCB1638 - 1615 001e BBE0 b .L148 @long jump - 1616 .LCB1638: - 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1617 .loc 1 635 0 is_stmt 0 discriminator 2 - 1618 0020 4023 movs r3, #64 - 1619 0022 0122 movs r2, #1 - 1620 .LVL130: - 1621 0024 C254 strb r2, [r0, r3] - 638:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1622 .loc 1 638 0 is_stmt 1 discriminator 2 - 1623 0026 FFF7FEFF bl HAL_GetTick - 1624 .LVL131: - 1625 002a 0600 movs r6, r0 - 1626 .LVL132: - 1627 .L137: - 1628 .LBB164: - 1629 .LBB165: -4487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1630 .loc 1 4487 0 - 1631 002c 2368 ldr r3, [r4] - ARM GAS /tmp/ccpuPECZ.s page 118 - - - 1632 002e 9A69 ldr r2, [r3, #24] - 1633 0030 1204 lsls r2, r2, #16 - 1634 0032 0ED5 bpl .L152 -4492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1635 .loc 1 4492 0 - 1636 0034 FFF7FEFF bl HAL_GetTick - 1637 .LVL133: - 1638 0038 801B subs r0, r0, r6 - 1639 003a 1928 cmp r0, #25 - 1640 003c F6D9 bls .L137 -4494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 1641 .loc 1 4494 0 - 1642 003e 4123 movs r3, #65 - 1643 0040 2022 movs r2, #32 - 1644 0042 E254 strb r2, [r4, r3] -4495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1645 .loc 1 4495 0 - 1646 0044 0023 movs r3, #0 - 1647 0046 2232 adds r2, r2, #34 - 1648 0048 A354 strb r3, [r4, r2] -4498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 1649 .loc 1 4498 0 - 1650 004a 023A subs r2, r2, #2 - 1651 004c A354 strb r3, [r4, r2] - 1652 .LVL134: - 1653 .LBE165: - 1654 .LBE164: - 642:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1655 .loc 1 642 0 - 1656 004e 0320 movs r0, #3 - 1657 0050 A0E0 b .L136 - 1658 .LVL135: - 1659 .L152: - 645:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; - 1660 .loc 1 645 0 - 1661 0052 4122 movs r2, #65 - 1662 0054 2121 movs r1, #33 - 1663 0056 A154 strb r1, [r4, r2] - 646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 1664 .loc 1 646 0 - 1665 0058 0132 adds r2, r2, #1 - 1666 005a 1139 subs r1, r1, #17 - 1667 005c A154 strb r1, [r4, r2] - 647:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1668 .loc 1 647 0 - 1669 005e 0022 movs r2, #0 - 1670 0060 6264 str r2, [r4, #68] - 650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 1671 .loc 1 650 0 - 1672 0062 6762 str r7, [r4, #36] - 651:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; - 1673 .loc 1 651 0 - 1674 0064 6946 mov r1, sp - 1675 0066 8989 ldrh r1, [r1, #12] - 1676 0068 6185 strh r1, [r4, #42] - 652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1677 .loc 1 652 0 - ARM GAS /tmp/ccpuPECZ.s page 119 - - - 1678 006a 6263 str r2, [r4, #52] - 656:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1679 .loc 1 656 0 - 1680 006c 628D ldrh r2, [r4, #42] - 1681 006e 92B2 uxth r2, r2 - 1682 0070 FF2A cmp r2, #255 - 1683 0072 0ED9 bls .L139 - 658:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRIT - 1684 .loc 1 658 0 - 1685 0074 FF22 movs r2, #255 - 1686 0076 2285 strh r2, [r4, #40] - 1687 .LVL136: - 1688 .LBB166: - 1689 .LBB167: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 1690 .loc 1 4713 0 - 1691 0078 5A68 ldr r2, [r3, #4] - 1692 007a 4B49 ldr r1, .L155 - 1693 007c 0A40 ands r2, r1 - 1694 007e A805 lsls r0, r5, #22 - 1695 0080 800D lsrs r0, r0, #22 - 1696 0082 FF21 movs r1, #255 - 1697 0084 0904 lsls r1, r1, #16 - 1698 0086 0843 orrs r0, r1 - 1699 0088 4849 ldr r1, .L155+4 - 1700 008a 0143 orrs r1, r0 - 1701 008c 0A43 orrs r2, r1 - 1702 008e 5A60 str r2, [r3, #4] - 1703 0090 26E0 b .L144 - 1704 .LVL137: - 1705 .L139: - 1706 .LBE167: - 1707 .LBE166: - 663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRI - 1708 .loc 1 663 0 - 1709 0092 628D ldrh r2, [r4, #42] - 1710 0094 92B2 uxth r2, r2 - 1711 0096 2285 strh r2, [r4, #40] - 664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1712 .loc 1 664 0 - 1713 0098 D2B2 uxtb r2, r2 - 1714 .LVL138: - 1715 .LBB168: - 1716 .LBB169: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 1717 .loc 1 4713 0 - 1718 009a 5968 ldr r1, [r3, #4] - 1719 009c 4248 ldr r0, .L155 - 1720 009e 0140 ands r1, r0 - 1721 00a0 A805 lsls r0, r5, #22 - 1722 00a2 800D lsrs r0, r0, #22 - 1723 00a4 1204 lsls r2, r2, #16 - 1724 .LVL139: - 1725 00a6 0243 orrs r2, r0 - 1726 00a8 4148 ldr r0, .L155+8 - 1727 00aa 0243 orrs r2, r0 - 1728 00ac 0A43 orrs r2, r1 - ARM GAS /tmp/ccpuPECZ.s page 120 - - - 1729 00ae 5A60 str r2, [r3, #4] - 1730 .LVL140: - 1731 00b0 16E0 b .L144 - 1732 .LVL141: - 1733 .L154: - 1734 .LBE169: - 1735 .LBE168: - 672:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1736 .loc 1 672 0 - 1737 00b2 636C ldr r3, [r4, #68] - 1738 00b4 042B cmp r3, #4 - 1739 00b6 00D0 beq .LCB1796 - 1740 00b8 70E0 b .L149 @long jump - 1741 .LCB1796: - 674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1742 .loc 1 674 0 - 1743 00ba 0120 movs r0, #1 - 1744 00bc 6AE0 b .L136 - 1745 .L143: - 701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - 1746 .loc 1 701 0 - 1747 00be 638D ldrh r3, [r4, #42] - 1748 00c0 9BB2 uxth r3, r3 - 1749 00c2 2385 strh r3, [r4, #40] - 702:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1750 .loc 1 702 0 - 1751 00c4 DBB2 uxtb r3, r3 - 1752 .LVL142: - 1753 .LBB170: - 1754 .LBB171: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 1755 .loc 1 4713 0 - 1756 00c6 2068 ldr r0, [r4] - 1757 00c8 4268 ldr r2, [r0, #4] - 1758 00ca 3A49 ldr r1, .L155+12 - 1759 00cc 0A40 ands r2, r1 - 1760 00ce A905 lsls r1, r5, #22 - 1761 00d0 890D lsrs r1, r1, #22 - 1762 00d2 1B04 lsls r3, r3, #16 - 1763 .LVL143: - 1764 00d4 0B43 orrs r3, r1 - 1765 00d6 8021 movs r1, #128 - 1766 00d8 8904 lsls r1, r1, #18 - 1767 00da 0B43 orrs r3, r1 - 1768 00dc 1343 orrs r3, r2 - 1769 00de 4360 str r3, [r0, #4] - 1770 .LVL144: - 1771 .L144: - 1772 .LBE171: - 1773 .LBE170: - 667:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1774 .loc 1 667 0 - 1775 00e0 638D ldrh r3, [r4, #42] - 1776 00e2 9BB2 uxth r3, r3 - 1777 00e4 002B cmp r3, #0 - 1778 00e6 38D0 beq .L153 - 670:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 121 - - - 1779 .loc 1 670 0 - 1780 00e8 3200 movs r2, r6 - 1781 00ea 0A99 ldr r1, [sp, #40] - 1782 00ec 2000 movs r0, r4 - 1783 00ee FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout - 1784 .LVL145: - 1785 00f2 0028 cmp r0, #0 - 1786 00f4 DDD1 bne .L154 - 682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 1787 .loc 1 682 0 - 1788 00f6 636A ldr r3, [r4, #36] - 1789 00f8 5A1C adds r2, r3, #1 - 1790 00fa 6262 str r2, [r4, #36] - 1791 00fc 2268 ldr r2, [r4] - 1792 00fe 1B78 ldrb r3, [r3] - 1793 0100 9362 str r3, [r2, #40] - 683:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; - 1794 .loc 1 683 0 - 1795 0102 638D ldrh r3, [r4, #42] - 1796 0104 013B subs r3, r3, #1 - 1797 0106 9BB2 uxth r3, r3 - 1798 0108 6385 strh r3, [r4, #42] - 684:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1799 .loc 1 684 0 - 1800 010a 238D ldrh r3, [r4, #40] - 1801 010c 013B subs r3, r3, #1 - 1802 010e 9BB2 uxth r3, r3 - 1803 0110 2385 strh r3, [r4, #40] - 686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1804 .loc 1 686 0 - 1805 0112 002B cmp r3, #0 - 1806 0114 E4D1 bne .L144 - 686:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1807 .loc 1 686 0 is_stmt 0 discriminator 1 - 1808 0116 638D ldrh r3, [r4, #42] - 1809 0118 9BB2 uxth r3, r3 - 1810 011a 002B cmp r3, #0 - 1811 011c E0D0 beq .L144 - 689:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1812 .loc 1 689 0 is_stmt 1 - 1813 011e 0096 str r6, [sp] - 1814 0120 0A9B ldr r3, [sp, #40] - 1815 0122 0022 movs r2, #0 - 1816 0124 8021 movs r1, #128 - 1817 0126 2000 movs r0, r4 - 1818 0128 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 1819 .LVL146: - 1820 012c 0028 cmp r0, #0 - 1821 012e 37D1 bne .L150 - 694:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1822 .loc 1 694 0 - 1823 0130 638D ldrh r3, [r4, #42] - 1824 0132 9BB2 uxth r3, r3 - 1825 0134 FF2B cmp r3, #255 - 1826 0136 C2D9 bls .L143 - 696:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - 1827 .loc 1 696 0 - ARM GAS /tmp/ccpuPECZ.s page 122 - - - 1828 0138 FF23 movs r3, #255 - 1829 013a 2385 strh r3, [r4, #40] - 1830 .LVL147: - 1831 .LBB172: - 1832 .LBB173: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 1833 .loc 1 4713 0 - 1834 013c 2068 ldr r0, [r4] - 1835 013e 4368 ldr r3, [r0, #4] - 1836 0140 1C4A ldr r2, .L155+12 - 1837 0142 1340 ands r3, r2 - 1838 0144 A905 lsls r1, r5, #22 - 1839 0146 890D lsrs r1, r1, #22 - 1840 0148 FF22 movs r2, #255 - 1841 014a 1204 lsls r2, r2, #16 - 1842 014c 1143 orrs r1, r2 - 1843 014e 8022 movs r2, #128 - 1844 0150 5204 lsls r2, r2, #17 - 1845 0152 0A43 orrs r2, r1 - 1846 0154 1343 orrs r3, r2 - 1847 0156 4360 str r3, [r0, #4] - 1848 0158 C2E7 b .L144 - 1849 .LVL148: - 1850 .L153: - 1851 .LBE173: - 1852 .LBE172: - 709:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1853 .loc 1 709 0 - 1854 015a 3200 movs r2, r6 - 1855 015c 0A99 ldr r1, [sp, #40] - 1856 015e 2000 movs r0, r4 - 1857 0160 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout - 1858 .LVL149: - 1859 0164 0028 cmp r0, #0 - 1860 0166 04D0 beq .L146 - 711:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1861 .loc 1 711 0 - 1862 0168 636C ldr r3, [r4, #68] - 1863 016a 042B cmp r3, #4 - 1864 016c 1AD1 bne .L151 - 713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1865 .loc 1 713 0 - 1866 016e 0120 movs r0, #1 - 1867 0170 10E0 b .L136 - 1868 .L146: - 722:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1869 .loc 1 722 0 - 1870 0172 2368 ldr r3, [r4] - 1871 0174 2022 movs r2, #32 - 1872 0176 DA61 str r2, [r3, #28] - 725:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1873 .loc 1 725 0 - 1874 0178 2168 ldr r1, [r4] - 1875 017a 4B68 ldr r3, [r1, #4] - 1876 017c 0E4D ldr r5, .L155+16 - 1877 017e 2B40 ands r3, r5 - 1878 0180 4B60 str r3, [r1, #4] - ARM GAS /tmp/ccpuPECZ.s page 123 - - - 727:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 1879 .loc 1 727 0 - 1880 0182 4123 movs r3, #65 - 1881 0184 E254 strb r2, [r4, r3] - 728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1882 .loc 1 728 0 - 1883 0186 0023 movs r3, #0 - 1884 0188 2232 adds r2, r2, #34 - 1885 018a A354 strb r3, [r4, r2] - 731:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1886 .loc 1 731 0 - 1887 018c 023A subs r2, r2, #2 - 1888 018e A354 strb r3, [r4, r2] - 733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1889 .loc 1 733 0 - 1890 0190 00E0 b .L136 - 1891 .LVL150: - 1892 .L147: - 737:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1893 .loc 1 737 0 - 1894 0192 0220 movs r0, #2 - 1895 .LVL151: - 1896 .L136: - 739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1897 .loc 1 739 0 - 1898 0194 05B0 add sp, sp, #20 - 1899 @ sp needed - 1900 .LVL152: - 1901 .LVL153: - 1902 0196 F0BD pop {r4, r5, r6, r7, pc} - 1903 .LVL154: - 1904 .L148: - 635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1905 .loc 1 635 0 - 1906 0198 0220 movs r0, #2 - 1907 .LVL155: - 1908 019a FBE7 b .L136 - 1909 .LVL156: - 1910 .L149: - 678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1911 .loc 1 678 0 - 1912 019c 0320 movs r0, #3 - 1913 019e F9E7 b .L136 - 1914 .L150: - 691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1915 .loc 1 691 0 - 1916 01a0 0320 movs r0, #3 - 1917 01a2 F7E7 b .L136 - 1918 .L151: - 717:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 1919 .loc 1 717 0 - 1920 01a4 0320 movs r0, #3 - 1921 01a6 F5E7 b .L136 - 1922 .L156: - 1923 .align 2 - 1924 .L155: - 1925 01a8 009800FC .word -67069952 - ARM GAS /tmp/ccpuPECZ.s page 124 - - - 1926 01ac 00200081 .word -2130698240 - 1927 01b0 00200082 .word -2113921024 - 1928 01b4 009C00FC .word -67068928 - 1929 01b8 00E800FE .word -33495040 - 1930 .cfi_endproc - 1931 .LFE43: - 1933 .section .text.HAL_I2C_Master_Receive,"ax",%progbits - 1934 .align 1 - 1935 .global HAL_I2C_Master_Receive - 1936 .syntax unified - 1937 .code 16 - 1938 .thumb_func - 1939 .fpu softvfp - 1941 HAL_I2C_Master_Receive: - 1942 .LFB44: - 753:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 1943 .loc 1 753 0 - 1944 .cfi_startproc - 1945 @ args = 4, pretend = 0, frame = 8 - 1946 @ frame_needed = 0, uses_anonymous_args = 0 - 1947 .LVL157: - 1948 0000 F0B5 push {r4, r5, r6, r7, lr} - 1949 .LCFI16: - 1950 .cfi_def_cfa_offset 20 - 1951 .cfi_offset 4, -20 - 1952 .cfi_offset 5, -16 - 1953 .cfi_offset 6, -12 - 1954 .cfi_offset 7, -8 - 1955 .cfi_offset 14, -4 - 1956 0002 85B0 sub sp, sp, #20 - 1957 .LCFI17: - 1958 .cfi_def_cfa_offset 40 - 1959 0004 0400 movs r4, r0 - 1960 0006 0D00 movs r5, r1 - 1961 0008 1700 movs r7, r2 - 1962 000a 0393 str r3, [sp, #12] - 1963 .LVL158: - 756:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1964 .loc 1 756 0 - 1965 000c 4123 movs r3, #65 - 1966 .LVL159: - 1967 000e C35C ldrb r3, [r0, r3] - 1968 0010 202B cmp r3, #32 - 1969 0012 00D0 beq .LCB2059 - 1970 0014 BDE0 b .L169 @long jump - 1971 .LCB2059: - 759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1972 .loc 1 759 0 - 1973 0016 2033 adds r3, r3, #32 - 1974 0018 C35C ldrb r3, [r0, r3] - 1975 001a 012B cmp r3, #1 - 1976 001c 00D1 bne .LCB2063 - 1977 001e BBE0 b .L170 @long jump - 1978 .LCB2063: - 759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1979 .loc 1 759 0 is_stmt 0 discriminator 2 - 1980 0020 4023 movs r3, #64 - ARM GAS /tmp/ccpuPECZ.s page 125 - - - 1981 0022 0122 movs r2, #1 - 1982 .LVL160: - 1983 0024 C254 strb r2, [r0, r3] - 762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 1984 .loc 1 762 0 is_stmt 1 discriminator 2 - 1985 0026 FFF7FEFF bl HAL_GetTick - 1986 .LVL161: - 1987 002a 0600 movs r6, r0 - 1988 .LVL162: - 1989 .L159: - 1990 .LBB174: - 1991 .LBB175: -4487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1992 .loc 1 4487 0 - 1993 002c 2368 ldr r3, [r4] - 1994 002e 9A69 ldr r2, [r3, #24] - 1995 0030 1204 lsls r2, r2, #16 - 1996 0032 0ED5 bpl .L174 -4492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 1997 .loc 1 4492 0 - 1998 0034 FFF7FEFF bl HAL_GetTick - 1999 .LVL163: - 2000 0038 801B subs r0, r0, r6 - 2001 003a 1928 cmp r0, #25 - 2002 003c F6D9 bls .L159 -4494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 2003 .loc 1 4494 0 - 2004 003e 4123 movs r3, #65 - 2005 0040 2022 movs r2, #32 - 2006 0042 E254 strb r2, [r4, r3] -4495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2007 .loc 1 4495 0 - 2008 0044 0023 movs r3, #0 - 2009 0046 2232 adds r2, r2, #34 - 2010 0048 A354 strb r3, [r4, r2] -4498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 2011 .loc 1 4498 0 - 2012 004a 023A subs r2, r2, #2 - 2013 004c A354 strb r3, [r4, r2] - 2014 .LVL164: - 2015 .LBE175: - 2016 .LBE174: - 766:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2017 .loc 1 766 0 - 2018 004e 0320 movs r0, #3 - 2019 0050 A0E0 b .L158 - 2020 .LVL165: - 2021 .L174: - 769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; - 2022 .loc 1 769 0 - 2023 0052 4122 movs r2, #65 - 2024 0054 2221 movs r1, #34 - 2025 0056 A154 strb r1, [r4, r2] - 770:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 2026 .loc 1 770 0 - 2027 0058 0132 adds r2, r2, #1 - 2028 005a 1239 subs r1, r1, #18 - ARM GAS /tmp/ccpuPECZ.s page 126 - - - 2029 005c A154 strb r1, [r4, r2] - 771:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2030 .loc 1 771 0 - 2031 005e 0022 movs r2, #0 - 2032 0060 6264 str r2, [r4, #68] - 774:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 2033 .loc 1 774 0 - 2034 0062 6762 str r7, [r4, #36] - 775:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; - 2035 .loc 1 775 0 - 2036 0064 6946 mov r1, sp - 2037 0066 8989 ldrh r1, [r1, #12] - 2038 0068 6185 strh r1, [r4, #42] - 776:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2039 .loc 1 776 0 - 2040 006a 6263 str r2, [r4, #52] - 780:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2041 .loc 1 780 0 - 2042 006c 628D ldrh r2, [r4, #42] - 2043 006e 92B2 uxth r2, r2 - 2044 0070 FF2A cmp r2, #255 - 2045 0072 0ED9 bls .L161 - 782:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ - 2046 .loc 1 782 0 - 2047 0074 FF22 movs r2, #255 - 2048 0076 2285 strh r2, [r4, #40] - 2049 .LVL166: - 2050 .LBB176: - 2051 .LBB177: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 2052 .loc 1 4713 0 - 2053 0078 5A68 ldr r2, [r3, #4] - 2054 007a 4B49 ldr r1, .L177 - 2055 007c 0A40 ands r2, r1 - 2056 007e A805 lsls r0, r5, #22 - 2057 0080 800D lsrs r0, r0, #22 - 2058 0082 FF21 movs r1, #255 - 2059 0084 0904 lsls r1, r1, #16 - 2060 0086 0843 orrs r0, r1 - 2061 0088 4849 ldr r1, .L177+4 - 2062 008a 0143 orrs r1, r0 - 2063 008c 0A43 orrs r2, r1 - 2064 008e 5A60 str r2, [r3, #4] - 2065 0090 26E0 b .L166 - 2066 .LVL167: - 2067 .L161: - 2068 .LBE177: - 2069 .LBE176: - 787:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_REA - 2070 .loc 1 787 0 - 2071 0092 628D ldrh r2, [r4, #42] - 2072 0094 92B2 uxth r2, r2 - 2073 0096 2285 strh r2, [r4, #40] - 788:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2074 .loc 1 788 0 - 2075 0098 D2B2 uxtb r2, r2 - 2076 .LVL168: - ARM GAS /tmp/ccpuPECZ.s page 127 - - - 2077 .LBB178: - 2078 .LBB179: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 2079 .loc 1 4713 0 - 2080 009a 5968 ldr r1, [r3, #4] - 2081 009c 4248 ldr r0, .L177 - 2082 009e 0140 ands r1, r0 - 2083 00a0 A805 lsls r0, r5, #22 - 2084 00a2 800D lsrs r0, r0, #22 - 2085 00a4 1204 lsls r2, r2, #16 - 2086 .LVL169: - 2087 00a6 0243 orrs r2, r0 - 2088 00a8 4148 ldr r0, .L177+8 - 2089 00aa 0243 orrs r2, r0 - 2090 00ac 0A43 orrs r2, r1 - 2091 00ae 5A60 str r2, [r3, #4] - 2092 .LVL170: - 2093 00b0 16E0 b .L166 - 2094 .LVL171: - 2095 .L176: - 2096 .LBE179: - 2097 .LBE178: - 796:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2098 .loc 1 796 0 - 2099 00b2 636C ldr r3, [r4, #68] - 2100 00b4 042B cmp r3, #4 - 2101 00b6 00D0 beq .LCB2221 - 2102 00b8 70E0 b .L171 @long jump - 2103 .LCB2221: - 798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2104 .loc 1 798 0 - 2105 00ba 0120 movs r0, #1 - 2106 00bc 6AE0 b .L158 - 2107 .L165: - 826:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - 2108 .loc 1 826 0 - 2109 00be 638D ldrh r3, [r4, #42] - 2110 00c0 9BB2 uxth r3, r3 - 2111 00c2 2385 strh r3, [r4, #40] - 827:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2112 .loc 1 827 0 - 2113 00c4 DBB2 uxtb r3, r3 - 2114 .LVL172: - 2115 .LBB180: - 2116 .LBB181: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 2117 .loc 1 4713 0 - 2118 00c6 2068 ldr r0, [r4] - 2119 00c8 4268 ldr r2, [r0, #4] - 2120 00ca 3A49 ldr r1, .L177+12 - 2121 00cc 0A40 ands r2, r1 - 2122 00ce A905 lsls r1, r5, #22 - 2123 00d0 890D lsrs r1, r1, #22 - 2124 00d2 1B04 lsls r3, r3, #16 - 2125 .LVL173: - 2126 00d4 0B43 orrs r3, r1 - 2127 00d6 8021 movs r1, #128 - ARM GAS /tmp/ccpuPECZ.s page 128 - - - 2128 00d8 8904 lsls r1, r1, #18 - 2129 00da 0B43 orrs r3, r1 - 2130 00dc 1343 orrs r3, r2 - 2131 00de 4360 str r3, [r0, #4] - 2132 .LVL174: - 2133 .L166: - 2134 .LBE181: - 2135 .LBE180: - 791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2136 .loc 1 791 0 - 2137 00e0 638D ldrh r3, [r4, #42] - 2138 00e2 9BB2 uxth r3, r3 - 2139 00e4 002B cmp r3, #0 - 2140 00e6 38D0 beq .L175 - 794:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2141 .loc 1 794 0 - 2142 00e8 3200 movs r2, r6 - 2143 00ea 0A99 ldr r1, [sp, #40] - 2144 00ec 2000 movs r0, r4 - 2145 00ee FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout - 2146 .LVL175: - 2147 00f2 0028 cmp r0, #0 - 2148 00f4 DDD1 bne .L176 - 807:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; - 2149 .loc 1 807 0 - 2150 00f6 2368 ldr r3, [r4] - 2151 00f8 5A6A ldr r2, [r3, #36] - 2152 00fa 636A ldr r3, [r4, #36] - 2153 00fc 591C adds r1, r3, #1 - 2154 00fe 6162 str r1, [r4, #36] - 2155 0100 1A70 strb r2, [r3] - 808:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 2156 .loc 1 808 0 - 2157 0102 238D ldrh r3, [r4, #40] - 2158 0104 013B subs r3, r3, #1 - 2159 0106 9BB2 uxth r3, r3 - 2160 0108 2385 strh r3, [r4, #40] - 809:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2161 .loc 1 809 0 - 2162 010a 628D ldrh r2, [r4, #42] - 2163 010c 013A subs r2, r2, #1 - 2164 010e 92B2 uxth r2, r2 - 2165 0110 6285 strh r2, [r4, #42] - 811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2166 .loc 1 811 0 - 2167 0112 002B cmp r3, #0 - 2168 0114 E4D1 bne .L166 - 811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2169 .loc 1 811 0 is_stmt 0 discriminator 1 - 2170 0116 638D ldrh r3, [r4, #42] - 2171 0118 9BB2 uxth r3, r3 - 2172 011a 002B cmp r3, #0 - 2173 011c E0D0 beq .L166 - 814:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2174 .loc 1 814 0 is_stmt 1 - 2175 011e 0096 str r6, [sp] - 2176 0120 0A9B ldr r3, [sp, #40] - ARM GAS /tmp/ccpuPECZ.s page 129 - - - 2177 0122 0022 movs r2, #0 - 2178 0124 8021 movs r1, #128 - 2179 0126 2000 movs r0, r4 - 2180 0128 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 2181 .LVL176: - 2182 012c 0028 cmp r0, #0 - 2183 012e 37D1 bne .L172 - 819:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2184 .loc 1 819 0 - 2185 0130 638D ldrh r3, [r4, #42] - 2186 0132 9BB2 uxth r3, r3 - 2187 0134 FF2B cmp r3, #255 - 2188 0136 C2D9 bls .L165 - 821:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - 2189 .loc 1 821 0 - 2190 0138 FF23 movs r3, #255 - 2191 013a 2385 strh r3, [r4, #40] - 2192 .LVL177: - 2193 .LBB182: - 2194 .LBB183: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 2195 .loc 1 4713 0 - 2196 013c 2068 ldr r0, [r4] - 2197 013e 4368 ldr r3, [r0, #4] - 2198 0140 1C4A ldr r2, .L177+12 - 2199 0142 1340 ands r3, r2 - 2200 0144 A905 lsls r1, r5, #22 - 2201 0146 890D lsrs r1, r1, #22 - 2202 0148 FF22 movs r2, #255 - 2203 014a 1204 lsls r2, r2, #16 - 2204 014c 1143 orrs r1, r2 - 2205 014e 8022 movs r2, #128 - 2206 0150 5204 lsls r2, r2, #17 - 2207 0152 0A43 orrs r2, r1 - 2208 0154 1343 orrs r3, r2 - 2209 0156 4360 str r3, [r0, #4] - 2210 0158 C2E7 b .L166 - 2211 .LVL178: - 2212 .L175: - 2213 .LBE183: - 2214 .LBE182: - 834:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2215 .loc 1 834 0 - 2216 015a 3200 movs r2, r6 - 2217 015c 0A99 ldr r1, [sp, #40] - 2218 015e 2000 movs r0, r4 - 2219 0160 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout - 2220 .LVL179: - 2221 0164 0028 cmp r0, #0 - 2222 0166 04D0 beq .L168 - 836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2223 .loc 1 836 0 - 2224 0168 636C ldr r3, [r4, #68] - 2225 016a 042B cmp r3, #4 - 2226 016c 1AD1 bne .L173 - 838:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2227 .loc 1 838 0 - ARM GAS /tmp/ccpuPECZ.s page 130 - - - 2228 016e 0120 movs r0, #1 - 2229 0170 10E0 b .L158 - 2230 .L168: - 847:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2231 .loc 1 847 0 - 2232 0172 2368 ldr r3, [r4] - 2233 0174 2022 movs r2, #32 - 2234 0176 DA61 str r2, [r3, #28] - 850:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2235 .loc 1 850 0 - 2236 0178 2168 ldr r1, [r4] - 2237 017a 4B68 ldr r3, [r1, #4] - 2238 017c 0E4D ldr r5, .L177+16 - 2239 017e 2B40 ands r3, r5 - 2240 0180 4B60 str r3, [r1, #4] - 852:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 2241 .loc 1 852 0 - 2242 0182 4123 movs r3, #65 - 2243 0184 E254 strb r2, [r4, r3] - 853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2244 .loc 1 853 0 - 2245 0186 0023 movs r3, #0 - 2246 0188 2232 adds r2, r2, #34 - 2247 018a A354 strb r3, [r4, r2] - 856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2248 .loc 1 856 0 - 2249 018c 023A subs r2, r2, #2 - 2250 018e A354 strb r3, [r4, r2] - 858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2251 .loc 1 858 0 - 2252 0190 00E0 b .L158 - 2253 .LVL180: - 2254 .L169: - 862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2255 .loc 1 862 0 - 2256 0192 0220 movs r0, #2 - 2257 .LVL181: - 2258 .L158: - 864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2259 .loc 1 864 0 - 2260 0194 05B0 add sp, sp, #20 - 2261 @ sp needed - 2262 .LVL182: - 2263 .LVL183: - 2264 0196 F0BD pop {r4, r5, r6, r7, pc} - 2265 .LVL184: - 2266 .L170: - 759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2267 .loc 1 759 0 - 2268 0198 0220 movs r0, #2 - 2269 .LVL185: - 2270 019a FBE7 b .L158 - 2271 .LVL186: - 2272 .L171: - 802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2273 .loc 1 802 0 - 2274 019c 0320 movs r0, #3 - ARM GAS /tmp/ccpuPECZ.s page 131 - - - 2275 019e F9E7 b .L158 - 2276 .L172: - 816:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2277 .loc 1 816 0 - 2278 01a0 0320 movs r0, #3 - 2279 01a2 F7E7 b .L158 - 2280 .L173: - 842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2281 .loc 1 842 0 - 2282 01a4 0320 movs r0, #3 - 2283 01a6 F5E7 b .L158 - 2284 .L178: - 2285 .align 2 - 2286 .L177: - 2287 01a8 009800FC .word -67069952 - 2288 01ac 00240081 .word -2130697216 - 2289 01b0 00240082 .word -2113920000 - 2290 01b4 009C00FC .word -67068928 - 2291 01b8 00E800FE .word -33495040 - 2292 .cfi_endproc - 2293 .LFE44: - 2295 .section .text.HAL_I2C_Slave_Transmit,"ax",%progbits - 2296 .align 1 - 2297 .global HAL_I2C_Slave_Transmit - 2298 .syntax unified - 2299 .code 16 - 2300 .thumb_func - 2301 .fpu softvfp - 2303 HAL_I2C_Slave_Transmit: - 2304 .LFB45: - 876:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 2305 .loc 1 876 0 - 2306 .cfi_startproc - 2307 @ args = 0, pretend = 0, frame = 8 - 2308 @ frame_needed = 0, uses_anonymous_args = 0 - 2309 .LVL187: - 2310 0000 F0B5 push {r4, r5, r6, r7, lr} - 2311 .LCFI18: - 2312 .cfi_def_cfa_offset 20 - 2313 .cfi_offset 4, -20 - 2314 .cfi_offset 5, -16 - 2315 .cfi_offset 6, -12 - 2316 .cfi_offset 7, -8 - 2317 .cfi_offset 14, -4 - 2318 0002 85B0 sub sp, sp, #20 - 2319 .LCFI19: - 2320 .cfi_def_cfa_offset 40 - 2321 0004 0400 movs r4, r0 - 2322 0006 0D00 movs r5, r1 - 2323 0008 1600 movs r6, r2 - 2324 000a 0393 str r3, [sp, #12] - 2325 .LVL188: - 879:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2326 .loc 1 879 0 - 2327 000c 4123 movs r3, #65 - 2328 .LVL189: - 2329 000e C35C ldrb r3, [r0, r3] - ARM GAS /tmp/ccpuPECZ.s page 132 - - - 2330 0010 202B cmp r3, #32 - 2331 0012 00D0 beq .LCB2483 - 2332 0014 B5E0 b .L189 @long jump - 2333 .LCB2483: - 881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2334 .loc 1 881 0 - 2335 0016 0029 cmp r1, #0 - 2336 0018 00D1 bne .LCB2485 - 2337 001a B5E0 b .L190 @long jump - 2338 .LCB2485: - 881:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2339 .loc 1 881 0 is_stmt 0 discriminator 1 - 2340 001c 002A cmp r2, #0 - 2341 001e 00D1 bne .LCB2487 - 2342 0020 B4E0 b .L191 @long jump - 2343 .LCB2487: - 886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2344 .loc 1 886 0 is_stmt 1 - 2345 0022 2033 adds r3, r3, #32 - 2346 0024 C35C ldrb r3, [r0, r3] - 2347 0026 012B cmp r3, #1 - 2348 0028 00D1 bne .LCB2491 - 2349 002a B1E0 b .L192 @long jump - 2350 .LCB2491: - 886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2351 .loc 1 886 0 is_stmt 0 discriminator 2 - 2352 002c 4023 movs r3, #64 - 2353 002e 0122 movs r2, #1 - 2354 .LVL190: - 2355 0030 C254 strb r2, [r0, r3] - 889:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2356 .loc 1 889 0 is_stmt 1 discriminator 2 - 2357 0032 FFF7FEFF bl HAL_GetTick - 2358 .LVL191: - 2359 0036 0700 movs r7, r0 - 2360 .LVL192: - 891:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; - 2361 .loc 1 891 0 discriminator 2 - 2362 0038 4123 movs r3, #65 - 2363 003a 2122 movs r2, #33 - 2364 003c E254 strb r2, [r4, r3] - 892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 2365 .loc 1 892 0 discriminator 2 - 2366 003e 0133 adds r3, r3, #1 - 2367 0040 013A subs r2, r2, #1 - 2368 0042 E254 strb r2, [r4, r3] - 893:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2369 .loc 1 893 0 discriminator 2 - 2370 0044 0023 movs r3, #0 - 2371 0046 6364 str r3, [r4, #68] - 896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 2372 .loc 1 896 0 discriminator 2 - 2373 0048 6562 str r5, [r4, #36] - 897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; - 2374 .loc 1 897 0 discriminator 2 - 2375 004a 6685 strh r6, [r4, #42] - 898:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 133 - - - 2376 .loc 1 898 0 discriminator 2 - 2377 004c 6363 str r3, [r4, #52] - 901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2378 .loc 1 901 0 discriminator 2 - 2379 004e 2268 ldr r2, [r4] - 2380 0050 5368 ldr r3, [r2, #4] - 2381 0052 5249 ldr r1, .L202 - 2382 0054 0B40 ands r3, r1 - 2383 0056 5360 str r3, [r2, #4] - 904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2384 .loc 1 904 0 discriminator 2 - 2385 0058 0090 str r0, [sp] - 2386 005a 039B ldr r3, [sp, #12] - 2387 005c 0022 movs r2, #0 - 2388 005e 0821 movs r1, #8 - 2389 0060 2000 movs r0, r4 - 2390 .LVL193: - 2391 0062 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 2392 .LVL194: - 2393 0066 0028 cmp r0, #0 - 2394 0068 25D1 bne .L195 - 912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2395 .loc 1 912 0 - 2396 006a 2368 ldr r3, [r4] - 2397 006c 0822 movs r2, #8 - 2398 006e DA61 str r2, [r3, #28] - 915:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2399 .loc 1 915 0 - 2400 0070 E368 ldr r3, [r4, #12] - 2401 0072 022B cmp r3, #2 - 2402 0074 27D0 beq .L196 - 2403 .L182: - 930:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2404 .loc 1 930 0 - 2405 0076 8021 movs r1, #128 - 2406 0078 0097 str r7, [sp] - 2407 007a 039B ldr r3, [sp, #12] - 2408 007c 0022 movs r2, #0 - 2409 007e 4902 lsls r1, r1, #9 - 2410 0080 2000 movs r0, r4 - 2411 0082 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 2412 .LVL195: - 2413 0086 0028 cmp r0, #0 - 2414 0088 32D1 bne .L197 - 2415 .L184: - 937:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2416 .loc 1 937 0 - 2417 008a 638D ldrh r3, [r4, #42] - 2418 008c 9BB2 uxth r3, r3 - 2419 008e 002B cmp r3, #0 - 2420 0090 41D0 beq .L198 - 940:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2421 .loc 1 940 0 - 2422 0092 3A00 movs r2, r7 - 2423 0094 0399 ldr r1, [sp, #12] - 2424 0096 2000 movs r0, r4 - 2425 0098 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout - ARM GAS /tmp/ccpuPECZ.s page 134 - - - 2426 .LVL196: - 2427 009c 0028 cmp r0, #0 - 2428 009e 2FD1 bne .L199 - 956:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 2429 .loc 1 956 0 - 2430 00a0 636A ldr r3, [r4, #36] - 2431 00a2 5A1C adds r2, r3, #1 - 2432 00a4 6262 str r2, [r4, #36] - 2433 00a6 2268 ldr r2, [r4] - 2434 00a8 1B78 ldrb r3, [r3] - 2435 00aa 9362 str r3, [r2, #40] - 957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2436 .loc 1 957 0 - 2437 00ac 638D ldrh r3, [r4, #42] - 2438 00ae 013B subs r3, r3, #1 - 2439 00b0 9BB2 uxth r3, r3 - 2440 00b2 6385 strh r3, [r4, #42] - 2441 00b4 E9E7 b .L184 - 2442 .L195: - 907:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 2443 .loc 1 907 0 - 2444 00b6 2268 ldr r2, [r4] - 2445 00b8 5168 ldr r1, [r2, #4] - 2446 00ba 8023 movs r3, #128 - 2447 00bc 1B02 lsls r3, r3, #8 - 2448 00be 0B43 orrs r3, r1 - 2449 00c0 5360 str r3, [r2, #4] - 908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2450 .loc 1 908 0 - 2451 00c2 0320 movs r0, #3 - 2452 00c4 5EE0 b .L180 - 2453 .L196: - 918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2454 .loc 1 918 0 - 2455 00c6 0097 str r7, [sp] - 2456 00c8 039B ldr r3, [sp, #12] - 2457 00ca 0022 movs r2, #0 - 2458 00cc 0821 movs r1, #8 - 2459 00ce 2000 movs r0, r4 - 2460 00d0 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 2461 .LVL197: - 2462 00d4 0028 cmp r0, #0 - 2463 00d6 03D1 bne .L200 - 926:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2464 .loc 1 926 0 - 2465 00d8 2368 ldr r3, [r4] - 2466 00da 0822 movs r2, #8 - 2467 00dc DA61 str r2, [r3, #28] - 2468 00de CAE7 b .L182 - 2469 .L200: - 921:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 2470 .loc 1 921 0 - 2471 00e0 2268 ldr r2, [r4] - 2472 00e2 5168 ldr r1, [r2, #4] - 2473 00e4 8023 movs r3, #128 - 2474 00e6 1B02 lsls r3, r3, #8 - 2475 00e8 0B43 orrs r3, r1 - ARM GAS /tmp/ccpuPECZ.s page 135 - - - 2476 00ea 5360 str r3, [r2, #4] - 922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2477 .loc 1 922 0 - 2478 00ec 0320 movs r0, #3 - 2479 00ee 49E0 b .L180 - 2480 .L197: - 933:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 2481 .loc 1 933 0 - 2482 00f0 2268 ldr r2, [r4] - 2483 00f2 5168 ldr r1, [r2, #4] - 2484 00f4 8023 movs r3, #128 - 2485 00f6 1B02 lsls r3, r3, #8 - 2486 00f8 0B43 orrs r3, r1 - 2487 00fa 5360 str r3, [r2, #4] - 934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2488 .loc 1 934 0 - 2489 00fc 0320 movs r0, #3 - 2490 00fe 41E0 b .L180 - 2491 .L199: - 943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2492 .loc 1 943 0 - 2493 0100 2268 ldr r2, [r4] - 2494 0102 5168 ldr r1, [r2, #4] - 2495 0104 8023 movs r3, #128 - 2496 0106 1B02 lsls r3, r3, #8 - 2497 0108 0B43 orrs r3, r1 - 2498 010a 5360 str r3, [r2, #4] - 945:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2499 .loc 1 945 0 - 2500 010c 636C ldr r3, [r4, #68] - 2501 010e 042B cmp r3, #4 - 2502 0110 40D1 bne .L193 - 947:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2503 .loc 1 947 0 - 2504 0112 0120 movs r0, #1 - 2505 0114 36E0 b .L180 - 2506 .L198: - 961:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2507 .loc 1 961 0 - 2508 0116 3A00 movs r2, r7 - 2509 0118 0399 ldr r1, [sp, #12] - 2510 011a 2000 movs r0, r4 - 2511 011c FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout - 2512 .LVL198: - 2513 0120 0028 cmp r0, #0 - 2514 0122 0AD0 beq .L187 - 964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2515 .loc 1 964 0 - 2516 0124 2268 ldr r2, [r4] - 2517 0126 5168 ldr r1, [r2, #4] - 2518 0128 8023 movs r3, #128 - 2519 012a 1B02 lsls r3, r3, #8 - 2520 012c 0B43 orrs r3, r1 - 2521 012e 5360 str r3, [r2, #4] - 966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2522 .loc 1 966 0 - 2523 0130 636C ldr r3, [r4, #68] - ARM GAS /tmp/ccpuPECZ.s page 136 - - - 2524 0132 042B cmp r3, #4 - 2525 0134 30D1 bne .L194 - 970:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2526 .loc 1 970 0 - 2527 0136 0023 movs r3, #0 - 2528 0138 6364 str r3, [r4, #68] - 2529 .L187: - 979:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2530 .loc 1 979 0 - 2531 013a 2368 ldr r3, [r4] - 2532 013c 2022 movs r2, #32 - 2533 013e DA61 str r2, [r3, #28] - 982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2534 .loc 1 982 0 - 2535 0140 8021 movs r1, #128 - 2536 0142 0097 str r7, [sp] - 2537 0144 039B ldr r3, [sp, #12] - 2538 0146 1F3A subs r2, r2, #31 - 2539 0148 0902 lsls r1, r1, #8 - 2540 014a 2000 movs r0, r4 - 2541 014c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 2542 .LVL199: - 2543 0150 0028 cmp r0, #0 - 2544 0152 0ED1 bne .L201 - 990:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2545 .loc 1 990 0 - 2546 0154 2268 ldr r2, [r4] - 2547 0156 5168 ldr r1, [r2, #4] - 2548 0158 8023 movs r3, #128 - 2549 015a 1B02 lsls r3, r3, #8 - 2550 015c 0B43 orrs r3, r1 - 2551 015e 5360 str r3, [r2, #4] - 992:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 2552 .loc 1 992 0 - 2553 0160 4123 movs r3, #65 - 2554 0162 2022 movs r2, #32 - 2555 0164 E254 strb r2, [r4, r3] - 993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2556 .loc 1 993 0 - 2557 0166 0023 movs r3, #0 - 2558 0168 2232 adds r2, r2, #34 - 2559 016a A354 strb r3, [r4, r2] - 996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2560 .loc 1 996 0 - 2561 016c 023A subs r2, r2, #2 - 2562 016e A354 strb r3, [r4, r2] - 998:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2563 .loc 1 998 0 - 2564 0170 08E0 b .L180 - 2565 .L201: - 985:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 2566 .loc 1 985 0 - 2567 0172 2268 ldr r2, [r4] - 2568 0174 5168 ldr r1, [r2, #4] - 2569 0176 8023 movs r3, #128 - 2570 0178 1B02 lsls r3, r3, #8 - 2571 017a 0B43 orrs r3, r1 - ARM GAS /tmp/ccpuPECZ.s page 137 - - - 2572 017c 5360 str r3, [r2, #4] - 986:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2573 .loc 1 986 0 - 2574 017e 0320 movs r0, #3 - 2575 0180 00E0 b .L180 - 2576 .LVL200: - 2577 .L189: -1002:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2578 .loc 1 1002 0 - 2579 0182 0220 movs r0, #2 - 2580 .LVL201: - 2581 .L180: -1004:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2582 .loc 1 1004 0 - 2583 0184 05B0 add sp, sp, #20 - 2584 @ sp needed - 2585 .LVL202: - 2586 .LVL203: - 2587 0186 F0BD pop {r4, r5, r6, r7, pc} - 2588 .LVL204: - 2589 .L190: - 883:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2590 .loc 1 883 0 - 2591 0188 0120 movs r0, #1 - 2592 .LVL205: - 2593 018a FBE7 b .L180 - 2594 .LVL206: - 2595 .L191: - 2596 018c 0120 movs r0, #1 - 2597 .LVL207: - 2598 018e F9E7 b .L180 - 2599 .LVL208: - 2600 .L192: - 886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2601 .loc 1 886 0 - 2602 0190 0220 movs r0, #2 - 2603 .LVL209: - 2604 0192 F7E7 b .L180 - 2605 .LVL210: - 2606 .L193: - 951:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2607 .loc 1 951 0 - 2608 0194 0320 movs r0, #3 - 2609 0196 F5E7 b .L180 - 2610 .L194: - 974:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2611 .loc 1 974 0 - 2612 0198 0320 movs r0, #3 - 2613 019a F3E7 b .L180 - 2614 .L203: - 2615 .align 2 - 2616 .L202: - 2617 019c FF7FFFFF .word -32769 - 2618 .cfi_endproc - 2619 .LFE45: - 2621 .section .text.HAL_I2C_Slave_Receive,"ax",%progbits - 2622 .align 1 - ARM GAS /tmp/ccpuPECZ.s page 138 - - - 2623 .global HAL_I2C_Slave_Receive - 2624 .syntax unified - 2625 .code 16 - 2626 .thumb_func - 2627 .fpu softvfp - 2629 HAL_I2C_Slave_Receive: - 2630 .LFB46: -1016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 2631 .loc 1 1016 0 - 2632 .cfi_startproc - 2633 @ args = 0, pretend = 0, frame = 8 - 2634 @ frame_needed = 0, uses_anonymous_args = 0 - 2635 .LVL211: - 2636 0000 F0B5 push {r4, r5, r6, r7, lr} - 2637 .LCFI20: - 2638 .cfi_def_cfa_offset 20 - 2639 .cfi_offset 4, -20 - 2640 .cfi_offset 5, -16 - 2641 .cfi_offset 6, -12 - 2642 .cfi_offset 7, -8 - 2643 .cfi_offset 14, -4 - 2644 0002 85B0 sub sp, sp, #20 - 2645 .LCFI21: - 2646 .cfi_def_cfa_offset 40 - 2647 0004 0500 movs r5, r0 - 2648 0006 0C00 movs r4, r1 - 2649 0008 1600 movs r6, r2 - 2650 000a 0393 str r3, [sp, #12] - 2651 .LVL212: -1019:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2652 .loc 1 1019 0 - 2653 000c 4123 movs r3, #65 - 2654 .LVL213: - 2655 000e C35C ldrb r3, [r0, r3] - 2656 0010 202B cmp r3, #32 - 2657 0012 00D0 beq .LCB2808 - 2658 0014 ACE0 b .L213 @long jump - 2659 .LCB2808: -1021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2660 .loc 1 1021 0 - 2661 0016 0029 cmp r1, #0 - 2662 0018 00D1 bne .LCB2810 - 2663 001a ACE0 b .L214 @long jump - 2664 .LCB2810: -1021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2665 .loc 1 1021 0 is_stmt 0 discriminator 1 - 2666 001c 002A cmp r2, #0 - 2667 001e 00D1 bne .LCB2812 - 2668 0020 ABE0 b .L215 @long jump - 2669 .LCB2812: -1026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2670 .loc 1 1026 0 is_stmt 1 - 2671 0022 2033 adds r3, r3, #32 - 2672 0024 C35C ldrb r3, [r0, r3] - 2673 0026 012B cmp r3, #1 - 2674 0028 00D1 bne .LCB2816 - 2675 002a A8E0 b .L216 @long jump - ARM GAS /tmp/ccpuPECZ.s page 139 - - - 2676 .LCB2816: -1026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2677 .loc 1 1026 0 is_stmt 0 discriminator 2 - 2678 002c 4023 movs r3, #64 - 2679 002e 0122 movs r2, #1 - 2680 .LVL214: - 2681 0030 C254 strb r2, [r0, r3] -1029:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2682 .loc 1 1029 0 is_stmt 1 discriminator 2 - 2683 0032 FFF7FEFF bl HAL_GetTick - 2684 .LVL215: - 2685 0036 0700 movs r7, r0 - 2686 .LVL216: -1031:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; - 2687 .loc 1 1031 0 discriminator 2 - 2688 0038 4123 movs r3, #65 - 2689 003a 2222 movs r2, #34 - 2690 003c EA54 strb r2, [r5, r3] -1032:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 2691 .loc 1 1032 0 discriminator 2 - 2692 003e 0133 adds r3, r3, #1 - 2693 0040 023A subs r2, r2, #2 - 2694 0042 EA54 strb r2, [r5, r3] -1033:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2695 .loc 1 1033 0 discriminator 2 - 2696 0044 0023 movs r3, #0 - 2697 0046 6B64 str r3, [r5, #68] -1036:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 2698 .loc 1 1036 0 discriminator 2 - 2699 0048 6C62 str r4, [r5, #36] -1037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; - 2700 .loc 1 1037 0 discriminator 2 - 2701 004a 6E85 strh r6, [r5, #42] -1038:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2702 .loc 1 1038 0 discriminator 2 - 2703 004c 6B63 str r3, [r5, #52] -1041:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2704 .loc 1 1041 0 discriminator 2 - 2705 004e 2A68 ldr r2, [r5] - 2706 0050 5368 ldr r3, [r2, #4] - 2707 0052 4D49 ldr r1, .L225 - 2708 0054 0B40 ands r3, r1 - 2709 0056 5360 str r3, [r2, #4] -1044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2710 .loc 1 1044 0 discriminator 2 - 2711 0058 0090 str r0, [sp] - 2712 005a 039B ldr r3, [sp, #12] - 2713 005c 0022 movs r2, #0 - 2714 005e 0821 movs r1, #8 - 2715 0060 2800 movs r0, r5 - 2716 .LVL217: - 2717 0062 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 2718 .LVL218: - 2719 0066 0028 cmp r0, #0 - 2720 0068 22D1 bne .L219 -1052:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2721 .loc 1 1052 0 - ARM GAS /tmp/ccpuPECZ.s page 140 - - - 2722 006a 2B68 ldr r3, [r5] - 2723 006c 0822 movs r2, #8 - 2724 006e DA61 str r2, [r3, #28] -1055:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2725 .loc 1 1055 0 - 2726 0070 8021 movs r1, #128 - 2727 0072 0097 str r7, [sp] - 2728 0074 039B ldr r3, [sp, #12] - 2729 0076 073A subs r2, r2, #7 - 2730 0078 4902 lsls r1, r1, #9 - 2731 007a 2800 movs r0, r5 - 2732 007c FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 2733 .LVL219: - 2734 0080 0028 cmp r0, #0 - 2735 0082 1DD1 bne .L220 - 2736 .L207: -1062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2737 .loc 1 1062 0 - 2738 0084 6B8D ldrh r3, [r5, #42] - 2739 0086 9BB2 uxth r3, r3 - 2740 0088 002B cmp r3, #0 - 2741 008a 3BD0 beq .L221 -1065:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2742 .loc 1 1065 0 - 2743 008c 3A00 movs r2, r7 - 2744 008e 0399 ldr r1, [sp, #12] - 2745 0090 2800 movs r0, r5 - 2746 0092 FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout - 2747 .LVL220: - 2748 0096 0028 cmp r0, #0 - 2749 0098 1AD1 bne .L222 -1089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 2750 .loc 1 1089 0 - 2751 009a 2B68 ldr r3, [r5] - 2752 009c 5A6A ldr r2, [r3, #36] - 2753 009e 6B6A ldr r3, [r5, #36] - 2754 00a0 591C adds r1, r3, #1 - 2755 00a2 6962 str r1, [r5, #36] - 2756 00a4 1A70 strb r2, [r3] -1090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2757 .loc 1 1090 0 - 2758 00a6 6B8D ldrh r3, [r5, #42] - 2759 00a8 013B subs r3, r3, #1 - 2760 00aa 9BB2 uxth r3, r3 - 2761 00ac 6B85 strh r3, [r5, #42] - 2762 00ae E9E7 b .L207 - 2763 .L219: -1047:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 2764 .loc 1 1047 0 - 2765 00b0 2A68 ldr r2, [r5] - 2766 00b2 5168 ldr r1, [r2, #4] - 2767 00b4 8023 movs r3, #128 - 2768 00b6 1B02 lsls r3, r3, #8 - 2769 00b8 0B43 orrs r3, r1 - 2770 00ba 5360 str r3, [r2, #4] -1048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2771 .loc 1 1048 0 - ARM GAS /tmp/ccpuPECZ.s page 141 - - - 2772 00bc 0320 movs r0, #3 - 2773 00be 58E0 b .L205 - 2774 .L220: -1058:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 2775 .loc 1 1058 0 - 2776 00c0 2A68 ldr r2, [r5] - 2777 00c2 5168 ldr r1, [r2, #4] - 2778 00c4 8023 movs r3, #128 - 2779 00c6 1B02 lsls r3, r3, #8 - 2780 00c8 0B43 orrs r3, r1 - 2781 00ca 5360 str r3, [r2, #4] -1059:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2782 .loc 1 1059 0 - 2783 00cc 0320 movs r0, #3 - 2784 00ce 50E0 b .L205 - 2785 .L222: -1068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2786 .loc 1 1068 0 - 2787 00d0 2A68 ldr r2, [r5] - 2788 00d2 5168 ldr r1, [r2, #4] - 2789 00d4 8023 movs r3, #128 - 2790 00d6 1B02 lsls r3, r3, #8 - 2791 00d8 0B43 orrs r3, r1 - 2792 00da 5360 str r3, [r2, #4] -1071:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2793 .loc 1 1071 0 - 2794 00dc 2B68 ldr r3, [r5] - 2795 00de 9A69 ldr r2, [r3, #24] - 2796 00e0 5207 lsls r2, r2, #29 - 2797 00e2 08D5 bpl .L209 -1074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 2798 .loc 1 1074 0 - 2799 00e4 5A6A ldr r2, [r3, #36] - 2800 00e6 6B6A ldr r3, [r5, #36] - 2801 00e8 591C adds r1, r3, #1 - 2802 00ea 6962 str r1, [r5, #36] - 2803 00ec 1A70 strb r2, [r3] -1075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2804 .loc 1 1075 0 - 2805 00ee 6B8D ldrh r3, [r5, #42] - 2806 00f0 013B subs r3, r3, #1 - 2807 00f2 9BB2 uxth r3, r3 - 2808 00f4 6B85 strh r3, [r5, #42] - 2809 .L209: -1078:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2810 .loc 1 1078 0 - 2811 00f6 6B6C ldr r3, [r5, #68] - 2812 00f8 202B cmp r3, #32 - 2813 00fa 01D0 beq .L223 -1084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2814 .loc 1 1084 0 - 2815 00fc 0120 movs r0, #1 - 2816 00fe 38E0 b .L205 - 2817 .L223: -1080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2818 .loc 1 1080 0 - 2819 0100 0320 movs r0, #3 - ARM GAS /tmp/ccpuPECZ.s page 142 - - - 2820 0102 36E0 b .L205 - 2821 .L221: -1094:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2822 .loc 1 1094 0 - 2823 0104 3A00 movs r2, r7 - 2824 0106 0399 ldr r1, [sp, #12] - 2825 0108 2800 movs r0, r5 - 2826 010a FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout - 2827 .LVL221: - 2828 010e 0028 cmp r0, #0 - 2829 0110 0AD0 beq .L211 -1097:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2830 .loc 1 1097 0 - 2831 0112 2A68 ldr r2, [r5] - 2832 0114 5168 ldr r1, [r2, #4] - 2833 0116 8023 movs r3, #128 - 2834 0118 1B02 lsls r3, r3, #8 - 2835 011a 0B43 orrs r3, r1 - 2836 011c 5360 str r3, [r2, #4] -1099:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2837 .loc 1 1099 0 - 2838 011e 6B6C ldr r3, [r5, #68] - 2839 0120 042B cmp r3, #4 - 2840 0122 2ED1 bne .L218 -1101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2841 .loc 1 1101 0 - 2842 0124 0120 movs r0, #1 - 2843 0126 24E0 b .L205 - 2844 .L211: -1110:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2845 .loc 1 1110 0 - 2846 0128 2B68 ldr r3, [r5] - 2847 012a 2022 movs r2, #32 - 2848 012c DA61 str r2, [r3, #28] -1113:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2849 .loc 1 1113 0 - 2850 012e 8021 movs r1, #128 - 2851 0130 0097 str r7, [sp] - 2852 0132 039B ldr r3, [sp, #12] - 2853 0134 1F3A subs r2, r2, #31 - 2854 0136 0902 lsls r1, r1, #8 - 2855 0138 2800 movs r0, r5 - 2856 013a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 2857 .LVL222: - 2858 013e 0028 cmp r0, #0 - 2859 0140 0ED1 bne .L224 -1121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2860 .loc 1 1121 0 - 2861 0142 2A68 ldr r2, [r5] - 2862 0144 5168 ldr r1, [r2, #4] - 2863 0146 8023 movs r3, #128 - 2864 0148 1B02 lsls r3, r3, #8 - 2865 014a 0B43 orrs r3, r1 - 2866 014c 5360 str r3, [r2, #4] -1123:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 2867 .loc 1 1123 0 - 2868 014e 4123 movs r3, #65 - ARM GAS /tmp/ccpuPECZ.s page 143 - - - 2869 0150 2022 movs r2, #32 - 2870 0152 EA54 strb r2, [r5, r3] -1124:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2871 .loc 1 1124 0 - 2872 0154 0023 movs r3, #0 - 2873 0156 2232 adds r2, r2, #34 - 2874 0158 AB54 strb r3, [r5, r2] -1127:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2875 .loc 1 1127 0 - 2876 015a 023A subs r2, r2, #2 - 2877 015c AB54 strb r3, [r5, r2] -1129:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2878 .loc 1 1129 0 - 2879 015e 08E0 b .L205 - 2880 .L224: -1116:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 2881 .loc 1 1116 0 - 2882 0160 2A68 ldr r2, [r5] - 2883 0162 5168 ldr r1, [r2, #4] - 2884 0164 8023 movs r3, #128 - 2885 0166 1B02 lsls r3, r3, #8 - 2886 0168 0B43 orrs r3, r1 - 2887 016a 5360 str r3, [r2, #4] -1117:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2888 .loc 1 1117 0 - 2889 016c 0320 movs r0, #3 - 2890 016e 00E0 b .L205 - 2891 .LVL223: - 2892 .L213: -1133:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2893 .loc 1 1133 0 - 2894 0170 0220 movs r0, #2 - 2895 .LVL224: - 2896 .L205: -1135:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2897 .loc 1 1135 0 - 2898 0172 05B0 add sp, sp, #20 - 2899 @ sp needed - 2900 .LVL225: - 2901 .LVL226: - 2902 0174 F0BD pop {r4, r5, r6, r7, pc} - 2903 .LVL227: - 2904 .L214: -1023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2905 .loc 1 1023 0 - 2906 0176 0120 movs r0, #1 - 2907 .LVL228: - 2908 0178 FBE7 b .L205 - 2909 .LVL229: - 2910 .L215: - 2911 017a 0120 movs r0, #1 - 2912 .LVL230: - 2913 017c F9E7 b .L205 - 2914 .LVL231: - 2915 .L216: -1026:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2916 .loc 1 1026 0 - ARM GAS /tmp/ccpuPECZ.s page 144 - - - 2917 017e 0220 movs r0, #2 - 2918 .LVL232: - 2919 0180 F7E7 b .L205 - 2920 .LVL233: - 2921 .L218: -1105:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 2922 .loc 1 1105 0 - 2923 0182 0320 movs r0, #3 - 2924 0184 F5E7 b .L205 - 2925 .L226: - 2926 0186 C046 .align 2 - 2927 .L225: - 2928 0188 FF7FFFFF .word -32769 - 2929 .cfi_endproc - 2930 .LFE46: - 2932 .section .text.HAL_I2C_Master_Transmit_IT,"ax",%progbits - 2933 .align 1 - 2934 .global HAL_I2C_Master_Transmit_IT - 2935 .syntax unified - 2936 .code 16 - 2937 .thumb_func - 2938 .fpu softvfp - 2940 HAL_I2C_Master_Transmit_IT: - 2941 .LFB47: -1148:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; - 2942 .loc 1 1148 0 - 2943 .cfi_startproc - 2944 @ args = 0, pretend = 0, frame = 0 - 2945 @ frame_needed = 0, uses_anonymous_args = 0 - 2946 .LVL234: - 2947 0000 70B5 push {r4, r5, r6, lr} - 2948 .LCFI22: - 2949 .cfi_def_cfa_offset 16 - 2950 .cfi_offset 4, -16 - 2951 .cfi_offset 5, -12 - 2952 .cfi_offset 6, -8 - 2953 .cfi_offset 14, -4 - 2954 .LVL235: -1151:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2955 .loc 1 1151 0 - 2956 0002 4124 movs r4, #65 - 2957 0004 045D ldrb r4, [r0, r4] - 2958 0006 202C cmp r4, #32 - 2959 0008 48D1 bne .L232 -1153:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2960 .loc 1 1153 0 - 2961 000a 0468 ldr r4, [r0] - 2962 000c A569 ldr r5, [r4, #24] - 2963 000e 2D04 lsls r5, r5, #16 - 2964 0010 46D4 bmi .L233 -1159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2965 .loc 1 1159 0 - 2966 0012 4025 movs r5, #64 - 2967 0014 455D ldrb r5, [r0, r5] - 2968 0016 012D cmp r5, #1 - 2969 0018 44D0 beq .L234 -1159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 145 - - - 2970 .loc 1 1159 0 is_stmt 0 discriminator 2 - 2971 001a 4025 movs r5, #64 - 2972 001c 0126 movs r6, #1 - 2973 001e 4655 strb r6, [r0, r5] -1161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; - 2974 .loc 1 1161 0 is_stmt 1 discriminator 2 - 2975 0020 0135 adds r5, r5, #1 - 2976 0022 2036 adds r6, r6, #32 - 2977 0024 4655 strb r6, [r0, r5] -1162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 2978 .loc 1 1162 0 discriminator 2 - 2979 0026 0135 adds r5, r5, #1 - 2980 0028 113E subs r6, r6, #17 - 2981 002a 4655 strb r6, [r0, r5] -1163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2982 .loc 1 1163 0 discriminator 2 - 2983 002c 0025 movs r5, #0 - 2984 002e 4564 str r5, [r0, #68] -1166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 2985 .loc 1 1166 0 discriminator 2 - 2986 0030 4262 str r2, [r0, #36] -1167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 2987 .loc 1 1167 0 discriminator 2 - 2988 0032 4385 strh r3, [r0, #42] -1168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; - 2989 .loc 1 1168 0 discriminator 2 - 2990 0034 1C4B ldr r3, .L238 - 2991 .LVL236: - 2992 0036 C362 str r3, [r0, #44] - 2993 .LVL237: -1169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 2994 .loc 1 1169 0 discriminator 2 - 2995 0038 1C4B ldr r3, .L238+4 - 2996 003a 4363 str r3, [r0, #52] -1171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 2997 .loc 1 1171 0 discriminator 2 - 2998 003c 438D ldrh r3, [r0, #42] - 2999 003e 9BB2 uxth r3, r3 - 3000 0040 FF2B cmp r3, #255 - 3001 0042 22D9 bls .L229 -1173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; - 3002 .loc 1 1173 0 - 3003 0044 FF23 movs r3, #255 - 3004 0046 0385 strh r3, [r0, #40] - 3005 .LVL238: -1174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3006 .loc 1 1174 0 - 3007 0048 8025 movs r5, #128 - 3008 004a 6D04 lsls r5, r5, #17 - 3009 .LVL239: - 3010 .L230: -1184:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3011 .loc 1 1184 0 - 3012 004c 028D ldrh r2, [r0, #40] - 3013 .LVL240: - 3014 004e D2B2 uxtb r2, r2 - 3015 .LVL241: - ARM GAS /tmp/ccpuPECZ.s page 146 - - - 3016 .LBB184: - 3017 .LBB185: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 3018 .loc 1 4713 0 - 3019 0050 6368 ldr r3, [r4, #4] - 3020 0052 174E ldr r6, .L238+8 - 3021 0054 3340 ands r3, r6 - 3022 0056 8905 lsls r1, r1, #22 - 3023 .LVL242: - 3024 0058 890D lsrs r1, r1, #22 - 3025 005a 1204 lsls r2, r2, #16 - 3026 .LVL243: - 3027 005c 1143 orrs r1, r2 - 3028 005e 0D43 orrs r5, r1 - 3029 .LVL244: - 3030 0060 1449 ldr r1, .L238+12 - 3031 0062 2943 orrs r1, r5 - 3032 0064 1943 orrs r1, r3 - 3033 0066 6160 str r1, [r4, #4] - 3034 .LVL245: - 3035 .LBE185: - 3036 .LBE184: -1187:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3037 .loc 1 1187 0 - 3038 0068 4023 movs r3, #64 - 3039 006a 0022 movs r2, #0 - 3040 006c C254 strb r2, [r0, r3] - 3041 .LVL246: - 3042 .LBB186: - 3043 .LBB187: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 3044 .loc 1 4728 0 - 3045 006e 436B ldr r3, [r0, #52] - 3046 0070 114A ldr r2, .L238+16 - 3047 0072 9342 cmp r3, r2 - 3048 0074 10D0 beq .L235 - 3049 0076 114A ldr r2, .L238+20 - 3050 0078 9342 cmp r3, r2 - 3051 007a 0BD0 beq .L237 - 3052 007c F221 movs r1, #242 - 3053 .L231: - 3054 .LVL247: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3055 .loc 1 4785 0 - 3056 007e 0268 ldr r2, [r0] - 3057 0080 1368 ldr r3, [r2] - 3058 0082 0B43 orrs r3, r1 - 3059 0084 1360 str r3, [r2] - 3060 .LVL248: - 3061 .LBE187: - 3062 .LBE186: -1198:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3063 .loc 1 1198 0 - 3064 0086 0020 movs r0, #0 - 3065 .LVL249: - 3066 0088 09E0 b .L228 - 3067 .LVL250: - ARM GAS /tmp/ccpuPECZ.s page 147 - - - 3068 .L229: -1178:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; - 3069 .loc 1 1178 0 - 3070 008a 438D ldrh r3, [r0, #42] - 3071 008c 0385 strh r3, [r0, #40] - 3072 .LVL251: -1179:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3073 .loc 1 1179 0 - 3074 008e 8025 movs r5, #128 - 3075 0090 AD04 lsls r5, r5, #18 - 3076 0092 DBE7 b .L230 - 3077 .LVL252: - 3078 .L237: - 3079 .LBB189: - 3080 .LBB188: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 3081 .loc 1 4728 0 - 3082 0094 0021 movs r1, #0 - 3083 0096 F2E7 b .L231 - 3084 .L235: - 3085 0098 0021 movs r1, #0 - 3086 009a F0E7 b .L231 - 3087 .LVL253: - 3088 .L232: - 3089 .LBE188: - 3090 .LBE189: -1202:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3091 .loc 1 1202 0 - 3092 009c 0220 movs r0, #2 - 3093 .LVL254: - 3094 .L228: -1204:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3095 .loc 1 1204 0 - 3096 @ sp needed - 3097 009e 70BD pop {r4, r5, r6, pc} - 3098 .LVL255: - 3099 .L233: -1155:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3100 .loc 1 1155 0 - 3101 00a0 0220 movs r0, #2 - 3102 .LVL256: - 3103 00a2 FCE7 b .L228 - 3104 .LVL257: - 3105 .L234: -1159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3106 .loc 1 1159 0 - 3107 00a4 0220 movs r0, #2 - 3108 .LVL258: - 3109 00a6 FAE7 b .L228 - 3110 .L239: - 3111 .align 2 - 3112 .L238: - 3113 00a8 0000FFFF .word -65536 - 3114 00ac 00000000 .word I2C_Master_ISR_IT - 3115 00b0 009800FC .word -67069952 - 3116 00b4 00200080 .word -2147475456 - 3117 00b8 00000000 .word I2C_Master_ISR_DMA - ARM GAS /tmp/ccpuPECZ.s page 148 - - - 3118 00bc 00000000 .word I2C_Slave_ISR_DMA - 3119 .cfi_endproc - 3120 .LFE47: - 3122 .section .text.HAL_I2C_Master_Receive_IT,"ax",%progbits - 3123 .align 1 - 3124 .global HAL_I2C_Master_Receive_IT - 3125 .syntax unified - 3126 .code 16 - 3127 .thumb_func - 3128 .fpu softvfp - 3130 HAL_I2C_Master_Receive_IT: - 3131 .LFB48: -1217:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; - 3132 .loc 1 1217 0 - 3133 .cfi_startproc - 3134 @ args = 0, pretend = 0, frame = 0 - 3135 @ frame_needed = 0, uses_anonymous_args = 0 - 3136 .LVL259: - 3137 0000 70B5 push {r4, r5, r6, lr} - 3138 .LCFI23: - 3139 .cfi_def_cfa_offset 16 - 3140 .cfi_offset 4, -16 - 3141 .cfi_offset 5, -12 - 3142 .cfi_offset 6, -8 - 3143 .cfi_offset 14, -4 - 3144 .LVL260: -1220:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3145 .loc 1 1220 0 - 3146 0002 4124 movs r4, #65 - 3147 0004 045D ldrb r4, [r0, r4] - 3148 0006 202C cmp r4, #32 - 3149 0008 48D1 bne .L245 -1222:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3150 .loc 1 1222 0 - 3151 000a 0468 ldr r4, [r0] - 3152 000c A569 ldr r5, [r4, #24] - 3153 000e 2D04 lsls r5, r5, #16 - 3154 0010 46D4 bmi .L246 -1228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3155 .loc 1 1228 0 - 3156 0012 4025 movs r5, #64 - 3157 0014 455D ldrb r5, [r0, r5] - 3158 0016 012D cmp r5, #1 - 3159 0018 44D0 beq .L247 -1228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3160 .loc 1 1228 0 is_stmt 0 discriminator 2 - 3161 001a 4025 movs r5, #64 - 3162 001c 0126 movs r6, #1 - 3163 001e 4655 strb r6, [r0, r5] -1230:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; - 3164 .loc 1 1230 0 is_stmt 1 discriminator 2 - 3165 0020 0135 adds r5, r5, #1 - 3166 0022 2136 adds r6, r6, #33 - 3167 0024 4655 strb r6, [r0, r5] -1231:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 3168 .loc 1 1231 0 discriminator 2 - 3169 0026 0135 adds r5, r5, #1 - ARM GAS /tmp/ccpuPECZ.s page 149 - - - 3170 0028 123E subs r6, r6, #18 - 3171 002a 4655 strb r6, [r0, r5] -1232:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3172 .loc 1 1232 0 discriminator 2 - 3173 002c 0025 movs r5, #0 - 3174 002e 4564 str r5, [r0, #68] -1235:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 3175 .loc 1 1235 0 discriminator 2 - 3176 0030 4262 str r2, [r0, #36] -1236:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 3177 .loc 1 1236 0 discriminator 2 - 3178 0032 4385 strh r3, [r0, #42] -1237:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; - 3179 .loc 1 1237 0 discriminator 2 - 3180 0034 1C4B ldr r3, .L251 - 3181 .LVL261: - 3182 0036 C362 str r3, [r0, #44] - 3183 .LVL262: -1238:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3184 .loc 1 1238 0 discriminator 2 - 3185 0038 1C4B ldr r3, .L251+4 - 3186 003a 4363 str r3, [r0, #52] -1240:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3187 .loc 1 1240 0 discriminator 2 - 3188 003c 438D ldrh r3, [r0, #42] - 3189 003e 9BB2 uxth r3, r3 - 3190 0040 FF2B cmp r3, #255 - 3191 0042 22D9 bls .L242 -1242:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; - 3192 .loc 1 1242 0 - 3193 0044 FF23 movs r3, #255 - 3194 0046 0385 strh r3, [r0, #40] - 3195 .LVL263: -1243:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3196 .loc 1 1243 0 - 3197 0048 8025 movs r5, #128 - 3198 004a 6D04 lsls r5, r5, #17 - 3199 .LVL264: - 3200 .L243: -1253:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3201 .loc 1 1253 0 - 3202 004c 028D ldrh r2, [r0, #40] - 3203 .LVL265: - 3204 004e D2B2 uxtb r2, r2 - 3205 .LVL266: - 3206 .LBB190: - 3207 .LBB191: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 3208 .loc 1 4713 0 - 3209 0050 6368 ldr r3, [r4, #4] - 3210 0052 174E ldr r6, .L251+8 - 3211 0054 3340 ands r3, r6 - 3212 0056 8905 lsls r1, r1, #22 - 3213 .LVL267: - 3214 0058 890D lsrs r1, r1, #22 - 3215 005a 1204 lsls r2, r2, #16 - 3216 .LVL268: - ARM GAS /tmp/ccpuPECZ.s page 150 - - - 3217 005c 1143 orrs r1, r2 - 3218 005e 0D43 orrs r5, r1 - 3219 .LVL269: - 3220 0060 1449 ldr r1, .L251+12 - 3221 0062 2943 orrs r1, r5 - 3222 0064 1943 orrs r1, r3 - 3223 0066 6160 str r1, [r4, #4] - 3224 .LVL270: - 3225 .LBE191: - 3226 .LBE190: -1256:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3227 .loc 1 1256 0 - 3228 0068 4023 movs r3, #64 - 3229 006a 0022 movs r2, #0 - 3230 006c C254 strb r2, [r0, r3] - 3231 .LVL271: - 3232 .LBB192: - 3233 .LBB193: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 3234 .loc 1 4728 0 - 3235 006e 436B ldr r3, [r0, #52] - 3236 0070 114A ldr r2, .L251+16 - 3237 0072 9342 cmp r3, r2 - 3238 0074 10D0 beq .L248 - 3239 0076 114A ldr r2, .L251+20 - 3240 0078 9342 cmp r3, r2 - 3241 007a 0BD0 beq .L250 - 3242 007c F421 movs r1, #244 - 3243 .L244: - 3244 .LVL272: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3245 .loc 1 4785 0 - 3246 007e 0268 ldr r2, [r0] - 3247 0080 1368 ldr r3, [r2] - 3248 0082 0B43 orrs r3, r1 - 3249 0084 1360 str r3, [r2] - 3250 .LVL273: - 3251 .LBE193: - 3252 .LBE192: -1267:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3253 .loc 1 1267 0 - 3254 0086 0020 movs r0, #0 - 3255 .LVL274: - 3256 0088 09E0 b .L241 - 3257 .LVL275: - 3258 .L242: -1247:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; - 3259 .loc 1 1247 0 - 3260 008a 438D ldrh r3, [r0, #42] - 3261 008c 0385 strh r3, [r0, #40] - 3262 .LVL276: -1248:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3263 .loc 1 1248 0 - 3264 008e 8025 movs r5, #128 - 3265 0090 AD04 lsls r5, r5, #18 - 3266 0092 DBE7 b .L243 - 3267 .LVL277: - ARM GAS /tmp/ccpuPECZ.s page 151 - - - 3268 .L250: - 3269 .LBB195: - 3270 .LBB194: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 3271 .loc 1 4728 0 - 3272 0094 0021 movs r1, #0 - 3273 0096 F2E7 b .L244 - 3274 .L248: - 3275 0098 0021 movs r1, #0 - 3276 009a F0E7 b .L244 - 3277 .LVL278: - 3278 .L245: - 3279 .LBE194: - 3280 .LBE195: -1271:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3281 .loc 1 1271 0 - 3282 009c 0220 movs r0, #2 - 3283 .LVL279: - 3284 .L241: -1273:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3285 .loc 1 1273 0 - 3286 @ sp needed - 3287 009e 70BD pop {r4, r5, r6, pc} - 3288 .LVL280: - 3289 .L246: -1224:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3290 .loc 1 1224 0 - 3291 00a0 0220 movs r0, #2 - 3292 .LVL281: - 3293 00a2 FCE7 b .L241 - 3294 .LVL282: - 3295 .L247: -1228:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3296 .loc 1 1228 0 - 3297 00a4 0220 movs r0, #2 - 3298 .LVL283: - 3299 00a6 FAE7 b .L241 - 3300 .L252: - 3301 .align 2 - 3302 .L251: - 3303 00a8 0000FFFF .word -65536 - 3304 00ac 00000000 .word I2C_Master_ISR_IT - 3305 00b0 009800FC .word -67069952 - 3306 00b4 00240080 .word -2147474432 - 3307 00b8 00000000 .word I2C_Master_ISR_DMA - 3308 00bc 00000000 .word I2C_Slave_ISR_DMA - 3309 .cfi_endproc - 3310 .LFE48: - 3312 .section .text.HAL_I2C_Slave_Transmit_IT,"ax",%progbits - 3313 .align 1 - 3314 .global HAL_I2C_Slave_Transmit_IT - 3315 .syntax unified - 3316 .code 16 - 3317 .thumb_func - 3318 .fpu softvfp - 3320 HAL_I2C_Slave_Transmit_IT: - 3321 .LFB49: - ARM GAS /tmp/ccpuPECZ.s page 152 - - -1284:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) - 3322 .loc 1 1284 0 - 3323 .cfi_startproc - 3324 @ args = 0, pretend = 0, frame = 0 - 3325 @ frame_needed = 0, uses_anonymous_args = 0 - 3326 .LVL284: - 3327 0000 F0B5 push {r4, r5, r6, r7, lr} - 3328 .LCFI24: - 3329 .cfi_def_cfa_offset 20 - 3330 .cfi_offset 4, -20 - 3331 .cfi_offset 5, -16 - 3332 .cfi_offset 6, -12 - 3333 .cfi_offset 7, -8 - 3334 .cfi_offset 14, -4 -1285:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3335 .loc 1 1285 0 - 3336 0002 4123 movs r3, #65 - 3337 0004 C35C ldrb r3, [r0, r3] - 3338 0006 202B cmp r3, #32 - 3339 0008 23D1 bne .L255 -1288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3340 .loc 1 1288 0 - 3341 000a 2033 adds r3, r3, #32 - 3342 000c C35C ldrb r3, [r0, r3] - 3343 000e 012B cmp r3, #1 - 3344 0010 21D0 beq .L256 -1288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3345 .loc 1 1288 0 is_stmt 0 discriminator 2 - 3346 0012 4024 movs r4, #64 - 3347 0014 0123 movs r3, #1 - 3348 0016 0355 strb r3, [r0, r4] -1290:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; - 3349 .loc 1 1290 0 is_stmt 1 discriminator 2 - 3350 0018 4033 adds r3, r3, #64 - 3351 001a 2125 movs r5, #33 - 3352 001c C554 strb r5, [r0, r3] -1291:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 3353 .loc 1 1291 0 discriminator 2 - 3354 001e 0133 adds r3, r3, #1 - 3355 0020 013D subs r5, r5, #1 - 3356 0022 C554 strb r5, [r0, r3] -1292:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3357 .loc 1 1292 0 discriminator 2 - 3358 0024 0025 movs r5, #0 - 3359 0026 4564 str r5, [r0, #68] -1295:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3360 .loc 1 1295 0 discriminator 2 - 3361 0028 0668 ldr r6, [r0] - 3362 002a 7368 ldr r3, [r6, #4] - 3363 002c 0B4F ldr r7, .L257 - 3364 002e 3B40 ands r3, r7 - 3365 0030 7360 str r3, [r6, #4] -1298:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 3366 .loc 1 1298 0 discriminator 2 - 3367 0032 4162 str r1, [r0, #36] -1299:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; - 3368 .loc 1 1299 0 discriminator 2 - ARM GAS /tmp/ccpuPECZ.s page 153 - - - 3369 0034 4285 strh r2, [r0, #42] -1300:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 3370 .loc 1 1300 0 discriminator 2 - 3371 0036 438D ldrh r3, [r0, #42] - 3372 0038 0385 strh r3, [r0, #40] -1301:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; - 3373 .loc 1 1301 0 discriminator 2 - 3374 003a 094B ldr r3, .L257+4 - 3375 003c C362 str r3, [r0, #44] -1302:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3376 .loc 1 1302 0 discriminator 2 - 3377 003e 094B ldr r3, .L257+8 - 3378 0040 4363 str r3, [r0, #52] -1305:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3379 .loc 1 1305 0 discriminator 2 - 3380 0042 0555 strb r5, [r0, r4] - 3381 .LVL285: - 3382 .LBB196: - 3383 .LBB197: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3384 .loc 1 4785 0 discriminator 2 - 3385 0044 0268 ldr r2, [r0] - 3386 .LVL286: - 3387 0046 1368 ldr r3, [r2] - 3388 0048 FA21 movs r1, #250 - 3389 .LVL287: - 3390 004a 0B43 orrs r3, r1 - 3391 004c 1360 str r3, [r2] - 3392 .LVL288: - 3393 .LBE197: - 3394 .LBE196: -1316:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3395 .loc 1 1316 0 discriminator 2 - 3396 004e 0020 movs r0, #0 - 3397 .LVL289: - 3398 0050 00E0 b .L254 - 3399 .LVL290: - 3400 .L255: -1320:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3401 .loc 1 1320 0 - 3402 0052 0220 movs r0, #2 - 3403 .LVL291: - 3404 .L254: -1322:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3405 .loc 1 1322 0 - 3406 @ sp needed - 3407 0054 F0BD pop {r4, r5, r6, r7, pc} - 3408 .LVL292: - 3409 .L256: -1288:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3410 .loc 1 1288 0 - 3411 0056 0220 movs r0, #2 - 3412 .LVL293: - 3413 0058 FCE7 b .L254 - 3414 .L258: - 3415 005a C046 .align 2 - 3416 .L257: - ARM GAS /tmp/ccpuPECZ.s page 154 - - - 3417 005c FF7FFFFF .word -32769 - 3418 0060 0000FFFF .word -65536 - 3419 0064 00000000 .word I2C_Slave_ISR_IT - 3420 .cfi_endproc - 3421 .LFE49: - 3423 .section .text.HAL_I2C_Slave_Receive_IT,"ax",%progbits - 3424 .align 1 - 3425 .global HAL_I2C_Slave_Receive_IT - 3426 .syntax unified - 3427 .code 16 - 3428 .thumb_func - 3429 .fpu softvfp - 3431 HAL_I2C_Slave_Receive_IT: - 3432 .LFB50: -1333:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) - 3433 .loc 1 1333 0 - 3434 .cfi_startproc - 3435 @ args = 0, pretend = 0, frame = 0 - 3436 @ frame_needed = 0, uses_anonymous_args = 0 - 3437 .LVL294: - 3438 0000 F0B5 push {r4, r5, r6, r7, lr} - 3439 .LCFI25: - 3440 .cfi_def_cfa_offset 20 - 3441 .cfi_offset 4, -20 - 3442 .cfi_offset 5, -16 - 3443 .cfi_offset 6, -12 - 3444 .cfi_offset 7, -8 - 3445 .cfi_offset 14, -4 -1334:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3446 .loc 1 1334 0 - 3447 0002 4123 movs r3, #65 - 3448 0004 C35C ldrb r3, [r0, r3] - 3449 0006 202B cmp r3, #32 - 3450 0008 23D1 bne .L261 -1337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3451 .loc 1 1337 0 - 3452 000a 2033 adds r3, r3, #32 - 3453 000c C35C ldrb r3, [r0, r3] - 3454 000e 012B cmp r3, #1 - 3455 0010 21D0 beq .L262 -1337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3456 .loc 1 1337 0 is_stmt 0 discriminator 2 - 3457 0012 4024 movs r4, #64 - 3458 0014 0123 movs r3, #1 - 3459 0016 0355 strb r3, [r0, r4] -1339:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; - 3460 .loc 1 1339 0 is_stmt 1 discriminator 2 - 3461 0018 4033 adds r3, r3, #64 - 3462 001a 2225 movs r5, #34 - 3463 001c C554 strb r5, [r0, r3] -1340:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 3464 .loc 1 1340 0 discriminator 2 - 3465 001e 0133 adds r3, r3, #1 - 3466 0020 023D subs r5, r5, #2 - 3467 0022 C554 strb r5, [r0, r3] -1341:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3468 .loc 1 1341 0 discriminator 2 - ARM GAS /tmp/ccpuPECZ.s page 155 - - - 3469 0024 0025 movs r5, #0 - 3470 0026 4564 str r5, [r0, #68] -1344:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3471 .loc 1 1344 0 discriminator 2 - 3472 0028 0668 ldr r6, [r0] - 3473 002a 7368 ldr r3, [r6, #4] - 3474 002c 0B4F ldr r7, .L263 - 3475 002e 3B40 ands r3, r7 - 3476 0030 7360 str r3, [r6, #4] -1347:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 3477 .loc 1 1347 0 discriminator 2 - 3478 0032 4162 str r1, [r0, #36] -1348:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; - 3479 .loc 1 1348 0 discriminator 2 - 3480 0034 4285 strh r2, [r0, #42] -1349:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 3481 .loc 1 1349 0 discriminator 2 - 3482 0036 438D ldrh r3, [r0, #42] - 3483 0038 0385 strh r3, [r0, #40] -1350:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; - 3484 .loc 1 1350 0 discriminator 2 - 3485 003a 094B ldr r3, .L263+4 - 3486 003c C362 str r3, [r0, #44] -1351:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3487 .loc 1 1351 0 discriminator 2 - 3488 003e 094B ldr r3, .L263+8 - 3489 0040 4363 str r3, [r0, #52] -1354:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3490 .loc 1 1354 0 discriminator 2 - 3491 0042 0555 strb r5, [r0, r4] - 3492 .LVL295: - 3493 .LBB198: - 3494 .LBB199: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3495 .loc 1 4785 0 discriminator 2 - 3496 0044 0268 ldr r2, [r0] - 3497 .LVL296: - 3498 0046 1368 ldr r3, [r2] - 3499 0048 FC21 movs r1, #252 - 3500 .LVL297: - 3501 004a 0B43 orrs r3, r1 - 3502 004c 1360 str r3, [r2] - 3503 .LVL298: - 3504 .LBE199: - 3505 .LBE198: -1365:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3506 .loc 1 1365 0 discriminator 2 - 3507 004e 0020 movs r0, #0 - 3508 .LVL299: - 3509 0050 00E0 b .L260 - 3510 .LVL300: - 3511 .L261: -1369:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3512 .loc 1 1369 0 - 3513 0052 0220 movs r0, #2 - 3514 .LVL301: - 3515 .L260: - ARM GAS /tmp/ccpuPECZ.s page 156 - - -1371:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3516 .loc 1 1371 0 - 3517 @ sp needed - 3518 0054 F0BD pop {r4, r5, r6, r7, pc} - 3519 .LVL302: - 3520 .L262: -1337:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3521 .loc 1 1337 0 - 3522 0056 0220 movs r0, #2 - 3523 .LVL303: - 3524 0058 FCE7 b .L260 - 3525 .L264: - 3526 005a C046 .align 2 - 3527 .L263: - 3528 005c FF7FFFFF .word -32769 - 3529 0060 0000FFFF .word -65536 - 3530 0064 00000000 .word I2C_Slave_ISR_IT - 3531 .cfi_endproc - 3532 .LFE50: - 3534 .section .text.HAL_I2C_Master_Transmit_DMA,"ax",%progbits - 3535 .align 1 - 3536 .global HAL_I2C_Master_Transmit_DMA - 3537 .syntax unified - 3538 .code 16 - 3539 .thumb_func - 3540 .fpu softvfp - 3542 HAL_I2C_Master_Transmit_DMA: - 3543 .LFB51: -1384:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; - 3544 .loc 1 1384 0 - 3545 .cfi_startproc - 3546 @ args = 0, pretend = 0, frame = 0 - 3547 @ frame_needed = 0, uses_anonymous_args = 0 - 3548 .LVL304: - 3549 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 3550 .LCFI26: - 3551 .cfi_def_cfa_offset 24 - 3552 .cfi_offset 3, -24 - 3553 .cfi_offset 4, -20 - 3554 .cfi_offset 5, -16 - 3555 .cfi_offset 6, -12 - 3556 .cfi_offset 7, -8 - 3557 .cfi_offset 14, -4 - 3558 0002 0400 movs r4, r0 - 3559 0004 0D00 movs r5, r1 - 3560 0006 1100 movs r1, r2 - 3561 .LVL305: -1387:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3562 .loc 1 1387 0 - 3563 0008 4122 movs r2, #65 - 3564 .LVL306: - 3565 000a 825C ldrb r2, [r0, r2] - 3566 000c 202A cmp r2, #32 - 3567 000e 00D0 beq .LCB3787 - 3568 0010 8CE0 b .L272 @long jump - 3569 .LCB3787: -1389:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - ARM GAS /tmp/ccpuPECZ.s page 157 - - - 3570 .loc 1 1389 0 - 3571 0012 0268 ldr r2, [r0] - 3572 0014 9069 ldr r0, [r2, #24] - 3573 .LVL307: - 3574 0016 0004 lsls r0, r0, #16 - 3575 0018 00D5 bpl .LCB3794 - 3576 001a 89E0 b .L273 @long jump - 3577 .LCB3794: -1395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3578 .loc 1 1395 0 - 3579 001c 4020 movs r0, #64 - 3580 001e 205C ldrb r0, [r4, r0] - 3581 0020 0128 cmp r0, #1 - 3582 0022 00D1 bne .LCB3798 - 3583 0024 86E0 b .L274 @long jump - 3584 .LCB3798: -1395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3585 .loc 1 1395 0 is_stmt 0 discriminator 2 - 3586 0026 4020 movs r0, #64 - 3587 0028 0126 movs r6, #1 - 3588 002a 2654 strb r6, [r4, r0] -1397:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; - 3589 .loc 1 1397 0 is_stmt 1 discriminator 2 - 3590 002c 0130 adds r0, r0, #1 - 3591 002e 2036 adds r6, r6, #32 - 3592 0030 2654 strb r6, [r4, r0] -1398:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 3593 .loc 1 1398 0 discriminator 2 - 3594 0032 0130 adds r0, r0, #1 - 3595 0034 113E subs r6, r6, #17 - 3596 0036 2654 strb r6, [r4, r0] -1399:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3597 .loc 1 1399 0 discriminator 2 - 3598 0038 0020 movs r0, #0 - 3599 003a 6064 str r0, [r4, #68] -1402:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 3600 .loc 1 1402 0 discriminator 2 - 3601 003c 6162 str r1, [r4, #36] -1403:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 3602 .loc 1 1403 0 discriminator 2 - 3603 003e 6385 strh r3, [r4, #42] -1404:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; - 3604 .loc 1 1404 0 discriminator 2 - 3605 0040 3D4B ldr r3, .L282 - 3606 .LVL308: - 3607 0042 E362 str r3, [r4, #44] - 3608 .LVL309: -1405:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3609 .loc 1 1405 0 discriminator 2 - 3610 0044 3D4B ldr r3, .L282+4 - 3611 0046 6363 str r3, [r4, #52] -1407:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3612 .loc 1 1407 0 discriminator 2 - 3613 0048 638D ldrh r3, [r4, #42] - 3614 004a 9BB2 uxth r3, r3 - 3615 004c FF2B cmp r3, #255 - 3616 004e 25D9 bls .L267 - ARM GAS /tmp/ccpuPECZ.s page 158 - - -1409:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; - 3617 .loc 1 1409 0 - 3618 0050 FF23 movs r3, #255 - 3619 0052 2385 strh r3, [r4, #40] - 3620 .LVL310: -1410:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3621 .loc 1 1410 0 - 3622 0054 8026 movs r6, #128 - 3623 0056 7604 lsls r6, r6, #17 - 3624 .LVL311: - 3625 .L268: -1418:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3626 .loc 1 1418 0 - 3627 0058 238D ldrh r3, [r4, #40] - 3628 005a 002B cmp r3, #0 - 3629 005c 23D1 bne .L279 -1455:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3630 .loc 1 1455 0 - 3631 005e 3849 ldr r1, .L282+8 - 3632 .LVL312: - 3633 0060 6163 str r1, [r4, #52] -1459:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3634 .loc 1 1459 0 - 3635 0062 DBB2 uxtb r3, r3 - 3636 .LVL313: - 3637 .LBB200: - 3638 .LBB201: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 3639 .loc 1 4713 0 - 3640 0064 5168 ldr r1, [r2, #4] - 3641 0066 3748 ldr r0, .L282+12 - 3642 0068 0140 ands r1, r0 - 3643 006a AD05 lsls r5, r5, #22 - 3644 .LVL314: - 3645 006c AD0D lsrs r5, r5, #22 - 3646 006e 1B04 lsls r3, r3, #16 - 3647 .LVL315: - 3648 0070 1D43 orrs r5, r3 - 3649 0072 354B ldr r3, .L282+16 - 3650 0074 1D43 orrs r5, r3 - 3651 0076 0D43 orrs r5, r1 - 3652 0078 5560 str r5, [r2, #4] - 3653 .LVL316: - 3654 .LBE201: - 3655 .LBE200: -1462:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3656 .loc 1 1462 0 - 3657 007a 4023 movs r3, #64 - 3658 007c 0022 movs r2, #0 - 3659 007e E254 strb r2, [r4, r3] - 3660 .LVL317: - 3661 .LBB202: - 3662 .LBB203: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 3663 .loc 1 4728 0 - 3664 0080 636B ldr r3, [r4, #52] - 3665 0082 2E4A ldr r2, .L282+4 - ARM GAS /tmp/ccpuPECZ.s page 159 - - - 3666 0084 9342 cmp r3, r2 - 3667 0086 4FD0 beq .L277 - 3668 0088 304A ldr r2, .L282+20 - 3669 008a 9342 cmp r3, r2 - 3670 008c 4AD0 beq .L280 - 3671 008e F221 movs r1, #242 - 3672 .L271: - 3673 .LVL318: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3674 .loc 1 4785 0 - 3675 0090 2268 ldr r2, [r4] - 3676 0092 1368 ldr r3, [r2] - 3677 0094 0B43 orrs r3, r1 - 3678 0096 1360 str r3, [r2] - 3679 .LBE203: - 3680 .LBE202: -1473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3681 .loc 1 1473 0 - 3682 0098 0020 movs r0, #0 - 3683 009a 48E0 b .L266 - 3684 .LVL319: - 3685 .L267: -1414:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; - 3686 .loc 1 1414 0 - 3687 009c 638D ldrh r3, [r4, #42] - 3688 009e 2385 strh r3, [r4, #40] - 3689 .LVL320: -1415:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3690 .loc 1 1415 0 - 3691 00a0 8026 movs r6, #128 - 3692 00a2 B604 lsls r6, r6, #18 - 3693 00a4 D8E7 b .L268 - 3694 .LVL321: - 3695 .L279: -1421:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3696 .loc 1 1421 0 - 3697 00a6 A36B ldr r3, [r4, #56] - 3698 00a8 294A ldr r2, .L282+24 - 3699 00aa DA62 str r2, [r3, #44] -1424:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3700 .loc 1 1424 0 - 3701 00ac A36B ldr r3, [r4, #56] - 3702 00ae 294A ldr r2, .L282+28 - 3703 00b0 5A63 str r2, [r3, #52] -1427:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; - 3704 .loc 1 1427 0 - 3705 00b2 A36B ldr r3, [r4, #56] - 3706 00b4 0027 movs r7, #0 - 3707 00b6 1F63 str r7, [r3, #48] -1428:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3708 .loc 1 1428 0 - 3709 00b8 A36B ldr r3, [r4, #56] - 3710 00ba 9F63 str r7, [r3, #56] -1431:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3711 .loc 1 1431 0 - 3712 00bc 2268 ldr r2, [r4] - 3713 00be 2832 adds r2, r2, #40 - ARM GAS /tmp/ccpuPECZ.s page 160 - - - 3714 00c0 238D ldrh r3, [r4, #40] - 3715 00c2 A06B ldr r0, [r4, #56] - 3716 00c4 FFF7FEFF bl HAL_DMA_Start_IT - 3717 .LVL322: -1435:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3718 .loc 1 1435 0 - 3719 00c8 238D ldrh r3, [r4, #40] - 3720 00ca DBB2 uxtb r3, r3 - 3721 .LVL323: - 3722 .LBB205: - 3723 .LBB206: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 3724 .loc 1 4713 0 - 3725 00cc 2168 ldr r1, [r4] - 3726 00ce 4868 ldr r0, [r1, #4] - 3727 00d0 1C4A ldr r2, .L282+12 - 3728 00d2 0240 ands r2, r0 - 3729 00d4 AD05 lsls r5, r5, #22 - 3730 .LVL324: - 3731 00d6 AD0D lsrs r5, r5, #22 - 3732 00d8 1B04 lsls r3, r3, #16 - 3733 .LVL325: - 3734 00da 1D43 orrs r5, r3 - 3735 00dc 2E43 orrs r6, r5 - 3736 .LVL326: - 3737 00de 1E4D ldr r5, .L282+32 - 3738 00e0 2E43 orrs r6, r5 - 3739 00e2 1643 orrs r6, r2 - 3740 00e4 4E60 str r6, [r1, #4] - 3741 .LVL327: - 3742 .LBE206: - 3743 .LBE205: -1438:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3744 .loc 1 1438 0 - 3745 00e6 638D ldrh r3, [r4, #42] - 3746 00e8 228D ldrh r2, [r4, #40] - 3747 00ea 9B1A subs r3, r3, r2 - 3748 00ec 9BB2 uxth r3, r3 - 3749 00ee 6385 strh r3, [r4, #42] -1441:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3750 .loc 1 1441 0 - 3751 00f0 4023 movs r3, #64 - 3752 00f2 E754 strb r7, [r4, r3] - 3753 .LVL328: - 3754 .LBB207: - 3755 .LBB208: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 3756 .loc 1 4728 0 - 3757 00f4 636B ldr r3, [r4, #52] - 3758 00f6 114A ldr r2, .L282+4 - 3759 00f8 9342 cmp r3, r2 - 3760 00fa 11D0 beq .L275 - 3761 00fc 134A ldr r2, .L282+20 - 3762 00fe 9342 cmp r3, r2 - 3763 0100 0CD0 beq .L281 - 3764 0102 F221 movs r1, #242 - 3765 .L270: - ARM GAS /tmp/ccpuPECZ.s page 161 - - - 3766 .LVL329: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3767 .loc 1 4785 0 - 3768 0104 2268 ldr r2, [r4] - 3769 0106 1368 ldr r3, [r2] - 3770 0108 0B43 orrs r3, r1 - 3771 010a 1360 str r3, [r2] - 3772 .LVL330: - 3773 .LBE208: - 3774 .LBE207: -1450:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3775 .loc 1 1450 0 - 3776 010c 2268 ldr r2, [r4] - 3777 010e 1168 ldr r1, [r2] - 3778 0110 8023 movs r3, #128 - 3779 0112 DB01 lsls r3, r3, #7 - 3780 0114 0B43 orrs r3, r1 - 3781 0116 1360 str r3, [r2] -1473:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3782 .loc 1 1473 0 - 3783 0118 0020 movs r0, #0 - 3784 011a 08E0 b .L266 - 3785 .LVL331: - 3786 .L281: - 3787 .LBB210: - 3788 .LBB209: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 3789 .loc 1 4728 0 - 3790 011c 9021 movs r1, #144 - 3791 011e F1E7 b .L270 - 3792 .L275: - 3793 0120 9021 movs r1, #144 - 3794 0122 EFE7 b .L270 - 3795 .LVL332: - 3796 .L280: - 3797 .LBE209: - 3798 .LBE210: - 3799 .LBB211: - 3800 .LBB204: - 3801 0124 0021 movs r1, #0 - 3802 0126 B3E7 b .L271 - 3803 .L277: - 3804 0128 0021 movs r1, #0 - 3805 012a B1E7 b .L271 - 3806 .LVL333: - 3807 .L272: - 3808 .LBE204: - 3809 .LBE211: -1477:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3810 .loc 1 1477 0 - 3811 012c 0220 movs r0, #2 - 3812 .LVL334: - 3813 .L266: -1479:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3814 .loc 1 1479 0 - 3815 @ sp needed - 3816 .LVL335: - ARM GAS /tmp/ccpuPECZ.s page 162 - - - 3817 012e F8BD pop {r3, r4, r5, r6, r7, pc} - 3818 .LVL336: - 3819 .L273: -1391:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3820 .loc 1 1391 0 - 3821 0130 0220 movs r0, #2 - 3822 0132 FCE7 b .L266 - 3823 .L274: -1395:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3824 .loc 1 1395 0 - 3825 0134 0220 movs r0, #2 - 3826 0136 FAE7 b .L266 - 3827 .L283: - 3828 .align 2 - 3829 .L282: - 3830 0138 0000FFFF .word -65536 - 3831 013c 00000000 .word I2C_Master_ISR_DMA - 3832 0140 00000000 .word I2C_Master_ISR_IT - 3833 0144 009800FC .word -67069952 - 3834 0148 00200082 .word -2113921024 - 3835 014c 00000000 .word I2C_Slave_ISR_DMA - 3836 0150 00000000 .word I2C_DMAMasterTransmitCplt - 3837 0154 00000000 .word I2C_DMAError - 3838 0158 00200080 .word -2147475456 - 3839 .cfi_endproc - 3840 .LFE51: - 3842 .section .text.HAL_I2C_Master_Receive_DMA,"ax",%progbits - 3843 .align 1 - 3844 .global HAL_I2C_Master_Receive_DMA - 3845 .syntax unified - 3846 .code 16 - 3847 .thumb_func - 3848 .fpu softvfp - 3850 HAL_I2C_Master_Receive_DMA: - 3851 .LFB52: -1492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t xfermode = 0U; - 3852 .loc 1 1492 0 - 3853 .cfi_startproc - 3854 @ args = 0, pretend = 0, frame = 0 - 3855 @ frame_needed = 0, uses_anonymous_args = 0 - 3856 .LVL337: - 3857 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - 3858 .LCFI27: - 3859 .cfi_def_cfa_offset 24 - 3860 .cfi_offset 3, -24 - 3861 .cfi_offset 4, -20 - 3862 .cfi_offset 5, -16 - 3863 .cfi_offset 6, -12 - 3864 .cfi_offset 7, -8 - 3865 .cfi_offset 14, -4 - 3866 0002 0400 movs r4, r0 - 3867 0004 0D00 movs r5, r1 - 3868 .LVL338: -1495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3869 .loc 1 1495 0 - 3870 0006 4121 movs r1, #65 - 3871 .LVL339: - ARM GAS /tmp/ccpuPECZ.s page 163 - - - 3872 0008 415C ldrb r1, [r0, r1] - 3873 000a 2029 cmp r1, #32 - 3874 000c 00D0 beq .LCB4139 - 3875 000e 8CE0 b .L291 @long jump - 3876 .LCB4139: -1497:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3877 .loc 1 1497 0 - 3878 0010 0168 ldr r1, [r0] - 3879 0012 8869 ldr r0, [r1, #24] - 3880 .LVL340: - 3881 0014 0004 lsls r0, r0, #16 - 3882 0016 00D5 bpl .LCB4146 - 3883 0018 89E0 b .L292 @long jump - 3884 .LCB4146: -1503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3885 .loc 1 1503 0 - 3886 001a 4020 movs r0, #64 - 3887 001c 205C ldrb r0, [r4, r0] - 3888 001e 0128 cmp r0, #1 - 3889 0020 00D1 bne .LCB4150 - 3890 0022 86E0 b .L293 @long jump - 3891 .LCB4150: -1503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3892 .loc 1 1503 0 is_stmt 0 discriminator 2 - 3893 0024 4020 movs r0, #64 - 3894 0026 0126 movs r6, #1 - 3895 0028 2654 strb r6, [r4, r0] -1505:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; - 3896 .loc 1 1505 0 is_stmt 1 discriminator 2 - 3897 002a 0130 adds r0, r0, #1 - 3898 002c 2136 adds r6, r6, #33 - 3899 002e 2654 strb r6, [r4, r0] -1506:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 3900 .loc 1 1506 0 discriminator 2 - 3901 0030 0130 adds r0, r0, #1 - 3902 0032 123E subs r6, r6, #18 - 3903 0034 2654 strb r6, [r4, r0] -1507:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3904 .loc 1 1507 0 discriminator 2 - 3905 0036 0020 movs r0, #0 - 3906 0038 6064 str r0, [r4, #68] -1510:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 3907 .loc 1 1510 0 discriminator 2 - 3908 003a 6262 str r2, [r4, #36] -1511:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 3909 .loc 1 1511 0 discriminator 2 - 3910 003c 6385 strh r3, [r4, #42] -1512:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; - 3911 .loc 1 1512 0 discriminator 2 - 3912 003e 3E4B ldr r3, .L301 - 3913 .LVL341: - 3914 0040 E362 str r3, [r4, #44] - 3915 .LVL342: -1513:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3916 .loc 1 1513 0 discriminator 2 - 3917 0042 3E4B ldr r3, .L301+4 - 3918 0044 6363 str r3, [r4, #52] - ARM GAS /tmp/ccpuPECZ.s page 164 - - -1515:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3919 .loc 1 1515 0 discriminator 2 - 3920 0046 638D ldrh r3, [r4, #42] - 3921 0048 9BB2 uxth r3, r3 - 3922 004a FF2B cmp r3, #255 - 3923 004c 25D9 bls .L286 -1517:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; - 3924 .loc 1 1517 0 - 3925 004e FF23 movs r3, #255 - 3926 0050 2385 strh r3, [r4, #40] - 3927 .LVL343: -1518:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3928 .loc 1 1518 0 - 3929 0052 8026 movs r6, #128 - 3930 0054 7604 lsls r6, r6, #17 - 3931 .LVL344: - 3932 .L287: -1526:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 3933 .loc 1 1526 0 - 3934 0056 238D ldrh r3, [r4, #40] - 3935 0058 002B cmp r3, #0 - 3936 005a 23D1 bne .L298 -1563:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3937 .loc 1 1563 0 - 3938 005c 384A ldr r2, .L301+8 - 3939 .LVL345: - 3940 005e 6263 str r2, [r4, #52] -1567:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3941 .loc 1 1567 0 - 3942 0060 DBB2 uxtb r3, r3 - 3943 .LVL346: - 3944 .LBB212: - 3945 .LBB213: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 3946 .loc 1 4713 0 - 3947 0062 4A68 ldr r2, [r1, #4] - 3948 0064 3748 ldr r0, .L301+12 - 3949 0066 0240 ands r2, r0 - 3950 0068 AD05 lsls r5, r5, #22 - 3951 .LVL347: - 3952 006a AD0D lsrs r5, r5, #22 - 3953 006c 1B04 lsls r3, r3, #16 - 3954 .LVL348: - 3955 006e 1D43 orrs r5, r3 - 3956 0070 354B ldr r3, .L301+16 - 3957 0072 1D43 orrs r5, r3 - 3958 0074 1543 orrs r5, r2 - 3959 0076 4D60 str r5, [r1, #4] - 3960 .LVL349: - 3961 .LBE213: - 3962 .LBE212: -1570:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3963 .loc 1 1570 0 - 3964 0078 4023 movs r3, #64 - 3965 007a 0022 movs r2, #0 - 3966 007c E254 strb r2, [r4, r3] - 3967 .LVL350: - ARM GAS /tmp/ccpuPECZ.s page 165 - - - 3968 .LBB214: - 3969 .LBB215: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 3970 .loc 1 4728 0 - 3971 007e 636B ldr r3, [r4, #52] - 3972 0080 2E4A ldr r2, .L301+4 - 3973 0082 9342 cmp r3, r2 - 3974 0084 4FD0 beq .L296 - 3975 0086 314A ldr r2, .L301+20 - 3976 0088 9342 cmp r3, r2 - 3977 008a 4AD0 beq .L299 - 3978 008c F221 movs r1, #242 - 3979 .L290: - 3980 .LVL351: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 3981 .loc 1 4785 0 - 3982 008e 2268 ldr r2, [r4] - 3983 0090 1368 ldr r3, [r2] - 3984 0092 0B43 orrs r3, r1 - 3985 0094 1360 str r3, [r2] - 3986 .LBE215: - 3987 .LBE214: -1580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3988 .loc 1 1580 0 - 3989 0096 0020 movs r0, #0 - 3990 0098 48E0 b .L285 - 3991 .LVL352: - 3992 .L286: -1522:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; - 3993 .loc 1 1522 0 - 3994 009a 638D ldrh r3, [r4, #42] - 3995 009c 2385 strh r3, [r4, #40] - 3996 .LVL353: -1523:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 3997 .loc 1 1523 0 - 3998 009e 8026 movs r6, #128 - 3999 00a0 B604 lsls r6, r6, #18 - 4000 00a2 D8E7 b .L287 - 4001 .LVL354: - 4002 .L298: -1529:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4003 .loc 1 1529 0 - 4004 00a4 E36B ldr r3, [r4, #60] - 4005 00a6 2A49 ldr r1, .L301+24 - 4006 00a8 D962 str r1, [r3, #44] -1532:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4007 .loc 1 1532 0 - 4008 00aa E36B ldr r3, [r4, #60] - 4009 00ac 2949 ldr r1, .L301+28 - 4010 00ae 5963 str r1, [r3, #52] -1535:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; - 4011 .loc 1 1535 0 - 4012 00b0 E36B ldr r3, [r4, #60] - 4013 00b2 0027 movs r7, #0 - 4014 00b4 1F63 str r7, [r3, #48] -1536:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4015 .loc 1 1536 0 - ARM GAS /tmp/ccpuPECZ.s page 166 - - - 4016 00b6 E36B ldr r3, [r4, #60] - 4017 00b8 9F63 str r7, [r3, #56] -1539:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4018 .loc 1 1539 0 - 4019 00ba 2168 ldr r1, [r4] - 4020 00bc 2431 adds r1, r1, #36 - 4021 00be 238D ldrh r3, [r4, #40] - 4022 00c0 E06B ldr r0, [r4, #60] - 4023 00c2 FFF7FEFF bl HAL_DMA_Start_IT - 4024 .LVL355: -1543:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4025 .loc 1 1543 0 - 4026 00c6 238D ldrh r3, [r4, #40] - 4027 00c8 DBB2 uxtb r3, r3 - 4028 .LVL356: - 4029 .LBB217: - 4030 .LBB218: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 4031 .loc 1 4713 0 - 4032 00ca 2168 ldr r1, [r4] - 4033 00cc 4868 ldr r0, [r1, #4] - 4034 00ce 1D4A ldr r2, .L301+12 - 4035 00d0 0240 ands r2, r0 - 4036 00d2 AD05 lsls r5, r5, #22 - 4037 .LVL357: - 4038 00d4 AD0D lsrs r5, r5, #22 - 4039 00d6 1B04 lsls r3, r3, #16 - 4040 .LVL358: - 4041 00d8 1D43 orrs r5, r3 - 4042 00da 2E43 orrs r6, r5 - 4043 .LVL359: - 4044 00dc 1E4D ldr r5, .L301+32 - 4045 00de 2E43 orrs r6, r5 - 4046 00e0 1643 orrs r6, r2 - 4047 00e2 4E60 str r6, [r1, #4] - 4048 .LVL360: - 4049 .LBE218: - 4050 .LBE217: -1546:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4051 .loc 1 1546 0 - 4052 00e4 638D ldrh r3, [r4, #42] - 4053 00e6 228D ldrh r2, [r4, #40] - 4054 00e8 9B1A subs r3, r3, r2 - 4055 00ea 9BB2 uxth r3, r3 - 4056 00ec 6385 strh r3, [r4, #42] -1549:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4057 .loc 1 1549 0 - 4058 00ee 4023 movs r3, #64 - 4059 00f0 E754 strb r7, [r4, r3] - 4060 .LVL361: - 4061 .LBB219: - 4062 .LBB220: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 4063 .loc 1 4728 0 - 4064 00f2 636B ldr r3, [r4, #52] - 4065 00f4 114A ldr r2, .L301+4 - 4066 00f6 9342 cmp r3, r2 - ARM GAS /tmp/ccpuPECZ.s page 167 - - - 4067 00f8 11D0 beq .L294 - 4068 00fa 144A ldr r2, .L301+20 - 4069 00fc 9342 cmp r3, r2 - 4070 00fe 0CD0 beq .L300 - 4071 0100 F221 movs r1, #242 - 4072 .L289: - 4073 .LVL362: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4074 .loc 1 4785 0 - 4075 0102 2268 ldr r2, [r4] - 4076 0104 1368 ldr r3, [r2] - 4077 0106 0B43 orrs r3, r1 - 4078 0108 1360 str r3, [r2] - 4079 .LVL363: - 4080 .LBE220: - 4081 .LBE219: -1558:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4082 .loc 1 1558 0 - 4083 010a 2268 ldr r2, [r4] - 4084 010c 1168 ldr r1, [r2] - 4085 010e 8023 movs r3, #128 - 4086 0110 1B02 lsls r3, r3, #8 - 4087 0112 0B43 orrs r3, r1 - 4088 0114 1360 str r3, [r2] -1580:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4089 .loc 1 1580 0 - 4090 0116 0020 movs r0, #0 - 4091 0118 08E0 b .L285 - 4092 .LVL364: - 4093 .L300: - 4094 .LBB222: - 4095 .LBB221: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 4096 .loc 1 4728 0 - 4097 011a 9021 movs r1, #144 - 4098 011c F1E7 b .L289 - 4099 .L294: - 4100 011e 9021 movs r1, #144 - 4101 0120 EFE7 b .L289 - 4102 .LVL365: - 4103 .L299: - 4104 .LBE221: - 4105 .LBE222: - 4106 .LBB223: - 4107 .LBB216: - 4108 0122 0021 movs r1, #0 - 4109 0124 B3E7 b .L290 - 4110 .L296: - 4111 0126 0021 movs r1, #0 - 4112 0128 B1E7 b .L290 - 4113 .LVL366: - 4114 .L291: - 4115 .LBE216: - 4116 .LBE223: -1584:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4117 .loc 1 1584 0 - 4118 012a 0220 movs r0, #2 - ARM GAS /tmp/ccpuPECZ.s page 168 - - - 4119 .LVL367: - 4120 .L285: -1586:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4121 .loc 1 1586 0 - 4122 @ sp needed - 4123 .LVL368: - 4124 012c F8BD pop {r3, r4, r5, r6, r7, pc} - 4125 .LVL369: - 4126 .L292: -1499:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4127 .loc 1 1499 0 - 4128 012e 0220 movs r0, #2 - 4129 0130 FCE7 b .L285 - 4130 .L293: -1503:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4131 .loc 1 1503 0 - 4132 0132 0220 movs r0, #2 - 4133 0134 FAE7 b .L285 - 4134 .L302: - 4135 0136 C046 .align 2 - 4136 .L301: - 4137 0138 0000FFFF .word -65536 - 4138 013c 00000000 .word I2C_Master_ISR_DMA - 4139 0140 00000000 .word I2C_Master_ISR_IT - 4140 0144 009800FC .word -67069952 - 4141 0148 00240082 .word -2113920000 - 4142 014c 00000000 .word I2C_Slave_ISR_DMA - 4143 0150 00000000 .word I2C_DMAMasterReceiveCplt - 4144 0154 00000000 .word I2C_DMAError - 4145 0158 00240080 .word -2147474432 - 4146 .cfi_endproc - 4147 .LFE52: - 4149 .section .text.HAL_I2C_Slave_Transmit_DMA,"ax",%progbits - 4150 .align 1 - 4151 .global HAL_I2C_Slave_Transmit_DMA - 4152 .syntax unified - 4153 .code 16 - 4154 .thumb_func - 4155 .fpu softvfp - 4157 HAL_I2C_Slave_Transmit_DMA: - 4158 .LFB53: -1597:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) - 4159 .loc 1 1597 0 - 4160 .cfi_startproc - 4161 @ args = 0, pretend = 0, frame = 0 - 4162 @ frame_needed = 0, uses_anonymous_args = 0 - 4163 .LVL370: - 4164 0000 70B5 push {r4, r5, r6, lr} - 4165 .LCFI28: - 4166 .cfi_def_cfa_offset 16 - 4167 .cfi_offset 4, -16 - 4168 .cfi_offset 5, -12 - 4169 .cfi_offset 6, -8 - 4170 .cfi_offset 14, -4 - 4171 0002 0400 movs r4, r0 -1598:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4172 .loc 1 1598 0 - ARM GAS /tmp/ccpuPECZ.s page 169 - - - 4173 0004 4123 movs r3, #65 - 4174 0006 C35C ldrb r3, [r0, r3] - 4175 0008 202B cmp r3, #32 - 4176 000a 3DD1 bne .L305 -1600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4177 .loc 1 1600 0 - 4178 000c 0029 cmp r1, #0 - 4179 000e 3DD0 beq .L306 -1600:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4180 .loc 1 1600 0 is_stmt 0 discriminator 1 - 4181 0010 002A cmp r2, #0 - 4182 0012 3DD0 beq .L307 -1605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4183 .loc 1 1605 0 is_stmt 1 - 4184 0014 2033 adds r3, r3, #32 - 4185 0016 C35C ldrb r3, [r0, r3] - 4186 0018 012B cmp r3, #1 - 4187 001a 3BD0 beq .L308 -1605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4188 .loc 1 1605 0 is_stmt 0 discriminator 2 - 4189 001c 4026 movs r6, #64 - 4190 001e 0123 movs r3, #1 - 4191 0020 8355 strb r3, [r0, r6] -1607:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; - 4192 .loc 1 1607 0 is_stmt 1 discriminator 2 - 4193 0022 4033 adds r3, r3, #64 - 4194 0024 2120 movs r0, #33 - 4195 .LVL371: - 4196 0026 E054 strb r0, [r4, r3] -1608:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 4197 .loc 1 1608 0 discriminator 2 - 4198 0028 0133 adds r3, r3, #1 - 4199 002a 0138 subs r0, r0, #1 - 4200 002c E054 strb r0, [r4, r3] -1609:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4201 .loc 1 1609 0 discriminator 2 - 4202 002e 0025 movs r5, #0 - 4203 0030 6564 str r5, [r4, #68] -1612:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 4204 .loc 1 1612 0 discriminator 2 - 4205 0032 6162 str r1, [r4, #36] -1613:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; - 4206 .loc 1 1613 0 discriminator 2 - 4207 0034 6285 strh r2, [r4, #42] -1614:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 4208 .loc 1 1614 0 discriminator 2 - 4209 0036 638D ldrh r3, [r4, #42] - 4210 0038 2385 strh r3, [r4, #40] -1615:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; - 4211 .loc 1 1615 0 discriminator 2 - 4212 003a 174B ldr r3, .L309 - 4213 003c E362 str r3, [r4, #44] -1616:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4214 .loc 1 1616 0 discriminator 2 - 4215 003e 174B ldr r3, .L309+4 - 4216 0040 6363 str r3, [r4, #52] -1619:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 170 - - - 4217 .loc 1 1619 0 discriminator 2 - 4218 0042 A36B ldr r3, [r4, #56] - 4219 0044 164A ldr r2, .L309+8 - 4220 .LVL372: - 4221 0046 DA62 str r2, [r3, #44] -1622:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4222 .loc 1 1622 0 discriminator 2 - 4223 0048 A36B ldr r3, [r4, #56] - 4224 004a 164A ldr r2, .L309+12 - 4225 004c 5A63 str r2, [r3, #52] -1625:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; - 4226 .loc 1 1625 0 discriminator 2 - 4227 004e A36B ldr r3, [r4, #56] - 4228 0050 1D63 str r5, [r3, #48] -1626:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4229 .loc 1 1626 0 discriminator 2 - 4230 0052 A36B ldr r3, [r4, #56] - 4231 0054 9D63 str r5, [r3, #56] -1629:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4232 .loc 1 1629 0 discriminator 2 - 4233 0056 2268 ldr r2, [r4] - 4234 0058 2832 adds r2, r2, #40 - 4235 005a 238D ldrh r3, [r4, #40] - 4236 005c A06B ldr r0, [r4, #56] - 4237 005e FFF7FEFF bl HAL_DMA_Start_IT - 4238 .LVL373: -1632:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4239 .loc 1 1632 0 discriminator 2 - 4240 0062 2268 ldr r2, [r4] - 4241 0064 5368 ldr r3, [r2, #4] - 4242 0066 1049 ldr r1, .L309+16 - 4243 0068 0B40 ands r3, r1 - 4244 006a 5360 str r3, [r2, #4] -1635:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4245 .loc 1 1635 0 discriminator 2 - 4246 006c A555 strb r5, [r4, r6] - 4247 .LVL374: - 4248 .LBB224: - 4249 .LBB225: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4250 .loc 1 4785 0 discriminator 2 - 4251 006e 2268 ldr r2, [r4] - 4252 0070 1368 ldr r3, [r2] - 4253 0072 B821 movs r1, #184 - 4254 0074 0B43 orrs r3, r1 - 4255 0076 1360 str r3, [r2] - 4256 .LVL375: - 4257 .LBE225: - 4258 .LBE224: -1644:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4259 .loc 1 1644 0 discriminator 2 - 4260 0078 2268 ldr r2, [r4] - 4261 007a 1168 ldr r1, [r2] - 4262 007c 8023 movs r3, #128 - 4263 007e DB01 lsls r3, r3, #7 - 4264 0080 0B43 orrs r3, r1 - 4265 0082 1360 str r3, [r2] - ARM GAS /tmp/ccpuPECZ.s page 171 - - -1646:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4266 .loc 1 1646 0 discriminator 2 - 4267 0084 0020 movs r0, #0 - 4268 0086 00E0 b .L304 - 4269 .LVL376: - 4270 .L305: -1650:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4271 .loc 1 1650 0 - 4272 0088 0220 movs r0, #2 - 4273 .LVL377: - 4274 .L304: -1652:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4275 .loc 1 1652 0 - 4276 @ sp needed - 4277 .LVL378: - 4278 008a 70BD pop {r4, r5, r6, pc} - 4279 .LVL379: - 4280 .L306: -1602:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4281 .loc 1 1602 0 - 4282 008c 0120 movs r0, #1 - 4283 .LVL380: - 4284 008e FCE7 b .L304 - 4285 .LVL381: - 4286 .L307: - 4287 0090 0120 movs r0, #1 - 4288 .LVL382: - 4289 0092 FAE7 b .L304 - 4290 .LVL383: - 4291 .L308: -1605:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4292 .loc 1 1605 0 - 4293 0094 0220 movs r0, #2 - 4294 .LVL384: - 4295 0096 F8E7 b .L304 - 4296 .L310: - 4297 .align 2 - 4298 .L309: - 4299 0098 0000FFFF .word -65536 - 4300 009c 00000000 .word I2C_Slave_ISR_DMA - 4301 00a0 00000000 .word I2C_DMASlaveTransmitCplt - 4302 00a4 00000000 .word I2C_DMAError - 4303 00a8 FF7FFFFF .word -32769 - 4304 .cfi_endproc - 4305 .LFE53: - 4307 .section .text.HAL_I2C_Slave_Receive_DMA,"ax",%progbits - 4308 .align 1 - 4309 .global HAL_I2C_Slave_Receive_DMA - 4310 .syntax unified - 4311 .code 16 - 4312 .thumb_func - 4313 .fpu softvfp - 4315 HAL_I2C_Slave_Receive_DMA: - 4316 .LFB54: -1663:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) - 4317 .loc 1 1663 0 - 4318 .cfi_startproc - ARM GAS /tmp/ccpuPECZ.s page 172 - - - 4319 @ args = 0, pretend = 0, frame = 0 - 4320 @ frame_needed = 0, uses_anonymous_args = 0 - 4321 .LVL385: - 4322 0000 70B5 push {r4, r5, r6, lr} - 4323 .LCFI29: - 4324 .cfi_def_cfa_offset 16 - 4325 .cfi_offset 4, -16 - 4326 .cfi_offset 5, -12 - 4327 .cfi_offset 6, -8 - 4328 .cfi_offset 14, -4 - 4329 0002 0400 movs r4, r0 -1664:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4330 .loc 1 1664 0 - 4331 0004 4123 movs r3, #65 - 4332 0006 C35C ldrb r3, [r0, r3] - 4333 0008 202B cmp r3, #32 - 4334 000a 3FD1 bne .L313 -1666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4335 .loc 1 1666 0 - 4336 000c 0029 cmp r1, #0 - 4337 000e 3FD0 beq .L314 -1666:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4338 .loc 1 1666 0 is_stmt 0 discriminator 1 - 4339 0010 002A cmp r2, #0 - 4340 0012 3FD0 beq .L315 -1671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4341 .loc 1 1671 0 is_stmt 1 - 4342 0014 2033 adds r3, r3, #32 - 4343 0016 C35C ldrb r3, [r0, r3] - 4344 0018 012B cmp r3, #1 - 4345 001a 3DD0 beq .L316 -1671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4346 .loc 1 1671 0 is_stmt 0 discriminator 2 - 4347 001c 4026 movs r6, #64 - 4348 001e 0123 movs r3, #1 - 4349 0020 8355 strb r3, [r0, r6] -1673:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; - 4350 .loc 1 1673 0 is_stmt 1 discriminator 2 - 4351 0022 4033 adds r3, r3, #64 - 4352 0024 2220 movs r0, #34 - 4353 .LVL386: - 4354 0026 E054 strb r0, [r4, r3] -1674:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 4355 .loc 1 1674 0 discriminator 2 - 4356 0028 0133 adds r3, r3, #1 - 4357 002a 0238 subs r0, r0, #2 - 4358 002c E054 strb r0, [r4, r3] -1675:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4359 .loc 1 1675 0 discriminator 2 - 4360 002e 0025 movs r5, #0 - 4361 0030 6564 str r5, [r4, #68] -1678:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 4362 .loc 1 1678 0 discriminator 2 - 4363 0032 6162 str r1, [r4, #36] -1679:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; - 4364 .loc 1 1679 0 discriminator 2 - 4365 0034 6285 strh r2, [r4, #42] - ARM GAS /tmp/ccpuPECZ.s page 173 - - -1680:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 4366 .loc 1 1680 0 discriminator 2 - 4367 0036 638D ldrh r3, [r4, #42] - 4368 0038 2385 strh r3, [r4, #40] -1681:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; - 4369 .loc 1 1681 0 discriminator 2 - 4370 003a 184B ldr r3, .L317 - 4371 003c E362 str r3, [r4, #44] -1682:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4372 .loc 1 1682 0 discriminator 2 - 4373 003e 184B ldr r3, .L317+4 - 4374 0040 6363 str r3, [r4, #52] -1685:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4375 .loc 1 1685 0 discriminator 2 - 4376 0042 E36B ldr r3, [r4, #60] - 4377 0044 174A ldr r2, .L317+8 - 4378 .LVL387: - 4379 0046 DA62 str r2, [r3, #44] -1688:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4380 .loc 1 1688 0 discriminator 2 - 4381 0048 E36B ldr r3, [r4, #60] - 4382 004a 174A ldr r2, .L317+12 - 4383 004c 5A63 str r2, [r3, #52] -1691:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; - 4384 .loc 1 1691 0 discriminator 2 - 4385 004e E36B ldr r3, [r4, #60] - 4386 0050 1D63 str r5, [r3, #48] -1692:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4387 .loc 1 1692 0 discriminator 2 - 4388 0052 E36B ldr r3, [r4, #60] - 4389 0054 9D63 str r5, [r3, #56] -1695:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4390 .loc 1 1695 0 discriminator 2 - 4391 0056 2068 ldr r0, [r4] - 4392 0058 2430 adds r0, r0, #36 - 4393 005a 238D ldrh r3, [r4, #40] - 4394 005c 0A00 movs r2, r1 - 4395 005e 0100 movs r1, r0 - 4396 .LVL388: - 4397 0060 E06B ldr r0, [r4, #60] - 4398 0062 FFF7FEFF bl HAL_DMA_Start_IT - 4399 .LVL389: -1698:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4400 .loc 1 1698 0 discriminator 2 - 4401 0066 2268 ldr r2, [r4] - 4402 0068 5368 ldr r3, [r2, #4] - 4403 006a 1049 ldr r1, .L317+16 - 4404 006c 0B40 ands r3, r1 - 4405 006e 5360 str r3, [r2, #4] -1701:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4406 .loc 1 1701 0 discriminator 2 - 4407 0070 A555 strb r5, [r4, r6] - 4408 .LVL390: - 4409 .LBB226: - 4410 .LBB227: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4411 .loc 1 4785 0 discriminator 2 - ARM GAS /tmp/ccpuPECZ.s page 174 - - - 4412 0072 2268 ldr r2, [r4] - 4413 0074 1368 ldr r3, [r2] - 4414 0076 B821 movs r1, #184 - 4415 0078 0B43 orrs r3, r1 - 4416 007a 1360 str r3, [r2] - 4417 .LVL391: - 4418 .LBE227: - 4419 .LBE226: -1710:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4420 .loc 1 1710 0 discriminator 2 - 4421 007c 2268 ldr r2, [r4] - 4422 007e 1168 ldr r1, [r2] - 4423 0080 8023 movs r3, #128 - 4424 0082 1B02 lsls r3, r3, #8 - 4425 0084 0B43 orrs r3, r1 - 4426 0086 1360 str r3, [r2] -1712:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4427 .loc 1 1712 0 discriminator 2 - 4428 0088 0020 movs r0, #0 - 4429 008a 00E0 b .L312 - 4430 .LVL392: - 4431 .L313: -1716:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4432 .loc 1 1716 0 - 4433 008c 0220 movs r0, #2 - 4434 .LVL393: - 4435 .L312: -1718:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 4436 .loc 1 1718 0 - 4437 @ sp needed - 4438 .LVL394: - 4439 008e 70BD pop {r4, r5, r6, pc} - 4440 .LVL395: - 4441 .L314: -1668:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4442 .loc 1 1668 0 - 4443 0090 0120 movs r0, #1 - 4444 .LVL396: - 4445 0092 FCE7 b .L312 - 4446 .LVL397: - 4447 .L315: - 4448 0094 0120 movs r0, #1 - 4449 .LVL398: - 4450 0096 FAE7 b .L312 - 4451 .LVL399: - 4452 .L316: -1671:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4453 .loc 1 1671 0 - 4454 0098 0220 movs r0, #2 - 4455 .LVL400: - 4456 009a F8E7 b .L312 - 4457 .L318: - 4458 .align 2 - 4459 .L317: - 4460 009c 0000FFFF .word -65536 - 4461 00a0 00000000 .word I2C_Slave_ISR_DMA - 4462 00a4 00000000 .word I2C_DMASlaveReceiveCplt - ARM GAS /tmp/ccpuPECZ.s page 175 - - - 4463 00a8 00000000 .word I2C_DMAError - 4464 00ac FF7FFFFF .word -32769 - 4465 .cfi_endproc - 4466 .LFE54: - 4468 .section .text.HAL_I2C_Mem_Write,"ax",%progbits - 4469 .align 1 - 4470 .global HAL_I2C_Mem_Write - 4471 .syntax unified - 4472 .code 16 - 4473 .thumb_func - 4474 .fpu softvfp - 4476 HAL_I2C_Mem_Write: - 4477 .LFB55: -1733:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 4478 .loc 1 1733 0 - 4479 .cfi_startproc - 4480 @ args = 12, pretend = 0, frame = 16 - 4481 @ frame_needed = 0, uses_anonymous_args = 0 - 4482 .LVL401: - 4483 0000 F0B5 push {r4, r5, r6, r7, lr} - 4484 .LCFI30: - 4485 .cfi_def_cfa_offset 20 - 4486 .cfi_offset 4, -20 - 4487 .cfi_offset 5, -16 - 4488 .cfi_offset 6, -12 - 4489 .cfi_offset 7, -8 - 4490 .cfi_offset 14, -4 - 4491 0002 87B0 sub sp, sp, #28 - 4492 .LCFI31: - 4493 .cfi_def_cfa_offset 48 - 4494 0004 0400 movs r4, r0 - 4495 0006 0391 str r1, [sp, #12] - 4496 0008 0492 str r2, [sp, #16] - 4497 000a 0593 str r3, [sp, #20] - 4498 000c 0CAB add r3, sp, #48 - 4499 .LVL402: - 4500 000e 20CB ldmia r3!, {r5} - 4501 .LVL403: - 4502 0010 1F88 ldrh r7, [r3] - 4503 .LVL404: -1739:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4504 .loc 1 1739 0 - 4505 0012 4123 movs r3, #65 - 4506 .LVL405: - 4507 0014 C35C ldrb r3, [r0, r3] - 4508 0016 202B cmp r3, #32 - 4509 0018 00D0 beq .LCB4820 - 4510 001a E1E0 b .L332 @long jump - 4511 .LCB4820: -1741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4512 .loc 1 1741 0 - 4513 001c 002D cmp r5, #0 - 4514 001e 00D1 bne .LCB4822 - 4515 0020 E1E0 b .L333 @long jump - 4516 .LCB4822: -1741:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4517 .loc 1 1741 0 is_stmt 0 discriminator 1 - ARM GAS /tmp/ccpuPECZ.s page 176 - - - 4518 0022 002F cmp r7, #0 - 4519 0024 00D1 bne .LCB4824 - 4520 0026 E0E0 b .L334 @long jump - 4521 .LCB4824: -1747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4522 .loc 1 1747 0 is_stmt 1 - 4523 0028 2033 adds r3, r3, #32 - 4524 002a C35C ldrb r3, [r0, r3] - 4525 002c 012B cmp r3, #1 - 4526 002e 00D1 bne .LCB4828 - 4527 0030 DDE0 b .L335 @long jump - 4528 .LCB4828: -1747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4529 .loc 1 1747 0 is_stmt 0 discriminator 2 - 4530 0032 4023 movs r3, #64 - 4531 0034 0122 movs r2, #1 - 4532 .LVL406: - 4533 0036 C254 strb r2, [r0, r3] -1750:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4534 .loc 1 1750 0 is_stmt 1 discriminator 2 - 4535 0038 FFF7FEFF bl HAL_GetTick - 4536 .LVL407: - 4537 003c 0600 movs r6, r0 - 4538 .LVL408: - 4539 .L321: - 4540 .LBB228: - 4541 .LBB229: -4487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4542 .loc 1 4487 0 - 4543 003e 2368 ldr r3, [r4] - 4544 0040 9B69 ldr r3, [r3, #24] - 4545 0042 1B04 lsls r3, r3, #16 - 4546 0044 0ED5 bpl .L339 -4492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4547 .loc 1 4492 0 - 4548 0046 FFF7FEFF bl HAL_GetTick - 4549 .LVL409: - 4550 004a 801B subs r0, r0, r6 - 4551 004c 1928 cmp r0, #25 - 4552 004e F6D9 bls .L321 -4494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 4553 .loc 1 4494 0 - 4554 0050 4123 movs r3, #65 - 4555 0052 2022 movs r2, #32 - 4556 0054 E254 strb r2, [r4, r3] -4495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4557 .loc 1 4495 0 - 4558 0056 0023 movs r3, #0 - 4559 0058 2232 adds r2, r2, #34 - 4560 005a A354 strb r3, [r4, r2] -4498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 4561 .loc 1 4498 0 - 4562 005c 023A subs r2, r2, #2 - 4563 005e A354 strb r3, [r4, r2] - 4564 .LVL410: - 4565 .LBE229: - 4566 .LBE228: - ARM GAS /tmp/ccpuPECZ.s page 177 - - -1754:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4567 .loc 1 1754 0 - 4568 0060 0320 movs r0, #3 - 4569 0062 BEE0 b .L320 - 4570 .LVL411: - 4571 .L339: -1757:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; - 4572 .loc 1 1757 0 - 4573 0064 4123 movs r3, #65 - 4574 0066 2122 movs r2, #33 - 4575 0068 E254 strb r2, [r4, r3] -1758:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 4576 .loc 1 1758 0 - 4577 006a 0133 adds r3, r3, #1 - 4578 006c 1F32 adds r2, r2, #31 - 4579 006e E254 strb r2, [r4, r3] -1759:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4580 .loc 1 1759 0 - 4581 0070 0023 movs r3, #0 - 4582 0072 6364 str r3, [r4, #68] -1762:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 4583 .loc 1 1762 0 - 4584 0074 6562 str r5, [r4, #36] -1763:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; - 4585 .loc 1 1763 0 - 4586 0076 6785 strh r7, [r4, #42] -1764:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4587 .loc 1 1764 0 - 4588 0078 6363 str r3, [r4, #52] -1767:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4589 .loc 1 1767 0 - 4590 007a 0196 str r6, [sp, #4] - 4591 007c 0E9B ldr r3, [sp, #56] - 4592 007e 0093 str r3, [sp] - 4593 0080 059B ldr r3, [sp, #20] - 4594 0082 049A ldr r2, [sp, #16] - 4595 0084 0399 ldr r1, [sp, #12] - 4596 0086 2000 movs r0, r4 - 4597 0088 FFF7FEFF bl I2C_RequestMemoryWrite - 4598 .LVL412: - 4599 008c 0028 cmp r0, #0 - 4600 008e 0CD0 beq .L323 -1769:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4601 .loc 1 1769 0 - 4602 0090 636C ldr r3, [r4, #68] - 4603 0092 042B cmp r3, #4 - 4604 0094 04D1 bne .L324 -1772:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 4605 .loc 1 1772 0 - 4606 0096 3C33 adds r3, r3, #60 - 4607 0098 0022 movs r2, #0 - 4608 009a E254 strb r2, [r4, r3] -1773:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4609 .loc 1 1773 0 - 4610 009c 0120 movs r0, #1 - 4611 009e A0E0 b .L320 - 4612 .L324: - ARM GAS /tmp/ccpuPECZ.s page 178 - - -1778:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 4613 .loc 1 1778 0 - 4614 00a0 4023 movs r3, #64 - 4615 00a2 0022 movs r2, #0 - 4616 00a4 E254 strb r2, [r4, r3] -1779:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4617 .loc 1 1779 0 - 4618 00a6 0320 movs r0, #3 - 4619 00a8 9BE0 b .L320 - 4620 .L323: -1784:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4621 .loc 1 1784 0 - 4622 00aa 638D ldrh r3, [r4, #42] - 4623 00ac 9BB2 uxth r3, r3 - 4624 00ae FF2B cmp r3, #255 - 4625 00b0 11D9 bls .L325 -1786:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - 4626 .loc 1 1786 0 - 4627 00b2 FF23 movs r3, #255 - 4628 00b4 2385 strh r3, [r4, #40] - 4629 .LVL413: - 4630 .LBB230: - 4631 .LBB231: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 4632 .loc 1 4713 0 - 4633 00b6 2068 ldr r0, [r4] - 4634 00b8 4368 ldr r3, [r0, #4] - 4635 00ba 514A ldr r2, .L342 - 4636 00bc 1340 ands r3, r2 - 4637 00be 039A ldr r2, [sp, #12] - 4638 00c0 9105 lsls r1, r2, #22 - 4639 00c2 890D lsrs r1, r1, #22 - 4640 00c4 FF22 movs r2, #255 - 4641 00c6 1204 lsls r2, r2, #16 - 4642 00c8 1143 orrs r1, r2 - 4643 00ca 8022 movs r2, #128 - 4644 00cc 5204 lsls r2, r2, #17 - 4645 00ce 0A43 orrs r2, r1 - 4646 00d0 1343 orrs r3, r2 - 4647 00d2 4360 str r3, [r0, #4] - 4648 00d4 2EE0 b .L330 - 4649 .LVL414: - 4650 .L325: - 4651 .LBE231: - 4652 .LBE230: -1791:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - 4653 .loc 1 1791 0 - 4654 00d6 638D ldrh r3, [r4, #42] - 4655 00d8 9BB2 uxth r3, r3 - 4656 00da 2385 strh r3, [r4, #40] -1792:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4657 .loc 1 1792 0 - 4658 00dc DBB2 uxtb r3, r3 - 4659 .LVL415: - 4660 .LBB232: - 4661 .LBB233: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - ARM GAS /tmp/ccpuPECZ.s page 179 - - - 4662 .loc 1 4713 0 - 4663 00de 2068 ldr r0, [r4] - 4664 00e0 4268 ldr r2, [r0, #4] - 4665 00e2 4749 ldr r1, .L342 - 4666 00e4 0A40 ands r2, r1 - 4667 00e6 0399 ldr r1, [sp, #12] - 4668 00e8 8905 lsls r1, r1, #22 - 4669 00ea 890D lsrs r1, r1, #22 - 4670 00ec 1B04 lsls r3, r3, #16 - 4671 .LVL416: - 4672 00ee 0B43 orrs r3, r1 - 4673 00f0 8021 movs r1, #128 - 4674 00f2 8904 lsls r1, r1, #18 - 4675 00f4 0B43 orrs r3, r1 - 4676 00f6 1343 orrs r3, r2 - 4677 00f8 4360 str r3, [r0, #4] - 4678 .LVL417: - 4679 00fa 1BE0 b .L330 - 4680 .LVL418: - 4681 .L341: - 4682 .LBE233: - 4683 .LBE232: -1800:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4684 .loc 1 1800 0 - 4685 00fc 636C ldr r3, [r4, #68] - 4686 00fe 042B cmp r3, #4 - 4687 0100 00D0 beq .LCB5020 - 4688 0102 76E0 b .L336 @long jump - 4689 .LCB5020: -1802:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4690 .loc 1 1802 0 - 4691 0104 0120 movs r0, #1 - 4692 0106 6CE0 b .L320 - 4693 .L329: -1830:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - 4694 .loc 1 1830 0 - 4695 0108 638D ldrh r3, [r4, #42] - 4696 010a 9BB2 uxth r3, r3 - 4697 010c 2385 strh r3, [r4, #40] -1831:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4698 .loc 1 1831 0 - 4699 010e DBB2 uxtb r3, r3 - 4700 .LVL419: - 4701 .LBB234: - 4702 .LBB235: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 4703 .loc 1 4713 0 - 4704 0110 2068 ldr r0, [r4] - 4705 0112 4268 ldr r2, [r0, #4] - 4706 0114 3A49 ldr r1, .L342 - 4707 0116 0A40 ands r2, r1 - 4708 0118 0399 ldr r1, [sp, #12] - 4709 011a 8905 lsls r1, r1, #22 - 4710 011c 890D lsrs r1, r1, #22 - 4711 011e 1B04 lsls r3, r3, #16 - 4712 .LVL420: - 4713 0120 0B43 orrs r3, r1 - ARM GAS /tmp/ccpuPECZ.s page 180 - - - 4714 0122 8021 movs r1, #128 - 4715 0124 8904 lsls r1, r1, #18 - 4716 0126 0B43 orrs r3, r1 - 4717 0128 1343 orrs r3, r2 - 4718 012a 4360 str r3, [r0, #4] - 4719 .LVL421: - 4720 .L328: - 4721 .LBE235: - 4722 .LBE234: -1836:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4723 .loc 1 1836 0 - 4724 012c 638D ldrh r3, [r4, #42] - 4725 012e 9BB2 uxth r3, r3 - 4726 0130 002B cmp r3, #0 - 4727 0132 39D0 beq .L340 - 4728 .L330: -1798:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4729 .loc 1 1798 0 - 4730 0134 3200 movs r2, r6 - 4731 0136 0E99 ldr r1, [sp, #56] - 4732 0138 2000 movs r0, r4 - 4733 013a FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout - 4734 .LVL422: - 4735 013e 0028 cmp r0, #0 - 4736 0140 DCD1 bne .L341 -1811:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 4737 .loc 1 1811 0 - 4738 0142 636A ldr r3, [r4, #36] - 4739 0144 5A1C adds r2, r3, #1 - 4740 0146 6262 str r2, [r4, #36] - 4741 0148 2268 ldr r2, [r4] - 4742 014a 1B78 ldrb r3, [r3] - 4743 014c 9362 str r3, [r2, #40] -1812:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; - 4744 .loc 1 1812 0 - 4745 014e 638D ldrh r3, [r4, #42] - 4746 0150 013B subs r3, r3, #1 - 4747 0152 9BB2 uxth r3, r3 - 4748 0154 6385 strh r3, [r4, #42] -1813:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4749 .loc 1 1813 0 - 4750 0156 238D ldrh r3, [r4, #40] - 4751 0158 013B subs r3, r3, #1 - 4752 015a 9BB2 uxth r3, r3 - 4753 015c 2385 strh r3, [r4, #40] -1815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4754 .loc 1 1815 0 - 4755 015e 002B cmp r3, #0 - 4756 0160 E4D1 bne .L328 -1815:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4757 .loc 1 1815 0 is_stmt 0 discriminator 1 - 4758 0162 638D ldrh r3, [r4, #42] - 4759 0164 9BB2 uxth r3, r3 - 4760 0166 002B cmp r3, #0 - 4761 0168 E0D0 beq .L328 -1818:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4762 .loc 1 1818 0 is_stmt 1 - ARM GAS /tmp/ccpuPECZ.s page 181 - - - 4763 016a 0096 str r6, [sp] - 4764 016c 0E9B ldr r3, [sp, #56] - 4765 016e 0022 movs r2, #0 - 4766 0170 8021 movs r1, #128 - 4767 0172 2000 movs r0, r4 - 4768 0174 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 4769 .LVL423: - 4770 0178 0028 cmp r0, #0 - 4771 017a 3CD1 bne .L337 -1823:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4772 .loc 1 1823 0 - 4773 017c 638D ldrh r3, [r4, #42] - 4774 017e 9BB2 uxth r3, r3 - 4775 0180 FF2B cmp r3, #255 - 4776 0182 C1D9 bls .L329 -1825:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - 4777 .loc 1 1825 0 - 4778 0184 FF23 movs r3, #255 - 4779 0186 2385 strh r3, [r4, #40] - 4780 .LVL424: - 4781 .LBB236: - 4782 .LBB237: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 4783 .loc 1 4713 0 - 4784 0188 2068 ldr r0, [r4] - 4785 018a 4368 ldr r3, [r0, #4] - 4786 018c 1C4A ldr r2, .L342 - 4787 018e 1340 ands r3, r2 - 4788 0190 039A ldr r2, [sp, #12] - 4789 0192 9105 lsls r1, r2, #22 - 4790 0194 890D lsrs r1, r1, #22 - 4791 0196 FF22 movs r2, #255 - 4792 0198 1204 lsls r2, r2, #16 - 4793 019a 1143 orrs r1, r2 - 4794 019c 8022 movs r2, #128 - 4795 019e 5204 lsls r2, r2, #17 - 4796 01a0 0A43 orrs r2, r1 - 4797 01a2 1343 orrs r3, r2 - 4798 01a4 4360 str r3, [r0, #4] - 4799 01a6 C1E7 b .L328 - 4800 .LVL425: - 4801 .L340: - 4802 .LBE237: - 4803 .LBE236: -1840:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4804 .loc 1 1840 0 - 4805 01a8 3200 movs r2, r6 - 4806 01aa 0E99 ldr r1, [sp, #56] - 4807 01ac 2000 movs r0, r4 - 4808 01ae FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout - 4809 .LVL426: - 4810 01b2 0028 cmp r0, #0 - 4811 01b4 04D0 beq .L331 -1842:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4812 .loc 1 1842 0 - 4813 01b6 636C ldr r3, [r4, #68] - 4814 01b8 042B cmp r3, #4 - ARM GAS /tmp/ccpuPECZ.s page 182 - - - 4815 01ba 1ED1 bne .L338 -1844:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4816 .loc 1 1844 0 - 4817 01bc 0120 movs r0, #1 - 4818 01be 10E0 b .L320 - 4819 .L331: -1853:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4820 .loc 1 1853 0 - 4821 01c0 2368 ldr r3, [r4] - 4822 01c2 2022 movs r2, #32 - 4823 01c4 DA61 str r2, [r3, #28] -1856:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4824 .loc 1 1856 0 - 4825 01c6 2168 ldr r1, [r4] - 4826 01c8 4B68 ldr r3, [r1, #4] - 4827 01ca 0E4D ldr r5, .L342+4 - 4828 01cc 2B40 ands r3, r5 - 4829 01ce 4B60 str r3, [r1, #4] -1858:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 4830 .loc 1 1858 0 - 4831 01d0 4123 movs r3, #65 - 4832 01d2 E254 strb r2, [r4, r3] -1859:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4833 .loc 1 1859 0 - 4834 01d4 0023 movs r3, #0 - 4835 01d6 2232 adds r2, r2, #34 - 4836 01d8 A354 strb r3, [r4, r2] -1862:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4837 .loc 1 1862 0 - 4838 01da 023A subs r2, r2, #2 - 4839 01dc A354 strb r3, [r4, r2] -1864:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4840 .loc 1 1864 0 - 4841 01de 00E0 b .L320 - 4842 .LVL427: - 4843 .L332: -1868:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4844 .loc 1 1868 0 - 4845 01e0 0220 movs r0, #2 - 4846 .LVL428: - 4847 .L320: -1870:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4848 .loc 1 1870 0 - 4849 01e2 07B0 add sp, sp, #28 - 4850 @ sp needed - 4851 .LVL429: - 4852 01e4 F0BD pop {r4, r5, r6, r7, pc} - 4853 .LVL430: - 4854 .L333: -1743:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4855 .loc 1 1743 0 - 4856 01e6 0120 movs r0, #1 - 4857 .LVL431: - 4858 01e8 FBE7 b .L320 - 4859 .LVL432: - 4860 .L334: - 4861 01ea 0120 movs r0, #1 - ARM GAS /tmp/ccpuPECZ.s page 183 - - - 4862 .LVL433: - 4863 01ec F9E7 b .L320 - 4864 .LVL434: - 4865 .L335: -1747:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4866 .loc 1 1747 0 - 4867 01ee 0220 movs r0, #2 - 4868 .LVL435: - 4869 01f0 F7E7 b .L320 - 4870 .LVL436: - 4871 .L336: -1806:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4872 .loc 1 1806 0 - 4873 01f2 0320 movs r0, #3 - 4874 01f4 F5E7 b .L320 - 4875 .L337: -1820:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4876 .loc 1 1820 0 - 4877 01f6 0320 movs r0, #3 - 4878 01f8 F3E7 b .L320 - 4879 .L338: -1848:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4880 .loc 1 1848 0 - 4881 01fa 0320 movs r0, #3 - 4882 01fc F1E7 b .L320 - 4883 .L343: - 4884 01fe C046 .align 2 - 4885 .L342: - 4886 0200 009C00FC .word -67068928 - 4887 0204 00E800FE .word -33495040 - 4888 .cfi_endproc - 4889 .LFE55: - 4891 .section .text.HAL_I2C_Mem_Read,"ax",%progbits - 4892 .align 1 - 4893 .global HAL_I2C_Mem_Read - 4894 .syntax unified - 4895 .code 16 - 4896 .thumb_func - 4897 .fpu softvfp - 4899 HAL_I2C_Mem_Read: - 4900 .LFB56: -1886:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 4901 .loc 1 1886 0 - 4902 .cfi_startproc - 4903 @ args = 12, pretend = 0, frame = 16 - 4904 @ frame_needed = 0, uses_anonymous_args = 0 - 4905 .LVL437: - 4906 0000 F0B5 push {r4, r5, r6, r7, lr} - 4907 .LCFI32: - 4908 .cfi_def_cfa_offset 20 - 4909 .cfi_offset 4, -20 - 4910 .cfi_offset 5, -16 - 4911 .cfi_offset 6, -12 - 4912 .cfi_offset 7, -8 - 4913 .cfi_offset 14, -4 - 4914 0002 87B0 sub sp, sp, #28 - 4915 .LCFI33: - ARM GAS /tmp/ccpuPECZ.s page 184 - - - 4916 .cfi_def_cfa_offset 48 - 4917 0004 0400 movs r4, r0 - 4918 0006 0391 str r1, [sp, #12] - 4919 0008 0492 str r2, [sp, #16] - 4920 000a 0593 str r3, [sp, #20] - 4921 000c 0CAB add r3, sp, #48 - 4922 .LVL438: - 4923 000e 20CB ldmia r3!, {r5} - 4924 .LVL439: - 4925 0010 1F88 ldrh r7, [r3] - 4926 .LVL440: -1892:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4927 .loc 1 1892 0 - 4928 0012 4123 movs r3, #65 - 4929 .LVL441: - 4930 0014 C35C ldrb r3, [r0, r3] - 4931 0016 202B cmp r3, #32 - 4932 0018 00D0 beq .LCB5317 - 4933 001a F6E0 b .L345 @long jump - 4934 .LCB5317: -1894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4935 .loc 1 1894 0 - 4936 001c 002D cmp r5, #0 - 4937 001e 22D0 beq .L346 -1894:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4938 .loc 1 1894 0 is_stmt 0 discriminator 1 - 4939 0020 002F cmp r7, #0 - 4940 0022 20D0 beq .L346 -1901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4941 .loc 1 1901 0 is_stmt 1 - 4942 0024 4023 movs r3, #64 - 4943 0026 C35C ldrb r3, [r0, r3] - 4944 0028 012B cmp r3, #1 - 4945 002a 00D1 bne .LCB5325 - 4946 002c F2E0 b .L361 @long jump - 4947 .LCB5325: -1901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4948 .loc 1 1901 0 is_stmt 0 discriminator 2 - 4949 002e 4023 movs r3, #64 - 4950 0030 0122 movs r2, #1 - 4951 .LVL442: - 4952 0032 C254 strb r2, [r0, r3] -1904:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4953 .loc 1 1904 0 is_stmt 1 discriminator 2 - 4954 0034 FFF7FEFF bl HAL_GetTick - 4955 .LVL443: - 4956 0038 0600 movs r6, r0 - 4957 .LVL444: - 4958 .L349: - 4959 .LBB238: - 4960 .LBB239: -4487:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4961 .loc 1 4487 0 - 4962 003a 2368 ldr r3, [r4] - 4963 003c 9B69 ldr r3, [r3, #24] - 4964 003e 1B04 lsls r3, r3, #16 - 4965 0040 17D5 bpl .L363 - ARM GAS /tmp/ccpuPECZ.s page 185 - - -4492:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 4966 .loc 1 4492 0 - 4967 0042 FFF7FEFF bl HAL_GetTick - 4968 .LVL445: - 4969 0046 801B subs r0, r0, r6 - 4970 0048 1928 cmp r0, #25 - 4971 004a F6D9 bls .L349 -4494:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 4972 .loc 1 4494 0 - 4973 004c 4123 movs r3, #65 - 4974 004e 2022 movs r2, #32 - 4975 0050 E254 strb r2, [r4, r3] -4495:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 4976 .loc 1 4495 0 - 4977 0052 0023 movs r3, #0 - 4978 0054 2232 adds r2, r2, #34 - 4979 0056 A354 strb r3, [r4, r2] -4498:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 4980 .loc 1 4498 0 - 4981 0058 023A subs r2, r2, #2 - 4982 005a A354 strb r3, [r4, r2] - 4983 .LVL446: - 4984 .LBE239: - 4985 .LBE238: -1908:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 4986 .loc 1 1908 0 - 4987 005c 6E48 ldr r0, .L369 - 4988 005e FFF7FEFF bl vcom_Send - 4989 .LVL447: -1909:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 4990 .loc 1 1909 0 - 4991 0062 0320 movs r0, #3 - 4992 0064 03E0 b .L348 - 4993 .LVL448: - 4994 .L346: -1896:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 4995 .loc 1 1896 0 - 4996 0066 6D48 ldr r0, .L369+4 - 4997 .LVL449: - 4998 0068 FFF7FEFF bl vcom_Send - 4999 .LVL450: -1897:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5000 .loc 1 1897 0 - 5001 006c 0120 movs r0, #1 - 5002 .LVL451: - 5003 .L348: -2023:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** /** - 5004 .loc 1 2023 0 - 5005 006e 07B0 add sp, sp, #28 - 5006 @ sp needed - 5007 .LVL452: - 5008 0070 F0BD pop {r4, r5, r6, r7, pc} - 5009 .LVL453: - 5010 .L363: -1912:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; - 5011 .loc 1 1912 0 - 5012 0072 4123 movs r3, #65 - ARM GAS /tmp/ccpuPECZ.s page 186 - - - 5013 0074 2222 movs r2, #34 - 5014 0076 E254 strb r2, [r4, r3] -1913:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 5015 .loc 1 1913 0 - 5016 0078 0133 adds r3, r3, #1 - 5017 007a 1E32 adds r2, r2, #30 - 5018 007c E254 strb r2, [r4, r3] -1914:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5019 .loc 1 1914 0 - 5020 007e 0023 movs r3, #0 - 5021 0080 6364 str r3, [r4, #68] -1917:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 5022 .loc 1 1917 0 - 5023 0082 6562 str r5, [r4, #36] -1918:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = NULL; - 5024 .loc 1 1918 0 - 5025 0084 6785 strh r7, [r4, #42] -1919:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5026 .loc 1 1919 0 - 5027 0086 6363 str r3, [r4, #52] -1922:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5028 .loc 1 1922 0 - 5029 0088 0196 str r6, [sp, #4] - 5030 008a 0E9B ldr r3, [sp, #56] - 5031 008c 0093 str r3, [sp] - 5032 008e 059B ldr r3, [sp, #20] - 5033 0090 049A ldr r2, [sp, #16] - 5034 0092 0399 ldr r1, [sp, #12] - 5035 0094 2000 movs r0, r4 - 5036 0096 FFF7FEFF bl I2C_RequestMemoryRead - 5037 .LVL454: - 5038 009a 0028 cmp r0, #0 - 5039 009c 14D1 bne .L364 -1941:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5040 .loc 1 1941 0 - 5041 009e 638D ldrh r3, [r4, #42] - 5042 00a0 9BB2 uxth r3, r3 - 5043 00a2 FF2B cmp r3, #255 - 5044 00a4 21D9 bls .L353 -1943:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ - 5045 .loc 1 1943 0 - 5046 00a6 FF23 movs r3, #255 - 5047 00a8 2385 strh r3, [r4, #40] - 5048 .LVL455: - 5049 .LBB240: - 5050 .LBB241: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 5051 .loc 1 4713 0 - 5052 00aa 2068 ldr r0, [r4] - 5053 00ac 4368 ldr r3, [r0, #4] - 5054 00ae 5C4A ldr r2, .L369+8 - 5055 00b0 1340 ands r3, r2 - 5056 00b2 039A ldr r2, [sp, #12] - 5057 00b4 9105 lsls r1, r2, #22 - 5058 00b6 890D lsrs r1, r1, #22 - 5059 00b8 FF22 movs r2, #255 - 5060 00ba 1204 lsls r2, r2, #16 - ARM GAS /tmp/ccpuPECZ.s page 187 - - - 5061 00bc 1143 orrs r1, r2 - 5062 00be 594A ldr r2, .L369+12 - 5063 00c0 0A43 orrs r2, r1 - 5064 00c2 1343 orrs r3, r2 - 5065 00c4 4360 str r3, [r0, #4] - 5066 00c6 42E0 b .L359 - 5067 .LVL456: - 5068 .L364: - 5069 .LBE241: - 5070 .LBE240: -1924:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 5071 .loc 1 1924 0 - 5072 00c8 616C ldr r1, [r4, #68] - 5073 00ca 5748 ldr r0, .L369+16 - 5074 00cc FFF7FEFF bl vcom_Send - 5075 .LVL457: -1925:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5076 .loc 1 1925 0 - 5077 00d0 636C ldr r3, [r4, #68] - 5078 00d2 042B cmp r3, #4 - 5079 00d4 04D1 bne .L352 -1928:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 5080 .loc 1 1928 0 - 5081 00d6 3C33 adds r3, r3, #60 - 5082 00d8 0022 movs r2, #0 - 5083 00da E254 strb r2, [r4, r3] -1929:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5084 .loc 1 1929 0 - 5085 00dc 0120 movs r0, #1 - 5086 00de C6E7 b .L348 - 5087 .L352: -1934:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 5088 .loc 1 1934 0 - 5089 00e0 4023 movs r3, #64 - 5090 00e2 0022 movs r2, #0 - 5091 00e4 E254 strb r2, [r4, r3] -1935:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5092 .loc 1 1935 0 - 5093 00e6 0320 movs r0, #3 - 5094 00e8 C1E7 b .L348 - 5095 .L353: -1948:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_REA - 5096 .loc 1 1948 0 - 5097 00ea 638D ldrh r3, [r4, #42] - 5098 00ec 9BB2 uxth r3, r3 - 5099 00ee 2385 strh r3, [r4, #40] -1949:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5100 .loc 1 1949 0 - 5101 00f0 DBB2 uxtb r3, r3 - 5102 .LVL458: - 5103 .LBB242: - 5104 .LBB243: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 5105 .loc 1 4713 0 - 5106 00f2 2068 ldr r0, [r4] - 5107 00f4 4268 ldr r2, [r0, #4] - 5108 00f6 4A49 ldr r1, .L369+8 - ARM GAS /tmp/ccpuPECZ.s page 188 - - - 5109 00f8 0A40 ands r2, r1 - 5110 00fa 0399 ldr r1, [sp, #12] - 5111 00fc 8905 lsls r1, r1, #22 - 5112 00fe 890D lsrs r1, r1, #22 - 5113 0100 1B04 lsls r3, r3, #16 - 5114 .LVL459: - 5115 0102 0B43 orrs r3, r1 - 5116 0104 4949 ldr r1, .L369+20 - 5117 0106 0B43 orrs r3, r1 - 5118 0108 1343 orrs r3, r2 - 5119 010a 4360 str r3, [r0, #4] - 5120 .LVL460: - 5121 010c 1FE0 b .L359 - 5122 .LVL461: - 5123 .L366: - 5124 .LBE243: - 5125 .LBE242: -1957:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 5126 .loc 1 1957 0 - 5127 010e 4848 ldr r0, .L369+24 - 5128 0110 FFF7FEFF bl vcom_Send - 5129 .LVL462: -1958:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5130 .loc 1 1958 0 - 5131 0114 0320 movs r0, #3 - 5132 0116 AAE7 b .L348 - 5133 .L367: -1971:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 5134 .loc 1 1971 0 - 5135 0118 4648 ldr r0, .L369+28 - 5136 011a FFF7FEFF bl vcom_Send - 5137 .LVL463: -1972:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5138 .loc 1 1972 0 - 5139 011e 0320 movs r0, #3 - 5140 0120 A5E7 b .L348 - 5141 .L358: -1982:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); - 5142 .loc 1 1982 0 - 5143 0122 638D ldrh r3, [r4, #42] - 5144 0124 9BB2 uxth r3, r3 - 5145 0126 2385 strh r3, [r4, #40] -1983:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5146 .loc 1 1983 0 - 5147 0128 DBB2 uxtb r3, r3 - 5148 .LVL464: - 5149 .LBB244: - 5150 .LBB245: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 5151 .loc 1 4713 0 - 5152 012a 2068 ldr r0, [r4] - 5153 012c 4268 ldr r2, [r0, #4] - 5154 012e 4249 ldr r1, .L369+32 - 5155 0130 0A40 ands r2, r1 - 5156 0132 0399 ldr r1, [sp, #12] - 5157 0134 8905 lsls r1, r1, #22 - 5158 0136 890D lsrs r1, r1, #22 - ARM GAS /tmp/ccpuPECZ.s page 189 - - - 5159 0138 1B04 lsls r3, r3, #16 - 5160 .LVL465: - 5161 013a 0B43 orrs r3, r1 - 5162 013c 8021 movs r1, #128 - 5163 013e 8904 lsls r1, r1, #18 - 5164 0140 0B43 orrs r3, r1 - 5165 0142 1343 orrs r3, r2 - 5166 0144 4360 str r3, [r0, #4] - 5167 .LVL466: - 5168 .L356: - 5169 .LBE245: - 5170 .LBE244: -1987:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5171 .loc 1 1987 0 - 5172 0146 638D ldrh r3, [r4, #42] - 5173 0148 9BB2 uxth r3, r3 - 5174 014a 002B cmp r3, #0 - 5175 014c 3BD0 beq .L365 - 5176 .L359: -1955:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5177 .loc 1 1955 0 - 5178 014e 0096 str r6, [sp] - 5179 0150 0E9B ldr r3, [sp, #56] - 5180 0152 0022 movs r2, #0 - 5181 0154 0421 movs r1, #4 - 5182 0156 2000 movs r0, r4 - 5183 0158 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 5184 .LVL467: - 5185 015c 0028 cmp r0, #0 - 5186 015e D6D1 bne .L366 -1962:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferSize--; - 5187 .loc 1 1962 0 - 5188 0160 2368 ldr r3, [r4] - 5189 0162 5A6A ldr r2, [r3, #36] - 5190 0164 636A ldr r3, [r4, #36] - 5191 0166 591C adds r1, r3, #1 - 5192 0168 6162 str r1, [r4, #36] - 5193 016a 1A70 strb r2, [r3] -1963:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount--; - 5194 .loc 1 1963 0 - 5195 016c 238D ldrh r3, [r4, #40] - 5196 016e 013B subs r3, r3, #1 - 5197 0170 9BB2 uxth r3, r3 - 5198 0172 2385 strh r3, [r4, #40] -1964:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5199 .loc 1 1964 0 - 5200 0174 628D ldrh r2, [r4, #42] - 5201 0176 013A subs r2, r2, #1 - 5202 0178 92B2 uxth r2, r2 - 5203 017a 6285 strh r2, [r4, #42] -1966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5204 .loc 1 1966 0 - 5205 017c 002B cmp r3, #0 - 5206 017e E2D1 bne .L356 -1966:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5207 .loc 1 1966 0 is_stmt 0 discriminator 1 - 5208 0180 638D ldrh r3, [r4, #42] - ARM GAS /tmp/ccpuPECZ.s page 190 - - - 5209 0182 9BB2 uxth r3, r3 - 5210 0184 002B cmp r3, #0 - 5211 0186 DED0 beq .L356 -1969:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5212 .loc 1 1969 0 is_stmt 1 - 5213 0188 0096 str r6, [sp] - 5214 018a 0E9B ldr r3, [sp, #56] - 5215 018c 0022 movs r2, #0 - 5216 018e 8021 movs r1, #128 - 5217 0190 2000 movs r0, r4 - 5218 0192 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout - 5219 .LVL468: - 5220 0196 0028 cmp r0, #0 - 5221 0198 BED1 bne .L367 -1975:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5222 .loc 1 1975 0 - 5223 019a 638D ldrh r3, [r4, #42] - 5224 019c 9BB2 uxth r3, r3 - 5225 019e FF2B cmp r3, #255 - 5226 01a0 BFD9 bls .L358 -1977:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); - 5227 .loc 1 1977 0 - 5228 01a2 FF23 movs r3, #255 - 5229 01a4 2385 strh r3, [r4, #40] - 5230 .LVL469: - 5231 .LBB246: - 5232 .LBB247: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 5233 .loc 1 4713 0 - 5234 01a6 2068 ldr r0, [r4] - 5235 01a8 4368 ldr r3, [r0, #4] - 5236 01aa 234A ldr r2, .L369+32 - 5237 01ac 1340 ands r3, r2 - 5238 01ae 039A ldr r2, [sp, #12] - 5239 01b0 9105 lsls r1, r2, #22 - 5240 01b2 890D lsrs r1, r1, #22 - 5241 01b4 FF22 movs r2, #255 - 5242 01b6 1204 lsls r2, r2, #16 - 5243 01b8 1143 orrs r1, r2 - 5244 01ba 8022 movs r2, #128 - 5245 01bc 5204 lsls r2, r2, #17 - 5246 01be 0A43 orrs r2, r1 - 5247 01c0 1343 orrs r3, r2 - 5248 01c2 4360 str r3, [r0, #4] - 5249 01c4 BFE7 b .L356 - 5250 .LVL470: - 5251 .L365: - 5252 .LBE247: - 5253 .LBE246: -1991:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5254 .loc 1 1991 0 - 5255 01c6 3200 movs r2, r6 - 5256 01c8 0E99 ldr r1, [sp, #56] - 5257 01ca 2000 movs r0, r4 - 5258 01cc FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout - 5259 .LVL471: - 5260 01d0 0028 cmp r0, #0 - ARM GAS /tmp/ccpuPECZ.s page 191 - - - 5261 01d2 0AD0 beq .L360 -1993:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5262 .loc 1 1993 0 - 5263 01d4 636C ldr r3, [r4, #68] - 5264 01d6 042B cmp r3, #4 - 5265 01d8 01D0 beq .L368 -2000:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5266 .loc 1 2000 0 - 5267 01da 0320 movs r0, #3 - 5268 01dc 47E7 b .L348 - 5269 .L368: -1995:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 5270 .loc 1 1995 0 - 5271 01de 616C ldr r1, [r4, #68] - 5272 01e0 1648 ldr r0, .L369+36 - 5273 01e2 FFF7FEFF bl vcom_Send - 5274 .LVL472: -1996:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5275 .loc 1 1996 0 - 5276 01e6 0120 movs r0, #1 - 5277 01e8 41E7 b .L348 - 5278 .L360: -2005:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5279 .loc 1 2005 0 - 5280 01ea 2368 ldr r3, [r4] - 5281 01ec 2022 movs r2, #32 - 5282 01ee DA61 str r2, [r3, #28] -2008:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5283 .loc 1 2008 0 - 5284 01f0 2168 ldr r1, [r4] - 5285 01f2 4B68 ldr r3, [r1, #4] - 5286 01f4 124D ldr r5, .L369+40 - 5287 01f6 2B40 ands r3, r5 - 5288 01f8 4B60 str r3, [r1, #4] -2010:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - 5289 .loc 1 2010 0 - 5290 01fa 4123 movs r3, #65 - 5291 01fc E254 strb r2, [r4, r3] -2011:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5292 .loc 1 2011 0 - 5293 01fe 0023 movs r3, #0 - 5294 0200 2232 adds r2, r2, #34 - 5295 0202 A354 strb r3, [r4, r2] -2014:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5296 .loc 1 2014 0 - 5297 0204 023A subs r2, r2, #2 - 5298 0206 A354 strb r3, [r4, r2] -2016:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5299 .loc 1 2016 0 - 5300 0208 31E7 b .L348 - 5301 .LVL473: - 5302 .L345: -2020:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_BUSY; - 5303 .loc 1 2020 0 - 5304 020a 0E48 ldr r0, .L369+44 - 5305 .LVL474: - 5306 020c FFF7FEFF bl vcom_Send - ARM GAS /tmp/ccpuPECZ.s page 192 - - - 5307 .LVL475: -2021:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5308 .loc 1 2021 0 - 5309 0210 0220 movs r0, #2 - 5310 0212 2CE7 b .L348 - 5311 .LVL476: - 5312 .L361: -1901:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5313 .loc 1 1901 0 - 5314 0214 0220 movs r0, #2 - 5315 .LVL477: - 5316 0216 2AE7 b .L348 - 5317 .L370: - 5318 .align 2 - 5319 .L369: - 5320 0218 18000000 .word .LC40 - 5321 021c 00000000 .word .LC38 - 5322 0220 009800FC .word -67069952 - 5323 0224 00240081 .word -2130697216 - 5324 0228 24000000 .word .LC42 - 5325 022c 00240082 .word -2113920000 - 5326 0230 40000000 .word .LC44 - 5327 0234 5C000000 .word .LC46 - 5328 0238 009C00FC .word -67068928 - 5329 023c 78000000 .word .LC48 - 5330 0240 00E800FE .word -33495040 - 5331 0244 94000000 .word .LC50 - 5332 .cfi_endproc - 5333 .LFE56: - 5335 .section .text.HAL_I2C_Mem_Write_IT,"ax",%progbits - 5336 .align 1 - 5337 .global HAL_I2C_Mem_Write_IT - 5338 .syntax unified - 5339 .code 16 - 5340 .thumb_func - 5341 .fpu softvfp - 5343 HAL_I2C_Mem_Write_IT: - 5344 .LFB57: -2037:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 5345 .loc 1 2037 0 - 5346 .cfi_startproc - 5347 @ args = 8, pretend = 0, frame = 8 - 5348 @ frame_needed = 0, uses_anonymous_args = 0 - 5349 .LVL478: - 5350 0000 F0B5 push {r4, r5, r6, r7, lr} - 5351 .LCFI34: - 5352 .cfi_def_cfa_offset 20 - 5353 .cfi_offset 4, -20 - 5354 .cfi_offset 5, -16 - 5355 .cfi_offset 6, -12 - 5356 .cfi_offset 7, -8 - 5357 .cfi_offset 14, -4 - 5358 0002 D646 mov lr, r10 - 5359 0004 4746 mov r7, r8 - 5360 0006 80B5 push {r7, lr} - 5361 .LCFI35: - 5362 .cfi_def_cfa_offset 28 - ARM GAS /tmp/ccpuPECZ.s page 193 - - - 5363 .cfi_offset 8, -28 - 5364 .cfi_offset 10, -24 - 5365 0008 85B0 sub sp, sp, #20 - 5366 .LCFI36: - 5367 .cfi_def_cfa_offset 48 - 5368 000a 0700 movs r7, r0 - 5369 000c 0C00 movs r4, r1 - 5370 000e 0292 str r2, [sp, #8] - 5371 0010 0393 str r3, [sp, #12] - 5372 0012 0CAB add r3, sp, #48 - 5373 .LVL479: - 5374 0014 40CB ldmia r3!, {r6} - 5375 .LVL480: - 5376 0016 1D88 ldrh r5, [r3] - 5377 .LVL481: -2044:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5378 .loc 1 2044 0 - 5379 0018 4123 movs r3, #65 - 5380 .LVL482: - 5381 001a C35C ldrb r3, [r0, r3] - 5382 001c 202B cmp r3, #32 - 5383 001e 6DD1 bne .L378 -2046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5384 .loc 1 2046 0 - 5385 0020 002E cmp r6, #0 - 5386 0022 00D1 bne .LCB5833 - 5387 0024 70E0 b .L379 @long jump - 5388 .LCB5833: -2046:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5389 .loc 1 2046 0 is_stmt 0 discriminator 1 - 5390 0026 002D cmp r5, #0 - 5391 0028 00D1 bne .LCB5835 - 5392 002a 6FE0 b .L380 @long jump - 5393 .LCB5835: -2051:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5394 .loc 1 2051 0 is_stmt 1 - 5395 002c 0368 ldr r3, [r0] - 5396 002e 9B69 ldr r3, [r3, #24] - 5397 0030 1B04 lsls r3, r3, #16 - 5398 0032 00D5 bpl .LCB5841 - 5399 0034 6CE0 b .L381 @long jump - 5400 .LCB5841: -2057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5401 .loc 1 2057 0 - 5402 0036 4023 movs r3, #64 - 5403 0038 C35C ldrb r3, [r0, r3] - 5404 003a 012B cmp r3, #1 - 5405 003c 6AD0 beq .L382 -2057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5406 .loc 1 2057 0 is_stmt 0 discriminator 2 - 5407 003e 4023 movs r3, #64 - 5408 0040 9A46 mov r10, r3 - 5409 0042 3F3B subs r3, r3, #63 - 5410 0044 5246 mov r2, r10 - 5411 .LVL483: - 5412 0046 8354 strb r3, [r0, r2] -2060:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - ARM GAS /tmp/ccpuPECZ.s page 194 - - - 5413 .loc 1 2060 0 is_stmt 1 discriminator 2 - 5414 0048 FFF7FEFF bl HAL_GetTick - 5415 .LVL484: -2062:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; - 5416 .loc 1 2062 0 discriminator 2 - 5417 004c 4123 movs r3, #65 - 5418 004e 2122 movs r2, #33 - 5419 0050 FA54 strb r2, [r7, r3] -2063:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 5420 .loc 1 2063 0 discriminator 2 - 5421 0052 0133 adds r3, r3, #1 - 5422 0054 5246 mov r2, r10 - 5423 0056 FA54 strb r2, [r7, r3] -2064:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5424 .loc 1 2064 0 discriminator 2 - 5425 0058 0023 movs r3, #0 - 5426 005a 7B64 str r3, [r7, #68] -2067:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 5427 .loc 1 2067 0 discriminator 2 - 5428 005c 7E62 str r6, [r7, #36] -2068:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 5429 .loc 1 2068 0 discriminator 2 - 5430 005e 7D85 strh r5, [r7, #42] -2069:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; - 5431 .loc 1 2069 0 discriminator 2 - 5432 0060 2D4B ldr r3, .L386 - 5433 0062 FB62 str r3, [r7, #44] -2070:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5434 .loc 1 2070 0 discriminator 2 - 5435 0064 2D4B ldr r3, .L386+4 - 5436 0066 7B63 str r3, [r7, #52] -2072:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5437 .loc 1 2072 0 discriminator 2 - 5438 0068 7B8D ldrh r3, [r7, #42] - 5439 006a 9BB2 uxth r3, r3 - 5440 006c FF2B cmp r3, #255 - 5441 006e 17D9 bls .L373 -2074:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; - 5442 .loc 1 2074 0 - 5443 0070 FF23 movs r3, #255 - 5444 0072 3B85 strh r3, [r7, #40] - 5445 .LVL485: -2075:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5446 .loc 1 2075 0 - 5447 0074 8023 movs r3, #128 - 5448 0076 5B04 lsls r3, r3, #17 - 5449 0078 9846 mov r8, r3 - 5450 .LVL486: - 5451 .L374: -2084:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5452 .loc 1 2084 0 - 5453 007a 0190 str r0, [sp, #4] - 5454 007c 1923 movs r3, #25 - 5455 007e 0093 str r3, [sp] - 5456 0080 039B ldr r3, [sp, #12] - 5457 0082 029A ldr r2, [sp, #8] - 5458 0084 2100 movs r1, r4 - ARM GAS /tmp/ccpuPECZ.s page 195 - - - 5459 0086 3800 movs r0, r7 - 5460 .LVL487: - 5461 0088 FFF7FEFF bl I2C_RequestMemoryWrite - 5462 .LVL488: - 5463 008c 0028 cmp r0, #0 - 5464 008e 12D0 beq .L375 -2086:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5465 .loc 1 2086 0 - 5466 0090 7B6C ldr r3, [r7, #68] - 5467 0092 042B cmp r3, #4 - 5468 0094 0AD1 bne .L376 -2089:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 5469 .loc 1 2089 0 - 5470 0096 3C33 adds r3, r3, #60 - 5471 0098 0022 movs r2, #0 - 5472 009a FA54 strb r2, [r7, r3] -2090:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5473 .loc 1 2090 0 - 5474 009c 0120 movs r0, #1 - 5475 009e 2EE0 b .L372 - 5476 .LVL489: - 5477 .L373: -2079:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; - 5478 .loc 1 2079 0 - 5479 00a0 7B8D ldrh r3, [r7, #42] - 5480 00a2 3B85 strh r3, [r7, #40] - 5481 .LVL490: -2080:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5482 .loc 1 2080 0 - 5483 00a4 8023 movs r3, #128 - 5484 00a6 9B04 lsls r3, r3, #18 - 5485 00a8 9846 mov r8, r3 - 5486 00aa E6E7 b .L374 - 5487 .LVL491: - 5488 .L376: -2095:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_TIMEOUT; - 5489 .loc 1 2095 0 - 5490 00ac 4023 movs r3, #64 - 5491 00ae 0022 movs r2, #0 - 5492 00b0 FA54 strb r2, [r7, r3] -2096:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5493 .loc 1 2096 0 - 5494 00b2 0320 movs r0, #3 - 5495 00b4 23E0 b .L372 - 5496 .L375: -2101:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5497 .loc 1 2101 0 - 5498 00b6 3A8D ldrh r2, [r7, #40] - 5499 00b8 D2B2 uxtb r2, r2 - 5500 .LVL492: - 5501 .LBB248: - 5502 .LBB249: -4713:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ - 5503 .loc 1 4713 0 - 5504 00ba 3968 ldr r1, [r7] - 5505 00bc 4B68 ldr r3, [r1, #4] - 5506 00be 184D ldr r5, .L386+8 - ARM GAS /tmp/ccpuPECZ.s page 196 - - - 5507 00c0 2B40 ands r3, r5 - 5508 00c2 A405 lsls r4, r4, #22 - 5509 .LVL493: - 5510 00c4 A40D lsrs r4, r4, #22 - 5511 00c6 1204 lsls r2, r2, #16 - 5512 .LVL494: - 5513 00c8 1443 orrs r4, r2 - 5514 00ca 4246 mov r2, r8 - 5515 00cc 2243 orrs r2, r4 - 5516 00ce 1400 movs r4, r2 - 5517 00d0 1C43 orrs r4, r3 - 5518 00d2 4C60 str r4, [r1, #4] - 5519 .LVL495: - 5520 .LBE249: - 5521 .LBE248: -2104:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5522 .loc 1 2104 0 - 5523 00d4 4023 movs r3, #64 - 5524 00d6 0022 movs r2, #0 - 5525 00d8 FA54 strb r2, [r7, r3] - 5526 .LVL496: - 5527 .LBB250: - 5528 .LBB251: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 5529 .loc 1 4728 0 - 5530 00da 7B6B ldr r3, [r7, #52] - 5531 00dc 114A ldr r2, .L386+12 - 5532 00de 9342 cmp r3, r2 - 5533 00e0 0AD0 beq .L383 - 5534 00e2 114A ldr r2, .L386+16 - 5535 00e4 9342 cmp r3, r2 - 5536 00e6 05D0 beq .L385 - 5537 00e8 F221 movs r1, #242 - 5538 .L377: - 5539 .LVL497: -4785:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5540 .loc 1 4785 0 - 5541 00ea 3A68 ldr r2, [r7] - 5542 00ec 1368 ldr r3, [r2] - 5543 00ee 0B43 orrs r3, r1 - 5544 00f0 1360 str r3, [r2] - 5545 .LVL498: - 5546 .LBE251: - 5547 .LBE250: -2115:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5548 .loc 1 2115 0 - 5549 00f2 04E0 b .L372 - 5550 .LVL499: - 5551 .L385: - 5552 .LBB253: - 5553 .LBB252: -4728:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) - 5554 .loc 1 4728 0 - 5555 00f4 0021 movs r1, #0 - 5556 00f6 F8E7 b .L377 - 5557 .L383: - 5558 00f8 0021 movs r1, #0 - ARM GAS /tmp/ccpuPECZ.s page 197 - - - 5559 00fa F6E7 b .L377 - 5560 .LVL500: - 5561 .L378: - 5562 .LBE252: - 5563 .LBE253: -2119:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5564 .loc 1 2119 0 - 5565 00fc 0220 movs r0, #2 - 5566 .LVL501: - 5567 .L372: -2121:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5568 .loc 1 2121 0 - 5569 00fe 05B0 add sp, sp, #20 - 5570 @ sp needed - 5571 .LVL502: - 5572 0100 0CBC pop {r2, r3} - 5573 0102 9046 mov r8, r2 - 5574 0104 9A46 mov r10, r3 - 5575 0106 F0BD pop {r4, r5, r6, r7, pc} - 5576 .LVL503: - 5577 .L379: -2048:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5578 .loc 1 2048 0 - 5579 0108 0120 movs r0, #1 - 5580 .LVL504: - 5581 010a F8E7 b .L372 - 5582 .LVL505: - 5583 .L380: - 5584 010c 0120 movs r0, #1 - 5585 .LVL506: - 5586 010e F6E7 b .L372 - 5587 .LVL507: - 5588 .L381: -2053:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5589 .loc 1 2053 0 - 5590 0110 0220 movs r0, #2 - 5591 .LVL508: - 5592 0112 F4E7 b .L372 - 5593 .LVL509: - 5594 .L382: -2057:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5595 .loc 1 2057 0 - 5596 0114 0220 movs r0, #2 - 5597 .LVL510: - 5598 0116 F2E7 b .L372 - 5599 .L387: - 5600 .align 2 - 5601 .L386: - 5602 0118 0000FFFF .word -65536 - 5603 011c 00000000 .word I2C_Master_ISR_IT - 5604 0120 009C00FC .word -67068928 - 5605 0124 00000000 .word I2C_Master_ISR_DMA - 5606 0128 00000000 .word I2C_Slave_ISR_DMA - 5607 .cfi_endproc - 5608 .LFE57: - 5610 .section .text.HAL_I2C_Mem_Read_IT,"ax",%progbits - 5611 .align 1 - ARM GAS /tmp/ccpuPECZ.s page 198 - - - 5612 .global HAL_I2C_Mem_Read_IT - 5613 .syntax unified - 5614 .code 16 - 5615 .thumb_func - 5616 .fpu softvfp - 5618 HAL_I2C_Mem_Read_IT: - 5619 .LFB58: -2136:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** uint32_t tickstart = 0U; - 5620 .loc 1 2136 0 - 5621 .cfi_startproc - 5622 @ args = 8, pretend = 0, frame = 8 - 5623 @ frame_needed = 0, uses_anonymous_args = 0 - 5624 .LVL511: - 5625 0000 F0B5 push {r4, r5, r6, r7, lr} - 5626 .LCFI37: - 5627 .cfi_def_cfa_offset 20 - 5628 .cfi_offset 4, -20 - 5629 .cfi_offset 5, -16 - 5630 .cfi_offset 6, -12 - 5631 .cfi_offset 7, -8 - 5632 .cfi_offset 14, -4 - 5633 0002 D646 mov lr, r10 - 5634 0004 4746 mov r7, r8 - 5635 0006 80B5 push {r7, lr} - 5636 .LCFI38: - 5637 .cfi_def_cfa_offset 28 - 5638 .cfi_offset 8, -28 - 5639 .cfi_offset 10, -24 - 5640 0008 85B0 sub sp, sp, #20 - 5641 .LCFI39: - 5642 .cfi_def_cfa_offset 48 - 5643 000a 0700 movs r7, r0 - 5644 000c 0C00 movs r4, r1 - 5645 000e 0292 str r2, [sp, #8] - 5646 0010 0393 str r3, [sp, #12] - 5647 0012 0CAB add r3, sp, #48 - 5648 .LVL512: - 5649 0014 40CB ldmia r3!, {r6} - 5650 .LVL513: - 5651 0016 1D88 ldrh r5, [r3] - 5652 .LVL514: -2143:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5653 .loc 1 2143 0 - 5654 0018 4123 movs r3, #65 - 5655 .LVL515: - 5656 001a C35C ldrb r3, [r0, r3] - 5657 001c 202B cmp r3, #32 - 5658 001e 70D1 bne .L395 -2145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5659 .loc 1 2145 0 - 5660 0020 002E cmp r6, #0 - 5661 0022 00D1 bne .LCB6150 - 5662 0024 73E0 b .L396 @long jump - 5663 .LCB6150: -2145:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5664 .loc 1 2145 0 is_stmt 0 discriminator 1 - 5665 0026 002D cmp r5, #0 - ARM GAS /tmp/ccpuPECZ.s page 199 - - - 5666 0028 00D1 bne .LCB6152 - 5667 002a 72E0 b .L397 @long jump - 5668 .LCB6152: -2150:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5669 .loc 1 2150 0 is_stmt 1 - 5670 002c 0368 ldr r3, [r0] - 5671 002e 9B69 ldr r3, [r3, #24] - 5672 0030 1B04 lsls r3, r3, #16 - 5673 0032 00D5 bpl .LCB6158 - 5674 0034 6FE0 b .L398 @long jump - 5675 .LCB6158: -2156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5676 .loc 1 2156 0 - 5677 0036 4023 movs r3, #64 - 5678 0038 C35C ldrb r3, [r0, r3] - 5679 003a 012B cmp r3, #1 - 5680 003c 00D1 bne .LCB6162 - 5681 003e 6CE0 b .L399 @long jump - 5682 .LCB6162: -2156:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5683 .loc 1 2156 0 is_stmt 0 discriminator 2 - 5684 0040 4023 movs r3, #64 - 5685 0042 9A46 mov r10, r3 - 5686 0044 3F3B subs r3, r3, #63 - 5687 0046 5246 mov r2, r10 - 5688 .LVL516: - 5689 0048 8354 strb r3, [r0, r2] -2159:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5690 .loc 1 2159 0 is_stmt 1 discriminator 2 - 5691 004a FFF7FEFF bl HAL_GetTick - 5692 .LVL517: -2161:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; - 5693 .loc 1 2161 0 discriminator 2 - 5694 004e 4123 movs r3, #65 - 5695 0050 2222 movs r2, #34 - 5696 0052 FA54 strb r2, [r7, r3] -2162:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 5697 .loc 1 2162 0 discriminator 2 - 5698 0054 0133 adds r3, r3, #1 - 5699 0056 5246 mov r2, r10 - 5700 0058 FA54 strb r2, [r7, r3] -2163:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5701 .loc 1 2163 0 discriminator 2 - 5702 005a 0023 movs r3, #0 - 5703 005c 7B64 str r3, [r7, #68] -2166:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferCount = Size; - 5704 .loc 1 2166 0 discriminator 2 - 5705 005e 7E62 str r6, [r7, #36] -2167:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 5706 .loc 1 2167 0 discriminator 2 - 5707 0060 7D85 strh r5, [r7, #42] -2168:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; - 5708 .loc 1 2168 0 discriminator 2 - 5709 0062 2F4B ldr r3, .L403 - 5710 0064 FB62 str r3, [r7, #44] -2169:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** - 5711 .loc 1 2169 0 discriminator 2 - ARM GAS /tmp/ccpuPECZ.s page 200 - - - 5712 0066 2F4B ldr r3, .L403+4 - 5713 0068 7B63 str r3, [r7, #52] -2171:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5714 .loc 1 2171 0 discriminator 2 - 5715 006a 7B8D ldrh r3, [r7, #42] - 5716 006c 9BB2 uxth r3, r3 - 5717 006e FF2B cmp r3, #255 - 5718 0070 17D9 bls .L390 -2173:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; - 5719 .loc 1 2173 0 - 5720 0072 FF23 movs r3, #255 - 5721 0074 3B85 strh r3, [r7, #40] - 5722 .LVL518: -2174:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** } - 5723 .loc 1 2174 0 - 5724 0076 8023 movs r3, #128 - 5725 0078 5B04 lsls r3, r3, #17 - 5726 007a 9846 mov r8, r3 - 5727 .LVL519: - 5728 .L391: -2183:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5729 .loc 1 2183 0 - 5730 007c 0190 str r0, [sp, #4] - 5731 007e 1923 movs r3, #25 - 5732 0080 0093 str r3, [sp] - 5733 0082 039B ldr r3, [sp, #12] - 5734 0084 029A ldr r2, [sp, #8] - 5735 0086 2100 movs r1, r4 - 5736 0088 3800 movs r0, r7 - 5737 .LVL520: - 5738 008a FFF7FEFF bl I2C_RequestMemoryRead - 5739 .LVL521: - 5740 008e 0028 cmp r0, #0 - 5741 0090 12D0 beq .L392 -2185:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** { - 5742 .loc 1 2185 0 - 5743 0092 7B6C ldr r3, [r7, #68] - 5744 0094 042B cmp r3, #4 - 5745 0096 0AD1 bne .L393 -2188:./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_i2c.c **** return HAL_ERROR; - 5746 .loc 1 2188 0 - 5747 0098 3C33 adds r3, r3, #60 - 5748 009a