diff --git a/.cproject b/.cproject
index 60fe2c4..70c3a01 100755
--- a/.cproject
+++ b/.cproject
@@ -90,6 +90,7 @@
+
diff --git a/.project b/.project
index 058950a..ebbe678 100755
--- a/.project
+++ b/.project
@@ -1,6 +1,6 @@
- Bees3
+ lora_bees_final
diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml
index f791c8f..9502ea5 100755
--- a/.settings/language.settings.xml
+++ b/.settings/language.settings.xml
@@ -6,7 +6,7 @@
-
+
@@ -18,7 +18,7 @@
-
+
diff --git a/lora_bees_final Run.cfg b/lora_bees_final Run.cfg
new file mode 100644
index 0000000..602e082
--- /dev/null
+++ b/lora_bees_final Run.cfg
@@ -0,0 +1,28 @@
+# This is an NUCLEO-L073RZ board with a single STM32L073RZTx chip
+#
+# Generated by System Workbench for STM32
+# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s)
+
+source [find interface/stlink.cfg]
+
+set WORKAREASIZE 0x5000
+
+transport select "hla_swd"
+
+set CHIPNAME STM32L073RZTx
+
+# Enable debug when in low power modes
+set ENABLE_LOW_POWER 1
+
+# Stop Watchdog counters when halt
+set STOP_WATCHDOG 1
+
+# STlink Debug clock frequency
+set CLOCK_FREQ 4000
+
+# use hardware reset, connect under reset
+# connect_assert_srst needed if low power mode application running (WFI...)
+reset_config srst_only srst_nogate connect_assert_srst
+set CONNECT_UNDER_RESET 1
+
+source [find target/stm32l0x.cfg]