B3M38SPD seminar project - beehive monitor with LoRa reporting
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
spd-lorabees/build/stm32l0xx_hal_msp.lst

677 lines
32 KiB

ARM GAS /tmp/ccbuzBhk.s page 1
1 .cpu cortex-m0plus
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 0
10 .eabi_attribute 18, 4
11 .file "stm32l0xx_hal_msp.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_InitTick,"ax",%progbits
16 .align 1
17 .global HAL_InitTick
18 .syntax unified
19 .code 16
20 .thumb_func
21 .fpu softvfp
23 HAL_InitTick:
24 .LFB96:
25 .file 1 "./Src/stm32l0xx_hal_msp.c"
1:./Src/stm32l0xx_hal_msp.c ****
2:./Src/stm32l0xx_hal_msp.c **** /******************************************************************************
3:./Src/stm32l0xx_hal_msp.c **** * @file stm32l0xx_hal_msp.c
4:./Src/stm32l0xx_hal_msp.c **** * @author MCD Application Team
5:./Src/stm32l0xx_hal_msp.c **** * @version V1.1.2
6:./Src/stm32l0xx_hal_msp.c **** * @date 08-September-2017
7:./Src/stm32l0xx_hal_msp.c **** * @brief msp file for HAL
8:./Src/stm32l0xx_hal_msp.c **** ******************************************************************************
9:./Src/stm32l0xx_hal_msp.c **** * @attention
10:./Src/stm32l0xx_hal_msp.c **** *
11:./Src/stm32l0xx_hal_msp.c **** * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics International N.V.
12:./Src/stm32l0xx_hal_msp.c **** * All rights reserved.</center></h2>
13:./Src/stm32l0xx_hal_msp.c **** *
14:./Src/stm32l0xx_hal_msp.c **** * Redistribution and use in source and binary forms, with or without
15:./Src/stm32l0xx_hal_msp.c **** * modification, are permitted, provided that the following conditions are met:
16:./Src/stm32l0xx_hal_msp.c **** *
17:./Src/stm32l0xx_hal_msp.c **** * 1. Redistribution of source code must retain the above copyright notice,
18:./Src/stm32l0xx_hal_msp.c **** * this list of conditions and the following disclaimer.
19:./Src/stm32l0xx_hal_msp.c **** * 2. Redistributions in binary form must reproduce the above copyright notice,
20:./Src/stm32l0xx_hal_msp.c **** * this list of conditions and the following disclaimer in the documentation
21:./Src/stm32l0xx_hal_msp.c **** * and/or other materials provided with the distribution.
22:./Src/stm32l0xx_hal_msp.c **** * 3. Neither the name of STMicroelectronics nor the names of other
23:./Src/stm32l0xx_hal_msp.c **** * contributors to this software may be used to endorse or promote products
24:./Src/stm32l0xx_hal_msp.c **** * derived from this software without specific written permission.
25:./Src/stm32l0xx_hal_msp.c **** * 4. This software, including modifications and/or derivative works of this
26:./Src/stm32l0xx_hal_msp.c **** * software, must execute solely and exclusively on microcontroller or
27:./Src/stm32l0xx_hal_msp.c **** * microprocessor devices manufactured by or for STMicroelectronics.
28:./Src/stm32l0xx_hal_msp.c **** * 5. Redistribution and use of this software other than as permitted under
29:./Src/stm32l0xx_hal_msp.c **** * this license is void and will automatically terminate your rights under
30:./Src/stm32l0xx_hal_msp.c **** * this license.
31:./Src/stm32l0xx_hal_msp.c **** *
32:./Src/stm32l0xx_hal_msp.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
33:./Src/stm32l0xx_hal_msp.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
ARM GAS /tmp/ccbuzBhk.s page 2
34:./Src/stm32l0xx_hal_msp.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
35:./Src/stm32l0xx_hal_msp.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
36:./Src/stm32l0xx_hal_msp.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
37:./Src/stm32l0xx_hal_msp.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
38:./Src/stm32l0xx_hal_msp.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
39:./Src/stm32l0xx_hal_msp.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
40:./Src/stm32l0xx_hal_msp.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
41:./Src/stm32l0xx_hal_msp.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
42:./Src/stm32l0xx_hal_msp.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
43:./Src/stm32l0xx_hal_msp.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44:./Src/stm32l0xx_hal_msp.c **** *
45:./Src/stm32l0xx_hal_msp.c **** ******************************************************************************
46:./Src/stm32l0xx_hal_msp.c **** */
47:./Src/stm32l0xx_hal_msp.c ****
48:./Src/stm32l0xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
49:./Src/stm32l0xx_hal_msp.c **** #include "hw.h"
50:./Src/stm32l0xx_hal_msp.c **** #include "low_power.h"
51:./Src/stm32l0xx_hal_msp.c **** #include "delay.h"
52:./Src/stm32l0xx_hal_msp.c **** #include "timeServer.h"
53:./Src/stm32l0xx_hal_msp.c **** /* when fast wake up is enabled, the mcu wakes up in ~20us * and
54:./Src/stm32l0xx_hal_msp.c **** * does not wait for the VREFINT to be settled. THis is ok for
55:./Src/stm32l0xx_hal_msp.c **** * most of the case except when adc must be used in this case before
56:./Src/stm32l0xx_hal_msp.c **** *starting the adc, you must make sure VREFINT is settled*/
57:./Src/stm32l0xx_hal_msp.c **** #define ENABLE_FAST_WAKEUP
58:./Src/stm32l0xx_hal_msp.c ****
59:./Src/stm32l0xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
60:./Src/stm32l0xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
61:./Src/stm32l0xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
62:./Src/stm32l0xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
63:./Src/stm32l0xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
64:./Src/stm32l0xx_hal_msp.c **** /* Private functions ---------------------------------------------------------*/
65:./Src/stm32l0xx_hal_msp.c ****
66:./Src/stm32l0xx_hal_msp.c **** /**
67:./Src/stm32l0xx_hal_msp.c **** * @brief This function configures the source of the time base.
68:./Src/stm32l0xx_hal_msp.c **** * @brief don't enable systick
69:./Src/stm32l0xx_hal_msp.c **** * @param TickPriority: Tick interrupt priority.
70:./Src/stm32l0xx_hal_msp.c **** * @retval HAL status
71:./Src/stm32l0xx_hal_msp.c **** */
72:./Src/stm32l0xx_hal_msp.c **** HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
73:./Src/stm32l0xx_hal_msp.c **** {
26 .loc 1 73 0
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 0
29 @ frame_needed = 0, uses_anonymous_args = 0
30 @ link register save eliminated.
31 .LVL0:
74:./Src/stm32l0xx_hal_msp.c **** /* Return function status */
75:./Src/stm32l0xx_hal_msp.c **** return HAL_OK;
76:./Src/stm32l0xx_hal_msp.c **** }
32 .loc 1 76 0
33 0000 0020 movs r0, #0
34 .LVL1:
35 @ sp needed
36 0002 7047 bx lr
37 .cfi_endproc
38 .LFE96:
40 .section .text.HAL_Delay,"ax",%progbits
ARM GAS /tmp/ccbuzBhk.s page 3
41 .align 1
42 .global HAL_Delay
43 .syntax unified
44 .code 16
45 .thumb_func
46 .fpu softvfp
48 HAL_Delay:
49 .LFB97:
77:./Src/stm32l0xx_hal_msp.c ****
78:./Src/stm32l0xx_hal_msp.c **** /**
79:./Src/stm32l0xx_hal_msp.c **** * @brief This function provides delay (in ms)
80:./Src/stm32l0xx_hal_msp.c **** * @param Delay: specifies the delay time length, in milliseconds.
81:./Src/stm32l0xx_hal_msp.c **** * @retval None
82:./Src/stm32l0xx_hal_msp.c **** */
83:./Src/stm32l0xx_hal_msp.c **** void HAL_Delay(__IO uint32_t Delay)
84:./Src/stm32l0xx_hal_msp.c **** {
50 .loc 1 84 0
51 .cfi_startproc
52 @ args = 0, pretend = 0, frame = 8
53 @ frame_needed = 0, uses_anonymous_args = 0
54 .LVL2:
55 0000 00B5 push {lr}
56 .LCFI0:
57 .cfi_def_cfa_offset 4
58 .cfi_offset 14, -4
59 0002 83B0 sub sp, sp, #12
60 .LCFI1:
61 .cfi_def_cfa_offset 16
62 0004 0190 str r0, [sp, #4]
85:./Src/stm32l0xx_hal_msp.c **** DelayMs( Delay ); /* based on RTC */
63 .loc 1 85 0
64 0006 0198 ldr r0, [sp, #4]
65 .LVL3:
66 0008 FFF7FEFF bl DelayMs
67 .LVL4:
86:./Src/stm32l0xx_hal_msp.c **** }
68 .loc 1 86 0
69 000c 03B0 add sp, sp, #12
70 @ sp needed
71 000e 00BD pop {pc}
72 .cfi_endproc
73 .LFE97:
75 .section .text.HAL_MspInit,"ax",%progbits
76 .align 1
77 .global HAL_MspInit
78 .syntax unified
79 .code 16
80 .thumb_func
81 .fpu softvfp
83 HAL_MspInit:
84 .LFB98:
87:./Src/stm32l0xx_hal_msp.c ****
88:./Src/stm32l0xx_hal_msp.c **** /**
89:./Src/stm32l0xx_hal_msp.c **** * @brief Initializes the MSP.
90:./Src/stm32l0xx_hal_msp.c **** * @retval None
91:./Src/stm32l0xx_hal_msp.c **** */
92:./Src/stm32l0xx_hal_msp.c **** void HAL_MspInit(void)
ARM GAS /tmp/ccbuzBhk.s page 4
93:./Src/stm32l0xx_hal_msp.c **** {
85 .loc 1 93 0
86 .cfi_startproc
87 @ args = 0, pretend = 0, frame = 0
88 @ frame_needed = 0, uses_anonymous_args = 0
89 0000 10B5 push {r4, lr}
90 .LCFI2:
91 .cfi_def_cfa_offset 8
92 .cfi_offset 4, -8
93 .cfi_offset 14, -4
94:./Src/stm32l0xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
94 .loc 1 94 0
95 0002 094A ldr r2, .L4
96 0004 916B ldr r1, [r2, #56]
97 0006 8023 movs r3, #128
98 0008 5B05 lsls r3, r3, #21
99 000a 0B43 orrs r3, r1
100 000c 9363 str r3, [r2, #56]
95:./Src/stm32l0xx_hal_msp.c ****
96:./Src/stm32l0xx_hal_msp.c **** /* Disable the Power Voltage Detector */
97:./Src/stm32l0xx_hal_msp.c **** HAL_PWR_DisablePVD( );
101 .loc 1 97 0
102 000e FFF7FEFF bl HAL_PWR_DisablePVD
103 .LVL5:
98:./Src/stm32l0xx_hal_msp.c ****
99:./Src/stm32l0xx_hal_msp.c **** /* Enables the Ultra Low Power mode */
100:./Src/stm32l0xx_hal_msp.c **** HAL_PWREx_EnableUltraLowPower( );
104 .loc 1 100 0
105 0012 FFF7FEFF bl HAL_PWREx_EnableUltraLowPower
106 .LVL6:
101:./Src/stm32l0xx_hal_msp.c ****
102:./Src/stm32l0xx_hal_msp.c **** __HAL_FLASH_SLEEP_POWERDOWN_ENABLE();
107 .loc 1 102 0
108 0016 054A ldr r2, .L4+4
109 0018 1368 ldr r3, [r2]
110 001a 0821 movs r1, #8
111 001c 0B43 orrs r3, r1
112 001e 1360 str r3, [r2]
103:./Src/stm32l0xx_hal_msp.c ****
104:./Src/stm32l0xx_hal_msp.c **** /*In debug mode, e.g. when DBGMCU is activated, Arm core has always clocks
105:./Src/stm32l0xx_hal_msp.c **** * And will not wait that the FLACH is ready to be read. It can miss in this
106:./Src/stm32l0xx_hal_msp.c **** * case the first instruction. To overcome this issue, the flash remain clcoked during sleep mode
107:./Src/stm32l0xx_hal_msp.c **** */
108:./Src/stm32l0xx_hal_msp.c **** DBG( __HAL_FLASH_SLEEP_POWERDOWN_DISABLE(); );
109:./Src/stm32l0xx_hal_msp.c ****
110:./Src/stm32l0xx_hal_msp.c **** #ifdef ENABLE_FAST_WAKEUP
111:./Src/stm32l0xx_hal_msp.c **** /*Enable fast wakeUp*/
112:./Src/stm32l0xx_hal_msp.c **** HAL_PWREx_EnableFastWakeUp( );
113 .loc 1 112 0
114 0020 FFF7FEFF bl HAL_PWREx_EnableFastWakeUp
115 .LVL7:
113:./Src/stm32l0xx_hal_msp.c **** #else
114:./Src/stm32l0xx_hal_msp.c **** HAL_PWREx_DisableFastWakeUp( );
115:./Src/stm32l0xx_hal_msp.c **** #endif
116:./Src/stm32l0xx_hal_msp.c **** }
116 .loc 1 116 0
117 @ sp needed
ARM GAS /tmp/ccbuzBhk.s page 5
118 0024 10BD pop {r4, pc}
119 .L5:
120 0026 C046 .align 2
121 .L4:
122 0028 00100240 .word 1073876992
123 002c 00200240 .word 1073881088
124 .cfi_endproc
125 .LFE98:
127 .section .text.HAL_RTC_MspInit,"ax",%progbits
128 .align 1
129 .global HAL_RTC_MspInit
130 .syntax unified
131 .code 16
132 .thumb_func
133 .fpu softvfp
135 HAL_RTC_MspInit:
136 .LFB99:
117:./Src/stm32l0xx_hal_msp.c ****
118:./Src/stm32l0xx_hal_msp.c **** /**
119:./Src/stm32l0xx_hal_msp.c **** * @brief RTC MSP Initialization
120:./Src/stm32l0xx_hal_msp.c **** * This function configures the hardware resources used in this example:
121:./Src/stm32l0xx_hal_msp.c **** * - Peripheral's clock enable
122:./Src/stm32l0xx_hal_msp.c **** * @param hrtc: RTC handle pointer
123:./Src/stm32l0xx_hal_msp.c **** * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select
124:./Src/stm32l0xx_hal_msp.c **** * the RTC clock source; in this case the Backup domain will be reset in
125:./Src/stm32l0xx_hal_msp.c **** * order to modify the RTC Clock source, as consequence RTC registers (including
126:./Src/stm32l0xx_hal_msp.c **** * the backup registers) and RCC_CSR register are set to their reset values.
127:./Src/stm32l0xx_hal_msp.c **** * @retval None
128:./Src/stm32l0xx_hal_msp.c **** */
129:./Src/stm32l0xx_hal_msp.c **** void HAL_RTC_MspInit(RTC_HandleTypeDef *hrtc)
130:./Src/stm32l0xx_hal_msp.c **** {
137 .loc 1 130 0
138 .cfi_startproc
139 @ args = 0, pretend = 0, frame = 96
140 @ frame_needed = 0, uses_anonymous_args = 0
141 .LVL8:
142 0000 00B5 push {lr}
143 .LCFI3:
144 .cfi_def_cfa_offset 4
145 .cfi_offset 14, -4
146 0002 99B0 sub sp, sp, #100
147 .LCFI4:
148 .cfi_def_cfa_offset 104
131:./Src/stm32l0xx_hal_msp.c **** RCC_OscInitTypeDef RCC_OscInitStruct;
132:./Src/stm32l0xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
133:./Src/stm32l0xx_hal_msp.c ****
134:./Src/stm32l0xx_hal_msp.c **** /*##-1- Configue the RTC clock soucre ######################################*/
135:./Src/stm32l0xx_hal_msp.c **** /* -a- Enable LSE Oscillator */
136:./Src/stm32l0xx_hal_msp.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
149 .loc 1 136 0
150 0004 0423 movs r3, #4
151 0006 0A93 str r3, [sp, #40]
137:./Src/stm32l0xx_hal_msp.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
152 .loc 1 137 0
153 0008 0023 movs r3, #0
154 000a 1493 str r3, [sp, #80]
138:./Src/stm32l0xx_hal_msp.c **** RCC_OscInitStruct.LSEState = RCC_LSE_ON;
ARM GAS /tmp/ccbuzBhk.s page 6
155 .loc 1 138 0
156 000c 0133 adds r3, r3, #1
157 000e FF33 adds r3, r3, #255
158 0010 0C93 str r3, [sp, #48]
139:./Src/stm32l0xx_hal_msp.c **** if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
159 .loc 1 139 0
160 0012 0AA8 add r0, sp, #40
161 .LVL9:
162 0014 FFF7FEFF bl HAL_RCC_OscConfig
163 .LVL10:
164 0018 0028 cmp r0, #0
165 001a 19D1 bne .L9
166 .L7:
140:./Src/stm32l0xx_hal_msp.c **** {
141:./Src/stm32l0xx_hal_msp.c **** Error_Handler();
142:./Src/stm32l0xx_hal_msp.c **** }
143:./Src/stm32l0xx_hal_msp.c ****
144:./Src/stm32l0xx_hal_msp.c **** /* -b- Select LSI as RTC clock source */
145:./Src/stm32l0xx_hal_msp.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
167 .loc 1 145 0
168 001c 2023 movs r3, #32
169 001e 0093 str r3, [sp]
146:./Src/stm32l0xx_hal_msp.c **** PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
170 .loc 1 146 0
171 0020 8023 movs r3, #128
172 0022 5B02 lsls r3, r3, #9
173 0024 0193 str r3, [sp, #4]
147:./Src/stm32l0xx_hal_msp.c **** if(HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
174 .loc 1 147 0
175 0026 6846 mov r0, sp
176 0028 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
177 .LVL11:
178 002c 0028 cmp r0, #0
179 002e 14D1 bne .L10
180 .L8:
148:./Src/stm32l0xx_hal_msp.c **** {
149:./Src/stm32l0xx_hal_msp.c **** Error_Handler();
150:./Src/stm32l0xx_hal_msp.c **** }
151:./Src/stm32l0xx_hal_msp.c ****
152:./Src/stm32l0xx_hal_msp.c **** /*##-2- Enable the RTC peripheral Clock ####################################*/
153:./Src/stm32l0xx_hal_msp.c **** /* Enable RTC Clock */
154:./Src/stm32l0xx_hal_msp.c **** __HAL_RCC_RTC_ENABLE();
181 .loc 1 154 0
182 0030 0C4A ldr r2, .L11
183 0032 116D ldr r1, [r2, #80]
184 0034 8023 movs r3, #128
185 0036 DB02 lsls r3, r3, #11
186 0038 0B43 orrs r3, r1
187 003a 1365 str r3, [r2, #80]
155:./Src/stm32l0xx_hal_msp.c ****
156:./Src/stm32l0xx_hal_msp.c **** /*##-3- Configure the NVIC for RTC Alarm ###################################*/
157:./Src/stm32l0xx_hal_msp.c **** HAL_NVIC_SetPriority(RTC_Alarm_IRQn, 0x0, 0);
188 .loc 1 157 0
189 003c 0022 movs r2, #0
190 003e 0021 movs r1, #0
191 0040 0220 movs r0, #2
192 0042 FFF7FEFF bl HAL_NVIC_SetPriority
ARM GAS /tmp/ccbuzBhk.s page 7
193 .LVL12:
158:./Src/stm32l0xx_hal_msp.c **** HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
194 .loc 1 158 0
195 0046 0220 movs r0, #2
196 0048 FFF7FEFF bl HAL_NVIC_EnableIRQ
197 .LVL13:
159:./Src/stm32l0xx_hal_msp.c **** }
198 .loc 1 159 0
199 004c 19B0 add sp, sp, #100
200 @ sp needed
201 004e 00BD pop {pc}
202 .L9:
141:./Src/stm32l0xx_hal_msp.c **** }
203 .loc 1 141 0
204 0050 8D21 movs r1, #141
205 0052 0548 ldr r0, .L11+4
206 0054 FFF7FEFF bl _Error_Handler
207 .LVL14:
208 0058 E0E7 b .L7
209 .L10:
149:./Src/stm32l0xx_hal_msp.c **** }
210 .loc 1 149 0
211 005a 9521 movs r1, #149
212 005c 0248 ldr r0, .L11+4
213 005e FFF7FEFF bl _Error_Handler
214 .LVL15:
215 0062 E5E7 b .L8
216 .L12:
217 .align 2
218 .L11:
219 0064 00100240 .word 1073876992
220 0068 00000000 .word .LC0
221 .cfi_endproc
222 .LFE99:
224 .section .text.HAL_RTC_MspDeInit,"ax",%progbits
225 .align 1
226 .global HAL_RTC_MspDeInit
227 .syntax unified
228 .code 16
229 .thumb_func
230 .fpu softvfp
232 HAL_RTC_MspDeInit:
233 .LFB100:
160:./Src/stm32l0xx_hal_msp.c ****
161:./Src/stm32l0xx_hal_msp.c **** /**
162:./Src/stm32l0xx_hal_msp.c **** * @brief RTC MSP De-Initialization
163:./Src/stm32l0xx_hal_msp.c **** * This function freeze the hardware resources used in this example:
164:./Src/stm32l0xx_hal_msp.c **** * - Disable the Peripheral's clock
165:./Src/stm32l0xx_hal_msp.c **** * @param hrtc: RTC handle pointer
166:./Src/stm32l0xx_hal_msp.c **** * @retval None
167:./Src/stm32l0xx_hal_msp.c **** */
168:./Src/stm32l0xx_hal_msp.c **** void HAL_RTC_MspDeInit(RTC_HandleTypeDef *hrtc)
169:./Src/stm32l0xx_hal_msp.c **** {
234 .loc 1 169 0
235 .cfi_startproc
236 @ args = 0, pretend = 0, frame = 0
237 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/ccbuzBhk.s page 8
238 @ link register save eliminated.
239 .LVL16:
170:./Src/stm32l0xx_hal_msp.c **** /* Reset peripherals */
171:./Src/stm32l0xx_hal_msp.c **** __HAL_RCC_RTC_DISABLE();
240 .loc 1 171 0
241 0000 024A ldr r2, .L14
242 0002 136D ldr r3, [r2, #80]
243 0004 0249 ldr r1, .L14+4
244 0006 0B40 ands r3, r1
245 0008 1365 str r3, [r2, #80]
172:./Src/stm32l0xx_hal_msp.c **** }
246 .loc 1 172 0
247 @ sp needed
248 000a 7047 bx lr
249 .L15:
250 .align 2
251 .L14:
252 000c 00100240 .word 1073876992
253 0010 FFFFFBFF .word -262145
254 .cfi_endproc
255 .LFE100:
257 .section .text.HAL_RTC_AlarmAEventCallback,"ax",%progbits
258 .align 1
259 .global HAL_RTC_AlarmAEventCallback
260 .syntax unified
261 .code 16
262 .thumb_func
263 .fpu softvfp
265 HAL_RTC_AlarmAEventCallback:
266 .LFB101:
173:./Src/stm32l0xx_hal_msp.c ****
174:./Src/stm32l0xx_hal_msp.c ****
175:./Src/stm32l0xx_hal_msp.c **** /**
176:./Src/stm32l0xx_hal_msp.c **** * @brief Alarm A callback.
177:./Src/stm32l0xx_hal_msp.c **** * @param hrtc: RTC handle
178:./Src/stm32l0xx_hal_msp.c **** * @retval None
179:./Src/stm32l0xx_hal_msp.c **** */
180:./Src/stm32l0xx_hal_msp.c **** void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
181:./Src/stm32l0xx_hal_msp.c **** {
267 .loc 1 181 0
268 .cfi_startproc
269 @ args = 0, pretend = 0, frame = 0
270 @ frame_needed = 0, uses_anonymous_args = 0
271 .LVL17:
272 0000 10B5 push {r4, lr}
273 .LCFI5:
274 .cfi_def_cfa_offset 8
275 .cfi_offset 4, -8
276 .cfi_offset 14, -4
182:./Src/stm32l0xx_hal_msp.c **** TimerIrqHandler( );
277 .loc 1 182 0
278 0002 FFF7FEFF bl TimerIrqHandler
279 .LVL18:
183:./Src/stm32l0xx_hal_msp.c **** }
280 .loc 1 183 0
281 @ sp needed
282 0006 10BD pop {r4, pc}
ARM GAS /tmp/ccbuzBhk.s page 9
283 .cfi_endproc
284 .LFE101:
286 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits
287 .align 1
288 .global HAL_GPIO_EXTI_Callback
289 .syntax unified
290 .code 16
291 .thumb_func
292 .fpu softvfp
294 HAL_GPIO_EXTI_Callback:
295 .LFB102:
184:./Src/stm32l0xx_hal_msp.c ****
185:./Src/stm32l0xx_hal_msp.c **** /**
186:./Src/stm32l0xx_hal_msp.c **** * @brief EXTI line detection callbacks.
187:./Src/stm32l0xx_hal_msp.c **** * @param GPIO_Pin: Specifies the pins connected to the EXTI line.
188:./Src/stm32l0xx_hal_msp.c **** * @retval None
189:./Src/stm32l0xx_hal_msp.c **** */
190:./Src/stm32l0xx_hal_msp.c **** void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
191:./Src/stm32l0xx_hal_msp.c **** {
296 .loc 1 191 0
297 .cfi_startproc
298 @ args = 0, pretend = 0, frame = 0
299 @ frame_needed = 0, uses_anonymous_args = 0
300 .LVL19:
301 0000 10B5 push {r4, lr}
302 .LCFI6:
303 .cfi_def_cfa_offset 8
304 .cfi_offset 4, -8
305 .cfi_offset 14, -4
192:./Src/stm32l0xx_hal_msp.c **** HW_GPIO_IrqHandler( GPIO_Pin );
306 .loc 1 192 0
307 0002 FFF7FEFF bl HW_GPIO_IrqHandler
308 .LVL20:
193:./Src/stm32l0xx_hal_msp.c **** }
309 .loc 1 193 0
310 @ sp needed
311 0006 10BD pop {r4, pc}
312 .cfi_endproc
313 .LFE102:
315 .section .text.MSP_GetIRQn,"ax",%progbits
316 .align 1
317 .global MSP_GetIRQn
318 .syntax unified
319 .code 16
320 .thumb_func
321 .fpu softvfp
323 MSP_GetIRQn:
324 .LFB103:
194:./Src/stm32l0xx_hal_msp.c ****
195:./Src/stm32l0xx_hal_msp.c **** /**
196:./Src/stm32l0xx_hal_msp.c **** * @brief Gets IRQ number as a function of the GPIO_Pin.
197:./Src/stm32l0xx_hal_msp.c **** * @param GPIO_Pin: Specifies the pins connected to the EXTI line.
198:./Src/stm32l0xx_hal_msp.c **** * @retval IRQ number
199:./Src/stm32l0xx_hal_msp.c **** */
200:./Src/stm32l0xx_hal_msp.c **** IRQn_Type MSP_GetIRQn( uint16_t GPIO_Pin)
201:./Src/stm32l0xx_hal_msp.c **** {
325 .loc 1 201 0
ARM GAS /tmp/ccbuzBhk.s page 10
326 .cfi_startproc
327 @ args = 0, pretend = 0, frame = 0
328 @ frame_needed = 0, uses_anonymous_args = 0
329 @ link register save eliminated.
330 .LVL21:
202:./Src/stm32l0xx_hal_msp.c **** switch( GPIO_Pin )
331 .loc 1 202 0
332 0000 0428 cmp r0, #4
333 0002 09D0 beq .L23
334 0004 04D8 bhi .L21
335 0006 0138 subs r0, r0, #1
336 .LVL22:
337 0008 0128 cmp r0, #1
338 000a 03D8 bhi .L19
203:./Src/stm32l0xx_hal_msp.c **** {
204:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_0:
205:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_1: return EXTI0_1_IRQn;
339 .loc 1 205 0
340 000c 0520 movs r0, #5
341 .L20:
206:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_2:
207:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_3: return EXTI2_3_IRQn;
208:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_4:
209:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_5:
210:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_6:
211:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_7:
212:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_8:
213:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_9:
214:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_10:
215:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_11:
216:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_12:
217:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_13:
218:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_14:
219:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_15:
220:./Src/stm32l0xx_hal_msp.c **** default: return EXTI4_15_IRQn;
221:./Src/stm32l0xx_hal_msp.c **** }
222:./Src/stm32l0xx_hal_msp.c **** }
342 .loc 1 222 0
343 @ sp needed
344 000e 7047 bx lr
345 .LVL23:
346 .L21:
202:./Src/stm32l0xx_hal_msp.c **** {
347 .loc 1 202 0
348 0010 0828 cmp r0, #8
349 0012 01D0 beq .L23
350 .LVL24:
351 .L19:
220:./Src/stm32l0xx_hal_msp.c **** }
352 .loc 1 220 0
353 0014 0720 movs r0, #7
354 0016 FAE7 b .L20
355 .LVL25:
356 .L23:
207:./Src/stm32l0xx_hal_msp.c **** case GPIO_PIN_4:
357 .loc 1 207 0
358 0018 0620 movs r0, #6
ARM GAS /tmp/ccbuzBhk.s page 11
359 .LVL26:
360 001a F8E7 b .L20
361 .cfi_endproc
362 .LFE103:
364 .section .rodata.HAL_RTC_MspInit.str1.4,"aMS",%progbits,1
365 .align 2
366 .LC0:
367 0000 2E2F5372 .ascii "./Src/stm32l0xx_hal_msp.c\000"
367 632F7374
367 6D33326C
367 3078785F
367 68616C5F
368 .text
369 .Letext0:
370 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
371 .file 3 "/usr/arm-none-eabi/include/sys/lock.h"
372 .file 4 "/usr/arm-none-eabi/include/sys/_types.h"
373 .file 5 "/usr/lib/gcc/arm-none-eabi/7.2.0/include/stddef.h"
374 .file 6 "/usr/arm-none-eabi/include/sys/reent.h"
375 .file 7 "/usr/arm-none-eabi/include/math.h"
376 .file 8 "/usr/arm-none-eabi/include/sys/_stdint.h"
377 .file 9 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/stm32l073xx.h"
378 .file 10 "Drivers/CMSIS/Device/ST/STM32L0xx/Include/system_stm32l0xx.h"
379 .file 11 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_def.h"
380 .file 12 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc.h"
381 .file 13 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rcc_ex.h"
382 .file 14 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_rtc.h"
383 .file 15 "Inc/hw_gpio.h"
384 .file 16 "Middlewares/Third_Party/Lora/Utilities/timeServer.h"
385 .file 17 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_cortex.h"
386 .file 18 "Inc/debug.h"
387 .file 19 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr.h"
388 .file 20 "Drivers/STM32L0xx_HAL_Driver/Inc/stm32l0xx_hal_pwr_ex.h"
389 .file 21 "Middlewares/Third_Party/Lora/Utilities/delay.h"
ARM GAS /tmp/ccbuzBhk.s page 12
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32l0xx_hal_msp.c
/tmp/ccbuzBhk.s:16 .text.HAL_InitTick:0000000000000000 $t
/tmp/ccbuzBhk.s:23 .text.HAL_InitTick:0000000000000000 HAL_InitTick
/tmp/ccbuzBhk.s:41 .text.HAL_Delay:0000000000000000 $t
/tmp/ccbuzBhk.s:48 .text.HAL_Delay:0000000000000000 HAL_Delay
/tmp/ccbuzBhk.s:76 .text.HAL_MspInit:0000000000000000 $t
/tmp/ccbuzBhk.s:83 .text.HAL_MspInit:0000000000000000 HAL_MspInit
/tmp/ccbuzBhk.s:122 .text.HAL_MspInit:0000000000000028 $d
/tmp/ccbuzBhk.s:128 .text.HAL_RTC_MspInit:0000000000000000 $t
/tmp/ccbuzBhk.s:135 .text.HAL_RTC_MspInit:0000000000000000 HAL_RTC_MspInit
/tmp/ccbuzBhk.s:219 .text.HAL_RTC_MspInit:0000000000000064 $d
/tmp/ccbuzBhk.s:225 .text.HAL_RTC_MspDeInit:0000000000000000 $t
/tmp/ccbuzBhk.s:232 .text.HAL_RTC_MspDeInit:0000000000000000 HAL_RTC_MspDeInit
/tmp/ccbuzBhk.s:252 .text.HAL_RTC_MspDeInit:000000000000000c $d
/tmp/ccbuzBhk.s:258 .text.HAL_RTC_AlarmAEventCallback:0000000000000000 $t
/tmp/ccbuzBhk.s:265 .text.HAL_RTC_AlarmAEventCallback:0000000000000000 HAL_RTC_AlarmAEventCallback
/tmp/ccbuzBhk.s:287 .text.HAL_GPIO_EXTI_Callback:0000000000000000 $t
/tmp/ccbuzBhk.s:294 .text.HAL_GPIO_EXTI_Callback:0000000000000000 HAL_GPIO_EXTI_Callback
/tmp/ccbuzBhk.s:316 .text.MSP_GetIRQn:0000000000000000 $t
/tmp/ccbuzBhk.s:323 .text.MSP_GetIRQn:0000000000000000 MSP_GetIRQn
/tmp/ccbuzBhk.s:365 .rodata.HAL_RTC_MspInit.str1.4:0000000000000000 $d
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
DelayMs
HAL_PWR_DisablePVD
HAL_PWREx_EnableUltraLowPower
HAL_PWREx_EnableFastWakeUp
HAL_RCC_OscConfig
HAL_RCCEx_PeriphCLKConfig
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
_Error_Handler
TimerIrqHandler
HW_GPIO_IrqHandler