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197 lines
5.6 KiB
197 lines
5.6 KiB
#pragma once
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//Generated at 2012-07-03 18:44:06
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/*
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* Copyright (c) 2010 - 2011 Espressif System
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*
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*/
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#include <esp8266.h>
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#ifndef UART_REGISTER_H_INCLUDED
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#define UART_REGISTER_H_INCLUDED
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#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00)
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//version value:32'h062000
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#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0)
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#define UART_RXFIFO_RD_BYTE 0x000000FF
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#define UART_RXFIFO_RD_BYTE_S 0
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#define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4)
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#define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
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#define UART_BRK_DET_INT_RAW (BIT(7))
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#define UART_CTS_CHG_INT_RAW (BIT(6))
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#define UART_DSR_CHG_INT_RAW (BIT(5))
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#define UART_RXFIFO_OVF_INT_RAW (BIT(4))
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#define UART_FRM_ERR_INT_RAW (BIT(3))
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#define UART_PARITY_ERR_INT_RAW (BIT(2))
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#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
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#define UART_RXFIFO_FULL_INT_RAW (BIT(0))
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#define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8)
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#define UART_RXFIFO_TOUT_INT_ST (BIT(8))
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#define UART_BRK_DET_INT_ST (BIT(7))
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#define UART_CTS_CHG_INT_ST (BIT(6))
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#define UART_DSR_CHG_INT_ST (BIT(5))
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#define UART_RXFIFO_OVF_INT_ST (BIT(4))
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#define UART_FRM_ERR_INT_ST (BIT(3))
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#define UART_PARITY_ERR_INT_ST (BIT(2))
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#define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
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#define UART_RXFIFO_FULL_INT_ST (BIT(0))
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#define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC)
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#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
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#define UART_BRK_DET_INT_ENA (BIT(7))
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#define UART_CTS_CHG_INT_ENA (BIT(6))
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#define UART_DSR_CHG_INT_ENA (BIT(5))
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#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
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#define UART_FRM_ERR_INT_ENA (BIT(3))
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#define UART_PARITY_ERR_INT_ENA (BIT(2))
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#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
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#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
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#define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10)
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#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
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#define UART_BRK_DET_INT_CLR (BIT(7))
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#define UART_CTS_CHG_INT_CLR (BIT(6))
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#define UART_DSR_CHG_INT_CLR (BIT(5))
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#define UART_RXFIFO_OVF_INT_CLR (BIT(4))
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#define UART_FRM_ERR_INT_CLR (BIT(3))
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#define UART_PARITY_ERR_INT_CLR (BIT(2))
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#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
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#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
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#define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14)
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#define UART_CLKDIV_CNT 0x000FFFFF
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#define UART_CLKDIV_S 0
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#define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18)
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#define UART_GLITCH_FILT 0x000000FF
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#define UART_GLITCH_FILT_S 8
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#define UART_AUTOBAUD_EN (BIT(0))
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#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C)
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#define UART_TXD (BIT(31))
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#define UART_RTSN (BIT(30))
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#define UART_DTRN (BIT(29))
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#define UART_TXFIFO_CNT 0x000000FF
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#define UART_TXFIFO_CNT_S 16
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#define UART_RXD (BIT(15))
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#define UART_CTSN (BIT(14))
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#define UART_DSRN (BIT(13))
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#define UART_RXFIFO_CNT 0x000000FF
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#define UART_RXFIFO_CNT_S 0
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#define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20)
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#define UART_TXFIFO_RST (BIT(18))
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#define UART_RXFIFO_RST (BIT(17))
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#define UART_IRDA_EN (BIT(16))
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#define UART_TX_FLOW_EN (BIT(15))
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#define UART_LOOPBACK (BIT(14))
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#define UART_IRDA_RX_INV (BIT(13))
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#define UART_IRDA_TX_INV (BIT(12))
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#define UART_IRDA_WCTL (BIT(11))
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#define UART_IRDA_TX_EN (BIT(10))
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#define UART_IRDA_DPLX (BIT(9))
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#define UART_TXD_BRK (BIT(8))
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#define UART_SW_DTR (BIT(7))
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#define UART_SW_RTS (BIT(6))
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#define UART_STOP_BIT_NUM 0x00000003
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#define UART_STOP_BIT_NUM_S 4
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#define UART_BIT_NUM 0x00000003
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#define UART_BIT_NUM_S 2
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#define UART_PARITY_EN (BIT(1))
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#define UART_PARITY (BIT(0))
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#define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24)
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#define UART_RX_TOUT_EN (BIT(31))
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#define UART_RX_TOUT_THRHD 0x0000007F
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#define UART_RX_TOUT_THRHD_S 24
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#define UART_RX_FLOW_EN (BIT(23))
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#define UART_RX_FLOW_THRHD 0x0000007F
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#define UART_RX_FLOW_THRHD_S 16
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#define UART_TXFIFO_EMPTY_THRHD 0x0000007F
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#define UART_TXFIFO_EMPTY_THRHD_S 8
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#define UART_RXFIFO_FULL_THRHD 0x0000007F
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#define UART_RXFIFO_FULL_THRHD_S 0
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#define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28)
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#define UART_LOWPULSE_MIN_CNT 0x000FFFFF
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#define UART_LOWPULSE_MIN_CNT_S 0
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#define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C)
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#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
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#define UART_HIGHPULSE_MIN_CNT_S 0
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#define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30)
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#define UART_PULSE_NUM_CNT 0x0003FF
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#define UART_PULSE_NUM_CNT_S 0
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#define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78)
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#define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C)
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#endif // UART_REGISTER_H_INCLUDED
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#define RX_BUFF_SIZE 256
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#define TX_BUFF_SIZE 100
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#define UART0 0
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#define UART1 1
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typedef enum {
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FIVE_BITS = 0x0,
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SIX_BITS = 0x1,
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SEVEN_BITS = 0x2,
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EIGHT_BITS = 0x3
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} UartBitsNum4Char;
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typedef enum {
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ONE_STOP_BIT = 0,
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ONE_HALF_STOP_BIT = BIT2,
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TWO_STOP_BIT = BIT2
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} UartStopBitsNum;
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typedef enum {
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NONE_BITS = 0,
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ODD_BITS = 0,
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EVEN_BITS = BIT4
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} UartParityMode;
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typedef enum {
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STICK_PARITY_DIS = 0,
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STICK_PARITY_EN = BIT3 | BIT5
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} UartExistParity;
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typedef enum {
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BIT_RATE_9600 = 9600,
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BIT_RATE_19200 = 19200,
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BIT_RATE_38400 = 38400,
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BIT_RATE_57600 = 57600,
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BIT_RATE_74880 = 74880,
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BIT_RATE_115200 = 115200,
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BIT_RATE_230400 = 230400,
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BIT_RATE_460800 = 460800,
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BIT_RATE_921600 = 921600
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} UartBautRate;
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typedef enum {
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NONE_CTRL,
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HARDWARE_CTRL,
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XON_XOFF_CTRL
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} UartFlowCtrl;
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typedef enum {
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EMPTY,
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UNDER_WRITE,
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WRITE_OVER
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} RcvMsgBuffState;
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typedef struct {
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uint32 TrxBuffSize;
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uint8 *pTrxBuff;
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} TrxMsgBuff;
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typedef enum {
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BAUD_RATE_DET,
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WAIT_SYNC_FRM,
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SRCH_MSG_HEAD,
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RCV_MSG_BODY,
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RCV_ESC_CHAR,
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} RcvMsgState;
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