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164 lines
7.0 KiB
164 lines
7.0 KiB
9 years ago
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/*
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* File : uart_register.h
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* Copyright (C) 2013 - 2016, Espressif Systems
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of version 3 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Copyright (c) 2010 - 2011 Espressif System
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*
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*/
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#ifndef UART_REGISTER_H_
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#define UART_REGISTER_H_
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#include "c_types.h"
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#define UART_FIFO_LEN 128 //define the tx fifo length
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#define REG_UART_BASE(i) (0x60000000 + (i)*0xf00)
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//version value:32'h062000
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#define UART_FIFO(i) (REG_UART_BASE(i) + 0x0)
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#define UART_RXFIFO_RD_BYTE 0x000000FF
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#define UART_RXFIFO_RD_BYTE_S 0
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#define UART_INT_RAW(i) (REG_UART_BASE(i) + 0x4)
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#define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
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#define UART_BRK_DET_INT_RAW (BIT(7))
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#define UART_CTS_CHG_INT_RAW (BIT(6))
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#define UART_DSR_CHG_INT_RAW (BIT(5))
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#define UART_RXFIFO_OVF_INT_RAW (BIT(4))
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#define UART_FRM_ERR_INT_RAW (BIT(3))
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#define UART_PARITY_ERR_INT_RAW (BIT(2))
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#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
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#define UART_RXFIFO_FULL_INT_RAW (BIT(0))
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#define UART_INT_ST(i) (REG_UART_BASE(i) + 0x8)
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#define UART_RXFIFO_TOUT_INT_ST (BIT(8))
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#define UART_BRK_DET_INT_ST (BIT(7))
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#define UART_CTS_CHG_INT_ST (BIT(6))
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#define UART_DSR_CHG_INT_ST (BIT(5))
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#define UART_RXFIFO_OVF_INT_ST (BIT(4))
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#define UART_FRM_ERR_INT_ST (BIT(3))
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#define UART_PARITY_ERR_INT_ST (BIT(2))
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#define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
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#define UART_RXFIFO_FULL_INT_ST (BIT(0))
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#define UART_INT_ENA(i) (REG_UART_BASE(i) + 0xC)
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#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
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#define UART_BRK_DET_INT_ENA (BIT(7))
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#define UART_CTS_CHG_INT_ENA (BIT(6))
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#define UART_DSR_CHG_INT_ENA (BIT(5))
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#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
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#define UART_FRM_ERR_INT_ENA (BIT(3))
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#define UART_PARITY_ERR_INT_ENA (BIT(2))
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#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
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#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
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#define UART_INT_CLR(i) (REG_UART_BASE(i) + 0x10)
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#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
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#define UART_BRK_DET_INT_CLR (BIT(7))
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#define UART_CTS_CHG_INT_CLR (BIT(6))
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#define UART_DSR_CHG_INT_CLR (BIT(5))
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#define UART_RXFIFO_OVF_INT_CLR (BIT(4))
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#define UART_FRM_ERR_INT_CLR (BIT(3))
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#define UART_PARITY_ERR_INT_CLR (BIT(2))
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#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
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#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
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#define UART_CLKDIV(i) (REG_UART_BASE(i) + 0x14)
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#define UART_CLKDIV_CNT 0x000FFFFF
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#define UART_CLKDIV_S 0
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#define UART_AUTOBAUD(i) (REG_UART_BASE(i) + 0x18)
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#define UART_GLITCH_FILT 0x000000FF
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#define UART_GLITCH_FILT_S 8
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#define UART_AUTOBAUD_EN (BIT(0))
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#define UART_STATUS(i) (REG_UART_BASE(i) + 0x1C)
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#define UART_TXD (BIT(31))
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#define UART_RTSN (BIT(30))
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#define UART_DTRN (BIT(29))
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#define UART_TXFIFO_CNT 0x000000FF
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#define UART_TXFIFO_CNT_S 16
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#define UART_RXD (BIT(15))
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#define UART_CTSN (BIT(14))
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#define UART_DSRN (BIT(13))
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#define UART_RXFIFO_CNT 0x000000FF
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#define UART_RXFIFO_CNT_S 0
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#define UART_CONF0(i) (REG_UART_BASE(i) + 0x20)
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#define UART_DTR_INV (BIT(24))
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#define UART_RTS_INV (BIT(23))
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#define UART_TXD_INV (BIT(22))
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#define UART_DSR_INV (BIT(21))
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#define UART_CTS_INV (BIT(20))
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#define UART_RXD_INV (BIT(19))
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#define UART_LINE_INV_MASK UL(0x3f << 19)
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#define UART_TXFIFO_RST (BIT(18))
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#define UART_RXFIFO_RST (BIT(17))
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#define UART_IRDA_EN (BIT(16))
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#define UART_TX_FLOW_EN (BIT(15))
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#define UART_LOOPBACK (BIT(14))
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#define UART_IRDA_RX_INV (BIT(13))
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#define UART_IRDA_TX_INV (BIT(12))
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#define UART_IRDA_WCTL (BIT(11))
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#define UART_IRDA_TX_EN (BIT(10))
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#define UART_IRDA_DPLX (BIT(9))
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#define UART_TXD_BRK (BIT(8))
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#define UART_SW_DTR (BIT(7))
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#define UART_SW_RTS (BIT(6))
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#define UART_STOP_BIT_NUM 0x00000003
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#define UART_STOP_BIT_NUM_S 4
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#define UART_BIT_NUM 0x00000003
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#define UART_BIT_NUM_S 2
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#define UART_PARITY_EN (BIT(1))
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#define UART_PARITY_EN_M 0x00000001
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#define UART_PARITY_EN_S 1
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#define UART_PARITY (BIT(0))
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#define UART_PARITY_M 0x00000001
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#define UART_PARITY_S 0
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#define UART_CONF1(i) (REG_UART_BASE(i) + 0x24)
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#define UART_RX_TOUT_EN (BIT(31))
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#define UART_RX_TOUT_THRHD 0x0000007F
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#define UART_RX_TOUT_THRHD_S 24
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#define UART_RX_FLOW_EN (BIT(23))
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#define UART_RX_FLOW_THRHD 0x0000007F
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#define UART_RX_FLOW_THRHD_S 16
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#define UART_TXFIFO_EMPTY_THRHD 0x0000007F
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#define UART_TXFIFO_EMPTY_THRHD_S 8
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#define UART_RXFIFO_FULL_THRHD 0x0000007F
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#define UART_RXFIFO_FULL_THRHD_S 0
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#define UART_LOWPULSE(i) (REG_UART_BASE(i) + 0x28)
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#define UART_LOWPULSE_MIN_CNT 0x000FFFFF
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#define UART_LOWPULSE_MIN_CNT_S 0
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#define UART_HIGHPULSE(i) (REG_UART_BASE(i) + 0x2C)
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#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
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#define UART_HIGHPULSE_MIN_CNT_S 0
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#define UART_PULSE_NUM(i) (REG_UART_BASE(i) + 0x30)
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#define UART_PULSE_NUM_CNT 0x0003FF
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#define UART_PULSE_NUM_CNT_S 0
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#define UART_DATE(i) (REG_UART_BASE(i) + 0x78)
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#define UART_ID(i) (REG_UART_BASE(i) + 0x7C)
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#endif // UART_REGISTER_H_INCLUDED
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