initial

7 years ago · 11764cbd7a
commit 11764cbd7a
68 changed files with 41110 additions and 0 deletions
--- a/.gitignore
+++ b/.gitignore
@ -0,0 +1,17 @@
+*~
+*.o
+*.d
+*.bin
+*.elf
+*.axf
+*.hex
+*.srec
+*.list
+*.map
+*.a
+*.stylecheck
+nbproject
+
+*.dis
+
+/lib/stm32f30x_dsp_stdperiph_lib_um.chm
--- a/.gitmodules
+++ b/.gitmodules
@ -0,0 +1,3 @@
+[submodule "lib/sbmp"]
+	path = lib/sbmp
+	url = git@github.com:MightyPork/sbmp.git
--- a/205
+++ b/205
@ -0,0 +1,205 @@
+################################################################
+
+ARCH_FLAGS     = -msoft-float -mfloat-abi=soft
+ARCH_FLAGS    += -mthumb -mcpu=cortex-m3
+
+# Clock speed constants
+DEFS          += -DF_CPU=8000000UL
+
+DEFS          += -DSTM32F10X_MD
+DEFS          += -DARM_MATH_CM3
+DEFS          += -DUSE_STDPERIPH_DRIVER
+
+LDSCRIPT       = lib/cmsis/stm32_flash.ld
+STARTUP_SCRIPT = lib/cmsis/startup_stm32f10x_md.s
+
+
+################################################################
+
+# Main file
+BINARY      = main
+
+# Project include dirs
+INCL_DIRS  := project
+
+# C files
+SOURCES   := $(shell find project -type f -name "*.c")
+#SOURCES   += $(shell find lib/sbmp/library -type f -name "*.c")
+
+HEADERS   := $(shell find project -type f -name "*.h")
+#HEADERS   += $(shell find lib/sbmp/library -type f -name "*.h")
+
+#INCL_DIRS += lib/sbmp/library
+
+################################################################
+
+# Add library sources and include paths
+LIB_INCL_DIRS =
+LIB_SOURCES =
+include lib/CMSIS.mk
+include lib/SPL.mk
+include lib/SBMP.mk
+
+INCL_DIRS += $(LIB_INCL_DIRS)
+
+LIB_OBJS_ = $(LIB_SOURCES:.c=.o)
+LIB_OBJS = $(LIB_OBJS_:.S=.o)
+
+# .c -> .o
+
+OBJS = $(SOURCES:%.c=%.o)
+OBJS += $(STARTUP_SCRIPT:.s=.o)
+
+LIBNAME = stm32f103spl
+LIBFILE = lib/lib$(LIBNAME).a
+
+
+################################################################
+
+SUBDIR_ROOTS = .
+GARBAGE_PATTERNS := *.o *.d *.elf *.bin *.hex *.srec *.list *.map *.dis *.disasm .depend
+
+DIRS := . $(shell find $(SUBDIR_ROOTS) -type d)
+GARBAGE := $(foreach DIR,$(DIRS),$(addprefix $(DIR)/,$(GARBAGE_PATTERNS)))
+
+###############################################################################
+###############################################################################
+###############################################################################
+
+# Be silent per default, but 'make V=1' will show all compiler calls.
+ifneq ($(V),1)
+  Q     := @
+  NULL  := 2>/dev/null
+endif
+
+###############################################################################
+# Executables
+
+PREFIX  ?= arm-none-eabi
+
+CC      := $(PREFIX)-gcc
+CXX     := $(PREFIX)-g++
+LD      := $(PREFIX)-gcc
+AR      := $(PREFIX)-ar
+AS      := $(PREFIX)-as
+OBJCOPY := $(PREFIX)-objcopy
+SIZE    := $(PREFIX)-size
+OBJDUMP := $(PREFIX)-objdump
+GDB     := $(PREFIX)-gdb
+STFLASH := $(shell which st-flash)
+
+###############################################################################
+
+# For CMSIS compatibility
+DEFS          += -D__weak="__attribute__((weak))" -D__packed="__attribute__((__packed__))"
+DEFS          += -DVERBOSE_LOGGING=1
+
+###############################################################################
+# C flags
+
+CFLAGS      += -Os -ggdb -std=gnu99 -Wfatal-errors
+CFLAGS      += -Wall -Wextra -Wshadow
+CFLAGS      += -Wwrite-strings -Wold-style-definition -Winline -Wmissing-noreturn -Wstrict-prototypes
+CFLAGS      += -Wredundant-decls -Wfloat-equal -Wsign-compare
+CFLAGS      += -fno-common -ffunction-sections -fdata-sections -Wunused-function
+CFLAGS      += -MD -Wno-format-zero-length
+CFLAGS      += $(INCL_DIRS:%=-I%) $(DEFS)
+#-flto
+
+# Special flags to hide warnings in CMSIS
+LIB_CFLAGS   = -Wno-shadow -Wno-float-equal -Wno-inline -Wno-unused-parameter -Wno-unused
+#-Wno-old-style-definition -Wno-strict-prototypes
+
+###############################################################################
+# Linker flags
+
+LDFLAGS     += --static -lm -lc -nostartfiles
+LDFLAGS     += -Llib
+LDFLAGS     += -T$(LDSCRIPT)
+LDFLAGS     += -Wl,-Map=$(*).map
+LDFLAGS     += -Wl,--gc-sections
+#-specs=nano.specs
+
+###############################################################################
+# Used libraries
+
+LDLIBS		+= -lm -lc -l$(LIBNAME)
+LDLIBS		+= -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group
+
+###############################################################################
+###############################################################################
+###############################################################################
+
+.PHONY: all images clean elf bin hex srec list dis ttyusb ttyacm lib libcheck size
+
+.SUFFIXES: .elf .bin .hex .srec .list .map .images
+.SECONDEXPANSION:
+.SECONDARY:
+
+all: elf size
+
+elf: $(BINARY).elf
+bin: $(BINARY).bin
+hex: $(BINARY).hex
+srec: $(BINARY).srec
+list: $(BINARY).list
+
+images: $(BINARY).images
+flash: $(BINARY).flash
+
+dis: $(BINARY).elf
+	$(Q)$(OBJDUMP) -dS $(BINARY).elf -j .text -j .isr_vector > $(BINARY).dis
+
+lib: CFLAGS += $(LIB_CFLAGS)
+lib: $(LIBFILE)
+
+$(LIBFILE): $(LIB_OBJS)
+	$(Q)$(AR) rcsv $@ $(LIB_OBJS)
+
+libcheck:
+	$(Q)if [ ! -e $(LIBFILE) ]; then \
+	  echo "--- You must build the lib first! ---"; \
+	  exit 1; \
+	fi
+
+size: $(BINARY).elf
+	$(Q)$(SIZE) -A $(BINARY).elf | grep -v "    0"
+
+%.images: %.bin %.hex %.srec %.list %.map
+
+%.bin: %.elf
+	$(Q)$(OBJCOPY) -Obinary $(*).elf $(*).bin
+
+%.hex: %.elf
+	$(Q)$(OBJCOPY) -Oihex $(*).elf $(*).hex
+
+%.srec: %.elf
+	$(Q)$(OBJCOPY) -Osrec $(*).elf $(*).srec
+
+%.list: %.elf
+	$(Q)$(OBJDUMP) -S $(*).elf > $(*).list
+
+%.elf %.map: libcheck $(OBJS) $(HEADERS)
+	$(Q)$(LD) $(LDFLAGS) $(ARCH_FLAGS) $(OBJS) $(LDLIBS) -o $(*).elf
+	$(Q)$(SIZE) $(*).elf
+
+%.o: %.c
+	$(Q)echo "CC $(*).c"
+	$(Q)$(CC) $(CFLAGS) $(ARCH_FLAGS) -o $(*).o -c $(*).c
+
+%.o: %.s
+	$(Q)echo "CC $(*).s"
+	$(Q)$(CC) $(CFLAGS) $(ARCH_FLAGS) -o $(*).o -c $(*).s
+
+%.o: %.S
+	$(Q)echo "CC $(*).S"
+	$(Q)$(CC) $(CFLAGS) $(ARCH_FLAGS) -o $(*).o -c $(*).S
+
+clean:
+	$(Q)$(RM) -r $(GARBAGE)
+
+%.flash: %.bin
+	@printf "  FLASH  $<\n"
+	$(Q)$(STFLASH) write $(*).bin 0x8000000
+
+-include $(OBJS:.o=.d)
--- a/f103.pro
+++ b/f103.pro
@ -0,0 +1,107 @@
+TEMPLATE = app
+CONFIG += console
+CONFIG -= app_bundle
+CONFIG -= qt
+
+INCLUDEPATH += \
+	project \
+	lib/spl/inc \
+	lib/cmsis \
+	lib/sbmp/library \
+	/usr/arm-none-eabi/include \
+	/usr/lib/gcc/arm-none-eabi/5.3.0/include/
+
+DEFINES += F_CPU=8000000UL \
+		   STM32F10X_MD \
+		   USE_STDPERIPH_DRIVER \
+		   __null=0 \
+		   __STATIC_INLINE="static inline" \
+		   __INLINE="inline" \
+		   __ASM=__asm \
+		   __CORTEX_M=3 \
+		   VERBOSE_LOGGING=1
+
+HEADERS += \ 
+    lib/cmsis/core_cm3.h \
+    lib/cmsis/stm32f10x.h \
+    lib/sbmp/library/crc32.h \
+    lib/sbmp/library/payload_builder.h \
+    lib/sbmp/library/payload_parser.h \
+    lib/sbmp/library/sbmp.h \
+    lib/sbmp/library/sbmp_bulk.h \
+    lib/sbmp/library/sbmp_checksum.h \
+    lib/sbmp/library/sbmp_config.example.h \
+    lib/sbmp/library/sbmp_datagram.h \
+    lib/sbmp/library/sbmp_frame.h \
+    lib/sbmp/library/sbmp_session.h \
+    lib/sbmp/library/type_coerce.h \
+    lib/spl/inc/misc.h \
+    lib/spl/inc/stm32f10x_adc.h \
+    lib/spl/inc/stm32f10x_bkp.h \
+    lib/spl/inc/stm32f10x_can.h \
+    lib/spl/inc/stm32f10x_cec.h \
+    lib/spl/inc/stm32f10x_crc.h \
+    lib/spl/inc/stm32f10x_dac.h \
+    lib/spl/inc/stm32f10x_dbgmcu.h \
+    lib/spl/inc/stm32f10x_dma.h \
+    lib/spl/inc/stm32f10x_exti.h \
+    lib/spl/inc/stm32f10x_flash.h \
+    lib/spl/inc/stm32f10x_fsmc.h \
+    lib/spl/inc/stm32f10x_gpio.h \
+    lib/spl/inc/stm32f10x_i2c.h \
+    lib/spl/inc/stm32f10x_iwdg.h \
+    lib/spl/inc/stm32f10x_pwr.h \
+    lib/spl/inc/stm32f10x_rcc.h \
+    lib/spl/inc/stm32f10x_rtc.h \
+    lib/spl/inc/stm32f10x_sdio.h \
+    lib/spl/inc/stm32f10x_spi.h \
+    lib/spl/inc/stm32f10x_tim.h \
+    lib/spl/inc/stm32f10x_usart.h \
+    lib/spl/inc/stm32f10x_wwdg.h \
+    project/stm32f10x_conf.h \
+    project/stm32f10x_it.h \
+    project/system_stm32f10x.h \
+    project/sbmp_config.h
+
+SOURCES += \ 
+    lib/cmsis/core_cm3.c \
+    lib/sbmp/library/crc32.c \
+    lib/sbmp/library/payload_builder.c \
+    lib/sbmp/library/payload_parser.c \
+    lib/sbmp/library/sbmp_bulk.c \
+    lib/sbmp/library/sbmp_checksum.c \
+    lib/sbmp/library/sbmp_datagram.c \
+    lib/sbmp/library/sbmp_frame.c \
+    lib/sbmp/library/sbmp_session.c \
+    lib/spl/src/misc.c \
+    lib/spl/src/stm32f10x_adc.c \
+    lib/spl/src/stm32f10x_bkp.c \
+    lib/spl/src/stm32f10x_can.c \
+    lib/spl/src/stm32f10x_cec.c \
+    lib/spl/src/stm32f10x_crc.c \
+    lib/spl/src/stm32f10x_dac.c \
+    lib/spl/src/stm32f10x_dbgmcu.c \
+    lib/spl/src/stm32f10x_dma.c \
+    lib/spl/src/stm32f10x_exti.c \
+    lib/spl/src/stm32f10x_flash.c \
+    lib/spl/src/stm32f10x_fsmc.c \
+    lib/spl/src/stm32f10x_gpio.c \
+    lib/spl/src/stm32f10x_i2c.c \
+    lib/spl/src/stm32f10x_iwdg.c \
+    lib/spl/src/stm32f10x_pwr.c \
+    lib/spl/src/stm32f10x_rcc.c \
+    lib/spl/src/stm32f10x_rtc.c \
+    lib/spl/src/stm32f10x_sdio.c \
+    lib/spl/src/stm32f10x_spi.c \
+    lib/spl/src/stm32f10x_tim.c \
+    lib/spl/src/stm32f10x_usart.c \
+    lib/spl/src/stm32f10x_wwdg.c \
+    project/main.c \
+    project/stm32f10x_it.c \
+    project/system_stm32f10x.c
+
+DISTFILES += \
+	style.astylerc \
+	Makefile \
+    lib/cmsis/startup_stm32f10x_md.s \
+    lib/cmsis/stm32_flash.ld
--- a/f103.pro.user
+++ b/f103.pro.user
@ -0,0 +1,372 @@
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+    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DisplayName"></value>
+    <value type="QString" key="ProjectExplorer.ProjectConfiguration.Id">Qt4ProjectManager.Qt4BuildConfiguration</value>
+    <value type="int" key="Qt4ProjectManager.Qt4BuildConfiguration.BuildConfiguration">0</value>
+    <value type="bool" key="Qt4ProjectManager.Qt4BuildConfiguration.UseShadowBuild">true</value>
+   </valuemap>
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+   <value type="int" key="ProjectExplorer.Target.DeployConfigurationCount">0</value>
+   <valuemap type="QVariantMap" key="ProjectExplorer.Target.PluginSettings"/>
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+    <value type="uint" key="Analyzer.QmlProfiler.FlushInterval">1000</value>
+    <value type="QString" key="Analyzer.QmlProfiler.LastTraceFile"></value>
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+    <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.Executable"></value>
+    <value type="QString" key="ProjectExplorer.CustomExecutableRunConfiguration.WorkingDirectory">%{buildDir}</value>
+    <value type="QString" key="ProjectExplorer.ProjectConfiguration.DefaultDisplayName">Custom Executable</value>
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+    <value type="int" key="Analyzer.Valgrind.SelfModifyingCodeDetection">1</value>
+    <value type="bool" key="Analyzer.Valgrind.Settings.UseGlobalSettings">true</value>
+    <value type="bool" key="Analyzer.Valgrind.ShowReachable">false</value>
+    <value type="bool" key="Analyzer.Valgrind.TrackOrigins">true</value>
+    <value type="QString" key="Analyzer.Valgrind.ValgrindExecutable">valgrind</value>
+    <valuelist type="QVariantList" key="Analyzer.Valgrind.VisibleErrorKinds">
+     <value type="int">0</value>
+     <value type="int">1</value>
+     <value type="int">2</value>
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+    <value type="QString" key="Qt4ProjectManager.MaemoRunConfiguration.Arguments"></value>
+    <value type="QString" key="Qt4ProjectManager.MaemoRunConfiguration.ProFile"></value>
+    <value type="uint" key="RunConfiguration.QmlDebugServerPort">3768</value>
+    <value type="bool" key="RunConfiguration.UseCppDebugger">false</value>
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+    <value type="bool" key="RunConfiguration.UseQmlDebugger">false</value>
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+   </valuemap>
+   <value type="int" key="ProjectExplorer.Target.RunConfigurationCount">2</value>
+  </valuemap>
+ </data>
+ <data>
+  <variable>ProjectExplorer.Project.TargetCount</variable>
+  <value type="int">1</value>
+ </data>
+ <data>
+  <variable>ProjectExplorer.Project.Updater.FileVersion</variable>
+  <value type="int">18</value>
+ </data>
+ <data>
+  <variable>Version</variable>
+  <value type="int">18</value>
+ </data>
+</qtcreator>
--- a/lib/CMSIS.mk
+++ b/lib/CMSIS.mk
@ -0,0 +1,4 @@
+# Include CMSIS
+
+LIB_INCL_DIRS += lib/cmsis
+LIB_SOURCES += lib/cmsis/core_cm3.c
--- a/lib/SBMP.mk
+++ b/lib/SBMP.mk
@ -0,0 +1,12 @@
+# Include SBMP
+
+LIB_INCL_DIRS += lib/sbmp/library
+
+LIB_SOURCES += lib/sbmp/library/crc32.c
+LIB_SOURCES += lib/sbmp/library/payload_builder.c
+LIB_SOURCES += lib/sbmp/library/payload_parser.c
+LIB_SOURCES += lib/sbmp/library/sbmp_bulk.c
+LIB_SOURCES += lib/sbmp/library/sbmp_checksum.c
+LIB_SOURCES += lib/sbmp/library/sbmp_datagram.c
+LIB_SOURCES += lib/sbmp/library/sbmp_frame.c
+LIB_SOURCES += lib/sbmp/library/sbmp_session.c
--- a/lib/SPL.mk
+++ b/lib/SPL.mk
@ -0,0 +1,27 @@
+# Include Standard peripheral Driver
+
+LIB_INCL_DIRS += lib/spl/inc
+
+LIB_SOURCES += lib/spl/src/misc.c
+LIB_SOURCES += lib/spl/src/stm32f10x_adc.c
+LIB_SOURCES += lib/spl/src/stm32f10x_bkp.c
+LIB_SOURCES += lib/spl/src/stm32f10x_can.c
+LIB_SOURCES += lib/spl/src/stm32f10x_cec.c
+LIB_SOURCES += lib/spl/src/stm32f10x_crc.c
+LIB_SOURCES += lib/spl/src/stm32f10x_dac.c
+LIB_SOURCES += lib/spl/src/stm32f10x_dbgmcu.c
+LIB_SOURCES += lib/spl/src/stm32f10x_dma.c
+LIB_SOURCES += lib/spl/src/stm32f10x_exti.c
+LIB_SOURCES += lib/spl/src/stm32f10x_flash.c
+LIB_SOURCES += lib/spl/src/stm32f10x_fsmc.c
+LIB_SOURCES += lib/spl/src/stm32f10x_gpio.c
+LIB_SOURCES += lib/spl/src/stm32f10x_i2c.c
+LIB_SOURCES += lib/spl/src/stm32f10x_iwdg.c
+LIB_SOURCES += lib/spl/src/stm32f10x_pwr.c
+LIB_SOURCES += lib/spl/src/stm32f10x_rcc.c
+LIB_SOURCES += lib/spl/src/stm32f10x_rtc.c
+LIB_SOURCES += lib/spl/src/stm32f10x_sdio.c
+LIB_SOURCES += lib/spl/src/stm32f10x_spi.c
+LIB_SOURCES += lib/spl/src/stm32f10x_tim.c
+LIB_SOURCES += lib/spl/src/stm32f10x_usart.c
+LIB_SOURCES += lib/spl/src/stm32f10x_wwdg.c
--- a/lib/cmsis/core_cm3.c
+++ b/lib/cmsis/core_cm3.c
@ -0,0 +1,784 @@
+/**************************************************************************//**
+ * @file     core_cm3.c
+ * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Source File
+ * @version  V1.30
+ * @date     30. October 2009
+ *
+ * @note
+ * Copyright (C) 2009 ARM Limited. All rights reserved.
+ *
+ * @par
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M
+ * processor based microcontrollers.  This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ ******************************************************************************/
+
+#include <stdint.h>
+
+/* define compiler specific symbols */
+#if defined ( __CC_ARM   )
+  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
+  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
+
+#elif defined ( __ICCARM__ )
+  #define __ASM           __asm                                       /*!< asm keyword for IAR Compiler          */
+  #define __INLINE        inline                                      /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
+
+#elif defined   (  __GNUC__  )
+  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
+  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
+
+#elif defined   (  __TASKING__  )
+  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
+  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
+
+#endif
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+
+#if defined ( __CC_ARM   ) /*------------------RealView Compiler -----------------*/
+/* ARM armcc specific functions */
+
+/**
+ * @brief  Return the Process Stack Pointer
+ *
+ * @return ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+__ASM uint32_t __get_PSP(void)
+{
+  mrs r0, psp
+  bx lr
+}
+
+/**
+ * @brief  Set the Process Stack Pointer
+ *
+ * @param  topOfProcStack  Process Stack Pointer
+ *
+ * Assign the value ProcessStackPointer to the MSP
+ * (process stack pointer) Cortex processor register
+ */
+__ASM void __set_PSP(uint32_t topOfProcStack)
+{
+  msr psp, r0
+  bx lr
+}
+
+/**
+ * @brief  Return the Main Stack Pointer
+ *
+ * @return Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+__ASM uint32_t __get_MSP(void)
+{
+  mrs r0, msp
+  bx lr
+}
+
+/**
+ * @brief  Set the Main Stack Pointer
+ *
+ * @param  topOfMainStack  Main Stack Pointer
+ *
+ * Assign the value mainStackPointer to the MSP
+ * (main stack pointer) Cortex processor register
+ */
+__ASM void __set_MSP(uint32_t mainStackPointer)
+{
+  msr msp, r0
+  bx lr
+}
+
+/**
+ * @brief  Reverse byte order in unsigned short value
+ *
+ * @param   value  value to reverse
+ * @return         reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+__ASM uint32_t __REV16(uint16_t value)
+{
+  rev16 r0, r0
+  bx lr
+}
+
+/**
+ * @brief  Reverse byte order in signed short value with sign extension to integer
+ *
+ * @param   value  value to reverse
+ * @return         reversed value
+ *
+ * Reverse byte order in signed short value with sign extension to integer
+ */
+__ASM int32_t __REVSH(int16_t value)
+{
+  revsh r0, r0
+  bx lr
+}
+
+
+#if (__ARMCC_VERSION < 400000)
+
+/**
+ * @brief  Remove the exclusive lock created by ldrex
+ *
+ * Removes the exclusive lock which is created by ldrex.
+ */
+__ASM void __CLREX(void)
+{
+  clrex
+}
+
+/**
+ * @brief  Return the Base Priority value
+ *
+ * @return BasePriority
+ *
+ * Return the content of the base priority register
+ */
+__ASM uint32_t  __get_BASEPRI(void)
+{
+  mrs r0, basepri
+  bx lr
+}
+
+/**
+ * @brief  Set the Base Priority value
+ *
+ * @param  basePri  BasePriority
+ *
+ * Set the base priority register
+ */
+__ASM void __set_BASEPRI(uint32_t basePri)
+{
+  msr basepri, r0
+  bx lr
+}
+
+/**
+ * @brief  Return the Priority Mask value
+ *
+ * @return PriMask
+ *
+ * Return state of the priority mask bit from the priority mask register
+ */
+__ASM uint32_t __get_PRIMASK(void)
+{
+  mrs r0, primask
+  bx lr
+}
+
+/**
+ * @brief  Set the Priority Mask value
+ *
+ * @param  priMask  PriMask
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+__ASM void __set_PRIMASK(uint32_t priMask)
+{
+  msr primask, r0
+  bx lr
+}
+
+/**
+ * @brief  Return the Fault Mask value
+ *
+ * @return FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+__ASM uint32_t  __get_FAULTMASK(void)
+{
+  mrs r0, faultmask
+  bx lr
+}
+
+/**
+ * @brief  Set the Fault Mask value
+ *
+ * @param  faultMask  faultMask value
+ *
+ * Set the fault mask register
+ */
+__ASM void __set_FAULTMASK(uint32_t faultMask)
+{
+  msr faultmask, r0
+  bx lr
+}
+
+/**
+ * @brief  Return the Control Register value
+ *
+ * @return Control value
+ *
+ * Return the content of the control register
+ */
+__ASM uint32_t __get_CONTROL(void)
+{
+  mrs r0, control
+  bx lr
+}
+
+/**
+ * @brief  Set the Control Register value
+ *
+ * @param  control  Control value
+ *
+ * Set the control register
+ */
+__ASM void __set_CONTROL(uint32_t control)
+{
+  msr control, r0
+  bx lr
+}
+
+#endif /* __ARMCC_VERSION  */
+
+
+
+#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
+/* IAR iccarm specific functions */
+#pragma diag_suppress=Pe940
+
+/**
+ * @brief  Return the Process Stack Pointer
+ *
+ * @return ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+uint32_t __get_PSP(void)
+{
+  __ASM("mrs r0, psp");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Set the Process Stack Pointer
+ *
+ * @param  topOfProcStack  Process Stack Pointer
+ *
+ * Assign the value ProcessStackPointer to the MSP
+ * (process stack pointer) Cortex processor register
+ */
+void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM("msr psp, r0");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Return the Main Stack Pointer
+ *
+ * @return Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+uint32_t __get_MSP(void)
+{
+  __ASM("mrs r0, msp");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Set the Main Stack Pointer
+ *
+ * @param  topOfMainStack  Main Stack Pointer
+ *
+ * Assign the value mainStackPointer to the MSP
+ * (main stack pointer) Cortex processor register
+ */
+void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM("msr msp, r0");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Reverse byte order in unsigned short value
+ *
+ * @param  value  value to reverse
+ * @return        reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+uint32_t __REV16(uint16_t value)
+{
+  __ASM("rev16 r0, r0");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  Reverse bit order of value
+ *
+ * @param  value  value to reverse
+ * @return        reversed value
+ *
+ * Reverse bit order of value
+ */
+uint32_t __RBIT(uint32_t value)
+{
+  __ASM("rbit r0, r0");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  LDR Exclusive (8 bit)
+ *
+ * @param  *addr  address pointer
+ * @return        value of (*address)
+ *
+ * Exclusive LDR command for 8 bit values)
+ */
+uint8_t __LDREXB(uint8_t *addr)
+{
+  __ASM("ldrexb r0, [r0]");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  LDR Exclusive (16 bit)
+ *
+ * @param  *addr  address pointer
+ * @return        value of (*address)
+ *
+ * Exclusive LDR command for 16 bit values
+ */
+uint16_t __LDREXH(uint16_t *addr)
+{
+  __ASM("ldrexh r0, [r0]");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  LDR Exclusive (32 bit)
+ *
+ * @param  *addr  address pointer
+ * @return        value of (*address)
+ *
+ * Exclusive LDR command for 32 bit values
+ */
+uint32_t __LDREXW(uint32_t *addr)
+{
+  __ASM("ldrex r0, [r0]");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  STR Exclusive (8 bit)
+ *
+ * @param  value  value to store
+ * @param  *addr  address pointer
+ * @return        successful / failed
+ *
+ * Exclusive STR command for 8 bit values
+ */
+uint32_t __STREXB(uint8_t value, uint8_t *addr)
+{
+  __ASM("strexb r0, r0, [r1]");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  STR Exclusive (16 bit)
+ *
+ * @param  value  value to store
+ * @param  *addr  address pointer
+ * @return        successful / failed
+ *
+ * Exclusive STR command for 16 bit values
+ */
+uint32_t __STREXH(uint16_t value, uint16_t *addr)
+{
+  __ASM("strexh r0, r0, [r1]");
+  __ASM("bx lr");
+}
+
+/**
+ * @brief  STR Exclusive (32 bit)
+ *
+ * @param  value  value to store
+ * @param  *addr  address pointer
+ * @return        successful / failed
+ *
+ * Exclusive STR command for 32 bit values
+ */
+uint32_t __STREXW(uint32_t value, uint32_t *addr)
+{
+  __ASM("strex r0, r0, [r1]");
+  __ASM("bx lr");
+}
+
+#pragma diag_default=Pe940
+
+
+#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
+/* GNU gcc specific functions */
+
+/**
+ * @brief  Return the Process Stack Pointer
+ *
+ * @return ProcessStackPointer
+ *
+ * Return the actual process stack pointer
+ */
+uint32_t __get_PSP(void) __attribute__( ( naked ) );
+uint32_t __get_PSP(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, psp\n\t"
+				  "MOV r0, %0 \n\t"
+				  "BX  lr     \n\t"  : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Process Stack Pointer
+ *
+ * @param  topOfProcStack  Process Stack Pointer
+ *
+ * Assign the value ProcessStackPointer to the MSP
+ * (process stack pointer) Cortex processor register
+ */
+void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
+void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0\n\t"
+				  "BX  lr     \n\t" : : "r" (topOfProcStack) );
+}
+
+/**
+ * @brief  Return the Main Stack Pointer
+ *
+ * @return Main Stack Pointer
+ *
+ * Return the current value of the MSP (main stack pointer)
+ * Cortex processor register
+ */
+uint32_t __get_MSP(void) __attribute__( ( naked ) );
+uint32_t __get_MSP(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, msp\n\t"
+				  "MOV r0, %0 \n\t"
+				  "BX  lr     \n\t"  : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Main Stack Pointer
+ *
+ * @param  topOfMainStack  Main Stack Pointer
+ *
+ * Assign the value mainStackPointer to the MSP
+ * (main stack pointer) Cortex processor register
+ */
+void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) );
+void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0\n\t"
+				  "BX  lr     \n\t" : : "r" (topOfMainStack) );
+}
+
+/**
+ * @brief  Return the Base Priority value
+ *
+ * @return BasePriority
+ *
+ * Return the content of the base priority register
+ */
+uint32_t __get_BASEPRI(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Base Priority value
+ *
+ * @param  basePri  BasePriority
+ *
+ * Set the base priority register
+ */
+void __set_BASEPRI(uint32_t value)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (value) );
+}
+
+/**
+ * @brief  Return the Priority Mask value
+ *
+ * @return PriMask
+ *
+ * Return state of the priority mask bit from the priority mask register
+ */
+uint32_t __get_PRIMASK(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Priority Mask value
+ *
+ * @param  priMask  PriMask
+ *
+ * Set the priority mask bit in the priority mask register
+ */
+void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
+}
+
+/**
+ * @brief  Return the Fault Mask value
+ *
+ * @return FaultMask
+ *
+ * Return the content of the fault mask register
+ */
+uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Fault Mask value
+ *
+ * @param  faultMask  faultMask value
+ *
+ * Set the fault mask register
+ */
+void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
+}
+
+/**
+ * @brief  Return the Control Register value
+*
+*  @return Control value
+ *
+ * Return the content of the control register
+ */
+uint32_t __get_CONTROL(void)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+/**
+ * @brief  Set the Control Register value
+ *
+ * @param  control  Control value
+ *
+ * Set the control register
+ */
+void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) );
+}
+
+
+/**
+ * @brief  Reverse byte order in integer value
+ *
+ * @param  value  value to reverse
+ * @return        reversed value
+ *
+ * Reverse byte order in integer value
+ */
+uint32_t __REV(uint32_t value)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
+  return(result);
+}
+
+/**
+ * @brief  Reverse byte order in unsigned short value
+ *
+ * @param  value  value to reverse
+ * @return        reversed value
+ *
+ * Reverse byte order in unsigned short value
+ */
+uint32_t __REV16(uint16_t value)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
+  return(result);
+}
+
+/**
+ * @brief  Reverse byte order in signed short value with sign extension to integer
+ *
+ * @param  value  value to reverse
+ * @return        reversed value
+ *
+ * Reverse byte order in signed short value with sign extension to integer
+ */
+int32_t __REVSH(int16_t value)
+{
+  uint32_t result=0;
+
+  __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
+  return(result);
+}
+
+/**
+ * @brief  Reverse bit order of value
+ *
+ * @param  value  value to reverse
+ * @return        reversed value
+ *
+ * Reverse bit order of value
+ */
+uint32_t __RBIT(uint32_t value)
+{
+  uint32_t result=0;
+
+   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+   return(result);
+}
+
+/**
+ * @brief  LDR Exclusive (8 bit)
+ *
+ * @param  *addr  address pointer
+ * @return        value of (*address)
+ *
+ * Exclusive LDR command for 8 bit value
+ */
+uint8_t __LDREXB(uint8_t *addr)
+{
+	uint8_t result=0;
+
+   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
+   return(result);
+}
+
+/**
+ * @brief  LDR Exclusive (16 bit)