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/**
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****************************************************************************** |
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* @file stm8s_adc1.h |
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* @author MCD Application Team |
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* @version V2.2.0 |
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* @date 30-September-2014 |
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* @brief This file contains all the prototypes/macros for the ADC1 peripheral. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> |
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* |
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
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* You may not use this file except in compliance with the License. |
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* You may obtain a copy of the License at: |
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* |
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* http://www.st.com/software_license_agreement_liberty_v2
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* |
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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* See the License for the specific language governing permissions and |
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* limitations under the License. |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM8S_ADC1_H |
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#define __STM8S_ADC1_H |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm8s.h" |
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/* Exported types ------------------------------------------------------------*/ |
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/** @addtogroup ADC1_Exported_Types
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* @{ |
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*/ |
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/**
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* @brief ADC1 clock prescaler selection |
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*/ |
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typedef enum { |
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ADC1_PRESSEL_FCPU_D2 = (uint8_t) 0x00, /**< Prescaler selection fADC1 = fcpu/2 */ |
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ADC1_PRESSEL_FCPU_D3 = (uint8_t) 0x10, /**< Prescaler selection fADC1 = fcpu/3 */ |
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ADC1_PRESSEL_FCPU_D4 = (uint8_t) 0x20, /**< Prescaler selection fADC1 = fcpu/4 */ |
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ADC1_PRESSEL_FCPU_D6 = (uint8_t) 0x30, /**< Prescaler selection fADC1 = fcpu/6 */ |
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ADC1_PRESSEL_FCPU_D8 = (uint8_t) 0x40, /**< Prescaler selection fADC1 = fcpu/8 */ |
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ADC1_PRESSEL_FCPU_D10 = (uint8_t) 0x50, /**< Prescaler selection fADC1 = fcpu/10 */ |
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ADC1_PRESSEL_FCPU_D12 = (uint8_t) 0x60, /**< Prescaler selection fADC1 = fcpu/12 */ |
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ADC1_PRESSEL_FCPU_D18 = (uint8_t) 0x70 /**< Prescaler selection fADC1 = fcpu/18 */ |
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} ADC1_PresSel_TypeDef; |
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/**
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* @brief ADC1 External conversion trigger event selection |
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*/ |
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typedef enum { |
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ADC1_EXTTRIG_TIM = (uint8_t) 0x00, /**< Conversion from Internal TIM1 TRGO event */ |
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ADC1_EXTTRIG_GPIO = (uint8_t) 0x10 /**< Conversion from External interrupt on ADC_ETR pin*/ |
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} ADC1_ExtTrig_TypeDef; |
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/**
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* @brief ADC1 data alignment |
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*/ |
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typedef enum { |
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ADC1_ALIGN_LEFT = (uint8_t) 0x00, /**< Data alignment left */ |
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ADC1_ALIGN_RIGHT = (uint8_t) 0x08 /**< Data alignment right */ |
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} ADC1_Align_TypeDef; |
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/**
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* @brief ADC1 Interrupt source |
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*/ |
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typedef enum { |
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ADC1_IT_AWDIE = (uint16_t) 0x010, /**< Analog WDG interrupt enable */ |
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ADC1_IT_EOCIE = (uint16_t) 0x020, /**< EOC interrupt enable */ |
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ADC1_IT_AWD = (uint16_t) 0x140, /**< Analog WDG status */ |
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ADC1_IT_AWS0 = (uint16_t) 0x110, /**< Analog channel 0 status */ |
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ADC1_IT_AWS1 = (uint16_t) 0x111, /**< Analog channel 1 status */ |
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ADC1_IT_AWS2 = (uint16_t) 0x112, /**< Analog channel 2 status */ |
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ADC1_IT_AWS3 = (uint16_t) 0x113, /**< Analog channel 3 status */ |
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ADC1_IT_AWS4 = (uint16_t) 0x114, /**< Analog channel 4 status */ |
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ADC1_IT_AWS5 = (uint16_t) 0x115, /**< Analog channel 5 status */ |
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ADC1_IT_AWS6 = (uint16_t) 0x116, /**< Analog channel 6 status */ |
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ADC1_IT_AWS7 = (uint16_t) 0x117, /**< Analog channel 7 status */ |
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ADC1_IT_AWS8 = (uint16_t) 0x118, /**< Analog channel 8 status */ |
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ADC1_IT_AWS9 = (uint16_t) 0x119, /**< Analog channel 9 status */ |
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ADC1_IT_AWS12 = (uint16_t) 0x11C, /**< Analog channel 12 status */ |
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/* refer to product datasheet for channel 12 availability */ |
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ADC1_IT_EOC = (uint16_t) 0x080 /**< EOC pending bit */ |
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} ADC1_IT_TypeDef; |
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/**
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* @brief ADC1 Flags |
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*/ |
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typedef enum { |
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ADC1_FLAG_OVR = (uint8_t) 0x41, /**< Overrun status flag */ |
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ADC1_FLAG_AWD = (uint8_t) 0x40, /**< Analog WDG status */ |
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ADC1_FLAG_AWS0 = (uint8_t) 0x10, /**< Analog channel 0 status */ |
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ADC1_FLAG_AWS1 = (uint8_t) 0x11, /**< Analog channel 1 status */ |
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ADC1_FLAG_AWS2 = (uint8_t) 0x12, /**< Analog channel 2 status */ |
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ADC1_FLAG_AWS3 = (uint8_t) 0x13, /**< Analog channel 3 status */ |
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ADC1_FLAG_AWS4 = (uint8_t) 0x14, /**< Analog channel 4 status */ |
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ADC1_FLAG_AWS5 = (uint8_t) 0x15, /**< Analog channel 5 status */ |
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ADC1_FLAG_AWS6 = (uint8_t) 0x16, /**< Analog channel 6 status */ |
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ADC1_FLAG_AWS7 = (uint8_t) 0x17, /**< Analog channel 7 status */ |
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ADC1_FLAG_AWS8 = (uint8_t) 0x18, /**< Analog channel 8 status*/ |
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ADC1_FLAG_AWS9 = (uint8_t) 0x19, /**< Analog channel 9 status */ |
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ADC1_FLAG_AWS12 = (uint8_t) 0x1C, /**< Analog channel 12 status */ |
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/* refer to product datasheet for channel 12 availability */ |
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ADC1_FLAG_EOC = (uint8_t) 0x80 /**< EOC falg */ |
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} ADC1_Flag_TypeDef; |
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/**
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* @brief ADC1 schmitt Trigger |
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*/ |
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typedef enum { |
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ADC1_SCHMITTTRIG_CHANNEL0 = (uint8_t) 0x00, /**< Schmitt trigger disable on AIN0 */ |
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ADC1_SCHMITTTRIG_CHANNEL1 = (uint8_t) 0x01, /**< Schmitt trigger disable on AIN1 */ |
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ADC1_SCHMITTTRIG_CHANNEL2 = (uint8_t) 0x02, /**< Schmitt trigger disable on AIN2 */ |
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ADC1_SCHMITTTRIG_CHANNEL3 = (uint8_t) 0x03, /**< Schmitt trigger disable on AIN3 */ |
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ADC1_SCHMITTTRIG_CHANNEL4 = (uint8_t) 0x04, /**< Schmitt trigger disable on AIN4 */ |
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ADC1_SCHMITTTRIG_CHANNEL5 = (uint8_t) 0x05, /**< Schmitt trigger disable on AIN5 */ |
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ADC1_SCHMITTTRIG_CHANNEL6 = (uint8_t) 0x06, /**< Schmitt trigger disable on AIN6 */ |
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ADC1_SCHMITTTRIG_CHANNEL7 = (uint8_t) 0x07, /**< Schmitt trigger disable on AIN7 */ |
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ADC1_SCHMITTTRIG_CHANNEL8 = (uint8_t) 0x08, /**< Schmitt trigger disable on AIN8 */ |
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ADC1_SCHMITTTRIG_CHANNEL9 = (uint8_t) 0x09, /**< Schmitt trigger disable on AIN9 */ |
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ADC1_SCHMITTTRIG_CHANNEL12 = (uint8_t) 0x0C, /**< Schmitt trigger disable on AIN12 */ |
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/* refer to product datasheet for channel 12 availability */ |
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ADC1_SCHMITTTRIG_ALL = (uint8_t) 0xFF /**< Schmitt trigger disable on All channels */ |
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} ADC1_SchmittTrigg_TypeDef; |
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/**
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* @brief ADC1 conversion mode selection |
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*/ |
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typedef enum { |
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ADC1_CONVERSIONMODE_SINGLE = (uint8_t) 0x00, /**< Single conversion mode */ |
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ADC1_CONVERSIONMODE_CONTINUOUS = (uint8_t) 0x01 /**< Continuous conversion mode */ |
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} ADC1_ConvMode_TypeDef; |
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/**
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* @brief ADC1 analog channel selection |
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*/ |
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typedef enum { |
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ADC1_CHANNEL_0 = (uint8_t) 0x00, /**< Analog channel 0 */ |
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ADC1_CHANNEL_1 = (uint8_t) 0x01, /**< Analog channel 1 */ |
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ADC1_CHANNEL_2 = (uint8_t) 0x02, /**< Analog channel 2 */ |
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ADC1_CHANNEL_3 = (uint8_t) 0x03, /**< Analog channel 3 */ |
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ADC1_CHANNEL_4 = (uint8_t) 0x04, /**< Analog channel 4 */ |
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ADC1_CHANNEL_5 = (uint8_t) 0x05, /**< Analog channel 5 */ |
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ADC1_CHANNEL_6 = (uint8_t) 0x06, /**< Analog channel 6 */ |
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ADC1_CHANNEL_7 = (uint8_t) 0x07, /**< Analog channel 7 */ |
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ADC1_CHANNEL_8 = (uint8_t) 0x08, /**< Analog channel 8 */ |
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ADC1_CHANNEL_9 = (uint8_t) 0x09, /**< Analog channel 9 */ |
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ADC1_CHANNEL_12 = (uint8_t) 0x0C /**< Analog channel 12 */ |
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/* refer to product datasheet for channel 12 availability */ |
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} ADC1_Channel_TypeDef; |
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/**
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* @} |
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*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/* Exported macros ------------------------------------------------------------*/ |
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/* Private macros ------------------------------------------------------------*/ |
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/** @addtogroup ADC1_Private_Macros
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* @brief Macros used by the assert function to check the different functions parameters. |
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* @{ |
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*/ |
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/**
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* @brief Macro used by the assert function to check the different prescaler's values. |
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*/ |
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#define IS_ADC1_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC1_PRESSEL_FCPU_D2) || \ |
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((PRESCALER) == ADC1_PRESSEL_FCPU_D3) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D4) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D6) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D8) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D10) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D12) || \
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((PRESCALER) == ADC1_PRESSEL_FCPU_D18)) |
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/**
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* @brief Macro used by the assert function to check the different external trigger values. |
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*/ |
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#define IS_ADC1_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC1_EXTTRIG_TIM) || \ |
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((EXTRIG) == ADC1_EXTTRIG_GPIO)) |
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/**
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* @brief Macro used by the assert function to check the different alignment modes. |
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*/ |
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#define IS_ADC1_ALIGN_OK(ALIGN) (((ALIGN) == ADC1_ALIGN_LEFT) || \ |
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((ALIGN) == ADC1_ALIGN_RIGHT)) |
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/**
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* @brief Macro used by the assert function to check the Interrupt source. |
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*/ |
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#define IS_ADC1_IT_OK(IT) (((IT) == ADC1_IT_EOCIE) || \ |
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((IT) == ADC1_IT_AWDIE)) |
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/**
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* @brief Macro used by the assert function to check the ADC1 Flag. |
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*/ |
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#define IS_ADC1_FLAG_OK(FLAG) (((FLAG) == ADC1_FLAG_EOC)|| \ |
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((FLAG) == ADC1_FLAG_OVR) || \
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((FLAG) == ADC1_FLAG_AWD) || \
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((FLAG) == ADC1_FLAG_AWS0) || \
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((FLAG) == ADC1_FLAG_AWS1) || \
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((FLAG) == ADC1_FLAG_AWS2) || \
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((FLAG) == ADC1_FLAG_AWS3) || \
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((FLAG) == ADC1_FLAG_AWS4) || \
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((FLAG) == ADC1_FLAG_AWS5) || \
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((FLAG) == ADC1_FLAG_AWS6) || \
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((FLAG) == ADC1_FLAG_AWS7) || \
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((FLAG) == ADC1_FLAG_AWS8) || \
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((FLAG) == ADC1_FLAG_AWS9)) |
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/**
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* @brief Macro used by the assert function to check the ADC1 pending bits. |
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*/ |
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#define IS_ADC1_ITPENDINGBIT_OK(ITPENDINGBIT) (((ITPENDINGBIT) == ADC1_IT_EOC) || \ |
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((ITPENDINGBIT) == ADC1_IT_AWD) || \
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((ITPENDINGBIT) == ADC1_IT_AWS0) || \
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((ITPENDINGBIT) == ADC1_IT_AWS1) || \
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((ITPENDINGBIT) == ADC1_IT_AWS2) || \
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((ITPENDINGBIT) == ADC1_IT_AWS3) || \
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((ITPENDINGBIT) == ADC1_IT_AWS4) || \
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((ITPENDINGBIT) == ADC1_IT_AWS5) || \
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((ITPENDINGBIT) == ADC1_IT_AWS6) || \
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((ITPENDINGBIT) == ADC1_IT_AWS7) || \
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((ITPENDINGBIT) == ADC1_IT_AWS8) || \
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((ITPENDINGBIT) == ADC1_IT_AWS12) || \
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((ITPENDINGBIT) == ADC1_IT_AWS9)) |
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/**
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* @brief Macro used by the assert function to check the different schmitt trigger values. |
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*/ |
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#define IS_ADC1_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL0) || \ |
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL1) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL2) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL3) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL4) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL5) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL6) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL7) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL8) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL12) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_ALL) || \
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((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL9)) |
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/**
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* @brief Macro used by the assert function to check the different conversion modes. |
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*/ |
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#define IS_ADC1_CONVERSIONMODE_OK(MODE) (((MODE) == ADC1_CONVERSIONMODE_SINGLE) || \ |
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((MODE) == ADC1_CONVERSIONMODE_CONTINUOUS)) |
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/**
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* @brief Macro used by the assert function to check the different channels values. |
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*/ |
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#define IS_ADC1_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC1_CHANNEL_0) || \ |
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((CHANNEL) == ADC1_CHANNEL_1) || \
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((CHANNEL) == ADC1_CHANNEL_2) || \
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((CHANNEL) == ADC1_CHANNEL_3) || \
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((CHANNEL) == ADC1_CHANNEL_4) || \
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((CHANNEL) == ADC1_CHANNEL_5) || \
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((CHANNEL) == ADC1_CHANNEL_6) || \
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((CHANNEL) == ADC1_CHANNEL_7) || \
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((CHANNEL) == ADC1_CHANNEL_8) || \
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((CHANNEL) == ADC1_CHANNEL_12) || \
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((CHANNEL) == ADC1_CHANNEL_9)) |
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/**
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* @brief Macro used by the assert function to check the possible buffer values. |
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*/ |
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#define IS_ADC1_BUFFER_OK(BUFFER) ((BUFFER) <= (uint8_t)0x09) |
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/**
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* @} |
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*/ |
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/* Exported functions ------------------------------------------------------- */ |
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#if 0 |
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/** @addtogroup ADC1_Exported_Functions
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* @{ |
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*/ |
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void ADC1_DeInit(void); |
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void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, |
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ADC1_Channel_TypeDef ADC1_Channel, |
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ADC1_PresSel_TypeDef ADC1_PrescalerSelection, |
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ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, |
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FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align, |
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ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, |
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FunctionalState ADC1_SchmittTriggerState); |
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void ADC1_Cmd(FunctionalState NewState); |
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void ADC1_ScanModeCmd(FunctionalState NewState); |
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void ADC1_DataBufferCmd(FunctionalState NewState); |
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void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState); |
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void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler); |
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void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, |
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FunctionalState NewState); |
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void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, |
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ADC1_Channel_TypeDef ADC1_Channel, |
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ADC1_Align_TypeDef ADC1_Align); |
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void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState); |
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void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState); |
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void ADC1_StartConversion(void); |
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uint16_t ADC1_GetConversionValue(void); |
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void ADC1_SetHighThreshold(uint16_t Threshold); |
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void ADC1_SetLowThreshold(uint16_t Threshold); |
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uint16_t ADC1_GetBufferValue(uint8_t Buffer); |
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FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel); |
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FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag); |
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void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag); |
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ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit); |
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void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit); |
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#endif |
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/**
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* @} |
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*/ |
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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/** @addtogroup STM8S_StdPeriph_Driver
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* @{ |
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*/ |
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/* Private typedef -----------------------------------------------------------*/ |
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/* Private define ------------------------------------------------------------*/ |
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/* Private macro -------------------------------------------------------------*/ |
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/* Private variables ---------------------------------------------------------*/ |
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/* Private function prototypes -----------------------------------------------*/ |
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/* Private functions ---------------------------------------------------------*/ |
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/* Public functions ----------------------------------------------------------*/ |
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/**
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* @addtogroup ADC1_Public_Functions |
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* @{ |
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*/ |
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/**
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* @brief Deinitializes the ADC1 peripheral registers to their default reset values. |
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* @param None |
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* @retval None |
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*/ |
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inline void ADC1_DeInit(void) |
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{ |
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ADC1->CSR = ADC1_CSR_RESET_VALUE; |
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ADC1->CR1 = ADC1_CR1_RESET_VALUE; |
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ADC1->CR2 = ADC1_CR2_RESET_VALUE; |
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ADC1->CR3 = ADC1_CR3_RESET_VALUE; |
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ADC1->TDRH = ADC1_TDRH_RESET_VALUE; |
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ADC1->TDRL = ADC1_TDRL_RESET_VALUE; |
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ADC1->HTRH = ADC1_HTRH_RESET_VALUE; |
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ADC1->HTRL = ADC1_HTRL_RESET_VALUE; |
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ADC1->LTRH = ADC1_LTRH_RESET_VALUE; |
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ADC1->LTRL = ADC1_LTRL_RESET_VALUE; |
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ADC1->AWCRH = ADC1_AWCRH_RESET_VALUE; |
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ADC1->AWCRL = ADC1_AWCRL_RESET_VALUE; |
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} |
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/**
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* @brief Configure the ADC1 conversion on selected channel. |
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* @param ADC1_ConversionMode Specifies the conversion type. |
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* It can be set of the values of @ref ADC1_ConvMode_TypeDef |
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* @param ADC1_Channel specifies the ADC1 Channel. |
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* It can be set of the values of @ref ADC1_Channel_TypeDef |
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* @param ADC1_Align specifies the converted data alignment. |
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* It can be set of the values of @ref ADC1_Align_TypeDef |
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* @retval None |
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*/ |
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inline void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, |
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ADC1_Align_TypeDef ADC1_Align) |
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{ |
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/* Check the parameters */ |
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assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode)); |
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assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel)); |
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assert_param(IS_ADC1_ALIGN_OK(ADC1_Align)); |
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/* Clear the align bit */ |
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ADC1->CR2 &= (uint8_t) (~ADC1_CR2_ALIGN); |
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/* Configure the data alignment */ |
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ADC1->CR2 |= (uint8_t) (ADC1_Align); |
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if (ADC1_ConversionMode == ADC1_CONVERSIONMODE_CONTINUOUS) { |
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/* Set the continuous conversion mode */ |
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ADC1->CR1 |= ADC1_CR1_CONT; |
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} else /* ADC1_ConversionMode == ADC1_CONVERSIONMODE_SINGLE */ |
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{ |
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/* Set the single conversion mode */ |
||||
ADC1->CR1 &= (uint8_t) (~ADC1_CR1_CONT); |
||||
} |
||||
|
||||
/* Clear the ADC1 channels */ |
||||
ADC1->CSR &= (uint8_t) (~ADC1_CSR_CH); |
||||
/* Select the ADC1 channel */ |
||||
ADC1->CSR |= (uint8_t) (ADC1_Channel); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enables or disables the ADC1 Schmitt Trigger on a selected channel. |
||||
* @param ADC1_SchmittTriggerChannel specifies the desired Channel. |
||||
* It can be set of the values of @ref ADC1_SchmittTrigg_TypeDef. |
||||
* @param NewState specifies Channel new status. |
||||
* can have one of the values of @ref FunctionalState. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState NewState) |
||||
{ |
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel)); |
||||
assert_param(IS_FUNCTIONALSTATE_OK(NewState)); |
||||
|
||||
if (ADC1_SchmittTriggerChannel == ADC1_SCHMITTTRIG_ALL) { |
||||
if (NewState != DISABLE) { |
||||
ADC1->TDRL &= (uint8_t) 0x0; |
||||
ADC1->TDRH &= (uint8_t) 0x0; |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
ADC1->TDRL |= (uint8_t) 0xFF; |
||||
ADC1->TDRH |= (uint8_t) 0xFF; |
||||
} |
||||
} else if (ADC1_SchmittTriggerChannel < ADC1_SCHMITTTRIG_CHANNEL8) { |
||||
if (NewState != DISABLE) { |
||||
ADC1->TDRL &= (uint8_t) (~(uint8_t) ((uint8_t) 0x01 << (uint8_t) ADC1_SchmittTriggerChannel)); |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
ADC1->TDRL |= (uint8_t) ((uint8_t) 0x01 << (uint8_t) ADC1_SchmittTriggerChannel); |
||||
} |
||||
} else /* ADC1_SchmittTriggerChannel >= ADC1_SCHMITTTRIG_CHANNEL8 */ |
||||
{ |
||||
if (NewState != DISABLE) { |
||||
ADC1->TDRH &= (uint8_t) (~(uint8_t) ((uint8_t) 0x01 |
||||
<< ((uint8_t) ADC1_SchmittTriggerChannel - (uint8_t) 8))); |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
ADC1->TDRH |= (uint8_t) ((uint8_t) 0x01 << ((uint8_t) ADC1_SchmittTriggerChannel - (uint8_t) 8)); |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure the ADC1 prescaler division factor. |
||||
* @param ADC1_Prescaler: the selected precaler. |
||||
* It can be one of the values of @ref ADC1_PresSel_TypeDef. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler) |
||||
{ |
||||
/* Check the parameter */ |
||||
assert_param(IS_ADC1_PRESSEL_OK(ADC1_Prescaler)); |
||||
|
||||
/* Clear the SPSEL bits */ |
||||
ADC1->CR1 &= (uint8_t) (~ADC1_CR1_SPSEL); |
||||
/* Select the prescaler division factor according to ADC1_PrescalerSelection values */ |
||||
ADC1->CR1 |= (uint8_t) (ADC1_Prescaler); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configure the ADC1 conversion on external trigger event. |
||||
* @par Full description: |
||||
* The selected external trigger event can be enabled or disabled. |
||||
* @param ADC1_ExtTrigger to select the External trigger event. |
||||
* can have one of the values of @ref ADC1_ExtTrig_TypeDef. |
||||
* @param NewState to enable/disable the selected external trigger |
||||
* can have one of the values of @ref FunctionalState. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState) |
||||
{ |
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger)); |
||||
assert_param(IS_FUNCTIONALSTATE_OK(NewState)); |
||||
|
||||
/* Clear the external trigger selection bits */ |
||||
ADC1->CR2 &= (uint8_t) (~ADC1_CR2_EXTSEL); |
||||
|
||||
if (NewState != DISABLE) { |
||||
/* Enable the selected external Trigger */ |
||||
ADC1->CR2 |= (uint8_t) (ADC1_CR2_EXTTRIG); |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
/* Disable the selected external trigger */ |
||||
ADC1->CR2 &= (uint8_t) (~ADC1_CR2_EXTTRIG); |
||||
} |
||||
|
||||
/* Set the selected external trigger */ |
||||
ADC1->CR2 |= (uint8_t) (ADC1_ExtTrigger); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Initializes the ADC1 peripheral according to the specified parameters |
||||
* @param ADC1_ConversionMode: specifies the conversion mode |
||||
* can be one of the values of @ref ADC1_ConvMode_TypeDef. |
||||
* @param ADC1_Channel: specifies the channel to convert |
||||
* can be one of the values of @ref ADC1_Channel_TypeDef. |
||||
* @param ADC1_PrescalerSelection: specifies the ADC1 prescaler |
||||
* can be one of the values of @ref ADC1_PresSel_TypeDef. |
||||
* @param ADC1_ExtTrigger: specifies the external trigger |
||||
* can be one of the values of @ref ADC1_ExtTrig_TypeDef. |
||||
* @param ADC1_ExtTriggerState: specifies the external trigger new state |
||||
* can be one of the values of @ref FunctionalState. |
||||
* @param ADC1_Align: specifies the converted data alignment |
||||
* can be one of the values of @ref ADC1_Align_TypeDef. |
||||
* @param ADC1_SchmittTriggerChannel: specifies the schmitt trigger channel |
||||
* can be one of the values of @ref ADC1_SchmittTrigg_TypeDef. |
||||
* @param ADC1_SchmittTriggerState: specifies the schmitt trigger state |
||||
* can be one of the values of @ref FunctionalState. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, ADC1_Channel_TypeDef ADC1_Channel, |
||||
ADC1_PresSel_TypeDef ADC1_PrescalerSelection, ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, |
||||
FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align, |
||||
ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, FunctionalState ADC1_SchmittTriggerState) |
||||
{ |
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_CONVERSIONMODE_OK(ADC1_ConversionMode)); |
||||
assert_param(IS_ADC1_CHANNEL_OK(ADC1_Channel)); |
||||
assert_param(IS_ADC1_PRESSEL_OK(ADC1_PrescalerSelection)); |
||||
assert_param(IS_ADC1_EXTTRIG_OK(ADC1_ExtTrigger)); |
||||
assert_param(IS_FUNCTIONALSTATE_OK(((ADC1_ExtTriggerState)))); |
||||
assert_param(IS_ADC1_ALIGN_OK(ADC1_Align)); |
||||
assert_param(IS_ADC1_SCHMITTTRIG_OK(ADC1_SchmittTriggerChannel)); |
||||
assert_param(IS_FUNCTIONALSTATE_OK(ADC1_SchmittTriggerState)); |
||||
|
||||
/*-----------------CR1 & CSR configuration --------------------*/ |
||||
/* Configure the conversion mode and the channel to convert
|
||||
respectively according to ADC1_ConversionMode & ADC1_Channel values & ADC1_Align values */ |
||||
ADC1_ConversionConfig(ADC1_ConversionMode, ADC1_Channel, ADC1_Align); |
||||
/* Select the prescaler division factor according to ADC1_PrescalerSelection values */ |
||||
ADC1_PrescalerConfig(ADC1_PrescalerSelection); |
||||
|
||||
/*-----------------CR2 configuration --------------------*/ |
||||
/* Configure the external trigger state and event respectively
|
||||
according to NewState, ADC1_ExtTrigger */ |
||||
ADC1_ExternalTriggerConfig(ADC1_ExtTrigger, ADC1_ExtTriggerState); |
||||
|
||||
/*------------------TDR configuration ---------------------------*/ |
||||
/* Configure the schmitt trigger channel and state respectively
|
||||
according to ADC1_SchmittTriggerChannel & ADC1_SchmittTriggerNewState values */ |
||||
ADC1_SchmittTriggerConfig(ADC1_SchmittTriggerChannel, ADC1_SchmittTriggerState); |
||||
|
||||
/* Enable the ADC1 peripheral */ |
||||
ADC1->CR1 |= ADC1_CR1_ADON; |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enables or Disables the ADC1 peripheral. |
||||
* @param NewState: specifies the peripheral enabled or disabled state. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_Cmd(FunctionalState NewState) |
||||
{ |
||||
/* Check the parameters */ |
||||
assert_param(IS_FUNCTIONALSTATE_OK(NewState)); |
||||
|
||||
if (NewState != DISABLE) { |
||||
ADC1->CR1 |= ADC1_CR1_ADON; |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
ADC1->CR1 &= (uint8_t) (~ADC1_CR1_ADON); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enables or Disables the ADC1 scan mode. |
||||
* @param NewState: specifies the selected mode enabled or disabled state. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_ScanModeCmd(FunctionalState NewState) |
||||
{ |
||||
/* Check the parameters */ |
||||
assert_param(IS_FUNCTIONALSTATE_OK(NewState)); |
||||
|
||||
if (NewState != DISABLE) { |
||||
ADC1->CR2 |= ADC1_CR2_SCAN; |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
ADC1->CR2 &= (uint8_t) (~ADC1_CR2_SCAN); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enables or Disables the ADC1 data store into the Data Buffer registers rather than in the Data Register |
||||
* @param NewState: specifies the selected mode enabled or disabled state. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_DataBufferCmd(FunctionalState NewState) |
||||
{ |
||||
/* Check the parameters */ |
||||
assert_param(IS_FUNCTIONALSTATE_OK(NewState)); |
||||
|
||||
if (NewState != DISABLE) { |
||||
ADC1->CR3 |= ADC1_CR3_DBUF; |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
ADC1->CR3 &= (uint8_t) (~ADC1_CR3_DBUF); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enables or disables the ADC1 interrupt. |
||||
* @param ADC1_IT specifies the name of the interrupt to enable or disable. |
||||
* This parameter can be one of the following values: |
||||
* - ADC1_IT_AWDITEN : Analog WDG interrupt enable |
||||
* - ADC1_IT_EOCITEN : EOC iterrupt enable |
||||
* @param NewState specifies the state of the interrupt to apply. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState) |
||||
{ |
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_IT_OK(ADC1_IT)); |
||||
assert_param(IS_FUNCTIONALSTATE_OK(NewState)); |
||||
|
||||
if (NewState != DISABLE) { |
||||
/* Enable the ADC1 interrupts */ |
||||
ADC1->CSR |= (uint8_t) ADC1_IT; |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
/* Disable the ADC1 interrupts */ |
||||
ADC1->CSR &= (uint8_t) ((uint16_t) ~(uint16_t) ADC1_IT); |
||||
} |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @brief Start ADC1 conversion |
||||
* @par Full description: |
||||
* This function triggers the start of conversion, after ADC1 configuration. |
||||
* @param None |
||||
* @retval None |
||||
* @par Required preconditions: |
||||
* Enable the ADC1 peripheral before calling this function |
||||
*/ |
||||
inline void ADC1_StartConversion(void) |
||||
{ |
||||
ADC1->CR1 |= ADC1_CR1_ADON; |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get one sample of measured signal. |
||||
* @param None |
||||
* @retval ConversionValue: value of the measured signal. |
||||
* @par Required preconditions: |
||||
* ADC1 conversion finished. |
||||
*/ |
||||
inline uint16_t ADC1_GetConversionValue(void) |
||||
{ |
||||
uint16_t temph = 0; |
||||
uint8_t templ = 0; |
||||
|
||||
if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */ |
||||
{ |
||||
/* Read LSB first */ |
||||
templ = ADC1->DRL; |
||||
/* Then read MSB */ |
||||
temph = ADC1->DRH; |
||||
|
||||
temph = (uint16_t) (templ | (uint16_t) (temph << (uint8_t) 8)); |
||||
} else /* Left alignment */ |
||||
{ |
||||
/* Read MSB first*/ |
||||
temph = ADC1->DRH; |
||||
/* Then read LSB */ |
||||
templ = ADC1->DRL; |
||||
|
||||
temph = (uint16_t) ((uint16_t) ((uint16_t) templ << 6) | (uint16_t) ((uint16_t) temph << 8)); |
||||
} |
||||
|
||||
return ((uint16_t) temph); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enables or disables the analog watchdog for the given channel. |
||||
* @param Channel specifies the desired Channel. |
||||
* It can be set of the values of @ref ADC1_Channel_TypeDef. |
||||
* @param NewState specifies the analog watchdog new state. |
||||
* can have one of the values of @ref FunctionalState. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState) |
||||
{ |
||||
/* Check the parameters */ |
||||
assert_param(IS_FUNCTIONALSTATE_OK(NewState)); |
||||
assert_param(IS_ADC1_CHANNEL_OK(Channel)); |
||||
|
||||
if (Channel < (uint8_t) 8) { |
||||
if (NewState != DISABLE) { |
||||
ADC1->AWCRL |= (uint8_t) ((uint8_t) 1 << Channel); |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
ADC1->AWCRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << Channel); |
||||
} |
||||
} else { |
||||
if (NewState != DISABLE) { |
||||
ADC1->AWCRH |= (uint8_t) ((uint8_t) 1 << (Channel - (uint8_t) 8)); |
||||
} else /* NewState == DISABLE */ |
||||
{ |
||||
ADC1->AWCRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (uint8_t) (Channel - (uint8_t) 8)); |
||||
} |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Sets the high threshold of the analog watchdog. |
||||
* @param Threshold specifies the high threshold value. |
||||
* this value depends on the reference voltage range. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_SetHighThreshold(uint16_t Threshold) |
||||
{ |
||||
ADC1->HTRH = (uint8_t) (Threshold >> (uint8_t) 2); |
||||
ADC1->HTRL = (uint8_t) Threshold; |
||||
} |
||||
|
||||
/**
|
||||
* @brief Sets the low threshold of the analog watchdog. |
||||
* @param Threshold specifies the low threshold value. |
||||
* this value depends on the reference voltage range. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_SetLowThreshold(uint16_t Threshold) |
||||
{ |
||||
ADC1->LTRL = (uint8_t) Threshold; |
||||
ADC1->LTRH = (uint8_t) (Threshold >> (uint8_t) 2); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Get one sample of measured signal. |
||||
* @param Buffer specifies the buffer to read. |
||||
* @retval BufferValue: value read from the given buffer. |
||||
* @par Required preconditions: |
||||
* ADC1 conversion finished. |
||||
*/ |
||||
inline uint16_t ADC1_GetBufferValue(uint8_t Buffer) |
||||
{ |
||||
uint16_t temph = 0; |
||||
uint8_t templ = 0; |
||||
|
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_BUFFER_OK(Buffer)); |
||||
|
||||
if ((ADC1->CR2 & ADC1_CR2_ALIGN) != 0) /* Right alignment */ |
||||
{ |
||||
/* Read LSB first */ |
||||
templ = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1) + 1); |
||||
/* Then read MSB */ |
||||
temph = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1)); |
||||
|
||||
temph = (uint16_t) (templ | (uint16_t) (temph << (uint8_t) 8)); |
||||
} else /* Left alignment */ |
||||
{ |
||||
/* Read MSB first*/ |
||||
temph = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1)); |
||||
/* Then read LSB */ |
||||
templ = *(uint8_t *) (uint16_t) ((uint16_t) ADC1_BaseAddress + (uint8_t) (Buffer << 1) + 1); |
||||
|
||||
temph = (uint16_t) ((uint16_t) ((uint16_t) templ << 6) | (uint16_t) (temph << 8)); |
||||
} |
||||
|
||||
return ((uint16_t) temph); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Checks the specified analog watchdog channel status. |
||||
* @param Channel: specify the channel of which to check the analog watchdog |
||||
* can be one of the values of @ref ADC1_Channel_TypeDef. |
||||
* @retval FlagStatus Status of the analog watchdog. |
||||
*/ |
||||
inline FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel) |
||||
{ |
||||
uint8_t status = 0; |
||||
|
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_CHANNEL_OK(Channel)); |
||||
|
||||
if (Channel < (uint8_t) 8) { |
||||
status = (uint8_t) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << Channel)); |
||||
} else /* Channel = 8 | 9 */ |
||||
{ |
||||
status = (uint8_t) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (Channel - (uint8_t) 8))); |
||||
} |
||||
|
||||
return ((FlagStatus) status); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Checks the specified ADC1 flag status. |
||||
* @param Flag: ADC1 flag. |
||||
* can be one of the values of @ref ADC1_Flag_TypeDef. |
||||
* @retval FlagStatus Status of the ADC1 flag. |
||||
*/ |
||||
inline FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag) |
||||
{ |
||||
uint8_t flagstatus = 0; |
||||
uint8_t temp = 0; |
||||
|
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_FLAG_OK(Flag)); |
||||
|
||||
if ((Flag & 0x0F) == 0x01) { |
||||
/* Get OVR flag status */ |
||||
flagstatus = (uint8_t) (ADC1->CR3 & ADC1_CR3_OVR); |
||||
} else if ((Flag & 0xF0) == 0x10) { |
||||
/* Get analog watchdog channel status */ |
||||
temp = (uint8_t) (Flag & (uint8_t) 0x0F); |
||||
if (temp < 8) { |
||||
flagstatus = (uint8_t) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << temp)); |
||||
} else { |
||||
flagstatus = (uint8_t) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (temp - 8))); |
||||
} |
||||
} else /* Get EOC | AWD flag status */ |
||||
{ |
||||
flagstatus = (uint8_t) (ADC1->CSR & Flag); |
||||
} |
||||
return ((FlagStatus) flagstatus); |
||||
|
||||
} |
||||
|
||||
/**
|
||||
* @brief Clear the specified ADC1 Flag. |
||||
* @param Flag: ADC1 flag. |
||||
* can be one of the values of @ref ADC1_Flag_TypeDef. |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag) |
||||
{ |
||||
uint8_t temp = 0; |
||||
|
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_FLAG_OK(Flag)); |
||||
|
||||
if ((Flag & 0x0F) == 0x01) { |
||||
/* Clear OVR flag status */ |
||||
ADC1->CR3 &= (uint8_t) (~ADC1_CR3_OVR); |
||||
} else if ((Flag & 0xF0) == 0x10) { |
||||
/* Clear analog watchdog channel status */ |
||||
temp = (uint8_t) (Flag & (uint8_t) 0x0F); |
||||
if (temp < 8) { |
||||
ADC1->AWSRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << temp); |
||||
} else { |
||||
ADC1->AWSRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (temp - 8)); |
||||
} |
||||
} else /* Clear EOC | AWD flag status */ |
||||
{ |
||||
ADC1->CSR &= (uint8_t) (~Flag); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Returns the specified pending bit status |
||||
* @param ITPendingBit : the IT pending bit to check. |
||||
* This parameter can be one of the following values: |
||||
* - ADC1_IT_AWD : Analog WDG IT status |
||||
* - ADC1_IT_AWS0 : Analog channel 0 IT status |
||||
* - ADC1_IT_AWS1 : Analog channel 1 IT status |
||||
* - ADC1_IT_AWS2 : Analog channel 2 IT status |
||||
* - ADC1_IT_AWS3 : Analog channel 3 IT status |
||||
* - ADC1_IT_AWS4 : Analog channel 4 IT status |
||||
* - ADC1_IT_AWS5 : Analog channel 5 IT status |
||||
* - ADC1_IT_AWS6 : Analog channel 6 IT status |
||||
* - ADC1_IT_AWS7 : Analog channel 7 IT status |
||||
* - ADC1_IT_AWS8 : Analog channel 8 IT status |
||||
* - ADC1_IT_AWS9 : Analog channel 9 IT status |
||||
* - ADC1_IT_EOC : EOC pending bit |
||||
* @retval ITStatus: status of the specified pending bit. |
||||
*/ |
||||
inline ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit) |
||||
{ |
||||
ITStatus itstatus = RESET; |
||||
uint8_t temp = 0; |
||||
|
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit)); |
||||
|
||||
if (((uint16_t) ITPendingBit & 0xF0) == 0x10) { |
||||
/* Get analog watchdog channel status */ |
||||
temp = (uint8_t) ((uint16_t) ITPendingBit & 0x0F); |
||||
if (temp < 8) { |
||||
itstatus = (ITStatus) (ADC1->AWSRL & (uint8_t) ((uint8_t) 1 << temp)); |
||||
} else { |
||||
itstatus = (ITStatus) (ADC1->AWSRH & (uint8_t) ((uint8_t) 1 << (temp - 8))); |
||||
} |
||||
} else /* Get EOC | AWD flag status */ |
||||
{ |
||||
itstatus = (ITStatus) (ADC1->CSR & (uint8_t) ITPendingBit); |
||||
} |
||||
return ((ITStatus) itstatus); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Clear the ADC1 End of Conversion pending bit. |
||||
* @param ITPendingBit : the IT pending bit to clear. |
||||
* This parameter can be one of the following values: |
||||
* - ADC1_IT_AWD : Analog WDG IT status |
||||
* - ADC1_IT_AWS0 : Analog channel 0 IT status |
||||
* - ADC1_IT_AWS1 : Analog channel 1 IT status |
||||
* - ADC1_IT_AWS2 : Analog channel 2 IT status |
||||
* - ADC1_IT_AWS3 : Analog channel 3 IT status |
||||
* - ADC1_IT_AWS4 : Analog channel 4 IT status |
||||
* - ADC1_IT_AWS5 : Analog channel 5 IT status |
||||
* - ADC1_IT_AWS6 : Analog channel 6 IT status |
||||
* - ADC1_IT_AWS7 : Analog channel 7 IT status |
||||
* - ADC1_IT_AWS8 : Analog channel 8 IT status |
||||
* - ADC1_IT_AWS9 : Analog channel 9 IT status |
||||
* - ADC1_IT_EOC : EOC pending bit |
||||
* @retval None |
||||
*/ |
||||
inline void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit) |
||||
{ |
||||
uint8_t temp = 0; |
||||
|
||||
/* Check the parameters */ |
||||
assert_param(IS_ADC1_ITPENDINGBIT_OK(ITPendingBit)); |
||||
|
||||
if (((uint16_t) ITPendingBit & 0xF0) == 0x10) { |
||||
/* Clear analog watchdog channel status */ |
||||
temp = (uint8_t) ((uint16_t) ITPendingBit & 0x0F); |
||||
if (temp < 8) { |
||||
ADC1->AWSRL &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << temp); |
||||
} else { |
||||
ADC1->AWSRH &= (uint8_t) ~(uint8_t) ((uint8_t) 1 << (temp - 8)); |
||||
} |
||||
} else /* Clear EOC | AWD flag status */ |
||||
{ |
||||
ADC1->CSR &= (uint8_t) ((uint16_t) ~(uint16_t) ITPendingBit); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
|
||||
#endif /* __STM8S_ADC1_H */ |
@ -0,0 +1,318 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm8s_awu.h |
||||
* @author MCD Application Team |
||||
* @version V2.2.0 |
||||
* @date 30-September-2014 |
||||
* @brief This file contains all functions prototype and macros for the AWU peripheral. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> |
||||
* |
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
||||
* You may not use this file except in compliance with the License. |
||||
* You may obtain a copy of the License at: |
||||
* |
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
* |
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
||||
* See the License for the specific language governing permissions and |
||||
* limitations under the License. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM8S_AWU_H |
||||
#define __STM8S_AWU_H |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm8s.h" |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/** @addtogroup AWU_Exported_Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief AWU TimeBase selection |
||||
*/ |
||||
|
||||
typedef enum { |
||||
AWU_TIMEBASE_NO_IT = (uint8_t) 0, /*!< No AWU interrupt selected */ |
||||
AWU_TIMEBASE_250US = (uint8_t) 1, /*!< AWU Timebase equals 0.25 ms */ |
||||
AWU_TIMEBASE_500US = (uint8_t) 2, /*!< AWU Timebase equals 0.5 ms */ |
||||
AWU_TIMEBASE_1MS = (uint8_t) 3, /*!< AWU Timebase equals 1 ms */ |
||||
AWU_TIMEBASE_2MS = (uint8_t) 4, /*!< AWU Timebase equals 2 ms */ |
||||
AWU_TIMEBASE_4MS = (uint8_t) 5, /*!< AWU Timebase equals 4 ms */ |
||||
AWU_TIMEBASE_8MS = (uint8_t) 6, /*!< AWU Timebase equals 8 ms */ |
||||
AWU_TIMEBASE_16MS = (uint8_t) 7, /*!< AWU Timebase equals 16 ms */ |
||||
AWU_TIMEBASE_32MS = (uint8_t) 8, /*!< AWU Timebase equals 32 ms */ |
||||
AWU_TIMEBASE_64MS = (uint8_t) 9, /*!< AWU Timebase equals 64 ms */ |
||||
AWU_TIMEBASE_128MS = (uint8_t) 10, /*!< AWU Timebase equals 128 ms */ |
||||
AWU_TIMEBASE_256MS = (uint8_t) 11, /*!< AWU Timebase equals 256 ms */ |
||||
AWU_TIMEBASE_512MS = (uint8_t) 12, /*!< AWU Timebase equals 512 ms */ |
||||
AWU_TIMEBASE_1S = (uint8_t) 13, /*!< AWU Timebase equals 1 s */ |
||||
AWU_TIMEBASE_2S = (uint8_t) 14, /*!< AWU Timebase equals 2 s */ |
||||
AWU_TIMEBASE_12S = (uint8_t) 15, /*!< AWU Timebase equals 12 s */ |
||||
AWU_TIMEBASE_30S = (uint8_t) 16 /*!< AWU Timebase equals 30 s */ |
||||
} AWU_Timebase_TypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @addtogroup AWU_Exported_Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */ |
||||
#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macros ------------------------------------------------------------*/ |
||||
|
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/** @addtogroup AWU_Private_Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters. |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the AWU timebases |
||||
*/ |
||||
#define IS_AWU_TIMEBASE_OK(TB) \ |
||||
(((TB) == AWU_TIMEBASE_NO_IT) || \
|
||||
((TB) == AWU_TIMEBASE_250US) || \
|
||||
((TB) == AWU_TIMEBASE_500US) || \
|
||||
((TB) == AWU_TIMEBASE_1MS) || \
|
||||
((TB) == AWU_TIMEBASE_2MS) || \
|
||||
((TB) == AWU_TIMEBASE_4MS) || \
|
||||
((TB) == AWU_TIMEBASE_8MS) || \
|
||||
((TB) == AWU_TIMEBASE_16MS) || \
|
||||
((TB) == AWU_TIMEBASE_32MS) || \
|
||||
((TB) == AWU_TIMEBASE_64MS) || \
|
||||
((TB) == AWU_TIMEBASE_128MS) || \
|
||||
((TB) == AWU_TIMEBASE_256MS) || \
|
||||
((TB) == AWU_TIMEBASE_512MS) || \
|
||||
((TB) == AWU_TIMEBASE_1S) || \
|
||||
((TB) == AWU_TIMEBASE_2S) || \
|
||||
((TB) == AWU_TIMEBASE_12S) || \
|
||||
((TB) == AWU_TIMEBASE_30S)) |
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the LSI frequency (in Hz) |
||||
*/ |
||||
#define IS_LSI_FREQUENCY_OK(FREQ) \ |
||||
(((FREQ) >= LSI_FREQUENCY_MIN) && \
|
||||
((FREQ) <= LSI_FREQUENCY_MAX)) |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported functions ------------------------------------------------------- */ |
||||
|
||||
#if 0 |
||||
/** @addtogroup AWU_Exported_Functions
|
||||
* @{ |
||||
*/ |
||||
void AWU_DeInit(void); |
||||
|
||||
void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase); |
||||
|
||||
void AWU_Cmd(FunctionalState NewState); |
||||
|
||||
void AWU_LSICalibrationConfig(uint32_t LSIFreqHz); |
||||
|
||||
void AWU_IdleModeEnable(void); |
||||
|
||||
FlagStatus AWU_GetFlagStatus(void); |
||||
|
||||
#endif |
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/** @addtogroup STM8S_StdPeriph_Driver
|
||||
* @{ |
||||
*/ |
||||
/* Private typedef -----------------------------------------------------------*/ |
||||
/* Private define ------------------------------------------------------------*/ |
||||
/* Private macro -------------------------------------------------------------*/ |
||||
/* Private variables ---------------------------------------------------------*/ |
||||
/* Private function prototypes -----------------------------------------------*/ |
||||
/* Private functions ---------------------------------------------------------*/ |
||||
|
||||
/* Public functions ----------------------------------------------------------*/ |
||||
|
||||
/**
|
||||
* @addtogroup AWU_Public_Functions |
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Deinitializes the AWU peripheral registers to their default reset |
||||
* values. |
||||
* @param None |
||||
* @retval None |
||||
*/ |
||||
inline void AWU_DeInit(void) |
||||
{ |
||||
AWU->CSR = AWU_CSR_RESET_VALUE; |
||||
AWU->APR = AWU_APR_RESET_VALUE; |
||||
AWU->TBR = AWU_TBR_RESET_VALUE; |
||||
} |
||||
|
||||
/**
|
||||
* @brief Initializes the AWU peripheral according to the specified parameters. |
||||
* @param AWU_TimeBase : Time base selection (interval between AWU interrupts). |
||||
* can be one of the values of @ref AWU_Timebase_TypeDef. |
||||
* @retval None |
||||
* @par Required preconditions: |
||||
* The LS RC calibration must be performed before calling this function. |
||||
*/ |
||||
inline void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase) |
||||
{ |
||||
/* See also AWU_Timebase_TypeDef structure in stm8s_awu.h file :
|
||||
N 2 5 1 2 4 8 1 3 6 1 2 5 1 2 1 3 |
||||
O 5 0 m m m m 6 2 4 2 5 1 s s 2 0 |
||||
I 0 0 s s s s m m m 8 6 2 s s |
||||
T u u s s s m m m |
||||
s s s s s |
||||
*/ |
||||
/** Contains the different values to write in the APR register (used by AWU_Init function) */ |
||||
static CONST uint8_t APR_Array[17] = |
||||
{ |
||||
0, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 61, 23, 23, 62 |
||||
}; |
||||
|
||||
/** Contains the different values to write in the TBR register (used by AWU_Init function) */ |
||||
static CONST uint8_t TBR_Array[17] = |
||||
{ |
||||
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 12, 14, 15, 15 |
||||
}; |
||||
|
||||
/* Check parameter */ |
||||
assert_param(IS_AWU_TIMEBASE_OK(AWU_TimeBase)); |
||||
|
||||
/* Enable the AWU peripheral */ |
||||
AWU->CSR |= AWU_CSR_AWUEN; |
||||
|
||||
/* Set the TimeBase */ |
||||
AWU->TBR &= (uint8_t) (~AWU_TBR_AWUTB); |
||||
AWU->TBR |= TBR_Array[(uint8_t) AWU_TimeBase]; |
||||
|
||||
/* Set the APR divider */ |
||||
AWU->APR &= (uint8_t) (~AWU_APR_APR); |
||||
AWU->APR |= APR_Array[(uint8_t) AWU_TimeBase]; |
||||
} |
||||
|
||||
/**
|
||||
* @brief Enable or disable the AWU peripheral. |
||||
* @param NewState Indicates the new state of the AWU peripheral. |
||||
* @retval None |
||||
* @par Required preconditions: |
||||
* Initialisation of AWU and LS RC calibration must be done before. |
||||
*/ |
||||
inline void AWU_Cmd(FunctionalState NewState) |
||||
{ |
||||
if (NewState != DISABLE) { |
||||
/* Enable the AWU peripheral */ |
||||
AWU->CSR |= AWU_CSR_AWUEN; |
||||
} else { |
||||
/* Disable the AWU peripheral */ |
||||
AWU->CSR &= (uint8_t) (~AWU_CSR_AWUEN); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Update APR register with the measured LSI frequency. |
||||
* @par Note on the APR calculation: |
||||
* A is the integer part of lsifreqkhz/4 and x the decimal part. |
||||
* x <= A/(1+2A) is equivalent to A >= x(1+2A) and also to 4A >= 4x(1+2A) [F1] |
||||
* but we know that A + x = lsifreqkhz/4 ==> 4x = lsifreqkhz-4A |
||||
* so [F1] can be written : |
||||
* 4A >= (lsifreqkhz-4A)(1+2A) |
||||
* @param LSIFreqHz Low Speed RC frequency measured by timer (in Hz). |
||||
* @retval None |
||||
* @par Required preconditions: |
||||
* - AWU must be disabled to avoid unwanted interrupts. |
||||
*/ |
||||
inline void AWU_LSICalibrationConfig(uint32_t LSIFreqHz) |
||||
{ |
||||
uint16_t lsifreqkhz = 0x0; |
||||
uint16_t A = 0x0; |
||||
|
||||
/* Check parameter */ |
||||
assert_param(IS_LSI_FREQUENCY_OK(LSIFreqHz)); |
||||
|
||||
lsifreqkhz = (uint16_t) (LSIFreqHz / 1000); /* Converts value in kHz */ |
||||
|
||||
/* Calculation of AWU calibration value */ |
||||
|
||||
A = (uint16_t) (lsifreqkhz >> 2U); /* Division by 4, keep integer part only */ |
||||
|
||||
if ((4U * A) >= ((lsifreqkhz - (4U * A)) * (1U + (2U * A)))) { |
||||
AWU->APR = (uint8_t) (A - 2U); |
||||
} else { |
||||
AWU->APR = (uint8_t) (A - 1U); |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* @brief Configures AWU in Idle mode to reduce power consumption. |
||||
* @param None |
||||
* @retval None |
||||
*/ |
||||
inline void AWU_IdleModeEnable(void) |
||||
{ |
||||
/* Disable AWU peripheral */ |
||||
AWU->CSR &= (uint8_t) (~AWU_CSR_AWUEN); |
||||
|
||||
/* No AWU timebase */ |
||||
AWU->TBR = (uint8_t) (~AWU_TBR_AWUTB); |
||||
} |
||||
|
||||
/**
|
||||
* @brief Returns status of the AWU peripheral flag. |
||||
* @param None |
||||
* @retval FlagStatus : Status of the AWU flag. |
||||
* This parameter can be any of the @ref FlagStatus enumeration. |
||||
*/ |
||||
inline FlagStatus AWU_GetFlagStatus(void) |
||||
{ |
||||
return ((FlagStatus) (((uint8_t) (AWU->CSR & AWU_CSR_AWUF) == (uint8_t) 0x00) ? RESET : SET)); |
||||
} |
||||
|
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
||||
|
||||
|
||||
|
||||
#endif /* __STM8S_AWU_H */ |
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
@ -0,0 +1,241 @@ |
||||
/**
|
||||
****************************************************************************** |
||||
* @file stm8s_beep.h |
||||
* @author MCD Application Team |
||||
* @version V2.2.0 |
||||
* @date 30-September-2014 |
||||
* @brief This file contains all functions prototype and macros for the BEEP peripheral. |
||||
****************************************************************************** |
||||
* @attention |
||||
* |
||||
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2> |
||||
* |
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); |
||||
* You may not use this file except in compliance with the License. |
||||
* You may obtain a copy of the License at: |
||||
* |
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
* |
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
||||
* See the License for the specific language governing permissions and |
||||
* limitations under the License. |
||||
* |
||||
****************************************************************************** |
||||
*/ |
||||
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/ |
||||
#ifndef __STM8S_BEEP_H |
||||
#define __STM8S_BEEP_H |
||||
|
||||
/* Includes ------------------------------------------------------------------*/ |
||||
#include "stm8s.h" |
||||
|
||||
/* Exported types ------------------------------------------------------------*/ |
||||
|
||||
/** @addtogroup BEEP_Exported_Types
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief BEEP Frequency selection |
||||
*/ |
||||
typedef enum { |
||||
BEEP_FREQUENCY_1KHZ = (uint8_t) 0x00, /*!< Beep signal output frequency equals to 1 KHz */ |
||||
BEEP_FREQUENCY_2KHZ = (uint8_t) 0x40, /*!< Beep signal output frequency equals to 2 KHz */ |
||||
BEEP_FREQUENCY_4KHZ = (uint8_t) 0x80 /*!< Beep signal output frequency equals to 4 KHz */ |
||||
} BEEP_Frequency_TypeDef; |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported constants --------------------------------------------------------*/ |
||||
|
||||
/** @addtogroup BEEP_Exported_Constants
|
||||
* @{ |
||||
*/ |
||||
|
||||
#define BEEP_CALIBRATION_DEFAULT ((uint8_t)0x0B) /*!< Default value when calibration is not done */ |
||||
|
||||
#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */ |
||||
#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */ |
||||
|
||||
/**
|
||||
* @} |
||||
*/ |
||||
|
||||
/* Exported macros -----------------------------------------------------------*/ |
||||
/* Private macros ------------------------------------------------------------*/ |
||||
|
||||
/** @addtogroup BEEP_Private_Macros
|
||||
* @{ |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the different functions parameters. |
||||
*/ |
||||
|
||||
/**
|
||||
* @brief Macro used by the assert function to check the BEEP frequencies. |
||||