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187 lines
7.2 KiB
187 lines
7.2 KiB
8 years ago
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/**
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******************************************************************************
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* @file stm8s_itc.h
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* @author MCD Application Team
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* @version V2.2.0
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* @date 30-September-2014
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* @brief This file contains all functions prototype and macros for the ITC peripheral.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM8S_ITC_H
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#define __STM8S_ITC_H
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/* Includes ------------------------------------------------------------------*/
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#include "stm8s.h"
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/* Exported types ------------------------------------------------------------*/
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/** @addtogroup ITC_Exported_Types
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* @{
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*/
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/**
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* @brief ITC Interrupt Lines selection
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*/
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typedef enum {
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ITC_IRQ_TLI = (uint8_t)0, /*!< Software interrupt */
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ITC_IRQ_AWU = (uint8_t)1, /*!< Auto wake up from halt interrupt */
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ITC_IRQ_CLK = (uint8_t)2, /*!< Clock controller interrupt */
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ITC_IRQ_PORTA = (uint8_t)3, /*!< Port A external interrupts */
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ITC_IRQ_PORTB = (uint8_t)4, /*!< Port B external interrupts */
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ITC_IRQ_PORTC = (uint8_t)5, /*!< Port C external interrupts */
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ITC_IRQ_PORTD = (uint8_t)6, /*!< Port D external interrupts */
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ITC_IRQ_PORTE = (uint8_t)7, /*!< Port E external interrupts */
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#if defined(STM8S208) || defined(STM8AF52Ax)
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ITC_IRQ_CAN_RX = (uint8_t)8, /*!< beCAN RX interrupt */
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ITC_IRQ_CAN_TX = (uint8_t)9, /*!< beCAN TX/ER/SC interrupt */
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#endif /*STM8S208 or STM8AF52Ax */
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#if defined(STM8S903) || defined(STM8AF622x)
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ITC_IRQ_PORTF = (uint8_t)8, /*!< Port F external interrupts */
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#endif /*STM8S903 or STM8AF622x */
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ITC_IRQ_SPI = (uint8_t)10, /*!< SPI interrupt */
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ITC_IRQ_TIM1_OVF = (uint8_t)11, /*!< TIM1 update/overflow/underflow/trigger/
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break interrupt*/
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ITC_IRQ_TIM1_CAPCOM = (uint8_t)12, /*!< TIM1 capture/compare interrupt */
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#if defined(STM8S903) || defined(STM8AF622x)
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ITC_IRQ_TIM5_OVFTRI = (uint8_t)13, /*!< TIM5 update/overflow/underflow/trigger/
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interrupt */
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ITC_IRQ_TIM5_CAPCOM = (uint8_t)14, /*!< TIM5 capture/compare interrupt */
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#else
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ITC_IRQ_TIM2_OVF = (uint8_t)13, /*!< TIM2 update /overflow interrupt */
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ITC_IRQ_TIM2_CAPCOM = (uint8_t)14, /*!< TIM2 capture/compare interrupt */
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#endif /*STM8S903 or STM8AF622x */
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ITC_IRQ_TIM3_OVF = (uint8_t)15, /*!< TIM3 update /overflow interrupt*/
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ITC_IRQ_TIM3_CAPCOM = (uint8_t)16, /*!< TIM3 update /overflow interrupt */
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#if defined(STM8S208) ||defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \
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defined(STM8S003) ||defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax)
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ITC_IRQ_UART1_TX = (uint8_t)17, /*!< UART1 TX interrupt */
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ITC_IRQ_UART1_RX = (uint8_t)18, /*!< UART1 RX interrupt */
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#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S903 or STM8AF52Ax or STM8AF62Ax */
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#if defined(STM8AF622x)
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ITC_IRQ_UART4_TX = (uint8_t)17, /*!< UART4 TX interrupt */
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ITC_IRQ_UART4_RX = (uint8_t)18, /*!< UART4 RX interrupt */
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#endif /*STM8AF622x */
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ITC_IRQ_I2C = (uint8_t)19, /*!< I2C interrupt */
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#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x)
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ITC_IRQ_UART2_TX = (uint8_t)20, /*!< USART2 TX interrupt */
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ITC_IRQ_UART2_RX = (uint8_t)21, /*!< USART2 RX interrupt */
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#endif /*STM8S105 or STM8AF626x */
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#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax)
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ITC_IRQ_UART3_TX = (uint8_t)20, /*!< USART3 TX interrupt */
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ITC_IRQ_UART3_RX = (uint8_t)21, /*!< USART3 RX interrupt */
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ITC_IRQ_ADC2 = (uint8_t)22, /*!< ADC2 interrupt */
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#endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */
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#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x)
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ITC_IRQ_ADC1 = (uint8_t)22, /*!< ADC2 interrupt */
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#endif /*STM8S105 or STM8S005 or STM8S003 or STM8S103 or STM8S903 or STM8AF626x or STM8AF622x */
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#if defined(STM8S903) || defined(STM8AF622x)
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ITC_IRQ_TIM6_OVFTRI = (uint8_t)23, /*!< TIM6 update/overflow/underflow/trigger/
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interrupt */
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#else
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ITC_IRQ_TIM4_OVF = (uint8_t)23, /*!< TIM4 update /overflow interrupt */
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#endif /*STM8S903 or STM8AF622x */
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ITC_IRQ_EEPROM_EEC = (uint8_t)24 /*!< Flash interrupt */
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} ITC_Irq_TypeDef;
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/**
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* @brief ITC Priority Levels selection
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*/
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typedef enum {
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ITC_PRIORITYLEVEL_0 = (uint8_t)0x02, /*!< Software priority level 0 (cannot be written) */
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ITC_PRIORITYLEVEL_1 = (uint8_t)0x01, /*!< Software priority level 1 */
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ITC_PRIORITYLEVEL_2 = (uint8_t)0x00, /*!< Software priority level 2 */
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ITC_PRIORITYLEVEL_3 = (uint8_t)0x03 /*!< Software priority level 3 */
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} ITC_PriorityLevel_TypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @addtogroup ITC_Exported_Constants
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* @{
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*/
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#define CPU_SOFT_INT_DISABLED ((uint8_t)0x28) /*!< Mask for I1 and I0 bits in CPU_CC register */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/**
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* @brief Macros used by the assert function in order to check the different functions parameters.
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* @addtogroup ITC_Private_Macros
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* @{
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*/
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/* Used by assert function */
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#define IS_ITC_IRQ_OK(IRQ) ((IRQ) <= (uint8_t)24)
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/* Used by assert function */
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#define IS_ITC_PRIORITY_OK(PriorityValue) \
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(((PriorityValue) == ITC_PRIORITYLEVEL_0) || \
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((PriorityValue) == ITC_PRIORITYLEVEL_1) || \
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((PriorityValue) == ITC_PRIORITYLEVEL_2) || \
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((PriorityValue) == ITC_PRIORITYLEVEL_3))
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/* Used by assert function */
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#define IS_ITC_INTERRUPTS_DISABLED (ITC_GetSoftIntStatus() == CPU_SOFT_INT_DISABLED)
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/**
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* @}
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*/
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/* Exported functions ------------------------------------------------------- */
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/** @addtogroup ITC_Exported_Functions
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* @{
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*/
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uint8_t ITC_GetCPUCC(void);
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void ITC_DeInit(void);
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uint8_t ITC_GetSoftIntStatus(void);
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void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue);
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ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum);
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/**
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* @}
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*/
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#endif /* __STM8S_ITC_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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